2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
11 * This file handles the architecture-dependent parts of initialization
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/tty.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/config.h>
28 #include <linux/init.h>
29 #include <linux/initrd.h>
30 #include <linux/highmem.h>
31 #include <linux/bootmem.h>
32 #include <linux/module.h>
33 #include <asm/processor.h>
34 #include <linux/console.h>
35 #include <linux/seq_file.h>
36 #include <linux/crash_dump.h>
37 #include <linux/root_dev.h>
38 #include <linux/pci.h>
39 #include <linux/acpi.h>
40 #include <linux/kallsyms.h>
41 #include <linux/edd.h>
42 #include <linux/mmzone.h>
43 #include <linux/kexec.h>
44 #include <linux/cpufreq.h>
45 #include <linux/dmi.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/ctype.h>
50 #include <asm/uaccess.h>
51 #include <asm/system.h>
56 #include <video/edid.h>
59 #include <asm/mpspec.h>
60 #include <asm/mmu_context.h>
61 #include <asm/bootsetup.h>
62 #include <asm/proto.h>
63 #include <asm/setup.h>
64 #include <asm/mach_apic.h>
66 #include <asm/sections.h>
73 struct cpuinfo_x86 boot_cpu_data __read_mostly;
75 unsigned long mmu_cr4_features;
78 EXPORT_SYMBOL(acpi_disabled);
80 extern int __initdata acpi_ht;
81 extern acpi_interrupt_flags acpi_sci_flags;
82 int __initdata acpi_force = 0;
85 int acpi_numa __initdata;
87 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
90 unsigned long saved_video_mode;
96 char dmi_alloc_data[DMI_MAX_DATA];
101 struct screen_info screen_info;
102 struct sys_desc_table_struct {
103 unsigned short length;
104 unsigned char table[0];
107 struct edid_info edid_info;
110 extern int root_mountflags;
112 char command_line[COMMAND_LINE_SIZE];
114 struct resource standard_io_resources[] = {
115 { .name = "dma1", .start = 0x00, .end = 0x1f,
116 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
117 { .name = "pic1", .start = 0x20, .end = 0x21,
118 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
119 { .name = "timer0", .start = 0x40, .end = 0x43,
120 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
121 { .name = "timer1", .start = 0x50, .end = 0x53,
122 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
123 { .name = "keyboard", .start = 0x60, .end = 0x6f,
124 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
125 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
126 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
127 { .name = "pic2", .start = 0xa0, .end = 0xa1,
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
129 { .name = "dma2", .start = 0xc0, .end = 0xdf,
130 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
131 { .name = "fpu", .start = 0xf0, .end = 0xff,
132 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
135 #define STANDARD_IO_RESOURCES \
136 (sizeof standard_io_resources / sizeof standard_io_resources[0])
138 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
140 struct resource data_resource = {
141 .name = "Kernel data",
144 .flags = IORESOURCE_RAM,
146 struct resource code_resource = {
147 .name = "Kernel code",
150 .flags = IORESOURCE_RAM,
153 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
155 static struct resource system_rom_resource = {
156 .name = "System ROM",
159 .flags = IORESOURCE_ROM,
162 static struct resource extension_rom_resource = {
163 .name = "Extension ROM",
166 .flags = IORESOURCE_ROM,
169 static struct resource adapter_rom_resources[] = {
170 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
171 .flags = IORESOURCE_ROM },
172 { .name = "Adapter ROM", .start = 0, .end = 0,
173 .flags = IORESOURCE_ROM },
174 { .name = "Adapter ROM", .start = 0, .end = 0,
175 .flags = IORESOURCE_ROM },
176 { .name = "Adapter ROM", .start = 0, .end = 0,
177 .flags = IORESOURCE_ROM },
178 { .name = "Adapter ROM", .start = 0, .end = 0,
179 .flags = IORESOURCE_ROM },
180 { .name = "Adapter ROM", .start = 0, .end = 0,
181 .flags = IORESOURCE_ROM }
184 #define ADAPTER_ROM_RESOURCES \
185 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
187 static struct resource video_rom_resource = {
191 .flags = IORESOURCE_ROM,
194 static struct resource video_ram_resource = {
195 .name = "Video RAM area",
198 .flags = IORESOURCE_RAM,
201 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
203 static int __init romchecksum(unsigned char *rom, unsigned long length)
205 unsigned char *p, sum = 0;
207 for (p = rom; p < rom + length; p++)
212 static void __init probe_roms(void)
214 unsigned long start, length, upper;
219 upper = adapter_rom_resources[0].start;
220 for (start = video_rom_resource.start; start < upper; start += 2048) {
221 rom = isa_bus_to_virt(start);
222 if (!romsignature(rom))
225 video_rom_resource.start = start;
227 /* 0 < length <= 0x7f * 512, historically */
228 length = rom[2] * 512;
230 /* if checksum okay, trust length byte */
231 if (length && romchecksum(rom, length))
232 video_rom_resource.end = start + length - 1;
234 request_resource(&iomem_resource, &video_rom_resource);
238 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
243 request_resource(&iomem_resource, &system_rom_resource);
244 upper = system_rom_resource.start;
246 /* check for extension rom (ignore length byte!) */
247 rom = isa_bus_to_virt(extension_rom_resource.start);
248 if (romsignature(rom)) {
249 length = extension_rom_resource.end - extension_rom_resource.start + 1;
250 if (romchecksum(rom, length)) {
251 request_resource(&iomem_resource, &extension_rom_resource);
252 upper = extension_rom_resource.start;
256 /* check for adapter roms on 2k boundaries */
257 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
258 rom = isa_bus_to_virt(start);
259 if (!romsignature(rom))
262 /* 0 < length <= 0x7f * 512, historically */
263 length = rom[2] * 512;
265 /* but accept any length that fits if checksum okay */
266 if (!length || start + length > upper || !romchecksum(rom, length))
269 adapter_rom_resources[i].start = start;
270 adapter_rom_resources[i].end = start + length - 1;
271 request_resource(&iomem_resource, &adapter_rom_resources[i]);
273 start = adapter_rom_resources[i++].end & ~2047UL;
277 /* Check for full argument with no trailing characters */
278 static int fullarg(char *p, char *arg)
281 return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
284 static __init void parse_cmdline_early (char ** cmdline_p)
286 char c = ' ', *to = command_line, *from = COMMAND_LINE;
296 * If the BIOS enumerates physical processors before logical,
297 * maxcpus=N at enumeration-time can be used to disable HT.
299 else if (!memcmp(from, "maxcpus=", 8)) {
300 extern unsigned int maxcpus;
302 maxcpus = simple_strtoul(from + 8, NULL, 0);
306 /* "acpi=off" disables both ACPI table parsing and interpreter init */
307 if (fullarg(from,"acpi=off"))
310 if (fullarg(from, "acpi=force")) {
311 /* add later when we do DMI horrors: */
316 /* acpi=ht just means: do ACPI MADT parsing
317 at bootup, but don't enable the full ACPI interpreter */
318 if (fullarg(from, "acpi=ht")) {
323 else if (fullarg(from, "pci=noacpi"))
325 else if (fullarg(from, "acpi=noirq"))
328 else if (fullarg(from, "acpi_sci=edge"))
329 acpi_sci_flags.trigger = 1;
330 else if (fullarg(from, "acpi_sci=level"))
331 acpi_sci_flags.trigger = 3;
332 else if (fullarg(from, "acpi_sci=high"))
333 acpi_sci_flags.polarity = 1;
334 else if (fullarg(from, "acpi_sci=low"))
335 acpi_sci_flags.polarity = 3;
337 /* acpi=strict disables out-of-spec workarounds */
338 else if (fullarg(from, "acpi=strict")) {
341 #ifdef CONFIG_X86_IO_APIC
342 else if (fullarg(from, "acpi_skip_timer_override"))
343 acpi_skip_timer_override = 1;
347 if (fullarg(from, "disable_timer_pin_1"))
348 disable_timer_pin_1 = 1;
349 if (fullarg(from, "enable_timer_pin_1"))
350 disable_timer_pin_1 = -1;
352 if (fullarg(from, "nolapic") || fullarg(from, "disableapic")) {
353 clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
357 if (fullarg(from, "noapic"))
358 skip_ioapic_setup = 1;
360 if (fullarg(from,"apic")) {
361 skip_ioapic_setup = 0;
365 if (!memcmp(from, "mem=", 4))
366 parse_memopt(from+4, &from);
368 if (!memcmp(from, "memmap=", 7)) {
369 /* exactmap option is for used defined memory */
370 if (!memcmp(from+7, "exactmap", 8)) {
371 #ifdef CONFIG_CRASH_DUMP
372 /* If we are doing a crash dump, we
373 * still need to know the real mem
374 * size before original memory map is
377 saved_max_pfn = e820_end_of_ram();
385 parse_memmapopt(from+7, &from);
391 if (!memcmp(from, "numa=", 5))
395 if (!memcmp(from,"iommu=",6)) {
399 if (fullarg(from,"oops=panic"))
402 if (!memcmp(from, "noexec=", 7))
403 nonx_setup(from + 7);
406 /* crashkernel=size@addr specifies the location to reserve for
407 * a crash kernel. By reserving this memory we guarantee
408 * that linux never set's it up as a DMA target.
409 * Useful for holding code to do something appropriate
410 * after a kernel panic.
412 else if (!memcmp(from, "crashkernel=", 12)) {
413 unsigned long size, base;
414 size = memparse(from+12, &from);
416 base = memparse(from+1, &from);
417 /* FIXME: Do I want a sanity check
418 * to validate the memory range?
420 crashk_res.start = base;
421 crashk_res.end = base + size - 1;
426 #ifdef CONFIG_PROC_VMCORE
427 /* elfcorehdr= specifies the location of elf core header
428 * stored by the crashed kernel. This option will be passed
429 * by kexec loader to the capture kernel.
431 else if(!memcmp(from, "elfcorehdr=", 11))
432 elfcorehdr_addr = memparse(from+11, &from);
435 #ifdef CONFIG_HOTPLUG_CPU
436 else if (!memcmp(from, "additional_cpus=", 16))
437 setup_additional_cpus(from+16);
444 if (COMMAND_LINE_SIZE <= ++len)
449 printk(KERN_INFO "user-defined physical RAM map:\n");
450 e820_print_map("user");
453 *cmdline_p = command_line;
458 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
460 unsigned long bootmap_size, bootmap;
462 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
463 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
465 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
466 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
467 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
468 reserve_bootmem(bootmap, bootmap_size);
472 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
474 #ifdef CONFIG_EDD_MODULE
478 * copy_edd() - Copy the BIOS EDD information
479 * from boot_params into a safe place.
482 static inline void copy_edd(void)
484 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
485 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
486 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
487 edd.edd_info_nr = EDD_NR;
490 static inline void copy_edd(void)
495 #define EBDA_ADDR_POINTER 0x40E
497 unsigned __initdata ebda_addr;
498 unsigned __initdata ebda_size;
500 static void discover_ebda(void)
503 * there is a real-mode segmented pointer pointing to the
504 * 4K EBDA area at 0x40E
506 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
509 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
511 /* Round EBDA up to pages */
515 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
516 if (ebda_size > 64*1024)
520 void __init setup_arch(char **cmdline_p)
522 unsigned long kernel_end;
524 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
525 screen_info = SCREEN_INFO;
526 edid_info = EDID_INFO;
527 saved_video_mode = SAVED_VIDEO_MODE;
528 bootloader_type = LOADER_TYPE;
530 #ifdef CONFIG_BLK_DEV_RAM
531 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
532 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
533 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
535 setup_memory_region();
538 if (!MOUNT_ROOT_RDONLY)
539 root_mountflags &= ~MS_RDONLY;
540 init_mm.start_code = (unsigned long) &_text;
541 init_mm.end_code = (unsigned long) &_etext;
542 init_mm.end_data = (unsigned long) &_edata;
543 init_mm.brk = (unsigned long) &_end;
545 code_resource.start = virt_to_phys(&_text);
546 code_resource.end = virt_to_phys(&_etext)-1;
547 data_resource.start = virt_to_phys(&_etext);
548 data_resource.end = virt_to_phys(&_edata)-1;
550 parse_cmdline_early(cmdline_p);
552 early_identify_cpu(&boot_cpu_data);
555 * partially used pages are not usable - thus
556 * we are rounding upwards:
558 end_pfn = e820_end_of_ram();
559 num_physpages = end_pfn; /* for pfn_valid */
565 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
573 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
574 * Call this early for SRAT node setup.
576 acpi_boot_table_init();
579 #ifdef CONFIG_ACPI_NUMA
581 * Parse SRAT to discover nodes.
587 numa_initmem_init(0, end_pfn);
589 contig_initmem_init(0, end_pfn);
592 /* Reserve direct mapping */
593 reserve_bootmem_generic(table_start << PAGE_SHIFT,
594 (table_end - table_start) << PAGE_SHIFT);
597 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
598 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
601 * reserve physical page 0 - it's a special BIOS page on many boxes,
602 * enabling clean reboots, SMP operation, laptop functions.
604 reserve_bootmem_generic(0, PAGE_SIZE);
606 /* reserve ebda region */
608 reserve_bootmem_generic(ebda_addr, ebda_size);
612 * But first pinch a few for the stack/trampoline stuff
613 * FIXME: Don't need the extra page at 4K, but need to fix
614 * trampoline before removing it. (see the GDT stuff)
616 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
618 /* Reserve SMP trampoline */
619 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
622 #ifdef CONFIG_ACPI_SLEEP
624 * Reserve low memory region for sleep support.
626 acpi_reserve_bootmem();
628 #ifdef CONFIG_X86_LOCAL_APIC
630 * Find and reserve possible boot-time SMP configuration:
634 #ifdef CONFIG_BLK_DEV_INITRD
635 if (LOADER_TYPE && INITRD_START) {
636 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
637 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
639 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
640 initrd_end = initrd_start+INITRD_SIZE;
643 printk(KERN_ERR "initrd extends beyond end of memory "
644 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
645 (unsigned long)(INITRD_START + INITRD_SIZE),
646 (unsigned long)(end_pfn << PAGE_SHIFT));
652 if (crashk_res.start != crashk_res.end) {
653 reserve_bootmem_generic(crashk_res.start,
654 crashk_res.end - crashk_res.start + 1);
663 * set this early, so we dont allocate cpu0
664 * if MADT list doesnt list BSP first
665 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
667 cpu_set(0, cpu_present_map);
670 * Read APIC and some other early information from ACPI tables.
677 #ifdef CONFIG_X86_LOCAL_APIC
679 * get boot-time SMP configuration:
681 if (smp_found_config)
683 init_apic_mappings();
687 * Request address space for all standard RAM and ROM resources
688 * and also for regions reported as reserved by the e820.
691 e820_reserve_resources();
693 request_resource(&iomem_resource, &video_ram_resource);
697 /* request I/O space for devices used on all i[345]86 PCs */
698 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
699 request_resource(&ioport_resource, &standard_io_resources[i]);
705 #if defined(CONFIG_VGA_CONSOLE)
706 conswitchp = &vga_con;
707 #elif defined(CONFIG_DUMMY_CONSOLE)
708 conswitchp = &dummy_con;
713 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
717 if (c->extended_cpuid_level < 0x80000004)
720 v = (unsigned int *) c->x86_model_id;
721 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
722 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
723 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
724 c->x86_model_id[48] = 0;
729 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
731 unsigned int n, dummy, eax, ebx, ecx, edx;
733 n = c->extended_cpuid_level;
735 if (n >= 0x80000005) {
736 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
737 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
738 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
739 c->x86_cache_size=(ecx>>24)+(edx>>24);
740 /* On K8 L1 TLB is inclusive, so don't count it */
744 if (n >= 0x80000006) {
745 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
746 ecx = cpuid_ecx(0x80000006);
747 c->x86_cache_size = ecx >> 16;
748 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
750 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
751 c->x86_cache_size, ecx & 0xFF);
755 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
756 if (n >= 0x80000008) {
757 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
758 c->x86_virt_bits = (eax >> 8) & 0xff;
759 c->x86_phys_bits = eax & 0xff;
764 static int nearby_node(int apicid)
767 for (i = apicid - 1; i >= 0; i--) {
768 int node = apicid_to_node[i];
769 if (node != NUMA_NO_NODE && node_online(node))
772 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
773 int node = apicid_to_node[i];
774 if (node != NUMA_NO_NODE && node_online(node))
777 return first_node(node_online_map); /* Shouldn't happen */
782 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
783 * Assumes number of cores is a power of two.
785 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
790 int cpu = smp_processor_id();
792 unsigned apicid = hard_smp_processor_id();
794 unsigned ecx = cpuid_ecx(0x80000008);
796 c->x86_max_cores = (ecx & 0xff) + 1;
798 /* CPU telling us the core id bits shift? */
799 bits = (ecx >> 12) & 0xF;
801 /* Otherwise recompute */
803 while ((1 << bits) < c->x86_max_cores)
807 /* Low order bits define the core id (index of core in socket) */
808 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
809 /* Convert the APIC ID into the socket ID */
810 c->phys_proc_id = phys_pkg_id(bits);
813 node = c->phys_proc_id;
814 if (apicid_to_node[apicid] != NUMA_NO_NODE)
815 node = apicid_to_node[apicid];
816 if (!node_online(node)) {
817 /* Two possibilities here:
818 - The CPU is missing memory and no node was created.
819 In that case try picking one from a nearby CPU
820 - The APIC IDs differ from the HyperTransport node IDs
821 which the K8 northbridge parsing fills in.
822 Assume they are all increased by a constant offset,
823 but in the same order as the HT nodeids.
824 If that doesn't result in a usable node fall back to the
825 path for the previous case. */
826 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
827 if (ht_nodeid >= 0 &&
828 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
829 node = apicid_to_node[ht_nodeid];
830 /* Pick a nearby node */
831 if (!node_online(node))
832 node = nearby_node(apicid);
834 numa_set_node(cpu, node);
836 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
841 static void __init init_amd(struct cpuinfo_x86 *c)
849 * Disable TLB flush filter by setting HWCR.FFDIS on K8
850 * bit 6 of msr C001_0015
852 * Errata 63 for SH-B3 steppings
853 * Errata 122 for all steppings (F+ have it disabled by default)
856 rdmsrl(MSR_K8_HWCR, value);
858 wrmsrl(MSR_K8_HWCR, value);
862 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
863 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
864 clear_bit(0*32+31, &c->x86_capability);
866 /* On C+ stepping K8 rep microcode works well for copy/memset */
867 level = cpuid_eax(1);
868 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
869 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
871 /* Enable workaround for FXSAVE leak */
873 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
875 level = get_model_name(c);
879 /* Should distinguish Models here, but this is only
880 a fallback anyways. */
881 strcpy(c->x86_model_id, "Hammer");
885 display_cacheinfo(c);
887 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
888 if (c->x86_power & (1<<8))
889 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
891 /* Multi core CPU? */
892 if (c->extended_cpuid_level >= 0x80000008)
895 /* Fix cpuid4 emulation for more */
896 num_cache_leaves = 3;
899 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
902 u32 eax, ebx, ecx, edx;
903 int index_msb, core_bits;
905 cpuid(1, &eax, &ebx, &ecx, &edx);
908 if (!cpu_has(c, X86_FEATURE_HT))
910 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
913 smp_num_siblings = (ebx & 0xff0000) >> 16;
915 if (smp_num_siblings == 1) {
916 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
917 } else if (smp_num_siblings > 1 ) {
919 if (smp_num_siblings > NR_CPUS) {
920 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
921 smp_num_siblings = 1;
925 index_msb = get_count_order(smp_num_siblings);
926 c->phys_proc_id = phys_pkg_id(index_msb);
928 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
930 index_msb = get_count_order(smp_num_siblings) ;
932 core_bits = get_count_order(c->x86_max_cores);
934 c->cpu_core_id = phys_pkg_id(index_msb) &
935 ((1 << core_bits) - 1);
938 if ((c->x86_max_cores * smp_num_siblings) > 1) {
939 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
940 printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
947 * find out the number of processor cores on the die
949 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
953 if (c->cpuid_level < 4)
956 cpuid_count(4, 0, &eax, &t, &t, &t);
959 return ((eax >> 26) + 1);
964 static void srat_detect_node(void)
968 int cpu = smp_processor_id();
969 int apicid = hard_smp_processor_id();
971 /* Don't do the funky fallback heuristics the AMD version employs
973 node = apicid_to_node[apicid];
974 if (node == NUMA_NO_NODE)
975 node = first_node(node_online_map);
976 numa_set_node(cpu, node);
979 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
983 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
988 init_intel_cacheinfo(c);
989 n = c->extended_cpuid_level;
990 if (n >= 0x80000008) {
991 unsigned eax = cpuid_eax(0x80000008);
992 c->x86_virt_bits = (eax >> 8) & 0xff;
993 c->x86_phys_bits = eax & 0xff;
994 /* CPUID workaround for Intel 0F34 CPU */
995 if (c->x86_vendor == X86_VENDOR_INTEL &&
996 c->x86 == 0xF && c->x86_model == 0x3 &&
998 c->x86_phys_bits = 36;
1002 c->x86_cache_alignment = c->x86_clflush_size * 2;
1003 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1004 (c->x86 == 0x6 && c->x86_model >= 0x0e))
1005 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1006 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
1007 c->x86_max_cores = intel_num_cpu_cores(c);
1012 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1014 char *v = c->x86_vendor_id;
1016 if (!strcmp(v, "AuthenticAMD"))
1017 c->x86_vendor = X86_VENDOR_AMD;
1018 else if (!strcmp(v, "GenuineIntel"))
1019 c->x86_vendor = X86_VENDOR_INTEL;
1021 c->x86_vendor = X86_VENDOR_UNKNOWN;
1024 struct cpu_model_info {
1027 char *model_names[16];
1030 /* Do some early cpuid on the boot CPU to get some parameter that are
1031 needed before check_bugs. Everything advanced is in identify_cpu
1033 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1037 c->loops_per_jiffy = loops_per_jiffy;
1038 c->x86_cache_size = -1;
1039 c->x86_vendor = X86_VENDOR_UNKNOWN;
1040 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1041 c->x86_vendor_id[0] = '\0'; /* Unset */
1042 c->x86_model_id[0] = '\0'; /* Unset */
1043 c->x86_clflush_size = 64;
1044 c->x86_cache_alignment = c->x86_clflush_size;
1045 c->x86_max_cores = 1;
1046 c->extended_cpuid_level = 0;
1047 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1049 /* Get vendor name */
1050 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1051 (unsigned int *)&c->x86_vendor_id[0],
1052 (unsigned int *)&c->x86_vendor_id[8],
1053 (unsigned int *)&c->x86_vendor_id[4]);
1057 /* Initialize the standard set of capabilities */
1058 /* Note that the vendor-specific code below might override */
1060 /* Intel-defined flags: level 0x00000001 */
1061 if (c->cpuid_level >= 0x00000001) {
1063 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1064 &c->x86_capability[0]);
1065 c->x86 = (tfms >> 8) & 0xf;
1066 c->x86_model = (tfms >> 4) & 0xf;
1067 c->x86_mask = tfms & 0xf;
1069 c->x86 += (tfms >> 20) & 0xff;
1071 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1072 if (c->x86_capability[0] & (1<<19))
1073 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1075 /* Have CPUID level 0 only - unheard of */
1080 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
1085 * This does the hard work of actually picking apart the CPU stuff...
1087 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1092 early_identify_cpu(c);
1094 /* AMD-defined flags: level 0x80000001 */
1095 xlvl = cpuid_eax(0x80000000);
1096 c->extended_cpuid_level = xlvl;
1097 if ((xlvl & 0xffff0000) == 0x80000000) {
1098 if (xlvl >= 0x80000001) {
1099 c->x86_capability[1] = cpuid_edx(0x80000001);
1100 c->x86_capability[6] = cpuid_ecx(0x80000001);
1102 if (xlvl >= 0x80000004)
1103 get_model_name(c); /* Default name */
1106 /* Transmeta-defined flags: level 0x80860001 */
1107 xlvl = cpuid_eax(0x80860000);
1108 if ((xlvl & 0xffff0000) == 0x80860000) {
1109 /* Don't set x86_cpuid_level here for now to not confuse. */
1110 if (xlvl >= 0x80860001)
1111 c->x86_capability[2] = cpuid_edx(0x80860001);
1114 c->apicid = phys_pkg_id(0);
1117 * Vendor-specific initialization. In this section we
1118 * canonicalize the feature flags, meaning if there are
1119 * features a certain CPU supports which CPUID doesn't
1120 * tell us, CPUID claiming incorrect flags, or other bugs,
1121 * we handle them here.
1123 * At the end of this section, c->x86_capability better
1124 * indicate the features this CPU genuinely supports!
1126 switch (c->x86_vendor) {
1127 case X86_VENDOR_AMD:
1131 case X86_VENDOR_INTEL:
1135 case X86_VENDOR_UNKNOWN:
1137 display_cacheinfo(c);
1141 select_idle_routine(c);
1145 * On SMP, boot_cpu_data holds the common feature set between
1146 * all CPUs; so make sure that we indicate which features are
1147 * common between the CPUs. The first time this routine gets
1148 * executed, c == &boot_cpu_data.
1150 if (c != &boot_cpu_data) {
1151 /* AND the already accumulated flags with these */
1152 for (i = 0 ; i < NCAPINTS ; i++)
1153 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1156 #ifdef CONFIG_X86_MCE
1159 if (c == &boot_cpu_data)
1164 numa_add_cpu(smp_processor_id());
1169 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1171 if (c->x86_model_id[0])
1172 printk("%s", c->x86_model_id);
1174 if (c->x86_mask || c->cpuid_level >= 0)
1175 printk(" stepping %02x\n", c->x86_mask);
1181 * Get CPU information for use by the procfs.
1184 static int show_cpuinfo(struct seq_file *m, void *v)
1186 struct cpuinfo_x86 *c = v;
1189 * These flag bits must match the definitions in <asm/cpufeature.h>.
1190 * NULL means this bit is undefined or reserved; either way it doesn't
1191 * have meaning as far as Linux is concerned. Note that it's important
1192 * to realize there is a difference between this table and CPUID -- if
1193 * applications want to get the raw CPUID data, they should access
1194 * /dev/cpu/<cpu_nr>/cpuid instead.
1196 static char *x86_cap_flags[] = {
1198 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1199 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1200 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1201 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1204 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1205 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1206 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1207 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1209 /* Transmeta-defined */
1210 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1211 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1212 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1213 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1215 /* Other (Linux-defined) */
1216 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1217 "constant_tsc", NULL, NULL,
1218 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1219 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1220 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1222 /* Intel-defined (#2) */
1223 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1224 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1225 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1226 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1228 /* VIA/Cyrix/Centaur-defined */
1229 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1230 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1231 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1232 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1234 /* AMD-defined (#2) */
1235 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1236 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1237 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1238 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1240 static char *x86_power_flags[] = {
1241 "ts", /* temperature sensor */
1242 "fid", /* frequency id control */
1243 "vid", /* voltage id control */
1244 "ttp", /* thermal trip */
1248 /* nothing */ /* constant_tsc - moved to flags */
1253 if (!cpu_online(c-cpu_data))
1257 seq_printf(m,"processor\t: %u\n"
1259 "cpu family\t: %d\n"
1261 "model name\t: %s\n",
1262 (unsigned)(c-cpu_data),
1263 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1266 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1268 if (c->x86_mask || c->cpuid_level >= 0)
1269 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1271 seq_printf(m, "stepping\t: unknown\n");
1273 if (cpu_has(c,X86_FEATURE_TSC)) {
1274 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1277 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1278 freq / 1000, (freq % 1000));
1282 if (c->x86_cache_size >= 0)
1283 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1286 if (smp_num_siblings * c->x86_max_cores > 1) {
1287 int cpu = c - cpu_data;
1288 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1289 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1290 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1291 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1297 "fpu_exception\t: yes\n"
1298 "cpuid level\t: %d\n"
1305 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1306 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1307 seq_printf(m, " %s", x86_cap_flags[i]);
1310 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1311 c->loops_per_jiffy/(500000/HZ),
1312 (c->loops_per_jiffy/(5000/HZ)) % 100);
1314 if (c->x86_tlbsize > 0)
1315 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1316 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1317 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1319 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1320 c->x86_phys_bits, c->x86_virt_bits);
1322 seq_printf(m, "power management:");
1325 for (i = 0; i < 32; i++)
1326 if (c->x86_power & (1 << i)) {
1327 if (i < ARRAY_SIZE(x86_power_flags) &&
1329 seq_printf(m, "%s%s",
1330 x86_power_flags[i][0]?" ":"",
1331 x86_power_flags[i]);
1333 seq_printf(m, " [%d]", i);
1337 seq_printf(m, "\n\n");
1342 static void *c_start(struct seq_file *m, loff_t *pos)
1344 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1347 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1350 return c_start(m, pos);
1353 static void c_stop(struct seq_file *m, void *v)
1357 struct seq_operations cpuinfo_op = {
1361 .show = show_cpuinfo,
1364 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1365 #include <linux/platform_device.h>
1366 static __init int add_pcspkr(void)
1368 struct platform_device *pd;
1371 pd = platform_device_alloc("pcspkr", -1);
1375 ret = platform_device_add(pd);
1377 platform_device_put(pd);
1381 device_initcall(add_pcspkr);