1 // SPDX-License-Identifier: GPL-2.0
3 * Core of Xen paravirt_ops implementation.
5 * This file contains the xen_paravirt_ops structure itself, and the
7 * - privileged instructions
12 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
15 #include <linux/cpu.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/smp.h>
19 #include <linux/preempt.h>
20 #include <linux/hardirq.h>
21 #include <linux/percpu.h>
22 #include <linux/delay.h>
23 #include <linux/start_kernel.h>
24 #include <linux/sched.h>
25 #include <linux/kprobes.h>
26 #include <linux/memblock.h>
27 #include <linux/export.h>
29 #include <linux/page-flags.h>
30 #include <linux/pci.h>
31 #include <linux/gfp.h>
32 #include <linux/edd.h>
33 #include <linux/reboot.h>
36 #include <xen/events.h>
37 #include <xen/interface/xen.h>
38 #include <xen/interface/version.h>
39 #include <xen/interface/physdev.h>
40 #include <xen/interface/vcpu.h>
41 #include <xen/interface/memory.h>
42 #include <xen/interface/nmi.h>
43 #include <xen/interface/xen-mca.h>
44 #include <xen/features.h>
46 #include <xen/hvc-console.h>
49 #include <asm/paravirt.h>
52 #include <asm/xen/pci.h>
53 #include <asm/xen/hypercall.h>
54 #include <asm/xen/hypervisor.h>
55 #include <asm/xen/cpuid.h>
56 #include <asm/fixmap.h>
57 #include <asm/processor.h>
58 #include <asm/proto.h>
59 #include <asm/msr-index.h>
60 #include <asm/traps.h>
61 #include <asm/setup.h>
63 #include <asm/pgalloc.h>
64 #include <asm/tlbflush.h>
65 #include <asm/reboot.h>
66 #include <asm/stackprotector.h>
67 #include <asm/hypervisor.h>
68 #include <asm/mach_traps.h>
69 #include <asm/mwait.h>
70 #include <asm/pci_x86.h>
72 #ifdef CONFIG_X86_IOPL_IOPERM
73 #include <asm/io_bitmap.h>
77 #include <linux/acpi.h>
79 #include <acpi/pdc_intel.h>
80 #include <acpi/processor.h>
81 #include <xen/interface/platform.h>
87 #include "multicalls.h"
90 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */
92 void *xen_initial_gdt;
94 static int xen_cpu_up_prepare_pv(unsigned int cpu);
95 static int xen_cpu_dead_pv(unsigned int cpu);
98 struct desc_struct desc[3];
102 * Updating the 3 TLS descriptors in the GDT on every task switch is
103 * surprisingly expensive so we avoid updating them if they haven't
104 * changed. Since Xen writes different descriptors than the one
105 * passed in the update_descriptor hypercall we keep shadow copies to
108 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
110 static void __init xen_pv_init_platform(void)
112 xen_set_restricted_virtio_memory_access();
114 populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP));
116 set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info);
117 HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
119 /* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */
120 xen_vcpu_info_reset(0);
122 /* pvclock is in shared info area */
126 static void __init xen_pv_guest_late_init(void)
129 /* Setup shared vcpu info for non-smp configurations */
130 xen_setup_vcpu_info_placement();
134 static __read_mostly unsigned int cpuid_leaf5_ecx_val;
135 static __read_mostly unsigned int cpuid_leaf5_edx_val;
137 static void xen_cpuid(unsigned int *ax, unsigned int *bx,
138 unsigned int *cx, unsigned int *dx)
140 unsigned maskebx = ~0;
143 * Mask out inconvenient features, to try and disable as many
144 * unsupported kernel subsystems as possible.
147 case CPUID_MWAIT_LEAF:
148 /* Synthesize the values.. */
151 *cx = cpuid_leaf5_ecx_val;
152 *dx = cpuid_leaf5_edx_val;
156 /* Suppress extended topology stuff */
161 asm(XEN_EMULATE_PREFIX "cpuid"
166 : "0" (*ax), "2" (*cx));
171 static bool __init xen_check_mwait(void)
174 struct xen_platform_op op = {
175 .cmd = XENPF_set_processor_pminfo,
176 .u.set_pminfo.id = -1,
177 .u.set_pminfo.type = XEN_PM_PDC,
180 unsigned int ax, bx, cx, dx;
181 unsigned int mwait_mask;
183 /* We need to determine whether it is OK to expose the MWAIT
184 * capability to the kernel to harvest deeper than C3 states from ACPI
185 * _CST using the processor_harvest_xen.c module. For this to work, we
186 * need to gather the MWAIT_LEAF values (which the cstate.c code
187 * checks against). The hypervisor won't expose the MWAIT flag because
188 * it would break backwards compatibility; so we will find out directly
189 * from the hardware and hypercall.
191 if (!xen_initial_domain())
195 * When running under platform earlier than Xen4.2, do not expose
196 * mwait, to avoid the risk of loading native acpi pad driver
198 if (!xen_running_on_version_or_later(4, 2))
204 native_cpuid(&ax, &bx, &cx, &dx);
206 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
207 (1 << (X86_FEATURE_MWAIT % 32));
209 if ((cx & mwait_mask) != mwait_mask)
212 /* We need to emulate the MWAIT_LEAF and for that we need both
213 * ecx and edx. The hypercall provides only partial information.
216 ax = CPUID_MWAIT_LEAF;
221 native_cpuid(&ax, &bx, &cx, &dx);
223 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
224 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
226 buf[0] = ACPI_PDC_REVISION_ID;
228 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
230 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
232 if ((HYPERVISOR_platform_op(&op) == 0) &&
233 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
234 cpuid_leaf5_ecx_val = cx;
235 cpuid_leaf5_edx_val = dx;
243 static bool __init xen_check_xsave(void)
245 unsigned int cx, xsave_mask;
249 xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) |
250 (1 << (X86_FEATURE_OSXSAVE % 32));
252 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
253 return (cx & xsave_mask) == xsave_mask;
256 static void __init xen_init_capabilities(void)
258 setup_force_cpu_cap(X86_FEATURE_XENPV);
259 setup_clear_cpu_cap(X86_FEATURE_DCA);
260 setup_clear_cpu_cap(X86_FEATURE_APERFMPERF);
261 setup_clear_cpu_cap(X86_FEATURE_MTRR);
262 setup_clear_cpu_cap(X86_FEATURE_ACC);
263 setup_clear_cpu_cap(X86_FEATURE_X2APIC);
264 setup_clear_cpu_cap(X86_FEATURE_SME);
267 * Xen PV would need some work to support PCID: CR3 handling as well
268 * as xen_flush_tlb_others() would need updating.
270 setup_clear_cpu_cap(X86_FEATURE_PCID);
272 if (!xen_initial_domain())
273 setup_clear_cpu_cap(X86_FEATURE_ACPI);
275 if (xen_check_mwait())
276 setup_force_cpu_cap(X86_FEATURE_MWAIT);
278 setup_clear_cpu_cap(X86_FEATURE_MWAIT);
280 if (!xen_check_xsave()) {
281 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
282 setup_clear_cpu_cap(X86_FEATURE_OSXSAVE);
286 static noinstr void xen_set_debugreg(int reg, unsigned long val)
288 HYPERVISOR_set_debugreg(reg, val);
291 static noinstr unsigned long xen_get_debugreg(int reg)
293 return HYPERVISOR_get_debugreg(reg);
296 static void xen_end_context_switch(struct task_struct *next)
299 paravirt_end_context_switch(next);
302 static unsigned long xen_store_tr(void)
308 * Set the page permissions for a particular virtual address. If the
309 * address is a vmalloc mapping (or other non-linear mapping), then
310 * find the linear mapping of the page and also set its protections to
313 static void set_aliased_prot(void *v, pgprot_t prot)
322 ptep = lookup_address((unsigned long)v, &level);
323 BUG_ON(ptep == NULL);
325 pfn = pte_pfn(*ptep);
326 pte = pfn_pte(pfn, prot);
329 * Careful: update_va_mapping() will fail if the virtual address
330 * we're poking isn't populated in the page tables. We don't
331 * need to worry about the direct map (that's always in the page
332 * tables), but we need to be careful about vmap space. In
333 * particular, the top level page table can lazily propagate
334 * entries between processes, so if we've switched mms since we
335 * vmapped the target in the first place, we might not have the
336 * top-level page table entry populated.
338 * We disable preemption because we want the same mm active when
339 * we probe the target and when we issue the hypercall. We'll
340 * have the same nominal mm, but if we're a kernel thread, lazy
341 * mm dropping could change our pgd.
343 * Out of an abundance of caution, this uses __get_user() to fault
344 * in the target address just in case there's some obscure case
345 * in which the target address isn't readable.
350 copy_from_kernel_nofault(&dummy, v, 1);
352 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
355 va = __va(PFN_PHYS(pfn));
357 if (va != v && HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
363 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
365 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
369 * We need to mark the all aliases of the LDT pages RO. We
370 * don't need to call vm_flush_aliases(), though, since that's
371 * only responsible for flushing aliases out the TLBs, not the
372 * page tables, and Xen will flush the TLB for us if needed.
374 * To avoid confusing future readers: none of this is necessary
375 * to load the LDT. The hypervisor only checks this when the
376 * LDT is faulted in due to subsequent descriptor access.
379 for (i = 0; i < entries; i += entries_per_page)
380 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
383 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
385 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
388 for (i = 0; i < entries; i += entries_per_page)
389 set_aliased_prot(ldt + i, PAGE_KERNEL);
392 static void xen_set_ldt(const void *addr, unsigned entries)
394 struct mmuext_op *op;
395 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
397 trace_xen_cpu_set_ldt(addr, entries);
400 op->cmd = MMUEXT_SET_LDT;
401 op->arg1.linear_addr = (unsigned long)addr;
402 op->arg2.nr_ents = entries;
404 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
406 xen_mc_issue(PARAVIRT_LAZY_CPU);
409 static void xen_load_gdt(const struct desc_ptr *dtr)
411 unsigned long va = dtr->address;
412 unsigned int size = dtr->size + 1;
413 unsigned long pfn, mfn;
418 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
419 BUG_ON(size > PAGE_SIZE);
420 BUG_ON(va & ~PAGE_MASK);
423 * The GDT is per-cpu and is in the percpu data area.
424 * That can be virtually mapped, so we need to do a
425 * page-walk to get the underlying MFN for the
426 * hypercall. The page can also be in the kernel's
427 * linear range, so we need to RO that mapping too.
429 ptep = lookup_address(va, &level);
430 BUG_ON(ptep == NULL);
432 pfn = pte_pfn(*ptep);
433 mfn = pfn_to_mfn(pfn);
434 virt = __va(PFN_PHYS(pfn));
436 make_lowmem_page_readonly((void *)va);
437 make_lowmem_page_readonly(virt);
439 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
444 * load_gdt for early boot, when the gdt is only mapped once
446 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
448 unsigned long va = dtr->address;
449 unsigned int size = dtr->size + 1;
450 unsigned long pfn, mfn;
453 /* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
454 BUG_ON(size > PAGE_SIZE);
455 BUG_ON(va & ~PAGE_MASK);
457 pfn = virt_to_pfn(va);
458 mfn = pfn_to_mfn(pfn);
460 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
462 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
465 if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
469 static inline bool desc_equal(const struct desc_struct *d1,
470 const struct desc_struct *d2)
472 return !memcmp(d1, d2, sizeof(*d1));
475 static void load_TLS_descriptor(struct thread_struct *t,
476 unsigned int cpu, unsigned int i)
478 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
479 struct desc_struct *gdt;
481 struct multicall_space mc;
483 if (desc_equal(shadow, &t->tls_array[i]))
486 *shadow = t->tls_array[i];
488 gdt = get_cpu_gdt_rw(cpu);
489 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
490 mc = __xen_mc_entry(0);
492 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
495 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
498 * In lazy mode we need to zero %fs, otherwise we may get an
499 * exception between the new %fs descriptor being loaded and
500 * %fs being effectively cleared at __switch_to().
502 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)
507 load_TLS_descriptor(t, cpu, 0);
508 load_TLS_descriptor(t, cpu, 1);
509 load_TLS_descriptor(t, cpu, 2);
511 xen_mc_issue(PARAVIRT_LAZY_CPU);
514 static void xen_load_gs_index(unsigned int idx)
516 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
520 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
523 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
524 u64 entry = *(u64 *)ptr;
526 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
531 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
537 void noist_exc_debug(struct pt_regs *regs);
539 DEFINE_IDTENTRY_RAW(xenpv_exc_nmi)
541 /* On Xen PV, NMI doesn't use IST. The C part is the same as native. */
545 DEFINE_IDTENTRY_RAW_ERRORCODE(xenpv_exc_double_fault)
547 /* On Xen PV, DF doesn't use IST. The C part is the same as native. */
548 exc_double_fault(regs, error_code);
551 DEFINE_IDTENTRY_RAW(xenpv_exc_debug)
554 * There's no IST on Xen PV, but we still need to dispatch
555 * to the correct handler.
558 noist_exc_debug(regs);
563 DEFINE_IDTENTRY_RAW(exc_xen_unknown_trap)
565 /* This should never happen and there is no way to handle it. */
566 instrumentation_begin();
567 pr_err("Unknown trap in Xen PV mode.");
569 instrumentation_end();
572 #ifdef CONFIG_X86_MCE
573 DEFINE_IDTENTRY_RAW(xenpv_exc_machine_check)
576 * There's no IST on Xen PV, but we still need to dispatch
577 * to the correct handler.
580 noist_exc_machine_check(regs);
582 exc_machine_check(regs);
586 struct trap_array_entry {
592 #define TRAP_ENTRY(func, ist_ok) { \
593 .orig = asm_##func, \
594 .xen = xen_asm_##func, \
597 #define TRAP_ENTRY_REDIR(func, ist_ok) { \
598 .orig = asm_##func, \
599 .xen = xen_asm_xenpv_##func, \
602 static struct trap_array_entry trap_array[] = {
603 TRAP_ENTRY_REDIR(exc_debug, true ),
604 TRAP_ENTRY_REDIR(exc_double_fault, true ),
605 #ifdef CONFIG_X86_MCE
606 TRAP_ENTRY_REDIR(exc_machine_check, true ),
608 TRAP_ENTRY_REDIR(exc_nmi, true ),
609 TRAP_ENTRY(exc_int3, false ),
610 TRAP_ENTRY(exc_overflow, false ),
611 #ifdef CONFIG_IA32_EMULATION
612 { entry_INT80_compat, xen_entry_INT80_compat, false },
614 TRAP_ENTRY(exc_page_fault, false ),
615 TRAP_ENTRY(exc_divide_error, false ),
616 TRAP_ENTRY(exc_bounds, false ),
617 TRAP_ENTRY(exc_invalid_op, false ),
618 TRAP_ENTRY(exc_device_not_available, false ),
619 TRAP_ENTRY(exc_coproc_segment_overrun, false ),
620 TRAP_ENTRY(exc_invalid_tss, false ),
621 TRAP_ENTRY(exc_segment_not_present, false ),
622 TRAP_ENTRY(exc_stack_segment, false ),
623 TRAP_ENTRY(exc_general_protection, false ),
624 TRAP_ENTRY(exc_spurious_interrupt_bug, false ),
625 TRAP_ENTRY(exc_coprocessor_error, false ),
626 TRAP_ENTRY(exc_alignment_check, false ),
627 TRAP_ENTRY(exc_simd_coprocessor_error, false ),
628 #ifdef CONFIG_X86_KERNEL_IBT
629 TRAP_ENTRY(exc_control_protection, false ),
633 static bool __ref get_trap_addr(void **addr, unsigned int ist)
636 bool ist_okay = false;
640 * Replace trap handler addresses by Xen specific ones.
641 * Check for known traps using IST and whitelist them.
642 * The debugger ones are the only ones we care about.
643 * Xen will handle faults like double_fault, so we should never see
644 * them. Warn if there's an unexpected IST-using fault handler.
646 for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) {
647 struct trap_array_entry *entry = trap_array + nr;
649 if (*addr == entry->orig) {
651 ist_okay = entry->ist_okay;
657 if (nr == ARRAY_SIZE(trap_array) &&
658 *addr >= (void *)early_idt_handler_array[0] &&
659 *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) {
660 nr = (*addr - (void *)early_idt_handler_array[0]) /
661 EARLY_IDT_HANDLER_SIZE;
662 *addr = (void *)xen_early_idt_handler_array[nr];
667 *addr = (void *)xen_asm_exc_xen_unknown_trap;
669 if (WARN_ON(found && ist != 0 && !ist_okay))
675 static int cvt_gate_to_trap(int vector, const gate_desc *val,
676 struct trap_info *info)
680 if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT)
683 info->vector = vector;
685 addr = gate_offset(val);
686 if (!get_trap_addr((void **)&addr, val->bits.ist))
688 info->address = addr;
690 info->cs = gate_segment(val);
691 info->flags = val->bits.dpl;
692 /* interrupt gates clear IF */
693 if (val->bits.type == GATE_INTERRUPT)
694 info->flags |= 1 << 2;
699 /* Locations of each CPU's IDT */
700 static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
702 /* Set an IDT entry. If the entry is part of the current IDT, then
704 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
706 unsigned long p = (unsigned long)&dt[entrynum];
707 unsigned long start, end;
709 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
713 start = __this_cpu_read(idt_desc.address);
714 end = start + __this_cpu_read(idt_desc.size) + 1;
718 native_write_idt_entry(dt, entrynum, g);
720 if (p >= start && (p + 8) <= end) {
721 struct trap_info info[2];
725 if (cvt_gate_to_trap(entrynum, g, &info[0]))
726 if (HYPERVISOR_set_trap_table(info))
733 static unsigned xen_convert_trap_info(const struct desc_ptr *desc,
734 struct trap_info *traps, bool full)
736 unsigned in, out, count;
738 count = (desc->size+1) / sizeof(gate_desc);
741 for (in = out = 0; in < count; in++) {
742 gate_desc *entry = (gate_desc *)(desc->address) + in;
744 if (cvt_gate_to_trap(in, entry, &traps[out]) || full)
751 void xen_copy_trap_info(struct trap_info *traps)
753 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
755 xen_convert_trap_info(desc, traps, true);
758 /* Load a new IDT into Xen. In principle this can be per-CPU, so we
759 hold a spinlock to protect the static traps[] array (static because
760 it avoids allocation, and saves stack space). */
761 static void xen_load_idt(const struct desc_ptr *desc)
763 static DEFINE_SPINLOCK(lock);
764 static struct trap_info traps[257];
767 trace_xen_cpu_load_idt(desc);
771 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
773 out = xen_convert_trap_info(desc, traps, false);
774 memset(&traps[out], 0, sizeof(traps[0]));
777 if (HYPERVISOR_set_trap_table(traps))
783 /* Write a GDT descriptor entry. Ignore LDT descriptors, since
784 they're handled differently. */
785 static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
786 const void *desc, int type)
788 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
799 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
802 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
812 * Version of write_gdt_entry for use at early boot-time needed to
813 * update an entry as simply as possible.
815 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
816 const void *desc, int type)
818 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
827 xmaddr_t maddr = virt_to_machine(&dt[entry]);
829 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
830 dt[entry] = *(struct desc_struct *)desc;
836 static void xen_load_sp0(unsigned long sp0)
838 struct multicall_space mcs;
840 mcs = xen_mc_entry(0);
841 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
842 xen_mc_issue(PARAVIRT_LAZY_CPU);
843 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
846 #ifdef CONFIG_X86_IOPL_IOPERM
847 static void xen_invalidate_io_bitmap(void)
849 struct physdev_set_iobitmap iobitmap = {
854 native_tss_invalidate_io_bitmap();
855 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
858 static void xen_update_io_bitmap(void)
860 struct physdev_set_iobitmap iobitmap;
861 struct tss_struct *tss = this_cpu_ptr(&cpu_tss_rw);
863 native_tss_update_io_bitmap();
865 iobitmap.bitmap = (uint8_t *)(&tss->x86_tss) +
866 tss->x86_tss.io_bitmap_base;
867 if (tss->x86_tss.io_bitmap_base == IO_BITMAP_OFFSET_INVALID)
868 iobitmap.nr_ports = 0;
870 iobitmap.nr_ports = IO_BITMAP_BITS;
872 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
876 static void xen_io_delay(void)
880 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
882 static unsigned long xen_read_cr0(void)
884 unsigned long cr0 = this_cpu_read(xen_cr0_value);
886 if (unlikely(cr0 == 0)) {
887 cr0 = native_read_cr0();
888 this_cpu_write(xen_cr0_value, cr0);
894 static void xen_write_cr0(unsigned long cr0)
896 struct multicall_space mcs;
898 this_cpu_write(xen_cr0_value, cr0);
900 /* Only pay attention to cr0.TS; everything else is
902 mcs = xen_mc_entry(0);
904 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
906 xen_mc_issue(PARAVIRT_LAZY_CPU);
909 static void xen_write_cr4(unsigned long cr4)
911 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
913 native_write_cr4(cr4);
916 static u64 xen_read_msr_safe(unsigned int msr, int *err)
920 if (pmu_msr_read(msr, &val, err))
923 val = native_read_msr_safe(msr, err);
925 case MSR_IA32_APICBASE:
926 val &= ~X2APIC_ENABLE;
932 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
941 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
942 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
943 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
946 base = ((u64)high << 32) | low;
947 if (HYPERVISOR_set_segment_base(which, base) != 0)
954 case MSR_SYSCALL_MASK:
955 case MSR_IA32_SYSENTER_CS:
956 case MSR_IA32_SYSENTER_ESP:
957 case MSR_IA32_SYSENTER_EIP:
958 /* Fast syscall setup is all done in hypercalls, so
959 these are all ignored. Stub them out here to stop
960 Xen console noise. */
964 if (!pmu_msr_write(msr, low, high, &ret))
965 ret = native_write_msr_safe(msr, low, high);
971 static u64 xen_read_msr(unsigned int msr)
974 * This will silently swallow a #GP from RDMSR. It may be worth
979 return xen_read_msr_safe(msr, &err);
982 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
985 * This will silently swallow a #GP from WRMSR. It may be worth
988 xen_write_msr_safe(msr, low, high);
991 /* This is called once we have the cpu_possible_mask */
992 void __init xen_setup_vcpu_info_placement(void)
996 for_each_possible_cpu(cpu) {
997 /* Set up direct vCPU id mapping for PV guests. */
998 per_cpu(xen_vcpu_id, cpu) = cpu;
1002 pv_ops.irq.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1003 pv_ops.irq.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1004 pv_ops.irq.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1005 pv_ops.mmu.read_cr2 = __PV_IS_CALLEE_SAVE(xen_read_cr2_direct);
1008 static const struct pv_info xen_info __initconst = {
1009 .extra_user_64bit_cs = FLAT_USER_CS64,
1013 static const typeof(pv_ops) xen_cpu_ops __initconst = {
1017 .set_debugreg = xen_set_debugreg,
1018 .get_debugreg = xen_get_debugreg,
1020 .read_cr0 = xen_read_cr0,
1021 .write_cr0 = xen_write_cr0,
1023 .write_cr4 = xen_write_cr4,
1025 .wbinvd = native_wbinvd,
1027 .read_msr = xen_read_msr,
1028 .write_msr = xen_write_msr,
1030 .read_msr_safe = xen_read_msr_safe,
1031 .write_msr_safe = xen_write_msr_safe,
1033 .read_pmc = xen_read_pmc,
1035 .load_tr_desc = paravirt_nop,
1036 .set_ldt = xen_set_ldt,
1037 .load_gdt = xen_load_gdt,
1038 .load_idt = xen_load_idt,
1039 .load_tls = xen_load_tls,
1040 .load_gs_index = xen_load_gs_index,
1042 .alloc_ldt = xen_alloc_ldt,
1043 .free_ldt = xen_free_ldt,
1045 .store_tr = xen_store_tr,
1047 .write_ldt_entry = xen_write_ldt_entry,
1048 .write_gdt_entry = xen_write_gdt_entry,
1049 .write_idt_entry = xen_write_idt_entry,
1050 .load_sp0 = xen_load_sp0,
1052 #ifdef CONFIG_X86_IOPL_IOPERM
1053 .invalidate_io_bitmap = xen_invalidate_io_bitmap,
1054 .update_io_bitmap = xen_update_io_bitmap,
1056 .io_delay = xen_io_delay,
1058 .start_context_switch = paravirt_start_context_switch,
1059 .end_context_switch = xen_end_context_switch,
1063 static void xen_restart(char *msg)
1065 xen_reboot(SHUTDOWN_reboot);
1068 static void xen_machine_halt(void)
1070 xen_reboot(SHUTDOWN_poweroff);
1073 static void xen_machine_power_off(void)
1075 do_kernel_power_off();
1076 xen_reboot(SHUTDOWN_poweroff);
1079 static void xen_crash_shutdown(struct pt_regs *regs)
1081 xen_reboot(SHUTDOWN_crash);
1084 static const struct machine_ops xen_machine_ops __initconst = {
1085 .restart = xen_restart,
1086 .halt = xen_machine_halt,
1087 .power_off = xen_machine_power_off,
1088 .shutdown = xen_machine_halt,
1089 .crash_shutdown = xen_crash_shutdown,
1090 .emergency_restart = xen_emergency_restart,
1093 static unsigned char xen_get_nmi_reason(void)
1095 unsigned char reason = 0;
1097 /* Construct a value which looks like it came from port 0x61. */
1098 if (test_bit(_XEN_NMIREASON_io_error,
1099 &HYPERVISOR_shared_info->arch.nmi_reason))
1100 reason |= NMI_REASON_IOCHK;
1101 if (test_bit(_XEN_NMIREASON_pci_serr,
1102 &HYPERVISOR_shared_info->arch.nmi_reason))
1103 reason |= NMI_REASON_SERR;
1108 static void __init xen_boot_params_init_edd(void)
1110 #if IS_ENABLED(CONFIG_EDD)
1111 struct xen_platform_op op;
1112 struct edd_info *edd_info;
1117 edd_info = boot_params.eddbuf;
1118 mbr_signature = boot_params.edd_mbr_sig_buffer;
1120 op.cmd = XENPF_firmware_info;
1122 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1123 for (nr = 0; nr < EDDMAXNR; nr++) {
1124 struct edd_info *info = edd_info + nr;
1126 op.u.firmware_info.index = nr;
1127 info->params.length = sizeof(info->params);
1128 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1130 ret = HYPERVISOR_platform_op(&op);
1134 #define C(x) info->x = op.u.firmware_info.u.disk_info.x
1137 C(interface_support);
1138 C(legacy_max_cylinder);
1140 C(legacy_sectors_per_track);
1143 boot_params.eddbuf_entries = nr;
1145 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1146 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1147 op.u.firmware_info.index = nr;
1148 ret = HYPERVISOR_platform_op(&op);
1151 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1153 boot_params.edd_mbr_sig_buf_entries = nr;
1158 * Set up the GDT and segment registers for -fstack-protector. Until
1159 * we do this, we have to be careful not to call any stack-protected
1160 * function, which is most of the kernel.
1162 static void __init xen_setup_gdt(int cpu)
1164 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry_boot;
1165 pv_ops.cpu.load_gdt = xen_load_gdt_boot;
1167 switch_to_new_gdt(cpu);
1169 pv_ops.cpu.write_gdt_entry = xen_write_gdt_entry;
1170 pv_ops.cpu.load_gdt = xen_load_gdt;
1173 static void __init xen_dom0_set_legacy_features(void)
1175 x86_platform.legacy.rtc = 1;
1178 static void __init xen_domu_set_legacy_features(void)
1180 x86_platform.legacy.rtc = 0;
1183 extern void early_xen_iret_patch(void);
1185 /* First C function to be called on Xen boot */
1186 asmlinkage __visible void __init xen_start_kernel(struct start_info *si)
1188 struct physdev_set_iopl set_iopl;
1189 unsigned long initrd_start = 0;
1197 xen_start_info = si;
1199 __text_gen_insn(&early_xen_iret_patch,
1200 JMP32_INSN_OPCODE, &early_xen_iret_patch, &xen_iret,
1203 xen_domain_type = XEN_PV_DOMAIN;
1204 xen_start_flags = xen_start_info->flags;
1206 xen_setup_features();
1208 /* Install Xen paravirt ops */
1210 pv_ops.cpu = xen_cpu_ops.cpu;
1214 * Setup xen_vcpu early because it is needed for
1215 * local_irq_disable(), irqs_disabled(), e.g. in printk().
1217 * Don't do the full vcpu_info placement stuff until we have
1218 * the cpu_possible_mask and a non-dummy shared_info.
1220 xen_vcpu_info_reset(0);
1222 x86_platform.get_nmi_reason = xen_get_nmi_reason;
1224 x86_init.resources.memory_setup = xen_memory_setup;
1225 x86_init.irqs.intr_mode_select = x86_init_noop;
1226 x86_init.irqs.intr_mode_init = x86_init_noop;
1227 x86_init.oem.arch_setup = xen_arch_setup;
1228 x86_init.oem.banner = xen_banner;
1229 x86_init.hyper.init_platform = xen_pv_init_platform;
1230 x86_init.hyper.guest_late_init = xen_pv_guest_late_init;
1233 * Set up some pagetable state before starting to set any ptes.
1236 xen_setup_machphys_mapping();
1239 /* Prevent unwanted bits from being set in PTEs. */
1240 __supported_pte_mask &= ~_PAGE_GLOBAL;
1241 __default_kernel_pte_mask &= ~_PAGE_GLOBAL;
1244 xen_build_dynamic_phys_to_machine();
1246 /* Work out if we support NX */
1247 get_cpu_cap(&boot_cpu_data);
1251 * Set up kernel GDT and segment registers, mainly so that
1252 * -fstack-protector code can be executed.
1256 /* Determine virtual and physical address sizes */
1257 get_cpu_address_sizes(&boot_cpu_data);
1259 /* Let's presume PV guests always boot on vCPU with id 0. */
1260 per_cpu(xen_vcpu_id, 0) = 0;
1262 idt_setup_early_handler();
1264 xen_init_capabilities();
1266 #ifdef CONFIG_X86_LOCAL_APIC
1268 * set up the basic apic ops.
1273 machine_ops = xen_machine_ops;
1276 * The only reliable way to retain the initial address of the
1277 * percpu gdt_page is to remember it here, so we can go and
1278 * mark it RW later, when the initial percpu area is freed.
1280 xen_initial_gdt = &per_cpu(gdt_page, 0);
1284 #ifdef CONFIG_ACPI_NUMA
1286 * The pages we from Xen are not related to machine pages, so
1287 * any NUMA information the kernel tries to get from ACPI will
1288 * be meaningless. Prevent it from trying.
1292 WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv));
1294 local_irq_disable();
1295 early_boot_irqs_disabled = true;
1297 xen_raw_console_write("mapping kernel into physical memory\n");
1298 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1299 xen_start_info->nr_pages);
1300 xen_reserve_special_pages();
1303 * We used to do this in xen_arch_setup, but that is too late
1304 * on AMD were early_cpu_init (run before ->arch_setup()) calls
1305 * early_amd_init which pokes 0xcf8 port.
1308 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1310 xen_raw_printk("physdev_op failed %d\n", rc);
1313 if (xen_start_info->mod_start) {
1314 if (xen_start_info->flags & SIF_MOD_START_PFN)
1315 initrd_start = PFN_PHYS(xen_start_info->mod_start);
1317 initrd_start = __pa(xen_start_info->mod_start);
1320 /* Poke various useful things into boot_params */
1321 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1322 boot_params.hdr.ramdisk_image = initrd_start;
1323 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1324 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1325 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
1327 if (!xen_initial_domain()) {
1329 x86_init.pci.arch_init = pci_xen_init;
1330 x86_platform.set_legacy_features =
1331 xen_domu_set_legacy_features;
1333 const struct dom0_vga_console_info *info =
1334 (void *)((char *)xen_start_info +
1335 xen_start_info->console.dom0.info_off);
1336 struct xen_platform_op op = {
1337 .cmd = XENPF_firmware_info,
1338 .interface_version = XENPF_INTERFACE_VERSION,
1339 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1342 x86_platform.set_legacy_features =
1343 xen_dom0_set_legacy_features;
1344 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1345 xen_start_info->console.domU.mfn = 0;
1346 xen_start_info->console.domU.evtchn = 0;
1348 if (HYPERVISOR_platform_op(&op) == 0)
1349 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1351 /* Make sure ACS will be enabled */
1354 xen_acpi_sleep_register();
1356 xen_boot_params_init_edd();
1360 * Disable selecting "Firmware First mode" for correctable
1361 * memory errors, as this is the duty of the hypervisor to
1364 acpi_disable_cmcff = 1;
1368 xen_add_preferred_consoles();
1371 /* PCI BIOS service won't work from a PV guest. */
1372 pci_probe &= ~PCI_PROBE_BIOS;
1374 xen_raw_console_write("about to get started...\n");
1376 /* We need this for printk timestamps */
1377 xen_setup_runstate_info(0);
1379 xen_efi_init(&boot_params);
1381 /* Start the world */
1382 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1383 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1386 static int xen_cpu_up_prepare_pv(unsigned int cpu)
1390 if (per_cpu(xen_vcpu, cpu) == NULL)
1393 xen_setup_timer(cpu);
1395 rc = xen_smp_intr_init(cpu);
1397 WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n",
1402 rc = xen_smp_intr_init_pv(cpu);
1404 WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n",
1412 static int xen_cpu_dead_pv(unsigned int cpu)
1414 xen_smp_intr_free(cpu);
1415 xen_smp_intr_free_pv(cpu);
1417 xen_teardown_timer(cpu);
1422 static uint32_t __init xen_platform_pv(void)
1424 if (xen_pv_domain())
1425 return xen_cpuid_base();
1430 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = {
1432 .detect = xen_platform_pv,
1433 .type = X86_HYPER_XEN_PV,
1434 .runtime.pin_vcpu = xen_pin_vcpu,
1435 .ignore_nopv = true,