1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_X86_H
3 #define ARCH_X86_KVM_X86_H
5 #include <linux/kvm_host.h>
7 #include <asm/pvclock.h>
8 #include "kvm_cache_regs.h"
9 #include "kvm_emulate.h"
12 /* control of guest tsc rate supported? */
14 /* maximum supported tsc_khz for guests */
15 u32 max_guest_tsc_khz;
16 /* number of bits of the fractional part of the TSC scaling ratio */
17 u8 tsc_scaling_ratio_frac_bits;
18 /* maximum allowed value of TSC scaling ratio */
19 u64 max_tsc_scaling_ratio;
20 /* 1ull << kvm_caps.tsc_scaling_ratio_frac_bits */
21 u64 default_tsc_scaling_ratio;
22 /* bus lock detection supported? */
23 bool has_bus_lock_exit;
24 /* notify VM exit supported? */
25 bool has_notify_vmexit;
27 u64 supported_mce_cap;
30 u64 supported_perf_cap;
33 void kvm_spurious_fault(void);
35 #define KVM_NESTED_VMENTER_CONSISTENCY_CHECK(consistency_check) \
37 bool failed = (consistency_check); \
39 trace_kvm_nested_vmenter_failed(#consistency_check, 0); \
43 #define KVM_DEFAULT_PLE_GAP 128
44 #define KVM_VMX_DEFAULT_PLE_WINDOW 4096
45 #define KVM_DEFAULT_PLE_WINDOW_GROW 2
46 #define KVM_DEFAULT_PLE_WINDOW_SHRINK 0
47 #define KVM_VMX_DEFAULT_PLE_WINDOW_MAX UINT_MAX
48 #define KVM_SVM_DEFAULT_PLE_WINDOW_MAX USHRT_MAX
49 #define KVM_SVM_DEFAULT_PLE_WINDOW 3000
51 static inline unsigned int __grow_ple_window(unsigned int val,
52 unsigned int base, unsigned int modifier, unsigned int max)
64 return min(ret, (u64)max);
67 static inline unsigned int __shrink_ple_window(unsigned int val,
68 unsigned int base, unsigned int modifier, unsigned int min)
81 #define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL
83 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu);
84 int kvm_check_nested_events(struct kvm_vcpu *vcpu);
86 static inline bool kvm_is_exception_pending(struct kvm_vcpu *vcpu)
88 return vcpu->arch.exception.pending ||
89 vcpu->arch.exception_vmexit.pending ||
90 kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu);
93 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
95 vcpu->arch.exception.pending = false;
96 vcpu->arch.exception.injected = false;
97 vcpu->arch.exception_vmexit.pending = false;
100 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
103 vcpu->arch.interrupt.injected = true;
104 vcpu->arch.interrupt.soft = soft;
105 vcpu->arch.interrupt.nr = vector;
108 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
110 vcpu->arch.interrupt.injected = false;
113 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
115 return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected ||
116 vcpu->arch.nmi_injected;
119 static inline bool kvm_exception_is_soft(unsigned int nr)
121 return (nr == BP_VECTOR) || (nr == OF_VECTOR);
124 static inline bool is_protmode(struct kvm_vcpu *vcpu)
126 return kvm_read_cr0_bits(vcpu, X86_CR0_PE);
129 static inline int is_long_mode(struct kvm_vcpu *vcpu)
132 return vcpu->arch.efer & EFER_LMA;
138 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu)
142 WARN_ON_ONCE(vcpu->arch.guest_state_protected);
144 if (!is_long_mode(vcpu))
146 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
150 static inline bool is_64_bit_hypercall(struct kvm_vcpu *vcpu)
153 * If running with protected guest state, the CS register is not
154 * accessible. The hypercall register values will have had to been
155 * provided in 64-bit mode, so assume the guest is in 64-bit.
157 return vcpu->arch.guest_state_protected || is_64_bit_mode(vcpu);
160 static inline bool x86_exception_has_error_code(unsigned int vector)
162 static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) |
163 BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) |
164 BIT(PF_VECTOR) | BIT(AC_VECTOR);
166 return (1U << vector) & exception_has_error_code;
169 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
171 return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;
174 static inline int is_pae(struct kvm_vcpu *vcpu)
176 return kvm_read_cr4_bits(vcpu, X86_CR4_PAE);
179 static inline int is_pse(struct kvm_vcpu *vcpu)
181 return kvm_read_cr4_bits(vcpu, X86_CR4_PSE);
184 static inline int is_paging(struct kvm_vcpu *vcpu)
186 return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));
189 static inline bool is_pae_paging(struct kvm_vcpu *vcpu)
191 return !is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu);
194 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu)
196 return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48;
199 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu)
201 return !__is_canonical_address(la, vcpu_virt_addr_bits(vcpu));
204 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu,
205 gva_t gva, gfn_t gfn, unsigned access)
207 u64 gen = kvm_memslots(vcpu->kvm)->generation;
209 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
213 * If this is a shadow nested page table, the "GVA" is
216 vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK;
217 vcpu->arch.mmio_access = access;
218 vcpu->arch.mmio_gfn = gfn;
219 vcpu->arch.mmio_gen = gen;
222 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu)
224 return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation;
228 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we
229 * clear all mmio cache info.
231 #define MMIO_GVA_ANY (~(gva_t)0)
233 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva)
235 if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK))
238 vcpu->arch.mmio_gva = 0;
241 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva)
243 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva &&
244 vcpu->arch.mmio_gva == (gva & PAGE_MASK))
250 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
252 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn &&
253 vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT)
259 static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu, int reg)
261 unsigned long val = kvm_register_read_raw(vcpu, reg);
263 return is_64_bit_mode(vcpu) ? val : (u32)val;
266 static inline void kvm_register_write(struct kvm_vcpu *vcpu,
267 int reg, unsigned long val)
269 if (!is_64_bit_mode(vcpu))
271 return kvm_register_write_raw(vcpu, reg, val);
274 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
276 return !(kvm->arch.disabled_quirks & quirk);
279 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
281 u64 get_kvmclock_ns(struct kvm *kvm);
283 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
284 gva_t addr, void *val, unsigned int bytes,
285 struct x86_exception *exception);
287 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu,
288 gva_t addr, void *val, unsigned int bytes,
289 struct x86_exception *exception);
291 int handle_ud(struct kvm_vcpu *vcpu);
293 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu,
294 struct kvm_queued_exception *ex);
296 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
297 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
298 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);
299 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
300 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
301 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
303 bool kvm_vector_hashing_enabled(void);
304 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code);
305 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
306 void *insn, int insn_len);
307 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
308 int emulation_type, void *insn, int insn_len);
309 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu);
311 extern u64 host_xcr0;
314 extern struct kvm_caps kvm_caps;
316 extern bool enable_pmu;
318 static inline bool kvm_mpx_supported(void)
320 return (kvm_caps.supported_xcr0 & (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR))
321 == (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR);
324 extern unsigned int min_timer_period_us;
326 extern bool enable_vmware_backdoor;
328 extern int pi_inject_timer;
330 extern bool report_ignored_msrs;
332 extern bool eager_page_split;
334 static inline void kvm_pr_unimpl_wrmsr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
336 if (report_ignored_msrs)
337 vcpu_unimpl(vcpu, "Unhandled WRMSR(0x%x) = 0x%llx\n", msr, data);
340 static inline void kvm_pr_unimpl_rdmsr(struct kvm_vcpu *vcpu, u32 msr)
342 if (report_ignored_msrs)
343 vcpu_unimpl(vcpu, "Unhandled RDMSR(0x%x)\n", msr);
346 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
348 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
349 vcpu->arch.virtual_tsc_shift);
352 /* Same "calling convention" as do_div:
353 * - divide (n << 32) by base
357 #define do_shl32_div32(n, base) \
360 asm("divl %2" : "=a" (__quot), "=d" (__rem) \
361 : "rm" (base), "0" (0), "1" ((u32) n)); \
366 static inline bool kvm_mwait_in_guest(struct kvm *kvm)
368 return kvm->arch.mwait_in_guest;
371 static inline bool kvm_hlt_in_guest(struct kvm *kvm)
373 return kvm->arch.hlt_in_guest;
376 static inline bool kvm_pause_in_guest(struct kvm *kvm)
378 return kvm->arch.pause_in_guest;
381 static inline bool kvm_cstate_in_guest(struct kvm *kvm)
383 return kvm->arch.cstate_in_guest;
386 static inline bool kvm_notify_vmexit_enabled(struct kvm *kvm)
388 return kvm->arch.notify_vmexit_flags & KVM_X86_NOTIFY_VMEXIT_ENABLED;
392 /* Values are arbitrary, but must be non-zero. */
393 KVM_HANDLING_IRQ = 1,
397 static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu,
398 enum kvm_intr_type intr)
400 WRITE_ONCE(vcpu->arch.handling_intr_from_guest, (u8)intr);
403 static inline void kvm_after_interrupt(struct kvm_vcpu *vcpu)
405 WRITE_ONCE(vcpu->arch.handling_intr_from_guest, 0);
408 static inline bool kvm_handling_nmi_from_guest(struct kvm_vcpu *vcpu)
410 return vcpu->arch.handling_intr_from_guest == KVM_HANDLING_NMI;
413 static inline bool kvm_pat_valid(u64 data)
415 if (data & 0xF8F8F8F8F8F8F8F8ull)
417 /* 0, 1, 4, 5, 6, 7 are valid values. */
418 return (data | ((data & 0x0202020202020202ull) << 1)) == data;
421 static inline bool kvm_dr7_valid(u64 data)
423 /* Bits [63:32] are reserved */
424 return !(data >> 32);
426 static inline bool kvm_dr6_valid(u64 data)
428 /* Bits [63:32] are reserved */
429 return !(data >> 32);
433 * Trigger machine check on the host. We assume all the MSRs are already set up
434 * by the CPU and that we still run on the same CPU as the MCE occurred on.
435 * We pass a fake environment to the machine check handler because we want
436 * the guest to be always treated like user space, no matter what context
437 * it used internally.
439 static inline void kvm_machine_check(void)
441 #if defined(CONFIG_X86_MCE)
442 struct pt_regs regs = {
443 .cs = 3, /* Fake ring 3 no matter what the guest ran on */
444 .flags = X86_EFLAGS_IF,
447 do_machine_check(®s);
451 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu);
452 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu);
453 int kvm_spec_ctrl_test_value(u64 value);
454 bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
455 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
456 struct x86_exception *e);
457 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva);
458 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type);
461 * Internal error codes that are used to indicate that MSR emulation encountered
462 * an error that should result in #GP in the guest, unless userspace
465 #define KVM_MSR_RET_INVALID 2 /* in-kernel MSR emulation #GP condition */
466 #define KVM_MSR_RET_FILTERED 3 /* #GP due to userspace MSR filter */
468 #define __cr4_reserved_bits(__cpu_has, __c) \
470 u64 __reserved_bits = CR4_RESERVED_BITS; \
472 if (!__cpu_has(__c, X86_FEATURE_XSAVE)) \
473 __reserved_bits |= X86_CR4_OSXSAVE; \
474 if (!__cpu_has(__c, X86_FEATURE_SMEP)) \
475 __reserved_bits |= X86_CR4_SMEP; \
476 if (!__cpu_has(__c, X86_FEATURE_SMAP)) \
477 __reserved_bits |= X86_CR4_SMAP; \
478 if (!__cpu_has(__c, X86_FEATURE_FSGSBASE)) \
479 __reserved_bits |= X86_CR4_FSGSBASE; \
480 if (!__cpu_has(__c, X86_FEATURE_PKU)) \
481 __reserved_bits |= X86_CR4_PKE; \
482 if (!__cpu_has(__c, X86_FEATURE_LA57)) \
483 __reserved_bits |= X86_CR4_LA57; \
484 if (!__cpu_has(__c, X86_FEATURE_UMIP)) \
485 __reserved_bits |= X86_CR4_UMIP; \
486 if (!__cpu_has(__c, X86_FEATURE_VMX)) \
487 __reserved_bits |= X86_CR4_VMXE; \
488 if (!__cpu_has(__c, X86_FEATURE_PCID)) \
489 __reserved_bits |= X86_CR4_PCIDE; \
493 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes,
495 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t src, unsigned int bytes,
497 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
498 unsigned int port, void *data, unsigned int count,