1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_X86_H
3 #define ARCH_X86_KVM_X86_H
5 #include <linux/kvm_host.h>
6 #include <asm/pvclock.h>
7 #include "kvm_cache_regs.h"
9 #define KVM_DEFAULT_PLE_GAP 128
10 #define KVM_VMX_DEFAULT_PLE_WINDOW 4096
11 #define KVM_DEFAULT_PLE_WINDOW_GROW 2
12 #define KVM_DEFAULT_PLE_WINDOW_SHRINK 0
13 #define KVM_VMX_DEFAULT_PLE_WINDOW_MAX UINT_MAX
14 #define KVM_SVM_DEFAULT_PLE_WINDOW_MAX USHRT_MAX
15 #define KVM_SVM_DEFAULT_PLE_WINDOW 3000
17 static inline unsigned int __grow_ple_window(unsigned int val,
18 unsigned int base, unsigned int modifier, unsigned int max)
30 return min(ret, (u64)max);
33 static inline unsigned int __shrink_ple_window(unsigned int val,
34 unsigned int base, unsigned int modifier, unsigned int min)
47 #define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL
49 static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
51 vcpu->arch.exception.pending = false;
52 vcpu->arch.exception.injected = false;
55 static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
58 vcpu->arch.interrupt.injected = true;
59 vcpu->arch.interrupt.soft = soft;
60 vcpu->arch.interrupt.nr = vector;
63 static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
65 vcpu->arch.interrupt.injected = false;
68 static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
70 return vcpu->arch.exception.injected || vcpu->arch.interrupt.injected ||
71 vcpu->arch.nmi_injected;
74 static inline bool kvm_exception_is_soft(unsigned int nr)
76 return (nr == BP_VECTOR) || (nr == OF_VECTOR);
79 static inline bool is_protmode(struct kvm_vcpu *vcpu)
81 return kvm_read_cr0_bits(vcpu, X86_CR0_PE);
84 static inline int is_long_mode(struct kvm_vcpu *vcpu)
87 return vcpu->arch.efer & EFER_LMA;
93 static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu)
97 if (!is_long_mode(vcpu))
99 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
103 static inline bool is_la57_mode(struct kvm_vcpu *vcpu)
106 return (vcpu->arch.efer & EFER_LMA) &&
107 kvm_read_cr4_bits(vcpu, X86_CR4_LA57);
113 static inline bool x86_exception_has_error_code(unsigned int vector)
115 static u32 exception_has_error_code = BIT(DF_VECTOR) | BIT(TS_VECTOR) |
116 BIT(NP_VECTOR) | BIT(SS_VECTOR) | BIT(GP_VECTOR) |
117 BIT(PF_VECTOR) | BIT(AC_VECTOR);
119 return (1U << vector) & exception_has_error_code;
122 static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
124 return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;
127 static inline int is_pae(struct kvm_vcpu *vcpu)
129 return kvm_read_cr4_bits(vcpu, X86_CR4_PAE);
132 static inline int is_pse(struct kvm_vcpu *vcpu)
134 return kvm_read_cr4_bits(vcpu, X86_CR4_PSE);
137 static inline int is_paging(struct kvm_vcpu *vcpu)
139 return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));
142 static inline u32 bit(int bitno)
144 return 1 << (bitno & 31);
147 static inline u8 vcpu_virt_addr_bits(struct kvm_vcpu *vcpu)
149 return kvm_read_cr4_bits(vcpu, X86_CR4_LA57) ? 57 : 48;
152 static inline u8 ctxt_virt_addr_bits(struct x86_emulate_ctxt *ctxt)
154 return (ctxt->ops->get_cr(ctxt, 4) & X86_CR4_LA57) ? 57 : 48;
157 static inline u64 get_canonical(u64 la, u8 vaddr_bits)
159 return ((int64_t)la << (64 - vaddr_bits)) >> (64 - vaddr_bits);
162 static inline bool is_noncanonical_address(u64 la, struct kvm_vcpu *vcpu)
165 return get_canonical(la, vcpu_virt_addr_bits(vcpu)) != la;
171 static inline bool emul_is_noncanonical_address(u64 la,
172 struct x86_emulate_ctxt *ctxt)
175 return get_canonical(la, ctxt_virt_addr_bits(ctxt)) != la;
181 static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu,
182 gva_t gva, gfn_t gfn, unsigned access)
184 u64 gen = kvm_memslots(vcpu->kvm)->generation;
186 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
190 * If this is a shadow nested page table, the "GVA" is
193 vcpu->arch.mmio_gva = mmu_is_nested(vcpu) ? 0 : gva & PAGE_MASK;
194 vcpu->arch.access = access;
195 vcpu->arch.mmio_gfn = gfn;
196 vcpu->arch.mmio_gen = gen;
199 static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu)
201 return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation;
205 * Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we
206 * clear all mmio cache info.
208 #define MMIO_GVA_ANY (~(gva_t)0)
210 static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva)
212 if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK))
215 vcpu->arch.mmio_gva = 0;
218 static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva)
220 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva &&
221 vcpu->arch.mmio_gva == (gva & PAGE_MASK))
227 static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
229 if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn &&
230 vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT)
236 static inline unsigned long kvm_register_readl(struct kvm_vcpu *vcpu,
239 unsigned long val = kvm_register_read(vcpu, reg);
241 return is_64_bit_mode(vcpu) ? val : (u32)val;
244 static inline void kvm_register_writel(struct kvm_vcpu *vcpu,
248 if (!is_64_bit_mode(vcpu))
250 return kvm_register_write(vcpu, reg, val);
253 static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
255 return !(kvm->arch.disabled_quirks & quirk);
258 void kvm_set_pending_timer(struct kvm_vcpu *vcpu);
259 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
261 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr);
262 u64 get_kvmclock_ns(struct kvm *kvm);
264 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
265 gva_t addr, void *val, unsigned int bytes,
266 struct x86_exception *exception);
268 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu,
269 gva_t addr, void *val, unsigned int bytes,
270 struct x86_exception *exception);
272 int handle_ud(struct kvm_vcpu *vcpu);
274 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu);
276 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
277 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
278 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);
279 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
280 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
281 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
283 bool kvm_vector_hashing_enabled(void);
284 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
285 int emulation_type, void *insn, int insn_len);
287 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
288 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
289 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
290 | XFEATURE_MASK_PKRU)
291 extern u64 host_xcr0;
293 extern u64 kvm_supported_xcr0(void);
295 extern unsigned int min_timer_period_us;
297 extern unsigned int lapic_timer_advance_ns;
299 extern bool enable_vmware_backdoor;
301 extern struct static_key kvm_no_apic_vcpu;
303 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
305 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
306 vcpu->arch.virtual_tsc_shift);
309 /* Same "calling convention" as do_div:
310 * - divide (n << 32) by base
314 #define do_shl32_div32(n, base) \
317 asm("divl %2" : "=a" (__quot), "=d" (__rem) \
318 : "rm" (base), "0" (0), "1" ((u32) n)); \
323 static inline bool kvm_mwait_in_guest(struct kvm *kvm)
325 return kvm->arch.mwait_in_guest;
328 static inline bool kvm_hlt_in_guest(struct kvm *kvm)
330 return kvm->arch.hlt_in_guest;
333 static inline bool kvm_pause_in_guest(struct kvm *kvm)
335 return kvm->arch.pause_in_guest;
338 DECLARE_PER_CPU(struct kvm_vcpu *, current_vcpu);
340 static inline void kvm_before_interrupt(struct kvm_vcpu *vcpu)
342 __this_cpu_write(current_vcpu, vcpu);
345 static inline void kvm_after_interrupt(struct kvm_vcpu *vcpu)
347 __this_cpu_write(current_vcpu, NULL);