arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61
  62 #include <trace/events/kvm.h>
  63
  64 #include <asm/debugreg.h>
  65 #include <asm/msr.h>
  66 #include <asm/desc.h>
  67 #include <asm/mce.h>
  68 #include <linux/kernel_stat.h>
  69 #include <asm/fpu/internal.h> /* Ugh! */
  70 #include <asm/pvclock.h>
  71 #include <asm/div64.h>
  72 #include <asm/irq_remapping.h>
  73 #include <asm/mshyperv.h>
  74 #include <asm/hypervisor.h>
  75 #include <asm/tlbflush.h>
  76 #include <asm/intel_pt.h>
  77 #include <asm/emulate_prefix.h>
  78 #include <asm/sgx.h>
  79 #include <clocksource/hyperv_timer.h>
  80
  81 #define CREATE_TRACE_POINTS
  82 #include "trace.h"
  83
  84 #define MAX_IO_MSRS 256
  85 #define KVM_MAX_MCE_BANKS 32
  86 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  87 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  88
  89 #define emul_to_vcpu(ctxt) \
  90         ((struct kvm_vcpu *)(ctxt)->vcpu)
  91
  92 /* EFER defaults:
  93  * - enable syscall per default because its emulated by KVM
  94  * - enable LME and LMA per default on 64 bit KVM
  95  */
  96 #ifdef CONFIG_X86_64
  97 static
  98 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  99 #else
 100 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 101 #endif
 102
 103 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 104
 105 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 106                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 107
 108 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 109 static void process_nmi(struct kvm_vcpu *vcpu);
 110 static void process_smi(struct kvm_vcpu *vcpu);
 111 static void enter_smm(struct kvm_vcpu *vcpu);
 112 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 113 static void store_regs(struct kvm_vcpu *vcpu);
 114 static int sync_regs(struct kvm_vcpu *vcpu);
 115
 116 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 117 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 118
 119 #define KVM_X86_OP(func)                                             \
 120         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 121                                 *(((struct kvm_x86_ops *)0)->func));
 122 #define KVM_X86_OP_NULL KVM_X86_OP
 123 #include <asm/kvm-x86-ops.h>
 124 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 125 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 126 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 127
 128 static bool __read_mostly ignore_msrs = 0;
 129 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 130
 131 bool __read_mostly report_ignored_msrs = true;
 132 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 133 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 134
 135 unsigned int min_timer_period_us = 200;
 136 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 137
 138 static bool __read_mostly kvmclock_periodic_sync = true;
 139 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 140
 141 bool __read_mostly kvm_has_tsc_control;
 142 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 143 u32  __read_mostly kvm_max_guest_tsc_khz;
 144 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 145 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 146 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 147 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 148 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 149 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 150 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 151 bool __read_mostly kvm_has_bus_lock_exit;
 152 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 153
 154 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 155 static u32 __read_mostly tsc_tolerance_ppm = 250;
 156 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 157
 158 /*
 159  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 160  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 161  * advancement entirely.  Any other value is used as-is and disables adaptive
 162  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 163  */
 164 static int __read_mostly lapic_timer_advance_ns = -1;
 165 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 166
 167 static bool __read_mostly vector_hashing = true;
 168 module_param(vector_hashing, bool, S_IRUGO);
 169
 170 bool __read_mostly enable_vmware_backdoor = false;
 171 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 172 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 173
 174 static bool __read_mostly force_emulation_prefix = false;
 175 module_param(force_emulation_prefix, bool, S_IRUGO);
 176
 177 int __read_mostly pi_inject_timer = -1;
 178 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 179
 180 /*
 181  * Restoring the host value for MSRs that are only consumed when running in
 182  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 183  * returns to userspace, i.e. the kernel can run with the guest's value.
 184  */
 185 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 186
 187 struct kvm_user_return_msrs_global {
 188         int nr;
 189         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 190 };
 191
 192 struct kvm_user_return_msrs {
 193         struct user_return_notifier urn;
 194         bool registered;
 195         struct kvm_user_return_msr_values {
 196                 u64 host;
 197                 u64 curr;
 198         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 199 };
 200
 201 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 202 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 203
 204 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 205                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 206                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 207                                 | XFEATURE_MASK_PKRU)
 208
 209 u64 __read_mostly host_efer;
 210 EXPORT_SYMBOL_GPL(host_efer);
 211
 212 bool __read_mostly allow_smaller_maxphyaddr = 0;
 213 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 214
 215 u64 __read_mostly host_xss;
 216 EXPORT_SYMBOL_GPL(host_xss);
 217 u64 __read_mostly supported_xss;
 218 EXPORT_SYMBOL_GPL(supported_xss);
 219
 220 struct kvm_stats_debugfs_item debugfs_entries[] = {
 221         VCPU_STAT("pf_fixed", pf_fixed),
 222         VCPU_STAT("pf_guest", pf_guest),
 223         VCPU_STAT("tlb_flush", tlb_flush),
 224         VCPU_STAT("invlpg", invlpg),
 225         VCPU_STAT("exits", exits),
 226         VCPU_STAT("io_exits", io_exits),
 227         VCPU_STAT("mmio_exits", mmio_exits),
 228         VCPU_STAT("signal_exits", signal_exits),
 229         VCPU_STAT("irq_window", irq_window_exits),
 230         VCPU_STAT("nmi_window", nmi_window_exits),
 231         VCPU_STAT("halt_exits", halt_exits),
 232         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 233         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 234         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 235         VCPU_STAT("halt_wakeup", halt_wakeup),
 236         VCPU_STAT("hypercalls", hypercalls),
 237         VCPU_STAT("request_irq", request_irq_exits),
 238         VCPU_STAT("irq_exits", irq_exits),
 239         VCPU_STAT("host_state_reload", host_state_reload),
 240         VCPU_STAT("fpu_reload", fpu_reload),
 241         VCPU_STAT("insn_emulation", insn_emulation),
 242         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 243         VCPU_STAT("irq_injections", irq_injections),
 244         VCPU_STAT("nmi_injections", nmi_injections),
 245         VCPU_STAT("req_event", req_event),
 246         VCPU_STAT("l1d_flush", l1d_flush),
 247         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 248         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 249         VCPU_STAT("nested_run", nested_run),
 250         VCPU_STAT("directed_yield_attempted", directed_yield_attempted),
 251         VCPU_STAT("directed_yield_successful", directed_yield_successful),
 252         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 253         VM_STAT("mmu_pte_write", mmu_pte_write),
 254         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 255         VM_STAT("mmu_flooded", mmu_flooded),
 256         VM_STAT("mmu_recycled", mmu_recycled),
 257         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 258         VM_STAT("mmu_unsync", mmu_unsync),
 259         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 260         VM_STAT("largepages", lpages, .mode = 0444),
 261         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 262         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 263         { NULL }
 264 };
 265
 266 u64 __read_mostly host_xcr0;
 267 u64 __read_mostly supported_xcr0;
 268 EXPORT_SYMBOL_GPL(supported_xcr0);
 269
 270 static struct kmem_cache *x86_fpu_cache;
 271
 272 static struct kmem_cache *x86_emulator_cache;
 273
 274 /*
 275  * When called, it means the previous get/set msr reached an invalid msr.
 276  * Return true if we want to ignore/silent this failed msr access.
 277  */
 278 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 279 {
 280         const char *op = write ? "wrmsr" : "rdmsr";
 281
 282         if (ignore_msrs) {
 283                 if (report_ignored_msrs)
 284                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 285                                       op, msr, data);
 286                 /* Mask the error */
 287                 return true;
 288         } else {
 289                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 290                                       op, msr, data);
 291                 return false;
 292         }
 293 }
 294
 295 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 296 {
 297         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 298         unsigned int size = sizeof(struct x86_emulate_ctxt);
 299
 300         return kmem_cache_create_usercopy("x86_emulator", size,
 301                                           __alignof__(struct x86_emulate_ctxt),
 302                                           SLAB_ACCOUNT, useroffset,
 303                                           size - useroffset, NULL);
 304 }
 305
 306 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 307
 308 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 309 {
 310         int i;
 311         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 312                 vcpu->arch.apf.gfns[i] = ~0;
 313 }
 314
 315 static void kvm_on_user_return(struct user_return_notifier *urn)
 316 {
 317         unsigned slot;
 318         struct kvm_user_return_msrs *msrs
 319                 = container_of(urn, struct kvm_user_return_msrs, urn);
 320         struct kvm_user_return_msr_values *values;
 321         unsigned long flags;
 322
 323         /*
 324          * Disabling irqs at this point since the following code could be
 325          * interrupted and executed through kvm_arch_hardware_disable()
 326          */
 327         local_irq_save(flags);
 328         if (msrs->registered) {
 329                 msrs->registered = false;
 330                 user_return_notifier_unregister(urn);
 331         }
 332         local_irq_restore(flags);
 333         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 334                 values = &msrs->values[slot];
 335                 if (values->host != values->curr) {
 336                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 337                         values->curr = values->host;
 338                 }
 339         }
 340 }
 341
 342 int kvm_probe_user_return_msr(u32 msr)
 343 {
 344         u64 val;
 345         int ret;
 346
 347         preempt_disable();
 348         ret = rdmsrl_safe(msr, &val);
 349         if (ret)
 350                 goto out;
 351         ret = wrmsrl_safe(msr, val);
 352 out:
 353         preempt_enable();
 354         return ret;
 355 }
 356 EXPORT_SYMBOL_GPL(kvm_probe_user_return_msr);
 357
 358 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 359 {
 360         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 361         user_return_msrs_global.msrs[slot] = msr;
 362         if (slot >= user_return_msrs_global.nr)
 363                 user_return_msrs_global.nr = slot + 1;
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 366
 367 static void kvm_user_return_msr_cpu_online(void)
 368 {
 369         unsigned int cpu = smp_processor_id();
 370         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 371         u64 value;
 372         int i;
 373
 374         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 375                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 376                 msrs->values[i].host = value;
 377                 msrs->values[i].curr = value;
 378         }
 379 }
 380
 381 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 382 {
 383         unsigned int cpu = smp_processor_id();
 384         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 385         int err;
 386
 387         value = (value & mask) | (msrs->values[slot].host & ~mask);
 388         if (value == msrs->values[slot].curr)
 389                 return 0;
 390         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 391         if (err)
 392                 return 1;
 393
 394         msrs->values[slot].curr = value;
 395         if (!msrs->registered) {
 396                 msrs->urn.on_user_return = kvm_on_user_return;
 397                 user_return_notifier_register(&msrs->urn);
 398                 msrs->registered = true;
 399         }
 400         return 0;
 401 }
 402 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 403
 404 static void drop_user_return_notifiers(void)
 405 {
 406         unsigned int cpu = smp_processor_id();
 407         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 408
 409         if (msrs->registered)
 410                 kvm_on_user_return(&msrs->urn);
 411 }
 412
 413 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 414 {
 415         return vcpu->arch.apic_base;
 416 }
 417 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 418
 419 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 420 {
 421         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 422 }
 423 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 424
 425 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 426 {
 427         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 428         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 429         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 430                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 431
 432         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 433                 return 1;
 434         if (!msr_info->host_initiated) {
 435                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 436                         return 1;
 437                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 438                         return 1;
 439         }
 440
 441         kvm_lapic_set_base(vcpu, msr_info->data);
 442         kvm_recalculate_apic_map(vcpu->kvm);
 443         return 0;
 444 }
 445 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 446
 447 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 448 {
 449         /* Fault while not rebooting.  We want the trace. */
 450         BUG_ON(!kvm_rebooting);
 451 }
 452 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 453
 454 #define EXCPT_BENIGN            0
 455 #define EXCPT_CONTRIBUTORY      1
 456 #define EXCPT_PF                2
 457
 458 static int exception_class(int vector)
 459 {
 460         switch (vector) {
 461         case PF_VECTOR:
 462                 return EXCPT_PF;
 463         case DE_VECTOR:
 464         case TS_VECTOR:
 465         case NP_VECTOR:
 466         case SS_VECTOR:
 467         case GP_VECTOR:
 468                 return EXCPT_CONTRIBUTORY;
 469         default:
 470                 break;
 471         }
 472         return EXCPT_BENIGN;
 473 }
 474
 475 #define EXCPT_FAULT             0
 476 #define EXCPT_TRAP              1
 477 #define EXCPT_ABORT             2
 478 #define EXCPT_INTERRUPT         3
 479
 480 static int exception_type(int vector)
 481 {
 482         unsigned int mask;
 483
 484         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 485                 return EXCPT_INTERRUPT;
 486
 487         mask = 1 << vector;
 488
 489         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 490         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 491                 return EXCPT_TRAP;
 492
 493         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 494                 return EXCPT_ABORT;
 495
 496         /* Reserved exceptions will result in fault */
 497         return EXCPT_FAULT;
 498 }
 499
 500 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 501 {
 502         unsigned nr = vcpu->arch.exception.nr;
 503         bool has_payload = vcpu->arch.exception.has_payload;
 504         unsigned long payload = vcpu->arch.exception.payload;
 505
 506         if (!has_payload)
 507                 return;
 508
 509         switch (nr) {
 510         case DB_VECTOR:
 511                 /*
 512                  * "Certain debug exceptions may clear bit 0-3.  The
 513                  * remaining contents of the DR6 register are never
 514                  * cleared by the processor".
 515                  */
 516                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 517                 /*
 518                  * In order to reflect the #DB exception payload in guest
 519                  * dr6, three components need to be considered: active low
 520                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 521                  * DR6_BS and DR6_BT)
 522                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 523                  * In the target guest dr6:
 524                  * FIXED_1 bits should always be set.
 525                  * Active low bits should be cleared if 1-setting in payload.
 526                  * Active high bits should be set if 1-setting in payload.
 527                  *
 528                  * Note, the payload is compatible with the pending debug
 529                  * exceptions/exit qualification under VMX, that active_low bits
 530                  * are active high in payload.
 531                  * So they need to be flipped for DR6.
 532                  */
 533                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 534                 vcpu->arch.dr6 |= payload;
 535                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 536
 537                 /*
 538                  * The #DB payload is defined as compatible with the 'pending
 539                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 540                  * defined in the 'pending debug exceptions' field (enabled
 541                  * breakpoint), it is reserved and must be zero in DR6.
 542                  */
 543                 vcpu->arch.dr6 &= ~BIT(12);
 544                 break;
 545         case PF_VECTOR:
 546                 vcpu->arch.cr2 = payload;
 547                 break;
 548         }
 549
 550         vcpu->arch.exception.has_payload = false;
 551         vcpu->arch.exception.payload = 0;
 552 }
 553 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 554
 555 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 556                 unsigned nr, bool has_error, u32 error_code,
 557                 bool has_payload, unsigned long payload, bool reinject)
 558 {
 559         u32 prev_nr;
 560         int class1, class2;
 561
 562         kvm_make_request(KVM_REQ_EVENT, vcpu);
 563
 564         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 565         queue:
 566                 if (reinject) {
 567                         /*
 568                          * On vmentry, vcpu->arch.exception.pending is only
 569                          * true if an event injection was blocked by
 570                          * nested_run_pending.  In that case, however,
 571                          * vcpu_enter_guest requests an immediate exit,
 572                          * and the guest shouldn't proceed far enough to
 573                          * need reinjection.
 574                          */
 575                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 576                         vcpu->arch.exception.injected = true;
 577                         if (WARN_ON_ONCE(has_payload)) {
 578                                 /*
 579                                  * A reinjected event has already
 580                                  * delivered its payload.
 581                                  */
 582                                 has_payload = false;
 583                                 payload = 0;
 584                         }
 585                 } else {
 586                         vcpu->arch.exception.pending = true;
 587                         vcpu->arch.exception.injected = false;
 588                 }
 589                 vcpu->arch.exception.has_error_code = has_error;
 590                 vcpu->arch.exception.nr = nr;
 591                 vcpu->arch.exception.error_code = error_code;
 592                 vcpu->arch.exception.has_payload = has_payload;
 593                 vcpu->arch.exception.payload = payload;
 594                 if (!is_guest_mode(vcpu))
 595                         kvm_deliver_exception_payload(vcpu);
 596                 return;
 597         }
 598
 599         /* to check exception */
 600         prev_nr = vcpu->arch.exception.nr;
 601         if (prev_nr == DF_VECTOR) {
 602                 /* triple fault -> shutdown */
 603                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 604                 return;
 605         }
 606         class1 = exception_class(prev_nr);
 607         class2 = exception_class(nr);
 608         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 609                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 610                 /*
 611                  * Generate double fault per SDM Table 5-5.  Set
 612                  * exception.pending = true so that the double fault
 613                  * can trigger a nested vmexit.
 614                  */
 615                 vcpu->arch.exception.pending = true;
 616                 vcpu->arch.exception.injected = false;
 617                 vcpu->arch.exception.has_error_code = true;
 618                 vcpu->arch.exception.nr = DF_VECTOR;
 619                 vcpu->arch.exception.error_code = 0;
 620                 vcpu->arch.exception.has_payload = false;
 621                 vcpu->arch.exception.payload = 0;
 622         } else
 623                 /* replace previous exception with a new one in a hope
 624                    that instruction re-execution will regenerate lost
 625                    exception */
 626                 goto queue;
 627 }
 628
 629 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 630 {
 631         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 632 }
 633 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 634
 635 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 636 {
 637         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 638 }
 639 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 640
 641 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 642                            unsigned long payload)
 643 {
 644         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 645 }
 646 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 647
 648 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 649                                     u32 error_code, unsigned long payload)
 650 {
 651         kvm_multiple_exception(vcpu, nr, true, error_code,
 652                                true, payload, false);
 653 }
 654
 655 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 656 {
 657         if (err)
 658                 kvm_inject_gp(vcpu, 0);
 659         else
 660                 return kvm_skip_emulated_instruction(vcpu);
 661
 662         return 1;
 663 }
 664 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 665
 666 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 667 {
 668         ++vcpu->stat.pf_guest;
 669         vcpu->arch.exception.nested_apf =
 670                 is_guest_mode(vcpu) && fault->async_page_fault;
 671         if (vcpu->arch.exception.nested_apf) {
 672                 vcpu->arch.apf.nested_apf_token = fault->address;
 673                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 674         } else {
 675                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 676                                         fault->address);
 677         }
 678 }
 679 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 680
 681 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 682                                     struct x86_exception *fault)
 683 {
 684         struct kvm_mmu *fault_mmu;
 685         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 686
 687         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 688                                                vcpu->arch.walk_mmu;
 689
 690         /*
 691          * Invalidate the TLB entry for the faulting address, if it exists,
 692          * else the access will fault indefinitely (and to emulate hardware).
 693          */
 694         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 695             !(fault->error_code & PFERR_RSVD_MASK))
 696                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 697                                        fault_mmu->root_hpa);
 698
 699         fault_mmu->inject_page_fault(vcpu, fault);
 700         return fault->nested_page_fault;
 701 }
 702 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 703
 704 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 705 {
 706         atomic_inc(&vcpu->arch.nmi_queued);
 707         kvm_make_request(KVM_REQ_NMI, vcpu);
 708 }
 709 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 710
 711 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 712 {
 713         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 714 }
 715 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 716
 717 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 718 {
 719         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 720 }
 721 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 722
 723 /*
 724  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 725  * a #GP and return false.
 726  */
 727 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 728 {
 729         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 730                 return true;
 731         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 732         return false;
 733 }
 734 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 735
 736 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 737 {
 738         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 739                 return true;
 740
 741         kvm_queue_exception(vcpu, UD_VECTOR);
 742         return false;
 743 }
 744 EXPORT_SYMBOL_GPL(kvm_require_dr);
 745
 746 /*
 747  * This function will be used to read from the physical memory of the currently
 748  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 749  * can read from guest physical or from the guest's guest physical memory.
 750  */
 751 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 752                             gfn_t ngfn, void *data, int offset, int len,
 753                             u32 access)
 754 {
 755         struct x86_exception exception;
 756         gfn_t real_gfn;
 757         gpa_t ngpa;
 758
 759         ngpa     = gfn_to_gpa(ngfn);
 760         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 761         if (real_gfn == UNMAPPED_GVA)
 762                 return -EFAULT;
 763
 764         real_gfn = gpa_to_gfn(real_gfn);
 765
 766         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 767 }
 768 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 769
 770 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 771                                void *data, int offset, int len, u32 access)
 772 {
 773         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 774                                        data, offset, len, access);
 775 }
 776
 777 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 778 {
 779         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 780 }
 781
 782 /*
 783  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 784  */
 785 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 786 {
 787         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 788         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 789         int i;
 790         int ret;
 791         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 792
 793         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 794                                       offset * sizeof(u64), sizeof(pdpte),
 795                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 796         if (ret < 0) {
 797                 ret = 0;
 798                 goto out;
 799         }
 800         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 801                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 802                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 803                         ret = 0;
 804                         goto out;
 805                 }
 806         }
 807         ret = 1;
 808
 809         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 810         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 811
 812 out:
 813
 814         return ret;
 815 }
 816 EXPORT_SYMBOL_GPL(load_pdptrs);
 817
 818 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 819 {
 820         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 821         int offset;
 822         gfn_t gfn;
 823         int r;
 824
 825         if (!is_pae_paging(vcpu))
 826                 return false;
 827
 828         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 829                 return true;
 830
 831         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 832         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 833         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 834                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 835         if (r < 0)
 836                 return true;
 837
 838         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 839 }
 840 EXPORT_SYMBOL_GPL(pdptrs_changed);
 841
 842 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 843 {
 844         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 845
 846         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 847                 kvm_clear_async_pf_completion_queue(vcpu);
 848                 kvm_async_pf_hash_reset(vcpu);
 849         }
 850
 851         if ((cr0 ^ old_cr0) & update_bits)
 852                 kvm_mmu_reset_context(vcpu);
 853
 854         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 855             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 856             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 857                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 858 }
 859 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 860
 861 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 862 {
 863         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 864         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 865
 866         cr0 |= X86_CR0_ET;
 867
 868 #ifdef CONFIG_X86_64
 869         if (cr0 & 0xffffffff00000000UL)
 870                 return 1;
 871 #endif
 872
 873         cr0 &= ~CR0_RESERVED_BITS;
 874
 875         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 876                 return 1;
 877
 878         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 879                 return 1;
 880
 881 #ifdef CONFIG_X86_64
 882         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 883             (cr0 & X86_CR0_PG)) {
 884                 int cs_db, cs_l;
 885
 886                 if (!is_pae(vcpu))
 887                         return 1;
 888                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 889                 if (cs_l)
 890                         return 1;
 891         }
 892 #endif
 893         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 894             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 895             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 896                 return 1;
 897
 898         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 899                 return 1;
 900
 901         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 902
 903         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 904
 905         return 0;
 906 }
 907 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 908
 909 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 910 {
 911         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 912 }
 913 EXPORT_SYMBOL_GPL(kvm_lmsw);
 914
 915 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 916 {
 917         if (vcpu->arch.guest_state_protected)
 918                 return;
 919
 920         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 921
 922                 if (vcpu->arch.xcr0 != host_xcr0)
 923                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 924
 925                 if (vcpu->arch.xsaves_enabled &&
 926                     vcpu->arch.ia32_xss != host_xss)
 927                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 928         }
 929
 930         if (static_cpu_has(X86_FEATURE_PKU) &&
 931             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 932              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 933             vcpu->arch.pkru != vcpu->arch.host_pkru)
 934                 __write_pkru(vcpu->arch.pkru);
 935 }
 936 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 937
 938 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 939 {
 940         if (vcpu->arch.guest_state_protected)
 941                 return;
 942
 943         if (static_cpu_has(X86_FEATURE_PKU) &&
 944             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 945              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 946                 vcpu->arch.pkru = rdpkru();
 947                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 948                         __write_pkru(vcpu->arch.host_pkru);
 949         }
 950
 951         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 952
 953                 if (vcpu->arch.xcr0 != host_xcr0)
 954                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 955
 956                 if (vcpu->arch.xsaves_enabled &&
 957                     vcpu->arch.ia32_xss != host_xss)
 958                         wrmsrl(MSR_IA32_XSS, host_xss);
 959         }
 960
 961 }
 962 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 963
 964 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 965 {
 966         u64 xcr0 = xcr;
 967         u64 old_xcr0 = vcpu->arch.xcr0;
 968         u64 valid_bits;
 969
 970         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 971         if (index != XCR_XFEATURE_ENABLED_MASK)
 972                 return 1;
 973         if (!(xcr0 & XFEATURE_MASK_FP))
 974                 return 1;
 975         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 976                 return 1;
 977
 978         /*
 979          * Do not allow the guest to set bits that we do not support
 980          * saving.  However, xcr0 bit 0 is always set, even if the
 981          * emulated CPU does not support XSAVE (see fx_init).
 982          */
 983         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 984         if (xcr0 & ~valid_bits)
 985                 return 1;
 986
 987         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 988             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 989                 return 1;
 990
 991         if (xcr0 & XFEATURE_MASK_AVX512) {
 992                 if (!(xcr0 & XFEATURE_MASK_YMM))
 993                         return 1;
 994                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 995                         return 1;
 996         }
 997         vcpu->arch.xcr0 = xcr0;
 998
 999         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1000                 kvm_update_cpuid_runtime(vcpu);
1001         return 0;
1002 }
1003
1004 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1005 {
1006         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1007             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1008                 kvm_inject_gp(vcpu, 0);
1009                 return 1;
1010         }
1011
1012         return kvm_skip_emulated_instruction(vcpu);
1013 }
1014 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1015
1016 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1017 {
1018         if (cr4 & cr4_reserved_bits)
1019                 return false;
1020
1021         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1022                 return false;
1023
1024         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1025 }
1026 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1027
1028 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1029 {
1030         unsigned long mmu_role_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1031                                       X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
1032
1033         if (((cr4 ^ old_cr4) & mmu_role_bits) ||
1034             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1035                 kvm_mmu_reset_context(vcpu);
1036 }
1037 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1038
1039 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1040 {
1041         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1042         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1043                                    X86_CR4_SMEP;
1044
1045         if (!kvm_is_valid_cr4(vcpu, cr4))
1046                 return 1;
1047
1048         if (is_long_mode(vcpu)) {
1049                 if (!(cr4 & X86_CR4_PAE))
1050                         return 1;
1051                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1052                         return 1;
1053         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1054                    && ((cr4 ^ old_cr4) & pdptr_bits)
1055                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1056                                    kvm_read_cr3(vcpu)))
1057                 return 1;
1058
1059         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1060                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1061                         return 1;
1062
1063                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1064                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1065                         return 1;
1066         }
1067
1068         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1069
1070         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1071
1072         return 0;
1073 }
1074 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1075
1076 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1077 {
1078         bool skip_tlb_flush = false;
1079 #ifdef CONFIG_X86_64
1080         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1081
1082         if (pcid_enabled) {
1083                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1084                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1085         }
1086 #endif
1087
1088         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1089                 if (!skip_tlb_flush) {
1090                         kvm_mmu_sync_roots(vcpu);
1091                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1092                 }
1093                 return 0;
1094         }
1095
1096         /*
1097          * Do not condition the GPA check on long mode, this helper is used to
1098          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1099          * the current vCPU mode is accurate.
1100          */
1101         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1102                 return 1;
1103
1104         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1105                 return 1;
1106
1107         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1108         vcpu->arch.cr3 = cr3;
1109         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1110
1111         return 0;
1112 }
1113 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1114
1115 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1116 {
1117         if (cr8 & CR8_RESERVED_BITS)
1118                 return 1;
1119         if (lapic_in_kernel(vcpu))
1120                 kvm_lapic_set_tpr(vcpu, cr8);
1121         else
1122                 vcpu->arch.cr8 = cr8;
1123         return 0;
1124 }
1125 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1126
1127 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1128 {
1129         if (lapic_in_kernel(vcpu))
1130                 return kvm_lapic_get_cr8(vcpu);
1131         else
1132                 return vcpu->arch.cr8;
1133 }
1134 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1135
1136 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1137 {
1138         int i;
1139
1140         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1141                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1142                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1143                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1144         }
1145 }
1146
1147 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1148 {
1149         unsigned long dr7;
1150
1151         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1152                 dr7 = vcpu->arch.guest_debug_dr7;
1153         else
1154                 dr7 = vcpu->arch.dr7;
1155         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1156         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1157         if (dr7 & DR7_BP_EN_MASK)
1158                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1159 }
1160 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1161
1162 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1163 {
1164         u64 fixed = DR6_FIXED_1;
1165
1166         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1167                 fixed |= DR6_RTM;
1168         return fixed;
1169 }
1170
1171 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1172 {
1173         size_t size = ARRAY_SIZE(vcpu->arch.db);
1174
1175         switch (dr) {
1176         case 0 ... 3:
1177                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1178                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1179                         vcpu->arch.eff_db[dr] = val;
1180                 break;
1181         case 4:
1182         case 6:
1183                 if (!kvm_dr6_valid(val))
1184                         return 1; /* #GP */
1185                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1186                 break;
1187         case 5:
1188         default: /* 7 */
1189                 if (!kvm_dr7_valid(val))
1190                         return 1; /* #GP */
1191                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1192                 kvm_update_dr7(vcpu);
1193                 break;
1194         }
1195
1196         return 0;
1197 }
1198 EXPORT_SYMBOL_GPL(kvm_set_dr);
1199
1200 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1201 {
1202         size_t size = ARRAY_SIZE(vcpu->arch.db);
1203
1204         switch (dr) {
1205         case 0 ... 3:
1206                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1207                 break;
1208         case 4:
1209         case 6:
1210                 *val = vcpu->arch.dr6;
1211                 break;
1212         case 5:
1213         default: /* 7 */
1214                 *val = vcpu->arch.dr7;
1215                 break;
1216         }
1217 }
1218 EXPORT_SYMBOL_GPL(kvm_get_dr);
1219
1220 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1221 {
1222         u32 ecx = kvm_rcx_read(vcpu);
1223         u64 data;
1224
1225         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1226                 kvm_inject_gp(vcpu, 0);
1227                 return 1;
1228         }
1229
1230         kvm_rax_write(vcpu, (u32)data);
1231         kvm_rdx_write(vcpu, data >> 32);
1232         return kvm_skip_emulated_instruction(vcpu);
1233 }
1234 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1235
1236 /*
1237  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1238  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1239  *
1240  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1241  * extract the supported MSRs from the related const lists.
1242  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1243  * capabilities of the host cpu. This capabilities test skips MSRs that are
1244  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1245  * may depend on host virtualization features rather than host cpu features.
1246  */
1247
1248 static const u32 msrs_to_save_all[] = {
1249         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1250         MSR_STAR,
1251 #ifdef CONFIG_X86_64
1252         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1253 #endif
1254         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1255         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1256         MSR_IA32_SPEC_CTRL,
1257         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1258         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1259         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1260         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1261         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1262         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1263         MSR_IA32_UMWAIT_CONTROL,
1264
1265         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1266         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1267         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1268         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1269         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1270         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1271         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1272         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1273         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1274         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1275         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1276         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1277         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1278         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1279         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1280         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1281         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1282         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1283         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1284         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1285         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1286         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1287 };
1288
1289 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1290 static unsigned num_msrs_to_save;
1291
1292 static const u32 emulated_msrs_all[] = {
1293         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1294         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1295         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1296         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1297         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1298         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1299         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1300         HV_X64_MSR_RESET,
1301         HV_X64_MSR_VP_INDEX,
1302         HV_X64_MSR_VP_RUNTIME,
1303         HV_X64_MSR_SCONTROL,
1304         HV_X64_MSR_STIMER0_CONFIG,
1305         HV_X64_MSR_VP_ASSIST_PAGE,
1306         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1307         HV_X64_MSR_TSC_EMULATION_STATUS,
1308         HV_X64_MSR_SYNDBG_OPTIONS,
1309         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1310         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1311         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1312
1313         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1314         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1315
1316         MSR_IA32_TSC_ADJUST,
1317         MSR_IA32_TSC_DEADLINE,
1318         MSR_IA32_ARCH_CAPABILITIES,
1319         MSR_IA32_PERF_CAPABILITIES,
1320         MSR_IA32_MISC_ENABLE,
1321         MSR_IA32_MCG_STATUS,
1322         MSR_IA32_MCG_CTL,
1323         MSR_IA32_MCG_EXT_CTL,
1324         MSR_IA32_SMBASE,
1325         MSR_SMI_COUNT,
1326         MSR_PLATFORM_INFO,
1327         MSR_MISC_FEATURES_ENABLES,
1328         MSR_AMD64_VIRT_SPEC_CTRL,
1329         MSR_IA32_POWER_CTL,
1330         MSR_IA32_UCODE_REV,
1331
1332         /*
1333          * The following list leaves out MSRs whose values are determined
1334          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1335          * We always support the "true" VMX control MSRs, even if the host
1336          * processor does not, so I am putting these registers here rather
1337          * than in msrs_to_save_all.
1338          */
1339         MSR_IA32_VMX_BASIC,
1340         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1341         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1342         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1343         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1344         MSR_IA32_VMX_MISC,
1345         MSR_IA32_VMX_CR0_FIXED0,
1346         MSR_IA32_VMX_CR4_FIXED0,
1347         MSR_IA32_VMX_VMCS_ENUM,
1348         MSR_IA32_VMX_PROCBASED_CTLS2,
1349         MSR_IA32_VMX_EPT_VPID_CAP,
1350         MSR_IA32_VMX_VMFUNC,
1351
1352         MSR_K7_HWCR,
1353         MSR_KVM_POLL_CONTROL,
1354 };
1355
1356 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1357 static unsigned num_emulated_msrs;
1358
1359 /*
1360  * List of msr numbers which are used to expose MSR-based features that
1361  * can be used by a hypervisor to validate requested CPU features.
1362  */
1363 static const u32 msr_based_features_all[] = {
1364         MSR_IA32_VMX_BASIC,
1365         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1366         MSR_IA32_VMX_PINBASED_CTLS,
1367         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1368         MSR_IA32_VMX_PROCBASED_CTLS,
1369         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1370         MSR_IA32_VMX_EXIT_CTLS,
1371         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1372         MSR_IA32_VMX_ENTRY_CTLS,
1373         MSR_IA32_VMX_MISC,
1374         MSR_IA32_VMX_CR0_FIXED0,
1375         MSR_IA32_VMX_CR0_FIXED1,
1376         MSR_IA32_VMX_CR4_FIXED0,
1377         MSR_IA32_VMX_CR4_FIXED1,
1378         MSR_IA32_VMX_VMCS_ENUM,
1379         MSR_IA32_VMX_PROCBASED_CTLS2,
1380         MSR_IA32_VMX_EPT_VPID_CAP,
1381         MSR_IA32_VMX_VMFUNC,
1382
1383         MSR_F10H_DECFG,
1384         MSR_IA32_UCODE_REV,
1385         MSR_IA32_ARCH_CAPABILITIES,
1386         MSR_IA32_PERF_CAPABILITIES,
1387 };
1388
1389 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1390 static unsigned int num_msr_based_features;
1391
1392 static u64 kvm_get_arch_capabilities(void)
1393 {
1394         u64 data = 0;
1395
1396         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1397                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1398
1399         /*
1400          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1401          * the nested hypervisor runs with NX huge pages.  If it is not,
1402          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1403          * L1 guests, so it need not worry about its own (L2) guests.
1404          */
1405         data |= ARCH_CAP_PSCHANGE_MC_NO;
1406
1407         /*
1408          * If we're doing cache flushes (either "always" or "cond")
1409          * we will do one whenever the guest does a vmlaunch/vmresume.
1410          * If an outer hypervisor is doing the cache flush for us
1411          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1412          * capability to the guest too, and if EPT is disabled we're not
1413          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1414          * require a nested hypervisor to do a flush of its own.
1415          */
1416         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1417                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1418
1419         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1420                 data |= ARCH_CAP_RDCL_NO;
1421         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1422                 data |= ARCH_CAP_SSB_NO;
1423         if (!boot_cpu_has_bug(X86_BUG_MDS))
1424                 data |= ARCH_CAP_MDS_NO;
1425
1426         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1427                 /*
1428                  * If RTM=0 because the kernel has disabled TSX, the host might
1429                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1430                  * and therefore knows that there cannot be TAA) but keep
1431                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1432                  * and we want to allow migrating those guests to tsx=off hosts.
1433                  */
1434                 data &= ~ARCH_CAP_TAA_NO;
1435         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1436                 data |= ARCH_CAP_TAA_NO;
1437         } else {
1438                 /*
1439                  * Nothing to do here; we emulate TSX_CTRL if present on the
1440                  * host so the guest can choose between disabling TSX or
1441                  * using VERW to clear CPU buffers.
1442                  */
1443         }
1444
1445         return data;
1446 }
1447
1448 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1449 {
1450         switch (msr->index) {
1451         case MSR_IA32_ARCH_CAPABILITIES:
1452                 msr->data = kvm_get_arch_capabilities();
1453                 break;
1454         case MSR_IA32_UCODE_REV:
1455                 rdmsrl_safe(msr->index, &msr->data);
1456                 break;
1457         default:
1458                 return static_call(kvm_x86_get_msr_feature)(msr);
1459         }
1460         return 0;
1461 }
1462
1463 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1464 {
1465         struct kvm_msr_entry msr;
1466         int r;
1467
1468         msr.index = index;
1469         r = kvm_get_msr_feature(&msr);
1470
1471         if (r == KVM_MSR_RET_INVALID) {
1472                 /* Unconditionally clear the output for simplicity */
1473                 *data = 0;
1474                 if (kvm_msr_ignored_check(index, 0, false))
1475                         r = 0;
1476         }
1477
1478         if (r)
1479                 return r;
1480
1481         *data = msr.data;
1482
1483         return 0;
1484 }
1485
1486 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1487 {
1488         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1489                 return false;
1490
1491         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1492                 return false;
1493
1494         if (efer & (EFER_LME | EFER_LMA) &&
1495             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1496                 return false;
1497
1498         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1499                 return false;
1500
1501         return true;
1502
1503 }
1504 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1505 {
1506         if (efer & efer_reserved_bits)
1507                 return false;
1508
1509         return __kvm_valid_efer(vcpu, efer);
1510 }
1511 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1512
1513 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1514 {
1515         u64 old_efer = vcpu->arch.efer;
1516         u64 efer = msr_info->data;
1517         int r;
1518
1519         if (efer & efer_reserved_bits)
1520                 return 1;
1521
1522         if (!msr_info->host_initiated) {
1523                 if (!__kvm_valid_efer(vcpu, efer))
1524                         return 1;
1525
1526                 if (is_paging(vcpu) &&
1527                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1528                         return 1;
1529         }
1530
1531         efer &= ~EFER_LMA;
1532         efer |= vcpu->arch.efer & EFER_LMA;
1533
1534         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1535         if (r) {
1536                 WARN_ON(r > 0);
1537                 return r;
1538         }
1539
1540         /* Update reserved bits */
1541         if ((efer ^ old_efer) & EFER_NX)
1542                 kvm_mmu_reset_context(vcpu);
1543
1544         return 0;
1545 }
1546
1547 void kvm_enable_efer_bits(u64 mask)
1548 {
1549        efer_reserved_bits &= ~mask;
1550 }
1551 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1552
1553 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1554 {
1555         struct kvm_x86_msr_filter *msr_filter;
1556         struct msr_bitmap_range *ranges;
1557         struct kvm *kvm = vcpu->kvm;
1558         bool allowed;
1559         int idx;
1560         u32 i;
1561
1562         /* x2APIC MSRs do not support filtering. */
1563         if (index >= 0x800 && index <= 0x8ff)
1564                 return true;
1565
1566         idx = srcu_read_lock(&kvm->srcu);
1567
1568         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1569         if (!msr_filter) {
1570                 allowed = true;
1571                 goto out;
1572         }
1573
1574         allowed = msr_filter->default_allow;
1575         ranges = msr_filter->ranges;
1576
1577         for (i = 0; i < msr_filter->count; i++) {
1578                 u32 start = ranges[i].base;
1579                 u32 end = start + ranges[i].nmsrs;
1580                 u32 flags = ranges[i].flags;
1581                 unsigned long *bitmap = ranges[i].bitmap;
1582
1583                 if ((index >= start) && (index < end) && (flags & type)) {
1584                         allowed = !!test_bit(index - start, bitmap);
1585                         break;
1586                 }
1587         }
1588
1589 out:
1590         srcu_read_unlock(&kvm->srcu, idx);
1591
1592         return allowed;
1593 }
1594 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1595
1596 /*
1597  * Write @data into the MSR specified by @index.  Select MSR specific fault
1598  * checks are bypassed if @host_initiated is %true.
1599  * Returns 0 on success, non-0 otherwise.
1600  * Assumes vcpu_load() was already called.
1601  */
1602 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1603                          bool host_initiated)
1604 {
1605         struct msr_data msr;
1606
1607         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1608                 return KVM_MSR_RET_FILTERED;
1609
1610         switch (index) {
1611         case MSR_FS_BASE:
1612         case MSR_GS_BASE:
1613         case MSR_KERNEL_GS_BASE:
1614         case MSR_CSTAR:
1615         case MSR_LSTAR:
1616                 if (is_noncanonical_address(data, vcpu))
1617                         return 1;
1618                 break;
1619         case MSR_IA32_SYSENTER_EIP:
1620         case MSR_IA32_SYSENTER_ESP:
1621                 /*
1622                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1623                  * non-canonical address is written on Intel but not on
1624                  * AMD (which ignores the top 32-bits, because it does
1625                  * not implement 64-bit SYSENTER).
1626                  *
1627                  * 64-bit code should hence be able to write a non-canonical
1628                  * value on AMD.  Making the address canonical ensures that
1629                  * vmentry does not fail on Intel after writing a non-canonical
1630                  * value, and that something deterministic happens if the guest
1631                  * invokes 64-bit SYSENTER.
1632                  */
1633                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1634         }
1635
1636         msr.data = data;
1637         msr.index = index;
1638         msr.host_initiated = host_initiated;
1639
1640         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1641 }
1642
1643 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1644                                      u32 index, u64 data, bool host_initiated)
1645 {
1646         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1647
1648         if (ret == KVM_MSR_RET_INVALID)
1649                 if (kvm_msr_ignored_check(index, data, true))
1650                         ret = 0;
1651
1652         return ret;
1653 }
1654
1655 /*
1656  * Read the MSR specified by @index into @data.  Select MSR specific fault
1657  * checks are bypassed if @host_initiated is %true.
1658  * Returns 0 on success, non-0 otherwise.
1659  * Assumes vcpu_load() was already called.
1660  */
1661 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1662                   bool host_initiated)
1663 {
1664         struct msr_data msr;
1665         int ret;
1666
1667         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1668                 return KVM_MSR_RET_FILTERED;
1669
1670         msr.index = index;
1671         msr.host_initiated = host_initiated;
1672
1673         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1674         if (!ret)
1675                 *data = msr.data;
1676         return ret;
1677 }
1678
1679 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1680                                      u32 index, u64 *data, bool host_initiated)
1681 {
1682         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1683
1684         if (ret == KVM_MSR_RET_INVALID) {
1685                 /* Unconditionally clear *data for simplicity */
1686                 *data = 0;
1687                 if (kvm_msr_ignored_check(index, 0, false))
1688                         ret = 0;
1689         }
1690
1691         return ret;
1692 }
1693
1694 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1695 {
1696         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1697 }
1698 EXPORT_SYMBOL_GPL(kvm_get_msr);
1699
1700 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1701 {
1702         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1703 }
1704 EXPORT_SYMBOL_GPL(kvm_set_msr);
1705
1706 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1707 {
1708         int err = vcpu->run->msr.error;
1709         if (!err) {
1710                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1711                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1712         }
1713
1714         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1715 }
1716
1717 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1718 {
1719         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1720 }
1721
1722 static u64 kvm_msr_reason(int r)
1723 {
1724         switch (r) {
1725         case KVM_MSR_RET_INVALID:
1726                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1727         case KVM_MSR_RET_FILTERED:
1728                 return KVM_MSR_EXIT_REASON_FILTER;
1729         default:
1730                 return KVM_MSR_EXIT_REASON_INVAL;
1731         }
1732 }
1733
1734 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1735                               u32 exit_reason, u64 data,
1736                               int (*completion)(struct kvm_vcpu *vcpu),
1737                               int r)
1738 {
1739         u64 msr_reason = kvm_msr_reason(r);
1740
1741         /* Check if the user wanted to know about this MSR fault */
1742         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1743                 return 0;
1744
1745         vcpu->run->exit_reason = exit_reason;
1746         vcpu->run->msr.error = 0;
1747         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1748         vcpu->run->msr.reason = msr_reason;
1749         vcpu->run->msr.index = index;
1750         vcpu->run->msr.data = data;
1751         vcpu->arch.complete_userspace_io = completion;
1752
1753         return 1;
1754 }
1755
1756 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1757 {
1758         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1759                                    complete_emulated_rdmsr, r);
1760 }
1761
1762 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1763 {
1764         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1765                                    complete_emulated_wrmsr, r);
1766 }
1767
1768 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1769 {
1770         u32 ecx = kvm_rcx_read(vcpu);
1771         u64 data;
1772         int r;
1773
1774         r = kvm_get_msr(vcpu, ecx, &data);
1775
1776         /* MSR read failed? See if we should ask user space */
1777         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1778                 /* Bounce to user space */
1779                 return 0;
1780         }
1781
1782         if (!r) {
1783                 trace_kvm_msr_read(ecx, data);
1784
1785                 kvm_rax_write(vcpu, data & -1u);
1786                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1787         } else {
1788                 trace_kvm_msr_read_ex(ecx);
1789         }
1790
1791         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1792 }
1793 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1794
1795 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1796 {
1797         u32 ecx = kvm_rcx_read(vcpu);
1798         u64 data = kvm_read_edx_eax(vcpu);
1799         int r;
1800
1801         r = kvm_set_msr(vcpu, ecx, data);
1802
1803         /* MSR write failed? See if we should ask user space */
1804         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1805                 /* Bounce to user space */
1806                 return 0;
1807
1808         /* Signal all other negative errors to userspace */
1809         if (r < 0)
1810                 return r;
1811
1812         if (!r)
1813                 trace_kvm_msr_write(ecx, data);
1814         else
1815                 trace_kvm_msr_write_ex(ecx, data);
1816
1817         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1818 }
1819 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1820
1821 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1822 {
1823         return kvm_skip_emulated_instruction(vcpu);
1824 }
1825 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1826
1827 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1828 {
1829         /* Treat an INVD instruction as a NOP and just skip it. */
1830         return kvm_emulate_as_nop(vcpu);
1831 }
1832 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1833
1834 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1835 {
1836         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1837         return kvm_emulate_as_nop(vcpu);
1838 }
1839 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1840
1841 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1842 {
1843         kvm_queue_exception(vcpu, UD_VECTOR);
1844         return 1;
1845 }
1846 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1847
1848 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1849 {
1850         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1851         return kvm_emulate_as_nop(vcpu);
1852 }
1853 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1854
1855 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1856 {
1857         xfer_to_guest_mode_prepare();
1858         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1859                 xfer_to_guest_mode_work_pending();
1860 }
1861
1862 /*
1863  * The fast path for frequent and performance sensitive wrmsr emulation,
1864  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1865  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1866  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1867  * other cases which must be called after interrupts are enabled on the host.
1868  */
1869 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1870 {
1871         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1872                 return 1;
1873
1874         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1875                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1876                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1877                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1878
1879                 data &= ~(1 << 12);
1880                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1881                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1882                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1883                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1884                 return 0;
1885         }
1886
1887         return 1;
1888 }
1889
1890 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1891 {
1892         if (!kvm_can_use_hv_timer(vcpu))
1893                 return 1;
1894
1895         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1896         return 0;
1897 }
1898
1899 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1900 {
1901         u32 msr = kvm_rcx_read(vcpu);
1902         u64 data;
1903         fastpath_t ret = EXIT_FASTPATH_NONE;
1904
1905         switch (msr) {
1906         case APIC_BASE_MSR + (APIC_ICR >> 4):
1907                 data = kvm_read_edx_eax(vcpu);
1908                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1909                         kvm_skip_emulated_instruction(vcpu);
1910                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1911                 }
1912                 break;
1913         case MSR_IA32_TSC_DEADLINE:
1914                 data = kvm_read_edx_eax(vcpu);
1915                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1916                         kvm_skip_emulated_instruction(vcpu);
1917                         ret = EXIT_FASTPATH_REENTER_GUEST;
1918                 }
1919                 break;
1920         default:
1921                 break;
1922         }
1923
1924         if (ret != EXIT_FASTPATH_NONE)
1925                 trace_kvm_msr_write(msr, data);
1926
1927         return ret;
1928 }
1929 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1930
1931 /*
1932  * Adapt set_msr() to msr_io()'s calling convention
1933  */
1934 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1935 {
1936         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1937 }
1938
1939 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1940 {
1941         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1942 }
1943
1944 #ifdef CONFIG_X86_64
1945 struct pvclock_clock {
1946         int vclock_mode;
1947         u64 cycle_last;
1948         u64 mask;
1949         u32 mult;
1950         u32 shift;
1951         u64 base_cycles;
1952         u64 offset;
1953 };
1954
1955 struct pvclock_gtod_data {
1956         seqcount_t      seq;
1957
1958         struct pvclock_clock clock; /* extract of a clocksource struct */
1959         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1960
1961         ktime_t         offs_boot;
1962         u64             wall_time_sec;
1963 };
1964
1965 static struct pvclock_gtod_data pvclock_gtod_data;
1966
1967 static void update_pvclock_gtod(struct timekeeper *tk)
1968 {
1969         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1970
1971         write_seqcount_begin(&vdata->seq);
1972
1973         /* copy pvclock gtod data */
1974         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1975         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1976         vdata->clock.mask               = tk->tkr_mono.mask;
1977         vdata->clock.mult               = tk->tkr_mono.mult;
1978         vdata->clock.shift              = tk->tkr_mono.shift;
1979         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1980         vdata->clock.offset             = tk->tkr_mono.base;
1981
1982         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1983         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1984         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1985         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1986         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1987         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1988         vdata->raw_clock.offset         = tk->tkr_raw.base;
1989
1990         vdata->wall_time_sec            = tk->xtime_sec;
1991
1992         vdata->offs_boot                = tk->offs_boot;
1993
1994         write_seqcount_end(&vdata->seq);
1995 }
1996
1997 static s64 get_kvmclock_base_ns(void)
1998 {
1999         /* Count up from boot time, but with the frequency of the raw clock.  */
2000         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2001 }
2002 #else
2003 static s64 get_kvmclock_base_ns(void)
2004 {
2005         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2006         return ktime_get_boottime_ns();
2007 }
2008 #endif
2009
2010 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2011 {
2012         int version;
2013         int r;
2014         struct pvclock_wall_clock wc;
2015         u32 wc_sec_hi;
2016         u64 wall_nsec;
2017
2018         if (!wall_clock)
2019                 return;
2020
2021         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2022         if (r)
2023                 return;
2024
2025         if (version & 1)
2026                 ++version;  /* first time write, random junk */
2027
2028         ++version;
2029
2030         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2031                 return;
2032
2033         /*
2034          * The guest calculates current wall clock time by adding
2035          * system time (updated by kvm_guest_time_update below) to the
2036          * wall clock specified here.  We do the reverse here.
2037          */
2038         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2039
2040         wc.nsec = do_div(wall_nsec, 1000000000);
2041         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2042         wc.version = version;
2043
2044         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2045
2046         if (sec_hi_ofs) {
2047                 wc_sec_hi = wall_nsec >> 32;
2048                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2049                                 &wc_sec_hi, sizeof(wc_sec_hi));
2050         }
2051
2052         version++;
2053         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2054 }
2055
2056 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2057                                   bool old_msr, bool host_initiated)
2058 {
2059         struct kvm_arch *ka = &vcpu->kvm->arch;
2060
2061         if (vcpu->vcpu_id == 0 && !host_initiated) {
2062                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2063                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2064
2065                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2066         }
2067
2068         vcpu->arch.time = system_time;
2069         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2070
2071         /* we verify if the enable bit is set... */
2072         vcpu->arch.pv_time_enabled = false;
2073         if (!(system_time & 1))
2074                 return;
2075
2076         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2077                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2078                                        sizeof(struct pvclock_vcpu_time_info)))
2079                 vcpu->arch.pv_time_enabled = true;
2080
2081         return;
2082 }
2083
2084 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2085 {
2086         do_shl32_div32(dividend, divisor);
2087         return dividend;
2088 }
2089
2090 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2091                                s8 *pshift, u32 *pmultiplier)
2092 {
2093         uint64_t scaled64;
2094         int32_t  shift = 0;
2095         uint64_t tps64;
2096         uint32_t tps32;
2097
2098         tps64 = base_hz;
2099         scaled64 = scaled_hz;
2100         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2101                 tps64 >>= 1;
2102                 shift--;
2103         }
2104
2105         tps32 = (uint32_t)tps64;
2106         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2107                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2108                         scaled64 >>= 1;
2109                 else
2110                         tps32 <<= 1;
2111                 shift++;
2112         }
2113
2114         *pshift = shift;
2115         *pmultiplier = div_frac(scaled64, tps32);
2116 }
2117
2118 #ifdef CONFIG_X86_64
2119 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2120 #endif
2121
2122 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2123 static unsigned long max_tsc_khz;
2124
2125 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2126 {
2127         u64 v = (u64)khz * (1000000 + ppm);
2128         do_div(v, 1000000);
2129         return v;
2130 }
2131
2132 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2133 {
2134         u64 ratio;
2135
2136         /* Guest TSC same frequency as host TSC? */
2137         if (!scale) {
2138                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2139                 return 0;
2140         }
2141
2142         /* TSC scaling supported? */
2143         if (!kvm_has_tsc_control) {
2144                 if (user_tsc_khz > tsc_khz) {
2145                         vcpu->arch.tsc_catchup = 1;
2146                         vcpu->arch.tsc_always_catchup = 1;
2147                         return 0;
2148                 } else {
2149                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2150                         return -1;
2151                 }
2152         }
2153
2154         /* TSC scaling required  - calculate ratio */
2155         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2156                                 user_tsc_khz, tsc_khz);
2157
2158         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2159                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2160                                     user_tsc_khz);
2161                 return -1;
2162         }
2163
2164         vcpu->arch.tsc_scaling_ratio = ratio;
2165         return 0;
2166 }
2167
2168 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2169 {
2170         u32 thresh_lo, thresh_hi;
2171         int use_scaling = 0;
2172
2173         /* tsc_khz can be zero if TSC calibration fails */
2174         if (user_tsc_khz == 0) {
2175                 /* set tsc_scaling_ratio to a safe value */
2176                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2177                 return -1;
2178         }
2179
2180         /* Compute a scale to convert nanoseconds in TSC cycles */
2181         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2182                            &vcpu->arch.virtual_tsc_shift,
2183                            &vcpu->arch.virtual_tsc_mult);
2184         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2185
2186         /*
2187          * Compute the variation in TSC rate which is acceptable
2188          * within the range of tolerance and decide if the
2189          * rate being applied is within that bounds of the hardware
2190          * rate.  If so, no scaling or compensation need be done.
2191          */
2192         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2193         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2194         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2195                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2196                 use_scaling = 1;
2197         }
2198         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2199 }
2200
2201 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2202 {
2203         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2204                                       vcpu->arch.virtual_tsc_mult,
2205                                       vcpu->arch.virtual_tsc_shift);
2206         tsc += vcpu->arch.this_tsc_write;
2207         return tsc;
2208 }
2209
2210 static inline int gtod_is_based_on_tsc(int mode)
2211 {
2212         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2213 }
2214
2215 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2216 {
2217 #ifdef CONFIG_X86_64
2218         bool vcpus_matched;
2219         struct kvm_arch *ka = &vcpu->kvm->arch;
2220         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2221
2222         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2223                          atomic_read(&vcpu->kvm->online_vcpus));
2224
2225         /*
2226          * Once the masterclock is enabled, always perform request in
2227          * order to update it.
2228          *
2229          * In order to enable masterclock, the host clocksource must be TSC
2230          * and the vcpus need to have matched TSCs.  When that happens,
2231          * perform request to enable masterclock.
2232          */
2233         if (ka->use_master_clock ||
2234             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2235                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2236
2237         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2238                             atomic_read(&vcpu->kvm->online_vcpus),
2239                             ka->use_master_clock, gtod->clock.vclock_mode);
2240 #endif
2241 }
2242
2243 /*
2244  * Multiply tsc by a fixed point number represented by ratio.
2245  *
2246  * The most significant 64-N bits (mult) of ratio represent the
2247  * integral part of the fixed point number; the remaining N bits
2248  * (frac) represent the fractional part, ie. ratio represents a fixed
2249  * point number (mult + frac * 2^(-N)).
2250  *
2251  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2252  */
2253 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2254 {
2255         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2256 }
2257
2258 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2259 {
2260         u64 _tsc = tsc;
2261         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2262
2263         if (ratio != kvm_default_tsc_scaling_ratio)
2264                 _tsc = __scale_tsc(ratio, tsc);
2265
2266         return _tsc;
2267 }
2268 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2269
2270 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2271 {
2272         u64 tsc;
2273
2274         tsc = kvm_scale_tsc(vcpu, rdtsc());
2275
2276         return target_tsc - tsc;
2277 }
2278
2279 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2280 {
2281         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2282 }
2283 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2284
2285 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2286 {
2287         vcpu->arch.l1_tsc_offset = offset;
2288         vcpu->arch.tsc_offset = static_call(kvm_x86_write_l1_tsc_offset)(vcpu, offset);
2289 }
2290
2291 static inline bool kvm_check_tsc_unstable(void)
2292 {
2293 #ifdef CONFIG_X86_64
2294         /*
2295          * TSC is marked unstable when we're running on Hyper-V,
2296          * 'TSC page' clocksource is good.
2297          */
2298         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2299                 return false;
2300 #endif
2301         return check_tsc_unstable();
2302 }
2303
2304 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2305 {
2306         struct kvm *kvm = vcpu->kvm;
2307         u64 offset, ns, elapsed;
2308         unsigned long flags;
2309         bool matched;
2310         bool already_matched;
2311         bool synchronizing = false;
2312
2313         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2314         offset = kvm_compute_tsc_offset(vcpu, data);
2315         ns = get_kvmclock_base_ns();
2316         elapsed = ns - kvm->arch.last_tsc_nsec;
2317
2318         if (vcpu->arch.virtual_tsc_khz) {
2319                 if (data == 0) {
2320                         /*
2321                          * detection of vcpu initialization -- need to sync
2322                          * with other vCPUs. This particularly helps to keep
2323                          * kvm_clock stable after CPU hotplug
2324                          */
2325                         synchronizing = true;
2326                 } else {
2327                         u64 tsc_exp = kvm->arch.last_tsc_write +
2328                                                 nsec_to_cycles(vcpu, elapsed);
2329                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2330                         /*
2331                          * Special case: TSC write with a small delta (1 second)
2332                          * of virtual cycle time against real time is
2333                          * interpreted as an attempt to synchronize the CPU.
2334                          */
2335                         synchronizing = data < tsc_exp + tsc_hz &&
2336                                         data + tsc_hz > tsc_exp;
2337                 }
2338         }
2339
2340         /*
2341          * For a reliable TSC, we can match TSC offsets, and for an unstable
2342          * TSC, we add elapsed time in this computation.  We could let the
2343          * compensation code attempt to catch up if we fall behind, but
2344          * it's better to try to match offsets from the beginning.
2345          */
2346         if (synchronizing &&
2347             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2348                 if (!kvm_check_tsc_unstable()) {
2349                         offset = kvm->arch.cur_tsc_offset;
2350                 } else {
2351                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2352                         data += delta;
2353                         offset = kvm_compute_tsc_offset(vcpu, data);
2354                 }
2355                 matched = true;
2356                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2357         } else {
2358                 /*
2359                  * We split periods of matched TSC writes into generations.
2360                  * For each generation, we track the original measured
2361                  * nanosecond time, offset, and write, so if TSCs are in
2362                  * sync, we can match exact offset, and if not, we can match
2363                  * exact software computation in compute_guest_tsc()
2364                  *
2365                  * These values are tracked in kvm->arch.cur_xxx variables.
2366                  */
2367                 kvm->arch.cur_tsc_generation++;
2368                 kvm->arch.cur_tsc_nsec = ns;
2369                 kvm->arch.cur_tsc_write = data;
2370                 kvm->arch.cur_tsc_offset = offset;
2371                 matched = false;
2372         }
2373
2374         /*
2375          * We also track th most recent recorded KHZ, write and time to
2376          * allow the matching interval to be extended at each write.
2377          */
2378         kvm->arch.last_tsc_nsec = ns;
2379         kvm->arch.last_tsc_write = data;
2380         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2381
2382         vcpu->arch.last_guest_tsc = data;
2383
2384         /* Keep track of which generation this VCPU has synchronized to */
2385         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2386         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2387         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2388
2389         kvm_vcpu_write_tsc_offset(vcpu, offset);
2390         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2391
2392         spin_lock_irqsave(&kvm->arch.pvclock_gtod_sync_lock, flags);
2393         if (!matched) {
2394                 kvm->arch.nr_vcpus_matched_tsc = 0;
2395         } else if (!already_matched) {
2396                 kvm->arch.nr_vcpus_matched_tsc++;
2397         }
2398
2399         kvm_track_tsc_matching(vcpu);
2400         spin_unlock_irqrestore(&kvm->arch.pvclock_gtod_sync_lock, flags);
2401 }
2402
2403 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2404                                            s64 adjustment)
2405 {
2406         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2407         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2408 }
2409
2410 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2411 {
2412         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2413                 WARN_ON(adjustment < 0);
2414         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2415         adjust_tsc_offset_guest(vcpu, adjustment);
2416 }
2417
2418 #ifdef CONFIG_X86_64
2419
2420 static u64 read_tsc(void)
2421 {
2422         u64 ret = (u64)rdtsc_ordered();
2423         u64 last = pvclock_gtod_data.clock.cycle_last;
2424
2425         if (likely(ret >= last))
2426                 return ret;
2427
2428         /*
2429          * GCC likes to generate cmov here, but this branch is extremely
2430          * predictable (it's just a function of time and the likely is
2431          * very likely) and there's a data dependence, so force GCC
2432          * to generate a branch instead.  I don't barrier() because
2433          * we don't actually need a barrier, and if this function
2434          * ever gets inlined it will generate worse code.
2435          */
2436         asm volatile ("");
2437         return last;
2438 }
2439
2440 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2441                           int *mode)
2442 {
2443         long v;
2444         u64 tsc_pg_val;
2445
2446         switch (clock->vclock_mode) {
2447         case VDSO_CLOCKMODE_HVCLOCK:
2448                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2449                                                   tsc_timestamp);
2450                 if (tsc_pg_val != U64_MAX) {
2451                         /* TSC page valid */
2452                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2453                         v = (tsc_pg_val - clock->cycle_last) &
2454                                 clock->mask;
2455                 } else {
2456                         /* TSC page invalid */
2457                         *mode = VDSO_CLOCKMODE_NONE;
2458                 }
2459                 break;
2460         case VDSO_CLOCKMODE_TSC:
2461                 *mode = VDSO_CLOCKMODE_TSC;
2462                 *tsc_timestamp = read_tsc();
2463                 v = (*tsc_timestamp - clock->cycle_last) &
2464                         clock->mask;
2465                 break;
2466         default:
2467                 *mode = VDSO_CLOCKMODE_NONE;
2468         }
2469
2470         if (*mode == VDSO_CLOCKMODE_NONE)
2471                 *tsc_timestamp = v = 0;
2472
2473         return v * clock->mult;
2474 }
2475
2476 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2477 {
2478         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2479         unsigned long seq;
2480         int mode;
2481         u64 ns;
2482
2483         do {
2484                 seq = read_seqcount_begin(&gtod->seq);
2485                 ns = gtod->raw_clock.base_cycles;
2486                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2487                 ns >>= gtod->raw_clock.shift;
2488                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2489         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2490         *t = ns;
2491
2492         return mode;
2493 }
2494
2495 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2496 {
2497         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2498         unsigned long seq;
2499         int mode;
2500         u64 ns;
2501
2502         do {
2503                 seq = read_seqcount_begin(&gtod->seq);
2504                 ts->tv_sec = gtod->wall_time_sec;
2505                 ns = gtod->clock.base_cycles;
2506                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2507                 ns >>= gtod->clock.shift;
2508         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2509
2510         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2511         ts->tv_nsec = ns;
2512
2513         return mode;
2514 }
2515
2516 /* returns true if host is using TSC based clocksource */
2517 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2518 {
2519         /* checked again under seqlock below */
2520         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2521                 return false;
2522
2523         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2524                                                       tsc_timestamp));
2525 }
2526
2527 /* returns true if host is using TSC based clocksource */
2528 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2529                                            u64 *tsc_timestamp)
2530 {
2531         /* checked again under seqlock below */
2532         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2533                 return false;
2534
2535         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2536 }
2537 #endif
2538
2539 /*
2540  *
2541  * Assuming a stable TSC across physical CPUS, and a stable TSC
2542  * across virtual CPUs, the following condition is possible.
2543  * Each numbered line represents an event visible to both
2544  * CPUs at the next numbered event.
2545  *
2546  * "timespecX" represents host monotonic time. "tscX" represents
2547  * RDTSC value.
2548  *
2549  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2550  *
2551  * 1.  read timespec0,tsc0
2552  * 2.                                   | timespec1 = timespec0 + N
2553  *                                      | tsc1 = tsc0 + M
2554  * 3. transition to guest               | transition to guest
2555  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2556  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2557  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2558  *
2559  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2560  *
2561  *      - ret0 < ret1
2562  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2563  *              ...
2564  *      - 0 < N - M => M < N
2565  *
2566  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2567  * always the case (the difference between two distinct xtime instances
2568  * might be smaller then the difference between corresponding TSC reads,
2569  * when updating guest vcpus pvclock areas).
2570  *
2571  * To avoid that problem, do not allow visibility of distinct
2572  * system_timestamp/tsc_timestamp values simultaneously: use a master
2573  * copy of host monotonic time values. Update that master copy
2574  * in lockstep.
2575  *
2576  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2577  *
2578  */
2579
2580 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2581 {
2582 #ifdef CONFIG_X86_64
2583         struct kvm_arch *ka = &kvm->arch;
2584         int vclock_mode;
2585         bool host_tsc_clocksource, vcpus_matched;
2586
2587         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2588                         atomic_read(&kvm->online_vcpus));
2589
2590         /*
2591          * If the host uses TSC clock, then passthrough TSC as stable
2592          * to the guest.
2593          */
2594         host_tsc_clocksource = kvm_get_time_and_clockread(
2595                                         &ka->master_kernel_ns,
2596                                         &ka->master_cycle_now);
2597
2598         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2599                                 && !ka->backwards_tsc_observed
2600                                 && !ka->boot_vcpu_runs_old_kvmclock;
2601
2602         if (ka->use_master_clock)
2603                 atomic_set(&kvm_guest_has_master_clock, 1);
2604
2605         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2606         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2607                                         vcpus_matched);
2608 #endif
2609 }
2610
2611 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2612 {
2613         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2614 }
2615
2616 static void kvm_gen_update_masterclock(struct kvm *kvm)
2617 {
2618 #ifdef CONFIG_X86_64
2619         int i;
2620         struct kvm_vcpu *vcpu;
2621         struct kvm_arch *ka = &kvm->arch;
2622         unsigned long flags;
2623
2624         kvm_hv_invalidate_tsc_page(kvm);
2625
2626         kvm_make_mclock_inprogress_request(kvm);
2627
2628         /* no guest entries from this point */
2629         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2630         pvclock_update_vm_gtod_copy(kvm);
2631         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2632
2633         kvm_for_each_vcpu(i, vcpu, kvm)
2634                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2635
2636         /* guest entries allowed */
2637         kvm_for_each_vcpu(i, vcpu, kvm)
2638                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2639 #endif
2640 }
2641
2642 u64 get_kvmclock_ns(struct kvm *kvm)
2643 {
2644         struct kvm_arch *ka = &kvm->arch;
2645         struct pvclock_vcpu_time_info hv_clock;
2646         unsigned long flags;
2647         u64 ret;
2648
2649         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2650         if (!ka->use_master_clock) {
2651                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2652                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2653         }
2654
2655         hv_clock.tsc_timestamp = ka->master_cycle_now;
2656         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2657         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2658
2659         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2660         get_cpu();
2661
2662         if (__this_cpu_read(cpu_tsc_khz)) {
2663                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2664                                    &hv_clock.tsc_shift,
2665                                    &hv_clock.tsc_to_system_mul);
2666                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2667         } else
2668                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2669
2670         put_cpu();
2671
2672         return ret;
2673 }
2674
2675 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2676                                    struct gfn_to_hva_cache *cache,
2677                                    unsigned int offset)
2678 {
2679         struct kvm_vcpu_arch *vcpu = &v->arch;
2680         struct pvclock_vcpu_time_info guest_hv_clock;
2681
2682         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2683                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2684                 return;
2685
2686         /* This VCPU is paused, but it's legal for a guest to read another
2687          * VCPU's kvmclock, so we really have to follow the specification where
2688          * it says that version is odd if data is being modified, and even after
2689          * it is consistent.
2690          *
2691          * Version field updates must be kept separate.  This is because
2692          * kvm_write_guest_cached might use a "rep movs" instruction, and
2693          * writes within a string instruction are weakly ordered.  So there
2694          * are three writes overall.
2695          *
2696          * As a small optimization, only write the version field in the first
2697          * and third write.  The vcpu->pv_time cache is still valid, because the
2698          * version field is the first in the struct.
2699          */
2700         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2701
2702         if (guest_hv_clock.version & 1)
2703                 ++guest_hv_clock.version;  /* first time write, random junk */
2704
2705         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2706         kvm_write_guest_offset_cached(v->kvm, cache,
2707                                       &vcpu->hv_clock, offset,
2708                                       sizeof(vcpu->hv_clock.version));
2709
2710         smp_wmb();
2711
2712         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2713         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2714
2715         if (vcpu->pvclock_set_guest_stopped_request) {
2716                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2717                 vcpu->pvclock_set_guest_stopped_request = false;
2718         }
2719
2720         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2721
2722         kvm_write_guest_offset_cached(v->kvm, cache,
2723                                       &vcpu->hv_clock, offset,
2724                                       sizeof(vcpu->hv_clock));
2725
2726         smp_wmb();
2727
2728         vcpu->hv_clock.version++;
2729         kvm_write_guest_offset_cached(v->kvm, cache,
2730                                      &vcpu->hv_clock, offset,
2731                                      sizeof(vcpu->hv_clock.version));
2732 }
2733
2734 static int kvm_guest_time_update(struct kvm_vcpu *v)
2735 {
2736         unsigned long flags, tgt_tsc_khz;
2737         struct kvm_vcpu_arch *vcpu = &v->arch;
2738         struct kvm_arch *ka = &v->kvm->arch;
2739         s64 kernel_ns;
2740         u64 tsc_timestamp, host_tsc;
2741         u8 pvclock_flags;
2742         bool use_master_clock;
2743
2744         kernel_ns = 0;
2745         host_tsc = 0;
2746
2747         /*
2748          * If the host uses TSC clock, then passthrough TSC as stable
2749          * to the guest.
2750          */
2751         spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
2752         use_master_clock = ka->use_master_clock;
2753         if (use_master_clock) {
2754                 host_tsc = ka->master_cycle_now;
2755                 kernel_ns = ka->master_kernel_ns;
2756         }
2757         spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
2758
2759         /* Keep irq disabled to prevent changes to the clock */
2760         local_irq_save(flags);
2761         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2762         if (unlikely(tgt_tsc_khz == 0)) {
2763                 local_irq_restore(flags);
2764                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2765                 return 1;
2766         }
2767         if (!use_master_clock) {
2768                 host_tsc = rdtsc();
2769                 kernel_ns = get_kvmclock_base_ns();
2770         }
2771
2772         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2773
2774         /*
2775          * We may have to catch up the TSC to match elapsed wall clock
2776          * time for two reasons, even if kvmclock is used.
2777          *   1) CPU could have been running below the maximum TSC rate
2778          *   2) Broken TSC compensation resets the base at each VCPU
2779          *      entry to avoid unknown leaps of TSC even when running
2780          *      again on the same CPU.  This may cause apparent elapsed
2781          *      time to disappear, and the guest to stand still or run
2782          *      very slowly.
2783          */
2784         if (vcpu->tsc_catchup) {
2785                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2786                 if (tsc > tsc_timestamp) {
2787                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2788                         tsc_timestamp = tsc;
2789                 }
2790         }
2791
2792         local_irq_restore(flags);
2793
2794         /* With all the info we got, fill in the values */
2795
2796         if (kvm_has_tsc_control)
2797                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2798
2799         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2800                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2801                                    &vcpu->hv_clock.tsc_shift,
2802                                    &vcpu->hv_clock.tsc_to_system_mul);
2803                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2804         }
2805
2806         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2807         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2808         vcpu->last_guest_tsc = tsc_timestamp;
2809
2810         /* If the host uses TSC clocksource, then it is stable */
2811         pvclock_flags = 0;
2812         if (use_master_clock)
2813                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2814
2815         vcpu->hv_clock.flags = pvclock_flags;
2816
2817         if (vcpu->pv_time_enabled)
2818                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
2819         if (vcpu->xen.vcpu_info_set)
2820                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
2821                                        offsetof(struct compat_vcpu_info, time));
2822         if (vcpu->xen.vcpu_time_info_set)
2823                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
2824         if (v == kvm_get_vcpu(v->kvm, 0))
2825                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2826         return 0;
2827 }
2828
2829 /*
2830  * kvmclock updates which are isolated to a given vcpu, such as
2831  * vcpu->cpu migration, should not allow system_timestamp from
2832  * the rest of the vcpus to remain static. Otherwise ntp frequency
2833  * correction applies to one vcpu's system_timestamp but not
2834  * the others.
2835  *
2836  * So in those cases, request a kvmclock update for all vcpus.
2837  * We need to rate-limit these requests though, as they can
2838  * considerably slow guests that have a large number of vcpus.
2839  * The time for a remote vcpu to update its kvmclock is bound
2840  * by the delay we use to rate-limit the updates.
2841  */
2842
2843 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2844
2845 static void kvmclock_update_fn(struct work_struct *work)
2846 {
2847         int i;
2848         struct delayed_work *dwork = to_delayed_work(work);
2849         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2850                                            kvmclock_update_work);
2851         struct kvm *kvm = container_of(ka, struct kvm, arch);
2852         struct kvm_vcpu *vcpu;
2853
2854         kvm_for_each_vcpu(i, vcpu, kvm) {
2855                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2856                 kvm_vcpu_kick(vcpu);
2857         }
2858 }
2859
2860 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2861 {
2862         struct kvm *kvm = v->kvm;
2863
2864         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2865         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2866                                         KVMCLOCK_UPDATE_DELAY);
2867 }
2868
2869 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2870
2871 static void kvmclock_sync_fn(struct work_struct *work)
2872 {
2873         struct delayed_work *dwork = to_delayed_work(work);
2874         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2875                                            kvmclock_sync_work);
2876         struct kvm *kvm = container_of(ka, struct kvm, arch);
2877
2878         if (!kvmclock_periodic_sync)
2879                 return;
2880
2881         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2882         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2883                                         KVMCLOCK_SYNC_PERIOD);
2884 }
2885
2886 /*
2887  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2888  */
2889 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2890 {
2891         /* McStatusWrEn enabled? */
2892         if (guest_cpuid_is_amd_or_hygon(vcpu))
2893                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2894
2895         return false;
2896 }
2897
2898 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2899 {
2900         u64 mcg_cap = vcpu->arch.mcg_cap;
2901         unsigned bank_num = mcg_cap & 0xff;
2902         u32 msr = msr_info->index;
2903         u64 data = msr_info->data;
2904
2905         switch (msr) {
2906         case MSR_IA32_MCG_STATUS:
2907                 vcpu->arch.mcg_status = data;
2908                 break;
2909         case MSR_IA32_MCG_CTL:
2910                 if (!(mcg_cap & MCG_CTL_P) &&
2911                     (data || !msr_info->host_initiated))
2912                         return 1;
2913                 if (data != 0 && data != ~(u64)0)
2914                         return 1;
2915                 vcpu->arch.mcg_ctl = data;
2916                 break;
2917         default:
2918                 if (msr >= MSR_IA32_MC0_CTL &&
2919                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2920                         u32 offset = array_index_nospec(
2921                                 msr - MSR_IA32_MC0_CTL,
2922                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2923
2924                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2925                          * some Linux kernels though clear bit 10 in bank 4 to
2926                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2927                          * this to avoid an uncatched #GP in the guest
2928                          */
2929                         if ((offset & 0x3) == 0 &&
2930                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2931                                 return -1;
2932
2933                         /* MCi_STATUS */
2934                         if (!msr_info->host_initiated &&
2935                             (offset & 0x3) == 1 && data != 0) {
2936                                 if (!can_set_mci_status(vcpu))
2937                                         return -1;
2938                         }
2939
2940                         vcpu->arch.mce_banks[offset] = data;
2941                         break;
2942                 }
2943                 return 1;
2944         }
2945         return 0;
2946 }
2947
2948 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2949 {
2950         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2951
2952         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2953 }
2954
2955 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2956 {
2957         gpa_t gpa = data & ~0x3f;
2958
2959         /* Bits 4:5 are reserved, Should be zero */
2960         if (data & 0x30)
2961                 return 1;
2962
2963         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2964             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2965                 return 1;
2966
2967         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2968             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2969                 return 1;
2970
2971         if (!lapic_in_kernel(vcpu))
2972                 return data ? 1 : 0;
2973
2974         vcpu->arch.apf.msr_en_val = data;
2975
2976         if (!kvm_pv_async_pf_enabled(vcpu)) {
2977                 kvm_clear_async_pf_completion_queue(vcpu);
2978                 kvm_async_pf_hash_reset(vcpu);
2979                 return 0;
2980         }
2981
2982         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2983                                         sizeof(u64)))
2984                 return 1;
2985
2986         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2987         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2988
2989         kvm_async_pf_wakeup_all(vcpu);
2990
2991         return 0;
2992 }
2993
2994 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2995 {
2996         /* Bits 8-63 are reserved */
2997         if (data >> 8)
2998                 return 1;
2999
3000         if (!lapic_in_kernel(vcpu))
3001                 return 1;
3002
3003         vcpu->arch.apf.msr_int_val = data;
3004
3005         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3006
3007         return 0;
3008 }
3009
3010 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3011 {
3012         vcpu->arch.pv_time_enabled = false;
3013         vcpu->arch.time = 0;
3014 }
3015
3016 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3017 {
3018         ++vcpu->stat.tlb_flush;
3019         static_call(kvm_x86_tlb_flush_all)(vcpu);
3020 }
3021
3022 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3023 {
3024         ++vcpu->stat.tlb_flush;
3025         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3026 }
3027
3028 static void record_steal_time(struct kvm_vcpu *vcpu)
3029 {
3030         struct kvm_host_map map;
3031         struct kvm_steal_time *st;
3032
3033         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3034                 kvm_xen_runstate_set_running(vcpu);
3035                 return;
3036         }
3037
3038         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3039                 return;
3040
3041         /* -EAGAIN is returned in atomic context so we can just return. */
3042         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
3043                         &map, &vcpu->arch.st.cache, false))
3044                 return;
3045
3046         st = map.hva +
3047                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3048
3049         /*
3050          * Doing a TLB flush here, on the guest's behalf, can avoid
3051          * expensive IPIs.
3052          */
3053         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3054                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3055                                        st->preempted & KVM_VCPU_FLUSH_TLB);
3056                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
3057                         kvm_vcpu_flush_tlb_guest(vcpu);
3058         }
3059
3060         vcpu->arch.st.preempted = 0;
3061
3062         if (st->version & 1)
3063                 st->version += 1;  /* first time write, random junk */
3064
3065         st->version += 1;
3066
3067         smp_wmb();
3068
3069         st->steal += current->sched_info.run_delay -
3070                 vcpu->arch.st.last_steal;
3071         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3072
3073         smp_wmb();
3074
3075         st->version += 1;
3076
3077         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
3078 }
3079
3080 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3081 {
3082         bool pr = false;
3083         u32 msr = msr_info->index;
3084         u64 data = msr_info->data;
3085
3086         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3087                 return kvm_xen_write_hypercall_page(vcpu, data);
3088
3089         switch (msr) {
3090         case MSR_AMD64_NB_CFG:
3091         case MSR_IA32_UCODE_WRITE:
3092         case MSR_VM_HSAVE_PA:
3093         case MSR_AMD64_PATCH_LOADER:
3094         case MSR_AMD64_BU_CFG2:
3095         case MSR_AMD64_DC_CFG:
3096         case MSR_F15H_EX_CFG:
3097                 break;
3098
3099         case MSR_IA32_UCODE_REV:
3100                 if (msr_info->host_initiated)
3101                         vcpu->arch.microcode_version = data;
3102                 break;
3103         case MSR_IA32_ARCH_CAPABILITIES:
3104                 if (!msr_info->host_initiated)
3105                         return 1;
3106                 vcpu->arch.arch_capabilities = data;
3107                 break;
3108         case MSR_IA32_PERF_CAPABILITIES: {
3109                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3110
3111                 if (!msr_info->host_initiated)
3112                         return 1;
3113                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3114                         return 1;
3115                 if (data & ~msr_ent.data)
3116                         return 1;
3117
3118                 vcpu->arch.perf_capabilities = data;
3119
3120                 return 0;
3121                 }
3122         case MSR_EFER:
3123                 return set_efer(vcpu, msr_info);
3124         case MSR_K7_HWCR:
3125                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3126                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3127                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3128
3129                 /* Handle McStatusWrEn */
3130                 if (data == BIT_ULL(18)) {
3131                         vcpu->arch.msr_hwcr = data;
3132                 } else if (data != 0) {
3133                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3134                                     data);
3135                         return 1;
3136                 }
3137                 break;
3138         case MSR_FAM10H_MMIO_CONF_BASE:
3139                 if (data != 0) {
3140                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3141                                     "0x%llx\n", data);
3142                         return 1;
3143                 }
3144                 break;
3145         case 0x200 ... 0x2ff:
3146                 return kvm_mtrr_set_msr(vcpu, msr, data);
3147         case MSR_IA32_APICBASE:
3148                 return kvm_set_apic_base(vcpu, msr_info);
3149         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3150                 return kvm_x2apic_msr_write(vcpu, msr, data);
3151         case MSR_IA32_TSC_DEADLINE:
3152                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3153                 break;
3154         case MSR_IA32_TSC_ADJUST:
3155                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3156                         if (!msr_info->host_initiated) {
3157                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3158                                 adjust_tsc_offset_guest(vcpu, adj);
3159                         }
3160                         vcpu->arch.ia32_tsc_adjust_msr = data;
3161                 }
3162                 break;
3163         case MSR_IA32_MISC_ENABLE:
3164                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3165                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3166                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3167                                 return 1;
3168                         vcpu->arch.ia32_misc_enable_msr = data;
3169                         kvm_update_cpuid_runtime(vcpu);
3170                 } else {
3171                         vcpu->arch.ia32_misc_enable_msr = data;
3172                 }
3173                 break;
3174         case MSR_IA32_SMBASE:
3175                 if (!msr_info->host_initiated)
3176                         return 1;
3177                 vcpu->arch.smbase = data;
3178                 break;
3179         case MSR_IA32_POWER_CTL:
3180                 vcpu->arch.msr_ia32_power_ctl = data;
3181                 break;
3182         case MSR_IA32_TSC:
3183                 if (msr_info->host_initiated) {
3184                         kvm_synchronize_tsc(vcpu, data);
3185                 } else {
3186                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3187                         adjust_tsc_offset_guest(vcpu, adj);
3188                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3189                 }
3190                 break;
3191         case MSR_IA32_XSS:
3192                 if (!msr_info->host_initiated &&
3193                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3194                         return 1;
3195                 /*
3196                  * KVM supports exposing PT to the guest, but does not support
3197                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3198                  * XSAVES/XRSTORS to save/restore PT MSRs.
3199                  */
3200                 if (data & ~supported_xss)
3201                         return 1;
3202                 vcpu->arch.ia32_xss = data;
3203                 break;
3204         case MSR_SMI_COUNT:
3205                 if (!msr_info->host_initiated)
3206                         return 1;
3207                 vcpu->arch.smi_count = data;
3208                 break;
3209         case MSR_KVM_WALL_CLOCK_NEW:
3210                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3211                         return 1;
3212
3213                 vcpu->kvm->arch.wall_clock = data;
3214                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3215                 break;
3216         case MSR_KVM_WALL_CLOCK:
3217                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3218                         return 1;
3219
3220                 vcpu->kvm->arch.wall_clock = data;
3221                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3222                 break;
3223         case MSR_KVM_SYSTEM_TIME_NEW:
3224                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3225                         return 1;
3226
3227                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3228                 break;
3229         case MSR_KVM_SYSTEM_TIME:
3230                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3231                         return 1;
3232
3233                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3234                 break;
3235         case MSR_KVM_ASYNC_PF_EN:
3236                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3237                         return 1;
3238
3239                 if (kvm_pv_enable_async_pf(vcpu, data))
3240                         return 1;
3241                 break;
3242         case MSR_KVM_ASYNC_PF_INT:
3243                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3244                         return 1;
3245
3246                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3247                         return 1;
3248                 break;
3249         case MSR_KVM_ASYNC_PF_ACK:
3250                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3251                         return 1;
3252                 if (data & 0x1) {
3253                         vcpu->arch.apf.pageready_pending = false;
3254                         kvm_check_async_pf_completion(vcpu);
3255                 }
3256                 break;
3257         case MSR_KVM_STEAL_TIME:
3258                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3259                         return 1;
3260
3261                 if (unlikely(!sched_info_on()))
3262                         return 1;
3263
3264                 if (data & KVM_STEAL_RESERVED_MASK)
3265                         return 1;
3266
3267                 vcpu->arch.st.msr_val = data;
3268
3269                 if (!(data & KVM_MSR_ENABLED))
3270                         break;
3271
3272                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3273
3274                 break;
3275         case MSR_KVM_PV_EOI_EN:
3276                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3277                         return 1;
3278
3279                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3280                         return 1;
3281                 break;
3282
3283         case MSR_KVM_POLL_CONTROL:
3284                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3285                         return 1;
3286
3287                 /* only enable bit supported */
3288                 if (data & (-1ULL << 1))
3289                         return 1;
3290
3291                 vcpu->arch.msr_kvm_poll_control = data;
3292                 break;
3293
3294         case MSR_IA32_MCG_CTL:
3295         case MSR_IA32_MCG_STATUS:
3296         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3297                 return set_msr_mce(vcpu, msr_info);
3298
3299         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3300         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3301                 pr = true;
3302                 fallthrough;
3303         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3304         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3305                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3306                         return kvm_pmu_set_msr(vcpu, msr_info);
3307
3308                 if (pr || data != 0)
3309                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3310                                     "0x%x data 0x%llx\n", msr, data);
3311                 break;
3312         case MSR_K7_CLK_CTL:
3313                 /*
3314                  * Ignore all writes to this no longer documented MSR.
3315                  * Writes are only relevant for old K7 processors,
3316                  * all pre-dating SVM, but a recommended workaround from
3317                  * AMD for these chips. It is possible to specify the
3318                  * affected processor models on the command line, hence
3319                  * the need to ignore the workaround.
3320                  */
3321                 break;
3322         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3323         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3324         case HV_X64_MSR_SYNDBG_OPTIONS:
3325         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3326         case HV_X64_MSR_CRASH_CTL:
3327         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3328         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3329         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3330         case HV_X64_MSR_TSC_EMULATION_STATUS:
3331                 return kvm_hv_set_msr_common(vcpu, msr, data,
3332                                              msr_info->host_initiated);
3333         case MSR_IA32_BBL_CR_CTL3:
3334                 /* Drop writes to this legacy MSR -- see rdmsr
3335                  * counterpart for further detail.
3336                  */
3337                 if (report_ignored_msrs)
3338                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3339                                 msr, data);
3340                 break;
3341         case MSR_AMD64_OSVW_ID_LENGTH:
3342                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3343                         return 1;
3344                 vcpu->arch.osvw.length = data;
3345                 break;
3346         case MSR_AMD64_OSVW_STATUS:
3347                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3348                         return 1;
3349                 vcpu->arch.osvw.status = data;
3350                 break;
3351         case MSR_PLATFORM_INFO:
3352                 if (!msr_info->host_initiated ||
3353                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3354                      cpuid_fault_enabled(vcpu)))
3355                         return 1;
3356                 vcpu->arch.msr_platform_info = data;
3357                 break;
3358         case MSR_MISC_FEATURES_ENABLES:
3359                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3360                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3361                      !supports_cpuid_fault(vcpu)))
3362                         return 1;
3363                 vcpu->arch.msr_misc_features_enables = data;
3364                 break;
3365         default:
3366                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3367                         return kvm_pmu_set_msr(vcpu, msr_info);
3368                 return KVM_MSR_RET_INVALID;
3369         }
3370         return 0;
3371 }
3372 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3373
3374 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3375 {
3376         u64 data;
3377         u64 mcg_cap = vcpu->arch.mcg_cap;
3378         unsigned bank_num = mcg_cap & 0xff;
3379
3380         switch (msr) {
3381         case MSR_IA32_P5_MC_ADDR:
3382         case MSR_IA32_P5_MC_TYPE:
3383                 data = 0;
3384                 break;
3385         case MSR_IA32_MCG_CAP:
3386                 data = vcpu->arch.mcg_cap;
3387                 break;
3388         case MSR_IA32_MCG_CTL:
3389                 if (!(mcg_cap & MCG_CTL_P) && !host)
3390                         return 1;
3391                 data = vcpu->arch.mcg_ctl;
3392                 break;
3393         case MSR_IA32_MCG_STATUS:
3394                 data = vcpu->arch.mcg_status;
3395                 break;
3396         default:
3397                 if (msr >= MSR_IA32_MC0_CTL &&
3398                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3399                         u32 offset = array_index_nospec(
3400                                 msr - MSR_IA32_MC0_CTL,
3401                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3402
3403                         data = vcpu->arch.mce_banks[offset];
3404                         break;
3405                 }
3406                 return 1;
3407         }
3408         *pdata = data;
3409         return 0;
3410 }
3411
3412 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3413 {
3414         switch (msr_info->index) {
3415         case MSR_IA32_PLATFORM_ID:
3416         case MSR_IA32_EBL_CR_POWERON:
3417         case MSR_IA32_LASTBRANCHFROMIP:
3418         case MSR_IA32_LASTBRANCHTOIP:
3419         case MSR_IA32_LASTINTFROMIP:
3420         case MSR_IA32_LASTINTTOIP:
3421         case MSR_K8_SYSCFG:
3422         case MSR_K8_TSEG_ADDR:
3423         case MSR_K8_TSEG_MASK:
3424         case MSR_VM_HSAVE_PA:
3425         case MSR_K8_INT_PENDING_MSG:
3426         case MSR_AMD64_NB_CFG:
3427         case MSR_FAM10H_MMIO_CONF_BASE:
3428         case MSR_AMD64_BU_CFG2:
3429         case MSR_IA32_PERF_CTL:
3430         case MSR_AMD64_DC_CFG:
3431         case MSR_F15H_EX_CFG:
3432         /*
3433          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3434          * limit) MSRs. Just return 0, as we do not want to expose the host
3435          * data here. Do not conditionalize this on CPUID, as KVM does not do
3436          * so for existing CPU-specific MSRs.
3437          */
3438         case MSR_RAPL_POWER_UNIT:
3439         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3440         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3441         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3442         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3443                 msr_info->data = 0;
3444                 break;
3445         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3446                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3447                         return kvm_pmu_get_msr(vcpu, msr_info);
3448                 if (!msr_info->host_initiated)
3449                         return 1;
3450                 msr_info->data = 0;
3451                 break;
3452         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3453         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3454         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3455         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3456                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3457                         return kvm_pmu_get_msr(vcpu, msr_info);
3458                 msr_info->data = 0;
3459                 break;
3460         case MSR_IA32_UCODE_REV:
3461                 msr_info->data = vcpu->arch.microcode_version;
3462                 break;
3463         case MSR_IA32_ARCH_CAPABILITIES:
3464                 if (!msr_info->host_initiated &&
3465                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3466                         return 1;
3467                 msr_info->data = vcpu->arch.arch_capabilities;
3468                 break;
3469         case MSR_IA32_PERF_CAPABILITIES:
3470                 if (!msr_info->host_initiated &&
3471                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3472                         return 1;
3473                 msr_info->data = vcpu->arch.perf_capabilities;
3474                 break;
3475         case MSR_IA32_POWER_CTL:
3476                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3477                 break;
3478         case MSR_IA32_TSC: {
3479                 /*
3480                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3481                  * even when not intercepted. AMD manual doesn't explicitly
3482                  * state this but appears to behave the same.
3483                  *
3484                  * On userspace reads and writes, however, we unconditionally
3485                  * return L1's TSC value to ensure backwards-compatible
3486                  * behavior for migration.
3487                  */
3488                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3489                                                             vcpu->arch.tsc_offset;
3490
3491                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3492                 break;
3493         }
3494         case MSR_MTRRcap:
3495         case 0x200 ... 0x2ff:
3496                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3497         case 0xcd: /* fsb frequency */
3498                 msr_info->data = 3;
3499                 break;
3500                 /*
3501                  * MSR_EBC_FREQUENCY_ID
3502                  * Conservative value valid for even the basic CPU models.
3503                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3504                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3505                  * and 266MHz for model 3, or 4. Set Core Clock
3506                  * Frequency to System Bus Frequency Ratio to 1 (bits
3507                  * 31:24) even though these are only valid for CPU
3508                  * models > 2, however guests may end up dividing or
3509                  * multiplying by zero otherwise.
3510                  */
3511         case MSR_EBC_FREQUENCY_ID:
3512                 msr_info->data = 1 << 24;
3513                 break;
3514         case MSR_IA32_APICBASE:
3515                 msr_info->data = kvm_get_apic_base(vcpu);
3516                 break;
3517         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3518                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3519         case MSR_IA32_TSC_DEADLINE:
3520                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3521                 break;
3522         case MSR_IA32_TSC_ADJUST:
3523                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3524                 break;
3525         case MSR_IA32_MISC_ENABLE:
3526                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3527                 break;
3528         case MSR_IA32_SMBASE:
3529                 if (!msr_info->host_initiated)
3530                         return 1;
3531                 msr_info->data = vcpu->arch.smbase;
3532                 break;
3533         case MSR_SMI_COUNT:
3534                 msr_info->data = vcpu->arch.smi_count;
3535                 break;
3536         case MSR_IA32_PERF_STATUS:
3537                 /* TSC increment by tick */
3538                 msr_info->data = 1000ULL;
3539                 /* CPU multiplier */
3540                 msr_info->data |= (((uint64_t)4ULL) << 40);
3541                 break;
3542         case MSR_EFER:
3543                 msr_info->data = vcpu->arch.efer;
3544                 break;
3545         case MSR_KVM_WALL_CLOCK:
3546                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3547                         return 1;
3548
3549                 msr_info->data = vcpu->kvm->arch.wall_clock;
3550                 break;
3551         case MSR_KVM_WALL_CLOCK_NEW:
3552                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3553                         return 1;
3554
3555                 msr_info->data = vcpu->kvm->arch.wall_clock;
3556                 break;
3557         case MSR_KVM_SYSTEM_TIME:
3558                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3559                         return 1;
3560
3561                 msr_info->data = vcpu->arch.time;
3562                 break;
3563         case MSR_KVM_SYSTEM_TIME_NEW:
3564                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3565                         return 1;
3566
3567                 msr_info->data = vcpu->arch.time;
3568                 break;
3569         case MSR_KVM_ASYNC_PF_EN:
3570                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3571                         return 1;
3572
3573                 msr_info->data = vcpu->arch.apf.msr_en_val;
3574                 break;
3575         case MSR_KVM_ASYNC_PF_INT:
3576                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3577                         return 1;
3578
3579                 msr_info->data = vcpu->arch.apf.msr_int_val;
3580                 break;
3581         case MSR_KVM_ASYNC_PF_ACK:
3582                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3583                         return 1;
3584
3585                 msr_info->data = 0;
3586                 break;
3587         case MSR_KVM_STEAL_TIME:
3588                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3589                         return 1;
3590
3591                 msr_info->data = vcpu->arch.st.msr_val;
3592                 break;
3593         case MSR_KVM_PV_EOI_EN:
3594                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3595                         return 1;
3596
3597                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3598                 break;
3599         case MSR_KVM_POLL_CONTROL:
3600                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3601                         return 1;
3602
3603                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3604                 break;
3605         case MSR_IA32_P5_MC_ADDR:
3606         case MSR_IA32_P5_MC_TYPE:
3607         case MSR_IA32_MCG_CAP:
3608         case MSR_IA32_MCG_CTL:
3609         case MSR_IA32_MCG_STATUS:
3610         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3611                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3612                                    msr_info->host_initiated);
3613         case MSR_IA32_XSS:
3614                 if (!msr_info->host_initiated &&
3615                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3616                         return 1;
3617                 msr_info->data = vcpu->arch.ia32_xss;
3618                 break;
3619         case MSR_K7_CLK_CTL:
3620                 /*
3621                  * Provide expected ramp-up count for K7. All other
3622                  * are set to zero, indicating minimum divisors for
3623                  * every field.
3624                  *
3625                  * This prevents guest kernels on AMD host with CPU
3626                  * type 6, model 8 and higher from exploding due to
3627                  * the rdmsr failing.
3628                  */
3629                 msr_info->data = 0x20000000;
3630                 break;
3631         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3632         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3633         case HV_X64_MSR_SYNDBG_OPTIONS:
3634         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3635         case HV_X64_MSR_CRASH_CTL:
3636         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3637         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3638         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3639         case HV_X64_MSR_TSC_EMULATION_STATUS:
3640                 return kvm_hv_get_msr_common(vcpu,
3641                                              msr_info->index, &msr_info->data,
3642                                              msr_info->host_initiated);
3643         case MSR_IA32_BBL_CR_CTL3:
3644                 /* This legacy MSR exists but isn't fully documented in current
3645                  * silicon.  It is however accessed by winxp in very narrow
3646                  * scenarios where it sets bit #19, itself documented as
3647                  * a "reserved" bit.  Best effort attempt to source coherent
3648                  * read data here should the balance of the register be
3649                  * interpreted by the guest:
3650                  *
3651                  * L2 cache control register 3: 64GB range, 256KB size,
3652                  * enabled, latency 0x1, configured
3653                  */
3654                 msr_info->data = 0xbe702111;
3655                 break;
3656         case MSR_AMD64_OSVW_ID_LENGTH:
3657                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3658                         return 1;
3659                 msr_info->data = vcpu->arch.osvw.length;
3660                 break;
3661         case MSR_AMD64_OSVW_STATUS:
3662                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3663                         return 1;
3664                 msr_info->data = vcpu->arch.osvw.status;
3665                 break;
3666         case MSR_PLATFORM_INFO:
3667                 if (!msr_info->host_initiated &&
3668                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3669                         return 1;
3670                 msr_info->data = vcpu->arch.msr_platform_info;
3671                 break;
3672         case MSR_MISC_FEATURES_ENABLES:
3673                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3674                 break;
3675         case MSR_K7_HWCR:
3676                 msr_info->data = vcpu->arch.msr_hwcr;
3677                 break;
3678         default:
3679                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3680                         return kvm_pmu_get_msr(vcpu, msr_info);
3681                 return KVM_MSR_RET_INVALID;
3682         }
3683         return 0;
3684 }
3685 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3686
3687 /*
3688  * Read or write a bunch of msrs. All parameters are kernel addresses.
3689  *
3690  * @return number of msrs set successfully.
3691  */
3692 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3693                     struct kvm_msr_entry *entries,
3694                     int (*do_msr)(struct kvm_vcpu *vcpu,
3695                                   unsigned index, u64 *data))
3696 {
3697         int i;
3698
3699         for (i = 0; i < msrs->nmsrs; ++i)
3700                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3701                         break;
3702
3703         return i;
3704 }
3705
3706 /*
3707  * Read or write a bunch of msrs. Parameters are user addresses.
3708  *
3709  * @return number of msrs set successfully.
3710  */
3711 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3712                   int (*do_msr)(struct kvm_vcpu *vcpu,
3713                                 unsigned index, u64 *data),
3714                   int writeback)
3715 {
3716         struct kvm_msrs msrs;
3717         struct kvm_msr_entry *entries;
3718         int r, n;
3719         unsigned size;
3720
3721         r = -EFAULT;
3722         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3723                 goto out;
3724
3725         r = -E2BIG;
3726         if (msrs.nmsrs >= MAX_IO_MSRS)
3727                 goto out;
3728
3729         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3730         entries = memdup_user(user_msrs->entries, size);
3731         if (IS_ERR(entries)) {
3732                 r = PTR_ERR(entries);
3733                 goto out;
3734         }
3735
3736         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3737         if (r < 0)
3738                 goto out_free;
3739
3740         r = -EFAULT;
3741         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3742                 goto out_free;
3743
3744         r = n;
3745
3746 out_free:
3747         kfree(entries);
3748 out:
3749         return r;
3750 }
3751
3752 static inline bool kvm_can_mwait_in_guest(void)
3753 {
3754         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3755                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3756                 boot_cpu_has(X86_FEATURE_ARAT);
3757 }
3758
3759 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
3760                                             struct kvm_cpuid2 __user *cpuid_arg)
3761 {
3762         struct kvm_cpuid2 cpuid;
3763         int r;
3764
3765         r = -EFAULT;
3766         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3767                 return r;
3768
3769         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3770         if (r)
3771                 return r;
3772
3773         r = -EFAULT;
3774         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3775                 return r;
3776
3777         return 0;
3778 }
3779
3780 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3781 {
3782         int r = 0;
3783
3784         switch (ext) {
3785         case KVM_CAP_IRQCHIP:
3786         case KVM_CAP_HLT:
3787         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3788         case KVM_CAP_SET_TSS_ADDR:
3789         case KVM_CAP_EXT_CPUID:
3790         case KVM_CAP_EXT_EMUL_CPUID:
3791         case KVM_CAP_CLOCKSOURCE:
3792         case KVM_CAP_PIT:
3793         case KVM_CAP_NOP_IO_DELAY:
3794         case KVM_CAP_MP_STATE:
3795         case KVM_CAP_SYNC_MMU:
3796         case KVM_CAP_USER_NMI:
3797         case KVM_CAP_REINJECT_CONTROL:
3798         case KVM_CAP_IRQ_INJECT_STATUS:
3799         case KVM_CAP_IOEVENTFD:
3800         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3801         case KVM_CAP_PIT2:
3802         case KVM_CAP_PIT_STATE2:
3803         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3804         case KVM_CAP_VCPU_EVENTS:
3805         case KVM_CAP_HYPERV:
3806         case KVM_CAP_HYPERV_VAPIC:
3807         case KVM_CAP_HYPERV_SPIN:
3808         case KVM_CAP_HYPERV_SYNIC:
3809         case KVM_CAP_HYPERV_SYNIC2:
3810         case KVM_CAP_HYPERV_VP_INDEX:
3811         case KVM_CAP_HYPERV_EVENTFD:
3812         case KVM_CAP_HYPERV_TLBFLUSH:
3813         case KVM_CAP_HYPERV_SEND_IPI:
3814         case KVM_CAP_HYPERV_CPUID:
3815         case KVM_CAP_SYS_HYPERV_CPUID:
3816         case KVM_CAP_PCI_SEGMENT:
3817         case KVM_CAP_DEBUGREGS:
3818         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3819         case KVM_CAP_XSAVE:
3820         case KVM_CAP_ASYNC_PF:
3821         case KVM_CAP_ASYNC_PF_INT:
3822         case KVM_CAP_GET_TSC_KHZ:
3823         case KVM_CAP_KVMCLOCK_CTRL:
3824         case KVM_CAP_READONLY_MEM:
3825         case KVM_CAP_HYPERV_TIME:
3826         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3827         case KVM_CAP_TSC_DEADLINE_TIMER:
3828         case KVM_CAP_DISABLE_QUIRKS:
3829         case KVM_CAP_SET_BOOT_CPU_ID:
3830         case KVM_CAP_SPLIT_IRQCHIP:
3831         case KVM_CAP_IMMEDIATE_EXIT:
3832         case KVM_CAP_PMU_EVENT_FILTER:
3833         case KVM_CAP_GET_MSR_FEATURES:
3834         case KVM_CAP_MSR_PLATFORM_INFO:
3835         case KVM_CAP_EXCEPTION_PAYLOAD:
3836         case KVM_CAP_SET_GUEST_DEBUG:
3837         case KVM_CAP_LAST_CPU:
3838         case KVM_CAP_X86_USER_SPACE_MSR:
3839         case KVM_CAP_X86_MSR_FILTER:
3840         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3841 #ifdef CONFIG_X86_SGX_KVM
3842         case KVM_CAP_SGX_ATTRIBUTE:
3843 #endif
3844         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
3845                 r = 1;
3846                 break;
3847         case KVM_CAP_SET_GUEST_DEBUG2:
3848                 return KVM_GUESTDBG_VALID_MASK;
3849 #ifdef CONFIG_KVM_XEN
3850         case KVM_CAP_XEN_HVM:
3851                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
3852                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
3853                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
3854                 if (sched_info_on())
3855                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
3856                 break;
3857 #endif
3858         case KVM_CAP_SYNC_REGS:
3859                 r = KVM_SYNC_X86_VALID_FIELDS;
3860                 break;
3861         case KVM_CAP_ADJUST_CLOCK:
3862                 r = KVM_CLOCK_TSC_STABLE;
3863                 break;
3864         case KVM_CAP_X86_DISABLE_EXITS:
3865                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3866                       KVM_X86_DISABLE_EXITS_CSTATE;
3867                 if(kvm_can_mwait_in_guest())
3868                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3869                 break;
3870         case KVM_CAP_X86_SMM:
3871                 /* SMBASE is usually relocated above 1M on modern chipsets,
3872                  * and SMM handlers might indeed rely on 4G segment limits,
3873                  * so do not report SMM to be available if real mode is
3874                  * emulated via vm86 mode.  Still, do not go to great lengths
3875                  * to avoid userspace's usage of the feature, because it is a
3876                  * fringe case that is not enabled except via specific settings
3877                  * of the module parameters.
3878                  */
3879                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
3880                 break;
3881         case KVM_CAP_VAPIC:
3882                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
3883                 break;
3884         case KVM_CAP_NR_VCPUS:
3885                 r = KVM_SOFT_MAX_VCPUS;
3886                 break;
3887         case KVM_CAP_MAX_VCPUS:
3888                 r = KVM_MAX_VCPUS;
3889                 break;
3890         case KVM_CAP_MAX_VCPU_ID:
3891                 r = KVM_MAX_VCPU_ID;
3892                 break;
3893         case KVM_CAP_PV_MMU:    /* obsolete */
3894                 r = 0;
3895                 break;
3896         case KVM_CAP_MCE:
3897                 r = KVM_MAX_MCE_BANKS;
3898                 break;
3899         case KVM_CAP_XCRS:
3900                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3901                 break;
3902         case KVM_CAP_TSC_CONTROL:
3903                 r = kvm_has_tsc_control;
3904                 break;
3905         case KVM_CAP_X2APIC_API:
3906                 r = KVM_X2APIC_API_VALID_FLAGS;
3907                 break;
3908         case KVM_CAP_NESTED_STATE:
3909                 r = kvm_x86_ops.nested_ops->get_state ?
3910                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3911                 break;
3912         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3913                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3914                 break;
3915         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3916                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3917                 break;
3918         case KVM_CAP_SMALLER_MAXPHYADDR:
3919                 r = (int) allow_smaller_maxphyaddr;
3920                 break;
3921         case KVM_CAP_STEAL_TIME:
3922                 r = sched_info_on();
3923                 break;
3924         case KVM_CAP_X86_BUS_LOCK_EXIT:
3925                 if (kvm_has_bus_lock_exit)
3926                         r = KVM_BUS_LOCK_DETECTION_OFF |
3927                             KVM_BUS_LOCK_DETECTION_EXIT;
3928                 else
3929                         r = 0;
3930                 break;
3931         default:
3932                 break;
3933         }
3934         return r;
3935
3936 }
3937
3938 long kvm_arch_dev_ioctl(struct file *filp,
3939                         unsigned int ioctl, unsigned long arg)
3940 {
3941         void __user *argp = (void __user *)arg;
3942         long r;
3943
3944         switch (ioctl) {
3945         case KVM_GET_MSR_INDEX_LIST: {
3946                 struct kvm_msr_list __user *user_msr_list = argp;
3947                 struct kvm_msr_list msr_list;
3948                 unsigned n;
3949
3950                 r = -EFAULT;
3951                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3952                         goto out;
3953                 n = msr_list.nmsrs;
3954                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3955                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3956                         goto out;
3957                 r = -E2BIG;
3958                 if (n < msr_list.nmsrs)
3959                         goto out;
3960                 r = -EFAULT;
3961                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3962                                  num_msrs_to_save * sizeof(u32)))
3963                         goto out;
3964                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3965                                  &emulated_msrs,
3966                                  num_emulated_msrs * sizeof(u32)))
3967                         goto out;
3968                 r = 0;
3969                 break;
3970         }
3971         case KVM_GET_SUPPORTED_CPUID:
3972         case KVM_GET_EMULATED_CPUID: {
3973                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3974                 struct kvm_cpuid2 cpuid;
3975
3976                 r = -EFAULT;
3977                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3978                         goto out;
3979
3980                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3981                                             ioctl);
3982                 if (r)
3983                         goto out;
3984
3985                 r = -EFAULT;
3986                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3987                         goto out;
3988                 r = 0;
3989                 break;
3990         }
3991         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3992                 r = -EFAULT;
3993                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3994                                  sizeof(kvm_mce_cap_supported)))
3995                         goto out;
3996                 r = 0;
3997                 break;
3998         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3999                 struct kvm_msr_list __user *user_msr_list = argp;
4000                 struct kvm_msr_list msr_list;
4001                 unsigned int n;
4002
4003                 r = -EFAULT;
4004                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4005                         goto out;
4006                 n = msr_list.nmsrs;
4007                 msr_list.nmsrs = num_msr_based_features;
4008                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4009                         goto out;
4010                 r = -E2BIG;
4011                 if (n < msr_list.nmsrs)
4012                         goto out;
4013                 r = -EFAULT;
4014                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4015                                  num_msr_based_features * sizeof(u32)))
4016                         goto out;
4017                 r = 0;
4018                 break;
4019         }
4020         case KVM_GET_MSRS:
4021                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4022                 break;
4023         case KVM_GET_SUPPORTED_HV_CPUID:
4024                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4025                 break;
4026         default:
4027                 r = -EINVAL;
4028                 break;
4029         }
4030 out:
4031         return r;
4032 }
4033
4034 static void wbinvd_ipi(void *garbage)
4035 {
4036         wbinvd();
4037 }
4038
4039 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4040 {
4041         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4042 }
4043
4044 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4045 {
4046         /* Address WBINVD may be executed by guest */
4047         if (need_emulate_wbinvd(vcpu)) {
4048                 if (static_call(kvm_x86_has_wbinvd_exit)())
4049                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4050                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4051                         smp_call_function_single(vcpu->cpu,
4052                                         wbinvd_ipi, NULL, 1);
4053         }
4054
4055         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4056
4057         /* Save host pkru register if supported */
4058         vcpu->arch.host_pkru = read_pkru();
4059
4060         /* Apply any externally detected TSC adjustments (due to suspend) */
4061         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4062                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4063                 vcpu->arch.tsc_offset_adjustment = 0;
4064                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4065         }
4066
4067         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4068                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4069                                 rdtsc() - vcpu->arch.last_host_tsc;
4070                 if (tsc_delta < 0)
4071                         mark_tsc_unstable("KVM discovered backwards TSC");
4072
4073                 if (kvm_check_tsc_unstable()) {
4074                         u64 offset = kvm_compute_tsc_offset(vcpu,
4075                                                 vcpu->arch.last_guest_tsc);
4076                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4077                         vcpu->arch.tsc_catchup = 1;
4078                 }
4079
4080                 if (kvm_lapic_hv_timer_in_use(vcpu))
4081                         kvm_lapic_restart_hv_timer(vcpu);
4082
4083                 /*
4084                  * On a host with synchronized TSC, there is no need to update
4085                  * kvmclock on vcpu->cpu migration
4086                  */
4087                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4088                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4089                 if (vcpu->cpu != cpu)
4090                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4091                 vcpu->cpu = cpu;
4092         }
4093
4094         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4095 }
4096
4097 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4098 {
4099         struct kvm_host_map map;
4100         struct kvm_steal_time *st;
4101
4102         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4103                 return;
4104
4105         if (vcpu->arch.st.preempted)
4106                 return;
4107
4108         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
4109                         &vcpu->arch.st.cache, true))
4110                 return;
4111
4112         st = map.hva +
4113                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
4114
4115         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4116
4117         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
4118 }
4119
4120 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4121 {
4122         int idx;
4123
4124         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4125                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4126
4127         /*
4128          * Take the srcu lock as memslots will be accessed to check the gfn
4129          * cache generation against the memslots generation.
4130          */
4131         idx = srcu_read_lock(&vcpu->kvm->srcu);
4132         if (kvm_xen_msr_enabled(vcpu->kvm))
4133                 kvm_xen_runstate_set_preempted(vcpu);
4134         else
4135                 kvm_steal_time_set_preempted(vcpu);
4136         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4137
4138         static_call(kvm_x86_vcpu_put)(vcpu);
4139         vcpu->arch.last_host_tsc = rdtsc();
4140         /*
4141          * If userspace has set any breakpoints or watchpoints, dr6 is restored
4142          * on every vmexit, but if not, we might have a stale dr6 from the
4143          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4144          */
4145         set_debugreg(0, 6);
4146 }
4147
4148 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4149                                     struct kvm_lapic_state *s)
4150 {
4151         if (vcpu->arch.apicv_active)
4152                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4153
4154         return kvm_apic_get_state(vcpu, s);
4155 }
4156
4157 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4158                                     struct kvm_lapic_state *s)
4159 {
4160         int r;
4161
4162         r = kvm_apic_set_state(vcpu, s);
4163         if (r)
4164                 return r;
4165         update_cr8_intercept(vcpu);
4166
4167         return 0;
4168 }
4169
4170 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4171 {
4172         /*
4173          * We can accept userspace's request for interrupt injection
4174          * as long as we have a place to store the interrupt number.
4175          * The actual injection will happen when the CPU is able to
4176          * deliver the interrupt.
4177          */
4178         if (kvm_cpu_has_extint(vcpu))
4179                 return false;
4180
4181         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4182         return (!lapic_in_kernel(vcpu) ||
4183                 kvm_apic_accept_pic_intr(vcpu));
4184 }
4185
4186 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4187 {
4188         return kvm_arch_interrupt_allowed(vcpu) &&
4189                 kvm_cpu_accept_dm_intr(vcpu);
4190 }
4191
4192 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4193                                     struct kvm_interrupt *irq)
4194 {
4195         if (irq->irq >= KVM_NR_INTERRUPTS)
4196                 return -EINVAL;
4197
4198         if (!irqchip_in_kernel(vcpu->kvm)) {
4199                 kvm_queue_interrupt(vcpu, irq->irq, false);
4200                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4201                 return 0;
4202         }
4203
4204         /*
4205          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4206          * fail for in-kernel 8259.
4207          */
4208         if (pic_in_kernel(vcpu->kvm))
4209                 return -ENXIO;
4210
4211         if (vcpu->arch.pending_external_vector != -1)
4212                 return -EEXIST;
4213
4214         vcpu->arch.pending_external_vector = irq->irq;
4215         kvm_make_request(KVM_REQ_EVENT, vcpu);
4216         return 0;
4217 }
4218
4219 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4220 {
4221         kvm_inject_nmi(vcpu);
4222
4223         return 0;
4224 }
4225
4226 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4227 {
4228         kvm_make_request(KVM_REQ_SMI, vcpu);
4229
4230         return 0;
4231 }
4232
4233 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4234                                            struct kvm_tpr_access_ctl *tac)
4235 {
4236         if (tac->flags)
4237                 return -EINVAL;
4238         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4239         return 0;
4240 }
4241
4242 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4243                                         u64 mcg_cap)
4244 {
4245         int r;
4246         unsigned bank_num = mcg_cap & 0xff, bank;
4247
4248         r = -EINVAL;
4249         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4250                 goto out;
4251         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4252                 goto out;
4253         r = 0;
4254         vcpu->arch.mcg_cap = mcg_cap;
4255         /* Init IA32_MCG_CTL to all 1s */
4256         if (mcg_cap & MCG_CTL_P)
4257                 vcpu->arch.mcg_ctl = ~(u64)0;
4258         /* Init IA32_MCi_CTL to all 1s */
4259         for (bank = 0; bank < bank_num; bank++)
4260                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4261
4262         static_call(kvm_x86_setup_mce)(vcpu);
4263 out:
4264         return r;
4265 }
4266
4267 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4268                                       struct kvm_x86_mce *mce)
4269 {
4270         u64 mcg_cap = vcpu->arch.mcg_cap;
4271         unsigned bank_num = mcg_cap & 0xff;
4272         u64 *banks = vcpu->arch.mce_banks;
4273
4274         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4275                 return -EINVAL;
4276         /*
4277          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4278          * reporting is disabled
4279          */
4280         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4281             vcpu->arch.mcg_ctl != ~(u64)0)
4282                 return 0;
4283         banks += 4 * mce->bank;
4284         /*
4285          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4286          * reporting is disabled for the bank
4287          */
4288         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4289                 return 0;
4290         if (mce->status & MCI_STATUS_UC) {
4291                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4292                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4293                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4294                         return 0;
4295                 }
4296                 if (banks[1] & MCI_STATUS_VAL)
4297                         mce->status |= MCI_STATUS_OVER;
4298                 banks[2] = mce->addr;
4299                 banks[3] = mce->misc;
4300                 vcpu->arch.mcg_status = mce->mcg_status;
4301                 banks[1] = mce->status;
4302                 kvm_queue_exception(vcpu, MC_VECTOR);
4303         } else if (!(banks[1] & MCI_STATUS_VAL)
4304                    || !(banks[1] & MCI_STATUS_UC)) {
4305                 if (banks[1] & MCI_STATUS_VAL)
4306                         mce->status |= MCI_STATUS_OVER;
4307                 banks[2] = mce->addr;
4308                 banks[3] = mce->misc;
4309                 banks[1] = mce->status;
4310         } else
4311                 banks[1] |= MCI_STATUS_OVER;
4312         return 0;
4313 }
4314
4315 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4316                                                struct kvm_vcpu_events *events)
4317 {
4318         process_nmi(vcpu);
4319
4320         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4321                 process_smi(vcpu);
4322
4323         /*
4324          * In guest mode, payload delivery should be deferred,
4325          * so that the L1 hypervisor can intercept #PF before
4326          * CR2 is modified (or intercept #DB before DR6 is
4327          * modified under nVMX). Unless the per-VM capability,
4328          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4329          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4330          * opportunistically defer the exception payload, deliver it if the
4331          * capability hasn't been requested before processing a
4332          * KVM_GET_VCPU_EVENTS.
4333          */
4334         if (!vcpu->kvm->arch.exception_payload_enabled &&
4335             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4336                 kvm_deliver_exception_payload(vcpu);
4337
4338         /*
4339          * The API doesn't provide the instruction length for software
4340          * exceptions, so don't report them. As long as the guest RIP
4341          * isn't advanced, we should expect to encounter the exception
4342          * again.
4343          */
4344         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4345                 events->exception.injected = 0;
4346                 events->exception.pending = 0;
4347         } else {
4348                 events->exception.injected = vcpu->arch.exception.injected;
4349                 events->exception.pending = vcpu->arch.exception.pending;
4350                 /*
4351                  * For ABI compatibility, deliberately conflate
4352                  * pending and injected exceptions when
4353                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4354                  */
4355                 if (!vcpu->kvm->arch.exception_payload_enabled)
4356                         events->exception.injected |=
4357                                 vcpu->arch.exception.pending;
4358         }
4359         events->exception.nr = vcpu->arch.exception.nr;
4360         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4361         events->exception.error_code = vcpu->arch.exception.error_code;
4362         events->exception_has_payload = vcpu->arch.exception.has_payload;
4363         events->exception_payload = vcpu->arch.exception.payload;
4364
4365         events->interrupt.injected =
4366                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4367         events->interrupt.nr = vcpu->arch.interrupt.nr;
4368         events->interrupt.soft = 0;
4369         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4370
4371         events->nmi.injected = vcpu->arch.nmi_injected;
4372         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4373         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4374         events->nmi.pad = 0;
4375
4376         events->sipi_vector = 0; /* never valid when reporting to user space */
4377
4378         events->smi.smm = is_smm(vcpu);
4379         events->smi.pending = vcpu->arch.smi_pending;
4380         events->smi.smm_inside_nmi =
4381                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4382         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4383
4384         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4385                          | KVM_VCPUEVENT_VALID_SHADOW
4386                          | KVM_VCPUEVENT_VALID_SMM);
4387         if (vcpu->kvm->arch.exception_payload_enabled)
4388                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4389
4390         memset(&events->reserved, 0, sizeof(events->reserved));
4391 }
4392
4393 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4394
4395 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4396                                               struct kvm_vcpu_events *events)
4397 {
4398         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4399                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4400                               | KVM_VCPUEVENT_VALID_SHADOW
4401                               | KVM_VCPUEVENT_VALID_SMM
4402                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4403                 return -EINVAL;
4404
4405         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4406                 if (!vcpu->kvm->arch.exception_payload_enabled)
4407                         return -EINVAL;
4408                 if (events->exception.pending)
4409                         events->exception.injected = 0;
4410                 else
4411                         events->exception_has_payload = 0;
4412         } else {
4413                 events->exception.pending = 0;
4414                 events->exception_has_payload = 0;
4415         }
4416
4417         if ((events->exception.injected || events->exception.pending) &&
4418             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4419                 return -EINVAL;
4420
4421         /* INITs are latched while in SMM */
4422         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4423             (events->smi.smm || events->smi.pending) &&
4424             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4425                 return -EINVAL;
4426
4427         process_nmi(vcpu);
4428         vcpu->arch.exception.injected = events->exception.injected;
4429         vcpu->arch.exception.pending = events->exception.pending;
4430         vcpu->arch.exception.nr = events->exception.nr;
4431         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4432         vcpu->arch.exception.error_code = events->exception.error_code;
4433         vcpu->arch.exception.has_payload = events->exception_has_payload;
4434         vcpu->arch.exception.payload = events->exception_payload;
4435
4436         vcpu->arch.interrupt.injected = events->interrupt.injected;
4437         vcpu->arch.interrupt.nr = events->interrupt.nr;
4438         vcpu->arch.interrupt.soft = events->interrupt.soft;
4439         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4440                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4441                                                 events->interrupt.shadow);
4442
4443         vcpu->arch.nmi_injected = events->nmi.injected;
4444         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4445                 vcpu->arch.nmi_pending = events->nmi.pending;
4446         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4447
4448         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4449             lapic_in_kernel(vcpu))
4450                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4451
4452         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4453                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4454                         if (events->smi.smm)
4455                                 vcpu->arch.hflags |= HF_SMM_MASK;
4456                         else
4457                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4458                         kvm_smm_changed(vcpu);
4459                 }
4460
4461                 vcpu->arch.smi_pending = events->smi.pending;
4462
4463                 if (events->smi.smm) {
4464                         if (events->smi.smm_inside_nmi)
4465                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4466                         else
4467                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4468                 }
4469
4470                 if (lapic_in_kernel(vcpu)) {
4471                         if (events->smi.latched_init)
4472                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4473                         else
4474                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4475                 }
4476         }
4477
4478         kvm_make_request(KVM_REQ_EVENT, vcpu);
4479
4480         return 0;
4481 }
4482
4483 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4484                                              struct kvm_debugregs *dbgregs)
4485 {
4486         unsigned long val;
4487
4488         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4489         kvm_get_dr(vcpu, 6, &val);
4490         dbgregs->dr6 = val;
4491         dbgregs->dr7 = vcpu->arch.dr7;
4492         dbgregs->flags = 0;
4493         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4494 }
4495
4496 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4497                                             struct kvm_debugregs *dbgregs)
4498 {
4499         if (dbgregs->flags)
4500                 return -EINVAL;
4501
4502         if (!kvm_dr6_valid(dbgregs->dr6))
4503                 return -EINVAL;
4504         if (!kvm_dr7_valid(dbgregs->dr7))
4505                 return -EINVAL;
4506
4507         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4508         kvm_update_dr0123(vcpu);
4509         vcpu->arch.dr6 = dbgregs->dr6;
4510         vcpu->arch.dr7 = dbgregs->dr7;
4511         kvm_update_dr7(vcpu);
4512
4513         return 0;
4514 }
4515
4516 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4517
4518 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4519 {
4520         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4521         u64 xstate_bv = xsave->header.xfeatures;
4522         u64 valid;
4523
4524         /*
4525          * Copy legacy XSAVE area, to avoid complications with CPUID
4526          * leaves 0 and 1 in the loop below.
4527          */
4528         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4529
4530         /* Set XSTATE_BV */
4531         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4532         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4533
4534         /*
4535          * Copy each region from the possibly compacted offset to the
4536          * non-compacted offset.
4537          */
4538         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4539         while (valid) {
4540                 u64 xfeature_mask = valid & -valid;
4541                 int xfeature_nr = fls64(xfeature_mask) - 1;
4542                 void *src = get_xsave_addr(xsave, xfeature_nr);
4543
4544                 if (src) {
4545                         u32 size, offset, ecx, edx;
4546                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4547                                     &size, &offset, &ecx, &edx);
4548                         if (xfeature_nr == XFEATURE_PKRU)
4549                                 memcpy(dest + offset, &vcpu->arch.pkru,
4550                                        sizeof(vcpu->arch.pkru));
4551                         else
4552                                 memcpy(dest + offset, src, size);
4553
4554                 }
4555
4556                 valid -= xfeature_mask;
4557         }
4558 }
4559
4560 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4561 {
4562         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4563         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4564         u64 valid;
4565
4566         /*
4567          * Copy legacy XSAVE area, to avoid complications with CPUID
4568          * leaves 0 and 1 in the loop below.
4569          */
4570         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4571
4572         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4573         xsave->header.xfeatures = xstate_bv;
4574         if (boot_cpu_has(X86_FEATURE_XSAVES))
4575                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4576
4577         /*
4578          * Copy each region from the non-compacted offset to the
4579          * possibly compacted offset.
4580          */
4581         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4582         while (valid) {
4583                 u64 xfeature_mask = valid & -valid;
4584                 int xfeature_nr = fls64(xfeature_mask) - 1;
4585                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4586
4587                 if (dest) {
4588                         u32 size, offset, ecx, edx;
4589                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4590                                     &size, &offset, &ecx, &edx);
4591                         if (xfeature_nr == XFEATURE_PKRU)
4592                                 memcpy(&vcpu->arch.pkru, src + offset,
4593                                        sizeof(vcpu->arch.pkru));
4594                         else
4595                                 memcpy(dest, src + offset, size);
4596                 }
4597
4598                 valid -= xfeature_mask;
4599         }
4600 }
4601
4602 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4603                                          struct kvm_xsave *guest_xsave)
4604 {
4605         if (!vcpu->arch.guest_fpu)
4606                 return;
4607
4608         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4609                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4610                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4611         } else {
4612                 memcpy(guest_xsave->region,
4613                         &vcpu->arch.guest_fpu->state.fxsave,
4614                         sizeof(struct fxregs_state));
4615                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4616                         XFEATURE_MASK_FPSSE;
4617         }
4618 }
4619
4620 #define XSAVE_MXCSR_OFFSET 24
4621
4622 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4623                                         struct kvm_xsave *guest_xsave)
4624 {
4625         u64 xstate_bv;
4626         u32 mxcsr;
4627
4628         if (!vcpu->arch.guest_fpu)
4629                 return 0;
4630
4631         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4632         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4633
4634         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4635                 /*
4636                  * Here we allow setting states that are not present in
4637                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4638                  * with old userspace.
4639                  */
4640                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4641                         return -EINVAL;
4642                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4643         } else {
4644                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4645                         mxcsr & ~mxcsr_feature_mask)
4646                         return -EINVAL;
4647                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4648                         guest_xsave->region, sizeof(struct fxregs_state));
4649         }
4650         return 0;
4651 }
4652
4653 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4654                                         struct kvm_xcrs *guest_xcrs)
4655 {
4656         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4657                 guest_xcrs->nr_xcrs = 0;
4658                 return;
4659         }
4660
4661         guest_xcrs->nr_xcrs = 1;
4662         guest_xcrs->flags = 0;
4663         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4664         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4665 }
4666
4667 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4668                                        struct kvm_xcrs *guest_xcrs)
4669 {
4670         int i, r = 0;
4671
4672         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4673                 return -EINVAL;
4674
4675         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4676                 return -EINVAL;
4677
4678         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4679                 /* Only support XCR0 currently */
4680                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4681                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4682                                 guest_xcrs->xcrs[i].value);
4683                         break;
4684                 }
4685         if (r)
4686                 r = -EINVAL;
4687         return r;
4688 }
4689
4690 /*
4691  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4692  * stopped by the hypervisor.  This function will be called from the host only.
4693  * EINVAL is returned when the host attempts to set the flag for a guest that
4694  * does not support pv clocks.
4695  */
4696 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4697 {
4698         if (!vcpu->arch.pv_time_enabled)
4699                 return -EINVAL;
4700         vcpu->arch.pvclock_set_guest_stopped_request = true;
4701         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4702         return 0;
4703 }
4704
4705 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4706                                      struct kvm_enable_cap *cap)
4707 {
4708         int r;
4709         uint16_t vmcs_version;
4710         void __user *user_ptr;
4711
4712         if (cap->flags)
4713                 return -EINVAL;
4714
4715         switch (cap->cap) {
4716         case KVM_CAP_HYPERV_SYNIC2:
4717                 if (cap->args[0])
4718                         return -EINVAL;
4719                 fallthrough;
4720
4721         case KVM_CAP_HYPERV_SYNIC:
4722                 if (!irqchip_in_kernel(vcpu->kvm))
4723                         return -EINVAL;
4724                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4725                                              KVM_CAP_HYPERV_SYNIC2);
4726         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4727                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4728                         return -ENOTTY;
4729                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4730                 if (!r) {
4731                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4732                         if (copy_to_user(user_ptr, &vmcs_version,
4733                                          sizeof(vmcs_version)))
4734                                 r = -EFAULT;
4735                 }
4736                 return r;
4737         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4738                 if (!kvm_x86_ops.enable_direct_tlbflush)
4739                         return -ENOTTY;
4740
4741                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
4742
4743         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4744                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4745                 if (vcpu->arch.pv_cpuid.enforce)
4746                         kvm_update_pv_runtime(vcpu);
4747
4748                 return 0;
4749         default:
4750                 return -EINVAL;
4751         }
4752 }
4753
4754 long kvm_arch_vcpu_ioctl(struct file *filp,
4755                          unsigned int ioctl, unsigned long arg)
4756 {
4757         struct kvm_vcpu *vcpu = filp->private_data;
4758         void __user *argp = (void __user *)arg;
4759         int r;
4760         union {
4761                 struct kvm_lapic_state *lapic;
4762                 struct kvm_xsave *xsave;
4763                 struct kvm_xcrs *xcrs;
4764                 void *buffer;
4765         } u;
4766
4767         vcpu_load(vcpu);
4768
4769         u.buffer = NULL;
4770         switch (ioctl) {
4771         case KVM_GET_LAPIC: {
4772                 r = -EINVAL;
4773                 if (!lapic_in_kernel(vcpu))
4774                         goto out;
4775                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4776                                 GFP_KERNEL_ACCOUNT);
4777
4778                 r = -ENOMEM;
4779                 if (!u.lapic)
4780                         goto out;
4781                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4782                 if (r)
4783                         goto out;
4784                 r = -EFAULT;
4785                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4786                         goto out;
4787                 r = 0;
4788                 break;
4789         }
4790         case KVM_SET_LAPIC: {
4791                 r = -EINVAL;
4792                 if (!lapic_in_kernel(vcpu))
4793                         goto out;
4794                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4795                 if (IS_ERR(u.lapic)) {
4796                         r = PTR_ERR(u.lapic);
4797                         goto out_nofree;
4798                 }
4799
4800                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4801                 break;
4802         }
4803         case KVM_INTERRUPT: {
4804                 struct kvm_interrupt irq;
4805
4806                 r = -EFAULT;
4807                 if (copy_from_user(&irq, argp, sizeof(irq)))
4808                         goto out;
4809                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4810                 break;
4811         }
4812         case KVM_NMI: {
4813                 r = kvm_vcpu_ioctl_nmi(vcpu);
4814                 break;
4815         }
4816         case KVM_SMI: {
4817                 r = kvm_vcpu_ioctl_smi(vcpu);
4818                 break;
4819         }
4820         case KVM_SET_CPUID: {
4821                 struct kvm_cpuid __user *cpuid_arg = argp;
4822                 struct kvm_cpuid cpuid;
4823
4824                 r = -EFAULT;
4825                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4826                         goto out;
4827                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4828                 break;
4829         }
4830         case KVM_SET_CPUID2: {
4831                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4832                 struct kvm_cpuid2 cpuid;
4833
4834                 r = -EFAULT;
4835                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4836                         goto out;
4837                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4838                                               cpuid_arg->entries);
4839                 break;
4840         }
4841         case KVM_GET_CPUID2: {
4842                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4843                 struct kvm_cpuid2 cpuid;
4844
4845                 r = -EFAULT;
4846                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4847                         goto out;
4848                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4849                                               cpuid_arg->entries);
4850                 if (r)
4851                         goto out;
4852                 r = -EFAULT;
4853                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4854                         goto out;
4855                 r = 0;
4856                 break;
4857         }
4858         case KVM_GET_MSRS: {
4859                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4860                 r = msr_io(vcpu, argp, do_get_msr, 1);
4861                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4862                 break;
4863         }
4864         case KVM_SET_MSRS: {
4865                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4866                 r = msr_io(vcpu, argp, do_set_msr, 0);
4867                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4868                 break;
4869         }
4870         case KVM_TPR_ACCESS_REPORTING: {
4871                 struct kvm_tpr_access_ctl tac;
4872
4873                 r = -EFAULT;
4874                 if (copy_from_user(&tac, argp, sizeof(tac)))
4875                         goto out;
4876                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4877                 if (r)
4878                         goto out;
4879                 r = -EFAULT;
4880                 if (copy_to_user(argp, &tac, sizeof(tac)))
4881                         goto out;
4882                 r = 0;
4883                 break;
4884         };
4885         case KVM_SET_VAPIC_ADDR: {
4886                 struct kvm_vapic_addr va;
4887                 int idx;
4888
4889                 r = -EINVAL;
4890                 if (!lapic_in_kernel(vcpu))
4891                         goto out;
4892                 r = -EFAULT;
4893                 if (copy_from_user(&va, argp, sizeof(va)))
4894                         goto out;
4895                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4896                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4897                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4898                 break;
4899         }
4900         case KVM_X86_SETUP_MCE: {
4901                 u64 mcg_cap;
4902
4903                 r = -EFAULT;
4904                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4905                         goto out;
4906                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4907                 break;
4908         }
4909         case KVM_X86_SET_MCE: {
4910                 struct kvm_x86_mce mce;
4911
4912                 r = -EFAULT;
4913                 if (copy_from_user(&mce, argp, sizeof(mce)))
4914                         goto out;
4915                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4916                 break;
4917         }
4918         case KVM_GET_VCPU_EVENTS: {
4919                 struct kvm_vcpu_events events;
4920
4921                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4922
4923                 r = -EFAULT;
4924                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4925                         break;
4926                 r = 0;
4927                 break;
4928         }
4929         case KVM_SET_VCPU_EVENTS: {
4930                 struct kvm_vcpu_events events;
4931
4932                 r = -EFAULT;
4933                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4934                         break;
4935
4936                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4937                 break;
4938         }
4939         case KVM_GET_DEBUGREGS: {
4940                 struct kvm_debugregs dbgregs;
4941
4942                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4943
4944                 r = -EFAULT;
4945                 if (copy_to_user(argp, &dbgregs,
4946                                  sizeof(struct kvm_debugregs)))
4947                         break;
4948                 r = 0;
4949                 break;
4950         }
4951         case KVM_SET_DEBUGREGS: {
4952                 struct kvm_debugregs dbgregs;
4953
4954                 r = -EFAULT;
4955                 if (copy_from_user(&dbgregs, argp,
4956                                    sizeof(struct kvm_debugregs)))
4957                         break;
4958
4959                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4960                 break;
4961         }
4962         case KVM_GET_XSAVE: {
4963                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4964                 r = -ENOMEM;
4965                 if (!u.xsave)
4966                         break;
4967
4968                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4969
4970                 r = -EFAULT;
4971                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4972                         break;
4973                 r = 0;
4974                 break;
4975         }
4976         case KVM_SET_XSAVE: {
4977                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4978                 if (IS_ERR(u.xsave)) {
4979                         r = PTR_ERR(u.xsave);
4980                         goto out_nofree;
4981                 }
4982
4983                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4984                 break;
4985         }
4986         case KVM_GET_XCRS: {
4987                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4988                 r = -ENOMEM;
4989                 if (!u.xcrs)
4990                         break;
4991
4992                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4993
4994                 r = -EFAULT;
4995                 if (copy_to_user(argp, u.xcrs,
4996                                  sizeof(struct kvm_xcrs)))
4997                         break;
4998                 r = 0;
4999                 break;
5000         }
5001         case KVM_SET_XCRS: {
5002                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5003                 if (IS_ERR(u.xcrs)) {
5004                         r = PTR_ERR(u.xcrs);
5005                         goto out_nofree;
5006                 }
5007
5008                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5009                 break;
5010         }
5011         case KVM_SET_TSC_KHZ: {
5012                 u32 user_tsc_khz;
5013
5014                 r = -EINVAL;
5015                 user_tsc_khz = (u32)arg;
5016
5017                 if (kvm_has_tsc_control &&
5018                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5019                         goto out;
5020
5021                 if (user_tsc_khz == 0)
5022                         user_tsc_khz = tsc_khz;
5023
5024                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5025                         r = 0;
5026
5027                 goto out;
5028         }
5029         case KVM_GET_TSC_KHZ: {
5030                 r = vcpu->arch.virtual_tsc_khz;
5031                 goto out;
5032         }
5033         case KVM_KVMCLOCK_CTRL: {
5034                 r = kvm_set_guest_paused(vcpu);
5035                 goto out;
5036         }
5037         case KVM_ENABLE_CAP: {
5038                 struct kvm_enable_cap cap;
5039
5040                 r = -EFAULT;
5041                 if (copy_from_user(&cap, argp, sizeof(cap)))
5042                         goto out;
5043                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5044                 break;
5045         }
5046         case KVM_GET_NESTED_STATE: {
5047                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5048                 u32 user_data_size;
5049
5050                 r = -EINVAL;
5051                 if (!kvm_x86_ops.nested_ops->get_state)
5052                         break;
5053
5054                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5055                 r = -EFAULT;
5056                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5057                         break;
5058
5059                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5060                                                      user_data_size);
5061                 if (r < 0)
5062                         break;
5063
5064                 if (r > user_data_size) {
5065                         if (put_user(r, &user_kvm_nested_state->size))
5066                                 r = -EFAULT;
5067                         else
5068                                 r = -E2BIG;
5069                         break;
5070                 }
5071
5072                 r = 0;
5073                 break;
5074         }
5075         case KVM_SET_NESTED_STATE: {
5076                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5077                 struct kvm_nested_state kvm_state;
5078                 int idx;
5079
5080                 r = -EINVAL;
5081                 if (!kvm_x86_ops.nested_ops->set_state)
5082                         break;
5083
5084                 r = -EFAULT;
5085                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5086                         break;
5087
5088                 r = -EINVAL;
5089                 if (kvm_state.size < sizeof(kvm_state))
5090                         break;
5091
5092                 if (kvm_state.flags &
5093                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5094                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5095                       | KVM_STATE_NESTED_GIF_SET))
5096                         break;
5097
5098                 /* nested_run_pending implies guest_mode.  */
5099                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5100                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5101                         break;
5102
5103                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5104                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5105                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5106                 break;
5107         }
5108         case KVM_GET_SUPPORTED_HV_CPUID:
5109                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5110                 break;
5111 #ifdef CONFIG_KVM_XEN
5112         case KVM_XEN_VCPU_GET_ATTR: {
5113                 struct kvm_xen_vcpu_attr xva;
5114
5115                 r = -EFAULT;
5116                 if (copy_from_user(&xva, argp, sizeof(xva)))
5117                         goto out;
5118                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5119                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5120                         r = -EFAULT;
5121                 break;
5122         }
5123         case KVM_XEN_VCPU_SET_ATTR: {
5124                 struct kvm_xen_vcpu_attr xva;
5125
5126                 r = -EFAULT;
5127                 if (copy_from_user(&xva, argp, sizeof(xva)))
5128                         goto out;
5129                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5130                 break;
5131         }
5132 #endif
5133         default:
5134                 r = -EINVAL;
5135         }
5136 out:
5137         kfree(u.buffer);
5138 out_nofree:
5139         vcpu_put(vcpu);
5140         return r;
5141 }
5142
5143 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5144 {
5145         return VM_FAULT_SIGBUS;
5146 }
5147
5148 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5149 {
5150         int ret;
5151
5152         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5153                 return -EINVAL;
5154         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5155         return ret;
5156 }
5157
5158 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5159                                               u64 ident_addr)
5160 {
5161         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5162 }
5163
5164 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5165                                          unsigned long kvm_nr_mmu_pages)
5166 {
5167         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5168                 return -EINVAL;
5169
5170         mutex_lock(&kvm->slots_lock);
5171
5172         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5173         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5174
5175         mutex_unlock(&kvm->slots_lock);
5176         return 0;
5177 }
5178
5179 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5180 {
5181         return kvm->arch.n_max_mmu_pages;
5182 }
5183
5184 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5185 {
5186         struct kvm_pic *pic = kvm->arch.vpic;
5187         int r;
5188
5189         r = 0;
5190         switch (chip->chip_id) {
5191         case KVM_IRQCHIP_PIC_MASTER:
5192                 memcpy(&chip->chip.pic, &pic->pics[0],
5193                         sizeof(struct kvm_pic_state));
5194                 break;
5195         case KVM_IRQCHIP_PIC_SLAVE:
5196                 memcpy(&chip->chip.pic, &pic->pics[1],
5197                         sizeof(struct kvm_pic_state));
5198                 break;
5199         case KVM_IRQCHIP_IOAPIC:
5200                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5201                 break;
5202         default:
5203                 r = -EINVAL;
5204                 break;
5205         }
5206         return r;
5207 }
5208
5209 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5210 {
5211         struct kvm_pic *pic = kvm->arch.vpic;
5212         int r;
5213
5214         r = 0;
5215         switch (chip->chip_id) {
5216         case KVM_IRQCHIP_PIC_MASTER:
5217                 spin_lock(&pic->lock);
5218                 memcpy(&pic->pics[0], &chip->chip.pic,
5219                         sizeof(struct kvm_pic_state));
5220                 spin_unlock(&pic->lock);
5221                 break;
5222         case KVM_IRQCHIP_PIC_SLAVE:
5223                 spin_lock(&pic->lock);
5224                 memcpy(&pic->pics[1], &chip->chip.pic,
5225                         sizeof(struct kvm_pic_state));
5226                 spin_unlock(&pic->lock);
5227                 break;
5228         case KVM_IRQCHIP_IOAPIC:
5229                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5230                 break;
5231         default:
5232                 r = -EINVAL;
5233                 break;
5234         }
5235         kvm_pic_update_irq(pic);
5236         return r;
5237 }
5238
5239 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5240 {
5241         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5242
5243         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5244
5245         mutex_lock(&kps->lock);
5246         memcpy(ps, &kps->channels, sizeof(*ps));
5247         mutex_unlock(&kps->lock);
5248         return 0;
5249 }
5250
5251 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5252 {
5253         int i;
5254         struct kvm_pit *pit = kvm->arch.vpit;
5255
5256         mutex_lock(&pit->pit_state.lock);
5257         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5258         for (i = 0; i < 3; i++)
5259                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5260         mutex_unlock(&pit->pit_state.lock);
5261         return 0;
5262 }
5263
5264 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5265 {
5266         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5267         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5268                 sizeof(ps->channels));
5269         ps->flags = kvm->arch.vpit->pit_state.flags;
5270         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5271         memset(&ps->reserved, 0, sizeof(ps->reserved));
5272         return 0;
5273 }
5274
5275 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5276 {
5277         int start = 0;
5278         int i;
5279         u32 prev_legacy, cur_legacy;
5280         struct kvm_pit *pit = kvm->arch.vpit;
5281
5282         mutex_lock(&pit->pit_state.lock);
5283         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5284         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5285         if (!prev_legacy && cur_legacy)
5286                 start = 1;
5287         memcpy(&pit->pit_state.channels, &ps->channels,
5288                sizeof(pit->pit_state.channels));
5289         pit->pit_state.flags = ps->flags;
5290         for (i = 0; i < 3; i++)
5291                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5292                                    start && i == 0);
5293         mutex_unlock(&pit->pit_state.lock);
5294         return 0;
5295 }
5296
5297 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5298                                  struct kvm_reinject_control *control)
5299 {
5300         struct kvm_pit *pit = kvm->arch.vpit;
5301
5302         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5303          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5304          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5305          */
5306         mutex_lock(&pit->pit_state.lock);
5307         kvm_pit_set_reinject(pit, control->pit_reinject);
5308         mutex_unlock(&pit->pit_state.lock);
5309
5310         return 0;
5311 }
5312
5313 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5314 {
5315
5316         /*
5317          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5318          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5319          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5320          * VM-Exit.
5321          */
5322         struct kvm_vcpu *vcpu;
5323         int i;
5324
5325         kvm_for_each_vcpu(i, vcpu, kvm)
5326                 kvm_vcpu_kick(vcpu);
5327 }
5328
5329 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5330                         bool line_status)
5331 {
5332         if (!irqchip_in_kernel(kvm))
5333                 return -ENXIO;
5334
5335         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5336                                         irq_event->irq, irq_event->level,
5337                                         line_status);
5338         return 0;
5339 }
5340
5341 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5342                             struct kvm_enable_cap *cap)
5343 {
5344         int r;
5345
5346         if (cap->flags)
5347                 return -EINVAL;
5348
5349         switch (cap->cap) {
5350         case KVM_CAP_DISABLE_QUIRKS:
5351                 kvm->arch.disabled_quirks = cap->args[0];
5352                 r = 0;
5353                 break;
5354         case KVM_CAP_SPLIT_IRQCHIP: {
5355                 mutex_lock(&kvm->lock);
5356                 r = -EINVAL;
5357                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5358                         goto split_irqchip_unlock;
5359                 r = -EEXIST;
5360                 if (irqchip_in_kernel(kvm))
5361                         goto split_irqchip_unlock;
5362                 if (kvm->created_vcpus)
5363                         goto split_irqchip_unlock;
5364                 r = kvm_setup_empty_irq_routing(kvm);
5365                 if (r)
5366                         goto split_irqchip_unlock;
5367                 /* Pairs with irqchip_in_kernel. */
5368                 smp_wmb();
5369                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5370                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5371                 r = 0;
5372 split_irqchip_unlock:
5373                 mutex_unlock(&kvm->lock);
5374                 break;
5375         }
5376         case KVM_CAP_X2APIC_API:
5377                 r = -EINVAL;
5378                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5379                         break;
5380
5381                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5382                         kvm->arch.x2apic_format = true;
5383                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5384                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5385
5386                 r = 0;
5387                 break;
5388         case KVM_CAP_X86_DISABLE_EXITS:
5389                 r = -EINVAL;
5390                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5391                         break;
5392
5393                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5394                         kvm_can_mwait_in_guest())
5395                         kvm->arch.mwait_in_guest = true;
5396                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5397                         kvm->arch.hlt_in_guest = true;
5398                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5399                         kvm->arch.pause_in_guest = true;
5400                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5401                         kvm->arch.cstate_in_guest = true;
5402                 r = 0;
5403                 break;
5404         case KVM_CAP_MSR_PLATFORM_INFO:
5405                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5406                 r = 0;
5407                 break;
5408         case KVM_CAP_EXCEPTION_PAYLOAD:
5409                 kvm->arch.exception_payload_enabled = cap->args[0];
5410                 r = 0;
5411                 break;
5412         case KVM_CAP_X86_USER_SPACE_MSR:
5413                 kvm->arch.user_space_msr_mask = cap->args[0];
5414                 r = 0;
5415                 break;
5416         case KVM_CAP_X86_BUS_LOCK_EXIT:
5417                 r = -EINVAL;
5418                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5419                         break;
5420
5421                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5422                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5423                         break;
5424
5425                 if (kvm_has_bus_lock_exit &&
5426                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5427                         kvm->arch.bus_lock_detection_enabled = true;
5428                 r = 0;
5429                 break;
5430 #ifdef CONFIG_X86_SGX_KVM
5431         case KVM_CAP_SGX_ATTRIBUTE: {
5432                 unsigned long allowed_attributes = 0;
5433
5434                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5435                 if (r)
5436                         break;
5437
5438                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5439                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5440                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5441                         kvm->arch.sgx_provisioning_allowed = true;
5442                 else
5443                         r = -EINVAL;
5444                 break;
5445         }
5446 #endif
5447         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5448                 r = -EINVAL;
5449                 if (kvm_x86_ops.vm_copy_enc_context_from)
5450                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5451                 return r;
5452         default:
5453                 r = -EINVAL;
5454                 break;
5455         }
5456         return r;
5457 }
5458
5459 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5460 {
5461         struct kvm_x86_msr_filter *msr_filter;
5462
5463         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5464         if (!msr_filter)
5465                 return NULL;
5466
5467         msr_filter->default_allow = default_allow;
5468         return msr_filter;
5469 }
5470
5471 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5472 {
5473         u32 i;
5474
5475         if (!msr_filter)
5476                 return;
5477
5478         for (i = 0; i < msr_filter->count; i++)
5479                 kfree(msr_filter->ranges[i].bitmap);
5480
5481         kfree(msr_filter);
5482 }
5483
5484 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5485                               struct kvm_msr_filter_range *user_range)
5486 {
5487         unsigned long *bitmap = NULL;
5488         size_t bitmap_size;
5489
5490         if (!user_range->nmsrs)
5491                 return 0;
5492
5493         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5494                 return -EINVAL;
5495
5496         if (!user_range->flags)
5497                 return -EINVAL;
5498
5499         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5500         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5501                 return -EINVAL;
5502
5503         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5504         if (IS_ERR(bitmap))
5505                 return PTR_ERR(bitmap);
5506
5507         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5508                 .flags = user_range->flags,
5509                 .base = user_range->base,
5510                 .nmsrs = user_range->nmsrs,
5511                 .bitmap = bitmap,
5512         };
5513
5514         msr_filter->count++;
5515         return 0;
5516 }
5517
5518 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5519 {
5520         struct kvm_msr_filter __user *user_msr_filter = argp;
5521         struct kvm_x86_msr_filter *new_filter, *old_filter;
5522         struct kvm_msr_filter filter;
5523         bool default_allow;
5524         bool empty = true;
5525         int r = 0;
5526         u32 i;
5527
5528         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5529                 return -EFAULT;
5530
5531         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5532                 empty &= !filter.ranges[i].nmsrs;
5533
5534         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5535         if (empty && !default_allow)
5536                 return -EINVAL;
5537
5538         new_filter = kvm_alloc_msr_filter(default_allow);
5539         if (!new_filter)
5540                 return -ENOMEM;
5541
5542         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5543                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5544                 if (r) {
5545                         kvm_free_msr_filter(new_filter);
5546                         return r;
5547                 }
5548         }
5549
5550         mutex_lock(&kvm->lock);
5551
5552         /* The per-VM filter is protected by kvm->lock... */
5553         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5554
5555         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5556         synchronize_srcu(&kvm->srcu);
5557
5558         kvm_free_msr_filter(old_filter);
5559
5560         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5561         mutex_unlock(&kvm->lock);
5562
5563         return 0;
5564 }
5565
5566 long kvm_arch_vm_ioctl(struct file *filp,
5567                        unsigned int ioctl, unsigned long arg)
5568 {
5569         struct kvm *kvm = filp->private_data;
5570         void __user *argp = (void __user *)arg;
5571         int r = -ENOTTY;
5572         /*
5573          * This union makes it completely explicit to gcc-3.x
5574          * that these two variables' stack usage should be
5575          * combined, not added together.
5576          */
5577         union {
5578                 struct kvm_pit_state ps;
5579                 struct kvm_pit_state2 ps2;
5580                 struct kvm_pit_config pit_config;
5581         } u;
5582
5583         switch (ioctl) {
5584         case KVM_SET_TSS_ADDR:
5585                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5586                 break;
5587         case KVM_SET_IDENTITY_MAP_ADDR: {
5588                 u64 ident_addr;
5589
5590                 mutex_lock(&kvm->lock);
5591                 r = -EINVAL;
5592                 if (kvm->created_vcpus)
5593                         goto set_identity_unlock;
5594                 r = -EFAULT;
5595                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5596                         goto set_identity_unlock;
5597                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5598 set_identity_unlock:
5599                 mutex_unlock(&kvm->lock);
5600                 break;
5601         }
5602         case KVM_SET_NR_MMU_PAGES:
5603                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5604                 break;
5605         case KVM_GET_NR_MMU_PAGES:
5606                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5607                 break;
5608         case KVM_CREATE_IRQCHIP: {
5609                 mutex_lock(&kvm->lock);
5610
5611                 r = -EEXIST;
5612                 if (irqchip_in_kernel(kvm))
5613                         goto create_irqchip_unlock;
5614
5615                 r = -EINVAL;
5616                 if (kvm->created_vcpus)
5617                         goto create_irqchip_unlock;
5618
5619                 r = kvm_pic_init(kvm);
5620                 if (r)
5621                         goto create_irqchip_unlock;
5622
5623                 r = kvm_ioapic_init(kvm);
5624                 if (r) {
5625                         kvm_pic_destroy(kvm);
5626                         goto create_irqchip_unlock;
5627                 }
5628
5629                 r = kvm_setup_default_irq_routing(kvm);
5630                 if (r) {
5631                         kvm_ioapic_destroy(kvm);
5632                         kvm_pic_destroy(kvm);
5633                         goto create_irqchip_unlock;
5634                 }
5635                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5636                 smp_wmb();
5637                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5638         create_irqchip_unlock:
5639                 mutex_unlock(&kvm->lock);
5640                 break;
5641         }
5642         case KVM_CREATE_PIT:
5643                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5644                 goto create_pit;
5645         case KVM_CREATE_PIT2:
5646                 r = -EFAULT;
5647                 if (copy_from_user(&u.pit_config, argp,
5648                                    sizeof(struct kvm_pit_config)))
5649                         goto out;
5650         create_pit:
5651                 mutex_lock(&kvm->lock);
5652                 r = -EEXIST;
5653                 if (kvm->arch.vpit)
5654                         goto create_pit_unlock;
5655                 r = -ENOMEM;
5656                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5657                 if (kvm->arch.vpit)
5658                         r = 0;
5659         create_pit_unlock:
5660                 mutex_unlock(&kvm->lock);
5661                 break;
5662         case KVM_GET_IRQCHIP: {
5663                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5664                 struct kvm_irqchip *chip;
5665
5666                 chip = memdup_user(argp, sizeof(*chip));
5667                 if (IS_ERR(chip)) {
5668                         r = PTR_ERR(chip);
5669                         goto out;
5670                 }
5671
5672                 r = -ENXIO;
5673                 if (!irqchip_kernel(kvm))
5674                         goto get_irqchip_out;
5675                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5676                 if (r)
5677                         goto get_irqchip_out;
5678                 r = -EFAULT;
5679                 if (copy_to_user(argp, chip, sizeof(*chip)))
5680                         goto get_irqchip_out;
5681                 r = 0;
5682         get_irqchip_out:
5683                 kfree(chip);
5684                 break;
5685         }
5686         case KVM_SET_IRQCHIP: {
5687                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5688                 struct kvm_irqchip *chip;
5689
5690                 chip = memdup_user(argp, sizeof(*chip));
5691                 if (IS_ERR(chip)) {
5692                         r = PTR_ERR(chip);
5693                         goto out;
5694                 }
5695
5696                 r = -ENXIO;
5697                 if (!irqchip_kernel(kvm))
5698                         goto set_irqchip_out;
5699                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5700         set_irqchip_out:
5701                 kfree(chip);
5702                 break;
5703         }
5704         case KVM_GET_PIT: {
5705                 r = -EFAULT;
5706                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5707                         goto out;
5708                 r = -ENXIO;
5709                 if (!kvm->arch.vpit)
5710                         goto out;
5711                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5712                 if (r)
5713                         goto out;
5714                 r = -EFAULT;
5715                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5716                         goto out;
5717                 r = 0;
5718                 break;
5719         }
5720         case KVM_SET_PIT: {
5721                 r = -EFAULT;
5722                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5723                         goto out;
5724                 mutex_lock(&kvm->lock);
5725                 r = -ENXIO;
5726                 if (!kvm->arch.vpit)
5727                         goto set_pit_out;
5728                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5729 set_pit_out:
5730                 mutex_unlock(&kvm->lock);
5731                 break;
5732         }
5733         case KVM_GET_PIT2: {
5734                 r = -ENXIO;
5735                 if (!kvm->arch.vpit)
5736                         goto out;
5737                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5738                 if (r)
5739                         goto out;
5740                 r = -EFAULT;
5741                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5742                         goto out;
5743                 r = 0;
5744                 break;
5745         }
5746         case KVM_SET_PIT2: {
5747                 r = -EFAULT;
5748                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5749                         goto out;
5750                 mutex_lock(&kvm->lock);
5751                 r = -ENXIO;
5752                 if (!kvm->arch.vpit)
5753                         goto set_pit2_out;
5754                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5755 set_pit2_out:
5756                 mutex_unlock(&kvm->lock);
5757                 break;
5758         }
5759         case KVM_REINJECT_CONTROL: {
5760                 struct kvm_reinject_control control;
5761                 r =  -EFAULT;
5762                 if (copy_from_user(&control, argp, sizeof(control)))
5763                         goto out;
5764                 r = -ENXIO;
5765                 if (!kvm->arch.vpit)
5766                         goto out;
5767                 r = kvm_vm_ioctl_reinject(kvm, &control);
5768                 break;
5769         }
5770         case KVM_SET_BOOT_CPU_ID:
5771                 r = 0;
5772                 mutex_lock(&kvm->lock);
5773                 if (kvm->created_vcpus)
5774                         r = -EBUSY;
5775                 else
5776                         kvm->arch.bsp_vcpu_id = arg;
5777                 mutex_unlock(&kvm->lock);
5778                 break;
5779 #ifdef CONFIG_KVM_XEN
5780         case KVM_XEN_HVM_CONFIG: {
5781                 struct kvm_xen_hvm_config xhc;
5782                 r = -EFAULT;
5783                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5784                         goto out;
5785                 r = kvm_xen_hvm_config(kvm, &xhc);
5786                 break;
5787         }
5788         case KVM_XEN_HVM_GET_ATTR: {
5789                 struct kvm_xen_hvm_attr xha;
5790
5791                 r = -EFAULT;
5792                 if (copy_from_user(&xha, argp, sizeof(xha)))
5793                         goto out;
5794                 r = kvm_xen_hvm_get_attr(kvm, &xha);
5795                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
5796                         r = -EFAULT;
5797                 break;
5798         }
5799         case KVM_XEN_HVM_SET_ATTR: {
5800                 struct kvm_xen_hvm_attr xha;
5801
5802                 r = -EFAULT;
5803                 if (copy_from_user(&xha, argp, sizeof(xha)))
5804                         goto out;
5805                 r = kvm_xen_hvm_set_attr(kvm, &xha);
5806                 break;
5807         }
5808 #endif
5809         case KVM_SET_CLOCK: {
5810                 struct kvm_arch *ka = &kvm->arch;
5811                 struct kvm_clock_data user_ns;
5812                 u64 now_ns;
5813
5814                 r = -EFAULT;
5815                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5816                         goto out;
5817
5818                 r = -EINVAL;
5819                 if (user_ns.flags)
5820                         goto out;
5821
5822                 r = 0;
5823                 /*
5824                  * TODO: userspace has to take care of races with VCPU_RUN, so
5825                  * kvm_gen_update_masterclock() can be cut down to locked
5826                  * pvclock_update_vm_gtod_copy().
5827                  */
5828                 kvm_gen_update_masterclock(kvm);
5829
5830                 /*
5831                  * This pairs with kvm_guest_time_update(): when masterclock is
5832                  * in use, we use master_kernel_ns + kvmclock_offset to set
5833                  * unsigned 'system_time' so if we use get_kvmclock_ns() (which
5834                  * is slightly ahead) here we risk going negative on unsigned
5835                  * 'system_time' when 'user_ns.clock' is very small.
5836                  */
5837                 spin_lock_irq(&ka->pvclock_gtod_sync_lock);
5838                 if (kvm->arch.use_master_clock)
5839                         now_ns = ka->master_kernel_ns;
5840                 else
5841                         now_ns = get_kvmclock_base_ns();
5842                 ka->kvmclock_offset = user_ns.clock - now_ns;
5843                 spin_unlock_irq(&ka->pvclock_gtod_sync_lock);
5844
5845                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5846                 break;
5847         }
5848         case KVM_GET_CLOCK: {
5849                 struct kvm_clock_data user_ns;
5850                 u64 now_ns;
5851
5852                 now_ns = get_kvmclock_ns(kvm);
5853                 user_ns.clock = now_ns;
5854                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5855                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5856
5857                 r = -EFAULT;
5858                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5859                         goto out;
5860                 r = 0;
5861                 break;
5862         }
5863         case KVM_MEMORY_ENCRYPT_OP: {
5864                 r = -ENOTTY;
5865                 if (kvm_x86_ops.mem_enc_op)
5866                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
5867                 break;
5868         }
5869         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5870                 struct kvm_enc_region region;
5871
5872                 r = -EFAULT;
5873                 if (copy_from_user(&region, argp, sizeof(region)))
5874                         goto out;
5875
5876                 r = -ENOTTY;
5877                 if (kvm_x86_ops.mem_enc_reg_region)
5878                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
5879                 break;
5880         }
5881         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5882                 struct kvm_enc_region region;
5883
5884                 r = -EFAULT;
5885                 if (copy_from_user(&region, argp, sizeof(region)))
5886                         goto out;
5887
5888                 r = -ENOTTY;
5889                 if (kvm_x86_ops.mem_enc_unreg_region)
5890                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
5891                 break;
5892         }
5893         case KVM_HYPERV_EVENTFD: {
5894                 struct kvm_hyperv_eventfd hvevfd;
5895
5896                 r = -EFAULT;
5897                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5898                         goto out;
5899                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5900                 break;
5901         }
5902         case KVM_SET_PMU_EVENT_FILTER:
5903                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5904                 break;
5905         case KVM_X86_SET_MSR_FILTER:
5906                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5907                 break;
5908         default:
5909                 r = -ENOTTY;
5910         }
5911 out:
5912         return r;
5913 }
5914
5915 static void kvm_init_msr_list(void)
5916 {
5917         struct x86_pmu_capability x86_pmu;
5918         u32 dummy[2];
5919         unsigned i;
5920
5921         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5922                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5923
5924         perf_get_x86_pmu_capability(&x86_pmu);
5925
5926         num_msrs_to_save = 0;
5927         num_emulated_msrs = 0;
5928         num_msr_based_features = 0;
5929
5930         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5931                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5932                         continue;
5933
5934                 /*
5935                  * Even MSRs that are valid in the host may not be exposed
5936                  * to the guests in some cases.
5937                  */
5938                 switch (msrs_to_save_all[i]) {
5939                 case MSR_IA32_BNDCFGS:
5940                         if (!kvm_mpx_supported())
5941                                 continue;
5942                         break;
5943                 case MSR_TSC_AUX:
5944                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5945                                 continue;
5946                         break;
5947                 case MSR_IA32_UMWAIT_CONTROL:
5948                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5949                                 continue;
5950                         break;
5951                 case MSR_IA32_RTIT_CTL:
5952                 case MSR_IA32_RTIT_STATUS:
5953                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5954                                 continue;
5955                         break;
5956                 case MSR_IA32_RTIT_CR3_MATCH:
5957                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5958                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5959                                 continue;
5960                         break;
5961                 case MSR_IA32_RTIT_OUTPUT_BASE:
5962                 case MSR_IA32_RTIT_OUTPUT_MASK:
5963                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5964                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5965                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5966                                 continue;
5967                         break;
5968                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5969                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5970                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5971                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5972                                 continue;
5973                         break;
5974                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5975                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5976                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5977                                 continue;
5978                         break;
5979                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5980                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5981                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5982                                 continue;
5983                         break;
5984                 default:
5985                         break;
5986                 }
5987
5988                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5989         }
5990
5991         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5992                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
5993                         continue;
5994
5995                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5996         }
5997
5998         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5999                 struct kvm_msr_entry msr;
6000
6001                 msr.index = msr_based_features_all[i];
6002                 if (kvm_get_msr_feature(&msr))
6003                         continue;
6004
6005                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6006         }
6007 }
6008
6009 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6010                            const void *v)
6011 {
6012         int handled = 0;
6013         int n;
6014
6015         do {
6016                 n = min(len, 8);
6017                 if (!(lapic_in_kernel(vcpu) &&
6018                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6019                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6020                         break;
6021                 handled += n;
6022                 addr += n;
6023                 len -= n;
6024                 v += n;
6025         } while (len);
6026
6027         return handled;
6028 }
6029
6030 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6031 {
6032         int handled = 0;
6033         int n;
6034
6035         do {
6036                 n = min(len, 8);
6037                 if (!(lapic_in_kernel(vcpu) &&
6038                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6039                                          addr, n, v))
6040                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6041                         break;
6042                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6043                 handled += n;
6044                 addr += n;
6045                 len -= n;
6046                 v += n;
6047         } while (len);
6048
6049         return handled;
6050 }
6051
6052 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6053                         struct kvm_segment *var, int seg)
6054 {
6055         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6056 }
6057
6058 void kvm_get_segment(struct kvm_vcpu *vcpu,
6059                      struct kvm_segment *var, int seg)
6060 {
6061         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6062 }
6063
6064 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6065                            struct x86_exception *exception)
6066 {
6067         gpa_t t_gpa;
6068
6069         BUG_ON(!mmu_is_nested(vcpu));
6070
6071         /* NPT walks are always user-walks */
6072         access |= PFERR_USER_MASK;
6073         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6074
6075         return t_gpa;
6076 }
6077
6078 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6079                               struct x86_exception *exception)
6080 {
6081         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6082         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6083 }
6084 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6085
6086  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6087                                 struct x86_exception *exception)
6088 {
6089         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6090         access |= PFERR_FETCH_MASK;
6091         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6092 }
6093
6094 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6095                                struct x86_exception *exception)
6096 {
6097         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6098         access |= PFERR_WRITE_MASK;
6099         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6100 }
6101 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6102
6103 /* uses this to access any guest's mapped memory without checking CPL */
6104 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6105                                 struct x86_exception *exception)
6106 {
6107         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6108 }
6109
6110 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6111                                       struct kvm_vcpu *vcpu, u32 access,
6112                                       struct x86_exception *exception)
6113 {
6114         void *data = val;
6115         int r = X86EMUL_CONTINUE;
6116
6117         while (bytes) {
6118                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6119                                                             exception);
6120                 unsigned offset = addr & (PAGE_SIZE-1);
6121                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6122                 int ret;
6123
6124                 if (gpa == UNMAPPED_GVA)
6125                         return X86EMUL_PROPAGATE_FAULT;
6126                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6127                                                offset, toread);
6128                 if (ret < 0) {
6129                         r = X86EMUL_IO_NEEDED;
6130                         goto out;
6131                 }
6132
6133                 bytes -= toread;
6134                 data += toread;
6135                 addr += toread;
6136         }
6137 out:
6138         return r;
6139 }
6140
6141 /* used for instruction fetching */
6142 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6143                                 gva_t addr, void *val, unsigned int bytes,
6144                                 struct x86_exception *exception)
6145 {
6146         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6147         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6148         unsigned offset;
6149         int ret;
6150
6151         /* Inline kvm_read_guest_virt_helper for speed.  */
6152         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6153                                                     exception);
6154         if (unlikely(gpa == UNMAPPED_GVA))
6155                 return X86EMUL_PROPAGATE_FAULT;
6156
6157         offset = addr & (PAGE_SIZE-1);
6158         if (WARN_ON(offset + bytes > PAGE_SIZE))
6159                 bytes = (unsigned)PAGE_SIZE - offset;
6160         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6161                                        offset, bytes);
6162         if (unlikely(ret < 0))
6163                 return X86EMUL_IO_NEEDED;
6164
6165         return X86EMUL_CONTINUE;
6166 }
6167
6168 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6169                                gva_t addr, void *val, unsigned int bytes,
6170                                struct x86_exception *exception)
6171 {
6172         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6173
6174         /*
6175          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6176          * is returned, but our callers are not ready for that and they blindly
6177          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6178          * uninitialized kernel stack memory into cr2 and error code.
6179          */
6180         memset(exception, 0, sizeof(*exception));
6181         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6182                                           exception);
6183 }
6184 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6185
6186 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6187                              gva_t addr, void *val, unsigned int bytes,
6188                              struct x86_exception *exception, bool system)
6189 {
6190         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6191         u32 access = 0;
6192
6193         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6194                 access |= PFERR_USER_MASK;
6195
6196         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6197 }
6198
6199 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6200                 unsigned long addr, void *val, unsigned int bytes)
6201 {
6202         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6203         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6204
6205         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6206 }
6207
6208 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6209                                       struct kvm_vcpu *vcpu, u32 access,
6210                                       struct x86_exception *exception)
6211 {
6212         void *data = val;
6213         int r = X86EMUL_CONTINUE;
6214
6215         while (bytes) {
6216                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6217                                                              access,
6218                                                              exception);
6219                 unsigned offset = addr & (PAGE_SIZE-1);
6220                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6221                 int ret;
6222
6223                 if (gpa == UNMAPPED_GVA)
6224                         return X86EMUL_PROPAGATE_FAULT;
6225                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6226                 if (ret < 0) {
6227                         r = X86EMUL_IO_NEEDED;
6228                         goto out;
6229                 }
6230
6231                 bytes -= towrite;
6232                 data += towrite;
6233                 addr += towrite;
6234         }
6235 out:
6236         return r;
6237 }
6238
6239 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6240                               unsigned int bytes, struct x86_exception *exception,
6241                               bool system)
6242 {
6243         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6244         u32 access = PFERR_WRITE_MASK;
6245
6246         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6247                 access |= PFERR_USER_MASK;
6248
6249         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6250                                            access, exception);
6251 }
6252
6253 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6254                                 unsigned int bytes, struct x86_exception *exception)
6255 {
6256         /* kvm_write_guest_virt_system can pull in tons of pages. */
6257         vcpu->arch.l1tf_flush_l1d = true;
6258
6259         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6260                                            PFERR_WRITE_MASK, exception);
6261 }
6262 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6263
6264 int handle_ud(struct kvm_vcpu *vcpu)
6265 {
6266         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6267         int emul_type = EMULTYPE_TRAP_UD;
6268         char sig[5]; /* ud2; .ascii "kvm" */
6269         struct x86_exception e;
6270
6271         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6272                 return 1;
6273
6274         if (force_emulation_prefix &&
6275             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6276                                 sig, sizeof(sig), &e) == 0 &&
6277             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6278                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6279                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6280         }
6281
6282         return kvm_emulate_instruction(vcpu, emul_type);
6283 }
6284 EXPORT_SYMBOL_GPL(handle_ud);
6285
6286 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6287                             gpa_t gpa, bool write)
6288 {
6289         /* For APIC access vmexit */
6290         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6291                 return 1;
6292
6293         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6294                 trace_vcpu_match_mmio(gva, gpa, write, true);
6295                 return 1;
6296         }
6297
6298         return 0;
6299 }
6300
6301 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6302                                 gpa_t *gpa, struct x86_exception *exception,
6303                                 bool write)
6304 {
6305         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6306                 | (write ? PFERR_WRITE_MASK : 0);
6307
6308         /*
6309          * currently PKRU is only applied to ept enabled guest so
6310          * there is no pkey in EPT page table for L1 guest or EPT
6311          * shadow page table for L2 guest.
6312          */
6313         if (vcpu_match_mmio_gva(vcpu, gva)
6314             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6315                                  vcpu->arch.mmio_access, 0, access)) {
6316                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6317                                         (gva & (PAGE_SIZE - 1));
6318                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6319                 return 1;
6320         }
6321
6322         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6323
6324         if (*gpa == UNMAPPED_GVA)
6325                 return -1;
6326
6327         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6328 }
6329
6330 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6331                         const void *val, int bytes)
6332 {
6333         int ret;
6334
6335         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6336         if (ret < 0)
6337                 return 0;
6338         kvm_page_track_write(vcpu, gpa, val, bytes);
6339         return 1;
6340 }
6341
6342 struct read_write_emulator_ops {
6343         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6344                                   int bytes);
6345         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6346                                   void *val, int bytes);
6347         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6348                                int bytes, void *val);
6349         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6350                                     void *val, int bytes);
6351         bool write;
6352 };
6353
6354 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6355 {
6356         if (vcpu->mmio_read_completed) {
6357                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6358                                vcpu->mmio_fragments[0].gpa, val);
6359                 vcpu->mmio_read_completed = 0;
6360                 return 1;
6361         }
6362
6363         return 0;
6364 }
6365
6366 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6367                         void *val, int bytes)
6368 {
6369         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6370 }
6371
6372 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6373                          void *val, int bytes)
6374 {
6375         return emulator_write_phys(vcpu, gpa, val, bytes);
6376 }
6377
6378 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6379 {
6380         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6381         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6382 }
6383
6384 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6385                           void *val, int bytes)
6386 {
6387         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6388         return X86EMUL_IO_NEEDED;
6389 }
6390
6391 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6392                            void *val, int bytes)
6393 {
6394         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6395
6396         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6397         return X86EMUL_CONTINUE;
6398 }
6399
6400 static const struct read_write_emulator_ops read_emultor = {
6401         .read_write_prepare = read_prepare,
6402         .read_write_emulate = read_emulate,
6403         .read_write_mmio = vcpu_mmio_read,
6404         .read_write_exit_mmio = read_exit_mmio,
6405 };
6406
6407 static const struct read_write_emulator_ops write_emultor = {
6408         .read_write_emulate = write_emulate,
6409         .read_write_mmio = write_mmio,
6410         .read_write_exit_mmio = write_exit_mmio,
6411         .write = true,
6412 };
6413
6414 static int emulator_read_write_onepage(unsigned long addr, void *val,
6415                                        unsigned int bytes,
6416                                        struct x86_exception *exception,
6417                                        struct kvm_vcpu *vcpu,
6418                                        const struct read_write_emulator_ops *ops)
6419 {
6420         gpa_t gpa;
6421         int handled, ret;
6422         bool write = ops->write;
6423         struct kvm_mmio_fragment *frag;
6424         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6425
6426         /*
6427          * If the exit was due to a NPF we may already have a GPA.
6428          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6429          * Note, this cannot be used on string operations since string
6430          * operation using rep will only have the initial GPA from the NPF
6431          * occurred.
6432          */
6433         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6434             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6435                 gpa = ctxt->gpa_val;
6436                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6437         } else {
6438                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6439                 if (ret < 0)
6440                         return X86EMUL_PROPAGATE_FAULT;
6441         }
6442
6443         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6444                 return X86EMUL_CONTINUE;
6445
6446         /*
6447          * Is this MMIO handled locally?
6448          */
6449         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6450         if (handled == bytes)
6451                 return X86EMUL_CONTINUE;
6452
6453         gpa += handled;
6454         bytes -= handled;
6455         val += handled;
6456
6457         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6458         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6459         frag->gpa = gpa;
6460         frag->data = val;
6461         frag->len = bytes;
6462         return X86EMUL_CONTINUE;
6463 }
6464
6465 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6466                         unsigned long addr,
6467                         void *val, unsigned int bytes,
6468                         struct x86_exception *exception,
6469                         const struct read_write_emulator_ops *ops)
6470 {
6471         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6472         gpa_t gpa;
6473         int rc;
6474
6475         if (ops->read_write_prepare &&
6476                   ops->read_write_prepare(vcpu, val, bytes))
6477                 return X86EMUL_CONTINUE;
6478
6479         vcpu->mmio_nr_fragments = 0;
6480
6481         /* Crossing a page boundary? */
6482         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6483                 int now;
6484
6485                 now = -addr & ~PAGE_MASK;
6486                 rc = emulator_read_write_onepage(addr, val, now, exception,
6487                                                  vcpu, ops);
6488
6489                 if (rc != X86EMUL_CONTINUE)
6490                         return rc;
6491                 addr += now;
6492                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6493                         addr = (u32)addr;
6494                 val += now;
6495                 bytes -= now;
6496         }
6497
6498         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6499                                          vcpu, ops);
6500         if (rc != X86EMUL_CONTINUE)
6501                 return rc;
6502
6503         if (!vcpu->mmio_nr_fragments)
6504                 return rc;
6505
6506         gpa = vcpu->mmio_fragments[0].gpa;
6507
6508         vcpu->mmio_needed = 1;
6509         vcpu->mmio_cur_fragment = 0;
6510
6511         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6512         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6513         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6514         vcpu->run->mmio.phys_addr = gpa;
6515
6516         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6517 }
6518
6519 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6520                                   unsigned long addr,
6521                                   void *val,
6522                                   unsigned int bytes,
6523                                   struct x86_exception *exception)
6524 {
6525         return emulator_read_write(ctxt, addr, val, bytes,
6526                                    exception, &read_emultor);
6527 }
6528
6529 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6530                             unsigned long addr,
6531                             const void *val,
6532                             unsigned int bytes,
6533                             struct x86_exception *exception)
6534 {
6535         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6536                                    exception, &write_emultor);
6537 }
6538
6539 #define CMPXCHG_TYPE(t, ptr, old, new) \
6540         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6541
6542 #ifdef CONFIG_X86_64
6543 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6544 #else
6545 #  define CMPXCHG64(ptr, old, new) \
6546         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6547 #endif
6548
6549 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6550                                      unsigned long addr,
6551                                      const void *old,
6552                                      const void *new,
6553                                      unsigned int bytes,
6554                                      struct x86_exception *exception)
6555 {
6556         struct kvm_host_map map;
6557         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6558         u64 page_line_mask;
6559         gpa_t gpa;
6560         char *kaddr;
6561         bool exchanged;
6562
6563         /* guests cmpxchg8b have to be emulated atomically */
6564         if (bytes > 8 || (bytes & (bytes - 1)))
6565                 goto emul_write;
6566
6567         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6568
6569         if (gpa == UNMAPPED_GVA ||
6570             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6571                 goto emul_write;
6572
6573         /*
6574          * Emulate the atomic as a straight write to avoid #AC if SLD is
6575          * enabled in the host and the access splits a cache line.
6576          */
6577         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6578                 page_line_mask = ~(cache_line_size() - 1);
6579         else
6580                 page_line_mask = PAGE_MASK;
6581
6582         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6583                 goto emul_write;
6584
6585         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6586                 goto emul_write;
6587
6588         kaddr = map.hva + offset_in_page(gpa);
6589
6590         switch (bytes) {
6591         case 1:
6592                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6593                 break;
6594         case 2:
6595                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6596                 break;
6597         case 4:
6598                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6599                 break;
6600         case 8:
6601                 exchanged = CMPXCHG64(kaddr, old, new);
6602                 break;
6603         default:
6604                 BUG();
6605         }
6606
6607         kvm_vcpu_unmap(vcpu, &map, true);
6608
6609         if (!exchanged)
6610                 return X86EMUL_CMPXCHG_FAILED;
6611
6612         kvm_page_track_write(vcpu, gpa, new, bytes);
6613
6614         return X86EMUL_CONTINUE;
6615
6616 emul_write:
6617         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6618
6619         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6620 }
6621
6622 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6623 {
6624         int r = 0, i;
6625
6626         for (i = 0; i < vcpu->arch.pio.count; i++) {
6627                 if (vcpu->arch.pio.in)
6628                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6629                                             vcpu->arch.pio.size, pd);
6630                 else
6631                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6632                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6633                                              pd);
6634                 if (r)
6635                         break;
6636                 pd += vcpu->arch.pio.size;
6637         }
6638         return r;
6639 }
6640
6641 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6642                                unsigned short port, void *val,
6643                                unsigned int count, bool in)
6644 {
6645         vcpu->arch.pio.port = port;
6646         vcpu->arch.pio.in = in;
6647         vcpu->arch.pio.count  = count;
6648         vcpu->arch.pio.size = size;
6649
6650         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6651                 vcpu->arch.pio.count = 0;
6652                 return 1;
6653         }
6654
6655         vcpu->run->exit_reason = KVM_EXIT_IO;
6656         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6657         vcpu->run->io.size = size;
6658         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6659         vcpu->run->io.count = count;
6660         vcpu->run->io.port = port;
6661
6662         return 0;
6663 }
6664
6665 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6666                            unsigned short port, void *val, unsigned int count)
6667 {
6668         int ret;
6669
6670         if (vcpu->arch.pio.count)
6671                 goto data_avail;
6672
6673         memset(vcpu->arch.pio_data, 0, size * count);
6674
6675         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6676         if (ret) {
6677 data_avail:
6678                 memcpy(val, vcpu->arch.pio_data, size * count);
6679                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6680                 vcpu->arch.pio.count = 0;
6681                 return 1;
6682         }
6683
6684         return 0;
6685 }
6686
6687 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6688                                     int size, unsigned short port, void *val,
6689                                     unsigned int count)
6690 {
6691         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6692
6693 }
6694
6695 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6696                             unsigned short port, const void *val,
6697                             unsigned int count)
6698 {
6699         memcpy(vcpu->arch.pio_data, val, size * count);
6700         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6701         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6702 }
6703
6704 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6705                                      int size, unsigned short port,
6706                                      const void *val, unsigned int count)
6707 {
6708         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6709 }
6710
6711 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6712 {
6713         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
6714 }
6715
6716 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6717 {
6718         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6719 }
6720
6721 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6722 {
6723         if (!need_emulate_wbinvd(vcpu))
6724                 return X86EMUL_CONTINUE;
6725
6726         if (static_call(kvm_x86_has_wbinvd_exit)()) {
6727                 int cpu = get_cpu();
6728
6729                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6730                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
6731                                 wbinvd_ipi, NULL, 1);
6732                 put_cpu();
6733                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6734         } else
6735                 wbinvd();
6736         return X86EMUL_CONTINUE;
6737 }
6738
6739 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6740 {
6741         kvm_emulate_wbinvd_noskip(vcpu);
6742         return kvm_skip_emulated_instruction(vcpu);
6743 }
6744 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6745
6746
6747
6748 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6749 {
6750         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6751 }
6752
6753 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6754                             unsigned long *dest)
6755 {
6756         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6757 }
6758
6759 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6760                            unsigned long value)
6761 {
6762
6763         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6764 }
6765
6766 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6767 {
6768         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6769 }
6770
6771 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6772 {
6773         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6774         unsigned long value;
6775
6776         switch (cr) {
6777         case 0:
6778                 value = kvm_read_cr0(vcpu);
6779                 break;
6780         case 2:
6781                 value = vcpu->arch.cr2;
6782                 break;
6783         case 3:
6784                 value = kvm_read_cr3(vcpu);
6785                 break;
6786         case 4:
6787                 value = kvm_read_cr4(vcpu);
6788                 break;
6789         case 8:
6790                 value = kvm_get_cr8(vcpu);
6791                 break;
6792         default:
6793                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6794                 return 0;
6795         }
6796
6797         return value;
6798 }
6799
6800 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6801 {
6802         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6803         int res = 0;
6804
6805         switch (cr) {
6806         case 0:
6807                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6808                 break;
6809         case 2:
6810                 vcpu->arch.cr2 = val;
6811                 break;
6812         case 3:
6813                 res = kvm_set_cr3(vcpu, val);
6814                 break;
6815         case 4:
6816                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6817                 break;
6818         case 8:
6819                 res = kvm_set_cr8(vcpu, val);
6820                 break;
6821         default:
6822                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6823                 res = -1;
6824         }
6825
6826         return res;
6827 }
6828
6829 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6830 {
6831         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
6832 }
6833
6834 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6835 {
6836         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
6837 }
6838
6839 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6840 {
6841         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
6842 }
6843
6844 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6845 {
6846         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
6847 }
6848
6849 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6850 {
6851         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
6852 }
6853
6854 static unsigned long emulator_get_cached_segment_base(
6855         struct x86_emulate_ctxt *ctxt, int seg)
6856 {
6857         return get_segment_base(emul_to_vcpu(ctxt), seg);
6858 }
6859
6860 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6861                                  struct desc_struct *desc, u32 *base3,
6862                                  int seg)
6863 {
6864         struct kvm_segment var;
6865
6866         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6867         *selector = var.selector;
6868
6869         if (var.unusable) {
6870                 memset(desc, 0, sizeof(*desc));
6871                 if (base3)
6872                         *base3 = 0;
6873                 return false;
6874         }
6875
6876         if (var.g)
6877                 var.limit >>= 12;
6878         set_desc_limit(desc, var.limit);
6879         set_desc_base(desc, (unsigned long)var.base);
6880 #ifdef CONFIG_X86_64
6881         if (base3)
6882                 *base3 = var.base >> 32;
6883 #endif
6884         desc->type = var.type;
6885         desc->s = var.s;
6886         desc->dpl = var.dpl;
6887         desc->p = var.present;
6888         desc->avl = var.avl;
6889         desc->l = var.l;
6890         desc->d = var.db;
6891         desc->g = var.g;
6892
6893         return true;
6894 }
6895
6896 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6897                                  struct desc_struct *desc, u32 base3,
6898                                  int seg)
6899 {
6900         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6901         struct kvm_segment var;
6902
6903         var.selector = selector;
6904         var.base = get_desc_base(desc);
6905 #ifdef CONFIG_X86_64
6906         var.base |= ((u64)base3) << 32;
6907 #endif
6908         var.limit = get_desc_limit(desc);
6909         if (desc->g)
6910                 var.limit = (var.limit << 12) | 0xfff;
6911         var.type = desc->type;
6912         var.dpl = desc->dpl;
6913         var.db = desc->d;
6914         var.s = desc->s;
6915         var.l = desc->l;
6916         var.g = desc->g;
6917         var.avl = desc->avl;
6918         var.present = desc->p;
6919         var.unusable = !var.present;
6920         var.padding = 0;
6921
6922         kvm_set_segment(vcpu, &var, seg);
6923         return;
6924 }
6925
6926 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6927                             u32 msr_index, u64 *pdata)
6928 {
6929         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6930         int r;
6931
6932         r = kvm_get_msr(vcpu, msr_index, pdata);
6933
6934         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6935                 /* Bounce to user space */
6936                 return X86EMUL_IO_NEEDED;
6937         }
6938
6939         return r;
6940 }
6941
6942 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6943                             u32 msr_index, u64 data)
6944 {
6945         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6946         int r;
6947
6948         r = kvm_set_msr(vcpu, msr_index, data);
6949
6950         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6951                 /* Bounce to user space */
6952                 return X86EMUL_IO_NEEDED;
6953         }
6954
6955         return r;
6956 }
6957
6958 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6959 {
6960         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6961
6962         return vcpu->arch.smbase;
6963 }
6964
6965 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6966 {
6967         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6968
6969         vcpu->arch.smbase = smbase;
6970 }
6971
6972 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6973                               u32 pmc)
6974 {
6975         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6976 }
6977
6978 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6979                              u32 pmc, u64 *pdata)
6980 {
6981         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6982 }
6983
6984 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6985 {
6986         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6987 }
6988
6989 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6990                               struct x86_instruction_info *info,
6991                               enum x86_intercept_stage stage)
6992 {
6993         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
6994                                             &ctxt->exception);
6995 }
6996
6997 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6998                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6999                               bool exact_only)
7000 {
7001         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7002 }
7003
7004 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7005 {
7006         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7007 }
7008
7009 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7010 {
7011         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7012 }
7013
7014 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7015 {
7016         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7017 }
7018
7019 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7020 {
7021         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7022 }
7023
7024 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7025 {
7026         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7027 }
7028
7029 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7030 {
7031         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7032 }
7033
7034 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7035 {
7036         return emul_to_vcpu(ctxt)->arch.hflags;
7037 }
7038
7039 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
7040 {
7041         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
7042 }
7043
7044 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
7045                                   const char *smstate)
7046 {
7047         return static_call(kvm_x86_pre_leave_smm)(emul_to_vcpu(ctxt), smstate);
7048 }
7049
7050 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
7051 {
7052         kvm_smm_changed(emul_to_vcpu(ctxt));
7053 }
7054
7055 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7056 {
7057         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7058 }
7059
7060 static const struct x86_emulate_ops emulate_ops = {
7061         .read_gpr            = emulator_read_gpr,
7062         .write_gpr           = emulator_write_gpr,
7063         .read_std            = emulator_read_std,
7064         .write_std           = emulator_write_std,
7065         .read_phys           = kvm_read_guest_phys_system,
7066         .fetch               = kvm_fetch_guest_virt,
7067         .read_emulated       = emulator_read_emulated,
7068         .write_emulated      = emulator_write_emulated,
7069         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7070         .invlpg              = emulator_invlpg,
7071         .pio_in_emulated     = emulator_pio_in_emulated,
7072         .pio_out_emulated    = emulator_pio_out_emulated,
7073         .get_segment         = emulator_get_segment,
7074         .set_segment         = emulator_set_segment,
7075         .get_cached_segment_base = emulator_get_cached_segment_base,
7076         .get_gdt             = emulator_get_gdt,
7077         .get_idt             = emulator_get_idt,
7078         .set_gdt             = emulator_set_gdt,
7079         .set_idt             = emulator_set_idt,
7080         .get_cr              = emulator_get_cr,
7081         .set_cr              = emulator_set_cr,
7082         .cpl                 = emulator_get_cpl,
7083         .get_dr              = emulator_get_dr,
7084         .set_dr              = emulator_set_dr,
7085         .get_smbase          = emulator_get_smbase,
7086         .set_smbase          = emulator_set_smbase,
7087         .set_msr             = emulator_set_msr,
7088         .get_msr             = emulator_get_msr,
7089         .check_pmc           = emulator_check_pmc,
7090         .read_pmc            = emulator_read_pmc,
7091         .halt                = emulator_halt,
7092         .wbinvd              = emulator_wbinvd,
7093         .fix_hypercall       = emulator_fix_hypercall,
7094         .intercept           = emulator_intercept,
7095         .get_cpuid           = emulator_get_cpuid,
7096         .guest_has_long_mode = emulator_guest_has_long_mode,
7097         .guest_has_movbe     = emulator_guest_has_movbe,
7098         .guest_has_fxsr      = emulator_guest_has_fxsr,
7099         .set_nmi_mask        = emulator_set_nmi_mask,
7100         .get_hflags          = emulator_get_hflags,
7101         .set_hflags          = emulator_set_hflags,
7102         .pre_leave_smm       = emulator_pre_leave_smm,
7103         .post_leave_smm      = emulator_post_leave_smm,
7104         .set_xcr             = emulator_set_xcr,
7105 };
7106
7107 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7108 {
7109         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7110         /*
7111          * an sti; sti; sequence only disable interrupts for the first
7112          * instruction. So, if the last instruction, be it emulated or
7113          * not, left the system with the INT_STI flag enabled, it
7114          * means that the last instruction is an sti. We should not
7115          * leave the flag on in this case. The same goes for mov ss
7116          */
7117         if (int_shadow & mask)
7118                 mask = 0;
7119         if (unlikely(int_shadow || mask)) {
7120                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7121                 if (!mask)
7122                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7123         }
7124 }
7125
7126 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7127 {
7128         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7129         if (ctxt->exception.vector == PF_VECTOR)
7130                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7131
7132         if (ctxt->exception.error_code_valid)
7133                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7134                                       ctxt->exception.error_code);
7135         else
7136                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7137         return false;
7138 }
7139
7140 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7141 {
7142         struct x86_emulate_ctxt *ctxt;
7143
7144         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7145         if (!ctxt) {
7146                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7147                 return NULL;
7148         }
7149
7150         ctxt->vcpu = vcpu;
7151         ctxt->ops = &emulate_ops;
7152         vcpu->arch.emulate_ctxt = ctxt;
7153
7154         return ctxt;
7155 }
7156
7157 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7158 {
7159         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7160         int cs_db, cs_l;
7161
7162         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7163
7164         ctxt->gpa_available = false;
7165         ctxt->eflags = kvm_get_rflags(vcpu);
7166         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7167
7168         ctxt->eip = kvm_rip_read(vcpu);
7169         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7170                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7171                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7172                      cs_db                              ? X86EMUL_MODE_PROT32 :
7173                                                           X86EMUL_MODE_PROT16;
7174         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7175         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7176         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7177
7178         init_decode_cache(ctxt);
7179         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7180 }
7181
7182 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7183 {
7184         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7185         int ret;
7186
7187         init_emulate_ctxt(vcpu);
7188
7189         ctxt->op_bytes = 2;
7190         ctxt->ad_bytes = 2;
7191         ctxt->_eip = ctxt->eip + inc_eip;
7192         ret = emulate_int_real(ctxt, irq);
7193
7194         if (ret != X86EMUL_CONTINUE) {
7195                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7196         } else {
7197                 ctxt->eip = ctxt->_eip;
7198                 kvm_rip_write(vcpu, ctxt->eip);
7199                 kvm_set_rflags(vcpu, ctxt->eflags);
7200         }
7201 }
7202 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7203
7204 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7205 {
7206         ++vcpu->stat.insn_emulation_fail;
7207         trace_kvm_emulate_insn_failed(vcpu);
7208
7209         if (emulation_type & EMULTYPE_VMWARE_GP) {
7210                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7211                 return 1;
7212         }
7213
7214         if (emulation_type & EMULTYPE_SKIP) {
7215                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7216                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7217                 vcpu->run->internal.ndata = 0;
7218                 return 0;
7219         }
7220
7221         kvm_queue_exception(vcpu, UD_VECTOR);
7222
7223         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7224                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7225                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
7226                 vcpu->run->internal.ndata = 0;
7227                 return 0;
7228         }
7229
7230         return 1;
7231 }
7232
7233 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7234                                   bool write_fault_to_shadow_pgtable,
7235                                   int emulation_type)
7236 {
7237         gpa_t gpa = cr2_or_gpa;
7238         kvm_pfn_t pfn;
7239
7240         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7241                 return false;
7242
7243         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7244             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7245                 return false;
7246
7247         if (!vcpu->arch.mmu->direct_map) {
7248                 /*
7249                  * Write permission should be allowed since only
7250                  * write access need to be emulated.
7251                  */
7252                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7253
7254                 /*
7255                  * If the mapping is invalid in guest, let cpu retry
7256                  * it to generate fault.
7257                  */
7258                 if (gpa == UNMAPPED_GVA)
7259                         return true;
7260         }
7261
7262         /*
7263          * Do not retry the unhandleable instruction if it faults on the
7264          * readonly host memory, otherwise it will goto a infinite loop:
7265          * retry instruction -> write #PF -> emulation fail -> retry
7266          * instruction -> ...
7267          */
7268         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7269
7270         /*
7271          * If the instruction failed on the error pfn, it can not be fixed,
7272          * report the error to userspace.
7273          */
7274         if (is_error_noslot_pfn(pfn))
7275                 return false;
7276
7277         kvm_release_pfn_clean(pfn);
7278
7279         /* The instructions are well-emulated on direct mmu. */
7280         if (vcpu->arch.mmu->direct_map) {
7281                 unsigned int indirect_shadow_pages;
7282
7283                 write_lock(&vcpu->kvm->mmu_lock);
7284                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7285                 write_unlock(&vcpu->kvm->mmu_lock);
7286
7287                 if (indirect_shadow_pages)
7288                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7289
7290                 return true;
7291         }
7292
7293         /*
7294          * if emulation was due to access to shadowed page table
7295          * and it failed try to unshadow page and re-enter the
7296          * guest to let CPU execute the instruction.
7297          */
7298         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7299
7300         /*
7301          * If the access faults on its page table, it can not
7302          * be fixed by unprotecting shadow page and it should
7303          * be reported to userspace.
7304          */
7305         return !write_fault_to_shadow_pgtable;
7306 }
7307
7308 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7309                               gpa_t cr2_or_gpa,  int emulation_type)
7310 {
7311         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7312         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7313
7314         last_retry_eip = vcpu->arch.last_retry_eip;
7315         last_retry_addr = vcpu->arch.last_retry_addr;
7316
7317         /*
7318          * If the emulation is caused by #PF and it is non-page_table
7319          * writing instruction, it means the VM-EXIT is caused by shadow
7320          * page protected, we can zap the shadow page and retry this
7321          * instruction directly.
7322          *
7323          * Note: if the guest uses a non-page-table modifying instruction
7324          * on the PDE that points to the instruction, then we will unmap
7325          * the instruction and go to an infinite loop. So, we cache the
7326          * last retried eip and the last fault address, if we meet the eip
7327          * and the address again, we can break out of the potential infinite
7328          * loop.
7329          */
7330         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7331
7332         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7333                 return false;
7334
7335         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7336             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7337                 return false;
7338
7339         if (x86_page_table_writing_insn(ctxt))
7340                 return false;
7341
7342         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7343                 return false;
7344
7345         vcpu->arch.last_retry_eip = ctxt->eip;
7346         vcpu->arch.last_retry_addr = cr2_or_gpa;
7347
7348         if (!vcpu->arch.mmu->direct_map)
7349                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7350
7351         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7352
7353         return true;
7354 }
7355
7356 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7357 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7358
7359 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7360 {
7361         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7362                 /* This is a good place to trace that we are exiting SMM.  */
7363                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7364
7365                 /* Process a latched INIT or SMI, if any.  */
7366                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7367         }
7368
7369         kvm_mmu_reset_context(vcpu);
7370 }
7371
7372 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7373                                 unsigned long *db)
7374 {
7375         u32 dr6 = 0;
7376         int i;
7377         u32 enable, rwlen;
7378
7379         enable = dr7;
7380         rwlen = dr7 >> 16;
7381         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7382                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7383                         dr6 |= (1 << i);
7384         return dr6;
7385 }
7386
7387 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7388 {
7389         struct kvm_run *kvm_run = vcpu->run;
7390
7391         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7392                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7393                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7394                 kvm_run->debug.arch.exception = DB_VECTOR;
7395                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7396                 return 0;
7397         }
7398         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7399         return 1;
7400 }
7401
7402 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7403 {
7404         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7405         int r;
7406
7407         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7408         if (unlikely(!r))
7409                 return 0;
7410
7411         /*
7412          * rflags is the old, "raw" value of the flags.  The new value has
7413          * not been saved yet.
7414          *
7415          * This is correct even for TF set by the guest, because "the
7416          * processor will not generate this exception after the instruction
7417          * that sets the TF flag".
7418          */
7419         if (unlikely(rflags & X86_EFLAGS_TF))
7420                 r = kvm_vcpu_do_singlestep(vcpu);
7421         return r;
7422 }
7423 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7424
7425 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7426 {
7427         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7428             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7429                 struct kvm_run *kvm_run = vcpu->run;
7430                 unsigned long eip = kvm_get_linear_rip(vcpu);
7431                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7432                                            vcpu->arch.guest_debug_dr7,
7433                                            vcpu->arch.eff_db);
7434
7435                 if (dr6 != 0) {
7436                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
7437                         kvm_run->debug.arch.pc = eip;
7438                         kvm_run->debug.arch.exception = DB_VECTOR;
7439                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7440                         *r = 0;
7441                         return true;
7442                 }
7443         }
7444
7445         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7446             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7447                 unsigned long eip = kvm_get_linear_rip(vcpu);
7448                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7449                                            vcpu->arch.dr7,
7450                                            vcpu->arch.db);
7451
7452                 if (dr6 != 0) {
7453                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7454                         *r = 1;
7455                         return true;
7456                 }
7457         }
7458
7459         return false;
7460 }
7461
7462 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7463 {
7464         switch (ctxt->opcode_len) {
7465         case 1:
7466                 switch (ctxt->b) {
7467                 case 0xe4:      /* IN */
7468                 case 0xe5:
7469                 case 0xec:
7470                 case 0xed:
7471                 case 0xe6:      /* OUT */
7472                 case 0xe7:
7473                 case 0xee:
7474                 case 0xef:
7475                 case 0x6c:      /* INS */
7476                 case 0x6d:
7477                 case 0x6e:      /* OUTS */
7478                 case 0x6f:
7479                         return true;
7480                 }
7481                 break;
7482         case 2:
7483                 switch (ctxt->b) {
7484                 case 0x33:      /* RDPMC */
7485                         return true;
7486                 }
7487                 break;
7488         }
7489
7490         return false;
7491 }
7492
7493 /*
7494  * Decode to be emulated instruction. Return EMULATION_OK if success.
7495  */
7496 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
7497                                     void *insn, int insn_len)
7498 {
7499         int r = EMULATION_OK;
7500         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7501
7502         init_emulate_ctxt(vcpu);
7503
7504         /*
7505          * We will reenter on the same instruction since we do not set
7506          * complete_userspace_io. This does not handle watchpoints yet,
7507          * those would be handled in the emulate_ops.
7508          */
7509         if (!(emulation_type & EMULTYPE_SKIP) &&
7510             kvm_vcpu_check_breakpoint(vcpu, &r))
7511                 return r;
7512
7513         ctxt->interruptibility = 0;
7514         ctxt->have_exception = false;
7515         ctxt->exception.vector = -1;
7516         ctxt->perm_ok = false;
7517
7518         ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7519
7520         r = x86_decode_insn(ctxt, insn, insn_len);
7521
7522         trace_kvm_emulate_insn_start(vcpu);
7523         ++vcpu->stat.insn_emulation;
7524
7525         return r;
7526 }
7527 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
7528
7529 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7530                             int emulation_type, void *insn, int insn_len)
7531 {
7532         int r;
7533         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7534         bool writeback = true;
7535         bool write_fault_to_spt;
7536
7537         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
7538                 return 1;
7539
7540         vcpu->arch.l1tf_flush_l1d = true;
7541
7542         /*
7543          * Clear write_fault_to_shadow_pgtable here to ensure it is
7544          * never reused.
7545          */
7546         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7547         vcpu->arch.write_fault_to_shadow_pgtable = false;
7548
7549         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7550                 kvm_clear_exception_queue(vcpu);
7551
7552                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
7553                                                     insn, insn_len);
7554                 if (r != EMULATION_OK)  {
7555                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7556                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7557                                 kvm_queue_exception(vcpu, UD_VECTOR);
7558                                 return 1;
7559                         }
7560                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7561                                                   write_fault_to_spt,
7562                                                   emulation_type))
7563                                 return 1;
7564                         if (ctxt->have_exception) {
7565                                 /*
7566                                  * #UD should result in just EMULATION_FAILED, and trap-like
7567                                  * exception should not be encountered during decode.
7568                                  */
7569                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7570                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7571                                 inject_emulated_exception(vcpu);
7572                                 return 1;
7573                         }
7574                         return handle_emulation_failure(vcpu, emulation_type);
7575                 }
7576         }
7577
7578         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7579             !is_vmware_backdoor_opcode(ctxt)) {
7580                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7581                 return 1;
7582         }
7583
7584         /*
7585          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7586          * for kvm_skip_emulated_instruction().  The caller is responsible for
7587          * updating interruptibility state and injecting single-step #DBs.
7588          */
7589         if (emulation_type & EMULTYPE_SKIP) {
7590                 kvm_rip_write(vcpu, ctxt->_eip);
7591                 if (ctxt->eflags & X86_EFLAGS_RF)
7592                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7593                 return 1;
7594         }
7595
7596         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7597                 return 1;
7598
7599         /* this is needed for vmware backdoor interface to work since it
7600            changes registers values  during IO operation */
7601         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7602                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7603                 emulator_invalidate_register_cache(ctxt);
7604         }
7605
7606 restart:
7607         if (emulation_type & EMULTYPE_PF) {
7608                 /* Save the faulting GPA (cr2) in the address field */
7609                 ctxt->exception.address = cr2_or_gpa;
7610
7611                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7612                 if (vcpu->arch.mmu->direct_map) {
7613                         ctxt->gpa_available = true;
7614                         ctxt->gpa_val = cr2_or_gpa;
7615                 }
7616         } else {
7617                 /* Sanitize the address out of an abundance of paranoia. */
7618                 ctxt->exception.address = 0;
7619         }
7620
7621         r = x86_emulate_insn(ctxt);
7622
7623         if (r == EMULATION_INTERCEPTED)
7624                 return 1;
7625
7626         if (r == EMULATION_FAILED) {
7627                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7628                                         emulation_type))
7629                         return 1;
7630
7631                 return handle_emulation_failure(vcpu, emulation_type);
7632         }
7633
7634         if (ctxt->have_exception) {
7635                 r = 1;
7636                 if (inject_emulated_exception(vcpu))
7637                         return r;
7638         } else if (vcpu->arch.pio.count) {
7639                 if (!vcpu->arch.pio.in) {
7640                         /* FIXME: return into emulator if single-stepping.  */
7641                         vcpu->arch.pio.count = 0;
7642                 } else {
7643                         writeback = false;
7644                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7645                 }
7646                 r = 0;
7647         } else if (vcpu->mmio_needed) {
7648                 ++vcpu->stat.mmio_exits;
7649
7650                 if (!vcpu->mmio_is_write)
7651                         writeback = false;
7652                 r = 0;
7653                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7654         } else if (r == EMULATION_RESTART)
7655                 goto restart;
7656         else
7657                 r = 1;
7658
7659         if (writeback) {
7660                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7661                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7662                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7663                 if (!ctxt->have_exception ||
7664                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7665                         kvm_rip_write(vcpu, ctxt->eip);
7666                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7667                                 r = kvm_vcpu_do_singlestep(vcpu);
7668                         if (kvm_x86_ops.update_emulated_instruction)
7669                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
7670                         __kvm_set_rflags(vcpu, ctxt->eflags);
7671                 }
7672
7673                 /*
7674                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7675                  * do nothing, and it will be requested again as soon as
7676                  * the shadow expires.  But we still need to check here,
7677                  * because POPF has no interrupt shadow.
7678                  */
7679                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7680                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7681         } else
7682                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7683
7684         return r;
7685 }
7686
7687 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7688 {
7689         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7690 }
7691 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7692
7693 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7694                                         void *insn, int insn_len)
7695 {
7696         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7697 }
7698 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7699
7700 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7701 {
7702         vcpu->arch.pio.count = 0;
7703         return 1;
7704 }
7705
7706 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7707 {
7708         vcpu->arch.pio.count = 0;
7709
7710         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7711                 return 1;
7712
7713         return kvm_skip_emulated_instruction(vcpu);
7714 }
7715
7716 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7717                             unsigned short port)
7718 {
7719         unsigned long val = kvm_rax_read(vcpu);
7720         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7721
7722         if (ret)
7723                 return ret;
7724
7725         /*
7726          * Workaround userspace that relies on old KVM behavior of %rip being
7727          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7728          */
7729         if (port == 0x7e &&
7730             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7731                 vcpu->arch.complete_userspace_io =
7732                         complete_fast_pio_out_port_0x7e;
7733                 kvm_skip_emulated_instruction(vcpu);
7734         } else {
7735                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7736                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7737         }
7738         return 0;
7739 }
7740
7741 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7742 {
7743         unsigned long val;
7744
7745         /* We should only ever be called with arch.pio.count equal to 1 */
7746         BUG_ON(vcpu->arch.pio.count != 1);
7747
7748         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7749                 vcpu->arch.pio.count = 0;
7750                 return 1;
7751         }
7752
7753         /* For size less than 4 we merge, else we zero extend */
7754         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7755
7756         /*
7757          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7758          * the copy and tracing
7759          */
7760         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7761         kvm_rax_write(vcpu, val);
7762
7763         return kvm_skip_emulated_instruction(vcpu);
7764 }
7765
7766 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7767                            unsigned short port)
7768 {
7769         unsigned long val;
7770         int ret;
7771
7772         /* For size less than 4 we merge, else we zero extend */
7773         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7774
7775         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7776         if (ret) {
7777                 kvm_rax_write(vcpu, val);
7778                 return ret;
7779         }
7780
7781         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7782         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7783
7784         return 0;
7785 }
7786
7787 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7788 {
7789         int ret;
7790
7791         if (in)
7792                 ret = kvm_fast_pio_in(vcpu, size, port);
7793         else
7794                 ret = kvm_fast_pio_out(vcpu, size, port);
7795         return ret && kvm_skip_emulated_instruction(vcpu);
7796 }
7797 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7798
7799 static int kvmclock_cpu_down_prep(unsigned int cpu)
7800 {
7801         __this_cpu_write(cpu_tsc_khz, 0);
7802         return 0;
7803 }
7804
7805 static void tsc_khz_changed(void *data)
7806 {
7807         struct cpufreq_freqs *freq = data;
7808         unsigned long khz = 0;
7809
7810         if (data)
7811                 khz = freq->new;
7812         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7813                 khz = cpufreq_quick_get(raw_smp_processor_id());
7814         if (!khz)
7815                 khz = tsc_khz;
7816         __this_cpu_write(cpu_tsc_khz, khz);
7817 }
7818
7819 #ifdef CONFIG_X86_64
7820 static void kvm_hyperv_tsc_notifier(void)
7821 {
7822         struct kvm *kvm;
7823         struct kvm_vcpu *vcpu;
7824         int cpu;
7825         unsigned long flags;
7826
7827         mutex_lock(&kvm_lock);
7828         list_for_each_entry(kvm, &vm_list, vm_list)
7829                 kvm_make_mclock_inprogress_request(kvm);
7830
7831         hyperv_stop_tsc_emulation();
7832
7833         /* TSC frequency always matches when on Hyper-V */
7834         for_each_present_cpu(cpu)
7835                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7836         kvm_max_guest_tsc_khz = tsc_khz;
7837
7838         list_for_each_entry(kvm, &vm_list, vm_list) {
7839                 struct kvm_arch *ka = &kvm->arch;
7840
7841                 spin_lock_irqsave(&ka->pvclock_gtod_sync_lock, flags);
7842                 pvclock_update_vm_gtod_copy(kvm);
7843                 spin_unlock_irqrestore(&ka->pvclock_gtod_sync_lock, flags);
7844
7845                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7846                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7847
7848                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7849                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7850         }
7851         mutex_unlock(&kvm_lock);
7852 }
7853 #endif
7854
7855 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7856 {
7857         struct kvm *kvm;
7858         struct kvm_vcpu *vcpu;
7859         int i, send_ipi = 0;
7860
7861         /*
7862          * We allow guests to temporarily run on slowing clocks,
7863          * provided we notify them after, or to run on accelerating
7864          * clocks, provided we notify them before.  Thus time never
7865          * goes backwards.
7866          *
7867          * However, we have a problem.  We can't atomically update
7868          * the frequency of a given CPU from this function; it is
7869          * merely a notifier, which can be called from any CPU.
7870          * Changing the TSC frequency at arbitrary points in time
7871          * requires a recomputation of local variables related to
7872          * the TSC for each VCPU.  We must flag these local variables
7873          * to be updated and be sure the update takes place with the
7874          * new frequency before any guests proceed.
7875          *
7876          * Unfortunately, the combination of hotplug CPU and frequency
7877          * change creates an intractable locking scenario; the order
7878          * of when these callouts happen is undefined with respect to
7879          * CPU hotplug, and they can race with each other.  As such,
7880          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7881          * undefined; you can actually have a CPU frequency change take
7882          * place in between the computation of X and the setting of the
7883          * variable.  To protect against this problem, all updates of
7884          * the per_cpu tsc_khz variable are done in an interrupt
7885          * protected IPI, and all callers wishing to update the value
7886          * must wait for a synchronous IPI to complete (which is trivial
7887          * if the caller is on the CPU already).  This establishes the
7888          * necessary total order on variable updates.
7889          *
7890          * Note that because a guest time update may take place
7891          * anytime after the setting of the VCPU's request bit, the
7892          * correct TSC value must be set before the request.  However,
7893          * to ensure the update actually makes it to any guest which
7894          * starts running in hardware virtualization between the set
7895          * and the acquisition of the spinlock, we must also ping the
7896          * CPU after setting the request bit.
7897          *
7898          */
7899
7900         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7901
7902         mutex_lock(&kvm_lock);
7903         list_for_each_entry(kvm, &vm_list, vm_list) {
7904                 kvm_for_each_vcpu(i, vcpu, kvm) {
7905                         if (vcpu->cpu != cpu)
7906                                 continue;
7907                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7908                         if (vcpu->cpu != raw_smp_processor_id())
7909                                 send_ipi = 1;
7910                 }
7911         }
7912         mutex_unlock(&kvm_lock);
7913
7914         if (freq->old < freq->new && send_ipi) {
7915                 /*
7916                  * We upscale the frequency.  Must make the guest
7917                  * doesn't see old kvmclock values while running with
7918                  * the new frequency, otherwise we risk the guest sees
7919                  * time go backwards.
7920                  *
7921                  * In case we update the frequency for another cpu
7922                  * (which might be in guest context) send an interrupt
7923                  * to kick the cpu out of guest context.  Next time
7924                  * guest context is entered kvmclock will be updated,
7925                  * so the guest will not see stale values.
7926                  */
7927                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7928         }
7929 }
7930
7931 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7932                                      void *data)
7933 {
7934         struct cpufreq_freqs *freq = data;
7935         int cpu;
7936
7937         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7938                 return 0;
7939         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7940                 return 0;
7941
7942         for_each_cpu(cpu, freq->policy->cpus)
7943                 __kvmclock_cpufreq_notifier(freq, cpu);
7944
7945         return 0;
7946 }
7947
7948 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7949         .notifier_call  = kvmclock_cpufreq_notifier
7950 };
7951
7952 static int kvmclock_cpu_online(unsigned int cpu)
7953 {
7954         tsc_khz_changed(NULL);
7955         return 0;
7956 }
7957
7958 static void kvm_timer_init(void)
7959 {
7960         max_tsc_khz = tsc_khz;
7961
7962         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7963 #ifdef CONFIG_CPU_FREQ
7964                 struct cpufreq_policy *policy;
7965                 int cpu;
7966
7967                 cpu = get_cpu();
7968                 policy = cpufreq_cpu_get(cpu);
7969                 if (policy) {
7970                         if (policy->cpuinfo.max_freq)
7971                                 max_tsc_khz = policy->cpuinfo.max_freq;
7972                         cpufreq_cpu_put(policy);
7973                 }
7974                 put_cpu();
7975 #endif
7976                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7977                                           CPUFREQ_TRANSITION_NOTIFIER);
7978         }
7979
7980         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7981                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7982 }
7983
7984 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7985 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7986
7987 int kvm_is_in_guest(void)
7988 {
7989         return __this_cpu_read(current_vcpu) != NULL;
7990 }
7991
7992 static int kvm_is_user_mode(void)
7993 {
7994         int user_mode = 3;
7995
7996         if (__this_cpu_read(current_vcpu))
7997                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
7998
7999         return user_mode != 0;
8000 }
8001
8002 static unsigned long kvm_get_guest_ip(void)
8003 {
8004         unsigned long ip = 0;
8005
8006         if (__this_cpu_read(current_vcpu))
8007                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8008
8009         return ip;
8010 }
8011
8012 static void kvm_handle_intel_pt_intr(void)
8013 {
8014         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8015
8016         kvm_make_request(KVM_REQ_PMI, vcpu);
8017         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8018                         (unsigned long *)&vcpu->arch.pmu.global_status);
8019 }
8020
8021 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8022         .is_in_guest            = kvm_is_in_guest,
8023         .is_user_mode           = kvm_is_user_mode,
8024         .get_guest_ip           = kvm_get_guest_ip,
8025         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8026 };
8027
8028 #ifdef CONFIG_X86_64
8029 static void pvclock_gtod_update_fn(struct work_struct *work)
8030 {
8031         struct kvm *kvm;
8032
8033         struct kvm_vcpu *vcpu;
8034         int i;
8035
8036         mutex_lock(&kvm_lock);
8037         list_for_each_entry(kvm, &vm_list, vm_list)
8038                 kvm_for_each_vcpu(i, vcpu, kvm)
8039                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8040         atomic_set(&kvm_guest_has_master_clock, 0);
8041         mutex_unlock(&kvm_lock);
8042 }
8043
8044 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8045
8046 /*
8047  * Notification about pvclock gtod data update.
8048  */
8049 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8050                                void *priv)
8051 {
8052         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8053         struct timekeeper *tk = priv;
8054
8055         update_pvclock_gtod(tk);
8056
8057         /* disable master clock if host does not trust, or does not
8058          * use, TSC based clocksource.
8059          */
8060         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8061             atomic_read(&kvm_guest_has_master_clock) != 0)
8062                 queue_work(system_long_wq, &pvclock_gtod_work);
8063
8064         return 0;
8065 }
8066
8067 static struct notifier_block pvclock_gtod_notifier = {
8068         .notifier_call = pvclock_gtod_notify,
8069 };
8070 #endif
8071
8072 int kvm_arch_init(void *opaque)
8073 {
8074         struct kvm_x86_init_ops *ops = opaque;
8075         int r;
8076
8077         if (kvm_x86_ops.hardware_enable) {
8078                 printk(KERN_ERR "kvm: already loaded the other module\n");
8079                 r = -EEXIST;
8080                 goto out;
8081         }
8082
8083         if (!ops->cpu_has_kvm_support()) {
8084                 pr_err_ratelimited("kvm: no hardware support\n");
8085                 r = -EOPNOTSUPP;
8086                 goto out;
8087         }
8088         if (ops->disabled_by_bios()) {
8089                 pr_err_ratelimited("kvm: disabled by bios\n");
8090                 r = -EOPNOTSUPP;
8091                 goto out;
8092         }
8093
8094         /*
8095          * KVM explicitly assumes that the guest has an FPU and
8096          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8097          * vCPU's FPU state as a fxregs_state struct.
8098          */
8099         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8100                 printk(KERN_ERR "kvm: inadequate fpu\n");
8101                 r = -EOPNOTSUPP;
8102                 goto out;
8103         }
8104
8105         r = -ENOMEM;
8106         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8107                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8108                                           NULL);
8109         if (!x86_fpu_cache) {
8110                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8111                 goto out;
8112         }
8113
8114         x86_emulator_cache = kvm_alloc_emulator_cache();
8115         if (!x86_emulator_cache) {
8116                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8117                 goto out_free_x86_fpu_cache;
8118         }
8119
8120         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8121         if (!user_return_msrs) {
8122                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8123                 goto out_free_x86_emulator_cache;
8124         }
8125
8126         r = kvm_mmu_module_init();
8127         if (r)
8128                 goto out_free_percpu;
8129
8130         kvm_timer_init();
8131
8132         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8133
8134         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8135                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8136                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8137         }
8138
8139         if (pi_inject_timer == -1)
8140                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8141 #ifdef CONFIG_X86_64
8142         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8143
8144         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8145                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8146 #endif
8147
8148         return 0;
8149
8150 out_free_percpu:
8151         free_percpu(user_return_msrs);
8152 out_free_x86_emulator_cache:
8153         kmem_cache_destroy(x86_emulator_cache);
8154 out_free_x86_fpu_cache:
8155         kmem_cache_destroy(x86_fpu_cache);
8156 out:
8157         return r;
8158 }
8159
8160 void kvm_arch_exit(void)
8161 {
8162 #ifdef CONFIG_X86_64
8163         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8164                 clear_hv_tscchange_cb();
8165 #endif
8166         kvm_lapic_exit();
8167         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8168
8169         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8170                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8171                                             CPUFREQ_TRANSITION_NOTIFIER);
8172         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8173 #ifdef CONFIG_X86_64
8174         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8175 #endif
8176         kvm_x86_ops.hardware_enable = NULL;
8177         kvm_mmu_module_exit();
8178         free_percpu(user_return_msrs);
8179         kmem_cache_destroy(x86_fpu_cache);
8180 #ifdef CONFIG_KVM_XEN
8181         static_key_deferred_flush(&kvm_xen_enabled);
8182         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8183 #endif
8184 }
8185
8186 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8187 {
8188         ++vcpu->stat.halt_exits;
8189         if (lapic_in_kernel(vcpu)) {
8190                 vcpu->arch.mp_state = state;
8191                 return 1;
8192         } else {
8193                 vcpu->run->exit_reason = reason;
8194                 return 0;
8195         }
8196 }
8197
8198 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8199 {
8200         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8201 }
8202 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8203
8204 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8205 {
8206         int ret = kvm_skip_emulated_instruction(vcpu);
8207         /*
8208          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8209          * KVM_EXIT_DEBUG here.
8210          */
8211         return kvm_vcpu_halt(vcpu) && ret;
8212 }
8213 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8214
8215 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8216 {
8217         int ret = kvm_skip_emulated_instruction(vcpu);
8218
8219         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8220 }
8221 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8222
8223 #ifdef CONFIG_X86_64
8224 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8225                                 unsigned long clock_type)
8226 {
8227         struct kvm_clock_pairing clock_pairing;
8228         struct timespec64 ts;
8229         u64 cycle;
8230         int ret;
8231
8232         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8233                 return -KVM_EOPNOTSUPP;
8234
8235         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8236                 return -KVM_EOPNOTSUPP;
8237
8238         clock_pairing.sec = ts.tv_sec;
8239         clock_pairing.nsec = ts.tv_nsec;
8240         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8241         clock_pairing.flags = 0;
8242         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8243
8244         ret = 0;
8245         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8246                             sizeof(struct kvm_clock_pairing)))
8247                 ret = -KVM_EFAULT;
8248
8249         return ret;
8250 }
8251 #endif
8252
8253 /*
8254  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8255  *
8256  * @apicid - apicid of vcpu to be kicked.
8257  */
8258 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8259 {
8260         struct kvm_lapic_irq lapic_irq;
8261
8262         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8263         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8264         lapic_irq.level = 0;
8265         lapic_irq.dest_id = apicid;
8266         lapic_irq.msi_redir_hint = false;
8267
8268         lapic_irq.delivery_mode = APIC_DM_REMRD;
8269         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8270 }
8271
8272 bool kvm_apicv_activated(struct kvm *kvm)
8273 {
8274         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8275 }
8276 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8277
8278 void kvm_apicv_init(struct kvm *kvm, bool enable)
8279 {
8280         if (enable)
8281                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8282                           &kvm->arch.apicv_inhibit_reasons);
8283         else
8284                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8285                         &kvm->arch.apicv_inhibit_reasons);
8286 }
8287 EXPORT_SYMBOL_GPL(kvm_apicv_init);
8288
8289 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8290 {
8291         struct kvm_vcpu *target = NULL;
8292         struct kvm_apic_map *map;
8293
8294         vcpu->stat.directed_yield_attempted++;
8295
8296         rcu_read_lock();
8297         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8298
8299         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8300                 target = map->phys_map[dest_id]->vcpu;
8301
8302         rcu_read_unlock();
8303
8304         if (!target || !READ_ONCE(target->ready))
8305                 goto no_yield;
8306
8307         /* Ignore requests to yield to self */
8308         if (vcpu == target)
8309                 goto no_yield;
8310
8311         if (kvm_vcpu_yield_to(target) <= 0)
8312                 goto no_yield;
8313
8314         vcpu->stat.directed_yield_successful++;
8315
8316 no_yield:
8317         return;
8318 }
8319
8320 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8321 {
8322         unsigned long nr, a0, a1, a2, a3, ret;
8323         int op_64_bit;
8324
8325         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8326                 return kvm_xen_hypercall(vcpu);
8327
8328         if (kvm_hv_hypercall_enabled(vcpu))
8329                 return kvm_hv_hypercall(vcpu);
8330
8331         nr = kvm_rax_read(vcpu);
8332         a0 = kvm_rbx_read(vcpu);
8333         a1 = kvm_rcx_read(vcpu);
8334         a2 = kvm_rdx_read(vcpu);
8335         a3 = kvm_rsi_read(vcpu);
8336
8337         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8338
8339         op_64_bit = is_64_bit_mode(vcpu);
8340         if (!op_64_bit) {
8341                 nr &= 0xFFFFFFFF;
8342                 a0 &= 0xFFFFFFFF;
8343                 a1 &= 0xFFFFFFFF;
8344                 a2 &= 0xFFFFFFFF;
8345                 a3 &= 0xFFFFFFFF;
8346         }
8347
8348         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8349                 ret = -KVM_EPERM;
8350                 goto out;
8351         }
8352
8353         ret = -KVM_ENOSYS;
8354
8355         switch (nr) {
8356         case KVM_HC_VAPIC_POLL_IRQ:
8357                 ret = 0;
8358                 break;
8359         case KVM_HC_KICK_CPU:
8360                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8361                         break;
8362
8363                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8364                 kvm_sched_yield(vcpu, a1);
8365                 ret = 0;
8366                 break;
8367 #ifdef CONFIG_X86_64
8368         case KVM_HC_CLOCK_PAIRING:
8369                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8370                 break;
8371 #endif
8372         case KVM_HC_SEND_IPI:
8373                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8374                         break;
8375
8376                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8377                 break;
8378         case KVM_HC_SCHED_YIELD:
8379                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8380                         break;
8381
8382                 kvm_sched_yield(vcpu, a0);
8383                 ret = 0;
8384                 break;
8385         default:
8386                 ret = -KVM_ENOSYS;
8387                 break;
8388         }
8389 out:
8390         if (!op_64_bit)
8391                 ret = (u32)ret;
8392         kvm_rax_write(vcpu, ret);
8393
8394         ++vcpu->stat.hypercalls;
8395         return kvm_skip_emulated_instruction(vcpu);
8396 }
8397 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8398
8399 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8400 {
8401         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8402         char instruction[3];
8403         unsigned long rip = kvm_rip_read(vcpu);
8404
8405         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
8406
8407         return emulator_write_emulated(ctxt, rip, instruction, 3,
8408                 &ctxt->exception);
8409 }
8410
8411 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8412 {
8413         return vcpu->run->request_interrupt_window &&
8414                 likely(!pic_in_kernel(vcpu->kvm));
8415 }
8416
8417 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8418 {
8419         struct kvm_run *kvm_run = vcpu->run;
8420
8421         /*
8422          * if_flag is obsolete and useless, so do not bother
8423          * setting it for SEV-ES guests.  Userspace can just
8424          * use kvm_run->ready_for_interrupt_injection.
8425          */
8426         kvm_run->if_flag = !vcpu->arch.guest_state_protected
8427                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8428
8429         kvm_run->cr8 = kvm_get_cr8(vcpu);
8430         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8431         kvm_run->ready_for_interrupt_injection =
8432                 pic_in_kernel(vcpu->kvm) ||
8433                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8434
8435         if (is_smm(vcpu))
8436                 kvm_run->flags |= KVM_RUN_X86_SMM;
8437 }
8438
8439 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8440 {
8441         int max_irr, tpr;
8442
8443         if (!kvm_x86_ops.update_cr8_intercept)
8444                 return;
8445
8446         if (!lapic_in_kernel(vcpu))
8447                 return;
8448
8449         if (vcpu->arch.apicv_active)
8450                 return;
8451
8452         if (!vcpu->arch.apic->vapic_addr)
8453                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8454         else
8455                 max_irr = -1;
8456
8457         if (max_irr != -1)
8458                 max_irr >>= 4;
8459
8460         tpr = kvm_lapic_get_cr8(vcpu);
8461
8462         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
8463 }
8464
8465
8466 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
8467 {
8468         if (WARN_ON_ONCE(!is_guest_mode(vcpu)))
8469                 return -EIO;
8470
8471         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8472                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
8473                 return 1;
8474         }
8475
8476         return kvm_x86_ops.nested_ops->check_events(vcpu);
8477 }
8478
8479 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
8480 {
8481         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
8482                 vcpu->arch.exception.error_code = false;
8483         static_call(kvm_x86_queue_exception)(vcpu);
8484 }
8485
8486 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8487 {
8488         int r;
8489         bool can_inject = true;
8490
8491         /* try to reinject previous events if any */
8492
8493         if (vcpu->arch.exception.injected) {
8494                 kvm_inject_exception(vcpu);
8495                 can_inject = false;
8496         }
8497         /*
8498          * Do not inject an NMI or interrupt if there is a pending
8499          * exception.  Exceptions and interrupts are recognized at
8500          * instruction boundaries, i.e. the start of an instruction.
8501          * Trap-like exceptions, e.g. #DB, have higher priority than
8502          * NMIs and interrupts, i.e. traps are recognized before an
8503          * NMI/interrupt that's pending on the same instruction.
8504          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8505          * priority, but are only generated (pended) during instruction
8506          * execution, i.e. a pending fault-like exception means the
8507          * fault occurred on the *previous* instruction and must be
8508          * serviced prior to recognizing any new events in order to
8509          * fully complete the previous instruction.
8510          */
8511         else if (!vcpu->arch.exception.pending) {
8512                 if (vcpu->arch.nmi_injected) {
8513                         static_call(kvm_x86_set_nmi)(vcpu);
8514                         can_inject = false;
8515                 } else if (vcpu->arch.interrupt.injected) {
8516                         static_call(kvm_x86_set_irq)(vcpu);
8517                         can_inject = false;
8518                 }
8519         }
8520
8521         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8522                      vcpu->arch.exception.pending);
8523
8524         /*
8525          * Call check_nested_events() even if we reinjected a previous event
8526          * in order for caller to determine if it should require immediate-exit
8527          * from L2 to L1 due to pending L1 events which require exit
8528          * from L2 to L1.
8529          */
8530         if (is_guest_mode(vcpu)) {
8531                 r = kvm_check_nested_events(vcpu);
8532                 if (r < 0)
8533                         goto busy;
8534         }
8535
8536         /* try to inject new event if pending */
8537         if (vcpu->arch.exception.pending) {
8538                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8539                                         vcpu->arch.exception.has_error_code,
8540                                         vcpu->arch.exception.error_code);
8541
8542                 vcpu->arch.exception.pending = false;
8543                 vcpu->arch.exception.injected = true;
8544
8545                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8546                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8547                                              X86_EFLAGS_RF);
8548
8549                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8550                         kvm_deliver_exception_payload(vcpu);
8551                         if (vcpu->arch.dr7 & DR7_GD) {
8552                                 vcpu->arch.dr7 &= ~DR7_GD;
8553                                 kvm_update_dr7(vcpu);
8554                         }
8555                 }
8556
8557                 kvm_inject_exception(vcpu);
8558                 can_inject = false;
8559         }
8560
8561         /*
8562          * Finally, inject interrupt events.  If an event cannot be injected
8563          * due to architectural conditions (e.g. IF=0) a window-open exit
8564          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8565          * and can architecturally be injected, but we cannot do it right now:
8566          * an interrupt could have arrived just now and we have to inject it
8567          * as a vmexit, or there could already an event in the queue, which is
8568          * indicated by can_inject.  In that case we request an immediate exit
8569          * in order to make progress and get back here for another iteration.
8570          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8571          */
8572         if (vcpu->arch.smi_pending) {
8573                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
8574                 if (r < 0)
8575                         goto busy;
8576                 if (r) {
8577                         vcpu->arch.smi_pending = false;
8578                         ++vcpu->arch.smi_count;
8579                         enter_smm(vcpu);
8580                         can_inject = false;
8581                 } else
8582                         static_call(kvm_x86_enable_smi_window)(vcpu);
8583         }
8584
8585         if (vcpu->arch.nmi_pending) {
8586                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
8587                 if (r < 0)
8588                         goto busy;
8589                 if (r) {
8590                         --vcpu->arch.nmi_pending;
8591                         vcpu->arch.nmi_injected = true;
8592                         static_call(kvm_x86_set_nmi)(vcpu);
8593                         can_inject = false;
8594                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
8595                 }
8596                 if (vcpu->arch.nmi_pending)
8597                         static_call(kvm_x86_enable_nmi_window)(vcpu);
8598         }
8599
8600         if (kvm_cpu_has_injectable_intr(vcpu)) {
8601                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
8602                 if (r < 0)
8603                         goto busy;
8604                 if (r) {
8605                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8606                         static_call(kvm_x86_set_irq)(vcpu);
8607                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
8608                 }
8609                 if (kvm_cpu_has_injectable_intr(vcpu))
8610                         static_call(kvm_x86_enable_irq_window)(vcpu);
8611         }
8612
8613         if (is_guest_mode(vcpu) &&
8614             kvm_x86_ops.nested_ops->hv_timer_pending &&
8615             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8616                 *req_immediate_exit = true;
8617
8618         WARN_ON(vcpu->arch.exception.pending);
8619         return;
8620
8621 busy:
8622         *req_immediate_exit = true;
8623         return;
8624 }
8625
8626 static void process_nmi(struct kvm_vcpu *vcpu)
8627 {
8628         unsigned limit = 2;
8629
8630         /*
8631          * x86 is limited to one NMI running, and one NMI pending after it.
8632          * If an NMI is already in progress, limit further NMIs to just one.
8633          * Otherwise, allow two (and we'll inject the first one immediately).
8634          */
8635         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
8636                 limit = 1;
8637
8638         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8639         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8640         kvm_make_request(KVM_REQ_EVENT, vcpu);
8641 }
8642
8643 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8644 {
8645         u32 flags = 0;
8646         flags |= seg->g       << 23;
8647         flags |= seg->db      << 22;
8648         flags |= seg->l       << 21;
8649         flags |= seg->avl     << 20;
8650         flags |= seg->present << 15;
8651         flags |= seg->dpl     << 13;
8652         flags |= seg->s       << 12;
8653         flags |= seg->type    << 8;
8654         return flags;
8655 }
8656
8657 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8658 {
8659         struct kvm_segment seg;
8660         int offset;
8661
8662         kvm_get_segment(vcpu, &seg, n);
8663         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8664
8665         if (n < 3)
8666                 offset = 0x7f84 + n * 12;
8667         else
8668                 offset = 0x7f2c + (n - 3) * 12;
8669
8670         put_smstate(u32, buf, offset + 8, seg.base);
8671         put_smstate(u32, buf, offset + 4, seg.limit);
8672         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8673 }
8674
8675 #ifdef CONFIG_X86_64
8676 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8677 {
8678         struct kvm_segment seg;
8679         int offset;
8680         u16 flags;
8681
8682         kvm_get_segment(vcpu, &seg, n);
8683         offset = 0x7e00 + n * 16;
8684
8685         flags = enter_smm_get_segment_flags(&seg) >> 8;
8686         put_smstate(u16, buf, offset, seg.selector);
8687         put_smstate(u16, buf, offset + 2, flags);
8688         put_smstate(u32, buf, offset + 4, seg.limit);
8689         put_smstate(u64, buf, offset + 8, seg.base);
8690 }
8691 #endif
8692
8693 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8694 {
8695         struct desc_ptr dt;
8696         struct kvm_segment seg;
8697         unsigned long val;
8698         int i;
8699
8700         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8701         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8702         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8703         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8704
8705         for (i = 0; i < 8; i++)
8706                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
8707
8708         kvm_get_dr(vcpu, 6, &val);
8709         put_smstate(u32, buf, 0x7fcc, (u32)val);
8710         kvm_get_dr(vcpu, 7, &val);
8711         put_smstate(u32, buf, 0x7fc8, (u32)val);
8712
8713         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8714         put_smstate(u32, buf, 0x7fc4, seg.selector);
8715         put_smstate(u32, buf, 0x7f64, seg.base);
8716         put_smstate(u32, buf, 0x7f60, seg.limit);
8717         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8718
8719         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8720         put_smstate(u32, buf, 0x7fc0, seg.selector);
8721         put_smstate(u32, buf, 0x7f80, seg.base);
8722         put_smstate(u32, buf, 0x7f7c, seg.limit);
8723         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8724
8725         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8726         put_smstate(u32, buf, 0x7f74, dt.address);
8727         put_smstate(u32, buf, 0x7f70, dt.size);
8728
8729         static_call(kvm_x86_get_idt)(vcpu, &dt);
8730         put_smstate(u32, buf, 0x7f58, dt.address);
8731         put_smstate(u32, buf, 0x7f54, dt.size);
8732
8733         for (i = 0; i < 6; i++)
8734                 enter_smm_save_seg_32(vcpu, buf, i);
8735
8736         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8737
8738         /* revision id */
8739         put_smstate(u32, buf, 0x7efc, 0x00020000);
8740         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8741 }
8742
8743 #ifdef CONFIG_X86_64
8744 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8745 {
8746         struct desc_ptr dt;
8747         struct kvm_segment seg;
8748         unsigned long val;
8749         int i;
8750
8751         for (i = 0; i < 16; i++)
8752                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
8753
8754         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8755         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8756
8757         kvm_get_dr(vcpu, 6, &val);
8758         put_smstate(u64, buf, 0x7f68, val);
8759         kvm_get_dr(vcpu, 7, &val);
8760         put_smstate(u64, buf, 0x7f60, val);
8761
8762         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8763         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8764         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8765
8766         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8767
8768         /* revision id */
8769         put_smstate(u32, buf, 0x7efc, 0x00020064);
8770
8771         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8772
8773         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8774         put_smstate(u16, buf, 0x7e90, seg.selector);
8775         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8776         put_smstate(u32, buf, 0x7e94, seg.limit);
8777         put_smstate(u64, buf, 0x7e98, seg.base);
8778
8779         static_call(kvm_x86_get_idt)(vcpu, &dt);
8780         put_smstate(u32, buf, 0x7e84, dt.size);
8781         put_smstate(u64, buf, 0x7e88, dt.address);
8782
8783         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8784         put_smstate(u16, buf, 0x7e70, seg.selector);
8785         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8786         put_smstate(u32, buf, 0x7e74, seg.limit);
8787         put_smstate(u64, buf, 0x7e78, seg.base);
8788
8789         static_call(kvm_x86_get_gdt)(vcpu, &dt);
8790         put_smstate(u32, buf, 0x7e64, dt.size);
8791         put_smstate(u64, buf, 0x7e68, dt.address);
8792
8793         for (i = 0; i < 6; i++)
8794                 enter_smm_save_seg_64(vcpu, buf, i);
8795 }
8796 #endif
8797
8798 static void enter_smm(struct kvm_vcpu *vcpu)
8799 {
8800         struct kvm_segment cs, ds;
8801         struct desc_ptr dt;
8802         char buf[512];
8803         u32 cr0;
8804
8805         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8806         memset(buf, 0, 512);
8807 #ifdef CONFIG_X86_64
8808         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8809                 enter_smm_save_state_64(vcpu, buf);
8810         else
8811 #endif
8812                 enter_smm_save_state_32(vcpu, buf);
8813
8814         /*
8815          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8816          * vCPU state (e.g. leave guest mode) after we've saved the state into
8817          * the SMM state-save area.
8818          */
8819         static_call(kvm_x86_pre_enter_smm)(vcpu, buf);
8820
8821         vcpu->arch.hflags |= HF_SMM_MASK;
8822         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8823
8824         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
8825                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8826         else
8827                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
8828
8829         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8830         kvm_rip_write(vcpu, 0x8000);
8831
8832         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8833         static_call(kvm_x86_set_cr0)(vcpu, cr0);
8834         vcpu->arch.cr0 = cr0;
8835
8836         static_call(kvm_x86_set_cr4)(vcpu, 0);
8837
8838         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8839         dt.address = dt.size = 0;
8840         static_call(kvm_x86_set_idt)(vcpu, &dt);
8841
8842         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8843
8844         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8845         cs.base = vcpu->arch.smbase;
8846
8847         ds.selector = 0;
8848         ds.base = 0;
8849
8850         cs.limit    = ds.limit = 0xffffffff;
8851         cs.type     = ds.type = 0x3;
8852         cs.dpl      = ds.dpl = 0;
8853         cs.db       = ds.db = 0;
8854         cs.s        = ds.s = 1;
8855         cs.l        = ds.l = 0;
8856         cs.g        = ds.g = 1;
8857         cs.avl      = ds.avl = 0;
8858         cs.present  = ds.present = 1;
8859         cs.unusable = ds.unusable = 0;
8860         cs.padding  = ds.padding = 0;
8861
8862         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8863         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8864         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8865         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8866         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8867         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8868
8869 #ifdef CONFIG_X86_64
8870         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8871                 static_call(kvm_x86_set_efer)(vcpu, 0);
8872 #endif
8873
8874         kvm_update_cpuid_runtime(vcpu);
8875         kvm_mmu_reset_context(vcpu);
8876 }
8877
8878 static void process_smi(struct kvm_vcpu *vcpu)
8879 {
8880         vcpu->arch.smi_pending = true;
8881         kvm_make_request(KVM_REQ_EVENT, vcpu);
8882 }
8883
8884 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8885                                        unsigned long *vcpu_bitmap)
8886 {
8887         cpumask_var_t cpus;
8888
8889         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8890
8891         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8892                                     NULL, vcpu_bitmap, cpus);
8893
8894         free_cpumask_var(cpus);
8895 }
8896
8897 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8898 {
8899         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8900 }
8901
8902 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8903 {
8904         if (!lapic_in_kernel(vcpu))
8905                 return;
8906
8907         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8908         kvm_apic_update_apicv(vcpu);
8909         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
8910 }
8911 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8912
8913 /*
8914  * NOTE: Do not hold any lock prior to calling this.
8915  *
8916  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8917  * locked, because it calls __x86_set_memory_region() which does
8918  * synchronize_srcu(&kvm->srcu).
8919  */
8920 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8921 {
8922         struct kvm_vcpu *except;
8923         unsigned long old, new, expected;
8924
8925         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8926             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
8927                 return;
8928
8929         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8930         do {
8931                 expected = new = old;
8932                 if (activate)
8933                         __clear_bit(bit, &new);
8934                 else
8935                         __set_bit(bit, &new);
8936                 if (new == old)
8937                         break;
8938                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8939         } while (old != expected);
8940
8941         if (!!old == !!new)
8942                 return;
8943
8944         trace_kvm_apicv_update_request(activate, bit);
8945         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8946                 static_call(kvm_x86_pre_update_apicv_exec_ctrl)(kvm, activate);
8947
8948         /*
8949          * Sending request to update APICV for all other vcpus,
8950          * while update the calling vcpu immediately instead of
8951          * waiting for another #VMEXIT to handle the request.
8952          */
8953         except = kvm_get_running_vcpu();
8954         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8955                                          except);
8956         if (except)
8957                 kvm_vcpu_update_apicv(except);
8958 }
8959 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8960
8961 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8962 {
8963         if (!kvm_apic_present(vcpu))
8964                 return;
8965
8966         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8967
8968         if (irqchip_split(vcpu->kvm))
8969                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8970         else {
8971                 if (vcpu->arch.apicv_active)
8972                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
8973                 if (ioapic_in_kernel(vcpu->kvm))
8974                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8975         }
8976
8977         if (is_guest_mode(vcpu))
8978                 vcpu->arch.load_eoi_exitmap_pending = true;
8979         else
8980                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8981 }
8982
8983 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8984 {
8985         u64 eoi_exit_bitmap[4];
8986
8987         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8988                 return;
8989
8990         if (to_hv_vcpu(vcpu))
8991                 bitmap_or((ulong *)eoi_exit_bitmap,
8992                           vcpu->arch.ioapic_handled_vectors,
8993                           to_hv_synic(vcpu)->vec_bitmap, 256);
8994
8995         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
8996 }
8997
8998 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8999                                             unsigned long start, unsigned long end)
9000 {
9001         unsigned long apic_address;
9002
9003         /*
9004          * The physical address of apic access page is stored in the VMCS.
9005          * Update it when it becomes invalid.
9006          */
9007         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9008         if (start <= apic_address && apic_address < end)
9009                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9010 }
9011
9012 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9013 {
9014         if (!lapic_in_kernel(vcpu))
9015                 return;
9016
9017         if (!kvm_x86_ops.set_apic_access_page_addr)
9018                 return;
9019
9020         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9021 }
9022
9023 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9024 {
9025         smp_send_reschedule(vcpu->cpu);
9026 }
9027 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9028
9029 /*
9030  * Returns 1 to let vcpu_run() continue the guest execution loop without
9031  * exiting to the userspace.  Otherwise, the value will be returned to the
9032  * userspace.
9033  */
9034 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9035 {
9036         int r;
9037         bool req_int_win =
9038                 dm_request_for_irq_injection(vcpu) &&
9039                 kvm_cpu_accept_dm_intr(vcpu);
9040         fastpath_t exit_fastpath;
9041
9042         bool req_immediate_exit = false;
9043
9044         /* Forbid vmenter if vcpu dirty ring is soft-full */
9045         if (unlikely(vcpu->kvm->dirty_ring_size &&
9046                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9047                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9048                 trace_kvm_dirty_ring_exit(vcpu);
9049                 r = 0;
9050                 goto out;
9051         }
9052
9053         if (kvm_request_pending(vcpu)) {
9054                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9055                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9056                                 r = 0;
9057                                 goto out;
9058                         }
9059                 }
9060                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9061                         kvm_mmu_unload(vcpu);
9062                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9063                         __kvm_migrate_timers(vcpu);
9064                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9065                         kvm_gen_update_masterclock(vcpu->kvm);
9066                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9067                         kvm_gen_kvmclock_update(vcpu);
9068                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9069                         r = kvm_guest_time_update(vcpu);
9070                         if (unlikely(r))
9071                                 goto out;
9072                 }
9073                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9074                         kvm_mmu_sync_roots(vcpu);
9075                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9076                         kvm_mmu_load_pgd(vcpu);
9077                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9078                         kvm_vcpu_flush_tlb_all(vcpu);
9079
9080                         /* Flushing all ASIDs flushes the current ASID... */
9081                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9082                 }
9083                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9084                         kvm_vcpu_flush_tlb_current(vcpu);
9085                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
9086                         kvm_vcpu_flush_tlb_guest(vcpu);
9087
9088                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9089                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9090                         r = 0;
9091                         goto out;
9092                 }
9093                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9094                         if (is_guest_mode(vcpu)) {
9095                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9096                         } else {
9097                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9098                                 vcpu->mmio_needed = 0;
9099                                 r = 0;
9100                                 goto out;
9101                         }
9102                 }
9103                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9104                         /* Page is swapped out. Do synthetic halt */
9105                         vcpu->arch.apf.halted = true;
9106                         r = 1;
9107                         goto out;
9108                 }
9109                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9110                         record_steal_time(vcpu);
9111                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9112                         process_smi(vcpu);
9113                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9114                         process_nmi(vcpu);
9115                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9116                         kvm_pmu_handle_event(vcpu);
9117                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9118                         kvm_pmu_deliver_pmi(vcpu);
9119                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9120                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9121                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9122                                      vcpu->arch.ioapic_handled_vectors)) {
9123                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9124                                 vcpu->run->eoi.vector =
9125                                                 vcpu->arch.pending_ioapic_eoi;
9126                                 r = 0;
9127                                 goto out;
9128                         }
9129                 }
9130                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9131                         vcpu_scan_ioapic(vcpu);
9132                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9133                         vcpu_load_eoi_exitmap(vcpu);
9134                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9135                         kvm_vcpu_reload_apic_access_page(vcpu);
9136                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9137                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9138                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9139                         r = 0;
9140                         goto out;
9141                 }
9142                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9143                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9144                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9145                         r = 0;
9146                         goto out;
9147                 }
9148                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9149                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9150
9151                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9152                         vcpu->run->hyperv = hv_vcpu->exit;
9153                         r = 0;
9154                         goto out;
9155                 }
9156
9157                 /*
9158                  * KVM_REQ_HV_STIMER has to be processed after
9159                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9160                  * depend on the guest clock being up-to-date
9161                  */
9162                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9163                         kvm_hv_process_stimers(vcpu);
9164                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9165                         kvm_vcpu_update_apicv(vcpu);
9166                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9167                         kvm_check_async_pf_completion(vcpu);
9168                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9169                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9170
9171                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9172                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9173         }
9174
9175         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9176             kvm_xen_has_interrupt(vcpu)) {
9177                 ++vcpu->stat.req_event;
9178                 kvm_apic_accept_events(vcpu);
9179                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9180                         r = 1;
9181                         goto out;
9182                 }
9183
9184                 inject_pending_event(vcpu, &req_immediate_exit);
9185                 if (req_int_win)
9186                         static_call(kvm_x86_enable_irq_window)(vcpu);
9187
9188                 if (kvm_lapic_enabled(vcpu)) {
9189                         update_cr8_intercept(vcpu);
9190                         kvm_lapic_sync_to_vapic(vcpu);
9191                 }
9192         }
9193
9194         r = kvm_mmu_reload(vcpu);
9195         if (unlikely(r)) {
9196                 goto cancel_injection;
9197         }
9198
9199         preempt_disable();
9200
9201         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9202
9203         /*
9204          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9205          * IPI are then delayed after guest entry, which ensures that they
9206          * result in virtual interrupt delivery.
9207          */
9208         local_irq_disable();
9209         vcpu->mode = IN_GUEST_MODE;
9210
9211         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9212
9213         /*
9214          * 1) We should set ->mode before checking ->requests.  Please see
9215          * the comment in kvm_vcpu_exiting_guest_mode().
9216          *
9217          * 2) For APICv, we should set ->mode before checking PID.ON. This
9218          * pairs with the memory barrier implicit in pi_test_and_set_on
9219          * (see vmx_deliver_posted_interrupt).
9220          *
9221          * 3) This also orders the write to mode from any reads to the page
9222          * tables done while the VCPU is running.  Please see the comment
9223          * in kvm_flush_remote_tlbs.
9224          */
9225         smp_mb__after_srcu_read_unlock();
9226
9227         /*
9228          * This handles the case where a posted interrupt was
9229          * notified with kvm_vcpu_kick.
9230          */
9231         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9232                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9233
9234         if (kvm_vcpu_exit_request(vcpu)) {
9235                 vcpu->mode = OUTSIDE_GUEST_MODE;
9236                 smp_wmb();
9237                 local_irq_enable();
9238                 preempt_enable();
9239                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9240                 r = 1;
9241                 goto cancel_injection;
9242         }
9243
9244         if (req_immediate_exit) {
9245                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9246                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9247         }
9248
9249         fpregs_assert_state_consistent();
9250         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9251                 switch_fpu_return();
9252
9253         if (unlikely(vcpu->arch.switch_db_regs)) {
9254                 set_debugreg(0, 7);
9255                 set_debugreg(vcpu->arch.eff_db[0], 0);
9256                 set_debugreg(vcpu->arch.eff_db[1], 1);
9257                 set_debugreg(vcpu->arch.eff_db[2], 2);
9258                 set_debugreg(vcpu->arch.eff_db[3], 3);
9259                 set_debugreg(vcpu->arch.dr6, 6);
9260                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9261         }
9262
9263         for (;;) {
9264                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9265                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9266                         break;
9267
9268                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9269                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9270                         break;
9271                 }
9272
9273                 if (vcpu->arch.apicv_active)
9274                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9275         }
9276
9277         /*
9278          * Do this here before restoring debug registers on the host.  And
9279          * since we do this before handling the vmexit, a DR access vmexit
9280          * can (a) read the correct value of the debug registers, (b) set
9281          * KVM_DEBUGREG_WONT_EXIT again.
9282          */
9283         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9284                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9285                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9286                 kvm_update_dr0123(vcpu);
9287                 kvm_update_dr7(vcpu);
9288                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
9289         }
9290
9291         /*
9292          * If the guest has used debug registers, at least dr7
9293          * will be disabled while returning to the host.
9294          * If we don't have active breakpoints in the host, we don't
9295          * care about the messed up debug address registers. But if
9296          * we have some of them active, restore the old state.
9297          */
9298         if (hw_breakpoint_active())
9299                 hw_breakpoint_restore();
9300
9301         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9302         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9303
9304         vcpu->mode = OUTSIDE_GUEST_MODE;
9305         smp_wmb();
9306
9307         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9308
9309         /*
9310          * Consume any pending interrupts, including the possible source of
9311          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9312          * An instruction is required after local_irq_enable() to fully unblock
9313          * interrupts on processors that implement an interrupt shadow, the
9314          * stat.exits increment will do nicely.
9315          */
9316         kvm_before_interrupt(vcpu);
9317         local_irq_enable();
9318         ++vcpu->stat.exits;
9319         local_irq_disable();
9320         kvm_after_interrupt(vcpu);
9321
9322         if (lapic_in_kernel(vcpu)) {
9323                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
9324                 if (delta != S64_MIN) {
9325                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
9326                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
9327                 }
9328         }
9329
9330         local_irq_enable();
9331         preempt_enable();
9332
9333         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9334
9335         /*
9336          * Profile KVM exit RIPs:
9337          */
9338         if (unlikely(prof_on == KVM_PROFILING)) {
9339                 unsigned long rip = kvm_rip_read(vcpu);
9340                 profile_hit(KVM_PROFILING, (void *)rip);
9341         }
9342
9343         if (unlikely(vcpu->arch.tsc_always_catchup))
9344                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9345
9346         if (vcpu->arch.apic_attention)
9347                 kvm_lapic_sync_from_vapic(vcpu);
9348
9349         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
9350         return r;
9351
9352 cancel_injection:
9353         if (req_immediate_exit)
9354                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9355         static_call(kvm_x86_cancel_injection)(vcpu);
9356         if (unlikely(vcpu->arch.apic_attention))
9357                 kvm_lapic_sync_from_vapic(vcpu);
9358 out:
9359         return r;
9360 }
9361
9362 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
9363 {
9364         if (!kvm_arch_vcpu_runnable(vcpu) &&
9365             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
9366                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9367                 kvm_vcpu_block(vcpu);
9368                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9369
9370                 if (kvm_x86_ops.post_block)
9371                         static_call(kvm_x86_post_block)(vcpu);
9372
9373                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9374                         return 1;
9375         }
9376
9377         kvm_apic_accept_events(vcpu);
9378         switch(vcpu->arch.mp_state) {
9379         case KVM_MP_STATE_HALTED:
9380         case KVM_MP_STATE_AP_RESET_HOLD:
9381                 vcpu->arch.pv.pv_unhalted = false;
9382                 vcpu->arch.mp_state =
9383                         KVM_MP_STATE_RUNNABLE;
9384                 fallthrough;
9385         case KVM_MP_STATE_RUNNABLE:
9386                 vcpu->arch.apf.halted = false;
9387                 break;
9388         case KVM_MP_STATE_INIT_RECEIVED:
9389                 break;
9390         default:
9391                 return -EINTR;
9392         }
9393         return 1;
9394 }
9395
9396 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9397 {
9398         if (is_guest_mode(vcpu))
9399                 kvm_check_nested_events(vcpu);
9400
9401         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9402                 !vcpu->arch.apf.halted);
9403 }
9404
9405 static int vcpu_run(struct kvm_vcpu *vcpu)
9406 {
9407         int r;
9408         struct kvm *kvm = vcpu->kvm;
9409
9410         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9411         vcpu->arch.l1tf_flush_l1d = true;
9412
9413         for (;;) {
9414                 if (kvm_vcpu_running(vcpu)) {
9415                         r = vcpu_enter_guest(vcpu);
9416                 } else {
9417                         r = vcpu_block(kvm, vcpu);
9418                 }
9419
9420                 if (r <= 0)
9421                         break;
9422
9423                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9424                 if (kvm_cpu_has_pending_timer(vcpu))
9425                         kvm_inject_pending_timer_irqs(vcpu);
9426
9427                 if (dm_request_for_irq_injection(vcpu) &&
9428                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9429                         r = 0;
9430                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9431                         ++vcpu->stat.request_irq_exits;
9432                         break;
9433                 }
9434
9435                 if (__xfer_to_guest_mode_work_pending()) {
9436                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9437                         r = xfer_to_guest_mode_handle_work(vcpu);
9438                         if (r)
9439                                 return r;
9440                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9441                 }
9442         }
9443
9444         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9445
9446         return r;
9447 }
9448
9449 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9450 {
9451         int r;
9452
9453         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9454         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9455         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9456         return r;
9457 }
9458
9459 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9460 {
9461         BUG_ON(!vcpu->arch.pio.count);
9462
9463         return complete_emulated_io(vcpu);
9464 }
9465
9466 /*
9467  * Implements the following, as a state machine:
9468  *
9469  * read:
9470  *   for each fragment
9471  *     for each mmio piece in the fragment
9472  *       write gpa, len
9473  *       exit
9474  *       copy data
9475  *   execute insn
9476  *
9477  * write:
9478  *   for each fragment
9479  *     for each mmio piece in the fragment
9480  *       write gpa, len
9481  *       copy data
9482  *       exit
9483  */
9484 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9485 {
9486         struct kvm_run *run = vcpu->run;
9487         struct kvm_mmio_fragment *frag;
9488         unsigned len;
9489
9490         BUG_ON(!vcpu->mmio_needed);
9491
9492         /* Complete previous fragment */
9493         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9494         len = min(8u, frag->len);
9495         if (!vcpu->mmio_is_write)
9496                 memcpy(frag->data, run->mmio.data, len);
9497
9498         if (frag->len <= 8) {
9499                 /* Switch to the next fragment. */
9500                 frag++;
9501                 vcpu->mmio_cur_fragment++;
9502         } else {
9503                 /* Go forward to the next mmio piece. */
9504                 frag->data += len;
9505                 frag->gpa += len;
9506                 frag->len -= len;
9507         }
9508
9509         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9510                 vcpu->mmio_needed = 0;
9511
9512                 /* FIXME: return into emulator if single-stepping.  */
9513                 if (vcpu->mmio_is_write)
9514                         return 1;
9515                 vcpu->mmio_read_completed = 1;
9516                 return complete_emulated_io(vcpu);
9517         }
9518
9519         run->exit_reason = KVM_EXIT_MMIO;
9520         run->mmio.phys_addr = frag->gpa;
9521         if (vcpu->mmio_is_write)
9522                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9523         run->mmio.len = min(8u, frag->len);
9524         run->mmio.is_write = vcpu->mmio_is_write;
9525         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9526         return 0;
9527 }
9528
9529 static void kvm_save_current_fpu(struct fpu *fpu)
9530 {
9531         /*
9532          * If the target FPU state is not resident in the CPU registers, just
9533          * memcpy() from current, else save CPU state directly to the target.
9534          */
9535         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9536                 memcpy(&fpu->state, &current->thread.fpu.state,
9537                        fpu_kernel_xstate_size);
9538         else
9539                 copy_fpregs_to_fpstate(fpu);
9540 }
9541
9542 /* Swap (qemu) user FPU context for the guest FPU context. */
9543 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9544 {
9545         fpregs_lock();
9546
9547         kvm_save_current_fpu(vcpu->arch.user_fpu);
9548
9549         /*
9550          * Guests with protected state can't have it set by the hypervisor,
9551          * so skip trying to set it.
9552          */
9553         if (vcpu->arch.guest_fpu)
9554                 /* PKRU is separately restored in kvm_x86_ops.run. */
9555                 __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9556                                         ~XFEATURE_MASK_PKRU);
9557
9558         fpregs_mark_activate();
9559         fpregs_unlock();
9560
9561         trace_kvm_fpu(1);
9562 }
9563
9564 /* When vcpu_run ends, restore user space FPU context. */
9565 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9566 {
9567         fpregs_lock();
9568
9569         /*
9570          * Guests with protected state can't have it read by the hypervisor,
9571          * so skip trying to save it.
9572          */
9573         if (vcpu->arch.guest_fpu)
9574                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
9575
9576         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9577
9578         fpregs_mark_activate();
9579         fpregs_unlock();
9580
9581         ++vcpu->stat.fpu_reload;
9582         trace_kvm_fpu(0);
9583 }
9584
9585 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9586 {
9587         struct kvm_run *kvm_run = vcpu->run;
9588         int r;
9589
9590         vcpu_load(vcpu);
9591         kvm_sigset_activate(vcpu);
9592         kvm_run->flags = 0;
9593         kvm_load_guest_fpu(vcpu);
9594
9595         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9596                 if (kvm_run->immediate_exit) {
9597                         r = -EINTR;
9598                         goto out;
9599                 }
9600                 kvm_vcpu_block(vcpu);
9601                 kvm_apic_accept_events(vcpu);
9602                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9603                 r = -EAGAIN;
9604                 if (signal_pending(current)) {
9605                         r = -EINTR;
9606                         kvm_run->exit_reason = KVM_EXIT_INTR;
9607                         ++vcpu->stat.signal_exits;
9608                 }
9609                 goto out;
9610         }
9611
9612         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9613                 r = -EINVAL;
9614                 goto out;
9615         }
9616
9617         if (kvm_run->kvm_dirty_regs) {
9618                 r = sync_regs(vcpu);
9619                 if (r != 0)
9620                         goto out;
9621         }
9622
9623         /* re-sync apic's tpr */
9624         if (!lapic_in_kernel(vcpu)) {
9625                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9626                         r = -EINVAL;
9627                         goto out;
9628                 }
9629         }
9630
9631         if (unlikely(vcpu->arch.complete_userspace_io)) {
9632                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9633                 vcpu->arch.complete_userspace_io = NULL;
9634                 r = cui(vcpu);
9635                 if (r <= 0)
9636                         goto out;
9637         } else
9638                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9639
9640         if (kvm_run->immediate_exit)
9641                 r = -EINTR;
9642         else
9643                 r = vcpu_run(vcpu);
9644
9645 out:
9646         kvm_put_guest_fpu(vcpu);
9647         if (kvm_run->kvm_valid_regs)
9648                 store_regs(vcpu);
9649         post_kvm_run_save(vcpu);
9650         kvm_sigset_deactivate(vcpu);
9651
9652         vcpu_put(vcpu);
9653         return r;
9654 }
9655
9656 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9657 {
9658         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9659                 /*
9660                  * We are here if userspace calls get_regs() in the middle of
9661                  * instruction emulation. Registers state needs to be copied
9662                  * back from emulation context to vcpu. Userspace shouldn't do
9663                  * that usually, but some bad designed PV devices (vmware
9664                  * backdoor interface) need this to work
9665                  */
9666                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9667                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9668         }
9669         regs->rax = kvm_rax_read(vcpu);
9670         regs->rbx = kvm_rbx_read(vcpu);
9671         regs->rcx = kvm_rcx_read(vcpu);
9672         regs->rdx = kvm_rdx_read(vcpu);
9673         regs->rsi = kvm_rsi_read(vcpu);
9674         regs->rdi = kvm_rdi_read(vcpu);
9675         regs->rsp = kvm_rsp_read(vcpu);
9676         regs->rbp = kvm_rbp_read(vcpu);
9677 #ifdef CONFIG_X86_64
9678         regs->r8 = kvm_r8_read(vcpu);
9679         regs->r9 = kvm_r9_read(vcpu);
9680         regs->r10 = kvm_r10_read(vcpu);
9681         regs->r11 = kvm_r11_read(vcpu);
9682         regs->r12 = kvm_r12_read(vcpu);
9683         regs->r13 = kvm_r13_read(vcpu);
9684         regs->r14 = kvm_r14_read(vcpu);
9685         regs->r15 = kvm_r15_read(vcpu);
9686 #endif
9687
9688         regs->rip = kvm_rip_read(vcpu);
9689         regs->rflags = kvm_get_rflags(vcpu);
9690 }
9691
9692 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9693 {
9694         vcpu_load(vcpu);
9695         __get_regs(vcpu, regs);
9696         vcpu_put(vcpu);
9697         return 0;
9698 }
9699
9700 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9701 {
9702         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9703         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9704
9705         kvm_rax_write(vcpu, regs->rax);
9706         kvm_rbx_write(vcpu, regs->rbx);
9707         kvm_rcx_write(vcpu, regs->rcx);
9708         kvm_rdx_write(vcpu, regs->rdx);
9709         kvm_rsi_write(vcpu, regs->rsi);
9710         kvm_rdi_write(vcpu, regs->rdi);
9711         kvm_rsp_write(vcpu, regs->rsp);
9712         kvm_rbp_write(vcpu, regs->rbp);
9713 #ifdef CONFIG_X86_64
9714         kvm_r8_write(vcpu, regs->r8);
9715         kvm_r9_write(vcpu, regs->r9);
9716         kvm_r10_write(vcpu, regs->r10);
9717         kvm_r11_write(vcpu, regs->r11);
9718         kvm_r12_write(vcpu, regs->r12);
9719         kvm_r13_write(vcpu, regs->r13);
9720         kvm_r14_write(vcpu, regs->r14);
9721         kvm_r15_write(vcpu, regs->r15);
9722 #endif
9723
9724         kvm_rip_write(vcpu, regs->rip);
9725         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9726
9727         vcpu->arch.exception.pending = false;
9728
9729         kvm_make_request(KVM_REQ_EVENT, vcpu);
9730 }
9731
9732 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9733 {
9734         vcpu_load(vcpu);
9735         __set_regs(vcpu, regs);
9736         vcpu_put(vcpu);
9737         return 0;
9738 }
9739
9740 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9741 {
9742         struct kvm_segment cs;
9743
9744         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9745         *db = cs.db;
9746         *l = cs.l;
9747 }
9748 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9749
9750 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9751 {
9752         struct desc_ptr dt;
9753
9754         if (vcpu->arch.guest_state_protected)
9755                 goto skip_protected_regs;
9756
9757         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9758         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9759         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9760         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9761         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9762         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9763
9764         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9765         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9766
9767         static_call(kvm_x86_get_idt)(vcpu, &dt);
9768         sregs->idt.limit = dt.size;
9769         sregs->idt.base = dt.address;
9770         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9771         sregs->gdt.limit = dt.size;
9772         sregs->gdt.base = dt.address;
9773
9774         sregs->cr2 = vcpu->arch.cr2;
9775         sregs->cr3 = kvm_read_cr3(vcpu);
9776
9777 skip_protected_regs:
9778         sregs->cr0 = kvm_read_cr0(vcpu);
9779         sregs->cr4 = kvm_read_cr4(vcpu);
9780         sregs->cr8 = kvm_get_cr8(vcpu);
9781         sregs->efer = vcpu->arch.efer;
9782         sregs->apic_base = kvm_get_apic_base(vcpu);
9783
9784         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9785
9786         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9787                 set_bit(vcpu->arch.interrupt.nr,
9788                         (unsigned long *)sregs->interrupt_bitmap);
9789 }
9790
9791 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9792                                   struct kvm_sregs *sregs)
9793 {
9794         vcpu_load(vcpu);
9795         __get_sregs(vcpu, sregs);
9796         vcpu_put(vcpu);
9797         return 0;
9798 }
9799
9800 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9801                                     struct kvm_mp_state *mp_state)
9802 {
9803         vcpu_load(vcpu);
9804         if (kvm_mpx_supported())
9805                 kvm_load_guest_fpu(vcpu);
9806
9807         kvm_apic_accept_events(vcpu);
9808         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
9809              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
9810             vcpu->arch.pv.pv_unhalted)
9811                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9812         else
9813                 mp_state->mp_state = vcpu->arch.mp_state;
9814
9815         if (kvm_mpx_supported())
9816                 kvm_put_guest_fpu(vcpu);
9817         vcpu_put(vcpu);
9818         return 0;
9819 }
9820
9821 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9822                                     struct kvm_mp_state *mp_state)
9823 {
9824         int ret = -EINVAL;
9825
9826         vcpu_load(vcpu);
9827
9828         if (!lapic_in_kernel(vcpu) &&
9829             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9830                 goto out;
9831
9832         /*
9833          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9834          * INIT state; latched init should be reported using
9835          * KVM_SET_VCPU_EVENTS, so reject it here.
9836          */
9837         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9838             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9839              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9840                 goto out;
9841
9842         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9843                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9844                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9845         } else
9846                 vcpu->arch.mp_state = mp_state->mp_state;
9847         kvm_make_request(KVM_REQ_EVENT, vcpu);
9848
9849         ret = 0;
9850 out:
9851         vcpu_put(vcpu);
9852         return ret;
9853 }
9854
9855 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9856                     int reason, bool has_error_code, u32 error_code)
9857 {
9858         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9859         int ret;
9860
9861         init_emulate_ctxt(vcpu);
9862
9863         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9864                                    has_error_code, error_code);
9865         if (ret) {
9866                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9867                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9868                 vcpu->run->internal.ndata = 0;
9869                 return 0;
9870         }
9871
9872         kvm_rip_write(vcpu, ctxt->eip);
9873         kvm_set_rflags(vcpu, ctxt->eflags);
9874         return 1;
9875 }
9876 EXPORT_SYMBOL_GPL(kvm_task_switch);
9877
9878 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9879 {
9880         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9881                 /*
9882                  * When EFER.LME and CR0.PG are set, the processor is in
9883                  * 64-bit mode (though maybe in a 32-bit code segment).
9884                  * CR4.PAE and EFER.LMA must be set.
9885                  */
9886                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
9887                         return false;
9888                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
9889                         return false;
9890         } else {
9891                 /*
9892                  * Not in 64-bit mode: EFER.LMA is clear and the code
9893                  * segment cannot be 64-bit.
9894                  */
9895                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9896                         return false;
9897         }
9898
9899         return kvm_is_valid_cr4(vcpu, sregs->cr4);
9900 }
9901
9902 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9903 {
9904         struct msr_data apic_base_msr;
9905         int mmu_reset_needed = 0;
9906         int pending_vec, max_bits, idx;
9907         struct desc_ptr dt;
9908         int ret = -EINVAL;
9909
9910         if (!kvm_is_valid_sregs(vcpu, sregs))
9911                 goto out;
9912
9913         apic_base_msr.data = sregs->apic_base;
9914         apic_base_msr.host_initiated = true;
9915         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9916                 goto out;
9917
9918         if (vcpu->arch.guest_state_protected)
9919                 goto skip_protected_regs;
9920
9921         dt.size = sregs->idt.limit;
9922         dt.address = sregs->idt.base;
9923         static_call(kvm_x86_set_idt)(vcpu, &dt);
9924         dt.size = sregs->gdt.limit;
9925         dt.address = sregs->gdt.base;
9926         static_call(kvm_x86_set_gdt)(vcpu, &dt);
9927
9928         vcpu->arch.cr2 = sregs->cr2;
9929         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9930         vcpu->arch.cr3 = sregs->cr3;
9931         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9932
9933         kvm_set_cr8(vcpu, sregs->cr8);
9934
9935         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9936         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
9937
9938         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9939         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
9940         vcpu->arch.cr0 = sregs->cr0;
9941
9942         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9943         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
9944
9945         idx = srcu_read_lock(&vcpu->kvm->srcu);
9946         if (is_pae_paging(vcpu)) {
9947                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9948                 mmu_reset_needed = 1;
9949         }
9950         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9951
9952         if (mmu_reset_needed)
9953                 kvm_mmu_reset_context(vcpu);
9954
9955         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9956         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9957         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9958         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9959         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9960         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9961
9962         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9963         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9964
9965         update_cr8_intercept(vcpu);
9966
9967         /* Older userspace won't unhalt the vcpu on reset. */
9968         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9969             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9970             !is_protmode(vcpu))
9971                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9972
9973 skip_protected_regs:
9974         max_bits = KVM_NR_INTERRUPTS;
9975         pending_vec = find_first_bit(
9976                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9977         if (pending_vec < max_bits) {
9978                 kvm_queue_interrupt(vcpu, pending_vec, false);
9979                 pr_debug("Set back pending irq %d\n", pending_vec);
9980         }
9981
9982         kvm_make_request(KVM_REQ_EVENT, vcpu);
9983
9984         ret = 0;
9985 out:
9986         return ret;
9987 }
9988
9989 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9990                                   struct kvm_sregs *sregs)
9991 {
9992         int ret;
9993
9994         vcpu_load(vcpu);
9995         ret = __set_sregs(vcpu, sregs);
9996         vcpu_put(vcpu);
9997         return ret;
9998 }
9999
10000 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10001                                         struct kvm_guest_debug *dbg)
10002 {
10003         unsigned long rflags;
10004         int i, r;
10005
10006         if (vcpu->arch.guest_state_protected)
10007                 return -EINVAL;
10008
10009         vcpu_load(vcpu);
10010
10011         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10012                 r = -EBUSY;
10013                 if (vcpu->arch.exception.pending)
10014                         goto out;
10015                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10016                         kvm_queue_exception(vcpu, DB_VECTOR);
10017                 else
10018                         kvm_queue_exception(vcpu, BP_VECTOR);
10019         }
10020
10021         /*
10022          * Read rflags as long as potentially injected trace flags are still
10023          * filtered out.
10024          */
10025         rflags = kvm_get_rflags(vcpu);
10026
10027         vcpu->guest_debug = dbg->control;
10028         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10029                 vcpu->guest_debug = 0;
10030
10031         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10032                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10033                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10034                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10035         } else {
10036                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10037                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10038         }
10039         kvm_update_dr7(vcpu);
10040
10041         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10042                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
10043                         get_segment_base(vcpu, VCPU_SREG_CS);
10044
10045         /*
10046          * Trigger an rflags update that will inject or remove the trace
10047          * flags.
10048          */
10049         kvm_set_rflags(vcpu, rflags);
10050
10051         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10052
10053         r = 0;
10054
10055 out:
10056         vcpu_put(vcpu);
10057         return r;
10058 }
10059
10060 /*
10061  * Translate a guest virtual address to a guest physical address.
10062  */
10063 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10064                                     struct kvm_translation *tr)
10065 {
10066         unsigned long vaddr = tr->linear_address;
10067         gpa_t gpa;
10068         int idx;
10069
10070         vcpu_load(vcpu);
10071
10072         idx = srcu_read_lock(&vcpu->kvm->srcu);
10073         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10074         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10075         tr->physical_address = gpa;
10076         tr->valid = gpa != UNMAPPED_GVA;
10077         tr->writeable = 1;
10078         tr->usermode = 0;
10079
10080         vcpu_put(vcpu);
10081         return 0;
10082 }
10083
10084 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10085 {
10086         struct fxregs_state *fxsave;
10087
10088         if (!vcpu->arch.guest_fpu)
10089                 return 0;
10090
10091         vcpu_load(vcpu);
10092
10093         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10094         memcpy(fpu->fpr, fxsave->st_space, 128);
10095         fpu->fcw = fxsave->cwd;
10096         fpu->fsw = fxsave->swd;
10097         fpu->ftwx = fxsave->twd;
10098         fpu->last_opcode = fxsave->fop;
10099         fpu->last_ip = fxsave->rip;
10100         fpu->last_dp = fxsave->rdp;
10101         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10102
10103         vcpu_put(vcpu);
10104         return 0;
10105 }
10106
10107 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10108 {
10109         struct fxregs_state *fxsave;
10110
10111         if (!vcpu->arch.guest_fpu)
10112                 return 0;
10113
10114         vcpu_load(vcpu);
10115
10116         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10117
10118         memcpy(fxsave->st_space, fpu->fpr, 128);
10119         fxsave->cwd = fpu->fcw;
10120         fxsave->swd = fpu->fsw;
10121         fxsave->twd = fpu->ftwx;
10122         fxsave->fop = fpu->last_opcode;
10123         fxsave->rip = fpu->last_ip;
10124         fxsave->rdp = fpu->last_dp;
10125         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10126
10127         vcpu_put(vcpu);
10128         return 0;
10129 }
10130
10131 static void store_regs(struct kvm_vcpu *vcpu)
10132 {
10133         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10134
10135         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10136                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10137
10138         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10139                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10140
10141         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10142                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10143                                 vcpu, &vcpu->run->s.regs.events);
10144 }
10145
10146 static int sync_regs(struct kvm_vcpu *vcpu)
10147 {
10148         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
10149                 return -EINVAL;
10150
10151         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10152                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10153                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10154         }
10155         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10156                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10157                         return -EINVAL;
10158                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10159         }
10160         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10161                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10162                                 vcpu, &vcpu->run->s.regs.events))
10163                         return -EINVAL;
10164                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10165         }
10166
10167         return 0;
10168 }
10169
10170 static void fx_init(struct kvm_vcpu *vcpu)
10171 {
10172         if (!vcpu->arch.guest_fpu)
10173                 return;
10174
10175         fpstate_init(&vcpu->arch.guest_fpu->state);
10176         if (boot_cpu_has(X86_FEATURE_XSAVES))
10177                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
10178                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
10179
10180         /*
10181          * Ensure guest xcr0 is valid for loading
10182          */
10183         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10184
10185         vcpu->arch.cr0 |= X86_CR0_ET;
10186 }
10187
10188 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10189 {
10190         if (vcpu->arch.guest_fpu) {
10191                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10192                 vcpu->arch.guest_fpu = NULL;
10193         }
10194 }
10195 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10196
10197 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10198 {
10199         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10200                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10201                              "guest TSC will not be reliable\n");
10202
10203         return 0;
10204 }
10205
10206 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10207 {
10208         struct page *page;
10209         int r;
10210
10211         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10212                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10213         else
10214                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10215
10216         kvm_set_tsc_khz(vcpu, max_tsc_khz);
10217
10218         r = kvm_mmu_create(vcpu);
10219         if (r < 0)
10220                 return r;
10221
10222         if (irqchip_in_kernel(vcpu->kvm)) {
10223                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10224                 if (r < 0)
10225                         goto fail_mmu_destroy;
10226                 if (kvm_apicv_activated(vcpu->kvm))
10227                         vcpu->arch.apicv_active = true;
10228         } else
10229                 static_branch_inc(&kvm_has_noapic_vcpu);
10230
10231         r = -ENOMEM;
10232
10233         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10234         if (!page)
10235                 goto fail_free_lapic;
10236         vcpu->arch.pio_data = page_address(page);
10237
10238         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10239                                        GFP_KERNEL_ACCOUNT);
10240         if (!vcpu->arch.mce_banks)
10241                 goto fail_free_pio_data;
10242         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10243
10244         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10245                                 GFP_KERNEL_ACCOUNT))
10246                 goto fail_free_mce_banks;
10247
10248         if (!alloc_emulate_ctxt(vcpu))
10249                 goto free_wbinvd_dirty_mask;
10250
10251         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10252                                                 GFP_KERNEL_ACCOUNT);
10253         if (!vcpu->arch.user_fpu) {
10254                 pr_err("kvm: failed to allocate userspace's fpu\n");
10255                 goto free_emulate_ctxt;
10256         }
10257
10258         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10259                                                  GFP_KERNEL_ACCOUNT);
10260         if (!vcpu->arch.guest_fpu) {
10261                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10262                 goto free_user_fpu;
10263         }
10264         fx_init(vcpu);
10265
10266         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10267         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10268
10269         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10270
10271         kvm_async_pf_hash_reset(vcpu);
10272         kvm_pmu_init(vcpu);
10273
10274         vcpu->arch.pending_external_vector = -1;
10275         vcpu->arch.preempted_in_kernel = false;
10276
10277         r = static_call(kvm_x86_vcpu_create)(vcpu);
10278         if (r)
10279                 goto free_guest_fpu;
10280
10281         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
10282         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
10283         kvm_vcpu_mtrr_init(vcpu);
10284         vcpu_load(vcpu);
10285         kvm_vcpu_reset(vcpu, false);
10286         kvm_init_mmu(vcpu, false);
10287         vcpu_put(vcpu);
10288         return 0;
10289
10290 free_guest_fpu:
10291         kvm_free_guest_fpu(vcpu);
10292 free_user_fpu:
10293         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10294 free_emulate_ctxt:
10295         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10296 free_wbinvd_dirty_mask:
10297         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10298 fail_free_mce_banks:
10299         kfree(vcpu->arch.mce_banks);
10300 fail_free_pio_data:
10301         free_page((unsigned long)vcpu->arch.pio_data);
10302 fail_free_lapic:
10303         kvm_free_lapic(vcpu);
10304 fail_mmu_destroy:
10305         kvm_mmu_destroy(vcpu);
10306         return r;
10307 }
10308
10309 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
10310 {
10311         struct kvm *kvm = vcpu->kvm;
10312
10313         if (mutex_lock_killable(&vcpu->mutex))
10314                 return;
10315         vcpu_load(vcpu);
10316         kvm_synchronize_tsc(vcpu, 0);
10317         vcpu_put(vcpu);
10318
10319         /* poll control enabled by default */
10320         vcpu->arch.msr_kvm_poll_control = 1;
10321
10322         mutex_unlock(&vcpu->mutex);
10323
10324         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
10325                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
10326                                                 KVMCLOCK_SYNC_PERIOD);
10327 }
10328
10329 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
10330 {
10331         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
10332         int idx;
10333
10334         kvm_release_pfn(cache->pfn, cache->dirty, cache);
10335
10336         kvmclock_reset(vcpu);
10337
10338         static_call(kvm_x86_vcpu_free)(vcpu);
10339
10340         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
10341         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
10342         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
10343         kvm_free_guest_fpu(vcpu);
10344
10345         kvm_hv_vcpu_uninit(vcpu);
10346         kvm_pmu_destroy(vcpu);
10347         kfree(vcpu->arch.mce_banks);
10348         kvm_free_lapic(vcpu);
10349         idx = srcu_read_lock(&vcpu->kvm->srcu);
10350         kvm_mmu_destroy(vcpu);
10351         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10352         free_page((unsigned long)vcpu->arch.pio_data);
10353         kvfree(vcpu->arch.cpuid_entries);
10354         if (!lapic_in_kernel(vcpu))
10355                 static_branch_dec(&kvm_has_noapic_vcpu);
10356 }
10357
10358 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
10359 {
10360         kvm_lapic_reset(vcpu, init_event);
10361
10362         vcpu->arch.hflags = 0;
10363
10364         vcpu->arch.smi_pending = 0;
10365         vcpu->arch.smi_count = 0;
10366         atomic_set(&vcpu->arch.nmi_queued, 0);
10367         vcpu->arch.nmi_pending = 0;
10368         vcpu->arch.nmi_injected = false;
10369         kvm_clear_interrupt_queue(vcpu);
10370         kvm_clear_exception_queue(vcpu);
10371
10372         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
10373         kvm_update_dr0123(vcpu);
10374         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
10375         vcpu->arch.dr7 = DR7_FIXED_1;
10376         kvm_update_dr7(vcpu);
10377
10378         vcpu->arch.cr2 = 0;
10379
10380         kvm_make_request(KVM_REQ_EVENT, vcpu);
10381         vcpu->arch.apf.msr_en_val = 0;
10382         vcpu->arch.apf.msr_int_val = 0;
10383         vcpu->arch.st.msr_val = 0;
10384
10385         kvmclock_reset(vcpu);
10386
10387         kvm_clear_async_pf_completion_queue(vcpu);
10388         kvm_async_pf_hash_reset(vcpu);
10389         vcpu->arch.apf.halted = false;
10390
10391         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
10392                 void *mpx_state_buffer;
10393
10394                 /*
10395                  * To avoid have the INIT path from kvm_apic_has_events() that be
10396                  * called with loaded FPU and does not let userspace fix the state.
10397                  */
10398                 if (init_event)
10399                         kvm_put_guest_fpu(vcpu);
10400                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10401                                         XFEATURE_BNDREGS);
10402                 if (mpx_state_buffer)
10403                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
10404                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
10405                                         XFEATURE_BNDCSR);
10406                 if (mpx_state_buffer)
10407                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10408                 if (init_event)
10409                         kvm_load_guest_fpu(vcpu);
10410         }
10411
10412         if (!init_event) {
10413                 kvm_pmu_reset(vcpu);
10414                 vcpu->arch.smbase = 0x30000;
10415
10416                 vcpu->arch.msr_misc_features_enables = 0;
10417
10418                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10419         }
10420
10421         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10422         vcpu->arch.regs_avail = ~0;
10423         vcpu->arch.regs_dirty = ~0;
10424
10425         vcpu->arch.ia32_xss = 0;
10426
10427         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
10428 }
10429
10430 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10431 {
10432         struct kvm_segment cs;
10433
10434         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10435         cs.selector = vector << 8;
10436         cs.base = vector << 12;
10437         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10438         kvm_rip_write(vcpu, 0);
10439 }
10440 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
10441
10442 int kvm_arch_hardware_enable(void)
10443 {
10444         struct kvm *kvm;
10445         struct kvm_vcpu *vcpu;
10446         int i;
10447         int ret;
10448         u64 local_tsc;
10449         u64 max_tsc = 0;
10450         bool stable, backwards_tsc = false;
10451
10452         kvm_user_return_msr_cpu_online();
10453         ret = static_call(kvm_x86_hardware_enable)();
10454         if (ret != 0)
10455                 return ret;
10456
10457         local_tsc = rdtsc();
10458         stable = !kvm_check_tsc_unstable();
10459         list_for_each_entry(kvm, &vm_list, vm_list) {
10460                 kvm_for_each_vcpu(i, vcpu, kvm) {
10461                         if (!stable && vcpu->cpu == smp_processor_id())
10462                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10463                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10464                                 backwards_tsc = true;
10465                                 if (vcpu->arch.last_host_tsc > max_tsc)
10466                                         max_tsc = vcpu->arch.last_host_tsc;
10467                         }
10468                 }
10469         }
10470
10471         /*
10472          * Sometimes, even reliable TSCs go backwards.  This happens on
10473          * platforms that reset TSC during suspend or hibernate actions, but
10474          * maintain synchronization.  We must compensate.  Fortunately, we can
10475          * detect that condition here, which happens early in CPU bringup,
10476          * before any KVM threads can be running.  Unfortunately, we can't
10477          * bring the TSCs fully up to date with real time, as we aren't yet far
10478          * enough into CPU bringup that we know how much real time has actually
10479          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10480          * variables that haven't been updated yet.
10481          *
10482          * So we simply find the maximum observed TSC above, then record the
10483          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10484          * the adjustment will be applied.  Note that we accumulate
10485          * adjustments, in case multiple suspend cycles happen before some VCPU
10486          * gets a chance to run again.  In the event that no KVM threads get a
10487          * chance to run, we will miss the entire elapsed period, as we'll have
10488          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10489          * loose cycle time.  This isn't too big a deal, since the loss will be
10490          * uniform across all VCPUs (not to mention the scenario is extremely
10491          * unlikely). It is possible that a second hibernate recovery happens
10492          * much faster than a first, causing the observed TSC here to be
10493          * smaller; this would require additional padding adjustment, which is
10494          * why we set last_host_tsc to the local tsc observed here.
10495          *
10496          * N.B. - this code below runs only on platforms with reliable TSC,
10497          * as that is the only way backwards_tsc is set above.  Also note
10498          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10499          * have the same delta_cyc adjustment applied if backwards_tsc
10500          * is detected.  Note further, this adjustment is only done once,
10501          * as we reset last_host_tsc on all VCPUs to stop this from being
10502          * called multiple times (one for each physical CPU bringup).
10503          *
10504          * Platforms with unreliable TSCs don't have to deal with this, they
10505          * will be compensated by the logic in vcpu_load, which sets the TSC to
10506          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10507          * guarantee that they stay in perfect synchronization.
10508          */
10509         if (backwards_tsc) {
10510                 u64 delta_cyc = max_tsc - local_tsc;
10511                 list_for_each_entry(kvm, &vm_list, vm_list) {
10512                         kvm->arch.backwards_tsc_observed = true;
10513                         kvm_for_each_vcpu(i, vcpu, kvm) {
10514                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10515                                 vcpu->arch.last_host_tsc = local_tsc;
10516                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10517                         }
10518
10519                         /*
10520                          * We have to disable TSC offset matching.. if you were
10521                          * booting a VM while issuing an S4 host suspend....
10522                          * you may have some problem.  Solving this issue is
10523                          * left as an exercise to the reader.
10524                          */
10525                         kvm->arch.last_tsc_nsec = 0;
10526                         kvm->arch.last_tsc_write = 0;
10527                 }
10528
10529         }
10530         return 0;
10531 }
10532
10533 void kvm_arch_hardware_disable(void)
10534 {
10535         static_call(kvm_x86_hardware_disable)();
10536         drop_user_return_notifiers();
10537 }
10538
10539 int kvm_arch_hardware_setup(void *opaque)
10540 {
10541         struct kvm_x86_init_ops *ops = opaque;
10542         int r;
10543
10544         rdmsrl_safe(MSR_EFER, &host_efer);
10545
10546         if (boot_cpu_has(X86_FEATURE_XSAVES))
10547                 rdmsrl(MSR_IA32_XSS, host_xss);
10548
10549         r = ops->hardware_setup();
10550         if (r != 0)
10551                 return r;
10552
10553         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10554         kvm_ops_static_call_update();
10555
10556         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10557                 supported_xss = 0;
10558
10559 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10560         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10561 #undef __kvm_cpu_cap_has
10562
10563         if (kvm_has_tsc_control) {
10564                 /*
10565                  * Make sure the user can only configure tsc_khz values that
10566                  * fit into a signed integer.
10567                  * A min value is not calculated because it will always
10568                  * be 1 on all machines.
10569                  */
10570                 u64 max = min(0x7fffffffULL,
10571                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10572                 kvm_max_guest_tsc_khz = max;
10573
10574                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10575         }
10576
10577         kvm_init_msr_list();
10578         return 0;
10579 }
10580
10581 void kvm_arch_hardware_unsetup(void)
10582 {
10583         static_call(kvm_x86_hardware_unsetup)();
10584 }
10585
10586 int kvm_arch_check_processor_compat(void *opaque)
10587 {
10588         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10589         struct kvm_x86_init_ops *ops = opaque;
10590
10591         WARN_ON(!irqs_disabled());
10592
10593         if (__cr4_reserved_bits(cpu_has, c) !=
10594             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10595                 return -EIO;
10596
10597         return ops->check_processor_compatibility();
10598 }
10599
10600 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10601 {
10602         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10603 }
10604 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10605
10606 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10607 {
10608         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10609 }
10610
10611 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
10612 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
10613
10614 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10615 {
10616         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10617
10618         vcpu->arch.l1tf_flush_l1d = true;
10619         if (pmu->version && unlikely(pmu->event_count)) {
10620                 pmu->need_cleanup = true;
10621                 kvm_make_request(KVM_REQ_PMU, vcpu);
10622         }
10623         static_call(kvm_x86_sched_in)(vcpu, cpu);
10624 }
10625
10626 void kvm_arch_free_vm(struct kvm *kvm)
10627 {
10628         kfree(to_kvm_hv(kvm)->hv_pa_pg);
10629         vfree(kvm);
10630 }
10631
10632
10633 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10634 {
10635         if (type)
10636                 return -EINVAL;
10637
10638         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10639         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10640         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10641         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10642         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10643         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10644
10645         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10646         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10647         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10648         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10649                 &kvm->arch.irq_sources_bitmap);
10650
10651         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10652         mutex_init(&kvm->arch.apic_map_lock);
10653         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10654
10655         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10656         pvclock_update_vm_gtod_copy(kvm);
10657
10658         kvm->arch.guest_can_read_msr_platform_info = true;
10659
10660         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10661         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10662
10663         kvm_hv_init_vm(kvm);
10664         kvm_page_track_init(kvm);
10665         kvm_mmu_init_vm(kvm);
10666
10667         return static_call(kvm_x86_vm_init)(kvm);
10668 }
10669
10670 int kvm_arch_post_init_vm(struct kvm *kvm)
10671 {
10672         return kvm_mmu_post_init_vm(kvm);
10673 }
10674
10675 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10676 {
10677         vcpu_load(vcpu);
10678         kvm_mmu_unload(vcpu);
10679         vcpu_put(vcpu);
10680 }
10681
10682 static void kvm_free_vcpus(struct kvm *kvm)
10683 {
10684         unsigned int i;
10685         struct kvm_vcpu *vcpu;
10686
10687         /*
10688          * Unpin any mmu pages first.
10689          */
10690         kvm_for_each_vcpu(i, vcpu, kvm) {
10691                 kvm_clear_async_pf_completion_queue(vcpu);
10692                 kvm_unload_vcpu_mmu(vcpu);
10693         }
10694         kvm_for_each_vcpu(i, vcpu, kvm)
10695                 kvm_vcpu_destroy(vcpu);
10696
10697         mutex_lock(&kvm->lock);
10698         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10699                 kvm->vcpus[i] = NULL;
10700
10701         atomic_set(&kvm->online_vcpus, 0);
10702         mutex_unlock(&kvm->lock);
10703 }
10704
10705 void kvm_arch_sync_events(struct kvm *kvm)
10706 {
10707         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10708         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10709         kvm_free_pit(kvm);
10710 }
10711
10712 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
10713
10714 /**
10715  * __x86_set_memory_region: Setup KVM internal memory slot
10716  *
10717  * @kvm: the kvm pointer to the VM.
10718  * @id: the slot ID to setup.
10719  * @gpa: the GPA to install the slot (unused when @size == 0).
10720  * @size: the size of the slot. Set to zero to uninstall a slot.
10721  *
10722  * This function helps to setup a KVM internal memory slot.  Specify
10723  * @size > 0 to install a new slot, while @size == 0 to uninstall a
10724  * slot.  The return code can be one of the following:
10725  *
10726  *   HVA:           on success (uninstall will return a bogus HVA)
10727  *   -errno:        on error
10728  *
10729  * The caller should always use IS_ERR() to check the return value
10730  * before use.  Note, the KVM internal memory slots are guaranteed to
10731  * remain valid and unchanged until the VM is destroyed, i.e., the
10732  * GPA->HVA translation will not change.  However, the HVA is a user
10733  * address, i.e. its accessibility is not guaranteed, and must be
10734  * accessed via __copy_{to,from}_user().
10735  */
10736 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
10737                                       u32 size)
10738 {
10739         int i, r;
10740         unsigned long hva, old_npages;
10741         struct kvm_memslots *slots = kvm_memslots(kvm);
10742         struct kvm_memory_slot *slot;
10743
10744         /* Called with kvm->slots_lock held.  */
10745         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10746                 return ERR_PTR_USR(-EINVAL);
10747
10748         slot = id_to_memslot(slots, id);
10749         if (size) {
10750                 if (slot && slot->npages)
10751                         return ERR_PTR_USR(-EEXIST);
10752
10753                 /*
10754                  * MAP_SHARED to prevent internal slot pages from being moved
10755                  * by fork()/COW.
10756                  */
10757                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10758                               MAP_SHARED | MAP_ANONYMOUS, 0);
10759                 if (IS_ERR((void *)hva))
10760                         return (void __user *)hva;
10761         } else {
10762                 if (!slot || !slot->npages)
10763                         return NULL;
10764
10765                 old_npages = slot->npages;
10766                 hva = slot->userspace_addr;
10767         }
10768
10769         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10770                 struct kvm_userspace_memory_region m;
10771
10772                 m.slot = id | (i << 16);
10773                 m.flags = 0;
10774                 m.guest_phys_addr = gpa;
10775                 m.userspace_addr = hva;
10776                 m.memory_size = size;
10777                 r = __kvm_set_memory_region(kvm, &m);
10778                 if (r < 0)
10779                         return ERR_PTR_USR(r);
10780         }
10781
10782         if (!size)
10783                 vm_munmap(hva, old_npages * PAGE_SIZE);
10784
10785         return (void __user *)hva;
10786 }
10787 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10788
10789 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10790 {
10791         kvm_mmu_pre_destroy_vm(kvm);
10792 }
10793
10794 void kvm_arch_destroy_vm(struct kvm *kvm)
10795 {
10796         if (current->mm == kvm->mm) {
10797                 /*
10798                  * Free memory regions allocated on behalf of userspace,
10799                  * unless the the memory map has changed due to process exit
10800                  * or fd copying.
10801                  */
10802                 mutex_lock(&kvm->slots_lock);
10803                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10804                                         0, 0);
10805                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10806                                         0, 0);
10807                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10808                 mutex_unlock(&kvm->slots_lock);
10809         }
10810         static_call_cond(kvm_x86_vm_destroy)(kvm);
10811         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
10812         kvm_pic_destroy(kvm);
10813         kvm_ioapic_destroy(kvm);
10814         kvm_free_vcpus(kvm);
10815         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10816         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10817         kvm_mmu_uninit_vm(kvm);
10818         kvm_page_track_cleanup(kvm);
10819         kvm_xen_destroy_vm(kvm);
10820         kvm_hv_destroy_vm(kvm);
10821 }
10822
10823 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10824 {
10825         int i;
10826
10827         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10828                 kvfree(slot->arch.rmap[i]);
10829                 slot->arch.rmap[i] = NULL;
10830
10831                 if (i == 0)
10832                         continue;
10833
10834                 kvfree(slot->arch.lpage_info[i - 1]);
10835                 slot->arch.lpage_info[i - 1] = NULL;
10836         }
10837
10838         kvm_page_track_free_memslot(slot);
10839 }
10840
10841 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10842                                       unsigned long npages)
10843 {
10844         int i;
10845
10846         /*
10847          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10848          * old arrays will be freed by __kvm_set_memory_region() if installing
10849          * the new memslot is successful.
10850          */
10851         memset(&slot->arch, 0, sizeof(slot->arch));
10852
10853         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10854                 struct kvm_lpage_info *linfo;
10855                 unsigned long ugfn;
10856                 int lpages;
10857                 int level = i + 1;
10858
10859                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10860                                       slot->base_gfn, level) + 1;
10861
10862                 slot->arch.rmap[i] =
10863                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10864                                  GFP_KERNEL_ACCOUNT);
10865                 if (!slot->arch.rmap[i])
10866                         goto out_free;
10867                 if (i == 0)
10868                         continue;
10869
10870                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10871                 if (!linfo)
10872                         goto out_free;
10873
10874                 slot->arch.lpage_info[i - 1] = linfo;
10875
10876                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10877                         linfo[0].disallow_lpage = 1;
10878                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10879                         linfo[lpages - 1].disallow_lpage = 1;
10880                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10881                 /*
10882                  * If the gfn and userspace address are not aligned wrt each
10883                  * other, disable large page support for this slot.
10884                  */
10885                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10886                         unsigned long j;
10887
10888                         for (j = 0; j < lpages; ++j)
10889                                 linfo[j].disallow_lpage = 1;
10890                 }
10891         }
10892
10893         if (kvm_page_track_create_memslot(slot, npages))
10894                 goto out_free;
10895
10896         return 0;
10897
10898 out_free:
10899         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10900                 kvfree(slot->arch.rmap[i]);
10901                 slot->arch.rmap[i] = NULL;
10902                 if (i == 0)
10903                         continue;
10904
10905                 kvfree(slot->arch.lpage_info[i - 1]);
10906                 slot->arch.lpage_info[i - 1] = NULL;
10907         }
10908         return -ENOMEM;
10909 }
10910
10911 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10912 {
10913         struct kvm_vcpu *vcpu;
10914         int i;
10915
10916         /*
10917          * memslots->generation has been incremented.
10918          * mmio generation may have reached its maximum value.
10919          */
10920         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10921
10922         /* Force re-initialization of steal_time cache */
10923         kvm_for_each_vcpu(i, vcpu, kvm)
10924                 kvm_vcpu_kick(vcpu);
10925 }
10926
10927 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10928                                 struct kvm_memory_slot *memslot,
10929                                 const struct kvm_userspace_memory_region *mem,
10930                                 enum kvm_mr_change change)
10931 {
10932         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10933                 return kvm_alloc_memslot_metadata(memslot,
10934                                                   mem->memory_size >> PAGE_SHIFT);
10935         return 0;
10936 }
10937
10938
10939 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
10940 {
10941         struct kvm_arch *ka = &kvm->arch;
10942
10943         if (!kvm_x86_ops.cpu_dirty_log_size)
10944                 return;
10945
10946         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
10947             (!enable && --ka->cpu_dirty_logging_count == 0))
10948                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
10949
10950         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
10951 }
10952
10953 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10954                                      struct kvm_memory_slot *old,
10955                                      struct kvm_memory_slot *new,
10956                                      enum kvm_mr_change change)
10957 {
10958         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
10959
10960         /*
10961          * Update CPU dirty logging if dirty logging is being toggled.  This
10962          * applies to all operations.
10963          */
10964         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
10965                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
10966
10967         /*
10968          * Nothing more to do for RO slots (which can't be dirtied and can't be
10969          * made writable) or CREATE/MOVE/DELETE of a slot.
10970          *
10971          * For a memslot with dirty logging disabled:
10972          * CREATE:      No dirty mappings will already exist.
10973          * MOVE/DELETE: The old mappings will already have been cleaned up by
10974          *              kvm_arch_flush_shadow_memslot()
10975          *
10976          * For a memslot with dirty logging enabled:
10977          * CREATE:      No shadow pages exist, thus nothing to write-protect
10978          *              and no dirty bits to clear.
10979          * MOVE/DELETE: The old mappings will already have been cleaned up by
10980          *              kvm_arch_flush_shadow_memslot().
10981          */
10982         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10983                 return;
10984
10985         /*
10986          * READONLY and non-flags changes were filtered out above, and the only
10987          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
10988          * logging isn't being toggled on or off.
10989          */
10990         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
10991                 return;
10992
10993         if (!log_dirty_pages) {
10994                 /*
10995                  * Dirty logging tracks sptes in 4k granularity, meaning that
10996                  * large sptes have to be split.  If live migration succeeds,
10997                  * the guest in the source machine will be destroyed and large
10998                  * sptes will be created in the destination.  However, if the
10999                  * guest continues to run in the source machine (for example if
11000                  * live migration fails), small sptes will remain around and
11001                  * cause bad performance.
11002                  *
11003                  * Scan sptes if dirty logging has been stopped, dropping those
11004                  * which can be collapsed into a single large-page spte.  Later
11005                  * page faults will create the large-page sptes.
11006                  */
11007                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11008         } else {
11009                 /* By default, write-protect everything to log writes. */
11010                 int level = PG_LEVEL_4K;
11011
11012                 if (kvm_x86_ops.cpu_dirty_log_size) {
11013                         /*
11014                          * Clear all dirty bits, unless pages are treated as
11015                          * dirty from the get-go.
11016                          */
11017                         if (!kvm_dirty_log_manual_protect_and_init_set(kvm))
11018                                 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11019
11020                         /*
11021                          * Write-protect large pages on write so that dirty
11022                          * logging happens at 4k granularity.  No need to
11023                          * write-protect small SPTEs since write accesses are
11024                          * logged by the CPU via dirty bits.
11025                          */
11026                         level = PG_LEVEL_2M;
11027                 } else if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
11028                         /*
11029                          * If we're with initial-all-set, we don't need
11030                          * to write protect any small page because
11031                          * they're reported as dirty already.  However
11032                          * we still need to write-protect huge pages
11033                          * so that the page split can happen lazily on
11034                          * the first write to the huge page.
11035                          */
11036                         level = PG_LEVEL_2M;
11037                 }
11038                 kvm_mmu_slot_remove_write_access(kvm, new, level);
11039         }
11040 }
11041
11042 void kvm_arch_commit_memory_region(struct kvm *kvm,
11043                                 const struct kvm_userspace_memory_region *mem,
11044                                 struct kvm_memory_slot *old,
11045                                 const struct kvm_memory_slot *new,
11046                                 enum kvm_mr_change change)
11047 {
11048         if (!kvm->arch.n_requested_mmu_pages)
11049                 kvm_mmu_change_mmu_pages(kvm,
11050                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11051
11052         /*
11053          * FIXME: const-ify all uses of struct kvm_memory_slot.
11054          */
11055         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
11056
11057         /* Free the arrays associated with the old memslot. */
11058         if (change == KVM_MR_MOVE)
11059                 kvm_arch_free_memslot(kvm, old);
11060 }
11061
11062 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11063 {
11064         kvm_mmu_zap_all(kvm);
11065 }
11066
11067 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11068                                    struct kvm_memory_slot *slot)
11069 {
11070         kvm_page_track_flush_slot(kvm, slot);
11071 }
11072
11073 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11074 {
11075         return (is_guest_mode(vcpu) &&
11076                         kvm_x86_ops.guest_apic_has_interrupt &&
11077                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11078 }
11079
11080 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11081 {
11082         if (!list_empty_careful(&vcpu->async_pf.done))
11083                 return true;
11084
11085         if (kvm_apic_has_events(vcpu))
11086                 return true;
11087
11088         if (vcpu->arch.pv.pv_unhalted)
11089                 return true;
11090
11091         if (vcpu->arch.exception.pending)
11092                 return true;
11093
11094         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11095             (vcpu->arch.nmi_pending &&
11096              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11097                 return true;
11098
11099         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11100             (vcpu->arch.smi_pending &&
11101              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11102                 return true;
11103
11104         if (kvm_arch_interrupt_allowed(vcpu) &&
11105             (kvm_cpu_has_interrupt(vcpu) ||
11106             kvm_guest_apic_has_interrupt(vcpu)))
11107                 return true;
11108
11109         if (kvm_hv_has_stimer_pending(vcpu))
11110                 return true;
11111
11112         if (is_guest_mode(vcpu) &&
11113             kvm_x86_ops.nested_ops->hv_timer_pending &&
11114             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11115                 return true;
11116
11117         return false;
11118 }
11119
11120 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11121 {
11122         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11123 }
11124
11125 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11126 {
11127         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11128                 return true;
11129
11130         return false;
11131 }
11132
11133 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11134 {
11135         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11136                 return true;
11137
11138         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11139                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11140                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11141                 return true;
11142
11143         return kvm_arch_dy_has_pending_interrupt(vcpu);
11144 }
11145
11146 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11147 {
11148         if (vcpu->arch.guest_state_protected)
11149                 return true;
11150
11151         return vcpu->arch.preempted_in_kernel;
11152 }
11153
11154 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11155 {
11156         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11157 }
11158
11159 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11160 {
11161         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11162 }
11163
11164 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11165 {
11166         /* Can't read the RIP when guest state is protected, just return 0 */
11167         if (vcpu->arch.guest_state_protected)
11168                 return 0;
11169
11170         if (is_64_bit_mode(vcpu))
11171                 return kvm_rip_read(vcpu);
11172         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11173                      kvm_rip_read(vcpu));
11174 }
11175 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11176
11177 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11178 {
11179         return kvm_get_linear_rip(vcpu) == linear_rip;
11180 }
11181 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11182
11183 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11184 {
11185         unsigned long rflags;
11186
11187         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11188         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11189                 rflags &= ~X86_EFLAGS_TF;
11190         return rflags;
11191 }
11192 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11193
11194 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11195 {
11196         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11197             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11198                 rflags |= X86_EFLAGS_TF;
11199         static_call(kvm_x86_set_rflags)(vcpu, rflags);
11200 }
11201
11202 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11203 {
11204         __kvm_set_rflags(vcpu, rflags);
11205         kvm_make_request(KVM_REQ_EVENT, vcpu);
11206 }
11207 EXPORT_SYMBOL_GPL(kvm_set_rflags);
11208
11209 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
11210 {
11211         int r;
11212
11213         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
11214               work->wakeup_all)
11215                 return;
11216
11217         r = kvm_mmu_reload(vcpu);
11218         if (unlikely(r))
11219                 return;
11220
11221         if (!vcpu->arch.mmu->direct_map &&
11222               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
11223                 return;
11224
11225         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
11226 }
11227
11228 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
11229 {
11230         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
11231
11232         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
11233 }
11234
11235 static inline u32 kvm_async_pf_next_probe(u32 key)
11236 {
11237         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
11238 }
11239
11240 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11241 {
11242         u32 key = kvm_async_pf_hash_fn(gfn);
11243
11244         while (vcpu->arch.apf.gfns[key] != ~0)
11245                 key = kvm_async_pf_next_probe(key);
11246
11247         vcpu->arch.apf.gfns[key] = gfn;
11248 }
11249
11250 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
11251 {
11252         int i;
11253         u32 key = kvm_async_pf_hash_fn(gfn);
11254
11255         for (i = 0; i < ASYNC_PF_PER_VCPU &&
11256                      (vcpu->arch.apf.gfns[key] != gfn &&
11257                       vcpu->arch.apf.gfns[key] != ~0); i++)
11258                 key = kvm_async_pf_next_probe(key);
11259
11260         return key;
11261 }
11262
11263 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11264 {
11265         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
11266 }
11267
11268 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
11269 {
11270         u32 i, j, k;
11271
11272         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
11273
11274         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
11275                 return;
11276
11277         while (true) {
11278                 vcpu->arch.apf.gfns[i] = ~0;
11279                 do {
11280                         j = kvm_async_pf_next_probe(j);
11281                         if (vcpu->arch.apf.gfns[j] == ~0)
11282                                 return;
11283                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
11284                         /*
11285                          * k lies cyclically in ]i,j]
11286                          * |    i.k.j |
11287                          * |....j i.k.| or  |.k..j i...|
11288                          */
11289                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
11290                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
11291                 i = j;
11292         }
11293 }
11294
11295 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
11296 {
11297         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
11298
11299         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
11300                                       sizeof(reason));
11301 }
11302
11303 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
11304 {
11305         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11306
11307         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11308                                              &token, offset, sizeof(token));
11309 }
11310
11311 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
11312 {
11313         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
11314         u32 val;
11315
11316         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
11317                                          &val, offset, sizeof(val)))
11318                 return false;
11319
11320         return !val;
11321 }
11322
11323 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
11324 {
11325         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
11326                 return false;
11327
11328         if (!kvm_pv_async_pf_enabled(vcpu) ||
11329             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
11330                 return false;
11331
11332         return true;
11333 }
11334
11335 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
11336 {
11337         if (unlikely(!lapic_in_kernel(vcpu) ||
11338                      kvm_event_needs_reinjection(vcpu) ||
11339                      vcpu->arch.exception.pending))
11340                 return false;
11341
11342         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
11343                 return false;
11344
11345         /*
11346          * If interrupts are off we cannot even use an artificial
11347          * halt state.
11348          */
11349         return kvm_arch_interrupt_allowed(vcpu);
11350 }
11351
11352 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
11353                                      struct kvm_async_pf *work)
11354 {
11355         struct x86_exception fault;
11356
11357         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
11358         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
11359
11360         if (kvm_can_deliver_async_pf(vcpu) &&
11361             !apf_put_user_notpresent(vcpu)) {
11362                 fault.vector = PF_VECTOR;
11363                 fault.error_code_valid = true;
11364                 fault.error_code = 0;
11365                 fault.nested_page_fault = false;
11366                 fault.address = work->arch.token;
11367                 fault.async_page_fault = true;
11368                 kvm_inject_page_fault(vcpu, &fault);
11369                 return true;
11370         } else {
11371                 /*
11372                  * It is not possible to deliver a paravirtualized asynchronous
11373                  * page fault, but putting the guest in an artificial halt state
11374                  * can be beneficial nevertheless: if an interrupt arrives, we
11375                  * can deliver it timely and perhaps the guest will schedule
11376                  * another process.  When the instruction that triggered a page
11377                  * fault is retried, hopefully the page will be ready in the host.
11378                  */
11379                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
11380                 return false;
11381         }
11382 }
11383
11384 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
11385                                  struct kvm_async_pf *work)
11386 {
11387         struct kvm_lapic_irq irq = {
11388                 .delivery_mode = APIC_DM_FIXED,
11389                 .vector = vcpu->arch.apf.vec
11390         };
11391
11392         if (work->wakeup_all)
11393                 work->arch.token = ~0; /* broadcast wakeup */
11394         else
11395                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
11396         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
11397
11398         if ((work->wakeup_all || work->notpresent_injected) &&
11399             kvm_pv_async_pf_enabled(vcpu) &&
11400             !apf_put_user_ready(vcpu, work->arch.token)) {
11401                 vcpu->arch.apf.pageready_pending = true;
11402                 kvm_apic_set_irq(vcpu, &irq, NULL);
11403         }
11404
11405         vcpu->arch.apf.halted = false;
11406         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11407 }
11408
11409 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
11410 {
11411         kvm_make_request(KVM_REQ_APF_READY, vcpu);
11412         if (!vcpu->arch.apf.pageready_pending)
11413                 kvm_vcpu_kick(vcpu);
11414 }
11415
11416 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
11417 {
11418         if (!kvm_pv_async_pf_enabled(vcpu))
11419                 return true;
11420         else
11421                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
11422 }
11423
11424 void kvm_arch_start_assignment(struct kvm *kvm)
11425 {
11426         atomic_inc(&kvm->arch.assigned_device_count);
11427 }
11428 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
11429
11430 void kvm_arch_end_assignment(struct kvm *kvm)
11431 {
11432         atomic_dec(&kvm->arch.assigned_device_count);
11433 }
11434 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
11435
11436 bool kvm_arch_has_assigned_device(struct kvm *kvm)
11437 {
11438         return atomic_read(&kvm->arch.assigned_device_count);
11439 }
11440 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
11441
11442 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
11443 {
11444         atomic_inc(&kvm->arch.noncoherent_dma_count);
11445 }
11446 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
11447
11448 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
11449 {
11450         atomic_dec(&kvm->arch.noncoherent_dma_count);
11451 }
11452 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
11453
11454 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
11455 {
11456         return atomic_read(&kvm->arch.noncoherent_dma_count);
11457 }
11458 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
11459
11460 bool kvm_arch_has_irq_bypass(void)
11461 {
11462         return true;
11463 }
11464
11465 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11466                                       struct irq_bypass_producer *prod)
11467 {
11468         struct kvm_kernel_irqfd *irqfd =
11469                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11470         int ret;
11471
11472         irqfd->producer = prod;
11473         kvm_arch_start_assignment(irqfd->kvm);
11474         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
11475                                          prod->irq, irqfd->gsi, 1);
11476
11477         if (ret)
11478                 kvm_arch_end_assignment(irqfd->kvm);
11479
11480         return ret;
11481 }
11482
11483 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11484                                       struct irq_bypass_producer *prod)
11485 {
11486         int ret;
11487         struct kvm_kernel_irqfd *irqfd =
11488                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11489
11490         WARN_ON(irqfd->producer != prod);
11491         irqfd->producer = NULL;
11492
11493         /*
11494          * When producer of consumer is unregistered, we change back to
11495          * remapped mode, so we can re-use the current implementation
11496          * when the irq is masked/disabled or the consumer side (KVM
11497          * int this case doesn't want to receive the interrupts.
11498         */
11499         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11500         if (ret)
11501                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11502                        " fails: %d\n", irqfd->consumer.token, ret);
11503
11504         kvm_arch_end_assignment(irqfd->kvm);
11505 }
11506
11507 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11508                                    uint32_t guest_irq, bool set)
11509 {
11510         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
11511 }
11512
11513 bool kvm_vector_hashing_enabled(void)
11514 {
11515         return vector_hashing;
11516 }
11517
11518 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11519 {
11520         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11521 }
11522 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11523
11524
11525 int kvm_spec_ctrl_test_value(u64 value)
11526 {
11527         /*
11528          * test that setting IA32_SPEC_CTRL to given value
11529          * is allowed by the host processor
11530          */
11531
11532         u64 saved_value;
11533         unsigned long flags;
11534         int ret = 0;
11535
11536         local_irq_save(flags);
11537
11538         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11539                 ret = 1;
11540         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11541                 ret = 1;
11542         else
11543                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11544
11545         local_irq_restore(flags);
11546
11547         return ret;
11548 }
11549 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11550
11551 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11552 {
11553         struct x86_exception fault;
11554         u32 access = error_code &
11555                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11556
11557         if (!(error_code & PFERR_PRESENT_MASK) ||
11558             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11559                 /*
11560                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11561                  * tables probably do not match the TLB.  Just proceed
11562                  * with the error code that the processor gave.
11563                  */
11564                 fault.vector = PF_VECTOR;
11565                 fault.error_code_valid = true;
11566                 fault.error_code = error_code;
11567                 fault.nested_page_fault = false;
11568                 fault.address = gva;
11569         }
11570         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11571 }
11572 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11573
11574 /*
11575  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11576  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11577  * indicates whether exit to userspace is needed.
11578  */
11579 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11580                               struct x86_exception *e)
11581 {
11582         if (r == X86EMUL_PROPAGATE_FAULT) {
11583                 kvm_inject_emulated_page_fault(vcpu, e);
11584                 return 1;
11585         }
11586
11587         /*
11588          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11589          * while handling a VMX instruction KVM could've handled the request
11590          * correctly by exiting to userspace and performing I/O but there
11591          * doesn't seem to be a real use-case behind such requests, just return
11592          * KVM_EXIT_INTERNAL_ERROR for now.
11593          */
11594         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11595         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11596         vcpu->run->internal.ndata = 0;
11597
11598         return 0;
11599 }
11600 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11601
11602 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11603 {
11604         bool pcid_enabled;
11605         struct x86_exception e;
11606         unsigned i;
11607         unsigned long roots_to_free = 0;
11608         struct {
11609                 u64 pcid;
11610                 u64 gla;
11611         } operand;
11612         int r;
11613
11614         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11615         if (r != X86EMUL_CONTINUE)
11616                 return kvm_handle_memory_failure(vcpu, r, &e);
11617
11618         if (operand.pcid >> 12 != 0) {
11619                 kvm_inject_gp(vcpu, 0);
11620                 return 1;
11621         }
11622
11623         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11624
11625         switch (type) {
11626         case INVPCID_TYPE_INDIV_ADDR:
11627                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11628                     is_noncanonical_address(operand.gla, vcpu)) {
11629                         kvm_inject_gp(vcpu, 0);
11630                         return 1;
11631                 }
11632                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11633                 return kvm_skip_emulated_instruction(vcpu);
11634
11635         case INVPCID_TYPE_SINGLE_CTXT:
11636                 if (!pcid_enabled && (operand.pcid != 0)) {
11637                         kvm_inject_gp(vcpu, 0);
11638                         return 1;
11639                 }
11640
11641                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11642                         kvm_mmu_sync_roots(vcpu);
11643                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11644                 }
11645
11646                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11647                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11648                             == operand.pcid)
11649                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11650
11651                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11652                 /*
11653                  * If neither the current cr3 nor any of the prev_roots use the
11654                  * given PCID, then nothing needs to be done here because a
11655                  * resync will happen anyway before switching to any other CR3.
11656                  */
11657
11658                 return kvm_skip_emulated_instruction(vcpu);
11659
11660         case INVPCID_TYPE_ALL_NON_GLOBAL:
11661                 /*
11662                  * Currently, KVM doesn't mark global entries in the shadow
11663                  * page tables, so a non-global flush just degenerates to a
11664                  * global flush. If needed, we could optimize this later by
11665                  * keeping track of global entries in shadow page tables.
11666                  */
11667
11668                 fallthrough;
11669         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11670                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
11671                 return kvm_skip_emulated_instruction(vcpu);
11672
11673         default:
11674                 BUG(); /* We have already checked above that type <= 3 */
11675         }
11676 }
11677 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11678
11679 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
11680 {
11681         struct kvm_run *run = vcpu->run;
11682         struct kvm_mmio_fragment *frag;
11683         unsigned int len;
11684
11685         BUG_ON(!vcpu->mmio_needed);
11686
11687         /* Complete previous fragment */
11688         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
11689         len = min(8u, frag->len);
11690         if (!vcpu->mmio_is_write)
11691                 memcpy(frag->data, run->mmio.data, len);
11692
11693         if (frag->len <= 8) {
11694                 /* Switch to the next fragment. */
11695                 frag++;
11696                 vcpu->mmio_cur_fragment++;
11697         } else {
11698                 /* Go forward to the next mmio piece. */
11699                 frag->data += len;
11700                 frag->gpa += len;
11701                 frag->len -= len;
11702         }
11703
11704         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
11705                 vcpu->mmio_needed = 0;
11706
11707                 // VMG change, at this point, we're always done
11708                 // RIP has already been advanced
11709                 return 1;
11710         }
11711
11712         // More MMIO is needed
11713         run->mmio.phys_addr = frag->gpa;
11714         run->mmio.len = min(8u, frag->len);
11715         run->mmio.is_write = vcpu->mmio_is_write;
11716         if (run->mmio.is_write)
11717                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
11718         run->exit_reason = KVM_EXIT_MMIO;
11719
11720         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11721
11722         return 0;
11723 }
11724
11725 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11726                           void *data)
11727 {
11728         int handled;
11729         struct kvm_mmio_fragment *frag;
11730
11731         if (!data)
11732                 return -EINVAL;
11733
11734         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11735         if (handled == bytes)
11736                 return 1;
11737
11738         bytes -= handled;
11739         gpa += handled;
11740         data += handled;
11741
11742         /*TODO: Check if need to increment number of frags */
11743         frag = vcpu->mmio_fragments;
11744         vcpu->mmio_nr_fragments = 1;
11745         frag->len = bytes;
11746         frag->gpa = gpa;
11747         frag->data = data;
11748
11749         vcpu->mmio_needed = 1;
11750         vcpu->mmio_cur_fragment = 0;
11751
11752         vcpu->run->mmio.phys_addr = gpa;
11753         vcpu->run->mmio.len = min(8u, frag->len);
11754         vcpu->run->mmio.is_write = 1;
11755         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
11756         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11757
11758         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11759
11760         return 0;
11761 }
11762 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
11763
11764 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
11765                          void *data)
11766 {
11767         int handled;
11768         struct kvm_mmio_fragment *frag;
11769
11770         if (!data)
11771                 return -EINVAL;
11772
11773         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
11774         if (handled == bytes)
11775                 return 1;
11776
11777         bytes -= handled;
11778         gpa += handled;
11779         data += handled;
11780
11781         /*TODO: Check if need to increment number of frags */
11782         frag = vcpu->mmio_fragments;
11783         vcpu->mmio_nr_fragments = 1;
11784         frag->len = bytes;
11785         frag->gpa = gpa;
11786         frag->data = data;
11787
11788         vcpu->mmio_needed = 1;
11789         vcpu->mmio_cur_fragment = 0;
11790
11791         vcpu->run->mmio.phys_addr = gpa;
11792         vcpu->run->mmio.len = min(8u, frag->len);
11793         vcpu->run->mmio.is_write = 0;
11794         vcpu->run->exit_reason = KVM_EXIT_MMIO;
11795
11796         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
11797
11798         return 0;
11799 }
11800 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
11801
11802 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
11803 {
11804         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
11805                vcpu->arch.pio.count * vcpu->arch.pio.size);
11806         vcpu->arch.pio.count = 0;
11807
11808         return 1;
11809 }
11810
11811 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
11812                            unsigned int port, void *data,  unsigned int count)
11813 {
11814         int ret;
11815
11816         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
11817                                         data, count);
11818         if (ret)
11819                 return ret;
11820
11821         vcpu->arch.pio.count = 0;
11822
11823         return 0;
11824 }
11825
11826 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
11827                           unsigned int port, void *data, unsigned int count)
11828 {
11829         int ret;
11830
11831         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
11832                                        data, count);
11833         if (ret) {
11834                 vcpu->arch.pio.count = 0;
11835         } else {
11836                 vcpu->arch.guest_ins_data = data;
11837                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
11838         }
11839
11840         return 0;
11841 }
11842
11843 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
11844                          unsigned int port, void *data,  unsigned int count,
11845                          int in)
11846 {
11847         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
11848                   : kvm_sev_es_outs(vcpu, size, port, data, count);
11849 }
11850 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
11851
11852 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
11853 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11854 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11855 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11856 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11857 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11858 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11859 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11860 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11861 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11862 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11863 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11864 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11865 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11866 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11867 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11868 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11869 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11870 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11871 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11872 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11873 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11874 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
11875 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
11876 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
11877 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
11878 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);