1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
27 #include "kvm_emulate.h"
36 #include <linux/clocksource.h>
37 #include <linux/interrupt.h>
38 #include <linux/kvm.h>
40 #include <linux/vmalloc.h>
41 #include <linux/export.h>
42 #include <linux/moduleparam.h>
43 #include <linux/mman.h>
44 #include <linux/highmem.h>
45 #include <linux/iommu.h>
46 #include <linux/cpufreq.h>
47 #include <linux/user-return-notifier.h>
48 #include <linux/srcu.h>
49 #include <linux/slab.h>
50 #include <linux/perf_event.h>
51 #include <linux/uaccess.h>
52 #include <linux/hash.h>
53 #include <linux/pci.h>
54 #include <linux/timekeeper_internal.h>
55 #include <linux/pvclock_gtod.h>
56 #include <linux/kvm_irqfd.h>
57 #include <linux/irqbypass.h>
58 #include <linux/sched/stat.h>
59 #include <linux/sched/isolation.h>
60 #include <linux/mem_encrypt.h>
61 #include <linux/entry-kvm.h>
62 #include <linux/suspend.h>
64 #include <trace/events/kvm.h>
66 #include <asm/debugreg.h>
71 #include <linux/kernel_stat.h>
72 #include <asm/fpu/api.h>
73 #include <asm/fpu/xcr.h>
74 #include <asm/fpu/xstate.h>
75 #include <asm/pvclock.h>
76 #include <asm/div64.h>
77 #include <asm/irq_remapping.h>
78 #include <asm/mshyperv.h>
79 #include <asm/hypervisor.h>
80 #include <asm/tlbflush.h>
81 #include <asm/intel_pt.h>
82 #include <asm/emulate_prefix.h>
84 #include <clocksource/hyperv_timer.h>
86 #define CREATE_TRACE_POINTS
89 #define MAX_IO_MSRS 256
90 #define KVM_MAX_MCE_BANKS 32
92 struct kvm_caps kvm_caps __read_mostly = {
93 .supported_mce_cap = MCG_CTL_P | MCG_SER_P,
95 EXPORT_SYMBOL_GPL(kvm_caps);
97 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
99 #define emul_to_vcpu(ctxt) \
100 ((struct kvm_vcpu *)(ctxt)->vcpu)
103 * - enable syscall per default because its emulated by KVM
104 * - enable LME and LMA per default on 64 bit KVM
108 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
110 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
113 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
115 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
117 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
119 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
120 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
122 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
123 static void process_nmi(struct kvm_vcpu *vcpu);
124 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
125 static void store_regs(struct kvm_vcpu *vcpu);
126 static int sync_regs(struct kvm_vcpu *vcpu);
127 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
129 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
130 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
132 static DEFINE_MUTEX(vendor_module_lock);
133 struct kvm_x86_ops kvm_x86_ops __read_mostly;
135 #define KVM_X86_OP(func) \
136 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
137 *(((struct kvm_x86_ops *)0)->func));
138 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
139 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
140 #include <asm/kvm-x86-ops.h>
141 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
142 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
144 static bool __read_mostly ignore_msrs = 0;
145 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
147 bool __read_mostly report_ignored_msrs = true;
148 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
149 EXPORT_SYMBOL_GPL(report_ignored_msrs);
151 unsigned int min_timer_period_us = 200;
152 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
154 static bool __read_mostly kvmclock_periodic_sync = true;
155 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
157 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
158 static u32 __read_mostly tsc_tolerance_ppm = 250;
159 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
162 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
163 * adaptive tuning starting from default advancement of 1000ns. '0' disables
164 * advancement entirely. Any other value is used as-is and disables adaptive
165 * tuning, i.e. allows privileged userspace to set an exact advancement time.
167 static int __read_mostly lapic_timer_advance_ns = -1;
168 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
170 static bool __read_mostly vector_hashing = true;
171 module_param(vector_hashing, bool, S_IRUGO);
173 bool __read_mostly enable_vmware_backdoor = false;
174 module_param(enable_vmware_backdoor, bool, S_IRUGO);
175 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
178 * Flags to manipulate forced emulation behavior (any non-zero value will
179 * enable forced emulation).
181 #define KVM_FEP_CLEAR_RFLAGS_RF BIT(1)
182 static int __read_mostly force_emulation_prefix;
183 module_param(force_emulation_prefix, int, 0644);
185 int __read_mostly pi_inject_timer = -1;
186 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
188 /* Enable/disable PMU virtualization */
189 bool __read_mostly enable_pmu = true;
190 EXPORT_SYMBOL_GPL(enable_pmu);
191 module_param(enable_pmu, bool, 0444);
193 bool __read_mostly eager_page_split = true;
194 module_param(eager_page_split, bool, 0644);
197 * Restoring the host value for MSRs that are only consumed when running in
198 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
199 * returns to userspace, i.e. the kernel can run with the guest's value.
201 #define KVM_MAX_NR_USER_RETURN_MSRS 16
203 struct kvm_user_return_msrs {
204 struct user_return_notifier urn;
206 struct kvm_user_return_msr_values {
209 } values[KVM_MAX_NR_USER_RETURN_MSRS];
212 u32 __read_mostly kvm_nr_uret_msrs;
213 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
214 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
215 static struct kvm_user_return_msrs __percpu *user_return_msrs;
217 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
218 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
219 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
220 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
222 u64 __read_mostly host_efer;
223 EXPORT_SYMBOL_GPL(host_efer);
225 bool __read_mostly allow_smaller_maxphyaddr = 0;
226 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
228 bool __read_mostly enable_apicv = true;
229 EXPORT_SYMBOL_GPL(enable_apicv);
231 u64 __read_mostly host_xss;
232 EXPORT_SYMBOL_GPL(host_xss);
234 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
235 KVM_GENERIC_VM_STATS(),
236 STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
237 STATS_DESC_COUNTER(VM, mmu_pte_write),
238 STATS_DESC_COUNTER(VM, mmu_pde_zapped),
239 STATS_DESC_COUNTER(VM, mmu_flooded),
240 STATS_DESC_COUNTER(VM, mmu_recycled),
241 STATS_DESC_COUNTER(VM, mmu_cache_miss),
242 STATS_DESC_ICOUNTER(VM, mmu_unsync),
243 STATS_DESC_ICOUNTER(VM, pages_4k),
244 STATS_DESC_ICOUNTER(VM, pages_2m),
245 STATS_DESC_ICOUNTER(VM, pages_1g),
246 STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
247 STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
248 STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
251 const struct kvm_stats_header kvm_vm_stats_header = {
252 .name_size = KVM_STATS_NAME_SIZE,
253 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
254 .id_offset = sizeof(struct kvm_stats_header),
255 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
256 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
257 sizeof(kvm_vm_stats_desc),
260 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
261 KVM_GENERIC_VCPU_STATS(),
262 STATS_DESC_COUNTER(VCPU, pf_taken),
263 STATS_DESC_COUNTER(VCPU, pf_fixed),
264 STATS_DESC_COUNTER(VCPU, pf_emulate),
265 STATS_DESC_COUNTER(VCPU, pf_spurious),
266 STATS_DESC_COUNTER(VCPU, pf_fast),
267 STATS_DESC_COUNTER(VCPU, pf_mmio_spte_created),
268 STATS_DESC_COUNTER(VCPU, pf_guest),
269 STATS_DESC_COUNTER(VCPU, tlb_flush),
270 STATS_DESC_COUNTER(VCPU, invlpg),
271 STATS_DESC_COUNTER(VCPU, exits),
272 STATS_DESC_COUNTER(VCPU, io_exits),
273 STATS_DESC_COUNTER(VCPU, mmio_exits),
274 STATS_DESC_COUNTER(VCPU, signal_exits),
275 STATS_DESC_COUNTER(VCPU, irq_window_exits),
276 STATS_DESC_COUNTER(VCPU, nmi_window_exits),
277 STATS_DESC_COUNTER(VCPU, l1d_flush),
278 STATS_DESC_COUNTER(VCPU, halt_exits),
279 STATS_DESC_COUNTER(VCPU, request_irq_exits),
280 STATS_DESC_COUNTER(VCPU, irq_exits),
281 STATS_DESC_COUNTER(VCPU, host_state_reload),
282 STATS_DESC_COUNTER(VCPU, fpu_reload),
283 STATS_DESC_COUNTER(VCPU, insn_emulation),
284 STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
285 STATS_DESC_COUNTER(VCPU, hypercalls),
286 STATS_DESC_COUNTER(VCPU, irq_injections),
287 STATS_DESC_COUNTER(VCPU, nmi_injections),
288 STATS_DESC_COUNTER(VCPU, req_event),
289 STATS_DESC_COUNTER(VCPU, nested_run),
290 STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
291 STATS_DESC_COUNTER(VCPU, directed_yield_successful),
292 STATS_DESC_COUNTER(VCPU, preemption_reported),
293 STATS_DESC_COUNTER(VCPU, preemption_other),
294 STATS_DESC_IBOOLEAN(VCPU, guest_mode),
295 STATS_DESC_COUNTER(VCPU, notify_window_exits),
298 const struct kvm_stats_header kvm_vcpu_stats_header = {
299 .name_size = KVM_STATS_NAME_SIZE,
300 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
301 .id_offset = sizeof(struct kvm_stats_header),
302 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
303 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
304 sizeof(kvm_vcpu_stats_desc),
307 u64 __read_mostly host_xcr0;
309 static struct kmem_cache *x86_emulator_cache;
312 * When called, it means the previous get/set msr reached an invalid msr.
313 * Return true if we want to ignore/silent this failed msr access.
315 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
317 const char *op = write ? "wrmsr" : "rdmsr";
320 if (report_ignored_msrs)
321 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
326 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
332 static struct kmem_cache *kvm_alloc_emulator_cache(void)
334 unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
335 unsigned int size = sizeof(struct x86_emulate_ctxt);
337 return kmem_cache_create_usercopy("x86_emulator", size,
338 __alignof__(struct x86_emulate_ctxt),
339 SLAB_ACCOUNT, useroffset,
340 size - useroffset, NULL);
343 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
345 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
348 for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
349 vcpu->arch.apf.gfns[i] = ~0;
352 static void kvm_on_user_return(struct user_return_notifier *urn)
355 struct kvm_user_return_msrs *msrs
356 = container_of(urn, struct kvm_user_return_msrs, urn);
357 struct kvm_user_return_msr_values *values;
361 * Disabling irqs at this point since the following code could be
362 * interrupted and executed through kvm_arch_hardware_disable()
364 local_irq_save(flags);
365 if (msrs->registered) {
366 msrs->registered = false;
367 user_return_notifier_unregister(urn);
369 local_irq_restore(flags);
370 for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
371 values = &msrs->values[slot];
372 if (values->host != values->curr) {
373 wrmsrl(kvm_uret_msrs_list[slot], values->host);
374 values->curr = values->host;
379 static int kvm_probe_user_return_msr(u32 msr)
385 ret = rdmsrl_safe(msr, &val);
388 ret = wrmsrl_safe(msr, val);
394 int kvm_add_user_return_msr(u32 msr)
396 BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
398 if (kvm_probe_user_return_msr(msr))
401 kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
402 return kvm_nr_uret_msrs++;
404 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
406 int kvm_find_user_return_msr(u32 msr)
410 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
411 if (kvm_uret_msrs_list[i] == msr)
416 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
418 static void kvm_user_return_msr_cpu_online(void)
420 unsigned int cpu = smp_processor_id();
421 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
425 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
426 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
427 msrs->values[i].host = value;
428 msrs->values[i].curr = value;
432 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
434 unsigned int cpu = smp_processor_id();
435 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
438 value = (value & mask) | (msrs->values[slot].host & ~mask);
439 if (value == msrs->values[slot].curr)
441 err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
445 msrs->values[slot].curr = value;
446 if (!msrs->registered) {
447 msrs->urn.on_user_return = kvm_on_user_return;
448 user_return_notifier_register(&msrs->urn);
449 msrs->registered = true;
453 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
455 static void drop_user_return_notifiers(void)
457 unsigned int cpu = smp_processor_id();
458 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
460 if (msrs->registered)
461 kvm_on_user_return(&msrs->urn);
464 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
466 return vcpu->arch.apic_base;
469 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
471 return kvm_apic_mode(kvm_get_apic_base(vcpu));
473 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
475 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
477 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
478 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
479 u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
480 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
482 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
484 if (!msr_info->host_initiated) {
485 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
487 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
491 kvm_lapic_set_base(vcpu, msr_info->data);
492 kvm_recalculate_apic_map(vcpu->kvm);
497 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
499 * Hardware virtualization extension instructions may fault if a reboot turns
500 * off virtualization while processes are running. Usually after catching the
501 * fault we just panic; during reboot instead the instruction is ignored.
503 noinstr void kvm_spurious_fault(void)
505 /* Fault while not rebooting. We want the trace. */
506 BUG_ON(!kvm_rebooting);
508 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
510 #define EXCPT_BENIGN 0
511 #define EXCPT_CONTRIBUTORY 1
514 static int exception_class(int vector)
524 return EXCPT_CONTRIBUTORY;
531 #define EXCPT_FAULT 0
533 #define EXCPT_ABORT 2
534 #define EXCPT_INTERRUPT 3
537 static int exception_type(int vector)
541 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
542 return EXCPT_INTERRUPT;
547 * #DBs can be trap-like or fault-like, the caller must check other CPU
548 * state, e.g. DR6, to determine whether a #DB is a trap or fault.
550 if (mask & (1 << DB_VECTOR))
553 if (mask & ((1 << BP_VECTOR) | (1 << OF_VECTOR)))
556 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
559 /* Reserved exceptions will result in fault */
563 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu,
564 struct kvm_queued_exception *ex)
566 if (!ex->has_payload)
569 switch (ex->vector) {
572 * "Certain debug exceptions may clear bit 0-3. The
573 * remaining contents of the DR6 register are never
574 * cleared by the processor".
576 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
578 * In order to reflect the #DB exception payload in guest
579 * dr6, three components need to be considered: active low
580 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
582 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
583 * In the target guest dr6:
584 * FIXED_1 bits should always be set.
585 * Active low bits should be cleared if 1-setting in payload.
586 * Active high bits should be set if 1-setting in payload.
588 * Note, the payload is compatible with the pending debug
589 * exceptions/exit qualification under VMX, that active_low bits
590 * are active high in payload.
591 * So they need to be flipped for DR6.
593 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
594 vcpu->arch.dr6 |= ex->payload;
595 vcpu->arch.dr6 ^= ex->payload & DR6_ACTIVE_LOW;
598 * The #DB payload is defined as compatible with the 'pending
599 * debug exceptions' field under VMX, not DR6. While bit 12 is
600 * defined in the 'pending debug exceptions' field (enabled
601 * breakpoint), it is reserved and must be zero in DR6.
603 vcpu->arch.dr6 &= ~BIT(12);
606 vcpu->arch.cr2 = ex->payload;
610 ex->has_payload = false;
613 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
615 static void kvm_queue_exception_vmexit(struct kvm_vcpu *vcpu, unsigned int vector,
616 bool has_error_code, u32 error_code,
617 bool has_payload, unsigned long payload)
619 struct kvm_queued_exception *ex = &vcpu->arch.exception_vmexit;
622 ex->injected = false;
624 ex->has_error_code = has_error_code;
625 ex->error_code = error_code;
626 ex->has_payload = has_payload;
627 ex->payload = payload;
630 /* Forcibly leave the nested mode in cases like a vCPU reset */
631 static void kvm_leave_nested(struct kvm_vcpu *vcpu)
633 kvm_x86_ops.nested_ops->leave_nested(vcpu);
636 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
637 unsigned nr, bool has_error, u32 error_code,
638 bool has_payload, unsigned long payload, bool reinject)
643 kvm_make_request(KVM_REQ_EVENT, vcpu);
646 * If the exception is destined for L2 and isn't being reinjected,
647 * morph it to a VM-Exit if L1 wants to intercept the exception. A
648 * previously injected exception is not checked because it was checked
649 * when it was original queued, and re-checking is incorrect if _L1_
650 * injected the exception, in which case it's exempt from interception.
652 if (!reinject && is_guest_mode(vcpu) &&
653 kvm_x86_ops.nested_ops->is_exception_vmexit(vcpu, nr, error_code)) {
654 kvm_queue_exception_vmexit(vcpu, nr, has_error, error_code,
655 has_payload, payload);
659 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
663 * On VM-Entry, an exception can be pending if and only
664 * if event injection was blocked by nested_run_pending.
665 * In that case, however, vcpu_enter_guest() requests an
666 * immediate exit, and the guest shouldn't proceed far
667 * enough to need reinjection.
669 WARN_ON_ONCE(kvm_is_exception_pending(vcpu));
670 vcpu->arch.exception.injected = true;
671 if (WARN_ON_ONCE(has_payload)) {
673 * A reinjected event has already
674 * delivered its payload.
680 vcpu->arch.exception.pending = true;
681 vcpu->arch.exception.injected = false;
683 vcpu->arch.exception.has_error_code = has_error;
684 vcpu->arch.exception.vector = nr;
685 vcpu->arch.exception.error_code = error_code;
686 vcpu->arch.exception.has_payload = has_payload;
687 vcpu->arch.exception.payload = payload;
688 if (!is_guest_mode(vcpu))
689 kvm_deliver_exception_payload(vcpu,
690 &vcpu->arch.exception);
694 /* to check exception */
695 prev_nr = vcpu->arch.exception.vector;
696 if (prev_nr == DF_VECTOR) {
697 /* triple fault -> shutdown */
698 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
701 class1 = exception_class(prev_nr);
702 class2 = exception_class(nr);
703 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY) ||
704 (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
706 * Synthesize #DF. Clear the previously injected or pending
707 * exception so as not to incorrectly trigger shutdown.
709 vcpu->arch.exception.injected = false;
710 vcpu->arch.exception.pending = false;
712 kvm_queue_exception_e(vcpu, DF_VECTOR, 0);
714 /* replace previous exception with a new one in a hope
715 that instruction re-execution will regenerate lost
721 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
723 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
725 EXPORT_SYMBOL_GPL(kvm_queue_exception);
727 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
729 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
731 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
733 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
734 unsigned long payload)
736 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
738 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
740 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
741 u32 error_code, unsigned long payload)
743 kvm_multiple_exception(vcpu, nr, true, error_code,
744 true, payload, false);
747 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
750 kvm_inject_gp(vcpu, 0);
752 return kvm_skip_emulated_instruction(vcpu);
756 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
758 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
761 kvm_inject_gp(vcpu, 0);
765 return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
766 EMULTYPE_COMPLETE_USER_EXIT);
769 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
771 ++vcpu->stat.pf_guest;
774 * Async #PF in L2 is always forwarded to L1 as a VM-Exit regardless of
775 * whether or not L1 wants to intercept "regular" #PF.
777 if (is_guest_mode(vcpu) && fault->async_page_fault)
778 kvm_queue_exception_vmexit(vcpu, PF_VECTOR,
779 true, fault->error_code,
780 true, fault->address);
782 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
786 void kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
787 struct x86_exception *fault)
789 struct kvm_mmu *fault_mmu;
790 WARN_ON_ONCE(fault->vector != PF_VECTOR);
792 fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
796 * Invalidate the TLB entry for the faulting address, if it exists,
797 * else the access will fault indefinitely (and to emulate hardware).
799 if ((fault->error_code & PFERR_PRESENT_MASK) &&
800 !(fault->error_code & PFERR_RSVD_MASK))
801 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
802 fault_mmu->root.hpa);
804 fault_mmu->inject_page_fault(vcpu, fault);
806 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
808 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
810 atomic_inc(&vcpu->arch.nmi_queued);
811 kvm_make_request(KVM_REQ_NMI, vcpu);
814 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
816 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
818 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
820 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
822 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
824 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
827 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
828 * a #GP and return false.
830 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
832 if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
834 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
838 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
840 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
843 kvm_queue_exception(vcpu, UD_VECTOR);
846 EXPORT_SYMBOL_GPL(kvm_require_dr);
848 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
850 return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
854 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
856 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
858 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
859 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
863 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
866 * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
869 real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
870 PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
871 if (real_gpa == INVALID_GPA)
874 /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
875 ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
876 cr3 & GENMASK(11, 5), sizeof(pdpte));
880 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
881 if ((pdpte[i] & PT_PRESENT_MASK) &&
882 (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
888 * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
889 * Shadow page roots need to be reconstructed instead.
891 if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
892 kvm_mmu_free_roots(vcpu->kvm, mmu, KVM_MMU_ROOT_CURRENT);
894 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
895 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
896 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
897 vcpu->arch.pdptrs_from_userspace = false;
901 EXPORT_SYMBOL_GPL(load_pdptrs);
903 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
905 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
906 kvm_clear_async_pf_completion_queue(vcpu);
907 kvm_async_pf_hash_reset(vcpu);
910 * Clearing CR0.PG is defined to flush the TLB from the guest's
913 if (!(cr0 & X86_CR0_PG))
914 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
917 if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
918 kvm_mmu_reset_context(vcpu);
920 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
921 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
922 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
923 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
925 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
927 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
929 unsigned long old_cr0 = kvm_read_cr0(vcpu);
934 if (cr0 & 0xffffffff00000000UL)
938 cr0 &= ~CR0_RESERVED_BITS;
940 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
943 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
947 if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
948 (cr0 & X86_CR0_PG)) {
953 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
958 if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
959 is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
960 !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
963 if (!(cr0 & X86_CR0_PG) &&
964 (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
967 static_call(kvm_x86_set_cr0)(vcpu, cr0);
969 kvm_post_set_cr0(vcpu, old_cr0, cr0);
973 EXPORT_SYMBOL_GPL(kvm_set_cr0);
975 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
977 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
979 EXPORT_SYMBOL_GPL(kvm_lmsw);
981 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
983 if (vcpu->arch.guest_state_protected)
986 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
988 if (vcpu->arch.xcr0 != host_xcr0)
989 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
991 if (vcpu->arch.xsaves_enabled &&
992 vcpu->arch.ia32_xss != host_xss)
993 wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
996 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
997 if (static_cpu_has(X86_FEATURE_PKU) &&
998 vcpu->arch.pkru != vcpu->arch.host_pkru &&
999 ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
1000 kvm_read_cr4_bits(vcpu, X86_CR4_PKE)))
1001 write_pkru(vcpu->arch.pkru);
1002 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
1004 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
1006 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
1008 if (vcpu->arch.guest_state_protected)
1011 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1012 if (static_cpu_has(X86_FEATURE_PKU) &&
1013 ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
1014 kvm_read_cr4_bits(vcpu, X86_CR4_PKE))) {
1015 vcpu->arch.pkru = rdpkru();
1016 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
1017 write_pkru(vcpu->arch.host_pkru);
1019 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
1021 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
1023 if (vcpu->arch.xcr0 != host_xcr0)
1024 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
1026 if (vcpu->arch.xsaves_enabled &&
1027 vcpu->arch.ia32_xss != host_xss)
1028 wrmsrl(MSR_IA32_XSS, host_xss);
1032 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
1034 #ifdef CONFIG_X86_64
1035 static inline u64 kvm_guest_supported_xfd(struct kvm_vcpu *vcpu)
1037 return vcpu->arch.guest_supported_xcr0 & XFEATURE_MASK_USER_DYNAMIC;
1041 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
1044 u64 old_xcr0 = vcpu->arch.xcr0;
1047 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
1048 if (index != XCR_XFEATURE_ENABLED_MASK)
1050 if (!(xcr0 & XFEATURE_MASK_FP))
1052 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1056 * Do not allow the guest to set bits that we do not support
1057 * saving. However, xcr0 bit 0 is always set, even if the
1058 * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1060 valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1061 if (xcr0 & ~valid_bits)
1064 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1065 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1068 if (xcr0 & XFEATURE_MASK_AVX512) {
1069 if (!(xcr0 & XFEATURE_MASK_YMM))
1071 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1075 if ((xcr0 & XFEATURE_MASK_XTILE) &&
1076 ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1079 vcpu->arch.xcr0 = xcr0;
1081 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1082 kvm_update_cpuid_runtime(vcpu);
1086 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1088 /* Note, #UD due to CR4.OSXSAVE=0 has priority over the intercept. */
1089 if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1090 __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1091 kvm_inject_gp(vcpu, 0);
1095 return kvm_skip_emulated_instruction(vcpu);
1097 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1099 bool __kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1101 if (cr4 & cr4_reserved_bits)
1104 if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1109 EXPORT_SYMBOL_GPL(__kvm_is_valid_cr4);
1111 static bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1113 return __kvm_is_valid_cr4(vcpu, cr4) &&
1114 static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1117 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1119 if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1120 kvm_mmu_reset_context(vcpu);
1123 * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1124 * according to the SDM; however, stale prev_roots could be reused
1125 * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1126 * free them all. This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1127 * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1131 (cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE))
1132 kvm_mmu_unload(vcpu);
1135 * The TLB has to be flushed for all PCIDs if any of the following
1136 * (architecturally required) changes happen:
1137 * - CR4.PCIDE is changed from 1 to 0
1138 * - CR4.PGE is toggled
1140 * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1142 if (((cr4 ^ old_cr4) & X86_CR4_PGE) ||
1143 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1144 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1147 * The TLB has to be flushed for the current PCID if any of the
1148 * following (architecturally required) changes happen:
1149 * - CR4.SMEP is changed from 0 to 1
1150 * - CR4.PAE is toggled
1152 else if (((cr4 ^ old_cr4) & X86_CR4_PAE) ||
1153 ((cr4 & X86_CR4_SMEP) && !(old_cr4 & X86_CR4_SMEP)))
1154 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1157 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1159 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1161 unsigned long old_cr4 = kvm_read_cr4(vcpu);
1163 if (!kvm_is_valid_cr4(vcpu, cr4))
1166 if (is_long_mode(vcpu)) {
1167 if (!(cr4 & X86_CR4_PAE))
1169 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1171 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1172 && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1173 && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1176 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1177 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1180 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1181 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1185 static_call(kvm_x86_set_cr4)(vcpu, cr4);
1187 kvm_post_set_cr4(vcpu, old_cr4, cr4);
1191 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1193 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1195 struct kvm_mmu *mmu = vcpu->arch.mmu;
1196 unsigned long roots_to_free = 0;
1200 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1201 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1202 * also via the emulator. KVM's TDP page tables are not in the scope of
1203 * the invalidation, but the guest's TLB entries need to be flushed as
1204 * the CPU may have cached entries in its TLB for the target PCID.
1206 if (unlikely(tdp_enabled)) {
1207 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1212 * If neither the current CR3 nor any of the prev_roots use the given
1213 * PCID, then nothing needs to be done here because a resync will
1214 * happen anyway before switching to any other CR3.
1216 if (kvm_get_active_pcid(vcpu) == pcid) {
1217 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1218 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1222 * If PCID is disabled, there is no need to free prev_roots even if the
1223 * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1226 if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1229 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1230 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1231 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1233 kvm_mmu_free_roots(vcpu->kvm, mmu, roots_to_free);
1236 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1238 bool skip_tlb_flush = false;
1239 unsigned long pcid = 0;
1240 #ifdef CONFIG_X86_64
1241 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1244 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1245 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1246 pcid = cr3 & X86_CR3_PCID_MASK;
1250 /* PDPTRs are always reloaded for PAE paging. */
1251 if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1252 goto handle_tlb_flush;
1255 * Do not condition the GPA check on long mode, this helper is used to
1256 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1257 * the current vCPU mode is accurate.
1259 if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1262 if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1265 if (cr3 != kvm_read_cr3(vcpu))
1266 kvm_mmu_new_pgd(vcpu, cr3);
1268 vcpu->arch.cr3 = cr3;
1269 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1270 /* Do not call post_set_cr3, we do not get here for confidential guests. */
1274 * A load of CR3 that flushes the TLB flushes only the current PCID,
1275 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1276 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1277 * and it's impossible to use a non-zero PCID when PCID is disabled,
1278 * i.e. only PCID=0 can be relevant.
1280 if (!skip_tlb_flush)
1281 kvm_invalidate_pcid(vcpu, pcid);
1285 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1287 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1289 if (cr8 & CR8_RESERVED_BITS)
1291 if (lapic_in_kernel(vcpu))
1292 kvm_lapic_set_tpr(vcpu, cr8);
1294 vcpu->arch.cr8 = cr8;
1297 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1299 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1301 if (lapic_in_kernel(vcpu))
1302 return kvm_lapic_get_cr8(vcpu);
1304 return vcpu->arch.cr8;
1306 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1308 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1312 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1313 for (i = 0; i < KVM_NR_DB_REGS; i++)
1314 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1318 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1322 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1323 dr7 = vcpu->arch.guest_debug_dr7;
1325 dr7 = vcpu->arch.dr7;
1326 static_call(kvm_x86_set_dr7)(vcpu, dr7);
1327 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1328 if (dr7 & DR7_BP_EN_MASK)
1329 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1331 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1333 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1335 u64 fixed = DR6_FIXED_1;
1337 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1340 if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1341 fixed |= DR6_BUS_LOCK;
1345 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1347 size_t size = ARRAY_SIZE(vcpu->arch.db);
1351 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1352 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1353 vcpu->arch.eff_db[dr] = val;
1357 if (!kvm_dr6_valid(val))
1359 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1363 if (!kvm_dr7_valid(val))
1365 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1366 kvm_update_dr7(vcpu);
1372 EXPORT_SYMBOL_GPL(kvm_set_dr);
1374 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1376 size_t size = ARRAY_SIZE(vcpu->arch.db);
1380 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1384 *val = vcpu->arch.dr6;
1388 *val = vcpu->arch.dr7;
1392 EXPORT_SYMBOL_GPL(kvm_get_dr);
1394 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1396 u32 ecx = kvm_rcx_read(vcpu);
1399 if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1400 kvm_inject_gp(vcpu, 0);
1404 kvm_rax_write(vcpu, (u32)data);
1405 kvm_rdx_write(vcpu, data >> 32);
1406 return kvm_skip_emulated_instruction(vcpu);
1408 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1411 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1412 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1414 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1415 * extract the supported MSRs from the related const lists.
1416 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1417 * capabilities of the host cpu. This capabilities test skips MSRs that are
1418 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1419 * may depend on host virtualization features rather than host cpu features.
1422 static const u32 msrs_to_save_all[] = {
1423 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1425 #ifdef CONFIG_X86_64
1426 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1428 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1429 MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1431 MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1432 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1433 MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1434 MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1435 MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1436 MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1437 MSR_IA32_UMWAIT_CONTROL,
1439 MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1440 MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1441 MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1442 MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1443 MSR_IA32_PEBS_ENABLE, MSR_IA32_DS_AREA, MSR_PEBS_DATA_CFG,
1445 /* This part of MSRs should match KVM_INTEL_PMC_MAX_GENERIC. */
1446 MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1447 MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1448 MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1449 MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1450 MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1451 MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1452 MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1453 MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1455 MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1456 MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1458 /* This part of MSRs should match KVM_AMD_PMC_MAX_GENERIC. */
1459 MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1460 MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1461 MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1462 MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1464 MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1467 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1468 static unsigned num_msrs_to_save;
1470 static const u32 emulated_msrs_all[] = {
1471 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1472 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1473 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1474 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1475 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1476 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1477 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1479 HV_X64_MSR_VP_INDEX,
1480 HV_X64_MSR_VP_RUNTIME,
1481 HV_X64_MSR_SCONTROL,
1482 HV_X64_MSR_STIMER0_CONFIG,
1483 HV_X64_MSR_VP_ASSIST_PAGE,
1484 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1485 HV_X64_MSR_TSC_EMULATION_STATUS, HV_X64_MSR_TSC_INVARIANT_CONTROL,
1486 HV_X64_MSR_SYNDBG_OPTIONS,
1487 HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1488 HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1489 HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1491 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1492 MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1494 MSR_IA32_TSC_ADJUST,
1495 MSR_IA32_TSC_DEADLINE,
1496 MSR_IA32_ARCH_CAPABILITIES,
1497 MSR_IA32_PERF_CAPABILITIES,
1498 MSR_IA32_MISC_ENABLE,
1499 MSR_IA32_MCG_STATUS,
1501 MSR_IA32_MCG_EXT_CTL,
1505 MSR_MISC_FEATURES_ENABLES,
1506 MSR_AMD64_VIRT_SPEC_CTRL,
1507 MSR_AMD64_TSC_RATIO,
1512 * The following list leaves out MSRs whose values are determined
1513 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1514 * We always support the "true" VMX control MSRs, even if the host
1515 * processor does not, so I am putting these registers here rather
1516 * than in msrs_to_save_all.
1519 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1520 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1521 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1522 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1524 MSR_IA32_VMX_CR0_FIXED0,
1525 MSR_IA32_VMX_CR4_FIXED0,
1526 MSR_IA32_VMX_VMCS_ENUM,
1527 MSR_IA32_VMX_PROCBASED_CTLS2,
1528 MSR_IA32_VMX_EPT_VPID_CAP,
1529 MSR_IA32_VMX_VMFUNC,
1532 MSR_KVM_POLL_CONTROL,
1535 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1536 static unsigned num_emulated_msrs;
1539 * List of msr numbers which are used to expose MSR-based features that
1540 * can be used by a hypervisor to validate requested CPU features.
1542 static const u32 msr_based_features_all[] = {
1544 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1545 MSR_IA32_VMX_PINBASED_CTLS,
1546 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1547 MSR_IA32_VMX_PROCBASED_CTLS,
1548 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1549 MSR_IA32_VMX_EXIT_CTLS,
1550 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1551 MSR_IA32_VMX_ENTRY_CTLS,
1553 MSR_IA32_VMX_CR0_FIXED0,
1554 MSR_IA32_VMX_CR0_FIXED1,
1555 MSR_IA32_VMX_CR4_FIXED0,
1556 MSR_IA32_VMX_CR4_FIXED1,
1557 MSR_IA32_VMX_VMCS_ENUM,
1558 MSR_IA32_VMX_PROCBASED_CTLS2,
1559 MSR_IA32_VMX_EPT_VPID_CAP,
1560 MSR_IA32_VMX_VMFUNC,
1564 MSR_IA32_ARCH_CAPABILITIES,
1565 MSR_IA32_PERF_CAPABILITIES,
1568 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1569 static unsigned int num_msr_based_features;
1572 * Some IA32_ARCH_CAPABILITIES bits have dependencies on MSRs that KVM
1573 * does not yet virtualize. These include:
1574 * 10 - MISC_PACKAGE_CTRLS
1575 * 11 - ENERGY_FILTERING_CTL
1577 * 18 - FB_CLEAR_CTRL
1578 * 21 - XAPIC_DISABLE_STATUS
1579 * 23 - OVERCLOCKING_STATUS
1582 #define KVM_SUPPORTED_ARCH_CAP \
1583 (ARCH_CAP_RDCL_NO | ARCH_CAP_IBRS_ALL | ARCH_CAP_RSBA | \
1584 ARCH_CAP_SKIP_VMENTRY_L1DFLUSH | ARCH_CAP_SSB_NO | ARCH_CAP_MDS_NO | \
1585 ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \
1586 ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \
1587 ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO)
1589 static u64 kvm_get_arch_capabilities(void)
1593 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES)) {
1594 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1595 data &= KVM_SUPPORTED_ARCH_CAP;
1599 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1600 * the nested hypervisor runs with NX huge pages. If it is not,
1601 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1602 * L1 guests, so it need not worry about its own (L2) guests.
1604 data |= ARCH_CAP_PSCHANGE_MC_NO;
1607 * If we're doing cache flushes (either "always" or "cond")
1608 * we will do one whenever the guest does a vmlaunch/vmresume.
1609 * If an outer hypervisor is doing the cache flush for us
1610 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1611 * capability to the guest too, and if EPT is disabled we're not
1612 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1613 * require a nested hypervisor to do a flush of its own.
1615 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1616 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1618 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1619 data |= ARCH_CAP_RDCL_NO;
1620 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1621 data |= ARCH_CAP_SSB_NO;
1622 if (!boot_cpu_has_bug(X86_BUG_MDS))
1623 data |= ARCH_CAP_MDS_NO;
1625 if (!boot_cpu_has(X86_FEATURE_RTM)) {
1627 * If RTM=0 because the kernel has disabled TSX, the host might
1628 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1629 * and therefore knows that there cannot be TAA) but keep
1630 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1631 * and we want to allow migrating those guests to tsx=off hosts.
1633 data &= ~ARCH_CAP_TAA_NO;
1634 } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1635 data |= ARCH_CAP_TAA_NO;
1638 * Nothing to do here; we emulate TSX_CTRL if present on the
1639 * host so the guest can choose between disabling TSX or
1640 * using VERW to clear CPU buffers.
1647 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1649 switch (msr->index) {
1650 case MSR_IA32_ARCH_CAPABILITIES:
1651 msr->data = kvm_get_arch_capabilities();
1653 case MSR_IA32_PERF_CAPABILITIES:
1654 msr->data = kvm_caps.supported_perf_cap;
1656 case MSR_IA32_UCODE_REV:
1657 rdmsrl_safe(msr->index, &msr->data);
1660 return static_call(kvm_x86_get_msr_feature)(msr);
1665 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1667 struct kvm_msr_entry msr;
1671 r = kvm_get_msr_feature(&msr);
1673 if (r == KVM_MSR_RET_INVALID) {
1674 /* Unconditionally clear the output for simplicity */
1676 if (kvm_msr_ignored_check(index, 0, false))
1688 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1690 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1693 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1696 if (efer & (EFER_LME | EFER_LMA) &&
1697 !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1700 if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1706 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1708 if (efer & efer_reserved_bits)
1711 return __kvm_valid_efer(vcpu, efer);
1713 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1715 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1717 u64 old_efer = vcpu->arch.efer;
1718 u64 efer = msr_info->data;
1721 if (efer & efer_reserved_bits)
1724 if (!msr_info->host_initiated) {
1725 if (!__kvm_valid_efer(vcpu, efer))
1728 if (is_paging(vcpu) &&
1729 (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1734 efer |= vcpu->arch.efer & EFER_LMA;
1736 r = static_call(kvm_x86_set_efer)(vcpu, efer);
1742 if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1743 kvm_mmu_reset_context(vcpu);
1748 void kvm_enable_efer_bits(u64 mask)
1750 efer_reserved_bits &= ~mask;
1752 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1754 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1756 struct kvm_x86_msr_filter *msr_filter;
1757 struct msr_bitmap_range *ranges;
1758 struct kvm *kvm = vcpu->kvm;
1763 /* x2APIC MSRs do not support filtering. */
1764 if (index >= 0x800 && index <= 0x8ff)
1767 idx = srcu_read_lock(&kvm->srcu);
1769 msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1775 allowed = msr_filter->default_allow;
1776 ranges = msr_filter->ranges;
1778 for (i = 0; i < msr_filter->count; i++) {
1779 u32 start = ranges[i].base;
1780 u32 end = start + ranges[i].nmsrs;
1781 u32 flags = ranges[i].flags;
1782 unsigned long *bitmap = ranges[i].bitmap;
1784 if ((index >= start) && (index < end) && (flags & type)) {
1785 allowed = !!test_bit(index - start, bitmap);
1791 srcu_read_unlock(&kvm->srcu, idx);
1795 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1798 * Write @data into the MSR specified by @index. Select MSR specific fault
1799 * checks are bypassed if @host_initiated is %true.
1800 * Returns 0 on success, non-0 otherwise.
1801 * Assumes vcpu_load() was already called.
1803 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1804 bool host_initiated)
1806 struct msr_data msr;
1811 case MSR_KERNEL_GS_BASE:
1814 if (is_noncanonical_address(data, vcpu))
1817 case MSR_IA32_SYSENTER_EIP:
1818 case MSR_IA32_SYSENTER_ESP:
1820 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1821 * non-canonical address is written on Intel but not on
1822 * AMD (which ignores the top 32-bits, because it does
1823 * not implement 64-bit SYSENTER).
1825 * 64-bit code should hence be able to write a non-canonical
1826 * value on AMD. Making the address canonical ensures that
1827 * vmentry does not fail on Intel after writing a non-canonical
1828 * value, and that something deterministic happens if the guest
1829 * invokes 64-bit SYSENTER.
1831 data = __canonical_address(data, vcpu_virt_addr_bits(vcpu));
1834 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1837 if (!host_initiated &&
1838 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1839 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1843 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1844 * incomplete and conflicting architectural behavior. Current
1845 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1846 * reserved and always read as zeros. Enforce Intel's reserved
1847 * bits check if and only if the guest CPU is Intel, and clear
1848 * the bits in all other cases. This ensures cross-vendor
1849 * migration will provide consistent behavior for the guest.
1851 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1860 msr.host_initiated = host_initiated;
1862 return static_call(kvm_x86_set_msr)(vcpu, &msr);
1865 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1866 u32 index, u64 data, bool host_initiated)
1868 int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1870 if (ret == KVM_MSR_RET_INVALID)
1871 if (kvm_msr_ignored_check(index, data, true))
1878 * Read the MSR specified by @index into @data. Select MSR specific fault
1879 * checks are bypassed if @host_initiated is %true.
1880 * Returns 0 on success, non-0 otherwise.
1881 * Assumes vcpu_load() was already called.
1883 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1884 bool host_initiated)
1886 struct msr_data msr;
1891 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1894 if (!host_initiated &&
1895 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1896 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1902 msr.host_initiated = host_initiated;
1904 ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1910 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1911 u32 index, u64 *data, bool host_initiated)
1913 int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1915 if (ret == KVM_MSR_RET_INVALID) {
1916 /* Unconditionally clear *data for simplicity */
1918 if (kvm_msr_ignored_check(index, 0, false))
1925 static int kvm_get_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1927 if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1928 return KVM_MSR_RET_FILTERED;
1929 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1932 static int kvm_set_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 data)
1934 if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1935 return KVM_MSR_RET_FILTERED;
1936 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1939 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1941 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1943 EXPORT_SYMBOL_GPL(kvm_get_msr);
1945 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1947 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1949 EXPORT_SYMBOL_GPL(kvm_set_msr);
1951 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1953 if (!vcpu->run->msr.error) {
1954 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1955 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1959 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1961 return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1964 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1966 complete_userspace_rdmsr(vcpu);
1967 return complete_emulated_msr_access(vcpu);
1970 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1972 return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1975 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1977 complete_userspace_rdmsr(vcpu);
1978 return complete_fast_msr_access(vcpu);
1981 static u64 kvm_msr_reason(int r)
1984 case KVM_MSR_RET_INVALID:
1985 return KVM_MSR_EXIT_REASON_UNKNOWN;
1986 case KVM_MSR_RET_FILTERED:
1987 return KVM_MSR_EXIT_REASON_FILTER;
1989 return KVM_MSR_EXIT_REASON_INVAL;
1993 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1994 u32 exit_reason, u64 data,
1995 int (*completion)(struct kvm_vcpu *vcpu),
1998 u64 msr_reason = kvm_msr_reason(r);
2000 /* Check if the user wanted to know about this MSR fault */
2001 if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
2004 vcpu->run->exit_reason = exit_reason;
2005 vcpu->run->msr.error = 0;
2006 memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
2007 vcpu->run->msr.reason = msr_reason;
2008 vcpu->run->msr.index = index;
2009 vcpu->run->msr.data = data;
2010 vcpu->arch.complete_userspace_io = completion;
2015 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
2017 u32 ecx = kvm_rcx_read(vcpu);
2021 r = kvm_get_msr_with_filter(vcpu, ecx, &data);
2024 trace_kvm_msr_read(ecx, data);
2026 kvm_rax_write(vcpu, data & -1u);
2027 kvm_rdx_write(vcpu, (data >> 32) & -1u);
2029 /* MSR read failed? See if we should ask user space */
2030 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
2031 complete_fast_rdmsr, r))
2033 trace_kvm_msr_read_ex(ecx);
2036 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2038 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
2040 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
2042 u32 ecx = kvm_rcx_read(vcpu);
2043 u64 data = kvm_read_edx_eax(vcpu);
2046 r = kvm_set_msr_with_filter(vcpu, ecx, data);
2049 trace_kvm_msr_write(ecx, data);
2051 /* MSR write failed? See if we should ask user space */
2052 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
2053 complete_fast_msr_access, r))
2055 /* Signal all other negative errors to userspace */
2058 trace_kvm_msr_write_ex(ecx, data);
2061 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2063 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
2065 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
2067 return kvm_skip_emulated_instruction(vcpu);
2070 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
2072 /* Treat an INVD instruction as a NOP and just skip it. */
2073 return kvm_emulate_as_nop(vcpu);
2075 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
2077 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
2079 kvm_queue_exception(vcpu, UD_VECTOR);
2082 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
2085 static int kvm_emulate_monitor_mwait(struct kvm_vcpu *vcpu, const char *insn)
2087 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS) &&
2088 !guest_cpuid_has(vcpu, X86_FEATURE_MWAIT))
2089 return kvm_handle_invalid_op(vcpu);
2091 pr_warn_once("%s instruction emulated as NOP!\n", insn);
2092 return kvm_emulate_as_nop(vcpu);
2094 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
2096 return kvm_emulate_monitor_mwait(vcpu, "MWAIT");
2098 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
2100 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
2102 return kvm_emulate_monitor_mwait(vcpu, "MONITOR");
2104 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
2106 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
2108 xfer_to_guest_mode_prepare();
2109 return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2110 xfer_to_guest_mode_work_pending();
2114 * The fast path for frequent and performance sensitive wrmsr emulation,
2115 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2116 * the latency of virtual IPI by avoiding the expensive bits of transitioning
2117 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2118 * other cases which must be called after interrupts are enabled on the host.
2120 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2122 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2125 if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2126 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2127 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2128 ((u32)(data >> 32) != X2APIC_BROADCAST))
2129 return kvm_x2apic_icr_write(vcpu->arch.apic, data);
2134 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2136 if (!kvm_can_use_hv_timer(vcpu))
2139 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2143 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2145 u32 msr = kvm_rcx_read(vcpu);
2147 fastpath_t ret = EXIT_FASTPATH_NONE;
2150 case APIC_BASE_MSR + (APIC_ICR >> 4):
2151 data = kvm_read_edx_eax(vcpu);
2152 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2153 kvm_skip_emulated_instruction(vcpu);
2154 ret = EXIT_FASTPATH_EXIT_HANDLED;
2157 case MSR_IA32_TSC_DEADLINE:
2158 data = kvm_read_edx_eax(vcpu);
2159 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2160 kvm_skip_emulated_instruction(vcpu);
2161 ret = EXIT_FASTPATH_REENTER_GUEST;
2168 if (ret != EXIT_FASTPATH_NONE)
2169 trace_kvm_msr_write(msr, data);
2173 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2176 * Adapt set_msr() to msr_io()'s calling convention
2178 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2180 return kvm_get_msr_ignored_check(vcpu, index, data, true);
2183 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2185 return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2188 #ifdef CONFIG_X86_64
2189 struct pvclock_clock {
2199 struct pvclock_gtod_data {
2202 struct pvclock_clock clock; /* extract of a clocksource struct */
2203 struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2209 static struct pvclock_gtod_data pvclock_gtod_data;
2211 static void update_pvclock_gtod(struct timekeeper *tk)
2213 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2215 write_seqcount_begin(&vdata->seq);
2217 /* copy pvclock gtod data */
2218 vdata->clock.vclock_mode = tk->tkr_mono.clock->vdso_clock_mode;
2219 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
2220 vdata->clock.mask = tk->tkr_mono.mask;
2221 vdata->clock.mult = tk->tkr_mono.mult;
2222 vdata->clock.shift = tk->tkr_mono.shift;
2223 vdata->clock.base_cycles = tk->tkr_mono.xtime_nsec;
2224 vdata->clock.offset = tk->tkr_mono.base;
2226 vdata->raw_clock.vclock_mode = tk->tkr_raw.clock->vdso_clock_mode;
2227 vdata->raw_clock.cycle_last = tk->tkr_raw.cycle_last;
2228 vdata->raw_clock.mask = tk->tkr_raw.mask;
2229 vdata->raw_clock.mult = tk->tkr_raw.mult;
2230 vdata->raw_clock.shift = tk->tkr_raw.shift;
2231 vdata->raw_clock.base_cycles = tk->tkr_raw.xtime_nsec;
2232 vdata->raw_clock.offset = tk->tkr_raw.base;
2234 vdata->wall_time_sec = tk->xtime_sec;
2236 vdata->offs_boot = tk->offs_boot;
2238 write_seqcount_end(&vdata->seq);
2241 static s64 get_kvmclock_base_ns(void)
2243 /* Count up from boot time, but with the frequency of the raw clock. */
2244 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2247 static s64 get_kvmclock_base_ns(void)
2249 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2250 return ktime_get_boottime_ns();
2254 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2258 struct pvclock_wall_clock wc;
2265 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2270 ++version; /* first time write, random junk */
2274 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2278 * The guest calculates current wall clock time by adding
2279 * system time (updated by kvm_guest_time_update below) to the
2280 * wall clock specified here. We do the reverse here.
2282 wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2284 wc.nsec = do_div(wall_nsec, 1000000000);
2285 wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2286 wc.version = version;
2288 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2291 wc_sec_hi = wall_nsec >> 32;
2292 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2293 &wc_sec_hi, sizeof(wc_sec_hi));
2297 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2300 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2301 bool old_msr, bool host_initiated)
2303 struct kvm_arch *ka = &vcpu->kvm->arch;
2305 if (vcpu->vcpu_id == 0 && !host_initiated) {
2306 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2307 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2309 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2312 vcpu->arch.time = system_time;
2313 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2315 /* we verify if the enable bit is set... */
2316 if (system_time & 1)
2317 kvm_gpc_activate(&vcpu->arch.pv_time, system_time & ~1ULL,
2318 sizeof(struct pvclock_vcpu_time_info));
2320 kvm_gpc_deactivate(&vcpu->arch.pv_time);
2325 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2327 do_shl32_div32(dividend, divisor);
2331 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2332 s8 *pshift, u32 *pmultiplier)
2340 scaled64 = scaled_hz;
2341 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2346 tps32 = (uint32_t)tps64;
2347 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2348 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2356 *pmultiplier = div_frac(scaled64, tps32);
2359 #ifdef CONFIG_X86_64
2360 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2363 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2364 static unsigned long max_tsc_khz;
2366 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2368 u64 v = (u64)khz * (1000000 + ppm);
2373 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2375 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2379 /* Guest TSC same frequency as host TSC? */
2381 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_caps.default_tsc_scaling_ratio);
2385 /* TSC scaling supported? */
2386 if (!kvm_caps.has_tsc_control) {
2387 if (user_tsc_khz > tsc_khz) {
2388 vcpu->arch.tsc_catchup = 1;
2389 vcpu->arch.tsc_always_catchup = 1;
2392 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2397 /* TSC scaling required - calculate ratio */
2398 ratio = mul_u64_u32_div(1ULL << kvm_caps.tsc_scaling_ratio_frac_bits,
2399 user_tsc_khz, tsc_khz);
2401 if (ratio == 0 || ratio >= kvm_caps.max_tsc_scaling_ratio) {
2402 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2407 kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2411 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2413 u32 thresh_lo, thresh_hi;
2414 int use_scaling = 0;
2416 /* tsc_khz can be zero if TSC calibration fails */
2417 if (user_tsc_khz == 0) {
2418 /* set tsc_scaling_ratio to a safe value */
2419 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_caps.default_tsc_scaling_ratio);
2423 /* Compute a scale to convert nanoseconds in TSC cycles */
2424 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2425 &vcpu->arch.virtual_tsc_shift,
2426 &vcpu->arch.virtual_tsc_mult);
2427 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2430 * Compute the variation in TSC rate which is acceptable
2431 * within the range of tolerance and decide if the
2432 * rate being applied is within that bounds of the hardware
2433 * rate. If so, no scaling or compensation need be done.
2435 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2436 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2437 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2438 pr_debug("requested TSC rate %u falls outside tolerance [%u,%u]\n",
2439 user_tsc_khz, thresh_lo, thresh_hi);
2442 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2445 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2447 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2448 vcpu->arch.virtual_tsc_mult,
2449 vcpu->arch.virtual_tsc_shift);
2450 tsc += vcpu->arch.this_tsc_write;
2454 #ifdef CONFIG_X86_64
2455 static inline int gtod_is_based_on_tsc(int mode)
2457 return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2461 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2463 #ifdef CONFIG_X86_64
2465 struct kvm_arch *ka = &vcpu->kvm->arch;
2466 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2468 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2469 atomic_read(&vcpu->kvm->online_vcpus));
2472 * Once the masterclock is enabled, always perform request in
2473 * order to update it.
2475 * In order to enable masterclock, the host clocksource must be TSC
2476 * and the vcpus need to have matched TSCs. When that happens,
2477 * perform request to enable masterclock.
2479 if (ka->use_master_clock ||
2480 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2481 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2483 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2484 atomic_read(&vcpu->kvm->online_vcpus),
2485 ka->use_master_clock, gtod->clock.vclock_mode);
2490 * Multiply tsc by a fixed point number represented by ratio.
2492 * The most significant 64-N bits (mult) of ratio represent the
2493 * integral part of the fixed point number; the remaining N bits
2494 * (frac) represent the fractional part, ie. ratio represents a fixed
2495 * point number (mult + frac * 2^(-N)).
2497 * N equals to kvm_caps.tsc_scaling_ratio_frac_bits.
2499 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2501 return mul_u64_u64_shr(tsc, ratio, kvm_caps.tsc_scaling_ratio_frac_bits);
2504 u64 kvm_scale_tsc(u64 tsc, u64 ratio)
2508 if (ratio != kvm_caps.default_tsc_scaling_ratio)
2509 _tsc = __scale_tsc(ratio, tsc);
2514 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2518 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2520 return target_tsc - tsc;
2523 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2525 return vcpu->arch.l1_tsc_offset +
2526 kvm_scale_tsc(host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2528 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2530 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2534 if (l2_multiplier == kvm_caps.default_tsc_scaling_ratio)
2535 nested_offset = l1_offset;
2537 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2538 kvm_caps.tsc_scaling_ratio_frac_bits);
2540 nested_offset += l2_offset;
2541 return nested_offset;
2543 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2545 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2547 if (l2_multiplier != kvm_caps.default_tsc_scaling_ratio)
2548 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2549 kvm_caps.tsc_scaling_ratio_frac_bits);
2551 return l1_multiplier;
2553 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2555 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2557 trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2558 vcpu->arch.l1_tsc_offset,
2561 vcpu->arch.l1_tsc_offset = l1_offset;
2564 * If we are here because L1 chose not to trap WRMSR to TSC then
2565 * according to the spec this should set L1's TSC (as opposed to
2566 * setting L1's offset for L2).
2568 if (is_guest_mode(vcpu))
2569 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2571 static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2572 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2574 vcpu->arch.tsc_offset = l1_offset;
2576 static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2579 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2581 vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2583 /* Userspace is changing the multiplier while L2 is active */
2584 if (is_guest_mode(vcpu))
2585 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2587 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2589 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2591 if (kvm_caps.has_tsc_control)
2592 static_call(kvm_x86_write_tsc_multiplier)(
2593 vcpu, vcpu->arch.tsc_scaling_ratio);
2596 static inline bool kvm_check_tsc_unstable(void)
2598 #ifdef CONFIG_X86_64
2600 * TSC is marked unstable when we're running on Hyper-V,
2601 * 'TSC page' clocksource is good.
2603 if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2606 return check_tsc_unstable();
2610 * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2611 * offset for the vcpu and tracks the TSC matching generation that the vcpu
2614 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2615 u64 ns, bool matched)
2617 struct kvm *kvm = vcpu->kvm;
2619 lockdep_assert_held(&kvm->arch.tsc_write_lock);
2622 * We also track th most recent recorded KHZ, write and time to
2623 * allow the matching interval to be extended at each write.
2625 kvm->arch.last_tsc_nsec = ns;
2626 kvm->arch.last_tsc_write = tsc;
2627 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2628 kvm->arch.last_tsc_offset = offset;
2630 vcpu->arch.last_guest_tsc = tsc;
2632 kvm_vcpu_write_tsc_offset(vcpu, offset);
2636 * We split periods of matched TSC writes into generations.
2637 * For each generation, we track the original measured
2638 * nanosecond time, offset, and write, so if TSCs are in
2639 * sync, we can match exact offset, and if not, we can match
2640 * exact software computation in compute_guest_tsc()
2642 * These values are tracked in kvm->arch.cur_xxx variables.
2644 kvm->arch.cur_tsc_generation++;
2645 kvm->arch.cur_tsc_nsec = ns;
2646 kvm->arch.cur_tsc_write = tsc;
2647 kvm->arch.cur_tsc_offset = offset;
2648 kvm->arch.nr_vcpus_matched_tsc = 0;
2649 } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2650 kvm->arch.nr_vcpus_matched_tsc++;
2653 /* Keep track of which generation this VCPU has synchronized to */
2654 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2655 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2656 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2658 kvm_track_tsc_matching(vcpu);
2661 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2663 struct kvm *kvm = vcpu->kvm;
2664 u64 offset, ns, elapsed;
2665 unsigned long flags;
2666 bool matched = false;
2667 bool synchronizing = false;
2669 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2670 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2671 ns = get_kvmclock_base_ns();
2672 elapsed = ns - kvm->arch.last_tsc_nsec;
2674 if (vcpu->arch.virtual_tsc_khz) {
2677 * detection of vcpu initialization -- need to sync
2678 * with other vCPUs. This particularly helps to keep
2679 * kvm_clock stable after CPU hotplug
2681 synchronizing = true;
2683 u64 tsc_exp = kvm->arch.last_tsc_write +
2684 nsec_to_cycles(vcpu, elapsed);
2685 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2687 * Special case: TSC write with a small delta (1 second)
2688 * of virtual cycle time against real time is
2689 * interpreted as an attempt to synchronize the CPU.
2691 synchronizing = data < tsc_exp + tsc_hz &&
2692 data + tsc_hz > tsc_exp;
2697 * For a reliable TSC, we can match TSC offsets, and for an unstable
2698 * TSC, we add elapsed time in this computation. We could let the
2699 * compensation code attempt to catch up if we fall behind, but
2700 * it's better to try to match offsets from the beginning.
2702 if (synchronizing &&
2703 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2704 if (!kvm_check_tsc_unstable()) {
2705 offset = kvm->arch.cur_tsc_offset;
2707 u64 delta = nsec_to_cycles(vcpu, elapsed);
2709 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2714 __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2715 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2718 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2721 u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2722 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2725 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2727 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_caps.default_tsc_scaling_ratio)
2728 WARN_ON(adjustment < 0);
2729 adjustment = kvm_scale_tsc((u64) adjustment,
2730 vcpu->arch.l1_tsc_scaling_ratio);
2731 adjust_tsc_offset_guest(vcpu, adjustment);
2734 #ifdef CONFIG_X86_64
2736 static u64 read_tsc(void)
2738 u64 ret = (u64)rdtsc_ordered();
2739 u64 last = pvclock_gtod_data.clock.cycle_last;
2741 if (likely(ret >= last))
2745 * GCC likes to generate cmov here, but this branch is extremely
2746 * predictable (it's just a function of time and the likely is
2747 * very likely) and there's a data dependence, so force GCC
2748 * to generate a branch instead. I don't barrier() because
2749 * we don't actually need a barrier, and if this function
2750 * ever gets inlined it will generate worse code.
2756 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2762 switch (clock->vclock_mode) {
2763 case VDSO_CLOCKMODE_HVCLOCK:
2764 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2766 if (tsc_pg_val != U64_MAX) {
2767 /* TSC page valid */
2768 *mode = VDSO_CLOCKMODE_HVCLOCK;
2769 v = (tsc_pg_val - clock->cycle_last) &
2772 /* TSC page invalid */
2773 *mode = VDSO_CLOCKMODE_NONE;
2776 case VDSO_CLOCKMODE_TSC:
2777 *mode = VDSO_CLOCKMODE_TSC;
2778 *tsc_timestamp = read_tsc();
2779 v = (*tsc_timestamp - clock->cycle_last) &
2783 *mode = VDSO_CLOCKMODE_NONE;
2786 if (*mode == VDSO_CLOCKMODE_NONE)
2787 *tsc_timestamp = v = 0;
2789 return v * clock->mult;
2792 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2794 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2800 seq = read_seqcount_begin(>od->seq);
2801 ns = gtod->raw_clock.base_cycles;
2802 ns += vgettsc(>od->raw_clock, tsc_timestamp, &mode);
2803 ns >>= gtod->raw_clock.shift;
2804 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2805 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2811 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2813 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2819 seq = read_seqcount_begin(>od->seq);
2820 ts->tv_sec = gtod->wall_time_sec;
2821 ns = gtod->clock.base_cycles;
2822 ns += vgettsc(>od->clock, tsc_timestamp, &mode);
2823 ns >>= gtod->clock.shift;
2824 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2826 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2832 /* returns true if host is using TSC based clocksource */
2833 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2835 /* checked again under seqlock below */
2836 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2839 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2843 /* returns true if host is using TSC based clocksource */
2844 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2847 /* checked again under seqlock below */
2848 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2851 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2857 * Assuming a stable TSC across physical CPUS, and a stable TSC
2858 * across virtual CPUs, the following condition is possible.
2859 * Each numbered line represents an event visible to both
2860 * CPUs at the next numbered event.
2862 * "timespecX" represents host monotonic time. "tscX" represents
2865 * VCPU0 on CPU0 | VCPU1 on CPU1
2867 * 1. read timespec0,tsc0
2868 * 2. | timespec1 = timespec0 + N
2870 * 3. transition to guest | transition to guest
2871 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2872 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2873 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2875 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2878 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2880 * - 0 < N - M => M < N
2882 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2883 * always the case (the difference between two distinct xtime instances
2884 * might be smaller then the difference between corresponding TSC reads,
2885 * when updating guest vcpus pvclock areas).
2887 * To avoid that problem, do not allow visibility of distinct
2888 * system_timestamp/tsc_timestamp values simultaneously: use a master
2889 * copy of host monotonic time values. Update that master copy
2892 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2896 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2898 #ifdef CONFIG_X86_64
2899 struct kvm_arch *ka = &kvm->arch;
2901 bool host_tsc_clocksource, vcpus_matched;
2903 lockdep_assert_held(&kvm->arch.tsc_write_lock);
2904 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2905 atomic_read(&kvm->online_vcpus));
2908 * If the host uses TSC clock, then passthrough TSC as stable
2911 host_tsc_clocksource = kvm_get_time_and_clockread(
2912 &ka->master_kernel_ns,
2913 &ka->master_cycle_now);
2915 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2916 && !ka->backwards_tsc_observed
2917 && !ka->boot_vcpu_runs_old_kvmclock;
2919 if (ka->use_master_clock)
2920 atomic_set(&kvm_guest_has_master_clock, 1);
2922 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2923 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2928 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2930 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2933 static void __kvm_start_pvclock_update(struct kvm *kvm)
2935 raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2936 write_seqcount_begin(&kvm->arch.pvclock_sc);
2939 static void kvm_start_pvclock_update(struct kvm *kvm)
2941 kvm_make_mclock_inprogress_request(kvm);
2943 /* no guest entries from this point */
2944 __kvm_start_pvclock_update(kvm);
2947 static void kvm_end_pvclock_update(struct kvm *kvm)
2949 struct kvm_arch *ka = &kvm->arch;
2950 struct kvm_vcpu *vcpu;
2953 write_seqcount_end(&ka->pvclock_sc);
2954 raw_spin_unlock_irq(&ka->tsc_write_lock);
2955 kvm_for_each_vcpu(i, vcpu, kvm)
2956 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2958 /* guest entries allowed */
2959 kvm_for_each_vcpu(i, vcpu, kvm)
2960 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2963 static void kvm_update_masterclock(struct kvm *kvm)
2965 kvm_hv_request_tsc_page_update(kvm);
2966 kvm_start_pvclock_update(kvm);
2967 pvclock_update_vm_gtod_copy(kvm);
2968 kvm_end_pvclock_update(kvm);
2972 * Use the kernel's tsc_khz directly if the TSC is constant, otherwise use KVM's
2973 * per-CPU value (which may be zero if a CPU is going offline). Note, tsc_khz
2974 * can change during boot even if the TSC is constant, as it's possible for KVM
2975 * to be loaded before TSC calibration completes. Ideally, KVM would get a
2976 * notification when calibration completes, but practically speaking calibration
2977 * will complete before userspace is alive enough to create VMs.
2979 static unsigned long get_cpu_tsc_khz(void)
2981 if (static_cpu_has(X86_FEATURE_CONSTANT_TSC))
2984 return __this_cpu_read(cpu_tsc_khz);
2987 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc. */
2988 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2990 struct kvm_arch *ka = &kvm->arch;
2991 struct pvclock_vcpu_time_info hv_clock;
2993 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2997 if (ka->use_master_clock &&
2998 (static_cpu_has(X86_FEATURE_CONSTANT_TSC) || __this_cpu_read(cpu_tsc_khz))) {
2999 #ifdef CONFIG_X86_64
3000 struct timespec64 ts;
3002 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
3003 data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
3004 data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
3007 data->host_tsc = rdtsc();
3009 data->flags |= KVM_CLOCK_TSC_STABLE;
3010 hv_clock.tsc_timestamp = ka->master_cycle_now;
3011 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
3012 kvm_get_time_scale(NSEC_PER_SEC, get_cpu_tsc_khz() * 1000LL,
3013 &hv_clock.tsc_shift,
3014 &hv_clock.tsc_to_system_mul);
3015 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
3017 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
3023 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
3025 struct kvm_arch *ka = &kvm->arch;
3029 seq = read_seqcount_begin(&ka->pvclock_sc);
3030 __get_kvmclock(kvm, data);
3031 } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3034 u64 get_kvmclock_ns(struct kvm *kvm)
3036 struct kvm_clock_data data;
3038 get_kvmclock(kvm, &data);
3042 static void kvm_setup_guest_pvclock(struct kvm_vcpu *v,
3043 struct gfn_to_pfn_cache *gpc,
3044 unsigned int offset)
3046 struct kvm_vcpu_arch *vcpu = &v->arch;
3047 struct pvclock_vcpu_time_info *guest_hv_clock;
3048 unsigned long flags;
3050 read_lock_irqsave(&gpc->lock, flags);
3051 while (!kvm_gpc_check(gpc, offset + sizeof(*guest_hv_clock))) {
3052 read_unlock_irqrestore(&gpc->lock, flags);
3054 if (kvm_gpc_refresh(gpc, offset + sizeof(*guest_hv_clock)))
3057 read_lock_irqsave(&gpc->lock, flags);
3060 guest_hv_clock = (void *)(gpc->khva + offset);
3063 * This VCPU is paused, but it's legal for a guest to read another
3064 * VCPU's kvmclock, so we really have to follow the specification where
3065 * it says that version is odd if data is being modified, and even after
3069 guest_hv_clock->version = vcpu->hv_clock.version = (guest_hv_clock->version + 1) | 1;
3072 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
3073 vcpu->hv_clock.flags |= (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
3075 if (vcpu->pvclock_set_guest_stopped_request) {
3076 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
3077 vcpu->pvclock_set_guest_stopped_request = false;
3080 memcpy(guest_hv_clock, &vcpu->hv_clock, sizeof(*guest_hv_clock));
3083 guest_hv_clock->version = ++vcpu->hv_clock.version;
3085 mark_page_dirty_in_slot(v->kvm, gpc->memslot, gpc->gpa >> PAGE_SHIFT);
3086 read_unlock_irqrestore(&gpc->lock, flags);
3088 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
3091 static int kvm_guest_time_update(struct kvm_vcpu *v)
3093 unsigned long flags, tgt_tsc_khz;
3095 struct kvm_vcpu_arch *vcpu = &v->arch;
3096 struct kvm_arch *ka = &v->kvm->arch;
3098 u64 tsc_timestamp, host_tsc;
3100 bool use_master_clock;
3106 * If the host uses TSC clock, then passthrough TSC as stable
3110 seq = read_seqcount_begin(&ka->pvclock_sc);
3111 use_master_clock = ka->use_master_clock;
3112 if (use_master_clock) {
3113 host_tsc = ka->master_cycle_now;
3114 kernel_ns = ka->master_kernel_ns;
3116 } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3118 /* Keep irq disabled to prevent changes to the clock */
3119 local_irq_save(flags);
3120 tgt_tsc_khz = get_cpu_tsc_khz();
3121 if (unlikely(tgt_tsc_khz == 0)) {
3122 local_irq_restore(flags);
3123 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3126 if (!use_master_clock) {
3128 kernel_ns = get_kvmclock_base_ns();
3131 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3134 * We may have to catch up the TSC to match elapsed wall clock
3135 * time for two reasons, even if kvmclock is used.
3136 * 1) CPU could have been running below the maximum TSC rate
3137 * 2) Broken TSC compensation resets the base at each VCPU
3138 * entry to avoid unknown leaps of TSC even when running
3139 * again on the same CPU. This may cause apparent elapsed
3140 * time to disappear, and the guest to stand still or run
3143 if (vcpu->tsc_catchup) {
3144 u64 tsc = compute_guest_tsc(v, kernel_ns);
3145 if (tsc > tsc_timestamp) {
3146 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3147 tsc_timestamp = tsc;
3151 local_irq_restore(flags);
3153 /* With all the info we got, fill in the values */
3155 if (kvm_caps.has_tsc_control)
3156 tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz,
3157 v->arch.l1_tsc_scaling_ratio);
3159 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3160 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3161 &vcpu->hv_clock.tsc_shift,
3162 &vcpu->hv_clock.tsc_to_system_mul);
3163 vcpu->hw_tsc_khz = tgt_tsc_khz;
3166 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3167 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3168 vcpu->last_guest_tsc = tsc_timestamp;
3170 /* If the host uses TSC clocksource, then it is stable */
3172 if (use_master_clock)
3173 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3175 vcpu->hv_clock.flags = pvclock_flags;
3177 if (vcpu->pv_time.active)
3178 kvm_setup_guest_pvclock(v, &vcpu->pv_time, 0);
3179 if (vcpu->xen.vcpu_info_cache.active)
3180 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_info_cache,
3181 offsetof(struct compat_vcpu_info, time));
3182 if (vcpu->xen.vcpu_time_info_cache.active)
3183 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_time_info_cache, 0);
3184 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3189 * kvmclock updates which are isolated to a given vcpu, such as
3190 * vcpu->cpu migration, should not allow system_timestamp from
3191 * the rest of the vcpus to remain static. Otherwise ntp frequency
3192 * correction applies to one vcpu's system_timestamp but not
3195 * So in those cases, request a kvmclock update for all vcpus.
3196 * We need to rate-limit these requests though, as they can
3197 * considerably slow guests that have a large number of vcpus.
3198 * The time for a remote vcpu to update its kvmclock is bound
3199 * by the delay we use to rate-limit the updates.
3202 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3204 static void kvmclock_update_fn(struct work_struct *work)
3207 struct delayed_work *dwork = to_delayed_work(work);
3208 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3209 kvmclock_update_work);
3210 struct kvm *kvm = container_of(ka, struct kvm, arch);
3211 struct kvm_vcpu *vcpu;
3213 kvm_for_each_vcpu(i, vcpu, kvm) {
3214 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3215 kvm_vcpu_kick(vcpu);
3219 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3221 struct kvm *kvm = v->kvm;
3223 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3224 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3225 KVMCLOCK_UPDATE_DELAY);
3228 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3230 static void kvmclock_sync_fn(struct work_struct *work)
3232 struct delayed_work *dwork = to_delayed_work(work);
3233 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3234 kvmclock_sync_work);
3235 struct kvm *kvm = container_of(ka, struct kvm, arch);
3237 if (!kvmclock_periodic_sync)
3240 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3241 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3242 KVMCLOCK_SYNC_PERIOD);
3245 /* These helpers are safe iff @msr is known to be an MCx bank MSR. */
3246 static bool is_mci_control_msr(u32 msr)
3248 return (msr & 3) == 0;
3250 static bool is_mci_status_msr(u32 msr)
3252 return (msr & 3) == 1;
3256 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3258 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3260 /* McStatusWrEn enabled? */
3261 if (guest_cpuid_is_amd_or_hygon(vcpu))
3262 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3267 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3269 u64 mcg_cap = vcpu->arch.mcg_cap;
3270 unsigned bank_num = mcg_cap & 0xff;
3271 u32 msr = msr_info->index;
3272 u64 data = msr_info->data;
3273 u32 offset, last_msr;
3276 case MSR_IA32_MCG_STATUS:
3277 vcpu->arch.mcg_status = data;
3279 case MSR_IA32_MCG_CTL:
3280 if (!(mcg_cap & MCG_CTL_P) &&
3281 (data || !msr_info->host_initiated))
3283 if (data != 0 && data != ~(u64)0)
3285 vcpu->arch.mcg_ctl = data;
3287 case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
3288 last_msr = MSR_IA32_MCx_CTL2(bank_num) - 1;
3292 if (!(mcg_cap & MCG_CMCI_P) && (data || !msr_info->host_initiated))
3294 /* An attempt to write a 1 to a reserved bit raises #GP */
3295 if (data & ~(MCI_CTL2_CMCI_EN | MCI_CTL2_CMCI_THRESHOLD_MASK))
3297 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL2,
3298 last_msr + 1 - MSR_IA32_MC0_CTL2);
3299 vcpu->arch.mci_ctl2_banks[offset] = data;
3301 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3302 last_msr = MSR_IA32_MCx_CTL(bank_num) - 1;
3307 * Only 0 or all 1s can be written to IA32_MCi_CTL, all other
3308 * values are architecturally undefined. But, some Linux
3309 * kernels clear bit 10 in bank 4 to workaround a BIOS/GART TLB
3310 * issue on AMD K8s, allow bit 10 to be clear when setting all
3311 * other bits in order to avoid an uncaught #GP in the guest.
3313 * UNIXWARE clears bit 0 of MC1_CTL to ignore correctable,
3314 * single-bit ECC data errors.
3316 if (is_mci_control_msr(msr) &&
3317 data != 0 && (data | (1 << 10) | 1) != ~(u64)0)
3321 * All CPUs allow writing 0 to MCi_STATUS MSRs to clear the MSR.
3322 * AMD-based CPUs allow non-zero values, but if and only if
3323 * HWCR[McStatusWrEn] is set.
3325 if (!msr_info->host_initiated && is_mci_status_msr(msr) &&
3326 data != 0 && !can_set_mci_status(vcpu))
3329 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL,
3330 last_msr + 1 - MSR_IA32_MC0_CTL);
3331 vcpu->arch.mce_banks[offset] = data;
3339 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3341 u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3343 return (vcpu->arch.apf.msr_en_val & mask) == mask;
3346 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3348 gpa_t gpa = data & ~0x3f;
3350 /* Bits 4:5 are reserved, Should be zero */
3354 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3355 (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3358 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3359 (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3362 if (!lapic_in_kernel(vcpu))
3363 return data ? 1 : 0;
3365 vcpu->arch.apf.msr_en_val = data;
3367 if (!kvm_pv_async_pf_enabled(vcpu)) {
3368 kvm_clear_async_pf_completion_queue(vcpu);
3369 kvm_async_pf_hash_reset(vcpu);
3373 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3377 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3378 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3380 kvm_async_pf_wakeup_all(vcpu);
3385 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3387 /* Bits 8-63 are reserved */
3391 if (!lapic_in_kernel(vcpu))
3394 vcpu->arch.apf.msr_int_val = data;
3396 vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3401 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3403 kvm_gpc_deactivate(&vcpu->arch.pv_time);
3404 vcpu->arch.time = 0;
3407 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3409 ++vcpu->stat.tlb_flush;
3410 static_call(kvm_x86_flush_tlb_all)(vcpu);
3412 /* Flushing all ASIDs flushes the current ASID... */
3413 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
3416 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3418 ++vcpu->stat.tlb_flush;
3422 * A TLB flush on behalf of the guest is equivalent to
3423 * INVPCID(all), toggling CR4.PGE, etc., which requires
3424 * a forced sync of the shadow page tables. Ensure all the
3425 * roots are synced and the guest TLB in hardware is clean.
3427 kvm_mmu_sync_roots(vcpu);
3428 kvm_mmu_sync_prev_roots(vcpu);
3431 static_call(kvm_x86_flush_tlb_guest)(vcpu);
3434 * Flushing all "guest" TLB is always a superset of Hyper-V's fine
3437 kvm_hv_vcpu_purge_flush_tlb(vcpu);
3441 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3443 ++vcpu->stat.tlb_flush;
3444 static_call(kvm_x86_flush_tlb_current)(vcpu);
3448 * Service "local" TLB flush requests, which are specific to the current MMU
3449 * context. In addition to the generic event handling in vcpu_enter_guest(),
3450 * TLB flushes that are targeted at an MMU context also need to be serviced
3451 * prior before nested VM-Enter/VM-Exit.
3453 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3455 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3456 kvm_vcpu_flush_tlb_current(vcpu);
3458 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3459 kvm_vcpu_flush_tlb_guest(vcpu);
3461 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3463 static void record_steal_time(struct kvm_vcpu *vcpu)
3465 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3466 struct kvm_steal_time __user *st;
3467 struct kvm_memslots *slots;
3468 gpa_t gpa = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3472 if (kvm_xen_msr_enabled(vcpu->kvm)) {
3473 kvm_xen_runstate_set_running(vcpu);
3477 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3480 if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3483 slots = kvm_memslots(vcpu->kvm);
3485 if (unlikely(slots->generation != ghc->generation ||
3487 kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3488 /* We rely on the fact that it fits in a single page. */
3489 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3491 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gpa, sizeof(*st)) ||
3492 kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3496 st = (struct kvm_steal_time __user *)ghc->hva;
3498 * Doing a TLB flush here, on the guest's behalf, can avoid
3501 if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3502 u8 st_preempted = 0;
3505 if (!user_access_begin(st, sizeof(*st)))
3508 asm volatile("1: xchgb %0, %2\n"
3511 _ASM_EXTABLE_UA(1b, 2b)
3512 : "+q" (st_preempted),
3514 "+m" (st->preempted));
3520 vcpu->arch.st.preempted = 0;
3522 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3523 st_preempted & KVM_VCPU_FLUSH_TLB);
3524 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3525 kvm_vcpu_flush_tlb_guest(vcpu);
3527 if (!user_access_begin(st, sizeof(*st)))
3530 if (!user_access_begin(st, sizeof(*st)))
3533 unsafe_put_user(0, &st->preempted, out);
3534 vcpu->arch.st.preempted = 0;
3537 unsafe_get_user(version, &st->version, out);
3539 version += 1; /* first time write, random junk */
3542 unsafe_put_user(version, &st->version, out);
3546 unsafe_get_user(steal, &st->steal, out);
3547 steal += current->sched_info.run_delay -
3548 vcpu->arch.st.last_steal;
3549 vcpu->arch.st.last_steal = current->sched_info.run_delay;
3550 unsafe_put_user(steal, &st->steal, out);
3553 unsafe_put_user(version, &st->version, out);
3558 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3561 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3563 u32 msr = msr_info->index;
3564 u64 data = msr_info->data;
3566 if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3567 return kvm_xen_write_hypercall_page(vcpu, data);
3570 case MSR_AMD64_NB_CFG:
3571 case MSR_IA32_UCODE_WRITE:
3572 case MSR_VM_HSAVE_PA:
3573 case MSR_AMD64_PATCH_LOADER:
3574 case MSR_AMD64_BU_CFG2:
3575 case MSR_AMD64_DC_CFG:
3576 case MSR_F15H_EX_CFG:
3579 case MSR_IA32_UCODE_REV:
3580 if (msr_info->host_initiated)
3581 vcpu->arch.microcode_version = data;
3583 case MSR_IA32_ARCH_CAPABILITIES:
3584 if (!msr_info->host_initiated)
3586 vcpu->arch.arch_capabilities = data;
3588 case MSR_IA32_PERF_CAPABILITIES:
3589 if (!msr_info->host_initiated)
3591 if (data & ~kvm_caps.supported_perf_cap)
3594 vcpu->arch.perf_capabilities = data;
3595 kvm_pmu_refresh(vcpu);
3598 return set_efer(vcpu, msr_info);
3600 data &= ~(u64)0x40; /* ignore flush filter disable */
3601 data &= ~(u64)0x100; /* ignore ignne emulation enable */
3602 data &= ~(u64)0x8; /* ignore TLB cache disable */
3604 /* Handle McStatusWrEn */
3605 if (data == BIT_ULL(18)) {
3606 vcpu->arch.msr_hwcr = data;
3607 } else if (data != 0) {
3608 kvm_pr_unimpl_wrmsr(vcpu, msr, data);
3612 case MSR_FAM10H_MMIO_CONF_BASE:
3614 kvm_pr_unimpl_wrmsr(vcpu, msr, data);
3618 case 0x200 ... MSR_IA32_MC0_CTL2 - 1:
3619 case MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) ... 0x2ff:
3620 return kvm_mtrr_set_msr(vcpu, msr, data);
3621 case MSR_IA32_APICBASE:
3622 return kvm_set_apic_base(vcpu, msr_info);
3623 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3624 return kvm_x2apic_msr_write(vcpu, msr, data);
3625 case MSR_IA32_TSC_DEADLINE:
3626 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3628 case MSR_IA32_TSC_ADJUST:
3629 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3630 if (!msr_info->host_initiated) {
3631 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3632 adjust_tsc_offset_guest(vcpu, adj);
3633 /* Before back to guest, tsc_timestamp must be adjusted
3634 * as well, otherwise guest's percpu pvclock time could jump.
3636 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3638 vcpu->arch.ia32_tsc_adjust_msr = data;
3641 case MSR_IA32_MISC_ENABLE: {
3642 u64 old_val = vcpu->arch.ia32_misc_enable_msr;
3644 if (!msr_info->host_initiated) {
3646 if ((old_val ^ data) & MSR_IA32_MISC_ENABLE_PMU_RO_MASK)
3649 /* R bits, i.e. writes are ignored, but don't fault. */
3650 data = data & ~MSR_IA32_MISC_ENABLE_EMON;
3651 data |= old_val & MSR_IA32_MISC_ENABLE_EMON;
3654 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3655 ((old_val ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3656 if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3658 vcpu->arch.ia32_misc_enable_msr = data;
3659 kvm_update_cpuid_runtime(vcpu);
3661 vcpu->arch.ia32_misc_enable_msr = data;
3665 case MSR_IA32_SMBASE:
3666 if (!IS_ENABLED(CONFIG_KVM_SMM) || !msr_info->host_initiated)
3668 vcpu->arch.smbase = data;
3670 case MSR_IA32_POWER_CTL:
3671 vcpu->arch.msr_ia32_power_ctl = data;
3674 if (msr_info->host_initiated) {
3675 kvm_synchronize_tsc(vcpu, data);
3677 u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3678 adjust_tsc_offset_guest(vcpu, adj);
3679 vcpu->arch.ia32_tsc_adjust_msr += adj;
3683 if (!msr_info->host_initiated &&
3684 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3687 * KVM supports exposing PT to the guest, but does not support
3688 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3689 * XSAVES/XRSTORS to save/restore PT MSRs.
3691 if (data & ~kvm_caps.supported_xss)
3693 vcpu->arch.ia32_xss = data;
3694 kvm_update_cpuid_runtime(vcpu);
3697 if (!msr_info->host_initiated)
3699 vcpu->arch.smi_count = data;
3701 case MSR_KVM_WALL_CLOCK_NEW:
3702 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3705 vcpu->kvm->arch.wall_clock = data;
3706 kvm_write_wall_clock(vcpu->kvm, data, 0);
3708 case MSR_KVM_WALL_CLOCK:
3709 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3712 vcpu->kvm->arch.wall_clock = data;
3713 kvm_write_wall_clock(vcpu->kvm, data, 0);
3715 case MSR_KVM_SYSTEM_TIME_NEW:
3716 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3719 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3721 case MSR_KVM_SYSTEM_TIME:
3722 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3725 kvm_write_system_time(vcpu, data, true, msr_info->host_initiated);
3727 case MSR_KVM_ASYNC_PF_EN:
3728 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3731 if (kvm_pv_enable_async_pf(vcpu, data))
3734 case MSR_KVM_ASYNC_PF_INT:
3735 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3738 if (kvm_pv_enable_async_pf_int(vcpu, data))
3741 case MSR_KVM_ASYNC_PF_ACK:
3742 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3745 vcpu->arch.apf.pageready_pending = false;
3746 kvm_check_async_pf_completion(vcpu);
3749 case MSR_KVM_STEAL_TIME:
3750 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3753 if (unlikely(!sched_info_on()))
3756 if (data & KVM_STEAL_RESERVED_MASK)
3759 vcpu->arch.st.msr_val = data;
3761 if (!(data & KVM_MSR_ENABLED))
3764 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3767 case MSR_KVM_PV_EOI_EN:
3768 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3771 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3775 case MSR_KVM_POLL_CONTROL:
3776 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3779 /* only enable bit supported */
3780 if (data & (-1ULL << 1))
3783 vcpu->arch.msr_kvm_poll_control = data;
3786 case MSR_IA32_MCG_CTL:
3787 case MSR_IA32_MCG_STATUS:
3788 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3789 case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
3790 return set_msr_mce(vcpu, msr_info);
3792 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3793 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3794 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3795 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3796 if (kvm_pmu_is_valid_msr(vcpu, msr))
3797 return kvm_pmu_set_msr(vcpu, msr_info);
3800 kvm_pr_unimpl_wrmsr(vcpu, msr, data);
3802 case MSR_K7_CLK_CTL:
3804 * Ignore all writes to this no longer documented MSR.
3805 * Writes are only relevant for old K7 processors,
3806 * all pre-dating SVM, but a recommended workaround from
3807 * AMD for these chips. It is possible to specify the
3808 * affected processor models on the command line, hence
3809 * the need to ignore the workaround.
3812 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3813 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3814 case HV_X64_MSR_SYNDBG_OPTIONS:
3815 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3816 case HV_X64_MSR_CRASH_CTL:
3817 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3818 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3819 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3820 case HV_X64_MSR_TSC_EMULATION_STATUS:
3821 case HV_X64_MSR_TSC_INVARIANT_CONTROL:
3822 return kvm_hv_set_msr_common(vcpu, msr, data,
3823 msr_info->host_initiated);
3824 case MSR_IA32_BBL_CR_CTL3:
3825 /* Drop writes to this legacy MSR -- see rdmsr
3826 * counterpart for further detail.
3828 kvm_pr_unimpl_wrmsr(vcpu, msr, data);
3830 case MSR_AMD64_OSVW_ID_LENGTH:
3831 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3833 vcpu->arch.osvw.length = data;
3835 case MSR_AMD64_OSVW_STATUS:
3836 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3838 vcpu->arch.osvw.status = data;
3840 case MSR_PLATFORM_INFO:
3841 if (!msr_info->host_initiated ||
3842 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3843 cpuid_fault_enabled(vcpu)))
3845 vcpu->arch.msr_platform_info = data;
3847 case MSR_MISC_FEATURES_ENABLES:
3848 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3849 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3850 !supports_cpuid_fault(vcpu)))
3852 vcpu->arch.msr_misc_features_enables = data;
3854 #ifdef CONFIG_X86_64
3856 if (!msr_info->host_initiated &&
3857 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3860 if (data & ~kvm_guest_supported_xfd(vcpu))
3863 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3865 case MSR_IA32_XFD_ERR:
3866 if (!msr_info->host_initiated &&
3867 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3870 if (data & ~kvm_guest_supported_xfd(vcpu))
3873 vcpu->arch.guest_fpu.xfd_err = data;
3876 case MSR_IA32_PEBS_ENABLE:
3877 case MSR_IA32_DS_AREA:
3878 case MSR_PEBS_DATA_CFG:
3879 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3880 if (kvm_pmu_is_valid_msr(vcpu, msr))
3881 return kvm_pmu_set_msr(vcpu, msr_info);
3883 * Userspace is allowed to write '0' to MSRs that KVM reports
3884 * as to-be-saved, even if an MSRs isn't fully supported.
3886 return !msr_info->host_initiated || data;
3888 if (kvm_pmu_is_valid_msr(vcpu, msr))
3889 return kvm_pmu_set_msr(vcpu, msr_info);
3890 return KVM_MSR_RET_INVALID;
3894 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3896 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3899 u64 mcg_cap = vcpu->arch.mcg_cap;
3900 unsigned bank_num = mcg_cap & 0xff;
3901 u32 offset, last_msr;
3904 case MSR_IA32_P5_MC_ADDR:
3905 case MSR_IA32_P5_MC_TYPE:
3908 case MSR_IA32_MCG_CAP:
3909 data = vcpu->arch.mcg_cap;
3911 case MSR_IA32_MCG_CTL:
3912 if (!(mcg_cap & MCG_CTL_P) && !host)
3914 data = vcpu->arch.mcg_ctl;
3916 case MSR_IA32_MCG_STATUS:
3917 data = vcpu->arch.mcg_status;
3919 case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
3920 last_msr = MSR_IA32_MCx_CTL2(bank_num) - 1;
3924 if (!(mcg_cap & MCG_CMCI_P) && !host)
3926 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL2,
3927 last_msr + 1 - MSR_IA32_MC0_CTL2);
3928 data = vcpu->arch.mci_ctl2_banks[offset];
3930 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3931 last_msr = MSR_IA32_MCx_CTL(bank_num) - 1;
3935 offset = array_index_nospec(msr - MSR_IA32_MC0_CTL,
3936 last_msr + 1 - MSR_IA32_MC0_CTL);
3937 data = vcpu->arch.mce_banks[offset];
3946 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3948 switch (msr_info->index) {
3949 case MSR_IA32_PLATFORM_ID:
3950 case MSR_IA32_EBL_CR_POWERON:
3951 case MSR_IA32_LASTBRANCHFROMIP:
3952 case MSR_IA32_LASTBRANCHTOIP:
3953 case MSR_IA32_LASTINTFROMIP:
3954 case MSR_IA32_LASTINTTOIP:
3955 case MSR_AMD64_SYSCFG:
3956 case MSR_K8_TSEG_ADDR:
3957 case MSR_K8_TSEG_MASK:
3958 case MSR_VM_HSAVE_PA:
3959 case MSR_K8_INT_PENDING_MSG:
3960 case MSR_AMD64_NB_CFG:
3961 case MSR_FAM10H_MMIO_CONF_BASE:
3962 case MSR_AMD64_BU_CFG2:
3963 case MSR_IA32_PERF_CTL:
3964 case MSR_AMD64_DC_CFG:
3965 case MSR_F15H_EX_CFG:
3967 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3968 * limit) MSRs. Just return 0, as we do not want to expose the host
3969 * data here. Do not conditionalize this on CPUID, as KVM does not do
3970 * so for existing CPU-specific MSRs.
3972 case MSR_RAPL_POWER_UNIT:
3973 case MSR_PP0_ENERGY_STATUS: /* Power plane 0 (core) */
3974 case MSR_PP1_ENERGY_STATUS: /* Power plane 1 (graphics uncore) */
3975 case MSR_PKG_ENERGY_STATUS: /* Total package */
3976 case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */
3979 case MSR_IA32_PEBS_ENABLE:
3980 case MSR_IA32_DS_AREA:
3981 case MSR_PEBS_DATA_CFG:
3982 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3983 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3984 return kvm_pmu_get_msr(vcpu, msr_info);
3986 * Userspace is allowed to read MSRs that KVM reports as
3987 * to-be-saved, even if an MSR isn't fully supported.
3989 if (!msr_info->host_initiated)
3993 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3994 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3995 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3996 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3997 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3998 return kvm_pmu_get_msr(vcpu, msr_info);
4001 case MSR_IA32_UCODE_REV:
4002 msr_info->data = vcpu->arch.microcode_version;
4004 case MSR_IA32_ARCH_CAPABILITIES:
4005 if (!msr_info->host_initiated &&
4006 !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
4008 msr_info->data = vcpu->arch.arch_capabilities;
4010 case MSR_IA32_PERF_CAPABILITIES:
4011 if (!msr_info->host_initiated &&
4012 !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
4014 msr_info->data = vcpu->arch.perf_capabilities;
4016 case MSR_IA32_POWER_CTL:
4017 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
4019 case MSR_IA32_TSC: {
4021 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
4022 * even when not intercepted. AMD manual doesn't explicitly
4023 * state this but appears to behave the same.
4025 * On userspace reads and writes, however, we unconditionally
4026 * return L1's TSC value to ensure backwards-compatible
4027 * behavior for migration.
4031 if (msr_info->host_initiated) {
4032 offset = vcpu->arch.l1_tsc_offset;
4033 ratio = vcpu->arch.l1_tsc_scaling_ratio;
4035 offset = vcpu->arch.tsc_offset;
4036 ratio = vcpu->arch.tsc_scaling_ratio;
4039 msr_info->data = kvm_scale_tsc(rdtsc(), ratio) + offset;
4043 case 0x200 ... MSR_IA32_MC0_CTL2 - 1:
4044 case MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) ... 0x2ff:
4045 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
4046 case 0xcd: /* fsb frequency */
4050 * MSR_EBC_FREQUENCY_ID
4051 * Conservative value valid for even the basic CPU models.
4052 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
4053 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
4054 * and 266MHz for model 3, or 4. Set Core Clock
4055 * Frequency to System Bus Frequency Ratio to 1 (bits
4056 * 31:24) even though these are only valid for CPU
4057 * models > 2, however guests may end up dividing or
4058 * multiplying by zero otherwise.
4060 case MSR_EBC_FREQUENCY_ID:
4061 msr_info->data = 1 << 24;
4063 case MSR_IA32_APICBASE:
4064 msr_info->data = kvm_get_apic_base(vcpu);
4066 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
4067 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
4068 case MSR_IA32_TSC_DEADLINE:
4069 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
4071 case MSR_IA32_TSC_ADJUST:
4072 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
4074 case MSR_IA32_MISC_ENABLE:
4075 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
4077 case MSR_IA32_SMBASE:
4078 if (!IS_ENABLED(CONFIG_KVM_SMM) || !msr_info->host_initiated)
4080 msr_info->data = vcpu->arch.smbase;
4083 msr_info->data = vcpu->arch.smi_count;
4085 case MSR_IA32_PERF_STATUS:
4086 /* TSC increment by tick */
4087 msr_info->data = 1000ULL;
4088 /* CPU multiplier */
4089 msr_info->data |= (((uint64_t)4ULL) << 40);
4092 msr_info->data = vcpu->arch.efer;
4094 case MSR_KVM_WALL_CLOCK:
4095 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
4098 msr_info->data = vcpu->kvm->arch.wall_clock;
4100 case MSR_KVM_WALL_CLOCK_NEW:
4101 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
4104 msr_info->data = vcpu->kvm->arch.wall_clock;
4106 case MSR_KVM_SYSTEM_TIME:
4107 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
4110 msr_info->data = vcpu->arch.time;
4112 case MSR_KVM_SYSTEM_TIME_NEW:
4113 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
4116 msr_info->data = vcpu->arch.time;
4118 case MSR_KVM_ASYNC_PF_EN:
4119 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
4122 msr_info->data = vcpu->arch.apf.msr_en_val;
4124 case MSR_KVM_ASYNC_PF_INT:
4125 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4128 msr_info->data = vcpu->arch.apf.msr_int_val;
4130 case MSR_KVM_ASYNC_PF_ACK:
4131 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4136 case MSR_KVM_STEAL_TIME:
4137 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
4140 msr_info->data = vcpu->arch.st.msr_val;
4142 case MSR_KVM_PV_EOI_EN:
4143 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
4146 msr_info->data = vcpu->arch.pv_eoi.msr_val;
4148 case MSR_KVM_POLL_CONTROL:
4149 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
4152 msr_info->data = vcpu->arch.msr_kvm_poll_control;
4154 case MSR_IA32_P5_MC_ADDR:
4155 case MSR_IA32_P5_MC_TYPE:
4156 case MSR_IA32_MCG_CAP:
4157 case MSR_IA32_MCG_CTL:
4158 case MSR_IA32_MCG_STATUS:
4159 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
4160 case MSR_IA32_MC0_CTL2 ... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) - 1:
4161 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
4162 msr_info->host_initiated);
4164 if (!msr_info->host_initiated &&
4165 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
4167 msr_info->data = vcpu->arch.ia32_xss;
4169 case MSR_K7_CLK_CTL:
4171 * Provide expected ramp-up count for K7. All other
4172 * are set to zero, indicating minimum divisors for
4175 * This prevents guest kernels on AMD host with CPU
4176 * type 6, model 8 and higher from exploding due to
4177 * the rdmsr failing.
4179 msr_info->data = 0x20000000;
4181 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
4182 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4183 case HV_X64_MSR_SYNDBG_OPTIONS:
4184 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4185 case HV_X64_MSR_CRASH_CTL:
4186 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4187 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4188 case HV_X64_MSR_TSC_EMULATION_CONTROL:
4189 case HV_X64_MSR_TSC_EMULATION_STATUS:
4190 case HV_X64_MSR_TSC_INVARIANT_CONTROL:
4191 return kvm_hv_get_msr_common(vcpu,
4192 msr_info->index, &msr_info->data,
4193 msr_info->host_initiated);
4194 case MSR_IA32_BBL_CR_CTL3:
4195 /* This legacy MSR exists but isn't fully documented in current
4196 * silicon. It is however accessed by winxp in very narrow
4197 * scenarios where it sets bit #19, itself documented as
4198 * a "reserved" bit. Best effort attempt to source coherent
4199 * read data here should the balance of the register be
4200 * interpreted by the guest:
4202 * L2 cache control register 3: 64GB range, 256KB size,
4203 * enabled, latency 0x1, configured
4205 msr_info->data = 0xbe702111;
4207 case MSR_AMD64_OSVW_ID_LENGTH:
4208 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4210 msr_info->data = vcpu->arch.osvw.length;
4212 case MSR_AMD64_OSVW_STATUS:
4213 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4215 msr_info->data = vcpu->arch.osvw.status;
4217 case MSR_PLATFORM_INFO:
4218 if (!msr_info->host_initiated &&
4219 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4221 msr_info->data = vcpu->arch.msr_platform_info;
4223 case MSR_MISC_FEATURES_ENABLES:
4224 msr_info->data = vcpu->arch.msr_misc_features_enables;
4227 msr_info->data = vcpu->arch.msr_hwcr;
4229 #ifdef CONFIG_X86_64
4231 if (!msr_info->host_initiated &&
4232 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4235 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4237 case MSR_IA32_XFD_ERR:
4238 if (!msr_info->host_initiated &&
4239 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4242 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4246 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4247 return kvm_pmu_get_msr(vcpu, msr_info);
4248 return KVM_MSR_RET_INVALID;
4252 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4255 * Read or write a bunch of msrs. All parameters are kernel addresses.
4257 * @return number of msrs set successfully.
4259 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4260 struct kvm_msr_entry *entries,
4261 int (*do_msr)(struct kvm_vcpu *vcpu,
4262 unsigned index, u64 *data))
4266 for (i = 0; i < msrs->nmsrs; ++i)
4267 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4274 * Read or write a bunch of msrs. Parameters are user addresses.
4276 * @return number of msrs set successfully.
4278 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4279 int (*do_msr)(struct kvm_vcpu *vcpu,
4280 unsigned index, u64 *data),
4283 struct kvm_msrs msrs;
4284 struct kvm_msr_entry *entries;
4289 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4293 if (msrs.nmsrs >= MAX_IO_MSRS)
4296 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4297 entries = memdup_user(user_msrs->entries, size);
4298 if (IS_ERR(entries)) {
4299 r = PTR_ERR(entries);
4303 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4308 if (writeback && copy_to_user(user_msrs->entries, entries, size))
4319 static inline bool kvm_can_mwait_in_guest(void)
4321 return boot_cpu_has(X86_FEATURE_MWAIT) &&
4322 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4323 boot_cpu_has(X86_FEATURE_ARAT);
4326 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4327 struct kvm_cpuid2 __user *cpuid_arg)
4329 struct kvm_cpuid2 cpuid;
4333 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4336 r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4341 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4347 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4352 case KVM_CAP_IRQCHIP:
4354 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4355 case KVM_CAP_SET_TSS_ADDR:
4356 case KVM_CAP_EXT_CPUID:
4357 case KVM_CAP_EXT_EMUL_CPUID:
4358 case KVM_CAP_CLOCKSOURCE:
4360 case KVM_CAP_NOP_IO_DELAY:
4361 case KVM_CAP_MP_STATE:
4362 case KVM_CAP_SYNC_MMU:
4363 case KVM_CAP_USER_NMI:
4364 case KVM_CAP_REINJECT_CONTROL:
4365 case KVM_CAP_IRQ_INJECT_STATUS:
4366 case KVM_CAP_IOEVENTFD:
4367 case KVM_CAP_IOEVENTFD_NO_LENGTH:
4369 case KVM_CAP_PIT_STATE2:
4370 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4371 case KVM_CAP_VCPU_EVENTS:
4372 case KVM_CAP_HYPERV:
4373 case KVM_CAP_HYPERV_VAPIC:
4374 case KVM_CAP_HYPERV_SPIN:
4375 case KVM_CAP_HYPERV_SYNIC:
4376 case KVM_CAP_HYPERV_SYNIC2:
4377 case KVM_CAP_HYPERV_VP_INDEX:
4378 case KVM_CAP_HYPERV_EVENTFD:
4379 case KVM_CAP_HYPERV_TLBFLUSH:
4380 case KVM_CAP_HYPERV_SEND_IPI:
4381 case KVM_CAP_HYPERV_CPUID:
4382 case KVM_CAP_HYPERV_ENFORCE_CPUID:
4383 case KVM_CAP_SYS_HYPERV_CPUID:
4384 case KVM_CAP_PCI_SEGMENT:
4385 case KVM_CAP_DEBUGREGS:
4386 case KVM_CAP_X86_ROBUST_SINGLESTEP:
4388 case KVM_CAP_ASYNC_PF:
4389 case KVM_CAP_ASYNC_PF_INT:
4390 case KVM_CAP_GET_TSC_KHZ:
4391 case KVM_CAP_KVMCLOCK_CTRL:
4392 case KVM_CAP_READONLY_MEM:
4393 case KVM_CAP_HYPERV_TIME:
4394 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4395 case KVM_CAP_TSC_DEADLINE_TIMER:
4396 case KVM_CAP_DISABLE_QUIRKS:
4397 case KVM_CAP_SET_BOOT_CPU_ID:
4398 case KVM_CAP_SPLIT_IRQCHIP:
4399 case KVM_CAP_IMMEDIATE_EXIT:
4400 case KVM_CAP_PMU_EVENT_FILTER:
4401 case KVM_CAP_PMU_EVENT_MASKED_EVENTS:
4402 case KVM_CAP_GET_MSR_FEATURES:
4403 case KVM_CAP_MSR_PLATFORM_INFO:
4404 case KVM_CAP_EXCEPTION_PAYLOAD:
4405 case KVM_CAP_X86_TRIPLE_FAULT_EVENT:
4406 case KVM_CAP_SET_GUEST_DEBUG:
4407 case KVM_CAP_LAST_CPU:
4408 case KVM_CAP_X86_USER_SPACE_MSR:
4409 case KVM_CAP_X86_MSR_FILTER:
4410 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4411 #ifdef CONFIG_X86_SGX_KVM
4412 case KVM_CAP_SGX_ATTRIBUTE:
4414 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4415 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4416 case KVM_CAP_SREGS2:
4417 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4418 case KVM_CAP_VCPU_ATTRIBUTES:
4419 case KVM_CAP_SYS_ATTRIBUTES:
4421 case KVM_CAP_ENABLE_CAP:
4422 case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES:
4425 case KVM_CAP_EXIT_HYPERCALL:
4426 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4428 case KVM_CAP_SET_GUEST_DEBUG2:
4429 return KVM_GUESTDBG_VALID_MASK;
4430 #ifdef CONFIG_KVM_XEN
4431 case KVM_CAP_XEN_HVM:
4432 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4433 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4434 KVM_XEN_HVM_CONFIG_SHARED_INFO |
4435 KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL |
4436 KVM_XEN_HVM_CONFIG_EVTCHN_SEND;
4437 if (sched_info_on())
4438 r |= KVM_XEN_HVM_CONFIG_RUNSTATE |
4439 KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG;
4442 case KVM_CAP_SYNC_REGS:
4443 r = KVM_SYNC_X86_VALID_FIELDS;
4445 case KVM_CAP_ADJUST_CLOCK:
4446 r = KVM_CLOCK_VALID_FLAGS;
4448 case KVM_CAP_X86_DISABLE_EXITS:
4449 r |= KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4450 KVM_X86_DISABLE_EXITS_CSTATE;
4451 if(kvm_can_mwait_in_guest())
4452 r |= KVM_X86_DISABLE_EXITS_MWAIT;
4454 case KVM_CAP_X86_SMM:
4455 if (!IS_ENABLED(CONFIG_KVM_SMM))
4458 /* SMBASE is usually relocated above 1M on modern chipsets,
4459 * and SMM handlers might indeed rely on 4G segment limits,
4460 * so do not report SMM to be available if real mode is
4461 * emulated via vm86 mode. Still, do not go to great lengths
4462 * to avoid userspace's usage of the feature, because it is a
4463 * fringe case that is not enabled except via specific settings
4464 * of the module parameters.
4466 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4468 case KVM_CAP_NR_VCPUS:
4469 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4471 case KVM_CAP_MAX_VCPUS:
4474 case KVM_CAP_MAX_VCPU_ID:
4475 r = KVM_MAX_VCPU_IDS;
4477 case KVM_CAP_PV_MMU: /* obsolete */
4481 r = KVM_MAX_MCE_BANKS;
4484 r = boot_cpu_has(X86_FEATURE_XSAVE);
4486 case KVM_CAP_TSC_CONTROL:
4487 case KVM_CAP_VM_TSC_CONTROL:
4488 r = kvm_caps.has_tsc_control;
4490 case KVM_CAP_X2APIC_API:
4491 r = KVM_X2APIC_API_VALID_FLAGS;
4493 case KVM_CAP_NESTED_STATE:
4494 r = kvm_x86_ops.nested_ops->get_state ?
4495 kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4497 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4498 r = kvm_x86_ops.enable_l2_tlb_flush != NULL;
4500 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4501 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4503 case KVM_CAP_SMALLER_MAXPHYADDR:
4504 r = (int) allow_smaller_maxphyaddr;
4506 case KVM_CAP_STEAL_TIME:
4507 r = sched_info_on();
4509 case KVM_CAP_X86_BUS_LOCK_EXIT:
4510 if (kvm_caps.has_bus_lock_exit)
4511 r = KVM_BUS_LOCK_DETECTION_OFF |
4512 KVM_BUS_LOCK_DETECTION_EXIT;
4516 case KVM_CAP_XSAVE2: {
4517 u64 guest_perm = xstate_get_guest_group_perm();
4519 r = xstate_required_size(kvm_caps.supported_xcr0 & guest_perm, false);
4520 if (r < sizeof(struct kvm_xsave))
4521 r = sizeof(struct kvm_xsave);
4524 case KVM_CAP_PMU_CAPABILITY:
4525 r = enable_pmu ? KVM_CAP_PMU_VALID_MASK : 0;
4527 case KVM_CAP_DISABLE_QUIRKS2:
4528 r = KVM_X86_VALID_QUIRKS;
4530 case KVM_CAP_X86_NOTIFY_VMEXIT:
4531 r = kvm_caps.has_notify_vmexit;
4539 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4541 void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4543 if ((u64)(unsigned long)uaddr != attr->addr)
4544 return ERR_PTR_USR(-EFAULT);
4548 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4550 u64 __user *uaddr = kvm_get_attr_addr(attr);
4556 return PTR_ERR(uaddr);
4558 switch (attr->attr) {
4559 case KVM_X86_XCOMP_GUEST_SUPP:
4560 if (put_user(kvm_caps.supported_xcr0, uaddr))
4569 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4574 switch (attr->attr) {
4575 case KVM_X86_XCOMP_GUEST_SUPP:
4582 long kvm_arch_dev_ioctl(struct file *filp,
4583 unsigned int ioctl, unsigned long arg)
4585 void __user *argp = (void __user *)arg;
4589 case KVM_GET_MSR_INDEX_LIST: {
4590 struct kvm_msr_list __user *user_msr_list = argp;
4591 struct kvm_msr_list msr_list;
4595 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4598 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4599 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4602 if (n < msr_list.nmsrs)
4605 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4606 num_msrs_to_save * sizeof(u32)))
4608 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4610 num_emulated_msrs * sizeof(u32)))
4615 case KVM_GET_SUPPORTED_CPUID:
4616 case KVM_GET_EMULATED_CPUID: {
4617 struct kvm_cpuid2 __user *cpuid_arg = argp;
4618 struct kvm_cpuid2 cpuid;
4621 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4624 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4630 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4635 case KVM_X86_GET_MCE_CAP_SUPPORTED:
4637 if (copy_to_user(argp, &kvm_caps.supported_mce_cap,
4638 sizeof(kvm_caps.supported_mce_cap)))
4642 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4643 struct kvm_msr_list __user *user_msr_list = argp;
4644 struct kvm_msr_list msr_list;
4648 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4651 msr_list.nmsrs = num_msr_based_features;
4652 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4655 if (n < msr_list.nmsrs)
4658 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4659 num_msr_based_features * sizeof(u32)))
4665 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4667 case KVM_GET_SUPPORTED_HV_CPUID:
4668 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4670 case KVM_GET_DEVICE_ATTR: {
4671 struct kvm_device_attr attr;
4673 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4675 r = kvm_x86_dev_get_attr(&attr);
4678 case KVM_HAS_DEVICE_ATTR: {
4679 struct kvm_device_attr attr;
4681 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4683 r = kvm_x86_dev_has_attr(&attr);
4694 static void wbinvd_ipi(void *garbage)
4699 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4701 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4704 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4706 /* Address WBINVD may be executed by guest */
4707 if (need_emulate_wbinvd(vcpu)) {
4708 if (static_call(kvm_x86_has_wbinvd_exit)())
4709 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4710 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4711 smp_call_function_single(vcpu->cpu,
4712 wbinvd_ipi, NULL, 1);
4715 static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4717 /* Save host pkru register if supported */
4718 vcpu->arch.host_pkru = read_pkru();
4720 /* Apply any externally detected TSC adjustments (due to suspend) */
4721 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4722 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4723 vcpu->arch.tsc_offset_adjustment = 0;
4724 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4727 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4728 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4729 rdtsc() - vcpu->arch.last_host_tsc;
4731 mark_tsc_unstable("KVM discovered backwards TSC");
4733 if (kvm_check_tsc_unstable()) {
4734 u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4735 vcpu->arch.last_guest_tsc);
4736 kvm_vcpu_write_tsc_offset(vcpu, offset);
4737 vcpu->arch.tsc_catchup = 1;
4740 if (kvm_lapic_hv_timer_in_use(vcpu))
4741 kvm_lapic_restart_hv_timer(vcpu);
4744 * On a host with synchronized TSC, there is no need to update
4745 * kvmclock on vcpu->cpu migration
4747 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4748 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4749 if (vcpu->cpu != cpu)
4750 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4754 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4757 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4759 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4760 struct kvm_steal_time __user *st;
4761 struct kvm_memslots *slots;
4762 static const u8 preempted = KVM_VCPU_PREEMPTED;
4763 gpa_t gpa = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
4766 * The vCPU can be marked preempted if and only if the VM-Exit was on
4767 * an instruction boundary and will not trigger guest emulation of any
4768 * kind (see vcpu_run). Vendor specific code controls (conservatively)
4769 * when this is true, for example allowing the vCPU to be marked
4770 * preempted if and only if the VM-Exit was due to a host interrupt.
4772 if (!vcpu->arch.at_instruction_boundary) {
4773 vcpu->stat.preemption_other++;
4777 vcpu->stat.preemption_reported++;
4778 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4781 if (vcpu->arch.st.preempted)
4784 /* This happens on process exit */
4785 if (unlikely(current->mm != vcpu->kvm->mm))
4788 slots = kvm_memslots(vcpu->kvm);
4790 if (unlikely(slots->generation != ghc->generation ||
4792 kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4795 st = (struct kvm_steal_time __user *)ghc->hva;
4796 BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4798 if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4799 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4801 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4804 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4808 if (vcpu->preempted) {
4809 if (!vcpu->arch.guest_state_protected)
4810 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4813 * Take the srcu lock as memslots will be accessed to check the gfn
4814 * cache generation against the memslots generation.
4816 idx = srcu_read_lock(&vcpu->kvm->srcu);
4817 if (kvm_xen_msr_enabled(vcpu->kvm))
4818 kvm_xen_runstate_set_preempted(vcpu);
4820 kvm_steal_time_set_preempted(vcpu);
4821 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4824 static_call(kvm_x86_vcpu_put)(vcpu);
4825 vcpu->arch.last_host_tsc = rdtsc();
4828 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4829 struct kvm_lapic_state *s)
4831 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4833 return kvm_apic_get_state(vcpu, s);
4836 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4837 struct kvm_lapic_state *s)
4841 r = kvm_apic_set_state(vcpu, s);
4844 update_cr8_intercept(vcpu);
4849 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4852 * We can accept userspace's request for interrupt injection
4853 * as long as we have a place to store the interrupt number.
4854 * The actual injection will happen when the CPU is able to
4855 * deliver the interrupt.
4857 if (kvm_cpu_has_extint(vcpu))
4860 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4861 return (!lapic_in_kernel(vcpu) ||
4862 kvm_apic_accept_pic_intr(vcpu));
4865 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4868 * Do not cause an interrupt window exit if an exception
4869 * is pending or an event needs reinjection; userspace
4870 * might want to inject the interrupt manually using KVM_SET_REGS
4871 * or KVM_SET_SREGS. For that to work, we must be at an
4872 * instruction boundary and with no events half-injected.
4874 return (kvm_arch_interrupt_allowed(vcpu) &&
4875 kvm_cpu_accept_dm_intr(vcpu) &&
4876 !kvm_event_needs_reinjection(vcpu) &&
4877 !kvm_is_exception_pending(vcpu));
4880 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4881 struct kvm_interrupt *irq)
4883 if (irq->irq >= KVM_NR_INTERRUPTS)
4886 if (!irqchip_in_kernel(vcpu->kvm)) {
4887 kvm_queue_interrupt(vcpu, irq->irq, false);
4888 kvm_make_request(KVM_REQ_EVENT, vcpu);
4893 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4894 * fail for in-kernel 8259.
4896 if (pic_in_kernel(vcpu->kvm))
4899 if (vcpu->arch.pending_external_vector != -1)
4902 vcpu->arch.pending_external_vector = irq->irq;
4903 kvm_make_request(KVM_REQ_EVENT, vcpu);
4907 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4909 kvm_inject_nmi(vcpu);
4914 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4915 struct kvm_tpr_access_ctl *tac)
4919 vcpu->arch.tpr_access_reporting = !!tac->enabled;
4923 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4927 unsigned bank_num = mcg_cap & 0xff, bank;
4930 if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4932 if (mcg_cap & ~(kvm_caps.supported_mce_cap | 0xff | 0xff0000))
4935 vcpu->arch.mcg_cap = mcg_cap;
4936 /* Init IA32_MCG_CTL to all 1s */
4937 if (mcg_cap & MCG_CTL_P)
4938 vcpu->arch.mcg_ctl = ~(u64)0;
4939 /* Init IA32_MCi_CTL to all 1s, IA32_MCi_CTL2 to all 0s */
4940 for (bank = 0; bank < bank_num; bank++) {
4941 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4942 if (mcg_cap & MCG_CMCI_P)
4943 vcpu->arch.mci_ctl2_banks[bank] = 0;
4946 kvm_apic_after_set_mcg_cap(vcpu);
4948 static_call(kvm_x86_setup_mce)(vcpu);
4954 * Validate this is an UCNA (uncorrectable no action) error by checking the
4955 * MCG_STATUS and MCi_STATUS registers:
4956 * - none of the bits for Machine Check Exceptions are set
4957 * - both the VAL (valid) and UC (uncorrectable) bits are set
4958 * MCI_STATUS_PCC - Processor Context Corrupted
4959 * MCI_STATUS_S - Signaled as a Machine Check Exception
4960 * MCI_STATUS_AR - Software recoverable Action Required
4962 static bool is_ucna(struct kvm_x86_mce *mce)
4964 return !mce->mcg_status &&
4965 !(mce->status & (MCI_STATUS_PCC | MCI_STATUS_S | MCI_STATUS_AR)) &&
4966 (mce->status & MCI_STATUS_VAL) &&
4967 (mce->status & MCI_STATUS_UC);
4970 static int kvm_vcpu_x86_set_ucna(struct kvm_vcpu *vcpu, struct kvm_x86_mce *mce, u64* banks)
4972 u64 mcg_cap = vcpu->arch.mcg_cap;
4974 banks[1] = mce->status;
4975 banks[2] = mce->addr;
4976 banks[3] = mce->misc;
4977 vcpu->arch.mcg_status = mce->mcg_status;
4979 if (!(mcg_cap & MCG_CMCI_P) ||
4980 !(vcpu->arch.mci_ctl2_banks[mce->bank] & MCI_CTL2_CMCI_EN))
4983 if (lapic_in_kernel(vcpu))
4984 kvm_apic_local_deliver(vcpu->arch.apic, APIC_LVTCMCI);
4989 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4990 struct kvm_x86_mce *mce)
4992 u64 mcg_cap = vcpu->arch.mcg_cap;
4993 unsigned bank_num = mcg_cap & 0xff;
4994 u64 *banks = vcpu->arch.mce_banks;
4996 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4999 banks += array_index_nospec(4 * mce->bank, 4 * bank_num);
5002 return kvm_vcpu_x86_set_ucna(vcpu, mce, banks);
5005 * if IA32_MCG_CTL is not all 1s, the uncorrected error
5006 * reporting is disabled
5008 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
5009 vcpu->arch.mcg_ctl != ~(u64)0)
5012 * if IA32_MCi_CTL is not all 1s, the uncorrected error
5013 * reporting is disabled for the bank
5015 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
5017 if (mce->status & MCI_STATUS_UC) {
5018 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
5019 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
5020 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5023 if (banks[1] & MCI_STATUS_VAL)
5024 mce->status |= MCI_STATUS_OVER;
5025 banks[2] = mce->addr;
5026 banks[3] = mce->misc;
5027 vcpu->arch.mcg_status = mce->mcg_status;
5028 banks[1] = mce->status;
5029 kvm_queue_exception(vcpu, MC_VECTOR);
5030 } else if (!(banks[1] & MCI_STATUS_VAL)
5031 || !(banks[1] & MCI_STATUS_UC)) {
5032 if (banks[1] & MCI_STATUS_VAL)
5033 mce->status |= MCI_STATUS_OVER;
5034 banks[2] = mce->addr;
5035 banks[3] = mce->misc;
5036 banks[1] = mce->status;
5038 banks[1] |= MCI_STATUS_OVER;
5042 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
5043 struct kvm_vcpu_events *events)
5045 struct kvm_queued_exception *ex;
5049 #ifdef CONFIG_KVM_SMM
5050 if (kvm_check_request(KVM_REQ_SMI, vcpu))
5055 * KVM's ABI only allows for one exception to be migrated. Luckily,
5056 * the only time there can be two queued exceptions is if there's a
5057 * non-exiting _injected_ exception, and a pending exiting exception.
5058 * In that case, ignore the VM-Exiting exception as it's an extension
5059 * of the injected exception.
5061 if (vcpu->arch.exception_vmexit.pending &&
5062 !vcpu->arch.exception.pending &&
5063 !vcpu->arch.exception.injected)
5064 ex = &vcpu->arch.exception_vmexit;
5066 ex = &vcpu->arch.exception;
5069 * In guest mode, payload delivery should be deferred if the exception
5070 * will be intercepted by L1, e.g. KVM should not modifying CR2 if L1
5071 * intercepts #PF, ditto for DR6 and #DBs. If the per-VM capability,
5072 * KVM_CAP_EXCEPTION_PAYLOAD, is not set, userspace may or may not
5073 * propagate the payload and so it cannot be safely deferred. Deliver
5074 * the payload if the capability hasn't been requested.
5076 if (!vcpu->kvm->arch.exception_payload_enabled &&
5077 ex->pending && ex->has_payload)
5078 kvm_deliver_exception_payload(vcpu, ex);
5080 memset(events, 0, sizeof(*events));
5083 * The API doesn't provide the instruction length for software
5084 * exceptions, so don't report them. As long as the guest RIP
5085 * isn't advanced, we should expect to encounter the exception
5088 if (!kvm_exception_is_soft(ex->vector)) {
5089 events->exception.injected = ex->injected;
5090 events->exception.pending = ex->pending;
5092 * For ABI compatibility, deliberately conflate
5093 * pending and injected exceptions when
5094 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
5096 if (!vcpu->kvm->arch.exception_payload_enabled)
5097 events->exception.injected |= ex->pending;
5099 events->exception.nr = ex->vector;
5100 events->exception.has_error_code = ex->has_error_code;
5101 events->exception.error_code = ex->error_code;
5102 events->exception_has_payload = ex->has_payload;
5103 events->exception_payload = ex->payload;
5105 events->interrupt.injected =
5106 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
5107 events->interrupt.nr = vcpu->arch.interrupt.nr;
5108 events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
5110 events->nmi.injected = vcpu->arch.nmi_injected;
5111 events->nmi.pending = vcpu->arch.nmi_pending != 0;
5112 events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
5114 /* events->sipi_vector is never valid when reporting to user space */
5116 #ifdef CONFIG_KVM_SMM
5117 events->smi.smm = is_smm(vcpu);
5118 events->smi.pending = vcpu->arch.smi_pending;
5119 events->smi.smm_inside_nmi =
5120 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
5122 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
5124 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
5125 | KVM_VCPUEVENT_VALID_SHADOW
5126 | KVM_VCPUEVENT_VALID_SMM);
5127 if (vcpu->kvm->arch.exception_payload_enabled)
5128 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
5129 if (vcpu->kvm->arch.triple_fault_event) {
5130 events->triple_fault.pending = kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5131 events->flags |= KVM_VCPUEVENT_VALID_TRIPLE_FAULT;
5135 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
5136 struct kvm_vcpu_events *events)
5138 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
5139 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
5140 | KVM_VCPUEVENT_VALID_SHADOW
5141 | KVM_VCPUEVENT_VALID_SMM
5142 | KVM_VCPUEVENT_VALID_PAYLOAD
5143 | KVM_VCPUEVENT_VALID_TRIPLE_FAULT))
5146 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
5147 if (!vcpu->kvm->arch.exception_payload_enabled)
5149 if (events->exception.pending)
5150 events->exception.injected = 0;
5152 events->exception_has_payload = 0;
5154 events->exception.pending = 0;
5155 events->exception_has_payload = 0;
5158 if ((events->exception.injected || events->exception.pending) &&
5159 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
5162 /* INITs are latched while in SMM */
5163 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
5164 (events->smi.smm || events->smi.pending) &&
5165 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
5171 * Flag that userspace is stuffing an exception, the next KVM_RUN will
5172 * morph the exception to a VM-Exit if appropriate. Do this only for
5173 * pending exceptions, already-injected exceptions are not subject to
5174 * intercpetion. Note, userspace that conflates pending and injected
5175 * is hosed, and will incorrectly convert an injected exception into a
5176 * pending exception, which in turn may cause a spurious VM-Exit.
5178 vcpu->arch.exception_from_userspace = events->exception.pending;
5180 vcpu->arch.exception_vmexit.pending = false;
5182 vcpu->arch.exception.injected = events->exception.injected;
5183 vcpu->arch.exception.pending = events->exception.pending;
5184 vcpu->arch.exception.vector = events->exception.nr;
5185 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
5186 vcpu->arch.exception.error_code = events->exception.error_code;
5187 vcpu->arch.exception.has_payload = events->exception_has_payload;
5188 vcpu->arch.exception.payload = events->exception_payload;
5190 vcpu->arch.interrupt.injected = events->interrupt.injected;
5191 vcpu->arch.interrupt.nr = events->interrupt.nr;
5192 vcpu->arch.interrupt.soft = events->interrupt.soft;
5193 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
5194 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
5195 events->interrupt.shadow);
5197 vcpu->arch.nmi_injected = events->nmi.injected;
5198 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
5199 vcpu->arch.nmi_pending = events->nmi.pending;
5200 static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
5202 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
5203 lapic_in_kernel(vcpu))
5204 vcpu->arch.apic->sipi_vector = events->sipi_vector;
5206 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
5207 #ifdef CONFIG_KVM_SMM
5208 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
5209 kvm_leave_nested(vcpu);
5210 kvm_smm_changed(vcpu, events->smi.smm);
5213 vcpu->arch.smi_pending = events->smi.pending;
5215 if (events->smi.smm) {
5216 if (events->smi.smm_inside_nmi)
5217 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
5219 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
5223 if (events->smi.smm || events->smi.pending ||
5224 events->smi.smm_inside_nmi)
5228 if (lapic_in_kernel(vcpu)) {
5229 if (events->smi.latched_init)
5230 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5232 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5236 if (events->flags & KVM_VCPUEVENT_VALID_TRIPLE_FAULT) {
5237 if (!vcpu->kvm->arch.triple_fault_event)
5239 if (events->triple_fault.pending)
5240 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5242 kvm_clear_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5245 kvm_make_request(KVM_REQ_EVENT, vcpu);
5250 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
5251 struct kvm_debugregs *dbgregs)
5255 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
5256 kvm_get_dr(vcpu, 6, &val);
5258 dbgregs->dr7 = vcpu->arch.dr7;
5260 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
5263 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
5264 struct kvm_debugregs *dbgregs)
5269 if (!kvm_dr6_valid(dbgregs->dr6))
5271 if (!kvm_dr7_valid(dbgregs->dr7))
5274 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
5275 kvm_update_dr0123(vcpu);
5276 vcpu->arch.dr6 = dbgregs->dr6;
5277 vcpu->arch.dr7 = dbgregs->dr7;
5278 kvm_update_dr7(vcpu);
5283 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
5284 struct kvm_xsave *guest_xsave)
5286 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5289 fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5290 guest_xsave->region,
5291 sizeof(guest_xsave->region),
5295 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
5296 u8 *state, unsigned int size)
5298 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5301 fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5302 state, size, vcpu->arch.pkru);
5305 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5306 struct kvm_xsave *guest_xsave)
5308 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5311 return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5312 guest_xsave->region,
5313 kvm_caps.supported_xcr0,
5317 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5318 struct kvm_xcrs *guest_xcrs)
5320 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5321 guest_xcrs->nr_xcrs = 0;
5325 guest_xcrs->nr_xcrs = 1;
5326 guest_xcrs->flags = 0;
5327 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5328 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5331 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5332 struct kvm_xcrs *guest_xcrs)
5336 if (!boot_cpu_has(X86_FEATURE_XSAVE))
5339 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5342 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5343 /* Only support XCR0 currently */
5344 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5345 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5346 guest_xcrs->xcrs[i].value);
5355 * kvm_set_guest_paused() indicates to the guest kernel that it has been
5356 * stopped by the hypervisor. This function will be called from the host only.
5357 * EINVAL is returned when the host attempts to set the flag for a guest that
5358 * does not support pv clocks.
5360 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5362 if (!vcpu->arch.pv_time.active)
5364 vcpu->arch.pvclock_set_guest_stopped_request = true;
5365 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5369 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5370 struct kvm_device_attr *attr)
5374 switch (attr->attr) {
5375 case KVM_VCPU_TSC_OFFSET:
5385 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5386 struct kvm_device_attr *attr)
5388 u64 __user *uaddr = kvm_get_attr_addr(attr);
5392 return PTR_ERR(uaddr);
5394 switch (attr->attr) {
5395 case KVM_VCPU_TSC_OFFSET:
5397 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5408 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5409 struct kvm_device_attr *attr)
5411 u64 __user *uaddr = kvm_get_attr_addr(attr);
5412 struct kvm *kvm = vcpu->kvm;
5416 return PTR_ERR(uaddr);
5418 switch (attr->attr) {
5419 case KVM_VCPU_TSC_OFFSET: {
5420 u64 offset, tsc, ns;
5421 unsigned long flags;
5425 if (get_user(offset, uaddr))
5428 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5430 matched = (vcpu->arch.virtual_tsc_khz &&
5431 kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5432 kvm->arch.last_tsc_offset == offset);
5434 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5435 ns = get_kvmclock_base_ns();
5437 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5438 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5450 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5454 struct kvm_device_attr attr;
5457 if (copy_from_user(&attr, argp, sizeof(attr)))
5460 if (attr.group != KVM_VCPU_TSC_CTRL)
5464 case KVM_HAS_DEVICE_ATTR:
5465 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5467 case KVM_GET_DEVICE_ATTR:
5468 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5470 case KVM_SET_DEVICE_ATTR:
5471 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5478 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5479 struct kvm_enable_cap *cap)
5482 uint16_t vmcs_version;
5483 void __user *user_ptr;
5489 case KVM_CAP_HYPERV_SYNIC2:
5494 case KVM_CAP_HYPERV_SYNIC:
5495 if (!irqchip_in_kernel(vcpu->kvm))
5497 return kvm_hv_activate_synic(vcpu, cap->cap ==
5498 KVM_CAP_HYPERV_SYNIC2);
5499 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5500 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5502 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5504 user_ptr = (void __user *)(uintptr_t)cap->args[0];
5505 if (copy_to_user(user_ptr, &vmcs_version,
5506 sizeof(vmcs_version)))
5510 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5511 if (!kvm_x86_ops.enable_l2_tlb_flush)
5514 return static_call(kvm_x86_enable_l2_tlb_flush)(vcpu);
5516 case KVM_CAP_HYPERV_ENFORCE_CPUID:
5517 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5519 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5520 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5521 if (vcpu->arch.pv_cpuid.enforce)
5522 kvm_update_pv_runtime(vcpu);
5530 long kvm_arch_vcpu_ioctl(struct file *filp,
5531 unsigned int ioctl, unsigned long arg)
5533 struct kvm_vcpu *vcpu = filp->private_data;
5534 void __user *argp = (void __user *)arg;
5537 struct kvm_sregs2 *sregs2;
5538 struct kvm_lapic_state *lapic;
5539 struct kvm_xsave *xsave;
5540 struct kvm_xcrs *xcrs;
5548 case KVM_GET_LAPIC: {
5550 if (!lapic_in_kernel(vcpu))
5552 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5553 GFP_KERNEL_ACCOUNT);
5558 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5562 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5567 case KVM_SET_LAPIC: {
5569 if (!lapic_in_kernel(vcpu))
5571 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5572 if (IS_ERR(u.lapic)) {
5573 r = PTR_ERR(u.lapic);
5577 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5580 case KVM_INTERRUPT: {
5581 struct kvm_interrupt irq;
5584 if (copy_from_user(&irq, argp, sizeof(irq)))
5586 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5590 r = kvm_vcpu_ioctl_nmi(vcpu);
5594 r = kvm_inject_smi(vcpu);
5597 case KVM_SET_CPUID: {
5598 struct kvm_cpuid __user *cpuid_arg = argp;
5599 struct kvm_cpuid cpuid;
5602 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5604 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5607 case KVM_SET_CPUID2: {
5608 struct kvm_cpuid2 __user *cpuid_arg = argp;
5609 struct kvm_cpuid2 cpuid;
5612 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5614 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5615 cpuid_arg->entries);
5618 case KVM_GET_CPUID2: {
5619 struct kvm_cpuid2 __user *cpuid_arg = argp;
5620 struct kvm_cpuid2 cpuid;
5623 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5625 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5626 cpuid_arg->entries);
5630 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5635 case KVM_GET_MSRS: {
5636 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5637 r = msr_io(vcpu, argp, do_get_msr, 1);
5638 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5641 case KVM_SET_MSRS: {
5642 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5643 r = msr_io(vcpu, argp, do_set_msr, 0);
5644 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5647 case KVM_TPR_ACCESS_REPORTING: {
5648 struct kvm_tpr_access_ctl tac;
5651 if (copy_from_user(&tac, argp, sizeof(tac)))
5653 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5657 if (copy_to_user(argp, &tac, sizeof(tac)))
5662 case KVM_SET_VAPIC_ADDR: {
5663 struct kvm_vapic_addr va;
5667 if (!lapic_in_kernel(vcpu))
5670 if (copy_from_user(&va, argp, sizeof(va)))
5672 idx = srcu_read_lock(&vcpu->kvm->srcu);
5673 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5674 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5677 case KVM_X86_SETUP_MCE: {
5681 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5683 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5686 case KVM_X86_SET_MCE: {
5687 struct kvm_x86_mce mce;
5690 if (copy_from_user(&mce, argp, sizeof(mce)))
5692 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5695 case KVM_GET_VCPU_EVENTS: {
5696 struct kvm_vcpu_events events;
5698 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5701 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5706 case KVM_SET_VCPU_EVENTS: {
5707 struct kvm_vcpu_events events;
5710 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5713 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5716 case KVM_GET_DEBUGREGS: {
5717 struct kvm_debugregs dbgregs;
5719 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5722 if (copy_to_user(argp, &dbgregs,
5723 sizeof(struct kvm_debugregs)))
5728 case KVM_SET_DEBUGREGS: {
5729 struct kvm_debugregs dbgregs;
5732 if (copy_from_user(&dbgregs, argp,
5733 sizeof(struct kvm_debugregs)))
5736 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5739 case KVM_GET_XSAVE: {
5741 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5744 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5749 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5752 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5757 case KVM_SET_XSAVE: {
5758 int size = vcpu->arch.guest_fpu.uabi_size;
5760 u.xsave = memdup_user(argp, size);
5761 if (IS_ERR(u.xsave)) {
5762 r = PTR_ERR(u.xsave);
5766 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5770 case KVM_GET_XSAVE2: {
5771 int size = vcpu->arch.guest_fpu.uabi_size;
5773 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5778 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5781 if (copy_to_user(argp, u.xsave, size))
5788 case KVM_GET_XCRS: {
5789 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5794 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5797 if (copy_to_user(argp, u.xcrs,
5798 sizeof(struct kvm_xcrs)))
5803 case KVM_SET_XCRS: {
5804 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5805 if (IS_ERR(u.xcrs)) {
5806 r = PTR_ERR(u.xcrs);
5810 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5813 case KVM_SET_TSC_KHZ: {
5817 user_tsc_khz = (u32)arg;
5819 if (kvm_caps.has_tsc_control &&
5820 user_tsc_khz >= kvm_caps.max_guest_tsc_khz)
5823 if (user_tsc_khz == 0)
5824 user_tsc_khz = tsc_khz;
5826 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5831 case KVM_GET_TSC_KHZ: {
5832 r = vcpu->arch.virtual_tsc_khz;
5835 case KVM_KVMCLOCK_CTRL: {
5836 r = kvm_set_guest_paused(vcpu);
5839 case KVM_ENABLE_CAP: {
5840 struct kvm_enable_cap cap;
5843 if (copy_from_user(&cap, argp, sizeof(cap)))
5845 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5848 case KVM_GET_NESTED_STATE: {
5849 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5853 if (!kvm_x86_ops.nested_ops->get_state)
5856 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5858 if (get_user(user_data_size, &user_kvm_nested_state->size))
5861 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5866 if (r > user_data_size) {
5867 if (put_user(r, &user_kvm_nested_state->size))
5877 case KVM_SET_NESTED_STATE: {
5878 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5879 struct kvm_nested_state kvm_state;
5883 if (!kvm_x86_ops.nested_ops->set_state)
5887 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5891 if (kvm_state.size < sizeof(kvm_state))
5894 if (kvm_state.flags &
5895 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5896 | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5897 | KVM_STATE_NESTED_GIF_SET))
5900 /* nested_run_pending implies guest_mode. */
5901 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5902 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5905 idx = srcu_read_lock(&vcpu->kvm->srcu);
5906 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5907 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5910 case KVM_GET_SUPPORTED_HV_CPUID:
5911 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5913 #ifdef CONFIG_KVM_XEN
5914 case KVM_XEN_VCPU_GET_ATTR: {
5915 struct kvm_xen_vcpu_attr xva;
5918 if (copy_from_user(&xva, argp, sizeof(xva)))
5920 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5921 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5925 case KVM_XEN_VCPU_SET_ATTR: {
5926 struct kvm_xen_vcpu_attr xva;
5929 if (copy_from_user(&xva, argp, sizeof(xva)))
5931 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5935 case KVM_GET_SREGS2: {
5936 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5940 __get_sregs2(vcpu, u.sregs2);
5942 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5947 case KVM_SET_SREGS2: {
5948 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5949 if (IS_ERR(u.sregs2)) {
5950 r = PTR_ERR(u.sregs2);
5954 r = __set_sregs2(vcpu, u.sregs2);
5957 case KVM_HAS_DEVICE_ATTR:
5958 case KVM_GET_DEVICE_ATTR:
5959 case KVM_SET_DEVICE_ATTR:
5960 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5972 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5974 return VM_FAULT_SIGBUS;
5977 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5981 if (addr > (unsigned int)(-3 * PAGE_SIZE))
5983 ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5987 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5990 return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5993 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5994 unsigned long kvm_nr_mmu_pages)
5996 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5999 mutex_lock(&kvm->slots_lock);
6001 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
6002 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
6004 mutex_unlock(&kvm->slots_lock);
6008 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
6010 return kvm->arch.n_max_mmu_pages;
6013 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
6015 struct kvm_pic *pic = kvm->arch.vpic;
6019 switch (chip->chip_id) {
6020 case KVM_IRQCHIP_PIC_MASTER:
6021 memcpy(&chip->chip.pic, &pic->pics[0],
6022 sizeof(struct kvm_pic_state));
6024 case KVM_IRQCHIP_PIC_SLAVE:
6025 memcpy(&chip->chip.pic, &pic->pics[1],
6026 sizeof(struct kvm_pic_state));
6028 case KVM_IRQCHIP_IOAPIC:
6029 kvm_get_ioapic(kvm, &chip->chip.ioapic);
6038 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
6040 struct kvm_pic *pic = kvm->arch.vpic;
6044 switch (chip->chip_id) {
6045 case KVM_IRQCHIP_PIC_MASTER:
6046 spin_lock(&pic->lock);
6047 memcpy(&pic->pics[0], &chip->chip.pic,
6048 sizeof(struct kvm_pic_state));
6049 spin_unlock(&pic->lock);
6051 case KVM_IRQCHIP_PIC_SLAVE:
6052 spin_lock(&pic->lock);
6053 memcpy(&pic->pics[1], &chip->chip.pic,
6054 sizeof(struct kvm_pic_state));
6055 spin_unlock(&pic->lock);
6057 case KVM_IRQCHIP_IOAPIC:
6058 kvm_set_ioapic(kvm, &chip->chip.ioapic);
6064 kvm_pic_update_irq(pic);
6068 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
6070 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
6072 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
6074 mutex_lock(&kps->lock);
6075 memcpy(ps, &kps->channels, sizeof(*ps));
6076 mutex_unlock(&kps->lock);
6080 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
6083 struct kvm_pit *pit = kvm->arch.vpit;
6085 mutex_lock(&pit->pit_state.lock);
6086 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
6087 for (i = 0; i < 3; i++)
6088 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
6089 mutex_unlock(&pit->pit_state.lock);
6093 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
6095 mutex_lock(&kvm->arch.vpit->pit_state.lock);
6096 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
6097 sizeof(ps->channels));
6098 ps->flags = kvm->arch.vpit->pit_state.flags;
6099 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
6100 memset(&ps->reserved, 0, sizeof(ps->reserved));
6104 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
6108 u32 prev_legacy, cur_legacy;
6109 struct kvm_pit *pit = kvm->arch.vpit;
6111 mutex_lock(&pit->pit_state.lock);
6112 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
6113 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
6114 if (!prev_legacy && cur_legacy)
6116 memcpy(&pit->pit_state.channels, &ps->channels,
6117 sizeof(pit->pit_state.channels));
6118 pit->pit_state.flags = ps->flags;
6119 for (i = 0; i < 3; i++)
6120 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
6122 mutex_unlock(&pit->pit_state.lock);
6126 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
6127 struct kvm_reinject_control *control)
6129 struct kvm_pit *pit = kvm->arch.vpit;
6131 /* pit->pit_state.lock was overloaded to prevent userspace from getting
6132 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
6133 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
6135 mutex_lock(&pit->pit_state.lock);
6136 kvm_pit_set_reinject(pit, control->pit_reinject);
6137 mutex_unlock(&pit->pit_state.lock);
6142 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
6146 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
6147 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
6148 * on all VM-Exits, thus we only need to kick running vCPUs to force a
6151 struct kvm_vcpu *vcpu;
6154 kvm_for_each_vcpu(i, vcpu, kvm)
6155 kvm_vcpu_kick(vcpu);
6158 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
6161 if (!irqchip_in_kernel(kvm))
6164 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
6165 irq_event->irq, irq_event->level,
6170 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
6171 struct kvm_enable_cap *cap)
6179 case KVM_CAP_DISABLE_QUIRKS2:
6181 if (cap->args[0] & ~KVM_X86_VALID_QUIRKS)
6184 case KVM_CAP_DISABLE_QUIRKS:
6185 kvm->arch.disabled_quirks = cap->args[0];
6188 case KVM_CAP_SPLIT_IRQCHIP: {
6189 mutex_lock(&kvm->lock);
6191 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
6192 goto split_irqchip_unlock;
6194 if (irqchip_in_kernel(kvm))
6195 goto split_irqchip_unlock;
6196 if (kvm->created_vcpus)
6197 goto split_irqchip_unlock;
6198 r = kvm_setup_empty_irq_routing(kvm);
6200 goto split_irqchip_unlock;
6201 /* Pairs with irqchip_in_kernel. */
6203 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
6204 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
6205 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
6207 split_irqchip_unlock:
6208 mutex_unlock(&kvm->lock);
6211 case KVM_CAP_X2APIC_API:
6213 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
6216 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
6217 kvm->arch.x2apic_format = true;
6218 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
6219 kvm->arch.x2apic_broadcast_quirk_disabled = true;
6223 case KVM_CAP_X86_DISABLE_EXITS:
6225 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
6228 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
6229 kvm_can_mwait_in_guest())
6230 kvm->arch.mwait_in_guest = true;
6231 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
6232 kvm->arch.hlt_in_guest = true;
6233 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
6234 kvm->arch.pause_in_guest = true;
6235 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
6236 kvm->arch.cstate_in_guest = true;
6239 case KVM_CAP_MSR_PLATFORM_INFO:
6240 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
6243 case KVM_CAP_EXCEPTION_PAYLOAD:
6244 kvm->arch.exception_payload_enabled = cap->args[0];
6247 case KVM_CAP_X86_TRIPLE_FAULT_EVENT:
6248 kvm->arch.triple_fault_event = cap->args[0];
6251 case KVM_CAP_X86_USER_SPACE_MSR:
6253 if (cap->args[0] & ~KVM_MSR_EXIT_REASON_VALID_MASK)
6255 kvm->arch.user_space_msr_mask = cap->args[0];
6258 case KVM_CAP_X86_BUS_LOCK_EXIT:
6260 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
6263 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
6264 (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
6267 if (kvm_caps.has_bus_lock_exit &&
6268 cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
6269 kvm->arch.bus_lock_detection_enabled = true;
6272 #ifdef CONFIG_X86_SGX_KVM
6273 case KVM_CAP_SGX_ATTRIBUTE: {
6274 unsigned long allowed_attributes = 0;
6276 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
6280 /* KVM only supports the PROVISIONKEY privileged attribute. */
6281 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
6282 !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
6283 kvm->arch.sgx_provisioning_allowed = true;
6289 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
6291 if (!kvm_x86_ops.vm_copy_enc_context_from)
6294 r = static_call(kvm_x86_vm_copy_enc_context_from)(kvm, cap->args[0]);
6296 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
6298 if (!kvm_x86_ops.vm_move_enc_context_from)
6301 r = static_call(kvm_x86_vm_move_enc_context_from)(kvm, cap->args[0]);
6303 case KVM_CAP_EXIT_HYPERCALL:
6304 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
6308 kvm->arch.hypercall_exit_enabled = cap->args[0];
6311 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
6313 if (cap->args[0] & ~1)
6315 kvm->arch.exit_on_emulation_error = cap->args[0];
6318 case KVM_CAP_PMU_CAPABILITY:
6320 if (!enable_pmu || (cap->args[0] & ~KVM_CAP_PMU_VALID_MASK))
6323 mutex_lock(&kvm->lock);
6324 if (!kvm->created_vcpus) {
6325 kvm->arch.enable_pmu = !(cap->args[0] & KVM_PMU_CAP_DISABLE);
6328 mutex_unlock(&kvm->lock);
6330 case KVM_CAP_MAX_VCPU_ID:
6332 if (cap->args[0] > KVM_MAX_VCPU_IDS)
6335 mutex_lock(&kvm->lock);
6336 if (kvm->arch.max_vcpu_ids == cap->args[0]) {
6338 } else if (!kvm->arch.max_vcpu_ids) {
6339 kvm->arch.max_vcpu_ids = cap->args[0];
6342 mutex_unlock(&kvm->lock);
6344 case KVM_CAP_X86_NOTIFY_VMEXIT:
6346 if ((u32)cap->args[0] & ~KVM_X86_NOTIFY_VMEXIT_VALID_BITS)
6348 if (!kvm_caps.has_notify_vmexit)
6350 if (!((u32)cap->args[0] & KVM_X86_NOTIFY_VMEXIT_ENABLED))
6352 mutex_lock(&kvm->lock);
6353 if (!kvm->created_vcpus) {
6354 kvm->arch.notify_window = cap->args[0] >> 32;
6355 kvm->arch.notify_vmexit_flags = (u32)cap->args[0];
6358 mutex_unlock(&kvm->lock);
6360 case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES:
6364 * Since the risk of disabling NX hugepages is a guest crashing
6365 * the system, ensure the userspace process has permission to
6366 * reboot the system.
6368 * Note that unlike the reboot() syscall, the process must have
6369 * this capability in the root namespace because exposing
6370 * /dev/kvm into a container does not limit the scope of the
6371 * iTLB multihit bug to that container. In other words,
6372 * this must use capable(), not ns_capable().
6374 if (!capable(CAP_SYS_BOOT)) {
6382 mutex_lock(&kvm->lock);
6383 if (!kvm->created_vcpus) {
6384 kvm->arch.disable_nx_huge_pages = true;
6387 mutex_unlock(&kvm->lock);
6396 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6398 struct kvm_x86_msr_filter *msr_filter;
6400 msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6404 msr_filter->default_allow = default_allow;
6408 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6415 for (i = 0; i < msr_filter->count; i++)
6416 kfree(msr_filter->ranges[i].bitmap);
6421 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6422 struct kvm_msr_filter_range *user_range)
6424 unsigned long *bitmap = NULL;
6427 if (!user_range->nmsrs)
6430 if (user_range->flags & ~KVM_MSR_FILTER_RANGE_VALID_MASK)
6433 if (!user_range->flags)
6436 bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6437 if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6440 bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6442 return PTR_ERR(bitmap);
6444 msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6445 .flags = user_range->flags,
6446 .base = user_range->base,
6447 .nmsrs = user_range->nmsrs,
6451 msr_filter->count++;
6455 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm,
6456 struct kvm_msr_filter *filter)
6458 struct kvm_x86_msr_filter *new_filter, *old_filter;
6464 if (filter->flags & ~KVM_MSR_FILTER_VALID_MASK)
6467 for (i = 0; i < ARRAY_SIZE(filter->ranges); i++)
6468 empty &= !filter->ranges[i].nmsrs;
6470 default_allow = !(filter->flags & KVM_MSR_FILTER_DEFAULT_DENY);
6471 if (empty && !default_allow)
6474 new_filter = kvm_alloc_msr_filter(default_allow);
6478 for (i = 0; i < ARRAY_SIZE(filter->ranges); i++) {
6479 r = kvm_add_msr_filter(new_filter, &filter->ranges[i]);
6481 kvm_free_msr_filter(new_filter);
6486 mutex_lock(&kvm->lock);
6488 /* The per-VM filter is protected by kvm->lock... */
6489 old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6491 rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6492 synchronize_srcu(&kvm->srcu);
6494 kvm_free_msr_filter(old_filter);
6496 kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6497 mutex_unlock(&kvm->lock);
6502 #ifdef CONFIG_KVM_COMPAT
6503 /* for KVM_X86_SET_MSR_FILTER */
6504 struct kvm_msr_filter_range_compat {
6511 struct kvm_msr_filter_compat {
6513 struct kvm_msr_filter_range_compat ranges[KVM_MSR_FILTER_MAX_RANGES];
6516 #define KVM_X86_SET_MSR_FILTER_COMPAT _IOW(KVMIO, 0xc6, struct kvm_msr_filter_compat)
6518 long kvm_arch_vm_compat_ioctl(struct file *filp, unsigned int ioctl,
6521 void __user *argp = (void __user *)arg;
6522 struct kvm *kvm = filp->private_data;
6526 case KVM_X86_SET_MSR_FILTER_COMPAT: {
6527 struct kvm_msr_filter __user *user_msr_filter = argp;
6528 struct kvm_msr_filter_compat filter_compat;
6529 struct kvm_msr_filter filter;
6532 if (copy_from_user(&filter_compat, user_msr_filter,
6533 sizeof(filter_compat)))
6536 filter.flags = filter_compat.flags;
6537 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6538 struct kvm_msr_filter_range_compat *cr;
6540 cr = &filter_compat.ranges[i];
6541 filter.ranges[i] = (struct kvm_msr_filter_range) {
6545 .bitmap = (__u8 *)(ulong)cr->bitmap,
6549 r = kvm_vm_ioctl_set_msr_filter(kvm, &filter);
6558 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6559 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6561 struct kvm_vcpu *vcpu;
6565 mutex_lock(&kvm->lock);
6566 kvm_for_each_vcpu(i, vcpu, kvm) {
6567 if (!vcpu->arch.pv_time.active)
6570 ret = kvm_set_guest_paused(vcpu);
6572 kvm_err("Failed to pause guest VCPU%d: %d\n",
6573 vcpu->vcpu_id, ret);
6577 mutex_unlock(&kvm->lock);
6579 return ret ? NOTIFY_BAD : NOTIFY_DONE;
6582 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6585 case PM_HIBERNATION_PREPARE:
6586 case PM_SUSPEND_PREPARE:
6587 return kvm_arch_suspend_notifier(kvm);
6592 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6594 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6596 struct kvm_clock_data data = { 0 };
6598 get_kvmclock(kvm, &data);
6599 if (copy_to_user(argp, &data, sizeof(data)))
6605 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6607 struct kvm_arch *ka = &kvm->arch;
6608 struct kvm_clock_data data;
6611 if (copy_from_user(&data, argp, sizeof(data)))
6615 * Only KVM_CLOCK_REALTIME is used, but allow passing the
6616 * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6618 if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6621 kvm_hv_request_tsc_page_update(kvm);
6622 kvm_start_pvclock_update(kvm);
6623 pvclock_update_vm_gtod_copy(kvm);
6626 * This pairs with kvm_guest_time_update(): when masterclock is
6627 * in use, we use master_kernel_ns + kvmclock_offset to set
6628 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6629 * is slightly ahead) here we risk going negative on unsigned
6630 * 'system_time' when 'data.clock' is very small.
6632 if (data.flags & KVM_CLOCK_REALTIME) {
6633 u64 now_real_ns = ktime_get_real_ns();
6636 * Avoid stepping the kvmclock backwards.
6638 if (now_real_ns > data.realtime)
6639 data.clock += now_real_ns - data.realtime;
6642 if (ka->use_master_clock)
6643 now_raw_ns = ka->master_kernel_ns;
6645 now_raw_ns = get_kvmclock_base_ns();
6646 ka->kvmclock_offset = data.clock - now_raw_ns;
6647 kvm_end_pvclock_update(kvm);
6651 long kvm_arch_vm_ioctl(struct file *filp,
6652 unsigned int ioctl, unsigned long arg)
6654 struct kvm *kvm = filp->private_data;
6655 void __user *argp = (void __user *)arg;
6658 * This union makes it completely explicit to gcc-3.x
6659 * that these two variables' stack usage should be
6660 * combined, not added together.
6663 struct kvm_pit_state ps;
6664 struct kvm_pit_state2 ps2;
6665 struct kvm_pit_config pit_config;
6669 case KVM_SET_TSS_ADDR:
6670 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6672 case KVM_SET_IDENTITY_MAP_ADDR: {
6675 mutex_lock(&kvm->lock);
6677 if (kvm->created_vcpus)
6678 goto set_identity_unlock;
6680 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6681 goto set_identity_unlock;
6682 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6683 set_identity_unlock:
6684 mutex_unlock(&kvm->lock);
6687 case KVM_SET_NR_MMU_PAGES:
6688 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6690 case KVM_GET_NR_MMU_PAGES:
6691 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6693 case KVM_CREATE_IRQCHIP: {
6694 mutex_lock(&kvm->lock);
6697 if (irqchip_in_kernel(kvm))
6698 goto create_irqchip_unlock;
6701 if (kvm->created_vcpus)
6702 goto create_irqchip_unlock;
6704 r = kvm_pic_init(kvm);
6706 goto create_irqchip_unlock;
6708 r = kvm_ioapic_init(kvm);
6710 kvm_pic_destroy(kvm);
6711 goto create_irqchip_unlock;
6714 r = kvm_setup_default_irq_routing(kvm);
6716 kvm_ioapic_destroy(kvm);
6717 kvm_pic_destroy(kvm);
6718 goto create_irqchip_unlock;
6720 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6722 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6723 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
6724 create_irqchip_unlock:
6725 mutex_unlock(&kvm->lock);
6728 case KVM_CREATE_PIT:
6729 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6731 case KVM_CREATE_PIT2:
6733 if (copy_from_user(&u.pit_config, argp,
6734 sizeof(struct kvm_pit_config)))
6737 mutex_lock(&kvm->lock);
6740 goto create_pit_unlock;
6742 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6746 mutex_unlock(&kvm->lock);
6748 case KVM_GET_IRQCHIP: {
6749 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6750 struct kvm_irqchip *chip;
6752 chip = memdup_user(argp, sizeof(*chip));
6759 if (!irqchip_kernel(kvm))
6760 goto get_irqchip_out;
6761 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6763 goto get_irqchip_out;
6765 if (copy_to_user(argp, chip, sizeof(*chip)))
6766 goto get_irqchip_out;
6772 case KVM_SET_IRQCHIP: {
6773 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6774 struct kvm_irqchip *chip;
6776 chip = memdup_user(argp, sizeof(*chip));
6783 if (!irqchip_kernel(kvm))
6784 goto set_irqchip_out;
6785 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6792 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6795 if (!kvm->arch.vpit)
6797 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6801 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6808 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6810 mutex_lock(&kvm->lock);
6812 if (!kvm->arch.vpit)
6814 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6816 mutex_unlock(&kvm->lock);
6819 case KVM_GET_PIT2: {
6821 if (!kvm->arch.vpit)
6823 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6827 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6832 case KVM_SET_PIT2: {
6834 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6836 mutex_lock(&kvm->lock);
6838 if (!kvm->arch.vpit)
6840 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6842 mutex_unlock(&kvm->lock);
6845 case KVM_REINJECT_CONTROL: {
6846 struct kvm_reinject_control control;
6848 if (copy_from_user(&control, argp, sizeof(control)))
6851 if (!kvm->arch.vpit)
6853 r = kvm_vm_ioctl_reinject(kvm, &control);
6856 case KVM_SET_BOOT_CPU_ID:
6858 mutex_lock(&kvm->lock);
6859 if (kvm->created_vcpus)
6862 kvm->arch.bsp_vcpu_id = arg;
6863 mutex_unlock(&kvm->lock);
6865 #ifdef CONFIG_KVM_XEN
6866 case KVM_XEN_HVM_CONFIG: {
6867 struct kvm_xen_hvm_config xhc;
6869 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6871 r = kvm_xen_hvm_config(kvm, &xhc);
6874 case KVM_XEN_HVM_GET_ATTR: {
6875 struct kvm_xen_hvm_attr xha;
6878 if (copy_from_user(&xha, argp, sizeof(xha)))
6880 r = kvm_xen_hvm_get_attr(kvm, &xha);
6881 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6885 case KVM_XEN_HVM_SET_ATTR: {
6886 struct kvm_xen_hvm_attr xha;
6889 if (copy_from_user(&xha, argp, sizeof(xha)))
6891 r = kvm_xen_hvm_set_attr(kvm, &xha);
6894 case KVM_XEN_HVM_EVTCHN_SEND: {
6895 struct kvm_irq_routing_xen_evtchn uxe;
6898 if (copy_from_user(&uxe, argp, sizeof(uxe)))
6900 r = kvm_xen_hvm_evtchn_send(kvm, &uxe);
6905 r = kvm_vm_ioctl_set_clock(kvm, argp);
6908 r = kvm_vm_ioctl_get_clock(kvm, argp);
6910 case KVM_SET_TSC_KHZ: {
6914 user_tsc_khz = (u32)arg;
6916 if (kvm_caps.has_tsc_control &&
6917 user_tsc_khz >= kvm_caps.max_guest_tsc_khz)
6920 if (user_tsc_khz == 0)
6921 user_tsc_khz = tsc_khz;
6923 WRITE_ONCE(kvm->arch.default_tsc_khz, user_tsc_khz);
6928 case KVM_GET_TSC_KHZ: {
6929 r = READ_ONCE(kvm->arch.default_tsc_khz);
6932 case KVM_MEMORY_ENCRYPT_OP: {
6934 if (!kvm_x86_ops.mem_enc_ioctl)
6937 r = static_call(kvm_x86_mem_enc_ioctl)(kvm, argp);
6940 case KVM_MEMORY_ENCRYPT_REG_REGION: {
6941 struct kvm_enc_region region;
6944 if (copy_from_user(®ion, argp, sizeof(region)))
6948 if (!kvm_x86_ops.mem_enc_register_region)
6951 r = static_call(kvm_x86_mem_enc_register_region)(kvm, ®ion);
6954 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6955 struct kvm_enc_region region;
6958 if (copy_from_user(®ion, argp, sizeof(region)))
6962 if (!kvm_x86_ops.mem_enc_unregister_region)
6965 r = static_call(kvm_x86_mem_enc_unregister_region)(kvm, ®ion);
6968 case KVM_HYPERV_EVENTFD: {
6969 struct kvm_hyperv_eventfd hvevfd;
6972 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6974 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6977 case KVM_SET_PMU_EVENT_FILTER:
6978 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6980 case KVM_X86_SET_MSR_FILTER: {
6981 struct kvm_msr_filter __user *user_msr_filter = argp;
6982 struct kvm_msr_filter filter;
6984 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6987 r = kvm_vm_ioctl_set_msr_filter(kvm, &filter);
6997 static void kvm_init_msr_list(void)
7002 BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED != 3,
7003 "Please update the fixed PMCs in msrs_to_saved_all[]");
7005 num_msrs_to_save = 0;
7006 num_emulated_msrs = 0;
7007 num_msr_based_features = 0;
7009 for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
7010 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
7014 * Even MSRs that are valid in the host may not be exposed
7015 * to the guests in some cases.
7017 switch (msrs_to_save_all[i]) {
7018 case MSR_IA32_BNDCFGS:
7019 if (!kvm_mpx_supported())
7023 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
7024 !kvm_cpu_cap_has(X86_FEATURE_RDPID))
7027 case MSR_IA32_UMWAIT_CONTROL:
7028 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
7031 case MSR_IA32_RTIT_CTL:
7032 case MSR_IA32_RTIT_STATUS:
7033 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
7036 case MSR_IA32_RTIT_CR3_MATCH:
7037 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
7038 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
7041 case MSR_IA32_RTIT_OUTPUT_BASE:
7042 case MSR_IA32_RTIT_OUTPUT_MASK:
7043 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
7044 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
7045 !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
7048 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
7049 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
7050 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
7051 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
7054 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR_MAX:
7055 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
7056 kvm_pmu_cap.num_counters_gp)
7059 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL_MAX:
7060 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
7061 kvm_pmu_cap.num_counters_gp)
7065 case MSR_IA32_XFD_ERR:
7066 if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
7073 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
7076 for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
7077 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
7080 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
7083 for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
7084 struct kvm_msr_entry msr;
7086 msr.index = msr_based_features_all[i];
7087 if (kvm_get_msr_feature(&msr))
7090 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
7094 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
7102 if (!(lapic_in_kernel(vcpu) &&
7103 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
7104 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
7115 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
7122 if (!(lapic_in_kernel(vcpu) &&
7123 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
7125 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
7127 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
7137 void kvm_set_segment(struct kvm_vcpu *vcpu,
7138 struct kvm_segment *var, int seg)
7140 static_call(kvm_x86_set_segment)(vcpu, var, seg);
7143 void kvm_get_segment(struct kvm_vcpu *vcpu,
7144 struct kvm_segment *var, int seg)
7146 static_call(kvm_x86_get_segment)(vcpu, var, seg);
7149 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u64 access,
7150 struct x86_exception *exception)
7152 struct kvm_mmu *mmu = vcpu->arch.mmu;
7155 BUG_ON(!mmu_is_nested(vcpu));
7157 /* NPT walks are always user-walks */
7158 access |= PFERR_USER_MASK;
7159 t_gpa = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
7164 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
7165 struct x86_exception *exception)
7167 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7169 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7170 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7172 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
7174 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
7175 struct x86_exception *exception)
7177 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7179 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7180 access |= PFERR_WRITE_MASK;
7181 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7183 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
7185 /* uses this to access any guest's mapped memory without checking CPL */
7186 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
7187 struct x86_exception *exception)
7189 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7191 return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
7194 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
7195 struct kvm_vcpu *vcpu, u64 access,
7196 struct x86_exception *exception)
7198 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7200 int r = X86EMUL_CONTINUE;
7203 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
7204 unsigned offset = addr & (PAGE_SIZE-1);
7205 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
7208 if (gpa == INVALID_GPA)
7209 return X86EMUL_PROPAGATE_FAULT;
7210 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
7213 r = X86EMUL_IO_NEEDED;
7225 /* used for instruction fetching */
7226 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
7227 gva_t addr, void *val, unsigned int bytes,
7228 struct x86_exception *exception)
7230 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7231 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7232 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7236 /* Inline kvm_read_guest_virt_helper for speed. */
7237 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
7239 if (unlikely(gpa == INVALID_GPA))
7240 return X86EMUL_PROPAGATE_FAULT;
7242 offset = addr & (PAGE_SIZE-1);
7243 if (WARN_ON(offset + bytes > PAGE_SIZE))
7244 bytes = (unsigned)PAGE_SIZE - offset;
7245 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
7247 if (unlikely(ret < 0))
7248 return X86EMUL_IO_NEEDED;
7250 return X86EMUL_CONTINUE;
7253 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
7254 gva_t addr, void *val, unsigned int bytes,
7255 struct x86_exception *exception)
7257 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
7260 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
7261 * is returned, but our callers are not ready for that and they blindly
7262 * call kvm_inject_page_fault. Ensure that they at least do not leak
7263 * uninitialized kernel stack memory into cr2 and error code.
7265 memset(exception, 0, sizeof(*exception));
7266 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
7269 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
7271 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
7272 gva_t addr, void *val, unsigned int bytes,
7273 struct x86_exception *exception, bool system)
7275 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7279 access |= PFERR_IMPLICIT_ACCESS;
7280 else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
7281 access |= PFERR_USER_MASK;
7283 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
7286 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
7287 struct kvm_vcpu *vcpu, u64 access,
7288 struct x86_exception *exception)
7290 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7292 int r = X86EMUL_CONTINUE;
7295 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
7296 unsigned offset = addr & (PAGE_SIZE-1);
7297 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
7300 if (gpa == INVALID_GPA)
7301 return X86EMUL_PROPAGATE_FAULT;
7302 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
7304 r = X86EMUL_IO_NEEDED;
7316 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
7317 unsigned int bytes, struct x86_exception *exception,
7320 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7321 u64 access = PFERR_WRITE_MASK;
7324 access |= PFERR_IMPLICIT_ACCESS;
7325 else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
7326 access |= PFERR_USER_MASK;
7328 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
7332 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
7333 unsigned int bytes, struct x86_exception *exception)
7335 /* kvm_write_guest_virt_system can pull in tons of pages. */
7336 vcpu->arch.l1tf_flush_l1d = true;
7338 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
7339 PFERR_WRITE_MASK, exception);
7341 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
7343 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
7344 void *insn, int insn_len)
7346 return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
7350 int handle_ud(struct kvm_vcpu *vcpu)
7352 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
7353 int fep_flags = READ_ONCE(force_emulation_prefix);
7354 int emul_type = EMULTYPE_TRAP_UD;
7355 char sig[5]; /* ud2; .ascii "kvm" */
7356 struct x86_exception e;
7358 if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
7362 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
7363 sig, sizeof(sig), &e) == 0 &&
7364 memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
7365 if (fep_flags & KVM_FEP_CLEAR_RFLAGS_RF)
7366 kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) & ~X86_EFLAGS_RF);
7367 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
7368 emul_type = EMULTYPE_TRAP_UD_FORCED;
7371 return kvm_emulate_instruction(vcpu, emul_type);
7373 EXPORT_SYMBOL_GPL(handle_ud);
7375 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7376 gpa_t gpa, bool write)
7378 /* For APIC access vmexit */
7379 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7382 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
7383 trace_vcpu_match_mmio(gva, gpa, write, true);
7390 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7391 gpa_t *gpa, struct x86_exception *exception,
7394 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7395 u64 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
7396 | (write ? PFERR_WRITE_MASK : 0);
7399 * currently PKRU is only applied to ept enabled guest so
7400 * there is no pkey in EPT page table for L1 guest or EPT
7401 * shadow page table for L2 guest.
7403 if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
7404 !permission_fault(vcpu, vcpu->arch.walk_mmu,
7405 vcpu->arch.mmio_access, 0, access))) {
7406 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
7407 (gva & (PAGE_SIZE - 1));
7408 trace_vcpu_match_mmio(gva, *gpa, write, false);
7412 *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7414 if (*gpa == INVALID_GPA)
7417 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
7420 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
7421 const void *val, int bytes)
7425 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
7428 kvm_page_track_write(vcpu, gpa, val, bytes);
7432 struct read_write_emulator_ops {
7433 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
7435 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
7436 void *val, int bytes);
7437 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7438 int bytes, void *val);
7439 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7440 void *val, int bytes);
7444 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
7446 if (vcpu->mmio_read_completed) {
7447 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
7448 vcpu->mmio_fragments[0].gpa, val);
7449 vcpu->mmio_read_completed = 0;
7456 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7457 void *val, int bytes)
7459 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
7462 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7463 void *val, int bytes)
7465 return emulator_write_phys(vcpu, gpa, val, bytes);
7468 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
7470 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7471 return vcpu_mmio_write(vcpu, gpa, bytes, val);
7474 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7475 void *val, int bytes)
7477 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7478 return X86EMUL_IO_NEEDED;
7481 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7482 void *val, int bytes)
7484 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7486 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7487 return X86EMUL_CONTINUE;
7490 static const struct read_write_emulator_ops read_emultor = {
7491 .read_write_prepare = read_prepare,
7492 .read_write_emulate = read_emulate,
7493 .read_write_mmio = vcpu_mmio_read,
7494 .read_write_exit_mmio = read_exit_mmio,
7497 static const struct read_write_emulator_ops write_emultor = {
7498 .read_write_emulate = write_emulate,
7499 .read_write_mmio = write_mmio,
7500 .read_write_exit_mmio = write_exit_mmio,
7504 static int emulator_read_write_onepage(unsigned long addr, void *val,
7506 struct x86_exception *exception,
7507 struct kvm_vcpu *vcpu,
7508 const struct read_write_emulator_ops *ops)
7512 bool write = ops->write;
7513 struct kvm_mmio_fragment *frag;
7514 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7517 * If the exit was due to a NPF we may already have a GPA.
7518 * If the GPA is present, use it to avoid the GVA to GPA table walk.
7519 * Note, this cannot be used on string operations since string
7520 * operation using rep will only have the initial GPA from the NPF
7523 if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7524 (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7525 gpa = ctxt->gpa_val;
7526 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7528 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7530 return X86EMUL_PROPAGATE_FAULT;
7533 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7534 return X86EMUL_CONTINUE;
7537 * Is this MMIO handled locally?
7539 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7540 if (handled == bytes)
7541 return X86EMUL_CONTINUE;
7547 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7548 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7552 return X86EMUL_CONTINUE;
7555 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7557 void *val, unsigned int bytes,
7558 struct x86_exception *exception,
7559 const struct read_write_emulator_ops *ops)
7561 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7565 if (ops->read_write_prepare &&
7566 ops->read_write_prepare(vcpu, val, bytes))
7567 return X86EMUL_CONTINUE;
7569 vcpu->mmio_nr_fragments = 0;
7571 /* Crossing a page boundary? */
7572 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7575 now = -addr & ~PAGE_MASK;
7576 rc = emulator_read_write_onepage(addr, val, now, exception,
7579 if (rc != X86EMUL_CONTINUE)
7582 if (ctxt->mode != X86EMUL_MODE_PROT64)
7588 rc = emulator_read_write_onepage(addr, val, bytes, exception,
7590 if (rc != X86EMUL_CONTINUE)
7593 if (!vcpu->mmio_nr_fragments)
7596 gpa = vcpu->mmio_fragments[0].gpa;
7598 vcpu->mmio_needed = 1;
7599 vcpu->mmio_cur_fragment = 0;
7601 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7602 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7603 vcpu->run->exit_reason = KVM_EXIT_MMIO;
7604 vcpu->run->mmio.phys_addr = gpa;
7606 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7609 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7613 struct x86_exception *exception)
7615 return emulator_read_write(ctxt, addr, val, bytes,
7616 exception, &read_emultor);
7619 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7623 struct x86_exception *exception)
7625 return emulator_read_write(ctxt, addr, (void *)val, bytes,
7626 exception, &write_emultor);
7629 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7630 (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7632 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7637 struct x86_exception *exception)
7639 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7645 /* guests cmpxchg8b have to be emulated atomically */
7646 if (bytes > 8 || (bytes & (bytes - 1)))
7649 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7651 if (gpa == INVALID_GPA ||
7652 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7656 * Emulate the atomic as a straight write to avoid #AC if SLD is
7657 * enabled in the host and the access splits a cache line.
7659 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7660 page_line_mask = ~(cache_line_size() - 1);
7662 page_line_mask = PAGE_MASK;
7664 if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7667 hva = kvm_vcpu_gfn_to_hva(vcpu, gpa_to_gfn(gpa));
7668 if (kvm_is_error_hva(hva))
7671 hva += offset_in_page(gpa);
7675 r = emulator_try_cmpxchg_user(u8, hva, old, new);
7678 r = emulator_try_cmpxchg_user(u16, hva, old, new);
7681 r = emulator_try_cmpxchg_user(u32, hva, old, new);
7684 r = emulator_try_cmpxchg_user(u64, hva, old, new);
7691 return X86EMUL_UNHANDLEABLE;
7693 return X86EMUL_CMPXCHG_FAILED;
7695 kvm_page_track_write(vcpu, gpa, new, bytes);
7697 return X86EMUL_CONTINUE;
7700 pr_warn_once("emulating exchange as write\n");
7702 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7705 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7706 unsigned short port, void *data,
7707 unsigned int count, bool in)
7712 WARN_ON_ONCE(vcpu->arch.pio.count);
7713 for (i = 0; i < count; i++) {
7715 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, port, size, data);
7717 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS, port, size, data);
7724 * Userspace must have unregistered the device while PIO
7725 * was running. Drop writes / read as 0.
7728 memset(data, 0, size * (count - i));
7737 vcpu->arch.pio.port = port;
7738 vcpu->arch.pio.in = in;
7739 vcpu->arch.pio.count = count;
7740 vcpu->arch.pio.size = size;
7743 memset(vcpu->arch.pio_data, 0, size * count);
7745 memcpy(vcpu->arch.pio_data, data, size * count);
7747 vcpu->run->exit_reason = KVM_EXIT_IO;
7748 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7749 vcpu->run->io.size = size;
7750 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7751 vcpu->run->io.count = count;
7752 vcpu->run->io.port = port;
7756 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7757 unsigned short port, void *val, unsigned int count)
7759 int r = emulator_pio_in_out(vcpu, size, port, val, count, true);
7761 trace_kvm_pio(KVM_PIO_IN, port, size, count, val);
7766 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7768 int size = vcpu->arch.pio.size;
7769 unsigned int count = vcpu->arch.pio.count;
7770 memcpy(val, vcpu->arch.pio_data, size * count);
7771 trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7772 vcpu->arch.pio.count = 0;
7775 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7776 int size, unsigned short port, void *val,
7779 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7780 if (vcpu->arch.pio.count) {
7782 * Complete a previous iteration that required userspace I/O.
7783 * Note, @count isn't guaranteed to match pio.count as userspace
7784 * can modify ECX before rerunning the vCPU. Ignore any such
7785 * shenanigans as KVM doesn't support modifying the rep count,
7786 * and the emulator ensures @count doesn't overflow the buffer.
7788 complete_emulator_pio_in(vcpu, val);
7792 return emulator_pio_in(vcpu, size, port, val, count);
7795 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7796 unsigned short port, const void *val,
7799 trace_kvm_pio(KVM_PIO_OUT, port, size, count, val);
7800 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
7803 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7804 int size, unsigned short port,
7805 const void *val, unsigned int count)
7807 return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7810 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7812 return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7815 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7817 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7820 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7822 if (!need_emulate_wbinvd(vcpu))
7823 return X86EMUL_CONTINUE;
7825 if (static_call(kvm_x86_has_wbinvd_exit)()) {
7826 int cpu = get_cpu();
7828 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7829 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7830 wbinvd_ipi, NULL, 1);
7832 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7835 return X86EMUL_CONTINUE;
7838 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7840 kvm_emulate_wbinvd_noskip(vcpu);
7841 return kvm_skip_emulated_instruction(vcpu);
7843 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7847 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7849 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7852 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7853 unsigned long *dest)
7855 kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7858 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7859 unsigned long value)
7862 return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7865 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7867 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7870 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7872 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7873 unsigned long value;
7877 value = kvm_read_cr0(vcpu);
7880 value = vcpu->arch.cr2;
7883 value = kvm_read_cr3(vcpu);
7886 value = kvm_read_cr4(vcpu);
7889 value = kvm_get_cr8(vcpu);
7892 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7899 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7901 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7906 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7909 vcpu->arch.cr2 = val;
7912 res = kvm_set_cr3(vcpu, val);
7915 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7918 res = kvm_set_cr8(vcpu, val);
7921 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7928 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7930 return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7933 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7935 static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7938 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7940 static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7943 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7945 static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7948 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7950 static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7953 static unsigned long emulator_get_cached_segment_base(
7954 struct x86_emulate_ctxt *ctxt, int seg)
7956 return get_segment_base(emul_to_vcpu(ctxt), seg);
7959 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7960 struct desc_struct *desc, u32 *base3,
7963 struct kvm_segment var;
7965 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7966 *selector = var.selector;
7969 memset(desc, 0, sizeof(*desc));
7977 set_desc_limit(desc, var.limit);
7978 set_desc_base(desc, (unsigned long)var.base);
7979 #ifdef CONFIG_X86_64
7981 *base3 = var.base >> 32;
7983 desc->type = var.type;
7985 desc->dpl = var.dpl;
7986 desc->p = var.present;
7987 desc->avl = var.avl;
7995 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7996 struct desc_struct *desc, u32 base3,
7999 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8000 struct kvm_segment var;
8002 var.selector = selector;
8003 var.base = get_desc_base(desc);
8004 #ifdef CONFIG_X86_64
8005 var.base |= ((u64)base3) << 32;
8007 var.limit = get_desc_limit(desc);
8009 var.limit = (var.limit << 12) | 0xfff;
8010 var.type = desc->type;
8011 var.dpl = desc->dpl;
8016 var.avl = desc->avl;
8017 var.present = desc->p;
8018 var.unusable = !var.present;
8021 kvm_set_segment(vcpu, &var, seg);
8025 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt *ctxt,
8026 u32 msr_index, u64 *pdata)
8028 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8031 r = kvm_get_msr_with_filter(vcpu, msr_index, pdata);
8033 return X86EMUL_UNHANDLEABLE;
8036 if (kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
8037 complete_emulated_rdmsr, r))
8038 return X86EMUL_IO_NEEDED;
8040 trace_kvm_msr_read_ex(msr_index);
8041 return X86EMUL_PROPAGATE_FAULT;
8044 trace_kvm_msr_read(msr_index, *pdata);
8045 return X86EMUL_CONTINUE;
8048 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt *ctxt,
8049 u32 msr_index, u64 data)
8051 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8054 r = kvm_set_msr_with_filter(vcpu, msr_index, data);
8056 return X86EMUL_UNHANDLEABLE;
8059 if (kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
8060 complete_emulated_msr_access, r))
8061 return X86EMUL_IO_NEEDED;
8063 trace_kvm_msr_write_ex(msr_index, data);
8064 return X86EMUL_PROPAGATE_FAULT;
8067 trace_kvm_msr_write(msr_index, data);
8068 return X86EMUL_CONTINUE;
8071 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
8072 u32 msr_index, u64 *pdata)
8074 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
8077 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
8080 if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
8085 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
8086 u32 pmc, u64 *pdata)
8088 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
8091 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
8093 emul_to_vcpu(ctxt)->arch.halt_request = 1;
8096 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
8097 struct x86_instruction_info *info,
8098 enum x86_intercept_stage stage)
8100 return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
8104 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
8105 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
8108 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
8111 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
8113 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
8116 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
8118 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
8121 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
8123 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
8126 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
8128 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
8131 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
8133 return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
8136 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
8138 kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
8141 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
8143 static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
8146 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
8148 return emul_to_vcpu(ctxt)->arch.hflags;
8151 #ifndef CONFIG_KVM_SMM
8152 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt)
8155 return X86EMUL_UNHANDLEABLE;
8159 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
8161 kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
8164 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
8166 return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
8169 static void emulator_vm_bugged(struct x86_emulate_ctxt *ctxt)
8171 struct kvm *kvm = emul_to_vcpu(ctxt)->kvm;
8173 if (!kvm->vm_bugged)
8177 static const struct x86_emulate_ops emulate_ops = {
8178 .vm_bugged = emulator_vm_bugged,
8179 .read_gpr = emulator_read_gpr,
8180 .write_gpr = emulator_write_gpr,
8181 .read_std = emulator_read_std,
8182 .write_std = emulator_write_std,
8183 .fetch = kvm_fetch_guest_virt,
8184 .read_emulated = emulator_read_emulated,
8185 .write_emulated = emulator_write_emulated,
8186 .cmpxchg_emulated = emulator_cmpxchg_emulated,
8187 .invlpg = emulator_invlpg,
8188 .pio_in_emulated = emulator_pio_in_emulated,
8189 .pio_out_emulated = emulator_pio_out_emulated,
8190 .get_segment = emulator_get_segment,
8191 .set_segment = emulator_set_segment,
8192 .get_cached_segment_base = emulator_get_cached_segment_base,
8193 .get_gdt = emulator_get_gdt,
8194 .get_idt = emulator_get_idt,
8195 .set_gdt = emulator_set_gdt,
8196 .set_idt = emulator_set_idt,
8197 .get_cr = emulator_get_cr,
8198 .set_cr = emulator_set_cr,
8199 .cpl = emulator_get_cpl,
8200 .get_dr = emulator_get_dr,
8201 .set_dr = emulator_set_dr,
8202 .set_msr_with_filter = emulator_set_msr_with_filter,
8203 .get_msr_with_filter = emulator_get_msr_with_filter,
8204 .get_msr = emulator_get_msr,
8205 .check_pmc = emulator_check_pmc,
8206 .read_pmc = emulator_read_pmc,
8207 .halt = emulator_halt,
8208 .wbinvd = emulator_wbinvd,
8209 .fix_hypercall = emulator_fix_hypercall,
8210 .intercept = emulator_intercept,
8211 .get_cpuid = emulator_get_cpuid,
8212 .guest_has_long_mode = emulator_guest_has_long_mode,
8213 .guest_has_movbe = emulator_guest_has_movbe,
8214 .guest_has_fxsr = emulator_guest_has_fxsr,
8215 .guest_has_rdpid = emulator_guest_has_rdpid,
8216 .set_nmi_mask = emulator_set_nmi_mask,
8217 .get_hflags = emulator_get_hflags,
8218 .leave_smm = emulator_leave_smm,
8219 .triple_fault = emulator_triple_fault,
8220 .set_xcr = emulator_set_xcr,
8223 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
8225 u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
8227 * an sti; sti; sequence only disable interrupts for the first
8228 * instruction. So, if the last instruction, be it emulated or
8229 * not, left the system with the INT_STI flag enabled, it
8230 * means that the last instruction is an sti. We should not
8231 * leave the flag on in this case. The same goes for mov ss
8233 if (int_shadow & mask)
8235 if (unlikely(int_shadow || mask)) {
8236 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
8238 kvm_make_request(KVM_REQ_EVENT, vcpu);
8242 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
8244 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8246 if (ctxt->exception.vector == PF_VECTOR)
8247 kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
8248 else if (ctxt->exception.error_code_valid)
8249 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
8250 ctxt->exception.error_code);
8252 kvm_queue_exception(vcpu, ctxt->exception.vector);
8255 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
8257 struct x86_emulate_ctxt *ctxt;
8259 ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
8261 pr_err("failed to allocate vcpu's emulator\n");
8266 ctxt->ops = &emulate_ops;
8267 vcpu->arch.emulate_ctxt = ctxt;
8272 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
8274 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8277 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
8279 ctxt->gpa_available = false;
8280 ctxt->eflags = kvm_get_rflags(vcpu);
8281 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
8283 ctxt->eip = kvm_rip_read(vcpu);
8284 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
8285 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
8286 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
8287 cs_db ? X86EMUL_MODE_PROT32 :
8288 X86EMUL_MODE_PROT16;
8289 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
8291 ctxt->interruptibility = 0;
8292 ctxt->have_exception = false;
8293 ctxt->exception.vector = -1;
8294 ctxt->perm_ok = false;
8296 init_decode_cache(ctxt);
8297 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8300 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
8302 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8305 init_emulate_ctxt(vcpu);
8309 ctxt->_eip = ctxt->eip + inc_eip;
8310 ret = emulate_int_real(ctxt, irq);
8312 if (ret != X86EMUL_CONTINUE) {
8313 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
8315 ctxt->eip = ctxt->_eip;
8316 kvm_rip_write(vcpu, ctxt->eip);
8317 kvm_set_rflags(vcpu, ctxt->eflags);
8320 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
8322 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8323 u8 ndata, u8 *insn_bytes, u8 insn_size)
8325 struct kvm_run *run = vcpu->run;
8330 * Zero the whole array used to retrieve the exit info, as casting to
8331 * u32 for select entries will leave some chunks uninitialized.
8333 memset(&info, 0, sizeof(info));
8335 static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
8336 &info[2], (u32 *)&info[3],
8339 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8340 run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
8343 * There's currently space for 13 entries, but 5 are used for the exit
8344 * reason and info. Restrict to 4 to reduce the maintenance burden
8345 * when expanding kvm_run.emulation_failure in the future.
8347 if (WARN_ON_ONCE(ndata > 4))
8350 /* Always include the flags as a 'data' entry. */
8352 run->emulation_failure.flags = 0;
8355 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
8356 sizeof(run->emulation_failure.insn_bytes) != 16));
8358 run->emulation_failure.flags |=
8359 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
8360 run->emulation_failure.insn_size = insn_size;
8361 memset(run->emulation_failure.insn_bytes, 0x90,
8362 sizeof(run->emulation_failure.insn_bytes));
8363 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
8366 memcpy(&run->internal.data[info_start], info, sizeof(info));
8367 memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
8368 ndata * sizeof(data[0]));
8370 run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
8373 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
8375 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8377 prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
8378 ctxt->fetch.end - ctxt->fetch.data);
8381 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8384 prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
8386 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
8388 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
8390 __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
8392 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
8394 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
8396 struct kvm *kvm = vcpu->kvm;
8398 ++vcpu->stat.insn_emulation_fail;
8399 trace_kvm_emulate_insn_failed(vcpu);
8401 if (emulation_type & EMULTYPE_VMWARE_GP) {
8402 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8406 if (kvm->arch.exit_on_emulation_error ||
8407 (emulation_type & EMULTYPE_SKIP)) {
8408 prepare_emulation_ctxt_failure_exit(vcpu);
8412 kvm_queue_exception(vcpu, UD_VECTOR);
8414 if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
8415 prepare_emulation_ctxt_failure_exit(vcpu);
8422 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8423 bool write_fault_to_shadow_pgtable,
8426 gpa_t gpa = cr2_or_gpa;
8429 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8432 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8433 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8436 if (!vcpu->arch.mmu->root_role.direct) {
8438 * Write permission should be allowed since only
8439 * write access need to be emulated.
8441 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8444 * If the mapping is invalid in guest, let cpu retry
8445 * it to generate fault.
8447 if (gpa == INVALID_GPA)
8452 * Do not retry the unhandleable instruction if it faults on the
8453 * readonly host memory, otherwise it will goto a infinite loop:
8454 * retry instruction -> write #PF -> emulation fail -> retry
8455 * instruction -> ...
8457 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
8460 * If the instruction failed on the error pfn, it can not be fixed,
8461 * report the error to userspace.
8463 if (is_error_noslot_pfn(pfn))
8466 kvm_release_pfn_clean(pfn);
8468 /* The instructions are well-emulated on direct mmu. */
8469 if (vcpu->arch.mmu->root_role.direct) {
8470 unsigned int indirect_shadow_pages;
8472 write_lock(&vcpu->kvm->mmu_lock);
8473 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8474 write_unlock(&vcpu->kvm->mmu_lock);
8476 if (indirect_shadow_pages)
8477 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8483 * if emulation was due to access to shadowed page table
8484 * and it failed try to unshadow page and re-enter the
8485 * guest to let CPU execute the instruction.
8487 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8490 * If the access faults on its page table, it can not
8491 * be fixed by unprotecting shadow page and it should
8492 * be reported to userspace.
8494 return !write_fault_to_shadow_pgtable;
8497 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8498 gpa_t cr2_or_gpa, int emulation_type)
8500 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8501 unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8503 last_retry_eip = vcpu->arch.last_retry_eip;
8504 last_retry_addr = vcpu->arch.last_retry_addr;
8507 * If the emulation is caused by #PF and it is non-page_table
8508 * writing instruction, it means the VM-EXIT is caused by shadow
8509 * page protected, we can zap the shadow page and retry this
8510 * instruction directly.
8512 * Note: if the guest uses a non-page-table modifying instruction
8513 * on the PDE that points to the instruction, then we will unmap
8514 * the instruction and go to an infinite loop. So, we cache the
8515 * last retried eip and the last fault address, if we meet the eip
8516 * and the address again, we can break out of the potential infinite
8519 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8521 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8524 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8525 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8528 if (x86_page_table_writing_insn(ctxt))
8531 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8534 vcpu->arch.last_retry_eip = ctxt->eip;
8535 vcpu->arch.last_retry_addr = cr2_or_gpa;
8537 if (!vcpu->arch.mmu->root_role.direct)
8538 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8540 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8545 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8546 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8548 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8557 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8558 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8563 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8565 struct kvm_run *kvm_run = vcpu->run;
8567 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8568 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8569 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8570 kvm_run->debug.arch.exception = DB_VECTOR;
8571 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8574 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8578 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8580 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8583 r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8587 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8590 * rflags is the old, "raw" value of the flags. The new value has
8591 * not been saved yet.
8593 * This is correct even for TF set by the guest, because "the
8594 * processor will not generate this exception after the instruction
8595 * that sets the TF flag".
8597 if (unlikely(rflags & X86_EFLAGS_TF))
8598 r = kvm_vcpu_do_singlestep(vcpu);
8601 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8603 static bool kvm_is_code_breakpoint_inhibited(struct kvm_vcpu *vcpu)
8607 if (kvm_get_rflags(vcpu) & X86_EFLAGS_RF)
8611 * Intel CPUs inhibit code #DBs when MOV/POP SS blocking is active,
8612 * but AMD CPUs do not. MOV/POP SS blocking is rare, check that first
8613 * to avoid the relatively expensive CPUID lookup.
8615 shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
8616 return (shadow & KVM_X86_SHADOW_INT_MOV_SS) &&
8617 guest_cpuid_is_intel(vcpu);
8620 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu,
8621 int emulation_type, int *r)
8623 WARN_ON_ONCE(emulation_type & EMULTYPE_NO_DECODE);
8626 * Do not check for code breakpoints if hardware has already done the
8627 * checks, as inferred from the emulation type. On NO_DECODE and SKIP,
8628 * the instruction has passed all exception checks, and all intercepted
8629 * exceptions that trigger emulation have lower priority than code
8630 * breakpoints, i.e. the fact that the intercepted exception occurred
8631 * means any code breakpoints have already been serviced.
8633 * Note, KVM needs to check for code #DBs on EMULTYPE_TRAP_UD_FORCED as
8634 * hardware has checked the RIP of the magic prefix, but not the RIP of
8635 * the instruction being emulated. The intent of forced emulation is
8636 * to behave as if KVM intercepted the instruction without an exception
8637 * and without a prefix.
8639 if (emulation_type & (EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
8640 EMULTYPE_TRAP_UD | EMULTYPE_VMWARE_GP | EMULTYPE_PF))
8643 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8644 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8645 struct kvm_run *kvm_run = vcpu->run;
8646 unsigned long eip = kvm_get_linear_rip(vcpu);
8647 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8648 vcpu->arch.guest_debug_dr7,
8652 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8653 kvm_run->debug.arch.pc = eip;
8654 kvm_run->debug.arch.exception = DB_VECTOR;
8655 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8661 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8662 !kvm_is_code_breakpoint_inhibited(vcpu)) {
8663 unsigned long eip = kvm_get_linear_rip(vcpu);
8664 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8669 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8678 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8680 switch (ctxt->opcode_len) {
8687 case 0xe6: /* OUT */
8691 case 0x6c: /* INS */
8693 case 0x6e: /* OUTS */
8700 case 0x33: /* RDPMC */
8710 * Decode an instruction for emulation. The caller is responsible for handling
8711 * code breakpoints. Note, manually detecting code breakpoints is unnecessary
8712 * (and wrong) when emulating on an intercepted fault-like exception[*], as
8713 * code breakpoints have higher priority and thus have already been done by
8716 * [*] Except #MC, which is higher priority, but KVM should never emulate in
8717 * response to a machine check.
8719 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8720 void *insn, int insn_len)
8722 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8725 init_emulate_ctxt(vcpu);
8727 r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8729 trace_kvm_emulate_insn_start(vcpu);
8730 ++vcpu->stat.insn_emulation;
8734 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8736 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8737 int emulation_type, void *insn, int insn_len)
8740 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8741 bool writeback = true;
8742 bool write_fault_to_spt;
8744 if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8747 vcpu->arch.l1tf_flush_l1d = true;
8750 * Clear write_fault_to_shadow_pgtable here to ensure it is
8753 write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8754 vcpu->arch.write_fault_to_shadow_pgtable = false;
8756 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8757 kvm_clear_exception_queue(vcpu);
8760 * Return immediately if RIP hits a code breakpoint, such #DBs
8761 * are fault-like and are higher priority than any faults on
8762 * the code fetch itself.
8764 if (kvm_vcpu_check_code_breakpoint(vcpu, emulation_type, &r))
8767 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8769 if (r != EMULATION_OK) {
8770 if ((emulation_type & EMULTYPE_TRAP_UD) ||
8771 (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8772 kvm_queue_exception(vcpu, UD_VECTOR);
8775 if (reexecute_instruction(vcpu, cr2_or_gpa,
8780 if (ctxt->have_exception &&
8781 !(emulation_type & EMULTYPE_SKIP)) {
8783 * #UD should result in just EMULATION_FAILED, and trap-like
8784 * exception should not be encountered during decode.
8786 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8787 exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8788 inject_emulated_exception(vcpu);
8791 return handle_emulation_failure(vcpu, emulation_type);
8795 if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8796 !is_vmware_backdoor_opcode(ctxt)) {
8797 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8802 * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8803 * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8804 * The caller is responsible for updating interruptibility state and
8805 * injecting single-step #DBs.
8807 if (emulation_type & EMULTYPE_SKIP) {
8808 if (ctxt->mode != X86EMUL_MODE_PROT64)
8809 ctxt->eip = (u32)ctxt->_eip;
8811 ctxt->eip = ctxt->_eip;
8813 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8818 kvm_rip_write(vcpu, ctxt->eip);
8819 if (ctxt->eflags & X86_EFLAGS_RF)
8820 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8824 if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8827 /* this is needed for vmware backdoor interface to work since it
8828 changes registers values during IO operation */
8829 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8830 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8831 emulator_invalidate_register_cache(ctxt);
8835 if (emulation_type & EMULTYPE_PF) {
8836 /* Save the faulting GPA (cr2) in the address field */
8837 ctxt->exception.address = cr2_or_gpa;
8839 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8840 if (vcpu->arch.mmu->root_role.direct) {
8841 ctxt->gpa_available = true;
8842 ctxt->gpa_val = cr2_or_gpa;
8845 /* Sanitize the address out of an abundance of paranoia. */
8846 ctxt->exception.address = 0;
8849 r = x86_emulate_insn(ctxt);
8851 if (r == EMULATION_INTERCEPTED)
8854 if (r == EMULATION_FAILED) {
8855 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8859 return handle_emulation_failure(vcpu, emulation_type);
8862 if (ctxt->have_exception) {
8864 inject_emulated_exception(vcpu);
8865 } else if (vcpu->arch.pio.count) {
8866 if (!vcpu->arch.pio.in) {
8867 /* FIXME: return into emulator if single-stepping. */
8868 vcpu->arch.pio.count = 0;
8871 vcpu->arch.complete_userspace_io = complete_emulated_pio;
8874 } else if (vcpu->mmio_needed) {
8875 ++vcpu->stat.mmio_exits;
8877 if (!vcpu->mmio_is_write)
8880 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8881 } else if (vcpu->arch.complete_userspace_io) {
8884 } else if (r == EMULATION_RESTART)
8891 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8892 toggle_interruptibility(vcpu, ctxt->interruptibility);
8893 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8896 * Note, EXCPT_DB is assumed to be fault-like as the emulator
8897 * only supports code breakpoints and general detect #DB, both
8898 * of which are fault-like.
8900 if (!ctxt->have_exception ||
8901 exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8902 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8903 if (ctxt->is_branch)
8904 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8905 kvm_rip_write(vcpu, ctxt->eip);
8906 if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8907 r = kvm_vcpu_do_singlestep(vcpu);
8908 static_call_cond(kvm_x86_update_emulated_instruction)(vcpu);
8909 __kvm_set_rflags(vcpu, ctxt->eflags);
8913 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8914 * do nothing, and it will be requested again as soon as
8915 * the shadow expires. But we still need to check here,
8916 * because POPF has no interrupt shadow.
8918 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8919 kvm_make_request(KVM_REQ_EVENT, vcpu);
8921 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8926 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8928 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8930 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8932 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8933 void *insn, int insn_len)
8935 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8937 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8939 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8941 vcpu->arch.pio.count = 0;
8945 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8947 vcpu->arch.pio.count = 0;
8949 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8952 return kvm_skip_emulated_instruction(vcpu);
8955 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8956 unsigned short port)
8958 unsigned long val = kvm_rax_read(vcpu);
8959 int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8965 * Workaround userspace that relies on old KVM behavior of %rip being
8966 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8969 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8970 vcpu->arch.complete_userspace_io =
8971 complete_fast_pio_out_port_0x7e;
8972 kvm_skip_emulated_instruction(vcpu);
8974 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8975 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8980 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8984 /* We should only ever be called with arch.pio.count equal to 1 */
8985 BUG_ON(vcpu->arch.pio.count != 1);
8987 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8988 vcpu->arch.pio.count = 0;
8992 /* For size less than 4 we merge, else we zero extend */
8993 val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8995 complete_emulator_pio_in(vcpu, &val);
8996 kvm_rax_write(vcpu, val);
8998 return kvm_skip_emulated_instruction(vcpu);
9001 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
9002 unsigned short port)
9007 /* For size less than 4 we merge, else we zero extend */
9008 val = (size < 4) ? kvm_rax_read(vcpu) : 0;
9010 ret = emulator_pio_in(vcpu, size, port, &val, 1);
9012 kvm_rax_write(vcpu, val);
9016 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
9017 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
9022 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
9027 ret = kvm_fast_pio_in(vcpu, size, port);
9029 ret = kvm_fast_pio_out(vcpu, size, port);
9030 return ret && kvm_skip_emulated_instruction(vcpu);
9032 EXPORT_SYMBOL_GPL(kvm_fast_pio);
9034 static int kvmclock_cpu_down_prep(unsigned int cpu)
9036 __this_cpu_write(cpu_tsc_khz, 0);
9040 static void tsc_khz_changed(void *data)
9042 struct cpufreq_freqs *freq = data;
9043 unsigned long khz = 0;
9045 WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_CONSTANT_TSC));
9050 khz = cpufreq_quick_get(raw_smp_processor_id());
9053 __this_cpu_write(cpu_tsc_khz, khz);
9056 #ifdef CONFIG_X86_64
9057 static void kvm_hyperv_tsc_notifier(void)
9062 mutex_lock(&kvm_lock);
9063 list_for_each_entry(kvm, &vm_list, vm_list)
9064 kvm_make_mclock_inprogress_request(kvm);
9066 /* no guest entries from this point */
9067 hyperv_stop_tsc_emulation();
9069 /* TSC frequency always matches when on Hyper-V */
9070 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
9071 for_each_present_cpu(cpu)
9072 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
9074 kvm_caps.max_guest_tsc_khz = tsc_khz;
9076 list_for_each_entry(kvm, &vm_list, vm_list) {
9077 __kvm_start_pvclock_update(kvm);
9078 pvclock_update_vm_gtod_copy(kvm);
9079 kvm_end_pvclock_update(kvm);
9082 mutex_unlock(&kvm_lock);
9086 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
9089 struct kvm_vcpu *vcpu;
9094 * We allow guests to temporarily run on slowing clocks,
9095 * provided we notify them after, or to run on accelerating
9096 * clocks, provided we notify them before. Thus time never
9099 * However, we have a problem. We can't atomically update
9100 * the frequency of a given CPU from this function; it is
9101 * merely a notifier, which can be called from any CPU.
9102 * Changing the TSC frequency at arbitrary points in time
9103 * requires a recomputation of local variables related to
9104 * the TSC for each VCPU. We must flag these local variables
9105 * to be updated and be sure the update takes place with the
9106 * new frequency before any guests proceed.
9108 * Unfortunately, the combination of hotplug CPU and frequency
9109 * change creates an intractable locking scenario; the order
9110 * of when these callouts happen is undefined with respect to
9111 * CPU hotplug, and they can race with each other. As such,
9112 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
9113 * undefined; you can actually have a CPU frequency change take
9114 * place in between the computation of X and the setting of the
9115 * variable. To protect against this problem, all updates of
9116 * the per_cpu tsc_khz variable are done in an interrupt
9117 * protected IPI, and all callers wishing to update the value
9118 * must wait for a synchronous IPI to complete (which is trivial
9119 * if the caller is on the CPU already). This establishes the
9120 * necessary total order on variable updates.
9122 * Note that because a guest time update may take place
9123 * anytime after the setting of the VCPU's request bit, the
9124 * correct TSC value must be set before the request. However,
9125 * to ensure the update actually makes it to any guest which
9126 * starts running in hardware virtualization between the set
9127 * and the acquisition of the spinlock, we must also ping the
9128 * CPU after setting the request bit.
9132 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
9134 mutex_lock(&kvm_lock);
9135 list_for_each_entry(kvm, &vm_list, vm_list) {
9136 kvm_for_each_vcpu(i, vcpu, kvm) {
9137 if (vcpu->cpu != cpu)
9139 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9140 if (vcpu->cpu != raw_smp_processor_id())
9144 mutex_unlock(&kvm_lock);
9146 if (freq->old < freq->new && send_ipi) {
9148 * We upscale the frequency. Must make the guest
9149 * doesn't see old kvmclock values while running with
9150 * the new frequency, otherwise we risk the guest sees
9151 * time go backwards.
9153 * In case we update the frequency for another cpu
9154 * (which might be in guest context) send an interrupt
9155 * to kick the cpu out of guest context. Next time
9156 * guest context is entered kvmclock will be updated,
9157 * so the guest will not see stale values.
9159 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
9163 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
9166 struct cpufreq_freqs *freq = data;
9169 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
9171 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
9174 for_each_cpu(cpu, freq->policy->cpus)
9175 __kvmclock_cpufreq_notifier(freq, cpu);
9180 static struct notifier_block kvmclock_cpufreq_notifier_block = {
9181 .notifier_call = kvmclock_cpufreq_notifier
9184 static int kvmclock_cpu_online(unsigned int cpu)
9186 tsc_khz_changed(NULL);
9190 static void kvm_timer_init(void)
9192 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
9193 max_tsc_khz = tsc_khz;
9195 if (IS_ENABLED(CONFIG_CPU_FREQ)) {
9196 struct cpufreq_policy *policy;
9200 policy = cpufreq_cpu_get(cpu);
9202 if (policy->cpuinfo.max_freq)
9203 max_tsc_khz = policy->cpuinfo.max_freq;
9204 cpufreq_cpu_put(policy);
9208 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
9209 CPUFREQ_TRANSITION_NOTIFIER);
9211 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
9212 kvmclock_cpu_online, kvmclock_cpu_down_prep);
9216 #ifdef CONFIG_X86_64
9217 static void pvclock_gtod_update_fn(struct work_struct *work)
9220 struct kvm_vcpu *vcpu;
9223 mutex_lock(&kvm_lock);
9224 list_for_each_entry(kvm, &vm_list, vm_list)
9225 kvm_for_each_vcpu(i, vcpu, kvm)
9226 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9227 atomic_set(&kvm_guest_has_master_clock, 0);
9228 mutex_unlock(&kvm_lock);
9231 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
9234 * Indirection to move queue_work() out of the tk_core.seq write held
9235 * region to prevent possible deadlocks against time accessors which
9236 * are invoked with work related locks held.
9238 static void pvclock_irq_work_fn(struct irq_work *w)
9240 queue_work(system_long_wq, &pvclock_gtod_work);
9243 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
9246 * Notification about pvclock gtod data update.
9248 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
9251 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
9252 struct timekeeper *tk = priv;
9254 update_pvclock_gtod(tk);
9257 * Disable master clock if host does not trust, or does not use,
9258 * TSC based clocksource. Delegate queue_work() to irq_work as
9259 * this is invoked with tk_core.seq write held.
9261 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
9262 atomic_read(&kvm_guest_has_master_clock) != 0)
9263 irq_work_queue(&pvclock_irq_work);
9267 static struct notifier_block pvclock_gtod_notifier = {
9268 .notifier_call = pvclock_gtod_notify,
9272 static inline void kvm_ops_update(struct kvm_x86_init_ops *ops)
9274 memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
9276 #define __KVM_X86_OP(func) \
9277 static_call_update(kvm_x86_##func, kvm_x86_ops.func);
9278 #define KVM_X86_OP(func) \
9279 WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
9280 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
9281 #define KVM_X86_OP_OPTIONAL_RET0(func) \
9282 static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
9283 (void *)__static_call_return0);
9284 #include <asm/kvm-x86-ops.h>
9287 kvm_pmu_ops_update(ops->pmu_ops);
9290 static int kvm_x86_check_processor_compatibility(void)
9292 int cpu = smp_processor_id();
9293 struct cpuinfo_x86 *c = &cpu_data(cpu);
9296 * Compatibility checks are done when loading KVM and when enabling
9297 * hardware, e.g. during CPU hotplug, to ensure all online CPUs are
9298 * compatible, i.e. KVM should never perform a compatibility check on
9301 WARN_ON(!cpu_online(cpu));
9303 if (__cr4_reserved_bits(cpu_has, c) !=
9304 __cr4_reserved_bits(cpu_has, &boot_cpu_data))
9307 return static_call(kvm_x86_check_processor_compatibility)();
9310 static void kvm_x86_check_cpu_compat(void *ret)
9312 *(int *)ret = kvm_x86_check_processor_compatibility();
9315 static int __kvm_x86_vendor_init(struct kvm_x86_init_ops *ops)
9320 if (kvm_x86_ops.hardware_enable) {
9321 pr_err("already loaded vendor module '%s'\n", kvm_x86_ops.name);
9326 * KVM explicitly assumes that the guest has an FPU and
9327 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
9328 * vCPU's FPU state as a fxregs_state struct.
9330 if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
9331 pr_err("inadequate fpu\n");
9335 if (IS_ENABLED(CONFIG_PREEMPT_RT) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
9336 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
9341 * KVM assumes that PAT entry '0' encodes WB memtype and simply zeroes
9342 * the PAT bits in SPTEs. Bail if PAT[0] is programmed to something
9343 * other than WB. Note, EPT doesn't utilize the PAT, but don't bother
9344 * with an exception. PAT[0] is set to WB on RESET and also by the
9345 * kernel, i.e. failure indicates a kernel bug or broken firmware.
9347 if (rdmsrl_safe(MSR_IA32_CR_PAT, &host_pat) ||
9348 (host_pat & GENMASK(2, 0)) != 6) {
9349 pr_err("host PAT[0] is not WB\n");
9353 x86_emulator_cache = kvm_alloc_emulator_cache();
9354 if (!x86_emulator_cache) {
9355 pr_err("failed to allocate cache for x86 emulator\n");
9359 user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
9360 if (!user_return_msrs) {
9361 pr_err("failed to allocate percpu kvm_user_return_msrs\n");
9363 goto out_free_x86_emulator_cache;
9365 kvm_nr_uret_msrs = 0;
9367 r = kvm_mmu_vendor_module_init();
9369 goto out_free_percpu;
9371 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
9372 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
9373 kvm_caps.supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
9376 rdmsrl_safe(MSR_EFER, &host_efer);
9378 if (boot_cpu_has(X86_FEATURE_XSAVES))
9379 rdmsrl(MSR_IA32_XSS, host_xss);
9381 kvm_init_pmu_capability(ops->pmu_ops);
9383 r = ops->hardware_setup();
9387 kvm_ops_update(ops);
9389 for_each_online_cpu(cpu) {
9390 smp_call_function_single(cpu, kvm_x86_check_cpu_compat, &r, 1);
9392 goto out_unwind_ops;
9396 * Point of no return! DO NOT add error paths below this point unless
9397 * absolutely necessary, as most operations from this point forward
9398 * require unwinding.
9402 if (pi_inject_timer == -1)
9403 pi_inject_timer = housekeeping_enabled(HK_TYPE_TIMER);
9404 #ifdef CONFIG_X86_64
9405 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
9407 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9408 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
9411 kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
9413 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
9414 kvm_caps.supported_xss = 0;
9416 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
9417 cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
9418 #undef __kvm_cpu_cap_has
9420 if (kvm_caps.has_tsc_control) {
9422 * Make sure the user can only configure tsc_khz values that
9423 * fit into a signed integer.
9424 * A min value is not calculated because it will always
9425 * be 1 on all machines.
9427 u64 max = min(0x7fffffffULL,
9428 __scale_tsc(kvm_caps.max_tsc_scaling_ratio, tsc_khz));
9429 kvm_caps.max_guest_tsc_khz = max;
9431 kvm_caps.default_tsc_scaling_ratio = 1ULL << kvm_caps.tsc_scaling_ratio_frac_bits;
9432 kvm_init_msr_list();
9436 kvm_x86_ops.hardware_enable = NULL;
9437 static_call(kvm_x86_hardware_unsetup)();
9439 kvm_mmu_vendor_module_exit();
9441 free_percpu(user_return_msrs);
9442 out_free_x86_emulator_cache:
9443 kmem_cache_destroy(x86_emulator_cache);
9447 int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops)
9451 mutex_lock(&vendor_module_lock);
9452 r = __kvm_x86_vendor_init(ops);
9453 mutex_unlock(&vendor_module_lock);
9457 EXPORT_SYMBOL_GPL(kvm_x86_vendor_init);
9459 void kvm_x86_vendor_exit(void)
9461 kvm_unregister_perf_callbacks();
9463 #ifdef CONFIG_X86_64
9464 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9465 clear_hv_tscchange_cb();
9469 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
9470 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
9471 CPUFREQ_TRANSITION_NOTIFIER);
9472 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
9474 #ifdef CONFIG_X86_64
9475 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
9476 irq_work_sync(&pvclock_irq_work);
9477 cancel_work_sync(&pvclock_gtod_work);
9479 static_call(kvm_x86_hardware_unsetup)();
9480 kvm_mmu_vendor_module_exit();
9481 free_percpu(user_return_msrs);
9482 kmem_cache_destroy(x86_emulator_cache);
9483 #ifdef CONFIG_KVM_XEN
9484 static_key_deferred_flush(&kvm_xen_enabled);
9485 WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
9487 mutex_lock(&vendor_module_lock);
9488 kvm_x86_ops.hardware_enable = NULL;
9489 mutex_unlock(&vendor_module_lock);
9491 EXPORT_SYMBOL_GPL(kvm_x86_vendor_exit);
9493 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
9496 * The vCPU has halted, e.g. executed HLT. Update the run state if the
9497 * local APIC is in-kernel, the run loop will detect the non-runnable
9498 * state and halt the vCPU. Exit to userspace if the local APIC is
9499 * managed by userspace, in which case userspace is responsible for
9500 * handling wake events.
9502 ++vcpu->stat.halt_exits;
9503 if (lapic_in_kernel(vcpu)) {
9504 vcpu->arch.mp_state = state;
9507 vcpu->run->exit_reason = reason;
9512 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
9514 return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
9516 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
9518 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
9520 int ret = kvm_skip_emulated_instruction(vcpu);
9522 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9523 * KVM_EXIT_DEBUG here.
9525 return kvm_emulate_halt_noskip(vcpu) && ret;
9527 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
9529 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
9531 int ret = kvm_skip_emulated_instruction(vcpu);
9533 return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
9534 KVM_EXIT_AP_RESET_HOLD) && ret;
9536 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
9538 #ifdef CONFIG_X86_64
9539 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
9540 unsigned long clock_type)
9542 struct kvm_clock_pairing clock_pairing;
9543 struct timespec64 ts;
9547 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
9548 return -KVM_EOPNOTSUPP;
9551 * When tsc is in permanent catchup mode guests won't be able to use
9552 * pvclock_read_retry loop to get consistent view of pvclock
9554 if (vcpu->arch.tsc_always_catchup)
9555 return -KVM_EOPNOTSUPP;
9557 if (!kvm_get_walltime_and_clockread(&ts, &cycle))
9558 return -KVM_EOPNOTSUPP;
9560 clock_pairing.sec = ts.tv_sec;
9561 clock_pairing.nsec = ts.tv_nsec;
9562 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
9563 clock_pairing.flags = 0;
9564 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
9567 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
9568 sizeof(struct kvm_clock_pairing)))
9576 * kvm_pv_kick_cpu_op: Kick a vcpu.
9578 * @apicid - apicid of vcpu to be kicked.
9580 static void kvm_pv_kick_cpu_op(struct kvm *kvm, int apicid)
9583 * All other fields are unused for APIC_DM_REMRD, but may be consumed by
9584 * common code, e.g. for tracing. Defer initialization to the compiler.
9586 struct kvm_lapic_irq lapic_irq = {
9587 .delivery_mode = APIC_DM_REMRD,
9588 .dest_mode = APIC_DEST_PHYSICAL,
9589 .shorthand = APIC_DEST_NOSHORT,
9593 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
9596 bool kvm_apicv_activated(struct kvm *kvm)
9598 return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
9600 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
9602 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu)
9604 ulong vm_reasons = READ_ONCE(vcpu->kvm->arch.apicv_inhibit_reasons);
9605 ulong vcpu_reasons = static_call(kvm_x86_vcpu_get_apicv_inhibit_reasons)(vcpu);
9607 return (vm_reasons | vcpu_reasons) == 0;
9609 EXPORT_SYMBOL_GPL(kvm_vcpu_apicv_activated);
9611 static void set_or_clear_apicv_inhibit(unsigned long *inhibits,
9612 enum kvm_apicv_inhibit reason, bool set)
9615 __set_bit(reason, inhibits);
9617 __clear_bit(reason, inhibits);
9619 trace_kvm_apicv_inhibit_changed(reason, set, *inhibits);
9622 static void kvm_apicv_init(struct kvm *kvm)
9624 unsigned long *inhibits = &kvm->arch.apicv_inhibit_reasons;
9626 init_rwsem(&kvm->arch.apicv_update_lock);
9628 set_or_clear_apicv_inhibit(inhibits, APICV_INHIBIT_REASON_ABSENT, true);
9631 set_or_clear_apicv_inhibit(inhibits,
9632 APICV_INHIBIT_REASON_DISABLE, true);
9635 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
9637 struct kvm_vcpu *target = NULL;
9638 struct kvm_apic_map *map;
9640 vcpu->stat.directed_yield_attempted++;
9642 if (single_task_running())
9646 map = rcu_dereference(vcpu->kvm->arch.apic_map);
9648 if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9649 target = map->phys_map[dest_id]->vcpu;
9653 if (!target || !READ_ONCE(target->ready))
9656 /* Ignore requests to yield to self */
9660 if (kvm_vcpu_yield_to(target) <= 0)
9663 vcpu->stat.directed_yield_successful++;
9669 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9671 u64 ret = vcpu->run->hypercall.ret;
9673 if (!is_64_bit_mode(vcpu))
9675 kvm_rax_write(vcpu, ret);
9676 ++vcpu->stat.hypercalls;
9677 return kvm_skip_emulated_instruction(vcpu);
9680 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9682 unsigned long nr, a0, a1, a2, a3, ret;
9685 if (kvm_xen_hypercall_enabled(vcpu->kvm))
9686 return kvm_xen_hypercall(vcpu);
9688 if (kvm_hv_hypercall_enabled(vcpu))
9689 return kvm_hv_hypercall(vcpu);
9691 nr = kvm_rax_read(vcpu);
9692 a0 = kvm_rbx_read(vcpu);
9693 a1 = kvm_rcx_read(vcpu);
9694 a2 = kvm_rdx_read(vcpu);
9695 a3 = kvm_rsi_read(vcpu);
9697 trace_kvm_hypercall(nr, a0, a1, a2, a3);
9699 op_64_bit = is_64_bit_hypercall(vcpu);
9708 if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9716 case KVM_HC_VAPIC_POLL_IRQ:
9719 case KVM_HC_KICK_CPU:
9720 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9723 kvm_pv_kick_cpu_op(vcpu->kvm, a1);
9724 kvm_sched_yield(vcpu, a1);
9727 #ifdef CONFIG_X86_64
9728 case KVM_HC_CLOCK_PAIRING:
9729 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9732 case KVM_HC_SEND_IPI:
9733 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9736 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9738 case KVM_HC_SCHED_YIELD:
9739 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9742 kvm_sched_yield(vcpu, a0);
9745 case KVM_HC_MAP_GPA_RANGE: {
9746 u64 gpa = a0, npages = a1, attrs = a2;
9749 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9752 if (!PAGE_ALIGNED(gpa) || !npages ||
9753 gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9758 vcpu->run->exit_reason = KVM_EXIT_HYPERCALL;
9759 vcpu->run->hypercall.nr = KVM_HC_MAP_GPA_RANGE;
9760 vcpu->run->hypercall.args[0] = gpa;
9761 vcpu->run->hypercall.args[1] = npages;
9762 vcpu->run->hypercall.args[2] = attrs;
9763 vcpu->run->hypercall.longmode = op_64_bit;
9764 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9774 kvm_rax_write(vcpu, ret);
9776 ++vcpu->stat.hypercalls;
9777 return kvm_skip_emulated_instruction(vcpu);
9779 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9781 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9783 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9784 char instruction[3];
9785 unsigned long rip = kvm_rip_read(vcpu);
9788 * If the quirk is disabled, synthesize a #UD and let the guest pick up
9791 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_FIX_HYPERCALL_INSN)) {
9792 ctxt->exception.error_code_valid = false;
9793 ctxt->exception.vector = UD_VECTOR;
9794 ctxt->have_exception = true;
9795 return X86EMUL_PROPAGATE_FAULT;
9798 static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9800 return emulator_write_emulated(ctxt, rip, instruction, 3,
9804 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9806 return vcpu->run->request_interrupt_window &&
9807 likely(!pic_in_kernel(vcpu->kvm));
9810 /* Called within kvm->srcu read side. */
9811 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9813 struct kvm_run *kvm_run = vcpu->run;
9815 kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9816 kvm_run->cr8 = kvm_get_cr8(vcpu);
9817 kvm_run->apic_base = kvm_get_apic_base(vcpu);
9819 kvm_run->ready_for_interrupt_injection =
9820 pic_in_kernel(vcpu->kvm) ||
9821 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9824 kvm_run->flags |= KVM_RUN_X86_SMM;
9827 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9831 if (!kvm_x86_ops.update_cr8_intercept)
9834 if (!lapic_in_kernel(vcpu))
9837 if (vcpu->arch.apic->apicv_active)
9840 if (!vcpu->arch.apic->vapic_addr)
9841 max_irr = kvm_lapic_find_highest_irr(vcpu);
9848 tpr = kvm_lapic_get_cr8(vcpu);
9850 static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9854 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9856 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9857 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9861 return kvm_x86_ops.nested_ops->check_events(vcpu);
9864 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9866 trace_kvm_inj_exception(vcpu->arch.exception.vector,
9867 vcpu->arch.exception.has_error_code,
9868 vcpu->arch.exception.error_code,
9869 vcpu->arch.exception.injected);
9871 if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9872 vcpu->arch.exception.error_code = false;
9873 static_call(kvm_x86_inject_exception)(vcpu);
9877 * Check for any event (interrupt or exception) that is ready to be injected,
9878 * and if there is at least one event, inject the event with the highest
9879 * priority. This handles both "pending" events, i.e. events that have never
9880 * been injected into the guest, and "injected" events, i.e. events that were
9881 * injected as part of a previous VM-Enter, but weren't successfully delivered
9882 * and need to be re-injected.
9884 * Note, this is not guaranteed to be invoked on a guest instruction boundary,
9885 * i.e. doesn't guarantee that there's an event window in the guest. KVM must
9886 * be able to inject exceptions in the "middle" of an instruction, and so must
9887 * also be able to re-inject NMIs and IRQs in the middle of an instruction.
9888 * I.e. for exceptions and re-injected events, NOT invoking this on instruction
9889 * boundaries is necessary and correct.
9891 * For simplicity, KVM uses a single path to inject all events (except events
9892 * that are injected directly from L1 to L2) and doesn't explicitly track
9893 * instruction boundaries for asynchronous events. However, because VM-Exits
9894 * that can occur during instruction execution typically result in KVM skipping
9895 * the instruction or injecting an exception, e.g. instruction and exception
9896 * intercepts, and because pending exceptions have higher priority than pending
9897 * interrupts, KVM still honors instruction boundaries in most scenarios.
9899 * But, if a VM-Exit occurs during instruction execution, and KVM does NOT skip
9900 * the instruction or inject an exception, then KVM can incorrecty inject a new
9901 * asynchrounous event if the event became pending after the CPU fetched the
9902 * instruction (in the guest). E.g. if a page fault (#PF, #NPF, EPT violation)
9903 * occurs and is resolved by KVM, a coincident NMI, SMI, IRQ, etc... can be
9904 * injected on the restarted instruction instead of being deferred until the
9905 * instruction completes.
9907 * In practice, this virtualization hole is unlikely to be observed by the
9908 * guest, and even less likely to cause functional problems. To detect the
9909 * hole, the guest would have to trigger an event on a side effect of an early
9910 * phase of instruction execution, e.g. on the instruction fetch from memory.
9911 * And for it to be a functional problem, the guest would need to depend on the
9912 * ordering between that side effect, the instruction completing, _and_ the
9913 * delivery of the asynchronous event.
9915 static int kvm_check_and_inject_events(struct kvm_vcpu *vcpu,
9916 bool *req_immediate_exit)
9922 * Process nested events first, as nested VM-Exit supercedes event
9923 * re-injection. If there's an event queued for re-injection, it will
9924 * be saved into the appropriate vmc{b,s}12 fields on nested VM-Exit.
9926 if (is_guest_mode(vcpu))
9927 r = kvm_check_nested_events(vcpu);
9932 * Re-inject exceptions and events *especially* if immediate entry+exit
9933 * to/from L2 is needed, as any event that has already been injected
9934 * into L2 needs to complete its lifecycle before injecting a new event.
9936 * Don't re-inject an NMI or interrupt if there is a pending exception.
9937 * This collision arises if an exception occurred while vectoring the
9938 * injected event, KVM intercepted said exception, and KVM ultimately
9939 * determined the fault belongs to the guest and queues the exception
9940 * for injection back into the guest.
9942 * "Injected" interrupts can also collide with pending exceptions if
9943 * userspace ignores the "ready for injection" flag and blindly queues
9944 * an interrupt. In that case, prioritizing the exception is correct,
9945 * as the exception "occurred" before the exit to userspace. Trap-like
9946 * exceptions, e.g. most #DBs, have higher priority than interrupts.
9947 * And while fault-like exceptions, e.g. #GP and #PF, are the lowest
9948 * priority, they're only generated (pended) during instruction
9949 * execution, and interrupts are recognized at instruction boundaries.
9950 * Thus a pending fault-like exception means the fault occurred on the
9951 * *previous* instruction and must be serviced prior to recognizing any
9952 * new events in order to fully complete the previous instruction.
9954 if (vcpu->arch.exception.injected)
9955 kvm_inject_exception(vcpu);
9956 else if (kvm_is_exception_pending(vcpu))
9958 else if (vcpu->arch.nmi_injected)
9959 static_call(kvm_x86_inject_nmi)(vcpu);
9960 else if (vcpu->arch.interrupt.injected)
9961 static_call(kvm_x86_inject_irq)(vcpu, true);
9964 * Exceptions that morph to VM-Exits are handled above, and pending
9965 * exceptions on top of injected exceptions that do not VM-Exit should
9966 * either morph to #DF or, sadly, override the injected exception.
9968 WARN_ON_ONCE(vcpu->arch.exception.injected &&
9969 vcpu->arch.exception.pending);
9972 * Bail if immediate entry+exit to/from the guest is needed to complete
9973 * nested VM-Enter or event re-injection so that a different pending
9974 * event can be serviced (or if KVM needs to exit to userspace).
9976 * Otherwise, continue processing events even if VM-Exit occurred. The
9977 * VM-Exit will have cleared exceptions that were meant for L2, but
9978 * there may now be events that can be injected into L1.
9984 * A pending exception VM-Exit should either result in nested VM-Exit
9985 * or force an immediate re-entry and exit to/from L2, and exception
9986 * VM-Exits cannot be injected (flag should _never_ be set).
9988 WARN_ON_ONCE(vcpu->arch.exception_vmexit.injected ||
9989 vcpu->arch.exception_vmexit.pending);
9992 * New events, other than exceptions, cannot be injected if KVM needs
9993 * to re-inject a previous event. See above comments on re-injecting
9994 * for why pending exceptions get priority.
9996 can_inject = !kvm_event_needs_reinjection(vcpu);
9998 if (vcpu->arch.exception.pending) {
10000 * Fault-class exceptions, except #DBs, set RF=1 in the RFLAGS
10001 * value pushed on the stack. Trap-like exception and all #DBs
10002 * leave RF as-is (KVM follows Intel's behavior in this regard;
10003 * AMD states that code breakpoint #DBs excplitly clear RF=0).
10005 * Note, most versions of Intel's SDM and AMD's APM incorrectly
10006 * describe the behavior of General Detect #DBs, which are
10007 * fault-like. They do _not_ set RF, a la code breakpoints.
10009 if (exception_type(vcpu->arch.exception.vector) == EXCPT_FAULT)
10010 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
10013 if (vcpu->arch.exception.vector == DB_VECTOR) {
10014 kvm_deliver_exception_payload(vcpu, &vcpu->arch.exception);
10015 if (vcpu->arch.dr7 & DR7_GD) {
10016 vcpu->arch.dr7 &= ~DR7_GD;
10017 kvm_update_dr7(vcpu);
10021 kvm_inject_exception(vcpu);
10023 vcpu->arch.exception.pending = false;
10024 vcpu->arch.exception.injected = true;
10026 can_inject = false;
10029 /* Don't inject interrupts if the user asked to avoid doing so */
10030 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
10034 * Finally, inject interrupt events. If an event cannot be injected
10035 * due to architectural conditions (e.g. IF=0) a window-open exit
10036 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
10037 * and can architecturally be injected, but we cannot do it right now:
10038 * an interrupt could have arrived just now and we have to inject it
10039 * as a vmexit, or there could already an event in the queue, which is
10040 * indicated by can_inject. In that case we request an immediate exit
10041 * in order to make progress and get back here for another iteration.
10042 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
10044 #ifdef CONFIG_KVM_SMM
10045 if (vcpu->arch.smi_pending) {
10046 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
10050 vcpu->arch.smi_pending = false;
10051 ++vcpu->arch.smi_count;
10053 can_inject = false;
10055 static_call(kvm_x86_enable_smi_window)(vcpu);
10059 if (vcpu->arch.nmi_pending) {
10060 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
10064 --vcpu->arch.nmi_pending;
10065 vcpu->arch.nmi_injected = true;
10066 static_call(kvm_x86_inject_nmi)(vcpu);
10067 can_inject = false;
10068 WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
10070 if (vcpu->arch.nmi_pending)
10071 static_call(kvm_x86_enable_nmi_window)(vcpu);
10074 if (kvm_cpu_has_injectable_intr(vcpu)) {
10075 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
10079 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
10080 static_call(kvm_x86_inject_irq)(vcpu, false);
10081 WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
10083 if (kvm_cpu_has_injectable_intr(vcpu))
10084 static_call(kvm_x86_enable_irq_window)(vcpu);
10087 if (is_guest_mode(vcpu) &&
10088 kvm_x86_ops.nested_ops->has_events &&
10089 kvm_x86_ops.nested_ops->has_events(vcpu))
10090 *req_immediate_exit = true;
10093 * KVM must never queue a new exception while injecting an event; KVM
10094 * is done emulating and should only propagate the to-be-injected event
10095 * to the VMCS/VMCB. Queueing a new exception can put the vCPU into an
10096 * infinite loop as KVM will bail from VM-Enter to inject the pending
10097 * exception and start the cycle all over.
10099 * Exempt triple faults as they have special handling and won't put the
10100 * vCPU into an infinite loop. Triple fault can be queued when running
10101 * VMX without unrestricted guest, as that requires KVM to emulate Real
10102 * Mode events (see kvm_inject_realmode_interrupt()).
10104 WARN_ON_ONCE(vcpu->arch.exception.pending ||
10105 vcpu->arch.exception_vmexit.pending);
10110 *req_immediate_exit = true;
10116 static void process_nmi(struct kvm_vcpu *vcpu)
10118 unsigned limit = 2;
10121 * x86 is limited to one NMI running, and one NMI pending after it.
10122 * If an NMI is already in progress, limit further NMIs to just one.
10123 * Otherwise, allow two (and we'll inject the first one immediately).
10125 if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
10128 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
10129 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
10130 kvm_make_request(KVM_REQ_EVENT, vcpu);
10133 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
10134 unsigned long *vcpu_bitmap)
10136 kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
10139 void kvm_make_scan_ioapic_request(struct kvm *kvm)
10141 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
10144 void __kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
10146 struct kvm_lapic *apic = vcpu->arch.apic;
10149 if (!lapic_in_kernel(vcpu))
10152 down_read(&vcpu->kvm->arch.apicv_update_lock);
10155 /* Do not activate APICV when APIC is disabled */
10156 activate = kvm_vcpu_apicv_activated(vcpu) &&
10157 (kvm_get_apic_mode(vcpu) != LAPIC_MODE_DISABLED);
10159 if (apic->apicv_active == activate)
10162 apic->apicv_active = activate;
10163 kvm_apic_update_apicv(vcpu);
10164 static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
10167 * When APICv gets disabled, we may still have injected interrupts
10168 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
10169 * still active when the interrupt got accepted. Make sure
10170 * kvm_check_and_inject_events() is called to check for that.
10172 if (!apic->apicv_active)
10173 kvm_make_request(KVM_REQ_EVENT, vcpu);
10177 up_read(&vcpu->kvm->arch.apicv_update_lock);
10179 EXPORT_SYMBOL_GPL(__kvm_vcpu_update_apicv);
10181 static void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
10183 if (!lapic_in_kernel(vcpu))
10187 * Due to sharing page tables across vCPUs, the xAPIC memslot must be
10188 * deleted if any vCPU has xAPIC virtualization and x2APIC enabled, but
10189 * and hardware doesn't support x2APIC virtualization. E.g. some AMD
10190 * CPUs support AVIC but not x2APIC. KVM still allows enabling AVIC in
10191 * this case so that KVM can the AVIC doorbell to inject interrupts to
10192 * running vCPUs, but KVM must not create SPTEs for the APIC base as
10193 * the vCPU would incorrectly be able to access the vAPIC page via MMIO
10194 * despite being in x2APIC mode. For simplicity, inhibiting the APIC
10195 * access page is sticky.
10197 if (apic_x2apic_mode(vcpu->arch.apic) &&
10198 kvm_x86_ops.allow_apicv_in_x2apic_without_x2apic_virtualization)
10199 kvm_inhibit_apic_access_page(vcpu);
10201 __kvm_vcpu_update_apicv(vcpu);
10204 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
10205 enum kvm_apicv_inhibit reason, bool set)
10207 unsigned long old, new;
10209 lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
10211 if (!(kvm_x86_ops.required_apicv_inhibits & BIT(reason)))
10214 old = new = kvm->arch.apicv_inhibit_reasons;
10216 set_or_clear_apicv_inhibit(&new, reason, set);
10218 if (!!old != !!new) {
10220 * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
10221 * false positives in the sanity check WARN in svm_vcpu_run().
10222 * This task will wait for all vCPUs to ack the kick IRQ before
10223 * updating apicv_inhibit_reasons, and all other vCPUs will
10224 * block on acquiring apicv_update_lock so that vCPUs can't
10225 * redo svm_vcpu_run() without seeing the new inhibit state.
10227 * Note, holding apicv_update_lock and taking it in the read
10228 * side (handling the request) also prevents other vCPUs from
10229 * servicing the request with a stale apicv_inhibit_reasons.
10231 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
10232 kvm->arch.apicv_inhibit_reasons = new;
10234 unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
10235 int idx = srcu_read_lock(&kvm->srcu);
10237 kvm_zap_gfn_range(kvm, gfn, gfn+1);
10238 srcu_read_unlock(&kvm->srcu, idx);
10241 kvm->arch.apicv_inhibit_reasons = new;
10245 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
10246 enum kvm_apicv_inhibit reason, bool set)
10251 down_write(&kvm->arch.apicv_update_lock);
10252 __kvm_set_or_clear_apicv_inhibit(kvm, reason, set);
10253 up_write(&kvm->arch.apicv_update_lock);
10255 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit);
10257 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
10259 if (!kvm_apic_present(vcpu))
10262 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
10264 if (irqchip_split(vcpu->kvm))
10265 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
10267 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10268 if (ioapic_in_kernel(vcpu->kvm))
10269 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
10272 if (is_guest_mode(vcpu))
10273 vcpu->arch.load_eoi_exitmap_pending = true;
10275 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
10278 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
10280 u64 eoi_exit_bitmap[4];
10282 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
10285 if (to_hv_vcpu(vcpu)) {
10286 bitmap_or((ulong *)eoi_exit_bitmap,
10287 vcpu->arch.ioapic_handled_vectors,
10288 to_hv_synic(vcpu)->vec_bitmap, 256);
10289 static_call_cond(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
10293 static_call_cond(kvm_x86_load_eoi_exitmap)(
10294 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
10297 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
10298 unsigned long start, unsigned long end)
10300 unsigned long apic_address;
10303 * The physical address of apic access page is stored in the VMCS.
10304 * Update it when it becomes invalid.
10306 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
10307 if (start <= apic_address && apic_address < end)
10308 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
10311 void kvm_arch_guest_memory_reclaimed(struct kvm *kvm)
10313 static_call_cond(kvm_x86_guest_memory_reclaimed)(kvm);
10316 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
10318 if (!lapic_in_kernel(vcpu))
10321 static_call_cond(kvm_x86_set_apic_access_page_addr)(vcpu);
10324 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
10326 smp_send_reschedule(vcpu->cpu);
10328 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
10331 * Called within kvm->srcu read side.
10332 * Returns 1 to let vcpu_run() continue the guest execution loop without
10333 * exiting to the userspace. Otherwise, the value will be returned to the
10336 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
10340 dm_request_for_irq_injection(vcpu) &&
10341 kvm_cpu_accept_dm_intr(vcpu);
10342 fastpath_t exit_fastpath;
10344 bool req_immediate_exit = false;
10346 if (kvm_request_pending(vcpu)) {
10347 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
10352 if (kvm_dirty_ring_check_request(vcpu)) {
10357 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
10358 if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
10363 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
10364 kvm_mmu_free_obsolete_roots(vcpu);
10365 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
10366 __kvm_migrate_timers(vcpu);
10367 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
10368 kvm_update_masterclock(vcpu->kvm);
10369 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
10370 kvm_gen_kvmclock_update(vcpu);
10371 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
10372 r = kvm_guest_time_update(vcpu);
10376 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
10377 kvm_mmu_sync_roots(vcpu);
10378 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
10379 kvm_mmu_load_pgd(vcpu);
10382 * Note, the order matters here, as flushing "all" TLB entries
10383 * also flushes the "current" TLB entries, i.e. servicing the
10384 * flush "all" will clear any request to flush "current".
10386 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
10387 kvm_vcpu_flush_tlb_all(vcpu);
10389 kvm_service_local_tlb_flush_requests(vcpu);
10392 * Fall back to a "full" guest flush if Hyper-V's precise
10393 * flushing fails. Note, Hyper-V's flushing is per-vCPU, but
10394 * the flushes are considered "remote" and not "local" because
10395 * the requests can be initiated from other vCPUs.
10397 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu) &&
10398 kvm_hv_vcpu_flush_tlb(vcpu))
10399 kvm_vcpu_flush_tlb_guest(vcpu);
10401 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
10402 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
10406 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
10407 if (is_guest_mode(vcpu))
10408 kvm_x86_ops.nested_ops->triple_fault(vcpu);
10410 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
10411 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
10412 vcpu->mmio_needed = 0;
10417 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
10418 /* Page is swapped out. Do synthetic halt */
10419 vcpu->arch.apf.halted = true;
10423 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
10424 record_steal_time(vcpu);
10425 #ifdef CONFIG_KVM_SMM
10426 if (kvm_check_request(KVM_REQ_SMI, vcpu))
10429 if (kvm_check_request(KVM_REQ_NMI, vcpu))
10431 if (kvm_check_request(KVM_REQ_PMU, vcpu))
10432 kvm_pmu_handle_event(vcpu);
10433 if (kvm_check_request(KVM_REQ_PMI, vcpu))
10434 kvm_pmu_deliver_pmi(vcpu);
10435 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
10436 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
10437 if (test_bit(vcpu->arch.pending_ioapic_eoi,
10438 vcpu->arch.ioapic_handled_vectors)) {
10439 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
10440 vcpu->run->eoi.vector =
10441 vcpu->arch.pending_ioapic_eoi;
10446 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
10447 vcpu_scan_ioapic(vcpu);
10448 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
10449 vcpu_load_eoi_exitmap(vcpu);
10450 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
10451 kvm_vcpu_reload_apic_access_page(vcpu);
10452 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
10453 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10454 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
10455 vcpu->run->system_event.ndata = 0;
10459 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
10460 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10461 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
10462 vcpu->run->system_event.ndata = 0;
10466 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
10467 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
10469 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
10470 vcpu->run->hyperv = hv_vcpu->exit;
10476 * KVM_REQ_HV_STIMER has to be processed after
10477 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10478 * depend on the guest clock being up-to-date
10480 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
10481 kvm_hv_process_stimers(vcpu);
10482 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
10483 kvm_vcpu_update_apicv(vcpu);
10484 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
10485 kvm_check_async_pf_completion(vcpu);
10486 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
10487 static_call(kvm_x86_msr_filter_changed)(vcpu);
10489 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
10490 static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
10493 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
10494 kvm_xen_has_interrupt(vcpu)) {
10495 ++vcpu->stat.req_event;
10496 r = kvm_apic_accept_events(vcpu);
10501 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
10506 r = kvm_check_and_inject_events(vcpu, &req_immediate_exit);
10512 static_call(kvm_x86_enable_irq_window)(vcpu);
10514 if (kvm_lapic_enabled(vcpu)) {
10515 update_cr8_intercept(vcpu);
10516 kvm_lapic_sync_to_vapic(vcpu);
10520 r = kvm_mmu_reload(vcpu);
10522 goto cancel_injection;
10527 static_call(kvm_x86_prepare_switch_to_guest)(vcpu);
10530 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
10531 * IPI are then delayed after guest entry, which ensures that they
10532 * result in virtual interrupt delivery.
10534 local_irq_disable();
10536 /* Store vcpu->apicv_active before vcpu->mode. */
10537 smp_store_release(&vcpu->mode, IN_GUEST_MODE);
10539 kvm_vcpu_srcu_read_unlock(vcpu);
10542 * 1) We should set ->mode before checking ->requests. Please see
10543 * the comment in kvm_vcpu_exiting_guest_mode().
10545 * 2) For APICv, we should set ->mode before checking PID.ON. This
10546 * pairs with the memory barrier implicit in pi_test_and_set_on
10547 * (see vmx_deliver_posted_interrupt).
10549 * 3) This also orders the write to mode from any reads to the page
10550 * tables done while the VCPU is running. Please see the comment
10551 * in kvm_flush_remote_tlbs.
10553 smp_mb__after_srcu_read_unlock();
10556 * Process pending posted interrupts to handle the case where the
10557 * notification IRQ arrived in the host, or was never sent (because the
10558 * target vCPU wasn't running). Do this regardless of the vCPU's APICv
10559 * status, KVM doesn't update assigned devices when APICv is inhibited,
10560 * i.e. they can post interrupts even if APICv is temporarily disabled.
10562 if (kvm_lapic_enabled(vcpu))
10563 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10565 if (kvm_vcpu_exit_request(vcpu)) {
10566 vcpu->mode = OUTSIDE_GUEST_MODE;
10568 local_irq_enable();
10570 kvm_vcpu_srcu_read_lock(vcpu);
10572 goto cancel_injection;
10575 if (req_immediate_exit) {
10576 kvm_make_request(KVM_REQ_EVENT, vcpu);
10577 static_call(kvm_x86_request_immediate_exit)(vcpu);
10580 fpregs_assert_state_consistent();
10581 if (test_thread_flag(TIF_NEED_FPU_LOAD))
10582 switch_fpu_return();
10584 if (vcpu->arch.guest_fpu.xfd_err)
10585 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10587 if (unlikely(vcpu->arch.switch_db_regs)) {
10588 set_debugreg(0, 7);
10589 set_debugreg(vcpu->arch.eff_db[0], 0);
10590 set_debugreg(vcpu->arch.eff_db[1], 1);
10591 set_debugreg(vcpu->arch.eff_db[2], 2);
10592 set_debugreg(vcpu->arch.eff_db[3], 3);
10593 } else if (unlikely(hw_breakpoint_active())) {
10594 set_debugreg(0, 7);
10597 guest_timing_enter_irqoff();
10601 * Assert that vCPU vs. VM APICv state is consistent. An APICv
10602 * update must kick and wait for all vCPUs before toggling the
10603 * per-VM state, and responsing vCPUs must wait for the update
10604 * to complete before servicing KVM_REQ_APICV_UPDATE.
10606 WARN_ON_ONCE((kvm_vcpu_apicv_activated(vcpu) != kvm_vcpu_apicv_active(vcpu)) &&
10607 (kvm_get_apic_mode(vcpu) != LAPIC_MODE_DISABLED));
10609 exit_fastpath = static_call(kvm_x86_vcpu_run)(vcpu);
10610 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10613 if (kvm_lapic_enabled(vcpu))
10614 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10616 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10617 exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10623 * Do this here before restoring debug registers on the host. And
10624 * since we do this before handling the vmexit, a DR access vmexit
10625 * can (a) read the correct value of the debug registers, (b) set
10626 * KVM_DEBUGREG_WONT_EXIT again.
10628 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10629 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10630 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10631 kvm_update_dr0123(vcpu);
10632 kvm_update_dr7(vcpu);
10636 * If the guest has used debug registers, at least dr7
10637 * will be disabled while returning to the host.
10638 * If we don't have active breakpoints in the host, we don't
10639 * care about the messed up debug address registers. But if
10640 * we have some of them active, restore the old state.
10642 if (hw_breakpoint_active())
10643 hw_breakpoint_restore();
10645 vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10646 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10648 vcpu->mode = OUTSIDE_GUEST_MODE;
10652 * Sync xfd before calling handle_exit_irqoff() which may
10653 * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10654 * in #NM irqoff handler).
10656 if (vcpu->arch.xfd_no_write_intercept)
10657 fpu_sync_guest_vmexit_xfd_state();
10659 static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10661 if (vcpu->arch.guest_fpu.xfd_err)
10662 wrmsrl(MSR_IA32_XFD_ERR, 0);
10665 * Consume any pending interrupts, including the possible source of
10666 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10667 * An instruction is required after local_irq_enable() to fully unblock
10668 * interrupts on processors that implement an interrupt shadow, the
10669 * stat.exits increment will do nicely.
10671 kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10672 local_irq_enable();
10673 ++vcpu->stat.exits;
10674 local_irq_disable();
10675 kvm_after_interrupt(vcpu);
10678 * Wait until after servicing IRQs to account guest time so that any
10679 * ticks that occurred while running the guest are properly accounted
10680 * to the guest. Waiting until IRQs are enabled degrades the accuracy
10681 * of accounting via context tracking, but the loss of accuracy is
10682 * acceptable for all known use cases.
10684 guest_timing_exit_irqoff();
10686 local_irq_enable();
10689 kvm_vcpu_srcu_read_lock(vcpu);
10692 * Profile KVM exit RIPs:
10694 if (unlikely(prof_on == KVM_PROFILING)) {
10695 unsigned long rip = kvm_rip_read(vcpu);
10696 profile_hit(KVM_PROFILING, (void *)rip);
10699 if (unlikely(vcpu->arch.tsc_always_catchup))
10700 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10702 if (vcpu->arch.apic_attention)
10703 kvm_lapic_sync_from_vapic(vcpu);
10705 r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10709 if (req_immediate_exit)
10710 kvm_make_request(KVM_REQ_EVENT, vcpu);
10711 static_call(kvm_x86_cancel_injection)(vcpu);
10712 if (unlikely(vcpu->arch.apic_attention))
10713 kvm_lapic_sync_from_vapic(vcpu);
10718 /* Called within kvm->srcu read side. */
10719 static inline int vcpu_block(struct kvm_vcpu *vcpu)
10723 if (!kvm_arch_vcpu_runnable(vcpu)) {
10725 * Switch to the software timer before halt-polling/blocking as
10726 * the guest's timer may be a break event for the vCPU, and the
10727 * hypervisor timer runs only when the CPU is in guest mode.
10728 * Switch before halt-polling so that KVM recognizes an expired
10729 * timer before blocking.
10731 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10733 kvm_lapic_switch_to_sw_timer(vcpu);
10735 kvm_vcpu_srcu_read_unlock(vcpu);
10736 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10737 kvm_vcpu_halt(vcpu);
10739 kvm_vcpu_block(vcpu);
10740 kvm_vcpu_srcu_read_lock(vcpu);
10743 kvm_lapic_switch_to_hv_timer(vcpu);
10746 * If the vCPU is not runnable, a signal or another host event
10747 * of some kind is pending; service it without changing the
10748 * vCPU's activity state.
10750 if (!kvm_arch_vcpu_runnable(vcpu))
10755 * Evaluate nested events before exiting the halted state. This allows
10756 * the halt state to be recorded properly in the VMCS12's activity
10757 * state field (AMD does not have a similar field and a VM-Exit always
10758 * causes a spurious wakeup from HLT).
10760 if (is_guest_mode(vcpu)) {
10761 if (kvm_check_nested_events(vcpu) < 0)
10765 if (kvm_apic_accept_events(vcpu) < 0)
10767 switch(vcpu->arch.mp_state) {
10768 case KVM_MP_STATE_HALTED:
10769 case KVM_MP_STATE_AP_RESET_HOLD:
10770 vcpu->arch.pv.pv_unhalted = false;
10771 vcpu->arch.mp_state =
10772 KVM_MP_STATE_RUNNABLE;
10774 case KVM_MP_STATE_RUNNABLE:
10775 vcpu->arch.apf.halted = false;
10777 case KVM_MP_STATE_INIT_RECEIVED:
10786 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10788 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10789 !vcpu->arch.apf.halted);
10792 /* Called within kvm->srcu read side. */
10793 static int vcpu_run(struct kvm_vcpu *vcpu)
10797 vcpu->arch.l1tf_flush_l1d = true;
10801 * If another guest vCPU requests a PV TLB flush in the middle
10802 * of instruction emulation, the rest of the emulation could
10803 * use a stale page translation. Assume that any code after
10804 * this point can start executing an instruction.
10806 vcpu->arch.at_instruction_boundary = false;
10807 if (kvm_vcpu_running(vcpu)) {
10808 r = vcpu_enter_guest(vcpu);
10810 r = vcpu_block(vcpu);
10816 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10817 if (kvm_xen_has_pending_events(vcpu))
10818 kvm_xen_inject_pending_events(vcpu);
10820 if (kvm_cpu_has_pending_timer(vcpu))
10821 kvm_inject_pending_timer_irqs(vcpu);
10823 if (dm_request_for_irq_injection(vcpu) &&
10824 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10826 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10827 ++vcpu->stat.request_irq_exits;
10831 if (__xfer_to_guest_mode_work_pending()) {
10832 kvm_vcpu_srcu_read_unlock(vcpu);
10833 r = xfer_to_guest_mode_handle_work(vcpu);
10834 kvm_vcpu_srcu_read_lock(vcpu);
10843 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10845 return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10848 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10850 BUG_ON(!vcpu->arch.pio.count);
10852 return complete_emulated_io(vcpu);
10856 * Implements the following, as a state machine:
10859 * for each fragment
10860 * for each mmio piece in the fragment
10867 * for each fragment
10868 * for each mmio piece in the fragment
10873 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10875 struct kvm_run *run = vcpu->run;
10876 struct kvm_mmio_fragment *frag;
10879 BUG_ON(!vcpu->mmio_needed);
10881 /* Complete previous fragment */
10882 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10883 len = min(8u, frag->len);
10884 if (!vcpu->mmio_is_write)
10885 memcpy(frag->data, run->mmio.data, len);
10887 if (frag->len <= 8) {
10888 /* Switch to the next fragment. */
10890 vcpu->mmio_cur_fragment++;
10892 /* Go forward to the next mmio piece. */
10898 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10899 vcpu->mmio_needed = 0;
10901 /* FIXME: return into emulator if single-stepping. */
10902 if (vcpu->mmio_is_write)
10904 vcpu->mmio_read_completed = 1;
10905 return complete_emulated_io(vcpu);
10908 run->exit_reason = KVM_EXIT_MMIO;
10909 run->mmio.phys_addr = frag->gpa;
10910 if (vcpu->mmio_is_write)
10911 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10912 run->mmio.len = min(8u, frag->len);
10913 run->mmio.is_write = vcpu->mmio_is_write;
10914 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10918 /* Swap (qemu) user FPU context for the guest FPU context. */
10919 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10921 /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
10922 fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10926 /* When vcpu_run ends, restore user space FPU context. */
10927 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10929 fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10930 ++vcpu->stat.fpu_reload;
10934 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10936 struct kvm_queued_exception *ex = &vcpu->arch.exception;
10937 struct kvm_run *kvm_run = vcpu->run;
10941 kvm_sigset_activate(vcpu);
10942 kvm_run->flags = 0;
10943 kvm_load_guest_fpu(vcpu);
10945 kvm_vcpu_srcu_read_lock(vcpu);
10946 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10947 if (kvm_run->immediate_exit) {
10952 * It should be impossible for the hypervisor timer to be in
10953 * use before KVM has ever run the vCPU.
10955 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10957 kvm_vcpu_srcu_read_unlock(vcpu);
10958 kvm_vcpu_block(vcpu);
10959 kvm_vcpu_srcu_read_lock(vcpu);
10961 if (kvm_apic_accept_events(vcpu) < 0) {
10966 if (signal_pending(current)) {
10968 kvm_run->exit_reason = KVM_EXIT_INTR;
10969 ++vcpu->stat.signal_exits;
10974 if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10975 (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10980 if (kvm_run->kvm_dirty_regs) {
10981 r = sync_regs(vcpu);
10986 /* re-sync apic's tpr */
10987 if (!lapic_in_kernel(vcpu)) {
10988 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10995 * If userspace set a pending exception and L2 is active, convert it to
10996 * a pending VM-Exit if L1 wants to intercept the exception.
10998 if (vcpu->arch.exception_from_userspace && is_guest_mode(vcpu) &&
10999 kvm_x86_ops.nested_ops->is_exception_vmexit(vcpu, ex->vector,
11001 kvm_queue_exception_vmexit(vcpu, ex->vector,
11002 ex->has_error_code, ex->error_code,
11003 ex->has_payload, ex->payload);
11004 ex->injected = false;
11005 ex->pending = false;
11007 vcpu->arch.exception_from_userspace = false;
11009 if (unlikely(vcpu->arch.complete_userspace_io)) {
11010 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
11011 vcpu->arch.complete_userspace_io = NULL;
11016 WARN_ON_ONCE(vcpu->arch.pio.count);
11017 WARN_ON_ONCE(vcpu->mmio_needed);
11020 if (kvm_run->immediate_exit) {
11025 r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
11029 r = vcpu_run(vcpu);
11032 kvm_put_guest_fpu(vcpu);
11033 if (kvm_run->kvm_valid_regs)
11035 post_kvm_run_save(vcpu);
11036 kvm_vcpu_srcu_read_unlock(vcpu);
11038 kvm_sigset_deactivate(vcpu);
11043 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
11045 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
11047 * We are here if userspace calls get_regs() in the middle of
11048 * instruction emulation. Registers state needs to be copied
11049 * back from emulation context to vcpu. Userspace shouldn't do
11050 * that usually, but some bad designed PV devices (vmware
11051 * backdoor interface) need this to work
11053 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
11054 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
11056 regs->rax = kvm_rax_read(vcpu);
11057 regs->rbx = kvm_rbx_read(vcpu);
11058 regs->rcx = kvm_rcx_read(vcpu);
11059 regs->rdx = kvm_rdx_read(vcpu);
11060 regs->rsi = kvm_rsi_read(vcpu);
11061 regs->rdi = kvm_rdi_read(vcpu);
11062 regs->rsp = kvm_rsp_read(vcpu);
11063 regs->rbp = kvm_rbp_read(vcpu);
11064 #ifdef CONFIG_X86_64
11065 regs->r8 = kvm_r8_read(vcpu);
11066 regs->r9 = kvm_r9_read(vcpu);
11067 regs->r10 = kvm_r10_read(vcpu);
11068 regs->r11 = kvm_r11_read(vcpu);
11069 regs->r12 = kvm_r12_read(vcpu);
11070 regs->r13 = kvm_r13_read(vcpu);
11071 regs->r14 = kvm_r14_read(vcpu);
11072 regs->r15 = kvm_r15_read(vcpu);
11075 regs->rip = kvm_rip_read(vcpu);
11076 regs->rflags = kvm_get_rflags(vcpu);
11079 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
11082 __get_regs(vcpu, regs);
11087 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
11089 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
11090 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
11092 kvm_rax_write(vcpu, regs->rax);
11093 kvm_rbx_write(vcpu, regs->rbx);
11094 kvm_rcx_write(vcpu, regs->rcx);
11095 kvm_rdx_write(vcpu, regs->rdx);
11096 kvm_rsi_write(vcpu, regs->rsi);
11097 kvm_rdi_write(vcpu, regs->rdi);
11098 kvm_rsp_write(vcpu, regs->rsp);
11099 kvm_rbp_write(vcpu, regs->rbp);
11100 #ifdef CONFIG_X86_64
11101 kvm_r8_write(vcpu, regs->r8);
11102 kvm_r9_write(vcpu, regs->r9);
11103 kvm_r10_write(vcpu, regs->r10);
11104 kvm_r11_write(vcpu, regs->r11);
11105 kvm_r12_write(vcpu, regs->r12);
11106 kvm_r13_write(vcpu, regs->r13);
11107 kvm_r14_write(vcpu, regs->r14);
11108 kvm_r15_write(vcpu, regs->r15);
11111 kvm_rip_write(vcpu, regs->rip);
11112 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
11114 vcpu->arch.exception.pending = false;
11115 vcpu->arch.exception_vmexit.pending = false;
11117 kvm_make_request(KVM_REQ_EVENT, vcpu);
11120 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
11123 __set_regs(vcpu, regs);
11128 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11130 struct desc_ptr dt;
11132 if (vcpu->arch.guest_state_protected)
11133 goto skip_protected_regs;
11135 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
11136 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
11137 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
11138 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
11139 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
11140 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
11142 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
11143 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
11145 static_call(kvm_x86_get_idt)(vcpu, &dt);
11146 sregs->idt.limit = dt.size;
11147 sregs->idt.base = dt.address;
11148 static_call(kvm_x86_get_gdt)(vcpu, &dt);
11149 sregs->gdt.limit = dt.size;
11150 sregs->gdt.base = dt.address;
11152 sregs->cr2 = vcpu->arch.cr2;
11153 sregs->cr3 = kvm_read_cr3(vcpu);
11155 skip_protected_regs:
11156 sregs->cr0 = kvm_read_cr0(vcpu);
11157 sregs->cr4 = kvm_read_cr4(vcpu);
11158 sregs->cr8 = kvm_get_cr8(vcpu);
11159 sregs->efer = vcpu->arch.efer;
11160 sregs->apic_base = kvm_get_apic_base(vcpu);
11163 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11165 __get_sregs_common(vcpu, sregs);
11167 if (vcpu->arch.guest_state_protected)
11170 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
11171 set_bit(vcpu->arch.interrupt.nr,
11172 (unsigned long *)sregs->interrupt_bitmap);
11175 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
11179 __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
11181 if (vcpu->arch.guest_state_protected)
11184 if (is_pae_paging(vcpu)) {
11185 for (i = 0 ; i < 4 ; i++)
11186 sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
11187 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
11191 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
11192 struct kvm_sregs *sregs)
11195 __get_sregs(vcpu, sregs);
11200 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
11201 struct kvm_mp_state *mp_state)
11206 if (kvm_mpx_supported())
11207 kvm_load_guest_fpu(vcpu);
11209 r = kvm_apic_accept_events(vcpu);
11214 if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
11215 vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
11216 vcpu->arch.pv.pv_unhalted)
11217 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
11219 mp_state->mp_state = vcpu->arch.mp_state;
11222 if (kvm_mpx_supported())
11223 kvm_put_guest_fpu(vcpu);
11228 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
11229 struct kvm_mp_state *mp_state)
11235 switch (mp_state->mp_state) {
11236 case KVM_MP_STATE_UNINITIALIZED:
11237 case KVM_MP_STATE_HALTED:
11238 case KVM_MP_STATE_AP_RESET_HOLD:
11239 case KVM_MP_STATE_INIT_RECEIVED:
11240 case KVM_MP_STATE_SIPI_RECEIVED:
11241 if (!lapic_in_kernel(vcpu))
11245 case KVM_MP_STATE_RUNNABLE:
11253 * Pending INITs are reported using KVM_SET_VCPU_EVENTS, disallow
11254 * forcing the guest into INIT/SIPI if those events are supposed to be
11255 * blocked. KVM prioritizes SMI over INIT, so reject INIT/SIPI state
11256 * if an SMI is pending as well.
11258 if ((!kvm_apic_init_sipi_allowed(vcpu) || vcpu->arch.smi_pending) &&
11259 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
11260 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
11263 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
11264 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
11265 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
11267 vcpu->arch.mp_state = mp_state->mp_state;
11268 kvm_make_request(KVM_REQ_EVENT, vcpu);
11276 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
11277 int reason, bool has_error_code, u32 error_code)
11279 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
11282 init_emulate_ctxt(vcpu);
11284 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
11285 has_error_code, error_code);
11287 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11288 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11289 vcpu->run->internal.ndata = 0;
11293 kvm_rip_write(vcpu, ctxt->eip);
11294 kvm_set_rflags(vcpu, ctxt->eflags);
11297 EXPORT_SYMBOL_GPL(kvm_task_switch);
11299 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11301 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
11303 * When EFER.LME and CR0.PG are set, the processor is in
11304 * 64-bit mode (though maybe in a 32-bit code segment).
11305 * CR4.PAE and EFER.LMA must be set.
11307 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
11309 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
11313 * Not in 64-bit mode: EFER.LMA is clear and the code
11314 * segment cannot be 64-bit.
11316 if (sregs->efer & EFER_LMA || sregs->cs.l)
11320 return kvm_is_valid_cr4(vcpu, sregs->cr4);
11323 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
11324 int *mmu_reset_needed, bool update_pdptrs)
11326 struct msr_data apic_base_msr;
11328 struct desc_ptr dt;
11330 if (!kvm_is_valid_sregs(vcpu, sregs))
11333 apic_base_msr.data = sregs->apic_base;
11334 apic_base_msr.host_initiated = true;
11335 if (kvm_set_apic_base(vcpu, &apic_base_msr))
11338 if (vcpu->arch.guest_state_protected)
11341 dt.size = sregs->idt.limit;
11342 dt.address = sregs->idt.base;
11343 static_call(kvm_x86_set_idt)(vcpu, &dt);
11344 dt.size = sregs->gdt.limit;
11345 dt.address = sregs->gdt.base;
11346 static_call(kvm_x86_set_gdt)(vcpu, &dt);
11348 vcpu->arch.cr2 = sregs->cr2;
11349 *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
11350 vcpu->arch.cr3 = sregs->cr3;
11351 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11352 static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
11354 kvm_set_cr8(vcpu, sregs->cr8);
11356 *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
11357 static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
11359 *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
11360 static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
11361 vcpu->arch.cr0 = sregs->cr0;
11363 *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
11364 static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
11366 if (update_pdptrs) {
11367 idx = srcu_read_lock(&vcpu->kvm->srcu);
11368 if (is_pae_paging(vcpu)) {
11369 load_pdptrs(vcpu, kvm_read_cr3(vcpu));
11370 *mmu_reset_needed = 1;
11372 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11375 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
11376 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
11377 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
11378 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
11379 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
11380 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
11382 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
11383 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
11385 update_cr8_intercept(vcpu);
11387 /* Older userspace won't unhalt the vcpu on reset. */
11388 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
11389 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
11390 !is_protmode(vcpu))
11391 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11396 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11398 int pending_vec, max_bits;
11399 int mmu_reset_needed = 0;
11400 int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
11405 if (mmu_reset_needed)
11406 kvm_mmu_reset_context(vcpu);
11408 max_bits = KVM_NR_INTERRUPTS;
11409 pending_vec = find_first_bit(
11410 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
11412 if (pending_vec < max_bits) {
11413 kvm_queue_interrupt(vcpu, pending_vec, false);
11414 pr_debug("Set back pending irq %d\n", pending_vec);
11415 kvm_make_request(KVM_REQ_EVENT, vcpu);
11420 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
11422 int mmu_reset_needed = 0;
11423 bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
11424 bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
11425 !(sregs2->efer & EFER_LMA);
11428 if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
11431 if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
11434 ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
11435 &mmu_reset_needed, !valid_pdptrs);
11439 if (valid_pdptrs) {
11440 for (i = 0; i < 4 ; i++)
11441 kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
11443 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
11444 mmu_reset_needed = 1;
11445 vcpu->arch.pdptrs_from_userspace = true;
11447 if (mmu_reset_needed)
11448 kvm_mmu_reset_context(vcpu);
11452 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
11453 struct kvm_sregs *sregs)
11458 ret = __set_sregs(vcpu, sregs);
11463 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
11466 struct kvm_vcpu *vcpu;
11472 down_write(&kvm->arch.apicv_update_lock);
11474 kvm_for_each_vcpu(i, vcpu, kvm) {
11475 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
11480 __kvm_set_or_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_BLOCKIRQ, set);
11481 up_write(&kvm->arch.apicv_update_lock);
11484 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
11485 struct kvm_guest_debug *dbg)
11487 unsigned long rflags;
11490 if (vcpu->arch.guest_state_protected)
11495 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
11497 if (kvm_is_exception_pending(vcpu))
11499 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
11500 kvm_queue_exception(vcpu, DB_VECTOR);
11502 kvm_queue_exception(vcpu, BP_VECTOR);
11506 * Read rflags as long as potentially injected trace flags are still
11509 rflags = kvm_get_rflags(vcpu);
11511 vcpu->guest_debug = dbg->control;
11512 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
11513 vcpu->guest_debug = 0;
11515 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
11516 for (i = 0; i < KVM_NR_DB_REGS; ++i)
11517 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
11518 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
11520 for (i = 0; i < KVM_NR_DB_REGS; i++)
11521 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
11523 kvm_update_dr7(vcpu);
11525 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11526 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
11529 * Trigger an rflags update that will inject or remove the trace
11532 kvm_set_rflags(vcpu, rflags);
11534 static_call(kvm_x86_update_exception_bitmap)(vcpu);
11536 kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
11546 * Translate a guest virtual address to a guest physical address.
11548 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
11549 struct kvm_translation *tr)
11551 unsigned long vaddr = tr->linear_address;
11557 idx = srcu_read_lock(&vcpu->kvm->srcu);
11558 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
11559 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11560 tr->physical_address = gpa;
11561 tr->valid = gpa != INVALID_GPA;
11569 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11571 struct fxregs_state *fxsave;
11573 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11578 fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11579 memcpy(fpu->fpr, fxsave->st_space, 128);
11580 fpu->fcw = fxsave->cwd;
11581 fpu->fsw = fxsave->swd;
11582 fpu->ftwx = fxsave->twd;
11583 fpu->last_opcode = fxsave->fop;
11584 fpu->last_ip = fxsave->rip;
11585 fpu->last_dp = fxsave->rdp;
11586 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
11592 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11594 struct fxregs_state *fxsave;
11596 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11601 fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11603 memcpy(fxsave->st_space, fpu->fpr, 128);
11604 fxsave->cwd = fpu->fcw;
11605 fxsave->swd = fpu->fsw;
11606 fxsave->twd = fpu->ftwx;
11607 fxsave->fop = fpu->last_opcode;
11608 fxsave->rip = fpu->last_ip;
11609 fxsave->rdp = fpu->last_dp;
11610 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11616 static void store_regs(struct kvm_vcpu *vcpu)
11618 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11620 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11621 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11623 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11624 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11626 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11627 kvm_vcpu_ioctl_x86_get_vcpu_events(
11628 vcpu, &vcpu->run->s.regs.events);
11631 static int sync_regs(struct kvm_vcpu *vcpu)
11633 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11634 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11635 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11637 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11638 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11640 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11642 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11643 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11644 vcpu, &vcpu->run->s.regs.events))
11646 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11652 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11654 if (kvm_check_tsc_unstable() && kvm->created_vcpus)
11655 pr_warn_once("SMP vm created on host with unstable TSC; "
11656 "guest TSC will not be reliable\n");
11658 if (!kvm->arch.max_vcpu_ids)
11659 kvm->arch.max_vcpu_ids = KVM_MAX_VCPU_IDS;
11661 if (id >= kvm->arch.max_vcpu_ids)
11664 return static_call(kvm_x86_vcpu_precreate)(kvm);
11667 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11672 vcpu->arch.last_vmentry_cpu = -1;
11673 vcpu->arch.regs_avail = ~0;
11674 vcpu->arch.regs_dirty = ~0;
11676 kvm_gpc_init(&vcpu->arch.pv_time, vcpu->kvm, vcpu, KVM_HOST_USES_PFN);
11678 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11679 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11681 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11683 r = kvm_mmu_create(vcpu);
11687 if (irqchip_in_kernel(vcpu->kvm)) {
11688 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11690 goto fail_mmu_destroy;
11693 * Defer evaluating inhibits until the vCPU is first run, as
11694 * this vCPU will not get notified of any changes until this
11695 * vCPU is visible to other vCPUs (marked online and added to
11696 * the set of vCPUs). Opportunistically mark APICv active as
11697 * VMX in particularly is highly unlikely to have inhibits.
11698 * Ignore the current per-VM APICv state so that vCPU creation
11699 * is guaranteed to run with a deterministic value, the request
11700 * will ensure the vCPU gets the correct state before VM-Entry.
11702 if (enable_apicv) {
11703 vcpu->arch.apic->apicv_active = true;
11704 kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
11707 static_branch_inc(&kvm_has_noapic_vcpu);
11711 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11713 goto fail_free_lapic;
11714 vcpu->arch.pio_data = page_address(page);
11716 vcpu->arch.mce_banks = kcalloc(KVM_MAX_MCE_BANKS * 4, sizeof(u64),
11717 GFP_KERNEL_ACCOUNT);
11718 vcpu->arch.mci_ctl2_banks = kcalloc(KVM_MAX_MCE_BANKS, sizeof(u64),
11719 GFP_KERNEL_ACCOUNT);
11720 if (!vcpu->arch.mce_banks || !vcpu->arch.mci_ctl2_banks)
11721 goto fail_free_mce_banks;
11722 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11724 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11725 GFP_KERNEL_ACCOUNT))
11726 goto fail_free_mce_banks;
11728 if (!alloc_emulate_ctxt(vcpu))
11729 goto free_wbinvd_dirty_mask;
11731 if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11732 pr_err("failed to allocate vcpu's fpu\n");
11733 goto free_emulate_ctxt;
11736 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11737 vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11739 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11741 kvm_async_pf_hash_reset(vcpu);
11743 vcpu->arch.perf_capabilities = kvm_caps.supported_perf_cap;
11744 kvm_pmu_init(vcpu);
11746 vcpu->arch.pending_external_vector = -1;
11747 vcpu->arch.preempted_in_kernel = false;
11749 #if IS_ENABLED(CONFIG_HYPERV)
11750 vcpu->arch.hv_root_tdp = INVALID_PAGE;
11753 r = static_call(kvm_x86_vcpu_create)(vcpu);
11755 goto free_guest_fpu;
11757 vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11758 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11759 kvm_xen_init_vcpu(vcpu);
11760 kvm_vcpu_mtrr_init(vcpu);
11762 kvm_set_tsc_khz(vcpu, vcpu->kvm->arch.default_tsc_khz);
11763 kvm_vcpu_reset(vcpu, false);
11764 kvm_init_mmu(vcpu);
11769 fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11771 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11772 free_wbinvd_dirty_mask:
11773 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11774 fail_free_mce_banks:
11775 kfree(vcpu->arch.mce_banks);
11776 kfree(vcpu->arch.mci_ctl2_banks);
11777 free_page((unsigned long)vcpu->arch.pio_data);
11779 kvm_free_lapic(vcpu);
11781 kvm_mmu_destroy(vcpu);
11785 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11787 struct kvm *kvm = vcpu->kvm;
11789 if (mutex_lock_killable(&vcpu->mutex))
11792 kvm_synchronize_tsc(vcpu, 0);
11795 /* poll control enabled by default */
11796 vcpu->arch.msr_kvm_poll_control = 1;
11798 mutex_unlock(&vcpu->mutex);
11800 if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11801 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11802 KVMCLOCK_SYNC_PERIOD);
11805 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11809 kvmclock_reset(vcpu);
11811 static_call(kvm_x86_vcpu_free)(vcpu);
11813 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11814 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11815 fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11817 kvm_xen_destroy_vcpu(vcpu);
11818 kvm_hv_vcpu_uninit(vcpu);
11819 kvm_pmu_destroy(vcpu);
11820 kfree(vcpu->arch.mce_banks);
11821 kfree(vcpu->arch.mci_ctl2_banks);
11822 kvm_free_lapic(vcpu);
11823 idx = srcu_read_lock(&vcpu->kvm->srcu);
11824 kvm_mmu_destroy(vcpu);
11825 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11826 free_page((unsigned long)vcpu->arch.pio_data);
11827 kvfree(vcpu->arch.cpuid_entries);
11828 if (!lapic_in_kernel(vcpu))
11829 static_branch_dec(&kvm_has_noapic_vcpu);
11832 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11834 struct kvm_cpuid_entry2 *cpuid_0x1;
11835 unsigned long old_cr0 = kvm_read_cr0(vcpu);
11836 unsigned long new_cr0;
11839 * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11840 * to handle side effects. RESET emulation hits those flows and relies
11841 * on emulated/virtualized registers, including those that are loaded
11842 * into hardware, to be zeroed at vCPU creation. Use CRs as a sentinel
11843 * to detect improper or missing initialization.
11845 WARN_ON_ONCE(!init_event &&
11846 (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11849 * SVM doesn't unconditionally VM-Exit on INIT and SHUTDOWN, thus it's
11850 * possible to INIT the vCPU while L2 is active. Force the vCPU back
11851 * into L1 as EFER.SVME is cleared on INIT (along with all other EFER
11852 * bits), i.e. virtualization is disabled.
11854 if (is_guest_mode(vcpu))
11855 kvm_leave_nested(vcpu);
11857 kvm_lapic_reset(vcpu, init_event);
11859 WARN_ON_ONCE(is_guest_mode(vcpu) || is_smm(vcpu));
11860 vcpu->arch.hflags = 0;
11862 vcpu->arch.smi_pending = 0;
11863 vcpu->arch.smi_count = 0;
11864 atomic_set(&vcpu->arch.nmi_queued, 0);
11865 vcpu->arch.nmi_pending = 0;
11866 vcpu->arch.nmi_injected = false;
11867 kvm_clear_interrupt_queue(vcpu);
11868 kvm_clear_exception_queue(vcpu);
11870 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11871 kvm_update_dr0123(vcpu);
11872 vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11873 vcpu->arch.dr7 = DR7_FIXED_1;
11874 kvm_update_dr7(vcpu);
11876 vcpu->arch.cr2 = 0;
11878 kvm_make_request(KVM_REQ_EVENT, vcpu);
11879 vcpu->arch.apf.msr_en_val = 0;
11880 vcpu->arch.apf.msr_int_val = 0;
11881 vcpu->arch.st.msr_val = 0;
11883 kvmclock_reset(vcpu);
11885 kvm_clear_async_pf_completion_queue(vcpu);
11886 kvm_async_pf_hash_reset(vcpu);
11887 vcpu->arch.apf.halted = false;
11889 if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11890 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11893 * All paths that lead to INIT are required to load the guest's
11894 * FPU state (because most paths are buried in KVM_RUN).
11897 kvm_put_guest_fpu(vcpu);
11899 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11900 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11903 kvm_load_guest_fpu(vcpu);
11907 kvm_pmu_reset(vcpu);
11908 vcpu->arch.smbase = 0x30000;
11910 vcpu->arch.msr_misc_features_enables = 0;
11911 vcpu->arch.ia32_misc_enable_msr = MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL |
11912 MSR_IA32_MISC_ENABLE_BTS_UNAVAIL;
11914 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11915 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11918 /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11919 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11920 kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11923 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11924 * if no CPUID match is found. Note, it's impossible to get a match at
11925 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11926 * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11927 * on RESET. But, go through the motions in case that's ever remedied.
11929 cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1);
11930 kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11932 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11934 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11935 kvm_rip_write(vcpu, 0xfff0);
11937 vcpu->arch.cr3 = 0;
11938 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11941 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
11942 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11943 * (or qualify) that with a footnote stating that CD/NW are preserved.
11945 new_cr0 = X86_CR0_ET;
11947 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11949 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11951 static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11952 static_call(kvm_x86_set_cr4)(vcpu, 0);
11953 static_call(kvm_x86_set_efer)(vcpu, 0);
11954 static_call(kvm_x86_update_exception_bitmap)(vcpu);
11957 * On the standard CR0/CR4/EFER modification paths, there are several
11958 * complex conditions determining whether the MMU has to be reset and/or
11959 * which PCIDs have to be flushed. However, CR0.WP and the paging-related
11960 * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
11961 * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
11962 * CR0 will be '0' prior to RESET). So we only need to check CR0.PG here.
11964 if (old_cr0 & X86_CR0_PG) {
11965 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11966 kvm_mmu_reset_context(vcpu);
11970 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
11971 * APM states the TLBs are untouched by INIT, but it also states that
11972 * the TLBs are flushed on "External initialization of the processor."
11973 * Flush the guest TLB regardless of vendor, there is no meaningful
11974 * benefit in relying on the guest to flush the TLB immediately after
11975 * INIT. A spurious TLB flush is benign and likely negligible from a
11976 * performance perspective.
11979 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11981 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11983 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11985 struct kvm_segment cs;
11987 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11988 cs.selector = vector << 8;
11989 cs.base = vector << 12;
11990 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11991 kvm_rip_write(vcpu, 0);
11993 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11995 int kvm_arch_hardware_enable(void)
11998 struct kvm_vcpu *vcpu;
12003 bool stable, backwards_tsc = false;
12005 kvm_user_return_msr_cpu_online();
12007 ret = kvm_x86_check_processor_compatibility();
12011 ret = static_call(kvm_x86_hardware_enable)();
12015 local_tsc = rdtsc();
12016 stable = !kvm_check_tsc_unstable();
12017 list_for_each_entry(kvm, &vm_list, vm_list) {
12018 kvm_for_each_vcpu(i, vcpu, kvm) {
12019 if (!stable && vcpu->cpu == smp_processor_id())
12020 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
12021 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
12022 backwards_tsc = true;
12023 if (vcpu->arch.last_host_tsc > max_tsc)
12024 max_tsc = vcpu->arch.last_host_tsc;
12030 * Sometimes, even reliable TSCs go backwards. This happens on
12031 * platforms that reset TSC during suspend or hibernate actions, but
12032 * maintain synchronization. We must compensate. Fortunately, we can
12033 * detect that condition here, which happens early in CPU bringup,
12034 * before any KVM threads can be running. Unfortunately, we can't
12035 * bring the TSCs fully up to date with real time, as we aren't yet far
12036 * enough into CPU bringup that we know how much real time has actually
12037 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
12038 * variables that haven't been updated yet.
12040 * So we simply find the maximum observed TSC above, then record the
12041 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
12042 * the adjustment will be applied. Note that we accumulate
12043 * adjustments, in case multiple suspend cycles happen before some VCPU
12044 * gets a chance to run again. In the event that no KVM threads get a
12045 * chance to run, we will miss the entire elapsed period, as we'll have
12046 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
12047 * loose cycle time. This isn't too big a deal, since the loss will be
12048 * uniform across all VCPUs (not to mention the scenario is extremely
12049 * unlikely). It is possible that a second hibernate recovery happens
12050 * much faster than a first, causing the observed TSC here to be
12051 * smaller; this would require additional padding adjustment, which is
12052 * why we set last_host_tsc to the local tsc observed here.
12054 * N.B. - this code below runs only on platforms with reliable TSC,
12055 * as that is the only way backwards_tsc is set above. Also note
12056 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
12057 * have the same delta_cyc adjustment applied if backwards_tsc
12058 * is detected. Note further, this adjustment is only done once,
12059 * as we reset last_host_tsc on all VCPUs to stop this from being
12060 * called multiple times (one for each physical CPU bringup).
12062 * Platforms with unreliable TSCs don't have to deal with this, they
12063 * will be compensated by the logic in vcpu_load, which sets the TSC to
12064 * catchup mode. This will catchup all VCPUs to real time, but cannot
12065 * guarantee that they stay in perfect synchronization.
12067 if (backwards_tsc) {
12068 u64 delta_cyc = max_tsc - local_tsc;
12069 list_for_each_entry(kvm, &vm_list, vm_list) {
12070 kvm->arch.backwards_tsc_observed = true;
12071 kvm_for_each_vcpu(i, vcpu, kvm) {
12072 vcpu->arch.tsc_offset_adjustment += delta_cyc;
12073 vcpu->arch.last_host_tsc = local_tsc;
12074 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
12078 * We have to disable TSC offset matching.. if you were
12079 * booting a VM while issuing an S4 host suspend....
12080 * you may have some problem. Solving this issue is
12081 * left as an exercise to the reader.
12083 kvm->arch.last_tsc_nsec = 0;
12084 kvm->arch.last_tsc_write = 0;
12091 void kvm_arch_hardware_disable(void)
12093 static_call(kvm_x86_hardware_disable)();
12094 drop_user_return_notifiers();
12097 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
12099 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
12102 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
12104 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
12107 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
12108 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
12110 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
12112 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
12114 vcpu->arch.l1tf_flush_l1d = true;
12115 if (pmu->version && unlikely(pmu->event_count)) {
12116 pmu->need_cleanup = true;
12117 kvm_make_request(KVM_REQ_PMU, vcpu);
12119 static_call(kvm_x86_sched_in)(vcpu, cpu);
12122 void kvm_arch_free_vm(struct kvm *kvm)
12124 kfree(to_kvm_hv(kvm)->hv_pa_pg);
12125 __kvm_arch_free_vm(kvm);
12129 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
12132 unsigned long flags;
12137 ret = kvm_page_track_init(kvm);
12141 ret = kvm_mmu_init_vm(kvm);
12143 goto out_page_track;
12145 ret = static_call(kvm_x86_vm_init)(kvm);
12147 goto out_uninit_mmu;
12149 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
12150 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
12151 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
12153 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
12154 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
12155 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
12156 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
12157 &kvm->arch.irq_sources_bitmap);
12159 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
12160 mutex_init(&kvm->arch.apic_map_lock);
12161 seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
12162 kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
12164 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
12165 pvclock_update_vm_gtod_copy(kvm);
12166 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
12168 kvm->arch.default_tsc_khz = max_tsc_khz ? : tsc_khz;
12169 kvm->arch.guest_can_read_msr_platform_info = true;
12170 kvm->arch.enable_pmu = enable_pmu;
12172 #if IS_ENABLED(CONFIG_HYPERV)
12173 spin_lock_init(&kvm->arch.hv_root_tdp_lock);
12174 kvm->arch.hv_root_tdp = INVALID_PAGE;
12177 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
12178 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
12180 kvm_apicv_init(kvm);
12181 kvm_hv_init_vm(kvm);
12182 kvm_xen_init_vm(kvm);
12187 kvm_mmu_uninit_vm(kvm);
12189 kvm_page_track_cleanup(kvm);
12194 int kvm_arch_post_init_vm(struct kvm *kvm)
12196 return kvm_mmu_post_init_vm(kvm);
12199 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
12202 kvm_mmu_unload(vcpu);
12206 static void kvm_unload_vcpu_mmus(struct kvm *kvm)
12209 struct kvm_vcpu *vcpu;
12211 kvm_for_each_vcpu(i, vcpu, kvm) {
12212 kvm_clear_async_pf_completion_queue(vcpu);
12213 kvm_unload_vcpu_mmu(vcpu);
12217 void kvm_arch_sync_events(struct kvm *kvm)
12219 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
12220 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
12225 * __x86_set_memory_region: Setup KVM internal memory slot
12227 * @kvm: the kvm pointer to the VM.
12228 * @id: the slot ID to setup.
12229 * @gpa: the GPA to install the slot (unused when @size == 0).
12230 * @size: the size of the slot. Set to zero to uninstall a slot.
12232 * This function helps to setup a KVM internal memory slot. Specify
12233 * @size > 0 to install a new slot, while @size == 0 to uninstall a
12234 * slot. The return code can be one of the following:
12236 * HVA: on success (uninstall will return a bogus HVA)
12239 * The caller should always use IS_ERR() to check the return value
12240 * before use. Note, the KVM internal memory slots are guaranteed to
12241 * remain valid and unchanged until the VM is destroyed, i.e., the
12242 * GPA->HVA translation will not change. However, the HVA is a user
12243 * address, i.e. its accessibility is not guaranteed, and must be
12244 * accessed via __copy_{to,from}_user().
12246 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
12250 unsigned long hva, old_npages;
12251 struct kvm_memslots *slots = kvm_memslots(kvm);
12252 struct kvm_memory_slot *slot;
12254 /* Called with kvm->slots_lock held. */
12255 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
12256 return ERR_PTR_USR(-EINVAL);
12258 slot = id_to_memslot(slots, id);
12260 if (slot && slot->npages)
12261 return ERR_PTR_USR(-EEXIST);
12264 * MAP_SHARED to prevent internal slot pages from being moved
12267 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
12268 MAP_SHARED | MAP_ANONYMOUS, 0);
12269 if (IS_ERR((void *)hva))
12270 return (void __user *)hva;
12272 if (!slot || !slot->npages)
12275 old_npages = slot->npages;
12276 hva = slot->userspace_addr;
12279 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
12280 struct kvm_userspace_memory_region m;
12282 m.slot = id | (i << 16);
12284 m.guest_phys_addr = gpa;
12285 m.userspace_addr = hva;
12286 m.memory_size = size;
12287 r = __kvm_set_memory_region(kvm, &m);
12289 return ERR_PTR_USR(r);
12293 vm_munmap(hva, old_npages * PAGE_SIZE);
12295 return (void __user *)hva;
12297 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
12299 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
12301 kvm_mmu_pre_destroy_vm(kvm);
12304 void kvm_arch_destroy_vm(struct kvm *kvm)
12306 if (current->mm == kvm->mm) {
12308 * Free memory regions allocated on behalf of userspace,
12309 * unless the memory map has changed due to process exit
12312 mutex_lock(&kvm->slots_lock);
12313 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
12315 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
12317 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
12318 mutex_unlock(&kvm->slots_lock);
12320 kvm_unload_vcpu_mmus(kvm);
12321 static_call_cond(kvm_x86_vm_destroy)(kvm);
12322 kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
12323 kvm_pic_destroy(kvm);
12324 kvm_ioapic_destroy(kvm);
12325 kvm_destroy_vcpus(kvm);
12326 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
12327 kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
12328 kvm_mmu_uninit_vm(kvm);
12329 kvm_page_track_cleanup(kvm);
12330 kvm_xen_destroy_vm(kvm);
12331 kvm_hv_destroy_vm(kvm);
12334 static void memslot_rmap_free(struct kvm_memory_slot *slot)
12338 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
12339 kvfree(slot->arch.rmap[i]);
12340 slot->arch.rmap[i] = NULL;
12344 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
12348 memslot_rmap_free(slot);
12350 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12351 kvfree(slot->arch.lpage_info[i - 1]);
12352 slot->arch.lpage_info[i - 1] = NULL;
12355 kvm_page_track_free_memslot(slot);
12358 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
12360 const int sz = sizeof(*slot->arch.rmap[0]);
12363 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
12365 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12367 if (slot->arch.rmap[i])
12370 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
12371 if (!slot->arch.rmap[i]) {
12372 memslot_rmap_free(slot);
12380 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
12381 struct kvm_memory_slot *slot)
12383 unsigned long npages = slot->npages;
12387 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
12388 * old arrays will be freed by __kvm_set_memory_region() if installing
12389 * the new memslot is successful.
12391 memset(&slot->arch, 0, sizeof(slot->arch));
12393 if (kvm_memslots_have_rmaps(kvm)) {
12394 r = memslot_rmap_alloc(slot, npages);
12399 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12400 struct kvm_lpage_info *linfo;
12401 unsigned long ugfn;
12405 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12407 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
12411 slot->arch.lpage_info[i - 1] = linfo;
12413 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
12414 linfo[0].disallow_lpage = 1;
12415 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
12416 linfo[lpages - 1].disallow_lpage = 1;
12417 ugfn = slot->userspace_addr >> PAGE_SHIFT;
12419 * If the gfn and userspace address are not aligned wrt each
12420 * other, disable large page support for this slot.
12422 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
12425 for (j = 0; j < lpages; ++j)
12426 linfo[j].disallow_lpage = 1;
12430 if (kvm_page_track_create_memslot(kvm, slot, npages))
12436 memslot_rmap_free(slot);
12438 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12439 kvfree(slot->arch.lpage_info[i - 1]);
12440 slot->arch.lpage_info[i - 1] = NULL;
12445 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
12447 struct kvm_vcpu *vcpu;
12451 * memslots->generation has been incremented.
12452 * mmio generation may have reached its maximum value.
12454 kvm_mmu_invalidate_mmio_sptes(kvm, gen);
12456 /* Force re-initialization of steal_time cache */
12457 kvm_for_each_vcpu(i, vcpu, kvm)
12458 kvm_vcpu_kick(vcpu);
12461 int kvm_arch_prepare_memory_region(struct kvm *kvm,
12462 const struct kvm_memory_slot *old,
12463 struct kvm_memory_slot *new,
12464 enum kvm_mr_change change)
12466 if (change == KVM_MR_CREATE || change == KVM_MR_MOVE) {
12467 if ((new->base_gfn + new->npages - 1) > kvm_mmu_max_gfn())
12470 return kvm_alloc_memslot_metadata(kvm, new);
12473 if (change == KVM_MR_FLAGS_ONLY)
12474 memcpy(&new->arch, &old->arch, sizeof(old->arch));
12475 else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
12482 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
12484 struct kvm_arch *ka = &kvm->arch;
12486 if (!kvm_x86_ops.cpu_dirty_log_size)
12489 if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
12490 (!enable && --ka->cpu_dirty_logging_count == 0))
12491 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
12493 WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
12496 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
12497 struct kvm_memory_slot *old,
12498 const struct kvm_memory_slot *new,
12499 enum kvm_mr_change change)
12501 u32 old_flags = old ? old->flags : 0;
12502 u32 new_flags = new ? new->flags : 0;
12503 bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
12506 * Update CPU dirty logging if dirty logging is being toggled. This
12507 * applies to all operations.
12509 if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
12510 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
12513 * Nothing more to do for RO slots (which can't be dirtied and can't be
12514 * made writable) or CREATE/MOVE/DELETE of a slot.
12516 * For a memslot with dirty logging disabled:
12517 * CREATE: No dirty mappings will already exist.
12518 * MOVE/DELETE: The old mappings will already have been cleaned up by
12519 * kvm_arch_flush_shadow_memslot()
12521 * For a memslot with dirty logging enabled:
12522 * CREATE: No shadow pages exist, thus nothing to write-protect
12523 * and no dirty bits to clear.
12524 * MOVE/DELETE: The old mappings will already have been cleaned up by
12525 * kvm_arch_flush_shadow_memslot().
12527 if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
12531 * READONLY and non-flags changes were filtered out above, and the only
12532 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12533 * logging isn't being toggled on or off.
12535 if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
12538 if (!log_dirty_pages) {
12540 * Dirty logging tracks sptes in 4k granularity, meaning that
12541 * large sptes have to be split. If live migration succeeds,
12542 * the guest in the source machine will be destroyed and large
12543 * sptes will be created in the destination. However, if the
12544 * guest continues to run in the source machine (for example if
12545 * live migration fails), small sptes will remain around and
12546 * cause bad performance.
12548 * Scan sptes if dirty logging has been stopped, dropping those
12549 * which can be collapsed into a single large-page spte. Later
12550 * page faults will create the large-page sptes.
12552 kvm_mmu_zap_collapsible_sptes(kvm, new);
12555 * Initially-all-set does not require write protecting any page,
12556 * because they're all assumed to be dirty.
12558 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
12561 if (READ_ONCE(eager_page_split))
12562 kvm_mmu_slot_try_split_huge_pages(kvm, new, PG_LEVEL_4K);
12564 if (kvm_x86_ops.cpu_dirty_log_size) {
12565 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
12566 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
12568 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
12572 * Unconditionally flush the TLBs after enabling dirty logging.
12573 * A flush is almost always going to be necessary (see below),
12574 * and unconditionally flushing allows the helpers to omit
12575 * the subtly complex checks when removing write access.
12577 * Do the flush outside of mmu_lock to reduce the amount of
12578 * time mmu_lock is held. Flushing after dropping mmu_lock is
12579 * safe as KVM only needs to guarantee the slot is fully
12580 * write-protected before returning to userspace, i.e. before
12581 * userspace can consume the dirty status.
12583 * Flushing outside of mmu_lock requires KVM to be careful when
12584 * making decisions based on writable status of an SPTE, e.g. a
12585 * !writable SPTE doesn't guarantee a CPU can't perform writes.
12587 * Specifically, KVM also write-protects guest page tables to
12588 * monitor changes when using shadow paging, and must guarantee
12589 * no CPUs can write to those page before mmu_lock is dropped.
12590 * Because CPUs may have stale TLB entries at this point, a
12591 * !writable SPTE doesn't guarantee CPUs can't perform writes.
12593 * KVM also allows making SPTES writable outside of mmu_lock,
12594 * e.g. to allow dirty logging without taking mmu_lock.
12596 * To handle these scenarios, KVM uses a separate software-only
12597 * bit (MMU-writable) to track if a SPTE is !writable due to
12598 * a guest page table being write-protected (KVM clears the
12599 * MMU-writable flag when write-protecting for shadow paging).
12601 * The use of MMU-writable is also the primary motivation for
12602 * the unconditional flush. Because KVM must guarantee that a
12603 * CPU doesn't contain stale, writable TLB entries for a
12604 * !MMU-writable SPTE, KVM must flush if it encounters any
12605 * MMU-writable SPTE regardless of whether the actual hardware
12606 * writable bit was set. I.e. KVM is almost guaranteed to need
12607 * to flush, while unconditionally flushing allows the "remove
12608 * write access" helpers to ignore MMU-writable entirely.
12610 * See is_writable_pte() for more details (the case involving
12611 * access-tracked SPTEs is particularly relevant).
12613 kvm_arch_flush_remote_tlbs_memslot(kvm, new);
12617 void kvm_arch_commit_memory_region(struct kvm *kvm,
12618 struct kvm_memory_slot *old,
12619 const struct kvm_memory_slot *new,
12620 enum kvm_mr_change change)
12622 if (!kvm->arch.n_requested_mmu_pages &&
12623 (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
12624 unsigned long nr_mmu_pages;
12626 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
12627 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
12628 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
12631 kvm_mmu_slot_apply_flags(kvm, old, new, change);
12633 /* Free the arrays associated with the old memslot. */
12634 if (change == KVM_MR_MOVE)
12635 kvm_arch_free_memslot(kvm, old);
12638 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12640 kvm_mmu_zap_all(kvm);
12643 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12644 struct kvm_memory_slot *slot)
12646 kvm_page_track_flush_slot(kvm, slot);
12649 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12651 return (is_guest_mode(vcpu) &&
12652 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12655 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12657 if (!list_empty_careful(&vcpu->async_pf.done))
12660 if (kvm_apic_has_pending_init_or_sipi(vcpu) &&
12661 kvm_apic_init_sipi_allowed(vcpu))
12664 if (vcpu->arch.pv.pv_unhalted)
12667 if (kvm_is_exception_pending(vcpu))
12670 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12671 (vcpu->arch.nmi_pending &&
12672 static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12675 #ifdef CONFIG_KVM_SMM
12676 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12677 (vcpu->arch.smi_pending &&
12678 static_call(kvm_x86_smi_allowed)(vcpu, false)))
12682 if (kvm_arch_interrupt_allowed(vcpu) &&
12683 (kvm_cpu_has_interrupt(vcpu) ||
12684 kvm_guest_apic_has_interrupt(vcpu)))
12687 if (kvm_hv_has_stimer_pending(vcpu))
12690 if (is_guest_mode(vcpu) &&
12691 kvm_x86_ops.nested_ops->has_events &&
12692 kvm_x86_ops.nested_ops->has_events(vcpu))
12695 if (kvm_xen_has_pending_events(vcpu))
12701 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12703 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12706 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12708 if (kvm_vcpu_apicv_active(vcpu) &&
12709 static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12715 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12717 if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12720 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12721 #ifdef CONFIG_KVM_SMM
12722 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12724 kvm_test_request(KVM_REQ_EVENT, vcpu))
12727 return kvm_arch_dy_has_pending_interrupt(vcpu);
12730 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12732 if (vcpu->arch.guest_state_protected)
12735 return vcpu->arch.preempted_in_kernel;
12738 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12740 return kvm_rip_read(vcpu);
12743 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12745 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12748 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12750 return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12753 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12755 /* Can't read the RIP when guest state is protected, just return 0 */
12756 if (vcpu->arch.guest_state_protected)
12759 if (is_64_bit_mode(vcpu))
12760 return kvm_rip_read(vcpu);
12761 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12762 kvm_rip_read(vcpu));
12764 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12766 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12768 return kvm_get_linear_rip(vcpu) == linear_rip;
12770 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12772 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12774 unsigned long rflags;
12776 rflags = static_call(kvm_x86_get_rflags)(vcpu);
12777 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12778 rflags &= ~X86_EFLAGS_TF;
12781 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12783 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12785 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12786 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12787 rflags |= X86_EFLAGS_TF;
12788 static_call(kvm_x86_set_rflags)(vcpu, rflags);
12791 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12793 __kvm_set_rflags(vcpu, rflags);
12794 kvm_make_request(KVM_REQ_EVENT, vcpu);
12796 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12798 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12800 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12802 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12805 static inline u32 kvm_async_pf_next_probe(u32 key)
12807 return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12810 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12812 u32 key = kvm_async_pf_hash_fn(gfn);
12814 while (vcpu->arch.apf.gfns[key] != ~0)
12815 key = kvm_async_pf_next_probe(key);
12817 vcpu->arch.apf.gfns[key] = gfn;
12820 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12823 u32 key = kvm_async_pf_hash_fn(gfn);
12825 for (i = 0; i < ASYNC_PF_PER_VCPU &&
12826 (vcpu->arch.apf.gfns[key] != gfn &&
12827 vcpu->arch.apf.gfns[key] != ~0); i++)
12828 key = kvm_async_pf_next_probe(key);
12833 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12835 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12838 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12842 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12844 if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12848 vcpu->arch.apf.gfns[i] = ~0;
12850 j = kvm_async_pf_next_probe(j);
12851 if (vcpu->arch.apf.gfns[j] == ~0)
12853 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12855 * k lies cyclically in ]i,j]
12857 * |....j i.k.| or |.k..j i...|
12859 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12860 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12865 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12867 u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12869 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12873 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12875 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12877 return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12878 &token, offset, sizeof(token));
12881 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12883 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12886 if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12887 &val, offset, sizeof(val)))
12893 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12896 if (!kvm_pv_async_pf_enabled(vcpu))
12899 if (vcpu->arch.apf.send_user_only &&
12900 static_call(kvm_x86_get_cpl)(vcpu) == 0)
12903 if (is_guest_mode(vcpu)) {
12905 * L1 needs to opt into the special #PF vmexits that are
12906 * used to deliver async page faults.
12908 return vcpu->arch.apf.delivery_as_pf_vmexit;
12911 * Play it safe in case the guest temporarily disables paging.
12912 * The real mode IDT in particular is unlikely to have a #PF
12915 return is_paging(vcpu);
12919 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12921 if (unlikely(!lapic_in_kernel(vcpu) ||
12922 kvm_event_needs_reinjection(vcpu) ||
12923 kvm_is_exception_pending(vcpu)))
12926 if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12930 * If interrupts are off we cannot even use an artificial
12933 return kvm_arch_interrupt_allowed(vcpu);
12936 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12937 struct kvm_async_pf *work)
12939 struct x86_exception fault;
12941 trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12942 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12944 if (kvm_can_deliver_async_pf(vcpu) &&
12945 !apf_put_user_notpresent(vcpu)) {
12946 fault.vector = PF_VECTOR;
12947 fault.error_code_valid = true;
12948 fault.error_code = 0;
12949 fault.nested_page_fault = false;
12950 fault.address = work->arch.token;
12951 fault.async_page_fault = true;
12952 kvm_inject_page_fault(vcpu, &fault);
12956 * It is not possible to deliver a paravirtualized asynchronous
12957 * page fault, but putting the guest in an artificial halt state
12958 * can be beneficial nevertheless: if an interrupt arrives, we
12959 * can deliver it timely and perhaps the guest will schedule
12960 * another process. When the instruction that triggered a page
12961 * fault is retried, hopefully the page will be ready in the host.
12963 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12968 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12969 struct kvm_async_pf *work)
12971 struct kvm_lapic_irq irq = {
12972 .delivery_mode = APIC_DM_FIXED,
12973 .vector = vcpu->arch.apf.vec
12976 if (work->wakeup_all)
12977 work->arch.token = ~0; /* broadcast wakeup */
12979 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12980 trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12982 if ((work->wakeup_all || work->notpresent_injected) &&
12983 kvm_pv_async_pf_enabled(vcpu) &&
12984 !apf_put_user_ready(vcpu, work->arch.token)) {
12985 vcpu->arch.apf.pageready_pending = true;
12986 kvm_apic_set_irq(vcpu, &irq, NULL);
12989 vcpu->arch.apf.halted = false;
12990 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12993 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12995 kvm_make_request(KVM_REQ_APF_READY, vcpu);
12996 if (!vcpu->arch.apf.pageready_pending)
12997 kvm_vcpu_kick(vcpu);
13000 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
13002 if (!kvm_pv_async_pf_enabled(vcpu))
13005 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
13008 void kvm_arch_start_assignment(struct kvm *kvm)
13010 if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
13011 static_call_cond(kvm_x86_pi_start_assignment)(kvm);
13013 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
13015 void kvm_arch_end_assignment(struct kvm *kvm)
13017 atomic_dec(&kvm->arch.assigned_device_count);
13019 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
13021 bool noinstr kvm_arch_has_assigned_device(struct kvm *kvm)
13023 return arch_atomic_read(&kvm->arch.assigned_device_count);
13025 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
13027 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
13029 atomic_inc(&kvm->arch.noncoherent_dma_count);
13031 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
13033 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
13035 atomic_dec(&kvm->arch.noncoherent_dma_count);
13037 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
13039 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
13041 return atomic_read(&kvm->arch.noncoherent_dma_count);
13043 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
13045 bool kvm_arch_has_irq_bypass(void)
13050 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
13051 struct irq_bypass_producer *prod)
13053 struct kvm_kernel_irqfd *irqfd =
13054 container_of(cons, struct kvm_kernel_irqfd, consumer);
13057 irqfd->producer = prod;
13058 kvm_arch_start_assignment(irqfd->kvm);
13059 ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm,
13060 prod->irq, irqfd->gsi, 1);
13063 kvm_arch_end_assignment(irqfd->kvm);
13068 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
13069 struct irq_bypass_producer *prod)
13072 struct kvm_kernel_irqfd *irqfd =
13073 container_of(cons, struct kvm_kernel_irqfd, consumer);
13075 WARN_ON(irqfd->producer != prod);
13076 irqfd->producer = NULL;
13079 * When producer of consumer is unregistered, we change back to
13080 * remapped mode, so we can re-use the current implementation
13081 * when the irq is masked/disabled or the consumer side (KVM
13082 * int this case doesn't want to receive the interrupts.
13084 ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
13086 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
13087 " fails: %d\n", irqfd->consumer.token, ret);
13089 kvm_arch_end_assignment(irqfd->kvm);
13092 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
13093 uint32_t guest_irq, bool set)
13095 return static_call(kvm_x86_pi_update_irte)(kvm, host_irq, guest_irq, set);
13098 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
13099 struct kvm_kernel_irq_routing_entry *new)
13101 if (new->type != KVM_IRQ_ROUTING_MSI)
13104 return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
13107 bool kvm_vector_hashing_enabled(void)
13109 return vector_hashing;
13112 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
13114 return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
13116 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
13119 int kvm_spec_ctrl_test_value(u64 value)
13122 * test that setting IA32_SPEC_CTRL to given value
13123 * is allowed by the host processor
13127 unsigned long flags;
13130 local_irq_save(flags);
13132 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
13134 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
13137 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
13139 local_irq_restore(flags);
13143 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
13145 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
13147 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
13148 struct x86_exception fault;
13149 u64 access = error_code &
13150 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
13152 if (!(error_code & PFERR_PRESENT_MASK) ||
13153 mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != INVALID_GPA) {
13155 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
13156 * tables probably do not match the TLB. Just proceed
13157 * with the error code that the processor gave.
13159 fault.vector = PF_VECTOR;
13160 fault.error_code_valid = true;
13161 fault.error_code = error_code;
13162 fault.nested_page_fault = false;
13163 fault.address = gva;
13164 fault.async_page_fault = false;
13166 vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
13168 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
13171 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
13172 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
13173 * indicates whether exit to userspace is needed.
13175 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
13176 struct x86_exception *e)
13178 if (r == X86EMUL_PROPAGATE_FAULT) {
13179 if (KVM_BUG_ON(!e, vcpu->kvm))
13182 kvm_inject_emulated_page_fault(vcpu, e);
13187 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
13188 * while handling a VMX instruction KVM could've handled the request
13189 * correctly by exiting to userspace and performing I/O but there
13190 * doesn't seem to be a real use-case behind such requests, just return
13191 * KVM_EXIT_INTERNAL_ERROR for now.
13193 kvm_prepare_emulation_failure_exit(vcpu);
13197 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
13199 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
13202 struct x86_exception e;
13209 r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
13210 if (r != X86EMUL_CONTINUE)
13211 return kvm_handle_memory_failure(vcpu, r, &e);
13213 if (operand.pcid >> 12 != 0) {
13214 kvm_inject_gp(vcpu, 0);
13218 pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
13221 case INVPCID_TYPE_INDIV_ADDR:
13222 if ((!pcid_enabled && (operand.pcid != 0)) ||
13223 is_noncanonical_address(operand.gla, vcpu)) {
13224 kvm_inject_gp(vcpu, 0);
13227 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
13228 return kvm_skip_emulated_instruction(vcpu);
13230 case INVPCID_TYPE_SINGLE_CTXT:
13231 if (!pcid_enabled && (operand.pcid != 0)) {
13232 kvm_inject_gp(vcpu, 0);
13236 kvm_invalidate_pcid(vcpu, operand.pcid);
13237 return kvm_skip_emulated_instruction(vcpu);
13239 case INVPCID_TYPE_ALL_NON_GLOBAL:
13241 * Currently, KVM doesn't mark global entries in the shadow
13242 * page tables, so a non-global flush just degenerates to a
13243 * global flush. If needed, we could optimize this later by
13244 * keeping track of global entries in shadow page tables.
13248 case INVPCID_TYPE_ALL_INCL_GLOBAL:
13249 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
13250 return kvm_skip_emulated_instruction(vcpu);
13253 kvm_inject_gp(vcpu, 0);
13257 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
13259 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
13261 struct kvm_run *run = vcpu->run;
13262 struct kvm_mmio_fragment *frag;
13265 BUG_ON(!vcpu->mmio_needed);
13267 /* Complete previous fragment */
13268 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
13269 len = min(8u, frag->len);
13270 if (!vcpu->mmio_is_write)
13271 memcpy(frag->data, run->mmio.data, len);
13273 if (frag->len <= 8) {
13274 /* Switch to the next fragment. */
13276 vcpu->mmio_cur_fragment++;
13278 /* Go forward to the next mmio piece. */
13284 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
13285 vcpu->mmio_needed = 0;
13287 // VMG change, at this point, we're always done
13288 // RIP has already been advanced
13292 // More MMIO is needed
13293 run->mmio.phys_addr = frag->gpa;
13294 run->mmio.len = min(8u, frag->len);
13295 run->mmio.is_write = vcpu->mmio_is_write;
13296 if (run->mmio.is_write)
13297 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
13298 run->exit_reason = KVM_EXIT_MMIO;
13300 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
13305 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
13309 struct kvm_mmio_fragment *frag;
13314 handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
13315 if (handled == bytes)
13322 /*TODO: Check if need to increment number of frags */
13323 frag = vcpu->mmio_fragments;
13324 vcpu->mmio_nr_fragments = 1;
13329 vcpu->mmio_needed = 1;
13330 vcpu->mmio_cur_fragment = 0;
13332 vcpu->run->mmio.phys_addr = gpa;
13333 vcpu->run->mmio.len = min(8u, frag->len);
13334 vcpu->run->mmio.is_write = 1;
13335 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
13336 vcpu->run->exit_reason = KVM_EXIT_MMIO;
13338 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
13342 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
13344 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
13348 struct kvm_mmio_fragment *frag;
13353 handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
13354 if (handled == bytes)
13361 /*TODO: Check if need to increment number of frags */
13362 frag = vcpu->mmio_fragments;
13363 vcpu->mmio_nr_fragments = 1;
13368 vcpu->mmio_needed = 1;
13369 vcpu->mmio_cur_fragment = 0;
13371 vcpu->run->mmio.phys_addr = gpa;
13372 vcpu->run->mmio.len = min(8u, frag->len);
13373 vcpu->run->mmio.is_write = 0;
13374 vcpu->run->exit_reason = KVM_EXIT_MMIO;
13376 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
13380 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
13382 static void advance_sev_es_emulated_pio(struct kvm_vcpu *vcpu, unsigned count, int size)
13384 vcpu->arch.sev_pio_count -= count;
13385 vcpu->arch.sev_pio_data += count * size;
13388 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
13389 unsigned int port);
13391 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
13393 int size = vcpu->arch.pio.size;
13394 int port = vcpu->arch.pio.port;
13396 vcpu->arch.pio.count = 0;
13397 if (vcpu->arch.sev_pio_count)
13398 return kvm_sev_es_outs(vcpu, size, port);
13402 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
13406 unsigned int count =
13407 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13408 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
13410 /* memcpy done already by emulator_pio_out. */
13411 advance_sev_es_emulated_pio(vcpu, count, size);
13415 /* Emulation done by the kernel. */
13416 if (!vcpu->arch.sev_pio_count)
13420 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
13424 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13425 unsigned int port);
13427 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
13429 unsigned count = vcpu->arch.pio.count;
13430 int size = vcpu->arch.pio.size;
13431 int port = vcpu->arch.pio.port;
13433 complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
13434 advance_sev_es_emulated_pio(vcpu, count, size);
13435 if (vcpu->arch.sev_pio_count)
13436 return kvm_sev_es_ins(vcpu, size, port);
13440 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13444 unsigned int count =
13445 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13446 if (!emulator_pio_in(vcpu, size, port, vcpu->arch.sev_pio_data, count))
13449 /* Emulation done by the kernel. */
13450 advance_sev_es_emulated_pio(vcpu, count, size);
13451 if (!vcpu->arch.sev_pio_count)
13455 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
13459 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
13460 unsigned int port, void *data, unsigned int count,
13463 vcpu->arch.sev_pio_data = data;
13464 vcpu->arch.sev_pio_count = count;
13465 return in ? kvm_sev_es_ins(vcpu, size, port)
13466 : kvm_sev_es_outs(vcpu, size, port);
13468 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
13470 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
13471 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
13472 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
13473 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
13474 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
13475 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
13476 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
13477 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter);
13478 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
13479 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
13480 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
13481 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
13482 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
13483 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
13484 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
13485 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
13486 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
13487 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
13488 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
13489 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
13490 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
13491 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
13492 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_kick_vcpu_slowpath);
13493 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_doorbell);
13494 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
13495 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
13496 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
13497 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
13498 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
13500 static int __init kvm_x86_init(void)
13502 kvm_mmu_x86_module_init();
13505 module_init(kvm_x86_init);
13507 static void __exit kvm_x86_exit(void)
13510 * If module_init() is implemented, module_exit() must also be
13511 * implemented to allow module unload.
13514 module_exit(kvm_x86_exit);