arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57
  58 #include <trace/events/kvm.h>
  59
  60 #include <asm/debugreg.h>
  61 #include <asm/msr.h>
  62 #include <asm/desc.h>
  63 #include <asm/mce.h>
  64 #include <linux/kernel_stat.h>
  65 #include <asm/fpu/internal.h> /* Ugh! */
  66 #include <asm/pvclock.h>
  67 #include <asm/div64.h>
  68 #include <asm/irq_remapping.h>
  69
  70 #define CREATE_TRACE_POINTS
  71 #include "trace.h"
  72
  73 #define MAX_IO_MSRS 256
  74 #define KVM_MAX_MCE_BANKS 32
  75 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  77
  78 #define emul_to_vcpu(ctxt) \
  79         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  80
  81 /* EFER defaults:
  82  * - enable syscall per default because its emulated by KVM
  83  * - enable LME and LMA per default on 64 bit KVM
  84  */
  85 #ifdef CONFIG_X86_64
  86 static
  87 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  88 #else
  89 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  90 #endif
  91
  92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  94
  95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  96                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  97
  98 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  99 static void process_nmi(struct kvm_vcpu *vcpu);
 100 static void enter_smm(struct kvm_vcpu *vcpu);
 101 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 102
 103 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 104 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 105
 106 static bool __read_mostly ignore_msrs = 0;
 107 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 108
 109 unsigned int min_timer_period_us = 500;
 110 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 111
 112 static bool __read_mostly kvmclock_periodic_sync = true;
 113 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 114
 115 bool __read_mostly kvm_has_tsc_control;
 116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 117 u32  __read_mostly kvm_max_guest_tsc_khz;
 118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 119 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 121 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 123 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 125
 126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 127 static u32 __read_mostly tsc_tolerance_ppm = 250;
 128 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 129
 130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 131 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 132 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 133
 134 static bool __read_mostly vector_hashing = true;
 135 module_param(vector_hashing, bool, S_IRUGO);
 136
 137 static bool __read_mostly backwards_tsc_observed = false;
 138
 139 #define KVM_NR_SHARED_MSRS 16
 140
 141 struct kvm_shared_msrs_global {
 142         int nr;
 143         u32 msrs[KVM_NR_SHARED_MSRS];
 144 };
 145
 146 struct kvm_shared_msrs {
 147         struct user_return_notifier urn;
 148         bool registered;
 149         struct kvm_shared_msr_values {
 150                 u64 host;
 151                 u64 curr;
 152         } values[KVM_NR_SHARED_MSRS];
 153 };
 154
 155 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 156 static struct kvm_shared_msrs __percpu *shared_msrs;
 157
 158 struct kvm_stats_debugfs_item debugfs_entries[] = {
 159         { "pf_fixed", VCPU_STAT(pf_fixed) },
 160         { "pf_guest", VCPU_STAT(pf_guest) },
 161         { "tlb_flush", VCPU_STAT(tlb_flush) },
 162         { "invlpg", VCPU_STAT(invlpg) },
 163         { "exits", VCPU_STAT(exits) },
 164         { "io_exits", VCPU_STAT(io_exits) },
 165         { "mmio_exits", VCPU_STAT(mmio_exits) },
 166         { "signal_exits", VCPU_STAT(signal_exits) },
 167         { "irq_window", VCPU_STAT(irq_window_exits) },
 168         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 169         { "halt_exits", VCPU_STAT(halt_exits) },
 170         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 171         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 172         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 173         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 174         { "hypercalls", VCPU_STAT(hypercalls) },
 175         { "request_irq", VCPU_STAT(request_irq_exits) },
 176         { "irq_exits", VCPU_STAT(irq_exits) },
 177         { "host_state_reload", VCPU_STAT(host_state_reload) },
 178         { "efer_reload", VCPU_STAT(efer_reload) },
 179         { "fpu_reload", VCPU_STAT(fpu_reload) },
 180         { "insn_emulation", VCPU_STAT(insn_emulation) },
 181         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 182         { "irq_injections", VCPU_STAT(irq_injections) },
 183         { "nmi_injections", VCPU_STAT(nmi_injections) },
 184         { "req_event", VCPU_STAT(req_event) },
 185         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 186         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 187         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 188         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 189         { "mmu_flooded", VM_STAT(mmu_flooded) },
 190         { "mmu_recycled", VM_STAT(mmu_recycled) },
 191         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 192         { "mmu_unsync", VM_STAT(mmu_unsync) },
 193         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 194         { "largepages", VM_STAT(lpages) },
 195         { "max_mmu_page_hash_collisions",
 196                 VM_STAT(max_mmu_page_hash_collisions) },
 197         { NULL }
 198 };
 199
 200 u64 __read_mostly host_xcr0;
 201
 202 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 203
 204 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 205 {
 206         int i;
 207         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 208                 vcpu->arch.apf.gfns[i] = ~0;
 209 }
 210
 211 static void kvm_on_user_return(struct user_return_notifier *urn)
 212 {
 213         unsigned slot;
 214         struct kvm_shared_msrs *locals
 215                 = container_of(urn, struct kvm_shared_msrs, urn);
 216         struct kvm_shared_msr_values *values;
 217         unsigned long flags;
 218
 219         /*
 220          * Disabling irqs at this point since the following code could be
 221          * interrupted and executed through kvm_arch_hardware_disable()
 222          */
 223         local_irq_save(flags);
 224         if (locals->registered) {
 225                 locals->registered = false;
 226                 user_return_notifier_unregister(urn);
 227         }
 228         local_irq_restore(flags);
 229         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 230                 values = &locals->values[slot];
 231                 if (values->host != values->curr) {
 232                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 233                         values->curr = values->host;
 234                 }
 235         }
 236 }
 237
 238 static void shared_msr_update(unsigned slot, u32 msr)
 239 {
 240         u64 value;
 241         unsigned int cpu = smp_processor_id();
 242         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 243
 244         /* only read, and nobody should modify it at this time,
 245          * so don't need lock */
 246         if (slot >= shared_msrs_global.nr) {
 247                 printk(KERN_ERR "kvm: invalid MSR slot!");
 248                 return;
 249         }
 250         rdmsrl_safe(msr, &value);
 251         smsr->values[slot].host = value;
 252         smsr->values[slot].curr = value;
 253 }
 254
 255 void kvm_define_shared_msr(unsigned slot, u32 msr)
 256 {
 257         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 258         shared_msrs_global.msrs[slot] = msr;
 259         if (slot >= shared_msrs_global.nr)
 260                 shared_msrs_global.nr = slot + 1;
 261 }
 262 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 263
 264 static void kvm_shared_msr_cpu_online(void)
 265 {
 266         unsigned i;
 267
 268         for (i = 0; i < shared_msrs_global.nr; ++i)
 269                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 270 }
 271
 272 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 273 {
 274         unsigned int cpu = smp_processor_id();
 275         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 276         int err;
 277
 278         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 279                 return 0;
 280         smsr->values[slot].curr = value;
 281         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 282         if (err)
 283                 return 1;
 284
 285         if (!smsr->registered) {
 286                 smsr->urn.on_user_return = kvm_on_user_return;
 287                 user_return_notifier_register(&smsr->urn);
 288                 smsr->registered = true;
 289         }
 290         return 0;
 291 }
 292 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 293
 294 static void drop_user_return_notifiers(void)
 295 {
 296         unsigned int cpu = smp_processor_id();
 297         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 298
 299         if (smsr->registered)
 300                 kvm_on_user_return(&smsr->urn);
 301 }
 302
 303 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 304 {
 305         return vcpu->arch.apic_base;
 306 }
 307 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 308
 309 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 310 {
 311         u64 old_state = vcpu->arch.apic_base &
 312                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 313         u64 new_state = msr_info->data &
 314                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 315         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 316                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 317
 318         if (!msr_info->host_initiated &&
 319             ((msr_info->data & reserved_bits) != 0 ||
 320              new_state == X2APIC_ENABLE ||
 321              (new_state == MSR_IA32_APICBASE_ENABLE &&
 322               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 323              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 324               old_state == 0)))
 325                 return 1;
 326
 327         kvm_lapic_set_base(vcpu, msr_info->data);
 328         return 0;
 329 }
 330 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 331
 332 asmlinkage __visible void kvm_spurious_fault(void)
 333 {
 334         /* Fault while not rebooting.  We want the trace. */
 335         BUG();
 336 }
 337 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 338
 339 #define EXCPT_BENIGN            0
 340 #define EXCPT_CONTRIBUTORY      1
 341 #define EXCPT_PF                2
 342
 343 static int exception_class(int vector)
 344 {
 345         switch (vector) {
 346         case PF_VECTOR:
 347                 return EXCPT_PF;
 348         case DE_VECTOR:
 349         case TS_VECTOR:
 350         case NP_VECTOR:
 351         case SS_VECTOR:
 352         case GP_VECTOR:
 353                 return EXCPT_CONTRIBUTORY;
 354         default:
 355                 break;
 356         }
 357         return EXCPT_BENIGN;
 358 }
 359
 360 #define EXCPT_FAULT             0
 361 #define EXCPT_TRAP              1
 362 #define EXCPT_ABORT             2
 363 #define EXCPT_INTERRUPT         3
 364
 365 static int exception_type(int vector)
 366 {
 367         unsigned int mask;
 368
 369         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 370                 return EXCPT_INTERRUPT;
 371
 372         mask = 1 << vector;
 373
 374         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 375         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 376                 return EXCPT_TRAP;
 377
 378         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 379                 return EXCPT_ABORT;
 380
 381         /* Reserved exceptions will result in fault */
 382         return EXCPT_FAULT;
 383 }
 384
 385 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 386                 unsigned nr, bool has_error, u32 error_code,
 387                 bool reinject)
 388 {
 389         u32 prev_nr;
 390         int class1, class2;
 391
 392         kvm_make_request(KVM_REQ_EVENT, vcpu);
 393
 394         if (!vcpu->arch.exception.pending) {
 395         queue:
 396                 if (has_error && !is_protmode(vcpu))
 397                         has_error = false;
 398                 vcpu->arch.exception.pending = true;
 399                 vcpu->arch.exception.has_error_code = has_error;
 400                 vcpu->arch.exception.nr = nr;
 401                 vcpu->arch.exception.error_code = error_code;
 402                 vcpu->arch.exception.reinject = reinject;
 403                 return;
 404         }
 405
 406         /* to check exception */
 407         prev_nr = vcpu->arch.exception.nr;
 408         if (prev_nr == DF_VECTOR) {
 409                 /* triple fault -> shutdown */
 410                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 411                 return;
 412         }
 413         class1 = exception_class(prev_nr);
 414         class2 = exception_class(nr);
 415         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 416                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 417                 /* generate double fault per SDM Table 5-5 */
 418                 vcpu->arch.exception.pending = true;
 419                 vcpu->arch.exception.has_error_code = true;
 420                 vcpu->arch.exception.nr = DF_VECTOR;
 421                 vcpu->arch.exception.error_code = 0;
 422         } else
 423                 /* replace previous exception with a new one in a hope
 424                    that instruction re-execution will regenerate lost
 425                    exception */
 426                 goto queue;
 427 }
 428
 429 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 430 {
 431         kvm_multiple_exception(vcpu, nr, false, 0, false);
 432 }
 433 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 434
 435 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 436 {
 437         kvm_multiple_exception(vcpu, nr, false, 0, true);
 438 }
 439 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 440
 441 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 442 {
 443         if (err)
 444                 kvm_inject_gp(vcpu, 0);
 445         else
 446                 return kvm_skip_emulated_instruction(vcpu);
 447
 448         return 1;
 449 }
 450 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 451
 452 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 453 {
 454         ++vcpu->stat.pf_guest;
 455         vcpu->arch.cr2 = fault->address;
 456         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 457 }
 458 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 459
 460 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 461 {
 462         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 463                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 464         else
 465                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 466
 467         return fault->nested_page_fault;
 468 }
 469
 470 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 471 {
 472         atomic_inc(&vcpu->arch.nmi_queued);
 473         kvm_make_request(KVM_REQ_NMI, vcpu);
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 476
 477 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 478 {
 479         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 480 }
 481 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 482
 483 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 484 {
 485         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 486 }
 487 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 488
 489 /*
 490  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 491  * a #GP and return false.
 492  */
 493 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 494 {
 495         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 496                 return true;
 497         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 498         return false;
 499 }
 500 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 501
 502 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 503 {
 504         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 505                 return true;
 506
 507         kvm_queue_exception(vcpu, UD_VECTOR);
 508         return false;
 509 }
 510 EXPORT_SYMBOL_GPL(kvm_require_dr);
 511
 512 /*
 513  * This function will be used to read from the physical memory of the currently
 514  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 515  * can read from guest physical or from the guest's guest physical memory.
 516  */
 517 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 518                             gfn_t ngfn, void *data, int offset, int len,
 519                             u32 access)
 520 {
 521         struct x86_exception exception;
 522         gfn_t real_gfn;
 523         gpa_t ngpa;
 524
 525         ngpa     = gfn_to_gpa(ngfn);
 526         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 527         if (real_gfn == UNMAPPED_GVA)
 528                 return -EFAULT;
 529
 530         real_gfn = gpa_to_gfn(real_gfn);
 531
 532         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 533 }
 534 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 535
 536 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 537                                void *data, int offset, int len, u32 access)
 538 {
 539         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 540                                        data, offset, len, access);
 541 }
 542
 543 /*
 544  * Load the pae pdptrs.  Return true is they are all valid.
 545  */
 546 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 547 {
 548         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 549         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 550         int i;
 551         int ret;
 552         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 553
 554         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 555                                       offset * sizeof(u64), sizeof(pdpte),
 556                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 557         if (ret < 0) {
 558                 ret = 0;
 559                 goto out;
 560         }
 561         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 562                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 563                     (pdpte[i] &
 564                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 565                         ret = 0;
 566                         goto out;
 567                 }
 568         }
 569         ret = 1;
 570
 571         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 572         __set_bit(VCPU_EXREG_PDPTR,
 573                   (unsigned long *)&vcpu->arch.regs_avail);
 574         __set_bit(VCPU_EXREG_PDPTR,
 575                   (unsigned long *)&vcpu->arch.regs_dirty);
 576 out:
 577
 578         return ret;
 579 }
 580 EXPORT_SYMBOL_GPL(load_pdptrs);
 581
 582 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 583 {
 584         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 585         bool changed = true;
 586         int offset;
 587         gfn_t gfn;
 588         int r;
 589
 590         if (is_long_mode(vcpu) || !is_pae(vcpu))
 591                 return false;
 592
 593         if (!test_bit(VCPU_EXREG_PDPTR,
 594                       (unsigned long *)&vcpu->arch.regs_avail))
 595                 return true;
 596
 597         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 598         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 599         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 600                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 601         if (r < 0)
 602                 goto out;
 603         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 604 out:
 605
 606         return changed;
 607 }
 608 EXPORT_SYMBOL_GPL(pdptrs_changed);
 609
 610 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 611 {
 612         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 613         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 614
 615         cr0 |= X86_CR0_ET;
 616
 617 #ifdef CONFIG_X86_64
 618         if (cr0 & 0xffffffff00000000UL)
 619                 return 1;
 620 #endif
 621
 622         cr0 &= ~CR0_RESERVED_BITS;
 623
 624         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 625                 return 1;
 626
 627         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 628                 return 1;
 629
 630         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 631 #ifdef CONFIG_X86_64
 632                 if ((vcpu->arch.efer & EFER_LME)) {
 633                         int cs_db, cs_l;
 634
 635                         if (!is_pae(vcpu))
 636                                 return 1;
 637                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 638                         if (cs_l)
 639                                 return 1;
 640                 } else
 641 #endif
 642                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 643                                                  kvm_read_cr3(vcpu)))
 644                         return 1;
 645         }
 646
 647         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 648                 return 1;
 649
 650         kvm_x86_ops->set_cr0(vcpu, cr0);
 651
 652         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 653                 kvm_clear_async_pf_completion_queue(vcpu);
 654                 kvm_async_pf_hash_reset(vcpu);
 655         }
 656
 657         if ((cr0 ^ old_cr0) & update_bits)
 658                 kvm_mmu_reset_context(vcpu);
 659
 660         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 661             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 662             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 663                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 664
 665         return 0;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 668
 669 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 670 {
 671         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 672 }
 673 EXPORT_SYMBOL_GPL(kvm_lmsw);
 674
 675 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 676 {
 677         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 678                         !vcpu->guest_xcr0_loaded) {
 679                 /* kvm_set_xcr() also depends on this */
 680                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 681                 vcpu->guest_xcr0_loaded = 1;
 682         }
 683 }
 684
 685 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 686 {
 687         if (vcpu->guest_xcr0_loaded) {
 688                 if (vcpu->arch.xcr0 != host_xcr0)
 689                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 690                 vcpu->guest_xcr0_loaded = 0;
 691         }
 692 }
 693
 694 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 695 {
 696         u64 xcr0 = xcr;
 697         u64 old_xcr0 = vcpu->arch.xcr0;
 698         u64 valid_bits;
 699
 700         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 701         if (index != XCR_XFEATURE_ENABLED_MASK)
 702                 return 1;
 703         if (!(xcr0 & XFEATURE_MASK_FP))
 704                 return 1;
 705         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 706                 return 1;
 707
 708         /*
 709          * Do not allow the guest to set bits that we do not support
 710          * saving.  However, xcr0 bit 0 is always set, even if the
 711          * emulated CPU does not support XSAVE (see fx_init).
 712          */
 713         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 714         if (xcr0 & ~valid_bits)
 715                 return 1;
 716
 717         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 718             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 719                 return 1;
 720
 721         if (xcr0 & XFEATURE_MASK_AVX512) {
 722                 if (!(xcr0 & XFEATURE_MASK_YMM))
 723                         return 1;
 724                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 725                         return 1;
 726         }
 727         vcpu->arch.xcr0 = xcr0;
 728
 729         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 730                 kvm_update_cpuid(vcpu);
 731         return 0;
 732 }
 733
 734 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 735 {
 736         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 737             __kvm_set_xcr(vcpu, index, xcr)) {
 738                 kvm_inject_gp(vcpu, 0);
 739                 return 1;
 740         }
 741         return 0;
 742 }
 743 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 744
 745 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 746 {
 747         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 748         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 749                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 750
 751         if (cr4 & CR4_RESERVED_BITS)
 752                 return 1;
 753
 754         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 755                 return 1;
 756
 757         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 758                 return 1;
 759
 760         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 761                 return 1;
 762
 763         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 764                 return 1;
 765
 766         if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
 767                 return 1;
 768
 769         if (is_long_mode(vcpu)) {
 770                 if (!(cr4 & X86_CR4_PAE))
 771                         return 1;
 772         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 773                    && ((cr4 ^ old_cr4) & pdptr_bits)
 774                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 775                                    kvm_read_cr3(vcpu)))
 776                 return 1;
 777
 778         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 779                 if (!guest_cpuid_has_pcid(vcpu))
 780                         return 1;
 781
 782                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 783                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 784                         return 1;
 785         }
 786
 787         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 788                 return 1;
 789
 790         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 791             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 792                 kvm_mmu_reset_context(vcpu);
 793
 794         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 795                 kvm_update_cpuid(vcpu);
 796
 797         return 0;
 798 }
 799 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 800
 801 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 802 {
 803 #ifdef CONFIG_X86_64
 804         cr3 &= ~CR3_PCID_INVD;
 805 #endif
 806
 807         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 808                 kvm_mmu_sync_roots(vcpu);
 809                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 810                 return 0;
 811         }
 812
 813         if (is_long_mode(vcpu)) {
 814                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 815                         return 1;
 816         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 817                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 818                 return 1;
 819
 820         vcpu->arch.cr3 = cr3;
 821         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 822         kvm_mmu_new_cr3(vcpu);
 823         return 0;
 824 }
 825 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 826
 827 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 828 {
 829         if (cr8 & CR8_RESERVED_BITS)
 830                 return 1;
 831         if (lapic_in_kernel(vcpu))
 832                 kvm_lapic_set_tpr(vcpu, cr8);
 833         else
 834                 vcpu->arch.cr8 = cr8;
 835         return 0;
 836 }
 837 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 838
 839 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 840 {
 841         if (lapic_in_kernel(vcpu))
 842                 return kvm_lapic_get_cr8(vcpu);
 843         else
 844                 return vcpu->arch.cr8;
 845 }
 846 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 847
 848 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 849 {
 850         int i;
 851
 852         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 853                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 854                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 855                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 856         }
 857 }
 858
 859 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 860 {
 861         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 862                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 863 }
 864
 865 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 866 {
 867         unsigned long dr7;
 868
 869         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 870                 dr7 = vcpu->arch.guest_debug_dr7;
 871         else
 872                 dr7 = vcpu->arch.dr7;
 873         kvm_x86_ops->set_dr7(vcpu, dr7);
 874         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 875         if (dr7 & DR7_BP_EN_MASK)
 876                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 877 }
 878
 879 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 880 {
 881         u64 fixed = DR6_FIXED_1;
 882
 883         if (!guest_cpuid_has_rtm(vcpu))
 884                 fixed |= DR6_RTM;
 885         return fixed;
 886 }
 887
 888 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 889 {
 890         switch (dr) {
 891         case 0 ... 3:
 892                 vcpu->arch.db[dr] = val;
 893                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 894                         vcpu->arch.eff_db[dr] = val;
 895                 break;
 896         case 4:
 897                 /* fall through */
 898         case 6:
 899                 if (val & 0xffffffff00000000ULL)
 900                         return -1; /* #GP */
 901                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 902                 kvm_update_dr6(vcpu);
 903                 break;
 904         case 5:
 905                 /* fall through */
 906         default: /* 7 */
 907                 if (val & 0xffffffff00000000ULL)
 908                         return -1; /* #GP */
 909                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 910                 kvm_update_dr7(vcpu);
 911                 break;
 912         }
 913
 914         return 0;
 915 }
 916
 917 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 918 {
 919         if (__kvm_set_dr(vcpu, dr, val)) {
 920                 kvm_inject_gp(vcpu, 0);
 921                 return 1;
 922         }
 923         return 0;
 924 }
 925 EXPORT_SYMBOL_GPL(kvm_set_dr);
 926
 927 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 928 {
 929         switch (dr) {
 930         case 0 ... 3:
 931                 *val = vcpu->arch.db[dr];
 932                 break;
 933         case 4:
 934                 /* fall through */
 935         case 6:
 936                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 937                         *val = vcpu->arch.dr6;
 938                 else
 939                         *val = kvm_x86_ops->get_dr6(vcpu);
 940                 break;
 941         case 5:
 942                 /* fall through */
 943         default: /* 7 */
 944                 *val = vcpu->arch.dr7;
 945                 break;
 946         }
 947         return 0;
 948 }
 949 EXPORT_SYMBOL_GPL(kvm_get_dr);
 950
 951 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 952 {
 953         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 954         u64 data;
 955         int err;
 956
 957         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 958         if (err)
 959                 return err;
 960         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 961         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 962         return err;
 963 }
 964 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 965
 966 /*
 967  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 968  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 969  *
 970  * This list is modified at module load time to reflect the
 971  * capabilities of the host cpu. This capabilities test skips MSRs that are
 972  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 973  * may depend on host virtualization features rather than host cpu features.
 974  */
 975
 976 static u32 msrs_to_save[] = {
 977         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 978         MSR_STAR,
 979 #ifdef CONFIG_X86_64
 980         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 981 #endif
 982         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 983         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 984 };
 985
 986 static unsigned num_msrs_to_save;
 987
 988 static u32 emulated_msrs[] = {
 989         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 990         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 991         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 992         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 993         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 994         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 995         HV_X64_MSR_RESET,
 996         HV_X64_MSR_VP_INDEX,
 997         HV_X64_MSR_VP_RUNTIME,
 998         HV_X64_MSR_SCONTROL,
 999         HV_X64_MSR_STIMER0_CONFIG,
1000         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1001         MSR_KVM_PV_EOI_EN,
1002
1003         MSR_IA32_TSC_ADJUST,
1004         MSR_IA32_TSCDEADLINE,
1005         MSR_IA32_MISC_ENABLE,
1006         MSR_IA32_MCG_STATUS,
1007         MSR_IA32_MCG_CTL,
1008         MSR_IA32_MCG_EXT_CTL,
1009         MSR_IA32_SMBASE,
1010 };
1011
1012 static unsigned num_emulated_msrs;
1013
1014 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1015 {
1016         if (efer & efer_reserved_bits)
1017                 return false;
1018
1019         if (efer & EFER_FFXSR) {
1020                 struct kvm_cpuid_entry2 *feat;
1021
1022                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1023                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
1024                         return false;
1025         }
1026
1027         if (efer & EFER_SVME) {
1028                 struct kvm_cpuid_entry2 *feat;
1029
1030                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
1031                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
1032                         return false;
1033         }
1034
1035         return true;
1036 }
1037 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1038
1039 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1040 {
1041         u64 old_efer = vcpu->arch.efer;
1042
1043         if (!kvm_valid_efer(vcpu, efer))
1044                 return 1;
1045
1046         if (is_paging(vcpu)
1047             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1048                 return 1;
1049
1050         efer &= ~EFER_LMA;
1051         efer |= vcpu->arch.efer & EFER_LMA;
1052
1053         kvm_x86_ops->set_efer(vcpu, efer);
1054
1055         /* Update reserved bits */
1056         if ((efer ^ old_efer) & EFER_NX)
1057                 kvm_mmu_reset_context(vcpu);
1058
1059         return 0;
1060 }
1061
1062 void kvm_enable_efer_bits(u64 mask)
1063 {
1064        efer_reserved_bits &= ~mask;
1065 }
1066 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1067
1068 /*
1069  * Writes msr value into into the appropriate "register".
1070  * Returns 0 on success, non-0 otherwise.
1071  * Assumes vcpu_load() was already called.
1072  */
1073 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1074 {
1075         switch (msr->index) {
1076         case MSR_FS_BASE:
1077         case MSR_GS_BASE:
1078         case MSR_KERNEL_GS_BASE:
1079         case MSR_CSTAR:
1080         case MSR_LSTAR:
1081                 if (is_noncanonical_address(msr->data))
1082                         return 1;
1083                 break;
1084         case MSR_IA32_SYSENTER_EIP:
1085         case MSR_IA32_SYSENTER_ESP:
1086                 /*
1087                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1088                  * non-canonical address is written on Intel but not on
1089                  * AMD (which ignores the top 32-bits, because it does
1090                  * not implement 64-bit SYSENTER).
1091                  *
1092                  * 64-bit code should hence be able to write a non-canonical
1093                  * value on AMD.  Making the address canonical ensures that
1094                  * vmentry does not fail on Intel after writing a non-canonical
1095                  * value, and that something deterministic happens if the guest
1096                  * invokes 64-bit SYSENTER.
1097                  */
1098                 msr->data = get_canonical(msr->data);
1099         }
1100         return kvm_x86_ops->set_msr(vcpu, msr);
1101 }
1102 EXPORT_SYMBOL_GPL(kvm_set_msr);
1103
1104 /*
1105  * Adapt set_msr() to msr_io()'s calling convention
1106  */
1107 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1108 {
1109         struct msr_data msr;
1110         int r;
1111
1112         msr.index = index;
1113         msr.host_initiated = true;
1114         r = kvm_get_msr(vcpu, &msr);
1115         if (r)
1116                 return r;
1117
1118         *data = msr.data;
1119         return 0;
1120 }
1121
1122 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1123 {
1124         struct msr_data msr;
1125
1126         msr.data = *data;
1127         msr.index = index;
1128         msr.host_initiated = true;
1129         return kvm_set_msr(vcpu, &msr);
1130 }
1131
1132 #ifdef CONFIG_X86_64
1133 struct pvclock_gtod_data {
1134         seqcount_t      seq;
1135
1136         struct { /* extract of a clocksource struct */
1137                 int vclock_mode;
1138                 u64     cycle_last;
1139                 u64     mask;
1140                 u32     mult;
1141                 u32     shift;
1142         } clock;
1143
1144         u64             boot_ns;
1145         u64             nsec_base;
1146         u64             wall_time_sec;
1147 };
1148
1149 static struct pvclock_gtod_data pvclock_gtod_data;
1150
1151 static void update_pvclock_gtod(struct timekeeper *tk)
1152 {
1153         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1154         u64 boot_ns;
1155
1156         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1157
1158         write_seqcount_begin(&vdata->seq);
1159
1160         /* copy pvclock gtod data */
1161         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1162         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1163         vdata->clock.mask               = tk->tkr_mono.mask;
1164         vdata->clock.mult               = tk->tkr_mono.mult;
1165         vdata->clock.shift              = tk->tkr_mono.shift;
1166
1167         vdata->boot_ns                  = boot_ns;
1168         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1169
1170         vdata->wall_time_sec            = tk->xtime_sec;
1171
1172         write_seqcount_end(&vdata->seq);
1173 }
1174 #endif
1175
1176 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1177 {
1178         /*
1179          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1180          * vcpu_enter_guest.  This function is only called from
1181          * the physical CPU that is running vcpu.
1182          */
1183         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1184 }
1185
1186 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1187 {
1188         int version;
1189         int r;
1190         struct pvclock_wall_clock wc;
1191         struct timespec64 boot;
1192
1193         if (!wall_clock)
1194                 return;
1195
1196         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1197         if (r)
1198                 return;
1199
1200         if (version & 1)
1201                 ++version;  /* first time write, random junk */
1202
1203         ++version;
1204
1205         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1206                 return;
1207
1208         /*
1209          * The guest calculates current wall clock time by adding
1210          * system time (updated by kvm_guest_time_update below) to the
1211          * wall clock specified here.  guest system time equals host
1212          * system time for us, thus we must fill in host boot time here.
1213          */
1214         getboottime64(&boot);
1215
1216         if (kvm->arch.kvmclock_offset) {
1217                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1218                 boot = timespec64_sub(boot, ts);
1219         }
1220         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1221         wc.nsec = boot.tv_nsec;
1222         wc.version = version;
1223
1224         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1225
1226         version++;
1227         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1228 }
1229
1230 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1231 {
1232         do_shl32_div32(dividend, divisor);
1233         return dividend;
1234 }
1235
1236 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1237                                s8 *pshift, u32 *pmultiplier)
1238 {
1239         uint64_t scaled64;
1240         int32_t  shift = 0;
1241         uint64_t tps64;
1242         uint32_t tps32;
1243
1244         tps64 = base_hz;
1245         scaled64 = scaled_hz;
1246         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1247                 tps64 >>= 1;
1248                 shift--;
1249         }
1250
1251         tps32 = (uint32_t)tps64;
1252         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1253                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1254                         scaled64 >>= 1;
1255                 else
1256                         tps32 <<= 1;
1257                 shift++;
1258         }
1259
1260         *pshift = shift;
1261         *pmultiplier = div_frac(scaled64, tps32);
1262
1263         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1264                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1265 }
1266
1267 #ifdef CONFIG_X86_64
1268 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1269 #endif
1270
1271 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1272 static unsigned long max_tsc_khz;
1273
1274 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1275 {
1276         u64 v = (u64)khz * (1000000 + ppm);
1277         do_div(v, 1000000);
1278         return v;
1279 }
1280
1281 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1282 {
1283         u64 ratio;
1284
1285         /* Guest TSC same frequency as host TSC? */
1286         if (!scale) {
1287                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1288                 return 0;
1289         }
1290
1291         /* TSC scaling supported? */
1292         if (!kvm_has_tsc_control) {
1293                 if (user_tsc_khz > tsc_khz) {
1294                         vcpu->arch.tsc_catchup = 1;
1295                         vcpu->arch.tsc_always_catchup = 1;
1296                         return 0;
1297                 } else {
1298                         WARN(1, "user requested TSC rate below hardware speed\n");
1299                         return -1;
1300                 }
1301         }
1302
1303         /* TSC scaling required  - calculate ratio */
1304         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1305                                 user_tsc_khz, tsc_khz);
1306
1307         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1308                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1309                           user_tsc_khz);
1310                 return -1;
1311         }
1312
1313         vcpu->arch.tsc_scaling_ratio = ratio;
1314         return 0;
1315 }
1316
1317 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1318 {
1319         u32 thresh_lo, thresh_hi;
1320         int use_scaling = 0;
1321
1322         /* tsc_khz can be zero if TSC calibration fails */
1323         if (user_tsc_khz == 0) {
1324                 /* set tsc_scaling_ratio to a safe value */
1325                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1326                 return -1;
1327         }
1328
1329         /* Compute a scale to convert nanoseconds in TSC cycles */
1330         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1331                            &vcpu->arch.virtual_tsc_shift,
1332                            &vcpu->arch.virtual_tsc_mult);
1333         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1334
1335         /*
1336          * Compute the variation in TSC rate which is acceptable
1337          * within the range of tolerance and decide if the
1338          * rate being applied is within that bounds of the hardware
1339          * rate.  If so, no scaling or compensation need be done.
1340          */
1341         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1342         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1343         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1344                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1345                 use_scaling = 1;
1346         }
1347         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1348 }
1349
1350 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1351 {
1352         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1353                                       vcpu->arch.virtual_tsc_mult,
1354                                       vcpu->arch.virtual_tsc_shift);
1355         tsc += vcpu->arch.this_tsc_write;
1356         return tsc;
1357 }
1358
1359 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1360 {
1361 #ifdef CONFIG_X86_64
1362         bool vcpus_matched;
1363         struct kvm_arch *ka = &vcpu->kvm->arch;
1364         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1365
1366         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1367                          atomic_read(&vcpu->kvm->online_vcpus));
1368
1369         /*
1370          * Once the masterclock is enabled, always perform request in
1371          * order to update it.
1372          *
1373          * In order to enable masterclock, the host clocksource must be TSC
1374          * and the vcpus need to have matched TSCs.  When that happens,
1375          * perform request to enable masterclock.
1376          */
1377         if (ka->use_master_clock ||
1378             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1379                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1380
1381         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1382                             atomic_read(&vcpu->kvm->online_vcpus),
1383                             ka->use_master_clock, gtod->clock.vclock_mode);
1384 #endif
1385 }
1386
1387 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1388 {
1389         u64 curr_offset = vcpu->arch.tsc_offset;
1390         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1391 }
1392
1393 /*
1394  * Multiply tsc by a fixed point number represented by ratio.
1395  *
1396  * The most significant 64-N bits (mult) of ratio represent the
1397  * integral part of the fixed point number; the remaining N bits
1398  * (frac) represent the fractional part, ie. ratio represents a fixed
1399  * point number (mult + frac * 2^(-N)).
1400  *
1401  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1402  */
1403 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1404 {
1405         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1406 }
1407
1408 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1409 {
1410         u64 _tsc = tsc;
1411         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1412
1413         if (ratio != kvm_default_tsc_scaling_ratio)
1414                 _tsc = __scale_tsc(ratio, tsc);
1415
1416         return _tsc;
1417 }
1418 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1419
1420 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1421 {
1422         u64 tsc;
1423
1424         tsc = kvm_scale_tsc(vcpu, rdtsc());
1425
1426         return target_tsc - tsc;
1427 }
1428
1429 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1430 {
1431         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1432 }
1433 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1434
1435 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1436 {
1437         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1438         vcpu->arch.tsc_offset = offset;
1439 }
1440
1441 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1442 {
1443         struct kvm *kvm = vcpu->kvm;
1444         u64 offset, ns, elapsed;
1445         unsigned long flags;
1446         s64 usdiff;
1447         bool matched;
1448         bool already_matched;
1449         u64 data = msr->data;
1450
1451         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1452         offset = kvm_compute_tsc_offset(vcpu, data);
1453         ns = ktime_get_boot_ns();
1454         elapsed = ns - kvm->arch.last_tsc_nsec;
1455
1456         if (vcpu->arch.virtual_tsc_khz) {
1457                 int faulted = 0;
1458
1459                 /* n.b - signed multiplication and division required */
1460                 usdiff = data - kvm->arch.last_tsc_write;
1461 #ifdef CONFIG_X86_64
1462                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1463 #else
1464                 /* do_div() only does unsigned */
1465                 asm("1: idivl %[divisor]\n"
1466                     "2: xor %%edx, %%edx\n"
1467                     "   movl $0, %[faulted]\n"
1468                     "3:\n"
1469                     ".section .fixup,\"ax\"\n"
1470                     "4: movl $1, %[faulted]\n"
1471                     "   jmp  3b\n"
1472                     ".previous\n"
1473
1474                 _ASM_EXTABLE(1b, 4b)
1475
1476                 : "=A"(usdiff), [faulted] "=r" (faulted)
1477                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1478
1479 #endif
1480                 do_div(elapsed, 1000);
1481                 usdiff -= elapsed;
1482                 if (usdiff < 0)
1483                         usdiff = -usdiff;
1484
1485                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1486                 if (faulted)
1487                         usdiff = USEC_PER_SEC;
1488         } else
1489                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1490
1491         /*
1492          * Special case: TSC write with a small delta (1 second) of virtual
1493          * cycle time against real time is interpreted as an attempt to
1494          * synchronize the CPU.
1495          *
1496          * For a reliable TSC, we can match TSC offsets, and for an unstable
1497          * TSC, we add elapsed time in this computation.  We could let the
1498          * compensation code attempt to catch up if we fall behind, but
1499          * it's better to try to match offsets from the beginning.
1500          */
1501         if (usdiff < USEC_PER_SEC &&
1502             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1503                 if (!check_tsc_unstable()) {
1504                         offset = kvm->arch.cur_tsc_offset;
1505                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1506                 } else {
1507                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1508                         data += delta;
1509                         offset = kvm_compute_tsc_offset(vcpu, data);
1510                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1511                 }
1512                 matched = true;
1513                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1514         } else {
1515                 /*
1516                  * We split periods of matched TSC writes into generations.
1517                  * For each generation, we track the original measured
1518                  * nanosecond time, offset, and write, so if TSCs are in
1519                  * sync, we can match exact offset, and if not, we can match
1520                  * exact software computation in compute_guest_tsc()
1521                  *
1522                  * These values are tracked in kvm->arch.cur_xxx variables.
1523                  */
1524                 kvm->arch.cur_tsc_generation++;
1525                 kvm->arch.cur_tsc_nsec = ns;
1526                 kvm->arch.cur_tsc_write = data;
1527                 kvm->arch.cur_tsc_offset = offset;
1528                 matched = false;
1529                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1530                          kvm->arch.cur_tsc_generation, data);
1531         }
1532
1533         /*
1534          * We also track th most recent recorded KHZ, write and time to
1535          * allow the matching interval to be extended at each write.
1536          */
1537         kvm->arch.last_tsc_nsec = ns;
1538         kvm->arch.last_tsc_write = data;
1539         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1540
1541         vcpu->arch.last_guest_tsc = data;
1542
1543         /* Keep track of which generation this VCPU has synchronized to */
1544         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1545         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1546         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1547
1548         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1549                 update_ia32_tsc_adjust_msr(vcpu, offset);
1550         kvm_vcpu_write_tsc_offset(vcpu, offset);
1551         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1552
1553         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1554         if (!matched) {
1555                 kvm->arch.nr_vcpus_matched_tsc = 0;
1556         } else if (!already_matched) {
1557                 kvm->arch.nr_vcpus_matched_tsc++;
1558         }
1559
1560         kvm_track_tsc_matching(vcpu);
1561         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1562 }
1563
1564 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1565
1566 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1567                                            s64 adjustment)
1568 {
1569         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1570 }
1571
1572 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1573 {
1574         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1575                 WARN_ON(adjustment < 0);
1576         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1577         adjust_tsc_offset_guest(vcpu, adjustment);
1578 }
1579
1580 #ifdef CONFIG_X86_64
1581
1582 static u64 read_tsc(void)
1583 {
1584         u64 ret = (u64)rdtsc_ordered();
1585         u64 last = pvclock_gtod_data.clock.cycle_last;
1586
1587         if (likely(ret >= last))
1588                 return ret;
1589
1590         /*
1591          * GCC likes to generate cmov here, but this branch is extremely
1592          * predictable (it's just a function of time and the likely is
1593          * very likely) and there's a data dependence, so force GCC
1594          * to generate a branch instead.  I don't barrier() because
1595          * we don't actually need a barrier, and if this function
1596          * ever gets inlined it will generate worse code.
1597          */
1598         asm volatile ("");
1599         return last;
1600 }
1601
1602 static inline u64 vgettsc(u64 *cycle_now)
1603 {
1604         long v;
1605         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1606
1607         *cycle_now = read_tsc();
1608
1609         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1610         return v * gtod->clock.mult;
1611 }
1612
1613 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1614 {
1615         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1616         unsigned long seq;
1617         int mode;
1618         u64 ns;
1619
1620         do {
1621                 seq = read_seqcount_begin(&gtod->seq);
1622                 mode = gtod->clock.vclock_mode;
1623                 ns = gtod->nsec_base;
1624                 ns += vgettsc(cycle_now);
1625                 ns >>= gtod->clock.shift;
1626                 ns += gtod->boot_ns;
1627         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1628         *t = ns;
1629
1630         return mode;
1631 }
1632
1633 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1634 {
1635         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1636         unsigned long seq;
1637         int mode;
1638         u64 ns;
1639
1640         do {
1641                 seq = read_seqcount_begin(&gtod->seq);
1642                 mode = gtod->clock.vclock_mode;
1643                 ts->tv_sec = gtod->wall_time_sec;
1644                 ns = gtod->nsec_base;
1645                 ns += vgettsc(cycle_now);
1646                 ns >>= gtod->clock.shift;
1647         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1648
1649         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1650         ts->tv_nsec = ns;
1651
1652         return mode;
1653 }
1654
1655 /* returns true if host is using tsc clocksource */
1656 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1657 {
1658         /* checked again under seqlock below */
1659         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1660                 return false;
1661
1662         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1663 }
1664
1665 /* returns true if host is using tsc clocksource */
1666 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1667                                            u64 *cycle_now)
1668 {
1669         /* checked again under seqlock below */
1670         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1671                 return false;
1672
1673         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1674 }
1675 #endif
1676
1677 /*
1678  *
1679  * Assuming a stable TSC across physical CPUS, and a stable TSC
1680  * across virtual CPUs, the following condition is possible.
1681  * Each numbered line represents an event visible to both
1682  * CPUs at the next numbered event.
1683  *
1684  * "timespecX" represents host monotonic time. "tscX" represents
1685  * RDTSC value.
1686  *
1687  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1688  *
1689  * 1.  read timespec0,tsc0
1690  * 2.                                   | timespec1 = timespec0 + N
1691  *                                      | tsc1 = tsc0 + M
1692  * 3. transition to guest               | transition to guest
1693  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1694  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1695  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1696  *
1697  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1698  *
1699  *      - ret0 < ret1
1700  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1701  *              ...
1702  *      - 0 < N - M => M < N
1703  *
1704  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1705  * always the case (the difference between two distinct xtime instances
1706  * might be smaller then the difference between corresponding TSC reads,
1707  * when updating guest vcpus pvclock areas).
1708  *
1709  * To avoid that problem, do not allow visibility of distinct
1710  * system_timestamp/tsc_timestamp values simultaneously: use a master
1711  * copy of host monotonic time values. Update that master copy
1712  * in lockstep.
1713  *
1714  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1715  *
1716  */
1717
1718 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1719 {
1720 #ifdef CONFIG_X86_64
1721         struct kvm_arch *ka = &kvm->arch;
1722         int vclock_mode;
1723         bool host_tsc_clocksource, vcpus_matched;
1724
1725         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1726                         atomic_read(&kvm->online_vcpus));
1727
1728         /*
1729          * If the host uses TSC clock, then passthrough TSC as stable
1730          * to the guest.
1731          */
1732         host_tsc_clocksource = kvm_get_time_and_clockread(
1733                                         &ka->master_kernel_ns,
1734                                         &ka->master_cycle_now);
1735
1736         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1737                                 && !backwards_tsc_observed
1738                                 && !ka->boot_vcpu_runs_old_kvmclock;
1739
1740         if (ka->use_master_clock)
1741                 atomic_set(&kvm_guest_has_master_clock, 1);
1742
1743         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1744         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1745                                         vcpus_matched);
1746 #endif
1747 }
1748
1749 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1750 {
1751         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1752 }
1753
1754 static void kvm_gen_update_masterclock(struct kvm *kvm)
1755 {
1756 #ifdef CONFIG_X86_64
1757         int i;
1758         struct kvm_vcpu *vcpu;
1759         struct kvm_arch *ka = &kvm->arch;
1760
1761         spin_lock(&ka->pvclock_gtod_sync_lock);
1762         kvm_make_mclock_inprogress_request(kvm);
1763         /* no guest entries from this point */
1764         pvclock_update_vm_gtod_copy(kvm);
1765
1766         kvm_for_each_vcpu(i, vcpu, kvm)
1767                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1768
1769         /* guest entries allowed */
1770         kvm_for_each_vcpu(i, vcpu, kvm)
1771                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1772
1773         spin_unlock(&ka->pvclock_gtod_sync_lock);
1774 #endif
1775 }
1776
1777 static u64 __get_kvmclock_ns(struct kvm *kvm)
1778 {
1779         struct kvm_arch *ka = &kvm->arch;
1780         struct pvclock_vcpu_time_info hv_clock;
1781
1782         spin_lock(&ka->pvclock_gtod_sync_lock);
1783         if (!ka->use_master_clock) {
1784                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1785                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1786         }
1787
1788         hv_clock.tsc_timestamp = ka->master_cycle_now;
1789         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1790         spin_unlock(&ka->pvclock_gtod_sync_lock);
1791
1792         kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1793                            &hv_clock.tsc_shift,
1794                            &hv_clock.tsc_to_system_mul);
1795         return __pvclock_read_cycles(&hv_clock, rdtsc());
1796 }
1797
1798 u64 get_kvmclock_ns(struct kvm *kvm)
1799 {
1800         unsigned long flags;
1801         s64 ns;
1802
1803         local_irq_save(flags);
1804         ns = __get_kvmclock_ns(kvm);
1805         local_irq_restore(flags);
1806
1807         return ns;
1808 }
1809
1810 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1811 {
1812         struct kvm_vcpu_arch *vcpu = &v->arch;
1813         struct pvclock_vcpu_time_info guest_hv_clock;
1814
1815         if (unlikely(kvm_vcpu_read_guest_cached(v, &vcpu->pv_time,
1816                 &guest_hv_clock, sizeof(guest_hv_clock))))
1817                 return;
1818
1819         /* This VCPU is paused, but it's legal for a guest to read another
1820          * VCPU's kvmclock, so we really have to follow the specification where
1821          * it says that version is odd if data is being modified, and even after
1822          * it is consistent.
1823          *
1824          * Version field updates must be kept separate.  This is because
1825          * kvm_write_guest_cached might use a "rep movs" instruction, and
1826          * writes within a string instruction are weakly ordered.  So there
1827          * are three writes overall.
1828          *
1829          * As a small optimization, only write the version field in the first
1830          * and third write.  The vcpu->pv_time cache is still valid, because the
1831          * version field is the first in the struct.
1832          */
1833         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1834
1835         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1836         kvm_vcpu_write_guest_cached(v, &vcpu->pv_time,
1837                                     &vcpu->hv_clock,
1838                                     sizeof(vcpu->hv_clock.version));
1839
1840         smp_wmb();
1841
1842         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1843         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1844
1845         if (vcpu->pvclock_set_guest_stopped_request) {
1846                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1847                 vcpu->pvclock_set_guest_stopped_request = false;
1848         }
1849
1850         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1851
1852         kvm_vcpu_write_guest_cached(v, &vcpu->pv_time,
1853                                     &vcpu->hv_clock,
1854                                     sizeof(vcpu->hv_clock));
1855
1856         smp_wmb();
1857
1858         vcpu->hv_clock.version++;
1859         kvm_vcpu_write_guest_cached(v, &vcpu->pv_time,
1860                                     &vcpu->hv_clock,
1861                                     sizeof(vcpu->hv_clock.version));
1862 }
1863
1864 static int kvm_guest_time_update(struct kvm_vcpu *v)
1865 {
1866         unsigned long flags, tgt_tsc_khz;
1867         struct kvm_vcpu_arch *vcpu = &v->arch;
1868         struct kvm_arch *ka = &v->kvm->arch;
1869         s64 kernel_ns;
1870         u64 tsc_timestamp, host_tsc;
1871         u8 pvclock_flags;
1872         bool use_master_clock;
1873
1874         kernel_ns = 0;
1875         host_tsc = 0;
1876
1877         /*
1878          * If the host uses TSC clock, then passthrough TSC as stable
1879          * to the guest.
1880          */
1881         spin_lock(&ka->pvclock_gtod_sync_lock);
1882         use_master_clock = ka->use_master_clock;
1883         if (use_master_clock) {
1884                 host_tsc = ka->master_cycle_now;
1885                 kernel_ns = ka->master_kernel_ns;
1886         }
1887         spin_unlock(&ka->pvclock_gtod_sync_lock);
1888
1889         /* Keep irq disabled to prevent changes to the clock */
1890         local_irq_save(flags);
1891         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1892         if (unlikely(tgt_tsc_khz == 0)) {
1893                 local_irq_restore(flags);
1894                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1895                 return 1;
1896         }
1897         if (!use_master_clock) {
1898                 host_tsc = rdtsc();
1899                 kernel_ns = ktime_get_boot_ns();
1900         }
1901
1902         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1903
1904         /*
1905          * We may have to catch up the TSC to match elapsed wall clock
1906          * time for two reasons, even if kvmclock is used.
1907          *   1) CPU could have been running below the maximum TSC rate
1908          *   2) Broken TSC compensation resets the base at each VCPU
1909          *      entry to avoid unknown leaps of TSC even when running
1910          *      again on the same CPU.  This may cause apparent elapsed
1911          *      time to disappear, and the guest to stand still or run
1912          *      very slowly.
1913          */
1914         if (vcpu->tsc_catchup) {
1915                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1916                 if (tsc > tsc_timestamp) {
1917                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1918                         tsc_timestamp = tsc;
1919                 }
1920         }
1921
1922         local_irq_restore(flags);
1923
1924         /* With all the info we got, fill in the values */
1925
1926         if (kvm_has_tsc_control)
1927                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1928
1929         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1930                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1931                                    &vcpu->hv_clock.tsc_shift,
1932                                    &vcpu->hv_clock.tsc_to_system_mul);
1933                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1934         }
1935
1936         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1937         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1938         vcpu->last_guest_tsc = tsc_timestamp;
1939
1940         /* If the host uses TSC clocksource, then it is stable */
1941         pvclock_flags = 0;
1942         if (use_master_clock)
1943                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1944
1945         vcpu->hv_clock.flags = pvclock_flags;
1946
1947         if (vcpu->pv_time_enabled)
1948                 kvm_setup_pvclock_page(v);
1949         if (v == kvm_get_vcpu(v->kvm, 0))
1950                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1951         return 0;
1952 }
1953
1954 /*
1955  * kvmclock updates which are isolated to a given vcpu, such as
1956  * vcpu->cpu migration, should not allow system_timestamp from
1957  * the rest of the vcpus to remain static. Otherwise ntp frequency
1958  * correction applies to one vcpu's system_timestamp but not
1959  * the others.
1960  *
1961  * So in those cases, request a kvmclock update for all vcpus.
1962  * We need to rate-limit these requests though, as they can
1963  * considerably slow guests that have a large number of vcpus.
1964  * The time for a remote vcpu to update its kvmclock is bound
1965  * by the delay we use to rate-limit the updates.
1966  */
1967
1968 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1969
1970 static void kvmclock_update_fn(struct work_struct *work)
1971 {
1972         int i;
1973         struct delayed_work *dwork = to_delayed_work(work);
1974         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1975                                            kvmclock_update_work);
1976         struct kvm *kvm = container_of(ka, struct kvm, arch);
1977         struct kvm_vcpu *vcpu;
1978
1979         kvm_for_each_vcpu(i, vcpu, kvm) {
1980                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1981                 kvm_vcpu_kick(vcpu);
1982         }
1983 }
1984
1985 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1986 {
1987         struct kvm *kvm = v->kvm;
1988
1989         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1990         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1991                                         KVMCLOCK_UPDATE_DELAY);
1992 }
1993
1994 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1995
1996 static void kvmclock_sync_fn(struct work_struct *work)
1997 {
1998         struct delayed_work *dwork = to_delayed_work(work);
1999         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2000                                            kvmclock_sync_work);
2001         struct kvm *kvm = container_of(ka, struct kvm, arch);
2002
2003         if (!kvmclock_periodic_sync)
2004                 return;
2005
2006         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2007         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2008                                         KVMCLOCK_SYNC_PERIOD);
2009 }
2010
2011 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2012 {
2013         u64 mcg_cap = vcpu->arch.mcg_cap;
2014         unsigned bank_num = mcg_cap & 0xff;
2015
2016         switch (msr) {
2017         case MSR_IA32_MCG_STATUS:
2018                 vcpu->arch.mcg_status = data;
2019                 break;
2020         case MSR_IA32_MCG_CTL:
2021                 if (!(mcg_cap & MCG_CTL_P))
2022                         return 1;
2023                 if (data != 0 && data != ~(u64)0)
2024                         return -1;
2025                 vcpu->arch.mcg_ctl = data;
2026                 break;
2027         default:
2028                 if (msr >= MSR_IA32_MC0_CTL &&
2029                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2030                         u32 offset = msr - MSR_IA32_MC0_CTL;
2031                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2032                          * some Linux kernels though clear bit 10 in bank 4 to
2033                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2034                          * this to avoid an uncatched #GP in the guest
2035                          */
2036                         if ((offset & 0x3) == 0 &&
2037                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2038                                 return -1;
2039                         vcpu->arch.mce_banks[offset] = data;
2040                         break;
2041                 }
2042                 return 1;
2043         }
2044         return 0;
2045 }
2046
2047 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2048 {
2049         struct kvm *kvm = vcpu->kvm;
2050         int lm = is_long_mode(vcpu);
2051         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2052                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2053         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2054                 : kvm->arch.xen_hvm_config.blob_size_32;
2055         u32 page_num = data & ~PAGE_MASK;
2056         u64 page_addr = data & PAGE_MASK;
2057         u8 *page;
2058         int r;
2059
2060         r = -E2BIG;
2061         if (page_num >= blob_size)
2062                 goto out;
2063         r = -ENOMEM;
2064         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2065         if (IS_ERR(page)) {
2066                 r = PTR_ERR(page);
2067                 goto out;
2068         }
2069         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2070                 goto out_free;
2071         r = 0;
2072 out_free:
2073         kfree(page);
2074 out:
2075         return r;
2076 }
2077
2078 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2079 {
2080         gpa_t gpa = data & ~0x3f;
2081
2082         /* Bits 2:5 are reserved, Should be zero */
2083         if (data & 0x3c)
2084                 return 1;
2085
2086         vcpu->arch.apf.msr_val = data;
2087
2088         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2089                 kvm_clear_async_pf_completion_queue(vcpu);
2090                 kvm_async_pf_hash_reset(vcpu);
2091                 return 0;
2092         }
2093
2094         if (kvm_vcpu_gfn_to_hva_cache_init(vcpu, &vcpu->arch.apf.data, gpa,
2095                                         sizeof(u32)))
2096                 return 1;
2097
2098         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2099         kvm_async_pf_wakeup_all(vcpu);
2100         return 0;
2101 }
2102
2103 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2104 {
2105         vcpu->arch.pv_time_enabled = false;
2106 }
2107
2108 static void record_steal_time(struct kvm_vcpu *vcpu)
2109 {
2110         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2111                 return;
2112
2113         if (unlikely(kvm_vcpu_read_guest_cached(vcpu, &vcpu->arch.st.stime,
2114                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2115                 return;
2116
2117         vcpu->arch.st.steal.preempted = 0;
2118
2119         if (vcpu->arch.st.steal.version & 1)
2120                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2121
2122         vcpu->arch.st.steal.version += 1;
2123
2124         kvm_vcpu_write_guest_cached(vcpu, &vcpu->arch.st.stime,
2125                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2126
2127         smp_wmb();
2128
2129         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2130                 vcpu->arch.st.last_steal;
2131         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2132
2133         kvm_vcpu_write_guest_cached(vcpu, &vcpu->arch.st.stime,
2134                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2135
2136         smp_wmb();
2137
2138         vcpu->arch.st.steal.version += 1;
2139
2140         kvm_vcpu_write_guest_cached(vcpu, &vcpu->arch.st.stime,
2141                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2142 }
2143
2144 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2145 {
2146         bool pr = false;
2147         u32 msr = msr_info->index;
2148         u64 data = msr_info->data;
2149
2150         switch (msr) {
2151         case MSR_AMD64_NB_CFG:
2152         case MSR_IA32_UCODE_REV:
2153         case MSR_IA32_UCODE_WRITE:
2154         case MSR_VM_HSAVE_PA:
2155         case MSR_AMD64_PATCH_LOADER:
2156         case MSR_AMD64_BU_CFG2:
2157                 break;
2158
2159         case MSR_EFER:
2160                 return set_efer(vcpu, data);
2161         case MSR_K7_HWCR:
2162                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2163                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2164                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2165                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2166                 if (data != 0) {
2167                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2168                                     data);
2169                         return 1;
2170                 }
2171                 break;
2172         case MSR_FAM10H_MMIO_CONF_BASE:
2173                 if (data != 0) {
2174                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2175                                     "0x%llx\n", data);
2176                         return 1;
2177                 }
2178                 break;
2179         case MSR_IA32_DEBUGCTLMSR:
2180                 if (!data) {
2181                         /* We support the non-activated case already */
2182                         break;
2183                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2184                         /* Values other than LBR and BTF are vendor-specific,
2185                            thus reserved and should throw a #GP */
2186                         return 1;
2187                 }
2188                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2189                             __func__, data);
2190                 break;
2191         case 0x200 ... 0x2ff:
2192                 return kvm_mtrr_set_msr(vcpu, msr, data);
2193         case MSR_IA32_APICBASE:
2194                 return kvm_set_apic_base(vcpu, msr_info);
2195         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2196                 return kvm_x2apic_msr_write(vcpu, msr, data);
2197         case MSR_IA32_TSCDEADLINE:
2198                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2199                 break;
2200         case MSR_IA32_TSC_ADJUST:
2201                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
2202                         if (!msr_info->host_initiated) {
2203                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2204                                 adjust_tsc_offset_guest(vcpu, adj);
2205                         }
2206                         vcpu->arch.ia32_tsc_adjust_msr = data;
2207                 }
2208                 break;
2209         case MSR_IA32_MISC_ENABLE:
2210                 vcpu->arch.ia32_misc_enable_msr = data;
2211                 break;
2212         case MSR_IA32_SMBASE:
2213                 if (!msr_info->host_initiated)
2214                         return 1;
2215                 vcpu->arch.smbase = data;
2216                 break;
2217         case MSR_KVM_WALL_CLOCK_NEW:
2218         case MSR_KVM_WALL_CLOCK:
2219                 vcpu->kvm->arch.wall_clock = data;
2220                 kvm_write_wall_clock(vcpu->kvm, data);
2221                 break;
2222         case MSR_KVM_SYSTEM_TIME_NEW:
2223         case MSR_KVM_SYSTEM_TIME: {
2224                 struct kvm_arch *ka = &vcpu->kvm->arch;
2225
2226                 kvmclock_reset(vcpu);
2227
2228                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2229                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2230
2231                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2232                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2233                                         &vcpu->requests);
2234
2235                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2236                 }
2237
2238                 vcpu->arch.time = data;
2239                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2240
2241                 /* we verify if the enable bit is set... */
2242                 if (!(data & 1))
2243                         break;
2244
2245                 if (kvm_vcpu_gfn_to_hva_cache_init(vcpu,
2246                      &vcpu->arch.pv_time, data & ~1ULL,
2247                      sizeof(struct pvclock_vcpu_time_info)))
2248                         vcpu->arch.pv_time_enabled = false;
2249                 else
2250                         vcpu->arch.pv_time_enabled = true;
2251
2252                 break;
2253         }
2254         case MSR_KVM_ASYNC_PF_EN:
2255                 if (kvm_pv_enable_async_pf(vcpu, data))
2256                         return 1;
2257                 break;
2258         case MSR_KVM_STEAL_TIME:
2259
2260                 if (unlikely(!sched_info_on()))
2261                         return 1;
2262
2263                 if (data & KVM_STEAL_RESERVED_MASK)
2264                         return 1;
2265
2266                 if (kvm_vcpu_gfn_to_hva_cache_init(vcpu, &vcpu->arch.st.stime,
2267                                                 data & KVM_STEAL_VALID_BITS,
2268                                                 sizeof(struct kvm_steal_time)))
2269                         return 1;
2270
2271                 vcpu->arch.st.msr_val = data;
2272
2273                 if (!(data & KVM_MSR_ENABLED))
2274                         break;
2275
2276                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2277
2278                 break;
2279         case MSR_KVM_PV_EOI_EN:
2280                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2281                         return 1;
2282                 break;
2283
2284         case MSR_IA32_MCG_CTL:
2285         case MSR_IA32_MCG_STATUS:
2286         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2287                 return set_msr_mce(vcpu, msr, data);
2288
2289         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2290         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2291                 pr = true; /* fall through */
2292         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2293         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2294                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2295                         return kvm_pmu_set_msr(vcpu, msr_info);
2296
2297                 if (pr || data != 0)
2298                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2299                                     "0x%x data 0x%llx\n", msr, data);
2300                 break;
2301         case MSR_K7_CLK_CTL:
2302                 /*
2303                  * Ignore all writes to this no longer documented MSR.
2304                  * Writes are only relevant for old K7 processors,
2305                  * all pre-dating SVM, but a recommended workaround from
2306                  * AMD for these chips. It is possible to specify the
2307                  * affected processor models on the command line, hence
2308                  * the need to ignore the workaround.
2309                  */
2310                 break;
2311         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2312         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2313         case HV_X64_MSR_CRASH_CTL:
2314         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2315                 return kvm_hv_set_msr_common(vcpu, msr, data,
2316                                              msr_info->host_initiated);
2317         case MSR_IA32_BBL_CR_CTL3:
2318                 /* Drop writes to this legacy MSR -- see rdmsr
2319                  * counterpart for further detail.
2320                  */
2321                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2322                 break;
2323         case MSR_AMD64_OSVW_ID_LENGTH:
2324                 if (!guest_cpuid_has_osvw(vcpu))
2325                         return 1;
2326                 vcpu->arch.osvw.length = data;
2327                 break;
2328         case MSR_AMD64_OSVW_STATUS:
2329                 if (!guest_cpuid_has_osvw(vcpu))
2330                         return 1;
2331                 vcpu->arch.osvw.status = data;
2332                 break;
2333         default:
2334                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2335                         return xen_hvm_config(vcpu, data);
2336                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2337                         return kvm_pmu_set_msr(vcpu, msr_info);
2338                 if (!ignore_msrs) {
2339                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2340                                     msr, data);
2341                         return 1;
2342                 } else {
2343                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2344                                     msr, data);
2345                         break;
2346                 }
2347         }
2348         return 0;
2349 }
2350 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2351
2352
2353 /*
2354  * Reads an msr value (of 'msr_index') into 'pdata'.
2355  * Returns 0 on success, non-0 otherwise.
2356  * Assumes vcpu_load() was already called.
2357  */
2358 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2359 {
2360         return kvm_x86_ops->get_msr(vcpu, msr);
2361 }
2362 EXPORT_SYMBOL_GPL(kvm_get_msr);
2363
2364 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2365 {
2366         u64 data;
2367         u64 mcg_cap = vcpu->arch.mcg_cap;
2368         unsigned bank_num = mcg_cap & 0xff;
2369
2370         switch (msr) {
2371         case MSR_IA32_P5_MC_ADDR:
2372         case MSR_IA32_P5_MC_TYPE:
2373                 data = 0;
2374                 break;
2375         case MSR_IA32_MCG_CAP:
2376                 data = vcpu->arch.mcg_cap;
2377                 break;
2378         case MSR_IA32_MCG_CTL:
2379                 if (!(mcg_cap & MCG_CTL_P))
2380                         return 1;
2381                 data = vcpu->arch.mcg_ctl;
2382                 break;
2383         case MSR_IA32_MCG_STATUS:
2384                 data = vcpu->arch.mcg_status;
2385                 break;
2386         default:
2387                 if (msr >= MSR_IA32_MC0_CTL &&
2388                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2389                         u32 offset = msr - MSR_IA32_MC0_CTL;
2390                         data = vcpu->arch.mce_banks[offset];
2391                         break;
2392                 }
2393                 return 1;
2394         }
2395         *pdata = data;
2396         return 0;
2397 }
2398
2399 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2400 {
2401         switch (msr_info->index) {
2402         case MSR_IA32_PLATFORM_ID:
2403         case MSR_IA32_EBL_CR_POWERON:
2404         case MSR_IA32_DEBUGCTLMSR:
2405         case MSR_IA32_LASTBRANCHFROMIP:
2406         case MSR_IA32_LASTBRANCHTOIP:
2407         case MSR_IA32_LASTINTFROMIP:
2408         case MSR_IA32_LASTINTTOIP:
2409         case MSR_K8_SYSCFG:
2410         case MSR_K8_TSEG_ADDR:
2411         case MSR_K8_TSEG_MASK:
2412         case MSR_K7_HWCR:
2413         case MSR_VM_HSAVE_PA:
2414         case MSR_K8_INT_PENDING_MSG:
2415         case MSR_AMD64_NB_CFG:
2416         case MSR_FAM10H_MMIO_CONF_BASE:
2417         case MSR_AMD64_BU_CFG2:
2418         case MSR_IA32_PERF_CTL:
2419                 msr_info->data = 0;
2420                 break;
2421         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2422         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2423         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2424         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2425                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2426                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2427                 msr_info->data = 0;
2428                 break;
2429         case MSR_IA32_UCODE_REV:
2430                 msr_info->data = 0x100000000ULL;
2431                 break;
2432         case MSR_MTRRcap:
2433         case 0x200 ... 0x2ff:
2434                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2435         case 0xcd: /* fsb frequency */
2436                 msr_info->data = 3;
2437                 break;
2438                 /*
2439                  * MSR_EBC_FREQUENCY_ID
2440                  * Conservative value valid for even the basic CPU models.
2441                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2442                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2443                  * and 266MHz for model 3, or 4. Set Core Clock
2444                  * Frequency to System Bus Frequency Ratio to 1 (bits
2445                  * 31:24) even though these are only valid for CPU
2446                  * models > 2, however guests may end up dividing or
2447                  * multiplying by zero otherwise.
2448                  */
2449         case MSR_EBC_FREQUENCY_ID:
2450                 msr_info->data = 1 << 24;
2451                 break;
2452         case MSR_IA32_APICBASE:
2453                 msr_info->data = kvm_get_apic_base(vcpu);
2454                 break;
2455         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2456                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2457                 break;
2458         case MSR_IA32_TSCDEADLINE:
2459                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2460                 break;
2461         case MSR_IA32_TSC_ADJUST:
2462                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2463                 break;
2464         case MSR_IA32_MISC_ENABLE:
2465                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2466                 break;
2467         case MSR_IA32_SMBASE:
2468                 if (!msr_info->host_initiated)
2469                         return 1;
2470                 msr_info->data = vcpu->arch.smbase;
2471                 break;
2472         case MSR_IA32_PERF_STATUS:
2473                 /* TSC increment by tick */
2474                 msr_info->data = 1000ULL;
2475                 /* CPU multiplier */
2476                 msr_info->data |= (((uint64_t)4ULL) << 40);
2477                 break;
2478         case MSR_EFER:
2479                 msr_info->data = vcpu->arch.efer;
2480                 break;
2481         case MSR_KVM_WALL_CLOCK:
2482         case MSR_KVM_WALL_CLOCK_NEW:
2483                 msr_info->data = vcpu->kvm->arch.wall_clock;
2484                 break;
2485         case MSR_KVM_SYSTEM_TIME:
2486         case MSR_KVM_SYSTEM_TIME_NEW:
2487                 msr_info->data = vcpu->arch.time;
2488                 break;
2489         case MSR_KVM_ASYNC_PF_EN:
2490                 msr_info->data = vcpu->arch.apf.msr_val;
2491                 break;
2492         case MSR_KVM_STEAL_TIME:
2493                 msr_info->data = vcpu->arch.st.msr_val;
2494                 break;
2495         case MSR_KVM_PV_EOI_EN:
2496                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2497                 break;
2498         case MSR_IA32_P5_MC_ADDR:
2499         case MSR_IA32_P5_MC_TYPE:
2500         case MSR_IA32_MCG_CAP:
2501         case MSR_IA32_MCG_CTL:
2502         case MSR_IA32_MCG_STATUS:
2503         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2504                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2505         case MSR_K7_CLK_CTL:
2506                 /*
2507                  * Provide expected ramp-up count for K7. All other
2508                  * are set to zero, indicating minimum divisors for
2509                  * every field.
2510                  *
2511                  * This prevents guest kernels on AMD host with CPU
2512                  * type 6, model 8 and higher from exploding due to
2513                  * the rdmsr failing.
2514                  */
2515                 msr_info->data = 0x20000000;
2516                 break;
2517         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2518         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2519         case HV_X64_MSR_CRASH_CTL:
2520         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2521                 return kvm_hv_get_msr_common(vcpu,
2522                                              msr_info->index, &msr_info->data);
2523                 break;
2524         case MSR_IA32_BBL_CR_CTL3:
2525                 /* This legacy MSR exists but isn't fully documented in current
2526                  * silicon.  It is however accessed by winxp in very narrow
2527                  * scenarios where it sets bit #19, itself documented as
2528                  * a "reserved" bit.  Best effort attempt to source coherent
2529                  * read data here should the balance of the register be
2530                  * interpreted by the guest:
2531                  *
2532                  * L2 cache control register 3: 64GB range, 256KB size,
2533                  * enabled, latency 0x1, configured
2534                  */
2535                 msr_info->data = 0xbe702111;
2536                 break;
2537         case MSR_AMD64_OSVW_ID_LENGTH:
2538                 if (!guest_cpuid_has_osvw(vcpu))
2539                         return 1;
2540                 msr_info->data = vcpu->arch.osvw.length;
2541                 break;
2542         case MSR_AMD64_OSVW_STATUS:
2543                 if (!guest_cpuid_has_osvw(vcpu))
2544                         return 1;
2545                 msr_info->data = vcpu->arch.osvw.status;
2546                 break;
2547         default:
2548                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2549                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2550                 if (!ignore_msrs) {
2551                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2552                                                msr_info->index);
2553                         return 1;
2554                 } else {
2555                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2556                         msr_info->data = 0;
2557                 }
2558                 break;
2559         }
2560         return 0;
2561 }
2562 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2563
2564 /*
2565  * Read or write a bunch of msrs. All parameters are kernel addresses.
2566  *
2567  * @return number of msrs set successfully.
2568  */
2569 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2570                     struct kvm_msr_entry *entries,
2571                     int (*do_msr)(struct kvm_vcpu *vcpu,
2572                                   unsigned index, u64 *data))
2573 {
2574         int i, idx;
2575
2576         idx = srcu_read_lock(&vcpu->kvm->srcu);
2577         for (i = 0; i < msrs->nmsrs; ++i)
2578                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2579                         break;
2580         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2581
2582         return i;
2583 }
2584
2585 /*
2586  * Read or write a bunch of msrs. Parameters are user addresses.
2587  *
2588  * @return number of msrs set successfully.
2589  */
2590 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2591                   int (*do_msr)(struct kvm_vcpu *vcpu,
2592                                 unsigned index, u64 *data),
2593                   int writeback)
2594 {
2595         struct kvm_msrs msrs;
2596         struct kvm_msr_entry *entries;
2597         int r, n;
2598         unsigned size;
2599
2600         r = -EFAULT;
2601         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2602                 goto out;
2603
2604         r = -E2BIG;
2605         if (msrs.nmsrs >= MAX_IO_MSRS)
2606                 goto out;
2607
2608         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2609         entries = memdup_user(user_msrs->entries, size);
2610         if (IS_ERR(entries)) {
2611                 r = PTR_ERR(entries);
2612                 goto out;
2613         }
2614
2615         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2616         if (r < 0)
2617                 goto out_free;
2618
2619         r = -EFAULT;
2620         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2621                 goto out_free;
2622
2623         r = n;
2624
2625 out_free:
2626         kfree(entries);
2627 out:
2628         return r;
2629 }
2630
2631 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2632 {
2633         int r;
2634
2635         switch (ext) {
2636         case KVM_CAP_IRQCHIP:
2637         case KVM_CAP_HLT:
2638         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2639         case KVM_CAP_SET_TSS_ADDR:
2640         case KVM_CAP_EXT_CPUID:
2641         case KVM_CAP_EXT_EMUL_CPUID:
2642         case KVM_CAP_CLOCKSOURCE:
2643         case KVM_CAP_PIT:
2644         case KVM_CAP_NOP_IO_DELAY:
2645         case KVM_CAP_MP_STATE:
2646         case KVM_CAP_SYNC_MMU:
2647         case KVM_CAP_USER_NMI:
2648         case KVM_CAP_REINJECT_CONTROL:
2649         case KVM_CAP_IRQ_INJECT_STATUS:
2650         case KVM_CAP_IOEVENTFD:
2651         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2652         case KVM_CAP_PIT2:
2653         case KVM_CAP_PIT_STATE2:
2654         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2655         case KVM_CAP_XEN_HVM:
2656         case KVM_CAP_VCPU_EVENTS:
2657         case KVM_CAP_HYPERV:
2658         case KVM_CAP_HYPERV_VAPIC:
2659         case KVM_CAP_HYPERV_SPIN:
2660         case KVM_CAP_HYPERV_SYNIC:
2661         case KVM_CAP_PCI_SEGMENT:
2662         case KVM_CAP_DEBUGREGS:
2663         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2664         case KVM_CAP_XSAVE:
2665         case KVM_CAP_ASYNC_PF:
2666         case KVM_CAP_GET_TSC_KHZ:
2667         case KVM_CAP_KVMCLOCK_CTRL:
2668         case KVM_CAP_READONLY_MEM:
2669         case KVM_CAP_HYPERV_TIME:
2670         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2671         case KVM_CAP_TSC_DEADLINE_TIMER:
2672         case KVM_CAP_ENABLE_CAP_VM:
2673         case KVM_CAP_DISABLE_QUIRKS:
2674         case KVM_CAP_SET_BOOT_CPU_ID:
2675         case KVM_CAP_SPLIT_IRQCHIP:
2676         case KVM_CAP_IMMEDIATE_EXIT:
2677                 r = 1;
2678                 break;
2679         case KVM_CAP_ADJUST_CLOCK:
2680                 r = KVM_CLOCK_TSC_STABLE;
2681                 break;
2682         case KVM_CAP_X86_SMM:
2683                 /* SMBASE is usually relocated above 1M on modern chipsets,
2684                  * and SMM handlers might indeed rely on 4G segment limits,
2685                  * so do not report SMM to be available if real mode is
2686                  * emulated via vm86 mode.  Still, do not go to great lengths
2687                  * to avoid userspace's usage of the feature, because it is a
2688                  * fringe case that is not enabled except via specific settings
2689                  * of the module parameters.
2690                  */
2691                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2692                 break;
2693         case KVM_CAP_VAPIC:
2694                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2695                 break;
2696         case KVM_CAP_NR_VCPUS:
2697                 r = KVM_SOFT_MAX_VCPUS;
2698                 break;
2699         case KVM_CAP_MAX_VCPUS:
2700                 r = KVM_MAX_VCPUS;
2701                 break;
2702         case KVM_CAP_NR_MEMSLOTS:
2703                 r = KVM_USER_MEM_SLOTS;
2704                 break;
2705         case KVM_CAP_PV_MMU:    /* obsolete */
2706                 r = 0;
2707                 break;
2708         case KVM_CAP_MCE:
2709                 r = KVM_MAX_MCE_BANKS;
2710                 break;
2711         case KVM_CAP_XCRS:
2712                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2713                 break;
2714         case KVM_CAP_TSC_CONTROL:
2715                 r = kvm_has_tsc_control;
2716                 break;
2717         case KVM_CAP_X2APIC_API:
2718                 r = KVM_X2APIC_API_VALID_FLAGS;
2719                 break;
2720         default:
2721                 r = 0;
2722                 break;
2723         }
2724         return r;
2725
2726 }
2727
2728 long kvm_arch_dev_ioctl(struct file *filp,
2729                         unsigned int ioctl, unsigned long arg)
2730 {
2731         void __user *argp = (void __user *)arg;
2732         long r;
2733
2734         switch (ioctl) {
2735         case KVM_GET_MSR_INDEX_LIST: {
2736                 struct kvm_msr_list __user *user_msr_list = argp;
2737                 struct kvm_msr_list msr_list;
2738                 unsigned n;
2739
2740                 r = -EFAULT;
2741                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2742                         goto out;
2743                 n = msr_list.nmsrs;
2744                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2745                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2746                         goto out;
2747                 r = -E2BIG;
2748                 if (n < msr_list.nmsrs)
2749                         goto out;
2750                 r = -EFAULT;
2751                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2752                                  num_msrs_to_save * sizeof(u32)))
2753                         goto out;
2754                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2755                                  &emulated_msrs,
2756                                  num_emulated_msrs * sizeof(u32)))
2757                         goto out;
2758                 r = 0;
2759                 break;
2760         }
2761         case KVM_GET_SUPPORTED_CPUID:
2762         case KVM_GET_EMULATED_CPUID: {
2763                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2764                 struct kvm_cpuid2 cpuid;
2765
2766                 r = -EFAULT;
2767                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2768                         goto out;
2769
2770                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2771                                             ioctl);
2772                 if (r)
2773                         goto out;
2774
2775                 r = -EFAULT;
2776                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2777                         goto out;
2778                 r = 0;
2779                 break;
2780         }
2781         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2782                 r = -EFAULT;
2783                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2784                                  sizeof(kvm_mce_cap_supported)))
2785                         goto out;
2786                 r = 0;
2787                 break;
2788         }
2789         default:
2790                 r = -EINVAL;
2791         }
2792 out:
2793         return r;
2794 }
2795
2796 static void wbinvd_ipi(void *garbage)
2797 {
2798         wbinvd();
2799 }
2800
2801 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2802 {
2803         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2804 }
2805
2806 static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
2807 {
2808         set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
2809 }
2810
2811 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2812 {
2813         /* Address WBINVD may be executed by guest */
2814         if (need_emulate_wbinvd(vcpu)) {
2815                 if (kvm_x86_ops->has_wbinvd_exit())
2816                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2817                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2818                         smp_call_function_single(vcpu->cpu,
2819                                         wbinvd_ipi, NULL, 1);
2820         }
2821
2822         kvm_x86_ops->vcpu_load(vcpu, cpu);
2823
2824         /* Apply any externally detected TSC adjustments (due to suspend) */
2825         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2826                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2827                 vcpu->arch.tsc_offset_adjustment = 0;
2828                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2829         }
2830
2831         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2832                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2833                                 rdtsc() - vcpu->arch.last_host_tsc;
2834                 if (tsc_delta < 0)
2835                         mark_tsc_unstable("KVM discovered backwards TSC");
2836
2837                 if (check_tsc_unstable()) {
2838                         u64 offset = kvm_compute_tsc_offset(vcpu,
2839                                                 vcpu->arch.last_guest_tsc);
2840                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2841                         vcpu->arch.tsc_catchup = 1;
2842                 }
2843                 if (kvm_lapic_hv_timer_in_use(vcpu) &&
2844                                 kvm_x86_ops->set_hv_timer(vcpu,
2845                                         kvm_get_lapic_target_expiration_tsc(vcpu)))
2846                         kvm_lapic_switch_to_sw_timer(vcpu);
2847                 /*
2848                  * On a host with synchronized TSC, there is no need to update
2849                  * kvmclock on vcpu->cpu migration
2850                  */
2851                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2852                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2853                 if (vcpu->cpu != cpu)
2854                         kvm_migrate_timers(vcpu);
2855                 vcpu->cpu = cpu;
2856         }
2857
2858         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2859 }
2860
2861 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2862 {
2863         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2864                 return;
2865
2866         vcpu->arch.st.steal.preempted = 1;
2867
2868         kvm_vcpu_write_guest_offset_cached(vcpu, &vcpu->arch.st.stime,
2869                         &vcpu->arch.st.steal.preempted,
2870                         offsetof(struct kvm_steal_time, preempted),
2871                         sizeof(vcpu->arch.st.steal.preempted));
2872 }
2873
2874 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2875 {
2876         int idx;
2877         /*
2878          * Disable page faults because we're in atomic context here.
2879          * kvm_write_guest_offset_cached() would call might_fault()
2880          * that relies on pagefault_disable() to tell if there's a
2881          * bug. NOTE: the write to guest memory may not go through if
2882          * during postcopy live migration or if there's heavy guest
2883          * paging.
2884          */
2885         pagefault_disable();
2886         /*
2887          * kvm_memslots() will be called by
2888          * kvm_write_guest_offset_cached() so take the srcu lock.
2889          */
2890         idx = srcu_read_lock(&vcpu->kvm->srcu);
2891         kvm_steal_time_set_preempted(vcpu);
2892         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2893         pagefault_enable();
2894         kvm_x86_ops->vcpu_put(vcpu);
2895         kvm_put_guest_fpu(vcpu);
2896         vcpu->arch.last_host_tsc = rdtsc();
2897 }
2898
2899 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2900                                     struct kvm_lapic_state *s)
2901 {
2902         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2903                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2904
2905         return kvm_apic_get_state(vcpu, s);
2906 }
2907
2908 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2909                                     struct kvm_lapic_state *s)
2910 {
2911         int r;
2912
2913         r = kvm_apic_set_state(vcpu, s);
2914         if (r)
2915                 return r;
2916         update_cr8_intercept(vcpu);
2917
2918         return 0;
2919 }
2920
2921 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2922 {
2923         return (!lapic_in_kernel(vcpu) ||
2924                 kvm_apic_accept_pic_intr(vcpu));
2925 }
2926
2927 /*
2928  * if userspace requested an interrupt window, check that the
2929  * interrupt window is open.
2930  *
2931  * No need to exit to userspace if we already have an interrupt queued.
2932  */
2933 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2934 {
2935         return kvm_arch_interrupt_allowed(vcpu) &&
2936                 !kvm_cpu_has_interrupt(vcpu) &&
2937                 !kvm_event_needs_reinjection(vcpu) &&
2938                 kvm_cpu_accept_dm_intr(vcpu);
2939 }
2940
2941 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2942                                     struct kvm_interrupt *irq)
2943 {
2944         if (irq->irq >= KVM_NR_INTERRUPTS)
2945                 return -EINVAL;
2946
2947         if (!irqchip_in_kernel(vcpu->kvm)) {
2948                 kvm_queue_interrupt(vcpu, irq->irq, false);
2949                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2950                 return 0;
2951         }
2952
2953         /*
2954          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2955          * fail for in-kernel 8259.
2956          */
2957         if (pic_in_kernel(vcpu->kvm))
2958                 return -ENXIO;
2959
2960         if (vcpu->arch.pending_external_vector != -1)
2961                 return -EEXIST;
2962
2963         vcpu->arch.pending_external_vector = irq->irq;
2964         kvm_make_request(KVM_REQ_EVENT, vcpu);
2965         return 0;
2966 }
2967
2968 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2969 {
2970         kvm_inject_nmi(vcpu);
2971
2972         return 0;
2973 }
2974
2975 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2976 {
2977         kvm_make_request(KVM_REQ_SMI, vcpu);
2978
2979         return 0;
2980 }
2981
2982 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2983                                            struct kvm_tpr_access_ctl *tac)
2984 {
2985         if (tac->flags)
2986                 return -EINVAL;
2987         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2988         return 0;
2989 }
2990
2991 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2992                                         u64 mcg_cap)
2993 {
2994         int r;
2995         unsigned bank_num = mcg_cap & 0xff, bank;
2996
2997         r = -EINVAL;
2998         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2999                 goto out;
3000         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3001                 goto out;
3002         r = 0;
3003         vcpu->arch.mcg_cap = mcg_cap;
3004         /* Init IA32_MCG_CTL to all 1s */
3005         if (mcg_cap & MCG_CTL_P)
3006                 vcpu->arch.mcg_ctl = ~(u64)0;
3007         /* Init IA32_MCi_CTL to all 1s */
3008         for (bank = 0; bank < bank_num; bank++)
3009                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3010
3011         if (kvm_x86_ops->setup_mce)
3012                 kvm_x86_ops->setup_mce(vcpu);
3013 out:
3014         return r;
3015 }
3016
3017 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3018                                       struct kvm_x86_mce *mce)
3019 {
3020         u64 mcg_cap = vcpu->arch.mcg_cap;
3021         unsigned bank_num = mcg_cap & 0xff;
3022         u64 *banks = vcpu->arch.mce_banks;
3023
3024         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3025                 return -EINVAL;
3026         /*
3027          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3028          * reporting is disabled
3029          */
3030         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3031             vcpu->arch.mcg_ctl != ~(u64)0)
3032                 return 0;
3033         banks += 4 * mce->bank;
3034         /*
3035          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3036          * reporting is disabled for the bank
3037          */
3038         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3039                 return 0;
3040         if (mce->status & MCI_STATUS_UC) {
3041                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3042                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3043                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3044                         return 0;
3045                 }
3046                 if (banks[1] & MCI_STATUS_VAL)
3047                         mce->status |= MCI_STATUS_OVER;
3048                 banks[2] = mce->addr;
3049                 banks[3] = mce->misc;
3050                 vcpu->arch.mcg_status = mce->mcg_status;
3051                 banks[1] = mce->status;
3052                 kvm_queue_exception(vcpu, MC_VECTOR);
3053         } else if (!(banks[1] & MCI_STATUS_VAL)
3054                    || !(banks[1] & MCI_STATUS_UC)) {
3055                 if (banks[1] & MCI_STATUS_VAL)
3056                         mce->status |= MCI_STATUS_OVER;
3057                 banks[2] = mce->addr;
3058                 banks[3] = mce->misc;
3059                 banks[1] = mce->status;
3060         } else
3061                 banks[1] |= MCI_STATUS_OVER;
3062         return 0;
3063 }
3064
3065 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3066                                                struct kvm_vcpu_events *events)
3067 {
3068         process_nmi(vcpu);
3069         events->exception.injected =
3070                 vcpu->arch.exception.pending &&
3071                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3072         events->exception.nr = vcpu->arch.exception.nr;
3073         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3074         events->exception.pad = 0;
3075         events->exception.error_code = vcpu->arch.exception.error_code;
3076
3077         events->interrupt.injected =
3078                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3079         events->interrupt.nr = vcpu->arch.interrupt.nr;
3080         events->interrupt.soft = 0;
3081         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3082
3083         events->nmi.injected = vcpu->arch.nmi_injected;
3084         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3085         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3086         events->nmi.pad = 0;
3087
3088         events->sipi_vector = 0; /* never valid when reporting to user space */
3089
3090         events->smi.smm = is_smm(vcpu);
3091         events->smi.pending = vcpu->arch.smi_pending;
3092         events->smi.smm_inside_nmi =
3093                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3094         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3095
3096         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3097                          | KVM_VCPUEVENT_VALID_SHADOW
3098                          | KVM_VCPUEVENT_VALID_SMM);
3099         memset(&events->reserved, 0, sizeof(events->reserved));
3100 }
3101
3102 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3103
3104 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3105                                               struct kvm_vcpu_events *events)
3106 {
3107         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3108                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3109                               | KVM_VCPUEVENT_VALID_SHADOW
3110                               | KVM_VCPUEVENT_VALID_SMM))
3111                 return -EINVAL;
3112
3113         if (events->exception.injected &&
3114             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3115              is_guest_mode(vcpu)))
3116                 return -EINVAL;
3117
3118         /* INITs are latched while in SMM */
3119         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3120             (events->smi.smm || events->smi.pending) &&
3121             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3122                 return -EINVAL;
3123
3124         process_nmi(vcpu);
3125         vcpu->arch.exception.pending = events->exception.injected;
3126         vcpu->arch.exception.nr = events->exception.nr;
3127         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3128         vcpu->arch.exception.error_code = events->exception.error_code;
3129
3130         vcpu->arch.interrupt.pending = events->interrupt.injected;
3131         vcpu->arch.interrupt.nr = events->interrupt.nr;
3132         vcpu->arch.interrupt.soft = events->interrupt.soft;
3133         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3134                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3135                                                   events->interrupt.shadow);
3136
3137         vcpu->arch.nmi_injected = events->nmi.injected;
3138         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3139                 vcpu->arch.nmi_pending = events->nmi.pending;
3140         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3141
3142         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3143             lapic_in_kernel(vcpu))
3144                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3145
3146         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3147                 u32 hflags = vcpu->arch.hflags;
3148                 if (events->smi.smm)
3149                         hflags |= HF_SMM_MASK;
3150                 else
3151                         hflags &= ~HF_SMM_MASK;
3152                 kvm_set_hflags(vcpu, hflags);
3153
3154                 vcpu->arch.smi_pending = events->smi.pending;
3155                 if (events->smi.smm_inside_nmi)
3156                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3157                 else
3158                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3159                 if (lapic_in_kernel(vcpu)) {
3160                         if (events->smi.latched_init)
3161                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3162                         else
3163                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3164                 }
3165         }
3166
3167         kvm_make_request(KVM_REQ_EVENT, vcpu);
3168
3169         return 0;
3170 }
3171
3172 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3173                                              struct kvm_debugregs *dbgregs)
3174 {
3175         unsigned long val;
3176
3177         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3178         kvm_get_dr(vcpu, 6, &val);
3179         dbgregs->dr6 = val;
3180         dbgregs->dr7 = vcpu->arch.dr7;
3181         dbgregs->flags = 0;
3182         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3183 }
3184
3185 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3186                                             struct kvm_debugregs *dbgregs)
3187 {
3188         if (dbgregs->flags)
3189                 return -EINVAL;
3190
3191         if (dbgregs->dr6 & ~0xffffffffull)
3192                 return -EINVAL;
3193         if (dbgregs->dr7 & ~0xffffffffull)
3194                 return -EINVAL;
3195
3196         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3197         kvm_update_dr0123(vcpu);
3198         vcpu->arch.dr6 = dbgregs->dr6;
3199         kvm_update_dr6(vcpu);
3200         vcpu->arch.dr7 = dbgregs->dr7;
3201         kvm_update_dr7(vcpu);
3202
3203         return 0;
3204 }
3205
3206 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3207
3208 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3209 {
3210         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3211         u64 xstate_bv = xsave->header.xfeatures;
3212         u64 valid;
3213
3214         /*
3215          * Copy legacy XSAVE area, to avoid complications with CPUID
3216          * leaves 0 and 1 in the loop below.
3217          */
3218         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3219
3220         /* Set XSTATE_BV */
3221         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3222         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3223
3224         /*
3225          * Copy each region from the possibly compacted offset to the
3226          * non-compacted offset.
3227          */
3228         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3229         while (valid) {
3230                 u64 feature = valid & -valid;
3231                 int index = fls64(feature) - 1;
3232                 void *src = get_xsave_addr(xsave, feature);
3233
3234                 if (src) {
3235                         u32 size, offset, ecx, edx;
3236                         cpuid_count(XSTATE_CPUID, index,
3237                                     &size, &offset, &ecx, &edx);
3238                         memcpy(dest + offset, src, size);
3239                 }
3240
3241                 valid -= feature;
3242         }
3243 }
3244
3245 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3246 {
3247         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3248         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3249         u64 valid;
3250
3251         /*
3252          * Copy legacy XSAVE area, to avoid complications with CPUID
3253          * leaves 0 and 1 in the loop below.
3254          */
3255         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3256
3257         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3258         xsave->header.xfeatures = xstate_bv;
3259         if (boot_cpu_has(X86_FEATURE_XSAVES))
3260                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3261
3262         /*
3263          * Copy each region from the non-compacted offset to the
3264          * possibly compacted offset.
3265          */
3266         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3267         while (valid) {
3268                 u64 feature = valid & -valid;
3269                 int index = fls64(feature) - 1;
3270                 void *dest = get_xsave_addr(xsave, feature);
3271
3272                 if (dest) {
3273                         u32 size, offset, ecx, edx;
3274                         cpuid_count(XSTATE_CPUID, index,
3275                                     &size, &offset, &ecx, &edx);
3276                         memcpy(dest, src + offset, size);
3277                 }
3278
3279                 valid -= feature;
3280         }
3281 }
3282
3283 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3284                                          struct kvm_xsave *guest_xsave)
3285 {
3286         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3287                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3288                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3289         } else {
3290                 memcpy(guest_xsave->region,
3291                         &vcpu->arch.guest_fpu.state.fxsave,
3292                         sizeof(struct fxregs_state));
3293                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3294                         XFEATURE_MASK_FPSSE;
3295         }
3296 }
3297
3298 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3299                                         struct kvm_xsave *guest_xsave)
3300 {
3301         u64 xstate_bv =
3302                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3303
3304         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3305                 /*
3306                  * Here we allow setting states that are not present in
3307                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3308                  * with old userspace.
3309                  */
3310                 if (xstate_bv & ~kvm_supported_xcr0())
3311                         return -EINVAL;
3312                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3313         } else {
3314                 if (xstate_bv & ~XFEATURE_MASK_FPSSE)
3315                         return -EINVAL;
3316                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3317                         guest_xsave->region, sizeof(struct fxregs_state));
3318         }
3319         return 0;
3320 }
3321
3322 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3323                                         struct kvm_xcrs *guest_xcrs)
3324 {
3325         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3326                 guest_xcrs->nr_xcrs = 0;
3327                 return;
3328         }
3329
3330         guest_xcrs->nr_xcrs = 1;
3331         guest_xcrs->flags = 0;
3332         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3333         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3334 }
3335
3336 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3337                                        struct kvm_xcrs *guest_xcrs)
3338 {
3339         int i, r = 0;
3340
3341         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3342                 return -EINVAL;
3343
3344         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3345                 return -EINVAL;
3346
3347         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3348                 /* Only support XCR0 currently */
3349                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3350                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3351                                 guest_xcrs->xcrs[i].value);
3352                         break;
3353                 }
3354         if (r)
3355                 r = -EINVAL;
3356         return r;
3357 }
3358
3359 /*
3360  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3361  * stopped by the hypervisor.  This function will be called from the host only.
3362  * EINVAL is returned when the host attempts to set the flag for a guest that
3363  * does not support pv clocks.
3364  */
3365 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3366 {
3367         if (!vcpu->arch.pv_time_enabled)
3368                 return -EINVAL;
3369         vcpu->arch.pvclock_set_guest_stopped_request = true;
3370         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3371         return 0;
3372 }
3373
3374 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3375                                      struct kvm_enable_cap *cap)
3376 {
3377         if (cap->flags)
3378                 return -EINVAL;
3379
3380         switch (cap->cap) {
3381         case KVM_CAP_HYPERV_SYNIC:
3382                 if (!irqchip_in_kernel(vcpu->kvm))
3383                         return -EINVAL;
3384                 return kvm_hv_activate_synic(vcpu);
3385         default:
3386                 return -EINVAL;
3387         }
3388 }
3389
3390 long kvm_arch_vcpu_ioctl(struct file *filp,
3391                          unsigned int ioctl, unsigned long arg)
3392 {
3393         struct kvm_vcpu *vcpu = filp->private_data;
3394         void __user *argp = (void __user *)arg;
3395         int r;
3396         union {
3397                 struct kvm_lapic_state *lapic;
3398                 struct kvm_xsave *xsave;
3399                 struct kvm_xcrs *xcrs;
3400                 void *buffer;
3401         } u;
3402
3403         u.buffer = NULL;
3404         switch (ioctl) {
3405         case KVM_GET_LAPIC: {
3406                 r = -EINVAL;
3407                 if (!lapic_in_kernel(vcpu))
3408                         goto out;
3409                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3410
3411                 r = -ENOMEM;
3412                 if (!u.lapic)
3413                         goto out;
3414                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3415                 if (r)
3416                         goto out;
3417                 r = -EFAULT;
3418                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3419                         goto out;
3420                 r = 0;
3421                 break;
3422         }
3423         case KVM_SET_LAPIC: {
3424                 r = -EINVAL;
3425                 if (!lapic_in_kernel(vcpu))
3426                         goto out;
3427                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3428                 if (IS_ERR(u.lapic))
3429                         return PTR_ERR(u.lapic);
3430
3431                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3432                 break;
3433         }
3434         case KVM_INTERRUPT: {
3435                 struct kvm_interrupt irq;
3436
3437                 r = -EFAULT;
3438                 if (copy_from_user(&irq, argp, sizeof irq))
3439                         goto out;
3440                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3441                 break;
3442         }
3443         case KVM_NMI: {
3444                 r = kvm_vcpu_ioctl_nmi(vcpu);
3445                 break;
3446         }
3447         case KVM_SMI: {
3448                 r = kvm_vcpu_ioctl_smi(vcpu);
3449                 break;
3450         }
3451         case KVM_SET_CPUID: {
3452                 struct kvm_cpuid __user *cpuid_arg = argp;
3453                 struct kvm_cpuid cpuid;
3454
3455                 r = -EFAULT;
3456                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3457                         goto out;
3458                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3459                 break;
3460         }
3461         case KVM_SET_CPUID2: {
3462                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3463                 struct kvm_cpuid2 cpuid;
3464
3465                 r = -EFAULT;
3466                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3467                         goto out;
3468                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3469                                               cpuid_arg->entries);
3470                 break;
3471         }
3472         case KVM_GET_CPUID2: {
3473                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3474                 struct kvm_cpuid2 cpuid;
3475
3476                 r = -EFAULT;
3477                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3478                         goto out;
3479                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3480                                               cpuid_arg->entries);
3481                 if (r)
3482                         goto out;
3483                 r = -EFAULT;
3484                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3485                         goto out;
3486                 r = 0;
3487                 break;
3488         }
3489         case KVM_GET_MSRS:
3490                 r = msr_io(vcpu, argp, do_get_msr, 1);
3491                 break;
3492         case KVM_SET_MSRS:
3493                 r = msr_io(vcpu, argp, do_set_msr, 0);
3494                 break;
3495         case KVM_TPR_ACCESS_REPORTING: {
3496                 struct kvm_tpr_access_ctl tac;
3497
3498                 r = -EFAULT;
3499                 if (copy_from_user(&tac, argp, sizeof tac))
3500                         goto out;
3501                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3502                 if (r)
3503                         goto out;
3504                 r = -EFAULT;
3505                 if (copy_to_user(argp, &tac, sizeof tac))
3506                         goto out;
3507                 r = 0;
3508                 break;
3509         };
3510         case KVM_SET_VAPIC_ADDR: {
3511                 struct kvm_vapic_addr va;
3512                 int idx;
3513
3514                 r = -EINVAL;
3515                 if (!lapic_in_kernel(vcpu))
3516                         goto out;
3517                 r = -EFAULT;
3518                 if (copy_from_user(&va, argp, sizeof va))
3519                         goto out;
3520                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3521                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3522                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3523                 break;
3524         }
3525         case KVM_X86_SETUP_MCE: {
3526                 u64 mcg_cap;
3527
3528                 r = -EFAULT;
3529                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3530                         goto out;
3531                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3532                 break;
3533         }
3534         case KVM_X86_SET_MCE: {
3535                 struct kvm_x86_mce mce;
3536
3537                 r = -EFAULT;
3538                 if (copy_from_user(&mce, argp, sizeof mce))
3539                         goto out;
3540                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3541                 break;
3542         }
3543         case KVM_GET_VCPU_EVENTS: {
3544                 struct kvm_vcpu_events events;
3545
3546                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3547
3548                 r = -EFAULT;
3549                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3550                         break;
3551                 r = 0;
3552                 break;
3553         }
3554         case KVM_SET_VCPU_EVENTS: {
3555                 struct kvm_vcpu_events events;
3556
3557                 r = -EFAULT;
3558                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3559                         break;
3560
3561                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3562                 break;
3563         }
3564         case KVM_GET_DEBUGREGS: {
3565                 struct kvm_debugregs dbgregs;
3566
3567                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3568
3569                 r = -EFAULT;
3570                 if (copy_to_user(argp, &dbgregs,
3571                                  sizeof(struct kvm_debugregs)))
3572                         break;
3573                 r = 0;
3574                 break;
3575         }
3576         case KVM_SET_DEBUGREGS: {
3577                 struct kvm_debugregs dbgregs;
3578
3579                 r = -EFAULT;
3580                 if (copy_from_user(&dbgregs, argp,
3581                                    sizeof(struct kvm_debugregs)))
3582                         break;
3583
3584                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3585                 break;
3586         }
3587         case KVM_GET_XSAVE: {
3588                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3589                 r = -ENOMEM;
3590                 if (!u.xsave)
3591                         break;
3592
3593                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3594
3595                 r = -EFAULT;
3596                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3597                         break;
3598                 r = 0;
3599                 break;
3600         }
3601         case KVM_SET_XSAVE: {
3602                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3603                 if (IS_ERR(u.xsave))
3604                         return PTR_ERR(u.xsave);
3605
3606                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3607                 break;
3608         }
3609         case KVM_GET_XCRS: {
3610                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3611                 r = -ENOMEM;
3612                 if (!u.xcrs)
3613                         break;
3614
3615                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3616
3617                 r = -EFAULT;
3618                 if (copy_to_user(argp, u.xcrs,
3619                                  sizeof(struct kvm_xcrs)))
3620                         break;
3621                 r = 0;
3622                 break;
3623         }
3624         case KVM_SET_XCRS: {
3625                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3626                 if (IS_ERR(u.xcrs))
3627                         return PTR_ERR(u.xcrs);
3628
3629                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3630                 break;
3631         }
3632         case KVM_SET_TSC_KHZ: {
3633                 u32 user_tsc_khz;
3634
3635                 r = -EINVAL;
3636                 user_tsc_khz = (u32)arg;
3637
3638                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3639                         goto out;
3640
3641                 if (user_tsc_khz == 0)
3642                         user_tsc_khz = tsc_khz;
3643
3644                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3645                         r = 0;
3646
3647                 goto out;
3648         }
3649         case KVM_GET_TSC_KHZ: {
3650                 r = vcpu->arch.virtual_tsc_khz;
3651                 goto out;
3652         }
3653         case KVM_KVMCLOCK_CTRL: {
3654                 r = kvm_set_guest_paused(vcpu);
3655                 goto out;
3656         }
3657         case KVM_ENABLE_CAP: {
3658                 struct kvm_enable_cap cap;
3659
3660                 r = -EFAULT;
3661                 if (copy_from_user(&cap, argp, sizeof(cap)))
3662                         goto out;
3663                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3664                 break;
3665         }
3666         default:
3667                 r = -EINVAL;
3668         }
3669 out:
3670         kfree(u.buffer);
3671         return r;
3672 }
3673
3674 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3675 {
3676         return VM_FAULT_SIGBUS;
3677 }
3678
3679 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3680 {
3681         int ret;
3682
3683         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3684                 return -EINVAL;
3685         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3686         return ret;
3687 }
3688
3689 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3690                                               u64 ident_addr)
3691 {
3692         kvm->arch.ept_identity_map_addr = ident_addr;
3693         return 0;
3694 }
3695
3696 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3697                                           u32 kvm_nr_mmu_pages)
3698 {
3699         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3700                 return -EINVAL;
3701
3702         mutex_lock(&kvm->slots_lock);
3703
3704         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3705         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3706
3707         mutex_unlock(&kvm->slots_lock);
3708         return 0;
3709 }
3710
3711 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3712 {
3713         return kvm->arch.n_max_mmu_pages;
3714 }
3715
3716 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3717 {
3718         struct kvm_pic *pic = kvm->arch.vpic;
3719         int r;
3720
3721         r = 0;
3722         switch (chip->chip_id) {
3723         case KVM_IRQCHIP_PIC_MASTER:
3724                 memcpy(&chip->chip.pic, &pic->pics[0],
3725                         sizeof(struct kvm_pic_state));
3726                 break;
3727         case KVM_IRQCHIP_PIC_SLAVE:
3728                 memcpy(&chip->chip.pic, &pic->pics[1],
3729                         sizeof(struct kvm_pic_state));
3730                 break;
3731         case KVM_IRQCHIP_IOAPIC:
3732                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3733                 break;
3734         default:
3735                 r = -EINVAL;
3736                 break;
3737         }
3738         return r;
3739 }
3740
3741 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3742 {
3743         struct kvm_pic *pic = kvm->arch.vpic;
3744         int r;
3745
3746         r = 0;
3747         switch (chip->chip_id) {
3748         case KVM_IRQCHIP_PIC_MASTER:
3749                 spin_lock(&pic->lock);
3750                 memcpy(&pic->pics[0], &chip->chip.pic,
3751                         sizeof(struct kvm_pic_state));
3752                 spin_unlock(&pic->lock);
3753                 break;
3754         case KVM_IRQCHIP_PIC_SLAVE:
3755                 spin_lock(&pic->lock);
3756                 memcpy(&pic->pics[1], &chip->chip.pic,
3757                         sizeof(struct kvm_pic_state));
3758                 spin_unlock(&pic->lock);
3759                 break;
3760         case KVM_IRQCHIP_IOAPIC:
3761                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3762                 break;
3763         default:
3764                 r = -EINVAL;
3765                 break;
3766         }
3767         kvm_pic_update_irq(pic);
3768         return r;
3769 }
3770
3771 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3772 {
3773         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3774
3775         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3776
3777         mutex_lock(&kps->lock);
3778         memcpy(ps, &kps->channels, sizeof(*ps));
3779         mutex_unlock(&kps->lock);
3780         return 0;
3781 }
3782
3783 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3784 {
3785         int i;
3786         struct kvm_pit *pit = kvm->arch.vpit;
3787
3788         mutex_lock(&pit->pit_state.lock);
3789         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3790         for (i = 0; i < 3; i++)
3791                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3792         mutex_unlock(&pit->pit_state.lock);
3793         return 0;
3794 }
3795
3796 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3797 {
3798         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3799         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3800                 sizeof(ps->channels));
3801         ps->flags = kvm->arch.vpit->pit_state.flags;
3802         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3803         memset(&ps->reserved, 0, sizeof(ps->reserved));
3804         return 0;
3805 }
3806
3807 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3808 {
3809         int start = 0;
3810         int i;
3811         u32 prev_legacy, cur_legacy;
3812         struct kvm_pit *pit = kvm->arch.vpit;
3813
3814         mutex_lock(&pit->pit_state.lock);
3815         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3816         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3817         if (!prev_legacy && cur_legacy)
3818                 start = 1;
3819         memcpy(&pit->pit_state.channels, &ps->channels,
3820                sizeof(pit->pit_state.channels));
3821         pit->pit_state.flags = ps->flags;
3822         for (i = 0; i < 3; i++)
3823                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3824                                    start && i == 0);
3825         mutex_unlock(&pit->pit_state.lock);
3826         return 0;
3827 }
3828
3829 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3830                                  struct kvm_reinject_control *control)
3831 {
3832         struct kvm_pit *pit = kvm->arch.vpit;
3833
3834         if (!pit)
3835                 return -ENXIO;
3836
3837         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3838          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3839          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3840          */
3841         mutex_lock(&pit->pit_state.lock);
3842         kvm_pit_set_reinject(pit, control->pit_reinject);
3843         mutex_unlock(&pit->pit_state.lock);
3844
3845         return 0;
3846 }
3847
3848 /**
3849  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3850  * @kvm: kvm instance
3851  * @log: slot id and address to which we copy the log
3852  *
3853  * Steps 1-4 below provide general overview of dirty page logging. See
3854  * kvm_get_dirty_log_protect() function description for additional details.
3855  *
3856  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3857  * always flush the TLB (step 4) even if previous step failed  and the dirty
3858  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3859  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3860  * writes will be marked dirty for next log read.
3861  *
3862  *   1. Take a snapshot of the bit and clear it if needed.
3863  *   2. Write protect the corresponding page.
3864  *   3. Copy the snapshot to the userspace.
3865  *   4. Flush TLB's if needed.
3866  */
3867 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3868 {
3869         bool is_dirty = false;
3870         int r;
3871
3872         mutex_lock(&kvm->slots_lock);
3873
3874         /*
3875          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3876          */
3877         if (kvm_x86_ops->flush_log_dirty)
3878                 kvm_x86_ops->flush_log_dirty(kvm);
3879
3880         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3881
3882         /*
3883          * All the TLBs can be flushed out of mmu lock, see the comments in
3884          * kvm_mmu_slot_remove_write_access().
3885          */
3886         lockdep_assert_held(&kvm->slots_lock);
3887         if (is_dirty)
3888                 kvm_flush_remote_tlbs(kvm);
3889
3890         mutex_unlock(&kvm->slots_lock);
3891         return r;
3892 }
3893
3894 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3895                         bool line_status)
3896 {
3897         if (!irqchip_in_kernel(kvm))
3898                 return -ENXIO;
3899
3900         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3901                                         irq_event->irq, irq_event->level,
3902                                         line_status);
3903         return 0;
3904 }
3905
3906 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3907                                    struct kvm_enable_cap *cap)
3908 {
3909         int r;
3910
3911         if (cap->flags)
3912                 return -EINVAL;
3913
3914         switch (cap->cap) {
3915         case KVM_CAP_DISABLE_QUIRKS:
3916                 kvm->arch.disabled_quirks = cap->args[0];
3917                 r = 0;
3918                 break;
3919         case KVM_CAP_SPLIT_IRQCHIP: {
3920                 mutex_lock(&kvm->lock);
3921                 r = -EINVAL;
3922                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3923                         goto split_irqchip_unlock;
3924                 r = -EEXIST;
3925                 if (irqchip_in_kernel(kvm))
3926                         goto split_irqchip_unlock;
3927                 if (kvm->created_vcpus)
3928                         goto split_irqchip_unlock;
3929                 kvm->arch.irqchip_mode = KVM_IRQCHIP_INIT_IN_PROGRESS;
3930                 r = kvm_setup_empty_irq_routing(kvm);
3931                 if (r) {
3932                         kvm->arch.irqchip_mode = KVM_IRQCHIP_NONE;
3933                         /* Pairs with smp_rmb() when reading irqchip_mode */
3934                         smp_wmb();
3935                         goto split_irqchip_unlock;
3936                 }
3937                 /* Pairs with irqchip_in_kernel. */
3938                 smp_wmb();
3939                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
3940                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3941                 r = 0;
3942 split_irqchip_unlock:
3943                 mutex_unlock(&kvm->lock);
3944                 break;
3945         }
3946         case KVM_CAP_X2APIC_API:
3947                 r = -EINVAL;
3948                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3949                         break;
3950
3951                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3952                         kvm->arch.x2apic_format = true;
3953                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3954                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
3955
3956                 r = 0;
3957                 break;
3958         default:
3959                 r = -EINVAL;
3960                 break;
3961         }
3962         return r;
3963 }
3964
3965 long kvm_arch_vm_ioctl(struct file *filp,
3966                        unsigned int ioctl, unsigned long arg)
3967 {
3968         struct kvm *kvm = filp->private_data;
3969         void __user *argp = (void __user *)arg;
3970         int r = -ENOTTY;
3971         /*
3972          * This union makes it completely explicit to gcc-3.x
3973          * that these two variables' stack usage should be
3974          * combined, not added together.
3975          */
3976         union {
3977                 struct kvm_pit_state ps;
3978                 struct kvm_pit_state2 ps2;
3979                 struct kvm_pit_config pit_config;
3980         } u;
3981
3982         switch (ioctl) {
3983         case KVM_SET_TSS_ADDR:
3984                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3985                 break;
3986         case KVM_SET_IDENTITY_MAP_ADDR: {
3987                 u64 ident_addr;
3988
3989                 r = -EFAULT;
3990                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3991                         goto out;
3992                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3993                 break;
3994         }
3995         case KVM_SET_NR_MMU_PAGES:
3996                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3997                 break;
3998         case KVM_GET_NR_MMU_PAGES:
3999                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4000                 break;
4001         case KVM_CREATE_IRQCHIP: {
4002                 mutex_lock(&kvm->lock);
4003
4004                 r = -EEXIST;
4005                 if (irqchip_in_kernel(kvm))
4006                         goto create_irqchip_unlock;
4007
4008                 r = -EINVAL;
4009                 if (kvm->created_vcpus)
4010                         goto create_irqchip_unlock;
4011
4012                 r = kvm_pic_init(kvm);
4013                 if (r)
4014                         goto create_irqchip_unlock;
4015
4016                 r = kvm_ioapic_init(kvm);
4017                 if (r) {
4018                         mutex_lock(&kvm->slots_lock);
4019                         kvm_pic_destroy(kvm);
4020                         mutex_unlock(&kvm->slots_lock);
4021                         goto create_irqchip_unlock;
4022                 }
4023
4024                 kvm->arch.irqchip_mode = KVM_IRQCHIP_INIT_IN_PROGRESS;
4025                 r = kvm_setup_default_irq_routing(kvm);
4026                 if (r) {
4027                         kvm->arch.irqchip_mode = KVM_IRQCHIP_NONE;
4028                         /* Pairs with smp_rmb() when reading irqchip_mode */
4029                         smp_wmb();
4030                         mutex_lock(&kvm->slots_lock);
4031                         mutex_lock(&kvm->irq_lock);
4032                         kvm_ioapic_destroy(kvm);
4033                         kvm_pic_destroy(kvm);
4034                         mutex_unlock(&kvm->irq_lock);
4035                         mutex_unlock(&kvm->slots_lock);
4036                         goto create_irqchip_unlock;
4037                 }
4038                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4039                 smp_wmb();
4040                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4041         create_irqchip_unlock:
4042                 mutex_unlock(&kvm->lock);
4043                 break;
4044         }
4045         case KVM_CREATE_PIT:
4046                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4047                 goto create_pit;
4048         case KVM_CREATE_PIT2:
4049                 r = -EFAULT;
4050                 if (copy_from_user(&u.pit_config, argp,
4051                                    sizeof(struct kvm_pit_config)))
4052                         goto out;
4053         create_pit:
4054                 mutex_lock(&kvm->lock);
4055                 r = -EEXIST;
4056                 if (kvm->arch.vpit)
4057                         goto create_pit_unlock;
4058                 r = -ENOMEM;
4059                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4060                 if (kvm->arch.vpit)
4061                         r = 0;
4062         create_pit_unlock:
4063                 mutex_unlock(&kvm->lock);
4064                 break;
4065         case KVM_GET_IRQCHIP: {
4066                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4067                 struct kvm_irqchip *chip;
4068
4069                 chip = memdup_user(argp, sizeof(*chip));
4070                 if (IS_ERR(chip)) {
4071                         r = PTR_ERR(chip);
4072                         goto out;
4073                 }
4074
4075                 r = -ENXIO;
4076                 if (!irqchip_kernel(kvm))
4077                         goto get_irqchip_out;
4078                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4079                 if (r)
4080                         goto get_irqchip_out;
4081                 r = -EFAULT;
4082                 if (copy_to_user(argp, chip, sizeof *chip))
4083                         goto get_irqchip_out;
4084                 r = 0;
4085         get_irqchip_out:
4086                 kfree(chip);
4087                 break;
4088         }
4089         case KVM_SET_IRQCHIP: {
4090                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4091                 struct kvm_irqchip *chip;
4092
4093                 chip = memdup_user(argp, sizeof(*chip));
4094                 if (IS_ERR(chip)) {
4095                         r = PTR_ERR(chip);
4096                         goto out;
4097                 }
4098
4099                 r = -ENXIO;
4100                 if (!irqchip_kernel(kvm))
4101                         goto set_irqchip_out;
4102                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4103                 if (r)
4104                         goto set_irqchip_out;
4105                 r = 0;
4106         set_irqchip_out:
4107                 kfree(chip);
4108                 break;
4109         }
4110         case KVM_GET_PIT: {
4111                 r = -EFAULT;
4112                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4113                         goto out;
4114                 r = -ENXIO;
4115                 if (!kvm->arch.vpit)
4116                         goto out;
4117                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4118                 if (r)
4119                         goto out;
4120                 r = -EFAULT;
4121                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4122                         goto out;
4123                 r = 0;
4124                 break;
4125         }
4126         case KVM_SET_PIT: {
4127                 r = -EFAULT;
4128                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4129                         goto out;
4130                 r = -ENXIO;
4131                 if (!kvm->arch.vpit)
4132                         goto out;
4133                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4134                 break;
4135         }
4136         case KVM_GET_PIT2: {
4137                 r = -ENXIO;
4138                 if (!kvm->arch.vpit)
4139                         goto out;
4140                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4141                 if (r)
4142                         goto out;
4143                 r = -EFAULT;
4144                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4145                         goto out;
4146                 r = 0;
4147                 break;
4148         }
4149         case KVM_SET_PIT2: {
4150                 r = -EFAULT;
4151                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4152                         goto out;
4153                 r = -ENXIO;
4154                 if (!kvm->arch.vpit)
4155                         goto out;
4156                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4157                 break;
4158         }
4159         case KVM_REINJECT_CONTROL: {
4160                 struct kvm_reinject_control control;
4161                 r =  -EFAULT;
4162                 if (copy_from_user(&control, argp, sizeof(control)))
4163                         goto out;
4164                 r = kvm_vm_ioctl_reinject(kvm, &control);
4165                 break;
4166         }
4167         case KVM_SET_BOOT_CPU_ID:
4168                 r = 0;
4169                 mutex_lock(&kvm->lock);
4170                 if (kvm->created_vcpus)
4171                         r = -EBUSY;
4172                 else
4173                         kvm->arch.bsp_vcpu_id = arg;
4174                 mutex_unlock(&kvm->lock);
4175                 break;
4176         case KVM_XEN_HVM_CONFIG: {
4177                 r = -EFAULT;
4178                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4179                                    sizeof(struct kvm_xen_hvm_config)))
4180                         goto out;
4181                 r = -EINVAL;
4182                 if (kvm->arch.xen_hvm_config.flags)
4183                         goto out;
4184                 r = 0;
4185                 break;
4186         }
4187         case KVM_SET_CLOCK: {
4188                 struct kvm_clock_data user_ns;
4189                 u64 now_ns;
4190
4191                 r = -EFAULT;
4192                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4193                         goto out;
4194
4195                 r = -EINVAL;
4196                 if (user_ns.flags)
4197                         goto out;
4198
4199                 r = 0;
4200                 local_irq_disable();
4201                 now_ns = __get_kvmclock_ns(kvm);
4202                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4203                 local_irq_enable();
4204                 kvm_gen_update_masterclock(kvm);
4205                 break;
4206         }
4207         case KVM_GET_CLOCK: {
4208                 struct kvm_clock_data user_ns;
4209                 u64 now_ns;
4210
4211                 local_irq_disable();
4212                 now_ns = __get_kvmclock_ns(kvm);
4213                 user_ns.clock = now_ns;
4214                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4215                 local_irq_enable();
4216                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4217
4218                 r = -EFAULT;
4219                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4220                         goto out;
4221                 r = 0;
4222                 break;
4223         }
4224         case KVM_ENABLE_CAP: {
4225                 struct kvm_enable_cap cap;
4226
4227                 r = -EFAULT;
4228                 if (copy_from_user(&cap, argp, sizeof(cap)))
4229                         goto out;
4230                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4231                 break;
4232         }
4233         default:
4234                 r = -ENOTTY;
4235         }
4236 out:
4237         return r;
4238 }
4239
4240 static void kvm_init_msr_list(void)
4241 {
4242         u32 dummy[2];
4243         unsigned i, j;
4244
4245         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4246                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4247                         continue;
4248
4249                 /*
4250                  * Even MSRs that are valid in the host may not be exposed
4251                  * to the guests in some cases.
4252                  */
4253                 switch (msrs_to_save[i]) {
4254                 case MSR_IA32_BNDCFGS:
4255                         if (!kvm_x86_ops->mpx_supported())
4256                                 continue;
4257                         break;
4258                 case MSR_TSC_AUX:
4259                         if (!kvm_x86_ops->rdtscp_supported())
4260                                 continue;
4261                         break;
4262                 default:
4263                         break;
4264                 }
4265
4266                 if (j < i)
4267                         msrs_to_save[j] = msrs_to_save[i];
4268                 j++;
4269         }
4270         num_msrs_to_save = j;
4271
4272         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4273                 switch (emulated_msrs[i]) {
4274                 case MSR_IA32_SMBASE:
4275                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4276                                 continue;
4277                         break;
4278                 default:
4279                         break;
4280                 }
4281
4282                 if (j < i)
4283                         emulated_msrs[j] = emulated_msrs[i];
4284                 j++;
4285         }
4286         num_emulated_msrs = j;
4287 }
4288
4289 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4290                            const void *v)
4291 {
4292         int handled = 0;
4293         int n;
4294
4295         do {
4296                 n = min(len, 8);
4297                 if (!(lapic_in_kernel(vcpu) &&
4298                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4299                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4300                         break;
4301                 handled += n;
4302                 addr += n;
4303                 len -= n;
4304                 v += n;
4305         } while (len);
4306
4307         return handled;
4308 }
4309
4310 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4311 {
4312         int handled = 0;
4313         int n;
4314
4315         do {
4316                 n = min(len, 8);
4317                 if (!(lapic_in_kernel(vcpu) &&
4318                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4319                                          addr, n, v))
4320                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4321                         break;
4322                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4323                 handled += n;
4324                 addr += n;
4325                 len -= n;
4326                 v += n;
4327         } while (len);
4328
4329         return handled;
4330 }
4331
4332 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4333                         struct kvm_segment *var, int seg)
4334 {
4335         kvm_x86_ops->set_segment(vcpu, var, seg);
4336 }
4337
4338 void kvm_get_segment(struct kvm_vcpu *vcpu,
4339                      struct kvm_segment *var, int seg)
4340 {
4341         kvm_x86_ops->get_segment(vcpu, var, seg);
4342 }
4343
4344 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4345                            struct x86_exception *exception)
4346 {
4347         gpa_t t_gpa;
4348
4349         BUG_ON(!mmu_is_nested(vcpu));
4350
4351         /* NPT walks are always user-walks */
4352         access |= PFERR_USER_MASK;
4353         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4354
4355         return t_gpa;
4356 }
4357
4358 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4359                               struct x86_exception *exception)
4360 {
4361         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4362         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4363 }
4364
4365  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4366                                 struct x86_exception *exception)
4367 {
4368         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4369         access |= PFERR_FETCH_MASK;
4370         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4371 }
4372
4373 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4374                                struct x86_exception *exception)
4375 {
4376         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4377         access |= PFERR_WRITE_MASK;
4378         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4379 }
4380
4381 /* uses this to access any guest's mapped memory without checking CPL */
4382 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4383                                 struct x86_exception *exception)
4384 {
4385         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4386 }
4387
4388 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4389                                       struct kvm_vcpu *vcpu, u32 access,
4390                                       struct x86_exception *exception)
4391 {
4392         void *data = val;
4393         int r = X86EMUL_CONTINUE;
4394
4395         while (bytes) {
4396                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4397                                                             exception);
4398                 unsigned offset = addr & (PAGE_SIZE-1);
4399                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4400                 int ret;
4401
4402                 if (gpa == UNMAPPED_GVA)
4403                         return X86EMUL_PROPAGATE_FAULT;
4404                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4405                                                offset, toread);
4406                 if (ret < 0) {
4407                         r = X86EMUL_IO_NEEDED;
4408                         goto out;
4409                 }
4410
4411                 bytes -= toread;
4412                 data += toread;
4413                 addr += toread;
4414         }
4415 out:
4416         return r;
4417 }
4418
4419 /* used for instruction fetching */
4420 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4421                                 gva_t addr, void *val, unsigned int bytes,
4422                                 struct x86_exception *exception)
4423 {
4424         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4425         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4426         unsigned offset;
4427         int ret;
4428
4429         /* Inline kvm_read_guest_virt_helper for speed.  */
4430         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4431                                                     exception);
4432         if (unlikely(gpa == UNMAPPED_GVA))
4433                 return X86EMUL_PROPAGATE_FAULT;
4434
4435         offset = addr & (PAGE_SIZE-1);
4436         if (WARN_ON(offset + bytes > PAGE_SIZE))
4437                 bytes = (unsigned)PAGE_SIZE - offset;
4438         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4439                                        offset, bytes);
4440         if (unlikely(ret < 0))
4441                 return X86EMUL_IO_NEEDED;
4442
4443         return X86EMUL_CONTINUE;
4444 }
4445
4446 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4447                                gva_t addr, void *val, unsigned int bytes,
4448                                struct x86_exception *exception)
4449 {
4450         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4451         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4452
4453         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4454                                           exception);
4455 }
4456 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4457
4458 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4459                                       gva_t addr, void *val, unsigned int bytes,
4460                                       struct x86_exception *exception)
4461 {
4462         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4463         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4464 }
4465
4466 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4467                 unsigned long addr, void *val, unsigned int bytes)
4468 {
4469         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4470         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4471
4472         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4473 }
4474
4475 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4476                                        gva_t addr, void *val,
4477                                        unsigned int bytes,
4478                                        struct x86_exception *exception)
4479 {
4480         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4481         void *data = val;
4482         int r = X86EMUL_CONTINUE;
4483
4484         while (bytes) {
4485                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4486                                                              PFERR_WRITE_MASK,
4487                                                              exception);
4488                 unsigned offset = addr & (PAGE_SIZE-1);
4489                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4490                 int ret;
4491
4492                 if (gpa == UNMAPPED_GVA)
4493                         return X86EMUL_PROPAGATE_FAULT;
4494                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4495                 if (ret < 0) {
4496                         r = X86EMUL_IO_NEEDED;
4497                         goto out;
4498                 }
4499
4500                 bytes -= towrite;
4501                 data += towrite;
4502                 addr += towrite;
4503         }
4504 out:
4505         return r;
4506 }
4507 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4508
4509 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4510                             gpa_t gpa, bool write)
4511 {
4512         /* For APIC access vmexit */
4513         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4514                 return 1;
4515
4516         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4517                 trace_vcpu_match_mmio(gva, gpa, write, true);
4518                 return 1;
4519         }
4520
4521         return 0;
4522 }
4523
4524 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4525                                 gpa_t *gpa, struct x86_exception *exception,
4526                                 bool write)
4527 {
4528         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4529                 | (write ? PFERR_WRITE_MASK : 0);
4530
4531         /*
4532          * currently PKRU is only applied to ept enabled guest so
4533          * there is no pkey in EPT page table for L1 guest or EPT
4534          * shadow page table for L2 guest.
4535          */
4536         if (vcpu_match_mmio_gva(vcpu, gva)
4537             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4538                                  vcpu->arch.access, 0, access)) {
4539                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4540                                         (gva & (PAGE_SIZE - 1));
4541                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4542                 return 1;
4543         }
4544
4545         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4546
4547         if (*gpa == UNMAPPED_GVA)
4548                 return -1;
4549
4550         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4551 }
4552
4553 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4554                         const void *val, int bytes)
4555 {
4556         int ret;
4557
4558         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4559         if (ret < 0)
4560                 return 0;
4561         kvm_page_track_write(vcpu, gpa, val, bytes);
4562         return 1;
4563 }
4564
4565 struct read_write_emulator_ops {
4566         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4567                                   int bytes);
4568         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4569                                   void *val, int bytes);
4570         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4571                                int bytes, void *val);
4572         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4573                                     void *val, int bytes);
4574         bool write;
4575 };
4576
4577 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4578 {
4579         if (vcpu->mmio_read_completed) {
4580                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4581                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4582                 vcpu->mmio_read_completed = 0;
4583                 return 1;
4584         }
4585
4586         return 0;
4587 }
4588
4589 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4590                         void *val, int bytes)
4591 {
4592         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4593 }
4594
4595 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4596                          void *val, int bytes)
4597 {
4598         return emulator_write_phys(vcpu, gpa, val, bytes);
4599 }
4600
4601 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4602 {
4603         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4604         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4605 }
4606
4607 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4608                           void *val, int bytes)
4609 {
4610         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4611         return X86EMUL_IO_NEEDED;
4612 }
4613
4614 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4615                            void *val, int bytes)
4616 {
4617         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4618
4619         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4620         return X86EMUL_CONTINUE;
4621 }
4622
4623 static const struct read_write_emulator_ops read_emultor = {
4624         .read_write_prepare = read_prepare,
4625         .read_write_emulate = read_emulate,
4626         .read_write_mmio = vcpu_mmio_read,
4627         .read_write_exit_mmio = read_exit_mmio,
4628 };
4629
4630 static const struct read_write_emulator_ops write_emultor = {
4631         .read_write_emulate = write_emulate,
4632         .read_write_mmio = write_mmio,
4633         .read_write_exit_mmio = write_exit_mmio,
4634         .write = true,
4635 };
4636
4637 static int emulator_read_write_onepage(unsigned long addr, void *val,
4638                                        unsigned int bytes,
4639                                        struct x86_exception *exception,
4640                                        struct kvm_vcpu *vcpu,
4641                                        const struct read_write_emulator_ops *ops)
4642 {
4643         gpa_t gpa;
4644         int handled, ret;
4645         bool write = ops->write;
4646         struct kvm_mmio_fragment *frag;
4647         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4648
4649         /*
4650          * If the exit was due to a NPF we may already have a GPA.
4651          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4652          * Note, this cannot be used on string operations since string
4653          * operation using rep will only have the initial GPA from the NPF
4654          * occurred.
4655          */
4656         if (vcpu->arch.gpa_available &&
4657             emulator_can_use_gpa(ctxt) &&
4658             vcpu_is_mmio_gpa(vcpu, addr, exception->address, write) &&
4659             (addr & ~PAGE_MASK) == (exception->address & ~PAGE_MASK)) {
4660                 gpa = exception->address;
4661                 goto mmio;
4662         }
4663
4664         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4665
4666         if (ret < 0)
4667                 return X86EMUL_PROPAGATE_FAULT;
4668
4669         /* For APIC access vmexit */
4670         if (ret)
4671                 goto mmio;
4672
4673         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4674                 return X86EMUL_CONTINUE;
4675
4676 mmio:
4677         /*
4678          * Is this MMIO handled locally?
4679          */
4680         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4681         if (handled == bytes)
4682                 return X86EMUL_CONTINUE;
4683
4684         gpa += handled;
4685         bytes -= handled;
4686         val += handled;
4687
4688         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4689         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4690         frag->gpa = gpa;
4691         frag->data = val;
4692         frag->len = bytes;
4693         return X86EMUL_CONTINUE;
4694 }
4695
4696 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4697                         unsigned long addr,
4698                         void *val, unsigned int bytes,
4699                         struct x86_exception *exception,
4700                         const struct read_write_emulator_ops *ops)
4701 {
4702         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4703         gpa_t gpa;
4704         int rc;
4705
4706         if (ops->read_write_prepare &&
4707                   ops->read_write_prepare(vcpu, val, bytes))
4708                 return X86EMUL_CONTINUE;
4709
4710         vcpu->mmio_nr_fragments = 0;
4711
4712         /* Crossing a page boundary? */
4713         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4714                 int now;
4715
4716                 now = -addr & ~PAGE_MASK;
4717                 rc = emulator_read_write_onepage(addr, val, now, exception,
4718                                                  vcpu, ops);
4719
4720                 if (rc != X86EMUL_CONTINUE)
4721                         return rc;
4722                 addr += now;
4723                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4724                         addr = (u32)addr;
4725                 val += now;
4726                 bytes -= now;
4727         }
4728
4729         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4730                                          vcpu, ops);
4731         if (rc != X86EMUL_CONTINUE)
4732                 return rc;
4733
4734         if (!vcpu->mmio_nr_fragments)
4735                 return rc;
4736
4737         gpa = vcpu->mmio_fragments[0].gpa;
4738
4739         vcpu->mmio_needed = 1;
4740         vcpu->mmio_cur_fragment = 0;
4741
4742         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4743         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4744         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4745         vcpu->run->mmio.phys_addr = gpa;
4746
4747         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4748 }
4749
4750 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4751                                   unsigned long addr,
4752                                   void *val,
4753                                   unsigned int bytes,
4754                                   struct x86_exception *exception)
4755 {
4756         return emulator_read_write(ctxt, addr, val, bytes,
4757                                    exception, &read_emultor);
4758 }
4759
4760 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4761                             unsigned long addr,
4762                             const void *val,
4763                             unsigned int bytes,
4764                             struct x86_exception *exception)
4765 {
4766         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4767                                    exception, &write_emultor);
4768 }
4769
4770 #define CMPXCHG_TYPE(t, ptr, old, new) \
4771         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4772
4773 #ifdef CONFIG_X86_64
4774 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4775 #else
4776 #  define CMPXCHG64(ptr, old, new) \
4777         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4778 #endif
4779
4780 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4781                                      unsigned long addr,
4782                                      const void *old,
4783                                      const void *new,
4784                                      unsigned int bytes,
4785                                      struct x86_exception *exception)
4786 {
4787         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4788         gpa_t gpa;
4789         struct page *page;
4790         char *kaddr;
4791         bool exchanged;
4792
4793         /* guests cmpxchg8b have to be emulated atomically */
4794         if (bytes > 8 || (bytes & (bytes - 1)))
4795                 goto emul_write;
4796
4797         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4798
4799         if (gpa == UNMAPPED_GVA ||
4800             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4801                 goto emul_write;
4802
4803         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4804                 goto emul_write;
4805
4806         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4807         if (is_error_page(page))
4808                 goto emul_write;
4809
4810         kaddr = kmap_atomic(page);
4811         kaddr += offset_in_page(gpa);
4812         switch (bytes) {
4813         case 1:
4814                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4815                 break;
4816         case 2:
4817                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4818                 break;
4819         case 4:
4820                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4821                 break;
4822         case 8:
4823                 exchanged = CMPXCHG64(kaddr, old, new);
4824                 break;
4825         default:
4826                 BUG();
4827         }
4828         kunmap_atomic(kaddr);
4829         kvm_release_page_dirty(page);
4830
4831         if (!exchanged)
4832                 return X86EMUL_CMPXCHG_FAILED;
4833
4834         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4835         kvm_page_track_write(vcpu, gpa, new, bytes);
4836
4837         return X86EMUL_CONTINUE;
4838
4839 emul_write:
4840         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4841
4842         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4843 }
4844
4845 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4846 {
4847         /* TODO: String I/O for in kernel device */
4848         int r;
4849
4850         if (vcpu->arch.pio.in)
4851                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4852                                     vcpu->arch.pio.size, pd);
4853         else
4854                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4855                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4856                                      pd);
4857         return r;
4858 }
4859
4860 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4861                                unsigned short port, void *val,
4862                                unsigned int count, bool in)
4863 {
4864         vcpu->arch.pio.port = port;
4865         vcpu->arch.pio.in = in;
4866         vcpu->arch.pio.count  = count;
4867         vcpu->arch.pio.size = size;
4868
4869         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4870                 vcpu->arch.pio.count = 0;
4871                 return 1;
4872         }
4873
4874         vcpu->run->exit_reason = KVM_EXIT_IO;
4875         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4876         vcpu->run->io.size = size;
4877         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4878         vcpu->run->io.count = count;
4879         vcpu->run->io.port = port;
4880
4881         return 0;
4882 }
4883
4884 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4885                                     int size, unsigned short port, void *val,
4886                                     unsigned int count)
4887 {
4888         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4889         int ret;
4890
4891         if (vcpu->arch.pio.count)
4892                 goto data_avail;
4893
4894         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4895         if (ret) {
4896 data_avail:
4897                 memcpy(val, vcpu->arch.pio_data, size * count);
4898                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4899                 vcpu->arch.pio.count = 0;
4900                 return 1;
4901         }
4902
4903         return 0;
4904 }
4905
4906 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4907                                      int size, unsigned short port,
4908                                      const void *val, unsigned int count)
4909 {
4910         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4911
4912         memcpy(vcpu->arch.pio_data, val, size * count);
4913         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4914         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4915 }
4916
4917 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4918 {
4919         return kvm_x86_ops->get_segment_base(vcpu, seg);
4920 }
4921
4922 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4923 {
4924         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4925 }
4926
4927 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4928 {
4929         if (!need_emulate_wbinvd(vcpu))
4930                 return X86EMUL_CONTINUE;
4931
4932         if (kvm_x86_ops->has_wbinvd_exit()) {
4933                 int cpu = get_cpu();
4934
4935                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4936                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4937                                 wbinvd_ipi, NULL, 1);
4938                 put_cpu();
4939                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4940         } else
4941                 wbinvd();
4942         return X86EMUL_CONTINUE;
4943 }
4944
4945 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4946 {
4947         kvm_emulate_wbinvd_noskip(vcpu);
4948         return kvm_skip_emulated_instruction(vcpu);
4949 }
4950 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4951
4952
4953
4954 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4955 {
4956         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4957 }
4958
4959 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4960                            unsigned long *dest)
4961 {
4962         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4963 }
4964
4965 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4966                            unsigned long value)
4967 {
4968
4969         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4970 }
4971
4972 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4973 {
4974         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4975 }
4976
4977 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4978 {
4979         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4980         unsigned long value;
4981
4982         switch (cr) {
4983         case 0:
4984                 value = kvm_read_cr0(vcpu);
4985                 break;
4986         case 2:
4987                 value = vcpu->arch.cr2;
4988                 break;
4989         case 3:
4990                 value = kvm_read_cr3(vcpu);
4991                 break;
4992         case 4:
4993                 value = kvm_read_cr4(vcpu);
4994                 break;
4995         case 8:
4996                 value = kvm_get_cr8(vcpu);
4997                 break;
4998         default:
4999                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5000                 return 0;
5001         }
5002
5003         return value;
5004 }
5005
5006 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5007 {
5008         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5009         int res = 0;
5010
5011         switch (cr) {
5012         case 0:
5013                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5014                 break;
5015         case 2:
5016                 vcpu->arch.cr2 = val;
5017                 break;
5018         case 3:
5019                 res = kvm_set_cr3(vcpu, val);
5020                 break;
5021         case 4:
5022                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5023                 break;
5024         case 8:
5025                 res = kvm_set_cr8(vcpu, val);
5026                 break;
5027         default:
5028                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5029                 res = -1;
5030         }
5031
5032         return res;
5033 }
5034
5035 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5036 {
5037         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5038 }
5039
5040 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5041 {
5042         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5043 }
5044
5045 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5046 {
5047         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5048 }
5049
5050 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5051 {
5052         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5053 }
5054
5055 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5056 {
5057         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5058 }
5059
5060 static unsigned long emulator_get_cached_segment_base(
5061         struct x86_emulate_ctxt *ctxt, int seg)
5062 {
5063         return get_segment_base(emul_to_vcpu(ctxt), seg);
5064 }
5065
5066 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5067                                  struct desc_struct *desc, u32 *base3,
5068                                  int seg)
5069 {
5070         struct kvm_segment var;
5071
5072         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5073         *selector = var.selector;
5074
5075         if (var.unusable) {
5076                 memset(desc, 0, sizeof(*desc));
5077                 return false;
5078         }
5079
5080         if (var.g)
5081                 var.limit >>= 12;
5082         set_desc_limit(desc, var.limit);
5083         set_desc_base(desc, (unsigned long)var.base);
5084 #ifdef CONFIG_X86_64
5085         if (base3)
5086                 *base3 = var.base >> 32;
5087 #endif
5088         desc->type = var.type;
5089         desc->s = var.s;
5090         desc->dpl = var.dpl;
5091         desc->p = var.present;
5092         desc->avl = var.avl;
5093         desc->l = var.l;
5094         desc->d = var.db;
5095         desc->g = var.g;
5096
5097         return true;
5098 }
5099
5100 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5101                                  struct desc_struct *desc, u32 base3,
5102                                  int seg)
5103 {
5104         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5105         struct kvm_segment var;
5106
5107         var.selector = selector;
5108         var.base = get_desc_base(desc);
5109 #ifdef CONFIG_X86_64
5110         var.base |= ((u64)base3) << 32;
5111 #endif
5112         var.limit = get_desc_limit(desc);
5113         if (desc->g)
5114                 var.limit = (var.limit << 12) | 0xfff;
5115         var.type = desc->type;
5116         var.dpl = desc->dpl;
5117         var.db = desc->d;
5118         var.s = desc->s;
5119         var.l = desc->l;
5120         var.g = desc->g;
5121         var.avl = desc->avl;
5122         var.present = desc->p;
5123         var.unusable = !var.present;
5124         var.padding = 0;
5125
5126         kvm_set_segment(vcpu, &var, seg);
5127         return;
5128 }
5129
5130 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5131                             u32 msr_index, u64 *pdata)
5132 {
5133         struct msr_data msr;
5134         int r;
5135
5136         msr.index = msr_index;
5137         msr.host_initiated = false;
5138         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5139         if (r)
5140                 return r;
5141
5142         *pdata = msr.data;
5143         return 0;
5144 }
5145
5146 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5147                             u32 msr_index, u64 data)
5148 {
5149         struct msr_data msr;
5150
5151         msr.data = data;
5152         msr.index = msr_index;
5153         msr.host_initiated = false;
5154         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5155 }
5156
5157 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5158 {
5159         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5160
5161         return vcpu->arch.smbase;
5162 }
5163
5164 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5165 {
5166         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5167
5168         vcpu->arch.smbase = smbase;
5169 }
5170
5171 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5172                               u32 pmc)
5173 {
5174         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5175 }
5176
5177 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5178                              u32 pmc, u64 *pdata)
5179 {
5180         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5181 }
5182
5183 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5184 {
5185         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5186 }
5187
5188 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5189 {
5190         preempt_disable();
5191         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5192 }
5193
5194 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5195 {
5196         preempt_enable();
5197 }
5198
5199 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5200                               struct x86_instruction_info *info,
5201                               enum x86_intercept_stage stage)
5202 {
5203         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5204 }
5205
5206 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5207                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5208 {
5209         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5210 }
5211
5212 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5213 {
5214         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5215 }
5216
5217 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5218 {
5219         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5220 }
5221
5222 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5223 {
5224         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5225 }
5226
5227 static const struct x86_emulate_ops emulate_ops = {
5228         .read_gpr            = emulator_read_gpr,
5229         .write_gpr           = emulator_write_gpr,
5230         .read_std            = kvm_read_guest_virt_system,
5231         .write_std           = kvm_write_guest_virt_system,
5232         .read_phys           = kvm_read_guest_phys_system,
5233         .fetch               = kvm_fetch_guest_virt,
5234         .read_emulated       = emulator_read_emulated,
5235         .write_emulated      = emulator_write_emulated,
5236         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5237         .invlpg              = emulator_invlpg,
5238         .pio_in_emulated     = emulator_pio_in_emulated,
5239         .pio_out_emulated    = emulator_pio_out_emulated,
5240         .get_segment         = emulator_get_segment,
5241         .set_segment         = emulator_set_segment,
5242         .get_cached_segment_base = emulator_get_cached_segment_base,
5243         .get_gdt             = emulator_get_gdt,
5244         .get_idt             = emulator_get_idt,
5245         .set_gdt             = emulator_set_gdt,
5246         .set_idt             = emulator_set_idt,
5247         .get_cr              = emulator_get_cr,
5248         .set_cr              = emulator_set_cr,
5249         .cpl                 = emulator_get_cpl,
5250         .get_dr              = emulator_get_dr,
5251         .set_dr              = emulator_set_dr,
5252         .get_smbase          = emulator_get_smbase,
5253         .set_smbase          = emulator_set_smbase,
5254         .set_msr             = emulator_set_msr,
5255         .get_msr             = emulator_get_msr,
5256         .check_pmc           = emulator_check_pmc,
5257         .read_pmc            = emulator_read_pmc,
5258         .halt                = emulator_halt,
5259         .wbinvd              = emulator_wbinvd,
5260         .fix_hypercall       = emulator_fix_hypercall,
5261         .get_fpu             = emulator_get_fpu,
5262         .put_fpu             = emulator_put_fpu,
5263         .intercept           = emulator_intercept,
5264         .get_cpuid           = emulator_get_cpuid,
5265         .set_nmi_mask        = emulator_set_nmi_mask,
5266 };
5267
5268 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5269 {
5270         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5271         /*
5272          * an sti; sti; sequence only disable interrupts for the first
5273          * instruction. So, if the last instruction, be it emulated or
5274          * not, left the system with the INT_STI flag enabled, it
5275          * means that the last instruction is an sti. We should not
5276          * leave the flag on in this case. The same goes for mov ss
5277          */
5278         if (int_shadow & mask)
5279                 mask = 0;
5280         if (unlikely(int_shadow || mask)) {
5281                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5282                 if (!mask)
5283                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5284         }
5285 }
5286
5287 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5288 {
5289         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5290         if (ctxt->exception.vector == PF_VECTOR)
5291                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5292
5293         if (ctxt->exception.error_code_valid)
5294                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5295                                       ctxt->exception.error_code);
5296         else
5297                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5298         return false;
5299 }
5300
5301 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5302 {
5303         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5304         int cs_db, cs_l;
5305
5306         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5307
5308         ctxt->eflags = kvm_get_rflags(vcpu);
5309         ctxt->eip = kvm_rip_read(vcpu);
5310         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5311                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5312                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5313                      cs_db                              ? X86EMUL_MODE_PROT32 :
5314                                                           X86EMUL_MODE_PROT16;
5315         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5316         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5317         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5318         ctxt->emul_flags = vcpu->arch.hflags;
5319
5320         init_decode_cache(ctxt);
5321         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5322 }
5323
5324 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5325 {
5326         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5327         int ret;
5328
5329         init_emulate_ctxt(vcpu);
5330
5331         ctxt->op_bytes = 2;
5332         ctxt->ad_bytes = 2;
5333         ctxt->_eip = ctxt->eip + inc_eip;
5334         ret = emulate_int_real(ctxt, irq);
5335
5336         if (ret != X86EMUL_CONTINUE)
5337                 return EMULATE_FAIL;
5338
5339         ctxt->eip = ctxt->_eip;
5340         kvm_rip_write(vcpu, ctxt->eip);
5341         kvm_set_rflags(vcpu, ctxt->eflags);
5342
5343         if (irq == NMI_VECTOR)
5344                 vcpu->arch.nmi_pending = 0;
5345         else
5346                 vcpu->arch.interrupt.pending = false;
5347
5348         return EMULATE_DONE;
5349 }
5350 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5351
5352 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5353 {
5354         int r = EMULATE_DONE;
5355
5356         ++vcpu->stat.insn_emulation_fail;
5357         trace_kvm_emulate_insn_failed(vcpu);
5358         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5359                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5360                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5361                 vcpu->run->internal.ndata = 0;
5362                 r = EMULATE_FAIL;
5363         }
5364         kvm_queue_exception(vcpu, UD_VECTOR);
5365
5366         return r;
5367 }
5368
5369 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5370                                   bool write_fault_to_shadow_pgtable,
5371                                   int emulation_type)
5372 {
5373         gpa_t gpa = cr2;
5374         kvm_pfn_t pfn;
5375
5376         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5377                 return false;
5378
5379         if (!vcpu->arch.mmu.direct_map) {
5380                 /*
5381                  * Write permission should be allowed since only
5382                  * write access need to be emulated.
5383                  */
5384                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5385
5386                 /*
5387                  * If the mapping is invalid in guest, let cpu retry
5388                  * it to generate fault.
5389                  */
5390                 if (gpa == UNMAPPED_GVA)
5391                         return true;
5392         }
5393
5394         /*
5395          * Do not retry the unhandleable instruction if it faults on the
5396          * readonly host memory, otherwise it will goto a infinite loop:
5397          * retry instruction -> write #PF -> emulation fail -> retry
5398          * instruction -> ...
5399          */
5400         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5401
5402         /*
5403          * If the instruction failed on the error pfn, it can not be fixed,
5404          * report the error to userspace.
5405          */
5406         if (is_error_noslot_pfn(pfn))
5407                 return false;
5408
5409         kvm_release_pfn_clean(pfn);
5410
5411         /* The instructions are well-emulated on direct mmu. */
5412         if (vcpu->arch.mmu.direct_map) {
5413                 unsigned int indirect_shadow_pages;
5414
5415                 spin_lock(&vcpu->kvm->mmu_lock);
5416                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5417                 spin_unlock(&vcpu->kvm->mmu_lock);
5418
5419                 if (indirect_shadow_pages)
5420                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5421
5422                 return true;
5423         }
5424
5425         /*
5426          * if emulation was due to access to shadowed page table
5427          * and it failed try to unshadow page and re-enter the
5428          * guest to let CPU execute the instruction.
5429          */
5430         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5431
5432         /*
5433          * If the access faults on its page table, it can not
5434          * be fixed by unprotecting shadow page and it should
5435          * be reported to userspace.
5436          */
5437         return !write_fault_to_shadow_pgtable;
5438 }
5439
5440 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5441                               unsigned long cr2,  int emulation_type)
5442 {
5443         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5444         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5445
5446         last_retry_eip = vcpu->arch.last_retry_eip;
5447         last_retry_addr = vcpu->arch.last_retry_addr;
5448
5449         /*
5450          * If the emulation is caused by #PF and it is non-page_table
5451          * writing instruction, it means the VM-EXIT is caused by shadow
5452          * page protected, we can zap the shadow page and retry this
5453          * instruction directly.
5454          *
5455          * Note: if the guest uses a non-page-table modifying instruction
5456          * on the PDE that points to the instruction, then we will unmap
5457          * the instruction and go to an infinite loop. So, we cache the
5458          * last retried eip and the last fault address, if we meet the eip
5459          * and the address again, we can break out of the potential infinite
5460          * loop.
5461          */
5462         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5463
5464         if (!(emulation_type & EMULTYPE_RETRY))
5465                 return false;
5466
5467         if (x86_page_table_writing_insn(ctxt))
5468                 return false;
5469
5470         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5471                 return false;
5472
5473         vcpu->arch.last_retry_eip = ctxt->eip;
5474         vcpu->arch.last_retry_addr = cr2;
5475
5476         if (!vcpu->arch.mmu.direct_map)
5477                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5478
5479         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5480
5481         return true;
5482 }
5483
5484 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5485 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5486
5487 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5488 {
5489         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5490                 /* This is a good place to trace that we are exiting SMM.  */
5491                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5492
5493                 /* Process a latched INIT or SMI, if any.  */
5494                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5495         }
5496
5497         kvm_mmu_reset_context(vcpu);
5498 }
5499
5500 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5501 {
5502         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5503
5504         vcpu->arch.hflags = emul_flags;
5505
5506         if (changed & HF_SMM_MASK)
5507                 kvm_smm_changed(vcpu);
5508 }
5509
5510 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5511                                 unsigned long *db)
5512 {
5513         u32 dr6 = 0;
5514         int i;
5515         u32 enable, rwlen;
5516
5517         enable = dr7;
5518         rwlen = dr7 >> 16;
5519         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5520                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5521                         dr6 |= (1 << i);
5522         return dr6;
5523 }
5524
5525 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5526 {
5527         struct kvm_run *kvm_run = vcpu->run;
5528
5529         /*
5530          * rflags is the old, "raw" value of the flags.  The new value has
5531          * not been saved yet.
5532          *
5533          * This is correct even for TF set by the guest, because "the
5534          * processor will not generate this exception after the instruction
5535          * that sets the TF flag".
5536          */
5537         if (unlikely(rflags & X86_EFLAGS_TF)) {
5538                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5539                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5540                                                   DR6_RTM;
5541                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5542                         kvm_run->debug.arch.exception = DB_VECTOR;
5543                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5544                         *r = EMULATE_USER_EXIT;
5545                 } else {
5546                         /*
5547                          * "Certain debug exceptions may clear bit 0-3.  The
5548                          * remaining contents of the DR6 register are never
5549                          * cleared by the processor".
5550                          */
5551                         vcpu->arch.dr6 &= ~15;
5552                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5553                         kvm_queue_exception(vcpu, DB_VECTOR);
5554                 }
5555         }
5556 }
5557
5558 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5559 {
5560         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5561         int r = EMULATE_DONE;
5562
5563         kvm_x86_ops->skip_emulated_instruction(vcpu);
5564         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5565         return r == EMULATE_DONE;
5566 }
5567 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5568
5569 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5570 {
5571         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5572             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5573                 struct kvm_run *kvm_run = vcpu->run;
5574                 unsigned long eip = kvm_get_linear_rip(vcpu);
5575                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5576                                            vcpu->arch.guest_debug_dr7,
5577                                            vcpu->arch.eff_db);
5578
5579                 if (dr6 != 0) {
5580                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5581                         kvm_run->debug.arch.pc = eip;
5582                         kvm_run->debug.arch.exception = DB_VECTOR;
5583                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5584                         *r = EMULATE_USER_EXIT;
5585                         return true;
5586                 }
5587         }
5588
5589         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5590             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5591                 unsigned long eip = kvm_get_linear_rip(vcpu);
5592                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5593                                            vcpu->arch.dr7,
5594                                            vcpu->arch.db);
5595
5596                 if (dr6 != 0) {
5597                         vcpu->arch.dr6 &= ~15;
5598                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5599                         kvm_queue_exception(vcpu, DB_VECTOR);
5600                         *r = EMULATE_DONE;
5601                         return true;
5602                 }
5603         }
5604
5605         return false;
5606 }
5607
5608 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5609                             unsigned long cr2,
5610                             int emulation_type,
5611                             void *insn,
5612                             int insn_len)
5613 {
5614         int r;
5615         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5616         bool writeback = true;
5617         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5618
5619         /*
5620          * Clear write_fault_to_shadow_pgtable here to ensure it is
5621          * never reused.
5622          */
5623         vcpu->arch.write_fault_to_shadow_pgtable = false;
5624         kvm_clear_exception_queue(vcpu);
5625
5626         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5627                 init_emulate_ctxt(vcpu);
5628
5629                 /*
5630                  * We will reenter on the same instruction since
5631                  * we do not set complete_userspace_io.  This does not
5632                  * handle watchpoints yet, those would be handled in
5633                  * the emulate_ops.
5634                  */
5635                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5636                         return r;
5637
5638                 ctxt->interruptibility = 0;
5639                 ctxt->have_exception = false;
5640                 ctxt->exception.vector = -1;
5641                 ctxt->perm_ok = false;
5642
5643                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5644
5645                 r = x86_decode_insn(ctxt, insn, insn_len);
5646
5647                 trace_kvm_emulate_insn_start(vcpu);
5648                 ++vcpu->stat.insn_emulation;
5649                 if (r != EMULATION_OK)  {
5650                         if (emulation_type & EMULTYPE_TRAP_UD)
5651                                 return EMULATE_FAIL;
5652                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5653                                                 emulation_type))
5654                                 return EMULATE_DONE;
5655                         if (emulation_type & EMULTYPE_SKIP)
5656                                 return EMULATE_FAIL;
5657                         return handle_emulation_failure(vcpu);
5658                 }
5659         }
5660
5661         if (emulation_type & EMULTYPE_SKIP) {
5662                 kvm_rip_write(vcpu, ctxt->_eip);
5663                 if (ctxt->eflags & X86_EFLAGS_RF)
5664                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5665                 return EMULATE_DONE;
5666         }
5667
5668         if (retry_instruction(ctxt, cr2, emulation_type))
5669                 return EMULATE_DONE;
5670
5671         /* this is needed for vmware backdoor interface to work since it
5672            changes registers values  during IO operation */
5673         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5674                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5675                 emulator_invalidate_register_cache(ctxt);
5676         }
5677
5678 restart:
5679         /* Save the faulting GPA (cr2) in the address field */
5680         ctxt->exception.address = cr2;
5681
5682         r = x86_emulate_insn(ctxt);
5683
5684         if (r == EMULATION_INTERCEPTED)
5685                 return EMULATE_DONE;
5686
5687         if (r == EMULATION_FAILED) {
5688                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5689                                         emulation_type))
5690                         return EMULATE_DONE;
5691
5692                 return handle_emulation_failure(vcpu);
5693         }
5694
5695         if (ctxt->have_exception) {
5696                 r = EMULATE_DONE;
5697                 if (inject_emulated_exception(vcpu))
5698                         return r;
5699         } else if (vcpu->arch.pio.count) {
5700                 if (!vcpu->arch.pio.in) {
5701                         /* FIXME: return into emulator if single-stepping.  */
5702                         vcpu->arch.pio.count = 0;
5703                 } else {
5704                         writeback = false;
5705                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5706                 }
5707                 r = EMULATE_USER_EXIT;
5708         } else if (vcpu->mmio_needed) {
5709                 if (!vcpu->mmio_is_write)
5710                         writeback = false;
5711                 r = EMULATE_USER_EXIT;
5712                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5713         } else if (r == EMULATION_RESTART)
5714                 goto restart;
5715         else
5716                 r = EMULATE_DONE;
5717
5718         if (writeback) {
5719                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5720                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5721                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5722                 if (vcpu->arch.hflags != ctxt->emul_flags)
5723                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5724                 kvm_rip_write(vcpu, ctxt->eip);
5725                 if (r == EMULATE_DONE)
5726                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5727                 if (!ctxt->have_exception ||
5728                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5729                         __kvm_set_rflags(vcpu, ctxt->eflags);
5730
5731                 /*
5732                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5733                  * do nothing, and it will be requested again as soon as
5734                  * the shadow expires.  But we still need to check here,
5735                  * because POPF has no interrupt shadow.
5736                  */
5737                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5738                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5739         } else
5740                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5741
5742         return r;
5743 }
5744 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5745
5746 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5747 {
5748         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5749         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5750                                             size, port, &val, 1);
5751         /* do not return to emulator after return from userspace */
5752         vcpu->arch.pio.count = 0;
5753         return ret;
5754 }
5755 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5756
5757 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5758 {
5759         unsigned long val;
5760
5761         /* We should only ever be called with arch.pio.count equal to 1 */
5762         BUG_ON(vcpu->arch.pio.count != 1);
5763
5764         /* For size less than 4 we merge, else we zero extend */
5765         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5766                                         : 0;
5767
5768         /*
5769          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5770          * the copy and tracing
5771          */
5772         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5773                                  vcpu->arch.pio.port, &val, 1);
5774         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5775
5776         return 1;
5777 }
5778
5779 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5780 {
5781         unsigned long val;
5782         int ret;
5783
5784         /* For size less than 4 we merge, else we zero extend */
5785         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5786
5787         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5788                                        &val, 1);
5789         if (ret) {
5790                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5791                 return ret;
5792         }
5793
5794         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5795
5796         return 0;
5797 }
5798 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5799
5800 static int kvmclock_cpu_down_prep(unsigned int cpu)
5801 {
5802         __this_cpu_write(cpu_tsc_khz, 0);
5803         return 0;
5804 }
5805
5806 static void tsc_khz_changed(void *data)
5807 {
5808         struct cpufreq_freqs *freq = data;
5809         unsigned long khz = 0;
5810
5811         if (data)
5812                 khz = freq->new;
5813         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5814                 khz = cpufreq_quick_get(raw_smp_processor_id());
5815         if (!khz)
5816                 khz = tsc_khz;
5817         __this_cpu_write(cpu_tsc_khz, khz);
5818 }
5819
5820 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5821                                      void *data)
5822 {
5823         struct cpufreq_freqs *freq = data;
5824         struct kvm *kvm;
5825         struct kvm_vcpu *vcpu;
5826         int i, send_ipi = 0;
5827
5828         /*
5829          * We allow guests to temporarily run on slowing clocks,
5830          * provided we notify them after, or to run on accelerating
5831          * clocks, provided we notify them before.  Thus time never
5832          * goes backwards.
5833          *
5834          * However, we have a problem.  We can't atomically update
5835          * the frequency of a given CPU from this function; it is
5836          * merely a notifier, which can be called from any CPU.
5837          * Changing the TSC frequency at arbitrary points in time
5838          * requires a recomputation of local variables related to
5839          * the TSC for each VCPU.  We must flag these local variables
5840          * to be updated and be sure the update takes place with the
5841          * new frequency before any guests proceed.
5842          *
5843          * Unfortunately, the combination of hotplug CPU and frequency
5844          * change creates an intractable locking scenario; the order
5845          * of when these callouts happen is undefined with respect to
5846          * CPU hotplug, and they can race with each other.  As such,
5847          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5848          * undefined; you can actually have a CPU frequency change take
5849          * place in between the computation of X and the setting of the
5850          * variable.  To protect against this problem, all updates of
5851          * the per_cpu tsc_khz variable are done in an interrupt
5852          * protected IPI, and all callers wishing to update the value
5853          * must wait for a synchronous IPI to complete (which is trivial
5854          * if the caller is on the CPU already).  This establishes the
5855          * necessary total order on variable updates.
5856          *
5857          * Note that because a guest time update may take place
5858          * anytime after the setting of the VCPU's request bit, the
5859          * correct TSC value must be set before the request.  However,
5860          * to ensure the update actually makes it to any guest which
5861          * starts running in hardware virtualization between the set
5862          * and the acquisition of the spinlock, we must also ping the
5863          * CPU after setting the request bit.
5864          *
5865          */
5866
5867         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5868                 return 0;
5869         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5870                 return 0;
5871
5872         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5873
5874         spin_lock(&kvm_lock);
5875         list_for_each_entry(kvm, &vm_list, vm_list) {
5876                 kvm_for_each_vcpu(i, vcpu, kvm) {
5877                         if (vcpu->cpu != freq->cpu)
5878                                 continue;
5879                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5880                         if (vcpu->cpu != smp_processor_id())
5881                                 send_ipi = 1;
5882                 }
5883         }
5884         spin_unlock(&kvm_lock);
5885
5886         if (freq->old < freq->new && send_ipi) {
5887                 /*
5888                  * We upscale the frequency.  Must make the guest
5889                  * doesn't see old kvmclock values while running with
5890                  * the new frequency, otherwise we risk the guest sees
5891                  * time go backwards.
5892                  *
5893                  * In case we update the frequency for another cpu
5894                  * (which might be in guest context) send an interrupt
5895                  * to kick the cpu out of guest context.  Next time
5896                  * guest context is entered kvmclock will be updated,
5897                  * so the guest will not see stale values.
5898                  */
5899                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5900         }
5901         return 0;
5902 }
5903
5904 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5905         .notifier_call  = kvmclock_cpufreq_notifier
5906 };
5907
5908 static int kvmclock_cpu_online(unsigned int cpu)
5909 {
5910         tsc_khz_changed(NULL);
5911         return 0;
5912 }
5913
5914 static void kvm_timer_init(void)
5915 {
5916         max_tsc_khz = tsc_khz;
5917
5918         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5919 #ifdef CONFIG_CPU_FREQ
5920                 struct cpufreq_policy policy;
5921                 int cpu;
5922
5923                 memset(&policy, 0, sizeof(policy));
5924                 cpu = get_cpu();
5925                 cpufreq_get_policy(&policy, cpu);
5926                 if (policy.cpuinfo.max_freq)
5927                         max_tsc_khz = policy.cpuinfo.max_freq;
5928                 put_cpu();
5929 #endif
5930                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5931                                           CPUFREQ_TRANSITION_NOTIFIER);
5932         }
5933         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5934
5935         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
5936                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
5937 }
5938
5939 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5940
5941 int kvm_is_in_guest(void)
5942 {
5943         return __this_cpu_read(current_vcpu) != NULL;
5944 }
5945
5946 static int kvm_is_user_mode(void)
5947 {
5948         int user_mode = 3;
5949
5950         if (__this_cpu_read(current_vcpu))
5951                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5952
5953         return user_mode != 0;
5954 }
5955
5956 static unsigned long kvm_get_guest_ip(void)
5957 {
5958         unsigned long ip = 0;
5959
5960         if (__this_cpu_read(current_vcpu))
5961                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5962
5963         return ip;
5964 }
5965
5966 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5967         .is_in_guest            = kvm_is_in_guest,
5968         .is_user_mode           = kvm_is_user_mode,
5969         .get_guest_ip           = kvm_get_guest_ip,
5970 };
5971
5972 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5973 {
5974         __this_cpu_write(current_vcpu, vcpu);
5975 }
5976 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5977
5978 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5979 {
5980         __this_cpu_write(current_vcpu, NULL);
5981 }
5982 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5983
5984 static void kvm_set_mmio_spte_mask(void)
5985 {
5986         u64 mask;
5987         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5988
5989         /*
5990          * Set the reserved bits and the present bit of an paging-structure
5991          * entry to generate page fault with PFER.RSV = 1.
5992          */
5993          /* Mask the reserved physical address bits. */
5994         mask = rsvd_bits(maxphyaddr, 51);
5995
5996         /* Set the present bit. */
5997         mask |= 1ull;
5998
5999 #ifdef CONFIG_X86_64
6000         /*
6001          * If reserved bit is not supported, clear the present bit to disable
6002          * mmio page fault.
6003          */
6004         if (maxphyaddr == 52)
6005                 mask &= ~1ull;
6006 #endif
6007
6008         kvm_mmu_set_mmio_spte_mask(mask);
6009 }
6010
6011 #ifdef CONFIG_X86_64
6012 static void pvclock_gtod_update_fn(struct work_struct *work)
6013 {
6014         struct kvm *kvm;
6015
6016         struct kvm_vcpu *vcpu;
6017         int i;
6018
6019         spin_lock(&kvm_lock);
6020         list_for_each_entry(kvm, &vm_list, vm_list)
6021                 kvm_for_each_vcpu(i, vcpu, kvm)
6022                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6023         atomic_set(&kvm_guest_has_master_clock, 0);
6024         spin_unlock(&kvm_lock);
6025 }
6026
6027 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6028
6029 /*
6030  * Notification about pvclock gtod data update.
6031  */
6032 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6033                                void *priv)
6034 {
6035         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6036         struct timekeeper *tk = priv;
6037
6038         update_pvclock_gtod(tk);
6039
6040         /* disable master clock if host does not trust, or does not
6041          * use, TSC clocksource
6042          */
6043         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6044             atomic_read(&kvm_guest_has_master_clock) != 0)
6045                 queue_work(system_long_wq, &pvclock_gtod_work);
6046
6047         return 0;
6048 }
6049
6050 static struct notifier_block pvclock_gtod_notifier = {
6051         .notifier_call = pvclock_gtod_notify,
6052 };
6053 #endif
6054
6055 int kvm_arch_init(void *opaque)
6056 {
6057         int r;
6058         struct kvm_x86_ops *ops = opaque;
6059
6060         if (kvm_x86_ops) {
6061                 printk(KERN_ERR "kvm: already loaded the other module\n");
6062                 r = -EEXIST;
6063                 goto out;
6064         }
6065
6066         if (!ops->cpu_has_kvm_support()) {
6067                 printk(KERN_ERR "kvm: no hardware support\n");
6068                 r = -EOPNOTSUPP;
6069                 goto out;
6070         }
6071         if (ops->disabled_by_bios()) {
6072                 printk(KERN_ERR "kvm: disabled by bios\n");
6073                 r = -EOPNOTSUPP;
6074                 goto out;
6075         }
6076
6077         r = -ENOMEM;
6078         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6079         if (!shared_msrs) {
6080                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6081                 goto out;
6082         }
6083
6084         r = kvm_mmu_module_init();
6085         if (r)
6086                 goto out_free_percpu;
6087
6088         kvm_set_mmio_spte_mask();
6089
6090         kvm_x86_ops = ops;
6091
6092         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6093                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6094                         PT_PRESENT_MASK, 0);
6095         kvm_timer_init();
6096
6097         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6098
6099         if (boot_cpu_has(X86_FEATURE_XSAVE))
6100                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6101
6102         kvm_lapic_init();
6103 #ifdef CONFIG_X86_64
6104         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6105 #endif
6106
6107         return 0;
6108
6109 out_free_percpu:
6110         free_percpu(shared_msrs);
6111 out:
6112         return r;
6113 }
6114
6115 void kvm_arch_exit(void)
6116 {
6117         kvm_lapic_exit();
6118         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6119
6120         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6121                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6122                                             CPUFREQ_TRANSITION_NOTIFIER);
6123         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6124 #ifdef CONFIG_X86_64
6125         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6126 #endif
6127         kvm_x86_ops = NULL;
6128         kvm_mmu_module_exit();
6129         free_percpu(shared_msrs);
6130 }
6131
6132 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6133 {
6134         ++vcpu->stat.halt_exits;
6135         if (lapic_in_kernel(vcpu)) {
6136                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6137                 return 1;
6138         } else {
6139                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6140                 return 0;
6141         }
6142 }
6143 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6144
6145 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6146 {
6147         int ret = kvm_skip_emulated_instruction(vcpu);
6148         /*
6149          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6150          * KVM_EXIT_DEBUG here.
6151          */
6152         return kvm_vcpu_halt(vcpu) && ret;
6153 }
6154 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6155
6156 #ifdef CONFIG_X86_64
6157 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6158                                 unsigned long clock_type)
6159 {
6160         struct kvm_clock_pairing clock_pairing;
6161         struct timespec ts;
6162         u64 cycle;
6163         int ret;
6164
6165         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6166                 return -KVM_EOPNOTSUPP;
6167
6168         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6169                 return -KVM_EOPNOTSUPP;
6170
6171         clock_pairing.sec = ts.tv_sec;
6172         clock_pairing.nsec = ts.tv_nsec;
6173         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6174         clock_pairing.flags = 0;
6175
6176         ret = 0;
6177         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6178                             sizeof(struct kvm_clock_pairing)))
6179                 ret = -KVM_EFAULT;
6180
6181         return ret;
6182 }
6183 #endif
6184
6185 /*
6186  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6187  *
6188  * @apicid - apicid of vcpu to be kicked.
6189  */
6190 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6191 {
6192         struct kvm_lapic_irq lapic_irq;
6193
6194         lapic_irq.shorthand = 0;
6195         lapic_irq.dest_mode = 0;
6196         lapic_irq.dest_id = apicid;
6197         lapic_irq.msi_redir_hint = false;
6198
6199         lapic_irq.delivery_mode = APIC_DM_REMRD;
6200         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6201 }
6202
6203 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6204 {
6205         vcpu->arch.apicv_active = false;
6206         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6207 }
6208
6209 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6210 {
6211         unsigned long nr, a0, a1, a2, a3, ret;
6212         int op_64_bit, r;
6213
6214         r = kvm_skip_emulated_instruction(vcpu);
6215
6216         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6217                 return kvm_hv_hypercall(vcpu);
6218
6219         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6220         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6221         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6222         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6223         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6224
6225         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6226
6227         op_64_bit = is_64_bit_mode(vcpu);
6228         if (!op_64_bit) {
6229                 nr &= 0xFFFFFFFF;
6230                 a0 &= 0xFFFFFFFF;
6231                 a1 &= 0xFFFFFFFF;
6232                 a2 &= 0xFFFFFFFF;
6233                 a3 &= 0xFFFFFFFF;
6234         }
6235
6236         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6237                 ret = -KVM_EPERM;
6238                 goto out;
6239         }
6240
6241         switch (nr) {
6242         case KVM_HC_VAPIC_POLL_IRQ:
6243                 ret = 0;
6244                 break;
6245         case KVM_HC_KICK_CPU:
6246                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6247                 ret = 0;
6248                 break;
6249 #ifdef CONFIG_X86_64
6250         case KVM_HC_CLOCK_PAIRING:
6251                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6252                 break;
6253 #endif
6254         default:
6255                 ret = -KVM_ENOSYS;
6256                 break;
6257         }
6258 out:
6259         if (!op_64_bit)
6260                 ret = (u32)ret;
6261         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6262         ++vcpu->stat.hypercalls;
6263         return r;
6264 }
6265 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6266
6267 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6268 {
6269         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6270         char instruction[3];
6271         unsigned long rip = kvm_rip_read(vcpu);
6272
6273         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6274
6275         return emulator_write_emulated(ctxt, rip, instruction, 3,
6276                 &ctxt->exception);
6277 }
6278
6279 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6280 {
6281         return vcpu->run->request_interrupt_window &&
6282                 likely(!pic_in_kernel(vcpu->kvm));
6283 }
6284
6285 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6286 {
6287         struct kvm_run *kvm_run = vcpu->run;
6288
6289         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6290         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6291         kvm_run->cr8 = kvm_get_cr8(vcpu);
6292         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6293         kvm_run->ready_for_interrupt_injection =
6294                 pic_in_kernel(vcpu->kvm) ||
6295                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6296 }
6297
6298 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6299 {
6300         int max_irr, tpr;
6301
6302         if (!kvm_x86_ops->update_cr8_intercept)
6303                 return;
6304
6305         if (!lapic_in_kernel(vcpu))
6306                 return;
6307
6308         if (vcpu->arch.apicv_active)
6309                 return;
6310
6311         if (!vcpu->arch.apic->vapic_addr)
6312                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6313         else
6314                 max_irr = -1;
6315
6316         if (max_irr != -1)
6317                 max_irr >>= 4;
6318
6319         tpr = kvm_lapic_get_cr8(vcpu);
6320
6321         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6322 }
6323
6324 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6325 {
6326         int r;
6327
6328         /* try to reinject previous events if any */
6329         if (vcpu->arch.exception.pending) {
6330                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6331                                         vcpu->arch.exception.has_error_code,
6332                                         vcpu->arch.exception.error_code);
6333
6334                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6335                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6336                                              X86_EFLAGS_RF);
6337
6338                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6339                     (vcpu->arch.dr7 & DR7_GD)) {
6340                         vcpu->arch.dr7 &= ~DR7_GD;
6341                         kvm_update_dr7(vcpu);
6342                 }
6343
6344                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
6345                                           vcpu->arch.exception.has_error_code,
6346                                           vcpu->arch.exception.error_code,
6347                                           vcpu->arch.exception.reinject);
6348                 return 0;
6349         }
6350
6351         if (vcpu->arch.nmi_injected) {
6352                 kvm_x86_ops->set_nmi(vcpu);
6353                 return 0;
6354         }
6355
6356         if (vcpu->arch.interrupt.pending) {
6357                 kvm_x86_ops->set_irq(vcpu);
6358                 return 0;
6359         }
6360
6361         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6362                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6363                 if (r != 0)
6364                         return r;
6365         }
6366
6367         /* try to inject new event if pending */
6368         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6369                 vcpu->arch.smi_pending = false;
6370                 enter_smm(vcpu);
6371         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6372                 --vcpu->arch.nmi_pending;
6373                 vcpu->arch.nmi_injected = true;
6374                 kvm_x86_ops->set_nmi(vcpu);
6375         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6376                 /*
6377                  * Because interrupts can be injected asynchronously, we are
6378                  * calling check_nested_events again here to avoid a race condition.
6379                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6380                  * proposal and current concerns.  Perhaps we should be setting
6381                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6382                  */
6383                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6384                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6385                         if (r != 0)
6386                                 return r;
6387                 }
6388                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6389                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6390                                             false);
6391                         kvm_x86_ops->set_irq(vcpu);
6392                 }
6393         }
6394
6395         return 0;
6396 }
6397
6398 static void process_nmi(struct kvm_vcpu *vcpu)
6399 {
6400         unsigned limit = 2;
6401
6402         /*
6403          * x86 is limited to one NMI running, and one NMI pending after it.
6404          * If an NMI is already in progress, limit further NMIs to just one.
6405          * Otherwise, allow two (and we'll inject the first one immediately).
6406          */
6407         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6408                 limit = 1;
6409
6410         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6411         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6412         kvm_make_request(KVM_REQ_EVENT, vcpu);
6413 }
6414
6415 #define put_smstate(type, buf, offset, val)                       \
6416         *(type *)((buf) + (offset) - 0x7e00) = val
6417
6418 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6419 {
6420         u32 flags = 0;
6421         flags |= seg->g       << 23;
6422         flags |= seg->db      << 22;
6423         flags |= seg->l       << 21;
6424         flags |= seg->avl     << 20;
6425         flags |= seg->present << 15;
6426         flags |= seg->dpl     << 13;
6427         flags |= seg->s       << 12;
6428         flags |= seg->type    << 8;
6429         return flags;
6430 }
6431
6432 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6433 {
6434         struct kvm_segment seg;
6435         int offset;
6436
6437         kvm_get_segment(vcpu, &seg, n);
6438         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6439
6440         if (n < 3)
6441                 offset = 0x7f84 + n * 12;
6442         else
6443                 offset = 0x7f2c + (n - 3) * 12;
6444
6445         put_smstate(u32, buf, offset + 8, seg.base);
6446         put_smstate(u32, buf, offset + 4, seg.limit);
6447         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6448 }
6449
6450 #ifdef CONFIG_X86_64
6451 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6452 {
6453         struct kvm_segment seg;
6454         int offset;
6455         u16 flags;
6456
6457         kvm_get_segment(vcpu, &seg, n);
6458         offset = 0x7e00 + n * 16;
6459
6460         flags = enter_smm_get_segment_flags(&seg) >> 8;
6461         put_smstate(u16, buf, offset, seg.selector);
6462         put_smstate(u16, buf, offset + 2, flags);
6463         put_smstate(u32, buf, offset + 4, seg.limit);
6464         put_smstate(u64, buf, offset + 8, seg.base);
6465 }
6466 #endif
6467
6468 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6469 {
6470         struct desc_ptr dt;
6471         struct kvm_segment seg;
6472         unsigned long val;
6473         int i;
6474
6475         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6476         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6477         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6478         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6479
6480         for (i = 0; i < 8; i++)
6481                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6482
6483         kvm_get_dr(vcpu, 6, &val);
6484         put_smstate(u32, buf, 0x7fcc, (u32)val);
6485         kvm_get_dr(vcpu, 7, &val);
6486         put_smstate(u32, buf, 0x7fc8, (u32)val);
6487
6488         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6489         put_smstate(u32, buf, 0x7fc4, seg.selector);
6490         put_smstate(u32, buf, 0x7f64, seg.base);
6491         put_smstate(u32, buf, 0x7f60, seg.limit);
6492         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6493
6494         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6495         put_smstate(u32, buf, 0x7fc0, seg.selector);
6496         put_smstate(u32, buf, 0x7f80, seg.base);
6497         put_smstate(u32, buf, 0x7f7c, seg.limit);
6498         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6499
6500         kvm_x86_ops->get_gdt(vcpu, &dt);
6501         put_smstate(u32, buf, 0x7f74, dt.address);
6502         put_smstate(u32, buf, 0x7f70, dt.size);
6503
6504         kvm_x86_ops->get_idt(vcpu, &dt);
6505         put_smstate(u32, buf, 0x7f58, dt.address);
6506         put_smstate(u32, buf, 0x7f54, dt.size);
6507
6508         for (i = 0; i < 6; i++)
6509                 enter_smm_save_seg_32(vcpu, buf, i);
6510
6511         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6512
6513         /* revision id */
6514         put_smstate(u32, buf, 0x7efc, 0x00020000);
6515         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6516 }
6517
6518 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6519 {
6520 #ifdef CONFIG_X86_64
6521         struct desc_ptr dt;
6522         struct kvm_segment seg;
6523         unsigned long val;
6524         int i;
6525
6526         for (i = 0; i < 16; i++)
6527                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6528
6529         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6530         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6531
6532         kvm_get_dr(vcpu, 6, &val);
6533         put_smstate(u64, buf, 0x7f68, val);
6534         kvm_get_dr(vcpu, 7, &val);
6535         put_smstate(u64, buf, 0x7f60, val);
6536
6537         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6538         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6539         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6540
6541         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6542
6543         /* revision id */
6544         put_smstate(u32, buf, 0x7efc, 0x00020064);
6545
6546         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6547
6548         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6549         put_smstate(u16, buf, 0x7e90, seg.selector);
6550         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6551         put_smstate(u32, buf, 0x7e94, seg.limit);
6552         put_smstate(u64, buf, 0x7e98, seg.base);
6553
6554         kvm_x86_ops->get_idt(vcpu, &dt);
6555         put_smstate(u32, buf, 0x7e84, dt.size);
6556         put_smstate(u64, buf, 0x7e88, dt.address);
6557
6558         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6559         put_smstate(u16, buf, 0x7e70, seg.selector);
6560         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6561         put_smstate(u32, buf, 0x7e74, seg.limit);
6562         put_smstate(u64, buf, 0x7e78, seg.base);
6563
6564         kvm_x86_ops->get_gdt(vcpu, &dt);
6565         put_smstate(u32, buf, 0x7e64, dt.size);
6566         put_smstate(u64, buf, 0x7e68, dt.address);
6567
6568         for (i = 0; i < 6; i++)
6569                 enter_smm_save_seg_64(vcpu, buf, i);
6570 #else
6571         WARN_ON_ONCE(1);
6572 #endif
6573 }
6574
6575 static void enter_smm(struct kvm_vcpu *vcpu)
6576 {
6577         struct kvm_segment cs, ds;
6578         struct desc_ptr dt;
6579         char buf[512];
6580         u32 cr0;
6581
6582         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6583         vcpu->arch.hflags |= HF_SMM_MASK;
6584         memset(buf, 0, 512);
6585         if (guest_cpuid_has_longmode(vcpu))
6586                 enter_smm_save_state_64(vcpu, buf);
6587         else
6588                 enter_smm_save_state_32(vcpu, buf);
6589
6590         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6591
6592         if (kvm_x86_ops->get_nmi_mask(vcpu))
6593                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6594         else
6595                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6596
6597         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6598         kvm_rip_write(vcpu, 0x8000);
6599
6600         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6601         kvm_x86_ops->set_cr0(vcpu, cr0);
6602         vcpu->arch.cr0 = cr0;
6603
6604         kvm_x86_ops->set_cr4(vcpu, 0);
6605
6606         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6607         dt.address = dt.size = 0;
6608         kvm_x86_ops->set_idt(vcpu, &dt);
6609
6610         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6611
6612         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6613         cs.base = vcpu->arch.smbase;
6614
6615         ds.selector = 0;
6616         ds.base = 0;
6617
6618         cs.limit    = ds.limit = 0xffffffff;
6619         cs.type     = ds.type = 0x3;
6620         cs.dpl      = ds.dpl = 0;
6621         cs.db       = ds.db = 0;
6622         cs.s        = ds.s = 1;
6623         cs.l        = ds.l = 0;
6624         cs.g        = ds.g = 1;
6625         cs.avl      = ds.avl = 0;
6626         cs.present  = ds.present = 1;
6627         cs.unusable = ds.unusable = 0;
6628         cs.padding  = ds.padding = 0;
6629
6630         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6631         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6632         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6633         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6634         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6635         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6636
6637         if (guest_cpuid_has_longmode(vcpu))
6638                 kvm_x86_ops->set_efer(vcpu, 0);
6639
6640         kvm_update_cpuid(vcpu);
6641         kvm_mmu_reset_context(vcpu);
6642 }
6643
6644 static void process_smi(struct kvm_vcpu *vcpu)
6645 {
6646         vcpu->arch.smi_pending = true;
6647         kvm_make_request(KVM_REQ_EVENT, vcpu);
6648 }
6649
6650 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6651 {
6652         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6653 }
6654
6655 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6656 {
6657         u64 eoi_exit_bitmap[4];
6658
6659         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6660                 return;
6661
6662         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6663
6664         if (irqchip_split(vcpu->kvm))
6665                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6666         else {
6667                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6668                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6669                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6670         }
6671         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6672                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6673         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6674 }
6675
6676 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6677 {
6678         ++vcpu->stat.tlb_flush;
6679         kvm_x86_ops->tlb_flush(vcpu);
6680 }
6681
6682 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6683 {
6684         struct page *page = NULL;
6685
6686         if (!lapic_in_kernel(vcpu))
6687                 return;
6688
6689         if (!kvm_x86_ops->set_apic_access_page_addr)
6690                 return;
6691
6692         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6693         if (is_error_page(page))
6694                 return;
6695         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6696
6697         /*
6698          * Do not pin apic access page in memory, the MMU notifier
6699          * will call us again if it is migrated or swapped out.
6700          */
6701         put_page(page);
6702 }
6703 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6704
6705 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6706                                            unsigned long address)
6707 {
6708         /*
6709          * The physical address of apic access page is stored in the VMCS.
6710          * Update it when it becomes invalid.
6711          */
6712         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6713                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6714 }
6715
6716 /*
6717  * Returns 1 to let vcpu_run() continue the guest execution loop without
6718  * exiting to the userspace.  Otherwise, the value will be returned to the
6719  * userspace.
6720  */
6721 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6722 {
6723         int r;
6724         bool req_int_win =
6725                 dm_request_for_irq_injection(vcpu) &&
6726                 kvm_cpu_accept_dm_intr(vcpu);
6727
6728         bool req_immediate_exit = false;
6729
6730         if (vcpu->requests) {
6731                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6732                         kvm_mmu_unload(vcpu);
6733                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6734                         __kvm_migrate_timers(vcpu);
6735                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6736                         kvm_gen_update_masterclock(vcpu->kvm);
6737                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6738                         kvm_gen_kvmclock_update(vcpu);
6739                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6740                         r = kvm_guest_time_update(vcpu);
6741                         if (unlikely(r))
6742                                 goto out;
6743                 }
6744                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6745                         kvm_mmu_sync_roots(vcpu);
6746                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6747                         kvm_vcpu_flush_tlb(vcpu);
6748                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6749                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6750                         r = 0;
6751                         goto out;
6752                 }
6753                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6754                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6755                         r = 0;
6756                         goto out;
6757                 }
6758                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6759                         /* Page is swapped out. Do synthetic halt */
6760                         vcpu->arch.apf.halted = true;
6761                         r = 1;
6762                         goto out;
6763                 }
6764                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6765                         record_steal_time(vcpu);
6766                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6767                         process_smi(vcpu);
6768                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6769                         process_nmi(vcpu);
6770                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6771                         kvm_pmu_handle_event(vcpu);
6772                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6773                         kvm_pmu_deliver_pmi(vcpu);
6774                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6775                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6776                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6777                                      vcpu->arch.ioapic_handled_vectors)) {
6778                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6779                                 vcpu->run->eoi.vector =
6780                                                 vcpu->arch.pending_ioapic_eoi;
6781                                 r = 0;
6782                                 goto out;
6783                         }
6784                 }
6785                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6786                         vcpu_scan_ioapic(vcpu);
6787                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6788                         kvm_vcpu_reload_apic_access_page(vcpu);
6789                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6790                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6791                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6792                         r = 0;
6793                         goto out;
6794                 }
6795                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6796                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6797                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6798                         r = 0;
6799                         goto out;
6800                 }
6801                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6802                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6803                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6804                         r = 0;
6805                         goto out;
6806                 }
6807
6808                 /*
6809                  * KVM_REQ_HV_STIMER has to be processed after
6810                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6811                  * depend on the guest clock being up-to-date
6812                  */
6813                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6814                         kvm_hv_process_stimers(vcpu);
6815         }
6816
6817         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6818                 ++vcpu->stat.req_event;
6819                 kvm_apic_accept_events(vcpu);
6820                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6821                         r = 1;
6822                         goto out;
6823                 }
6824
6825                 if (inject_pending_event(vcpu, req_int_win) != 0)
6826                         req_immediate_exit = true;
6827                 else {
6828                         /* Enable NMI/IRQ window open exits if needed.
6829                          *
6830                          * SMIs have two cases: 1) they can be nested, and
6831                          * then there is nothing to do here because RSM will
6832                          * cause a vmexit anyway; 2) or the SMI can be pending
6833                          * because inject_pending_event has completed the
6834                          * injection of an IRQ or NMI from the previous vmexit,
6835                          * and then we request an immediate exit to inject the SMI.
6836                          */
6837                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6838                                 req_immediate_exit = true;
6839                         if (vcpu->arch.nmi_pending)
6840                                 kvm_x86_ops->enable_nmi_window(vcpu);
6841                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6842                                 kvm_x86_ops->enable_irq_window(vcpu);
6843                 }
6844
6845                 if (kvm_lapic_enabled(vcpu)) {
6846                         update_cr8_intercept(vcpu);
6847                         kvm_lapic_sync_to_vapic(vcpu);
6848                 }
6849         }
6850
6851         r = kvm_mmu_reload(vcpu);
6852         if (unlikely(r)) {
6853                 goto cancel_injection;
6854         }
6855
6856         preempt_disable();
6857
6858         kvm_x86_ops->prepare_guest_switch(vcpu);
6859         kvm_load_guest_fpu(vcpu);
6860
6861         /*
6862          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
6863          * IPI are then delayed after guest entry, which ensures that they
6864          * result in virtual interrupt delivery.
6865          */
6866         local_irq_disable();
6867         vcpu->mode = IN_GUEST_MODE;
6868
6869         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6870
6871         /*
6872          * 1) We should set ->mode before checking ->requests.  Please see
6873          * the comment in kvm_make_all_cpus_request.
6874          *
6875          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
6876          * pairs with the memory barrier implicit in pi_test_and_set_on
6877          * (see vmx_deliver_posted_interrupt).
6878          *
6879          * 3) This also orders the write to mode from any reads to the page
6880          * tables done while the VCPU is running.  Please see the comment
6881          * in kvm_flush_remote_tlbs.
6882          */
6883         smp_mb__after_srcu_read_unlock();
6884
6885         /*
6886          * This handles the case where a posted interrupt was
6887          * notified with kvm_vcpu_kick.
6888          */
6889         if (kvm_lapic_enabled(vcpu)) {
6890                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6891                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6892         }
6893
6894         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6895             || need_resched() || signal_pending(current)) {
6896                 vcpu->mode = OUTSIDE_GUEST_MODE;
6897                 smp_wmb();
6898                 local_irq_enable();
6899                 preempt_enable();
6900                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6901                 r = 1;
6902                 goto cancel_injection;
6903         }
6904
6905         kvm_load_guest_xcr0(vcpu);
6906
6907         if (req_immediate_exit) {
6908                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6909                 smp_send_reschedule(vcpu->cpu);
6910         }
6911
6912         trace_kvm_entry(vcpu->vcpu_id);
6913         wait_lapic_expire(vcpu);
6914         guest_enter_irqoff();
6915
6916         if (unlikely(vcpu->arch.switch_db_regs)) {
6917                 set_debugreg(0, 7);
6918                 set_debugreg(vcpu->arch.eff_db[0], 0);
6919                 set_debugreg(vcpu->arch.eff_db[1], 1);
6920                 set_debugreg(vcpu->arch.eff_db[2], 2);
6921                 set_debugreg(vcpu->arch.eff_db[3], 3);
6922                 set_debugreg(vcpu->arch.dr6, 6);
6923                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6924         }
6925
6926         kvm_x86_ops->run(vcpu);
6927
6928         /*
6929          * Do this here before restoring debug registers on the host.  And
6930          * since we do this before handling the vmexit, a DR access vmexit
6931          * can (a) read the correct value of the debug registers, (b) set
6932          * KVM_DEBUGREG_WONT_EXIT again.
6933          */
6934         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6935                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6936                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6937                 kvm_update_dr0123(vcpu);
6938                 kvm_update_dr6(vcpu);
6939                 kvm_update_dr7(vcpu);
6940                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6941         }
6942
6943         /*
6944          * If the guest has used debug registers, at least dr7
6945          * will be disabled while returning to the host.
6946          * If we don't have active breakpoints in the host, we don't
6947          * care about the messed up debug address registers. But if
6948          * we have some of them active, restore the old state.
6949          */
6950         if (hw_breakpoint_active())
6951                 hw_breakpoint_restore();
6952
6953         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6954
6955         vcpu->mode = OUTSIDE_GUEST_MODE;
6956         smp_wmb();
6957
6958         kvm_put_guest_xcr0(vcpu);
6959
6960         kvm_x86_ops->handle_external_intr(vcpu);
6961
6962         ++vcpu->stat.exits;
6963
6964         guest_exit_irqoff();
6965
6966         local_irq_enable();
6967         preempt_enable();
6968
6969         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6970
6971         /*
6972          * Profile KVM exit RIPs:
6973          */
6974         if (unlikely(prof_on == KVM_PROFILING)) {
6975                 unsigned long rip = kvm_rip_read(vcpu);
6976                 profile_hit(KVM_PROFILING, (void *)rip);
6977         }
6978
6979         if (unlikely(vcpu->arch.tsc_always_catchup))
6980                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6981
6982         if (vcpu->arch.apic_attention)
6983                 kvm_lapic_sync_from_vapic(vcpu);
6984
6985         r = kvm_x86_ops->handle_exit(vcpu);
6986         return r;
6987
6988 cancel_injection:
6989         kvm_x86_ops->cancel_injection(vcpu);
6990         if (unlikely(vcpu->arch.apic_attention))
6991                 kvm_lapic_sync_from_vapic(vcpu);
6992 out:
6993         return r;
6994 }
6995
6996 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6997 {
6998         if (!kvm_arch_vcpu_runnable(vcpu) &&
6999             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7000                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7001                 kvm_vcpu_block(vcpu);
7002                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7003
7004                 if (kvm_x86_ops->post_block)
7005                         kvm_x86_ops->post_block(vcpu);
7006
7007                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7008                         return 1;
7009         }
7010
7011         kvm_apic_accept_events(vcpu);
7012         switch(vcpu->arch.mp_state) {
7013         case KVM_MP_STATE_HALTED:
7014                 vcpu->arch.pv.pv_unhalted = false;
7015                 vcpu->arch.mp_state =
7016                         KVM_MP_STATE_RUNNABLE;
7017         case KVM_MP_STATE_RUNNABLE:
7018                 vcpu->arch.apf.halted = false;
7019                 break;
7020         case KVM_MP_STATE_INIT_RECEIVED:
7021                 break;
7022         default:
7023                 return -EINTR;
7024                 break;
7025         }
7026         return 1;
7027 }
7028
7029 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7030 {
7031         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7032                 kvm_x86_ops->check_nested_events(vcpu, false);
7033
7034         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7035                 !vcpu->arch.apf.halted);
7036 }
7037
7038 static int vcpu_run(struct kvm_vcpu *vcpu)
7039 {
7040         int r;
7041         struct kvm *kvm = vcpu->kvm;
7042
7043         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7044
7045         for (;;) {
7046                 if (kvm_vcpu_running(vcpu)) {
7047                         r = vcpu_enter_guest(vcpu);
7048                 } else {
7049                         r = vcpu_block(kvm, vcpu);
7050                 }
7051
7052                 if (r <= 0)
7053                         break;
7054
7055                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
7056                 if (kvm_cpu_has_pending_timer(vcpu))
7057                         kvm_inject_pending_timer_irqs(vcpu);
7058
7059                 if (dm_request_for_irq_injection(vcpu) &&
7060                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7061                         r = 0;
7062                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7063                         ++vcpu->stat.request_irq_exits;
7064                         break;
7065                 }
7066
7067                 kvm_check_async_pf_completion(vcpu);
7068
7069                 if (signal_pending(current)) {
7070                         r = -EINTR;
7071                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7072                         ++vcpu->stat.signal_exits;
7073                         break;
7074                 }
7075                 if (need_resched()) {
7076                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7077                         cond_resched();
7078                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7079                 }
7080         }
7081
7082         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7083
7084         return r;
7085 }
7086
7087 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7088 {
7089         int r;
7090         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7091         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7092         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7093         if (r != EMULATE_DONE)
7094                 return 0;
7095         return 1;
7096 }
7097
7098 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7099 {
7100         BUG_ON(!vcpu->arch.pio.count);
7101
7102         return complete_emulated_io(vcpu);
7103 }
7104
7105 /*
7106  * Implements the following, as a state machine:
7107  *
7108  * read:
7109  *   for each fragment
7110  *     for each mmio piece in the fragment
7111  *       write gpa, len
7112  *       exit
7113  *       copy data
7114  *   execute insn
7115  *
7116  * write:
7117  *   for each fragment
7118  *     for each mmio piece in the fragment
7119  *       write gpa, len
7120  *       copy data
7121  *       exit
7122  */
7123 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7124 {
7125         struct kvm_run *run = vcpu->run;
7126         struct kvm_mmio_fragment *frag;
7127         unsigned len;
7128
7129         BUG_ON(!vcpu->mmio_needed);
7130
7131         /* Complete previous fragment */
7132         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7133         len = min(8u, frag->len);
7134         if (!vcpu->mmio_is_write)
7135                 memcpy(frag->data, run->mmio.data, len);
7136
7137         if (frag->len <= 8) {
7138                 /* Switch to the next fragment. */
7139                 frag++;
7140                 vcpu->mmio_cur_fragment++;
7141         } else {
7142                 /* Go forward to the next mmio piece. */
7143                 frag->data += len;
7144                 frag->gpa += len;
7145                 frag->len -= len;
7146         }
7147
7148         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7149                 vcpu->mmio_needed = 0;
7150
7151                 /* FIXME: return into emulator if single-stepping.  */
7152                 if (vcpu->mmio_is_write)
7153                         return 1;
7154                 vcpu->mmio_read_completed = 1;
7155                 return complete_emulated_io(vcpu);
7156         }
7157
7158         run->exit_reason = KVM_EXIT_MMIO;
7159         run->mmio.phys_addr = frag->gpa;
7160         if (vcpu->mmio_is_write)
7161                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7162         run->mmio.len = min(8u, frag->len);
7163         run->mmio.is_write = vcpu->mmio_is_write;
7164         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7165         return 0;
7166 }
7167
7168
7169 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7170 {
7171         struct fpu *fpu = &current->thread.fpu;
7172         int r;
7173         sigset_t sigsaved;
7174
7175         fpu__activate_curr(fpu);
7176
7177         if (vcpu->sigset_active)
7178                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7179
7180         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7181                 kvm_vcpu_block(vcpu);
7182                 kvm_apic_accept_events(vcpu);
7183                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
7184                 r = -EAGAIN;
7185                 goto out;
7186         }
7187
7188         /* re-sync apic's tpr */
7189         if (!lapic_in_kernel(vcpu)) {
7190                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7191                         r = -EINVAL;
7192                         goto out;
7193                 }
7194         }
7195
7196         if (unlikely(vcpu->arch.complete_userspace_io)) {
7197                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7198                 vcpu->arch.complete_userspace_io = NULL;
7199                 r = cui(vcpu);
7200                 if (r <= 0)
7201                         goto out;
7202         } else
7203                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7204
7205         if (kvm_run->immediate_exit)
7206                 r = -EINTR;
7207         else
7208                 r = vcpu_run(vcpu);
7209
7210 out:
7211         post_kvm_run_save(vcpu);
7212         if (vcpu->sigset_active)
7213                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7214
7215         return r;
7216 }
7217
7218 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7219 {
7220         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7221                 /*
7222                  * We are here if userspace calls get_regs() in the middle of
7223                  * instruction emulation. Registers state needs to be copied
7224                  * back from emulation context to vcpu. Userspace shouldn't do
7225                  * that usually, but some bad designed PV devices (vmware
7226                  * backdoor interface) need this to work
7227                  */
7228                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7229                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7230         }
7231         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7232         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7233         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7234         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7235         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7236         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7237         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7238         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7239 #ifdef CONFIG_X86_64
7240         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7241         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7242         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7243         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7244         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7245         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7246         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7247         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7248 #endif
7249
7250         regs->rip = kvm_rip_read(vcpu);
7251         regs->rflags = kvm_get_rflags(vcpu);
7252
7253         return 0;
7254 }
7255
7256 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7257 {
7258         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7259         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7260
7261         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7262         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7263         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7264         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7265         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7266         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7267         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7268         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7269 #ifdef CONFIG_X86_64
7270         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7271         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7272         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7273         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7274         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7275         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7276         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7277         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7278 #endif
7279
7280         kvm_rip_write(vcpu, regs->rip);
7281         kvm_set_rflags(vcpu, regs->rflags);
7282
7283         vcpu->arch.exception.pending = false;
7284
7285         kvm_make_request(KVM_REQ_EVENT, vcpu);
7286
7287         return 0;
7288 }
7289
7290 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7291 {
7292         struct kvm_segment cs;
7293
7294         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7295         *db = cs.db;
7296         *l = cs.l;
7297 }
7298 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7299
7300 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7301                                   struct kvm_sregs *sregs)
7302 {
7303         struct desc_ptr dt;
7304
7305         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7306         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7307         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7308         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7309         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7310         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7311
7312         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7313         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7314
7315         kvm_x86_ops->get_idt(vcpu, &dt);
7316         sregs->idt.limit = dt.size;
7317         sregs->idt.base = dt.address;
7318         kvm_x86_ops->get_gdt(vcpu, &dt);
7319         sregs->gdt.limit = dt.size;
7320         sregs->gdt.base = dt.address;
7321
7322         sregs->cr0 = kvm_read_cr0(vcpu);
7323         sregs->cr2 = vcpu->arch.cr2;
7324         sregs->cr3 = kvm_read_cr3(vcpu);
7325         sregs->cr4 = kvm_read_cr4(vcpu);
7326         sregs->cr8 = kvm_get_cr8(vcpu);
7327         sregs->efer = vcpu->arch.efer;
7328         sregs->apic_base = kvm_get_apic_base(vcpu);
7329
7330         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7331
7332         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7333                 set_bit(vcpu->arch.interrupt.nr,
7334                         (unsigned long *)sregs->interrupt_bitmap);
7335
7336         return 0;
7337 }
7338
7339 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7340                                     struct kvm_mp_state *mp_state)
7341 {
7342         kvm_apic_accept_events(vcpu);
7343         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7344                                         vcpu->arch.pv.pv_unhalted)
7345                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7346         else
7347                 mp_state->mp_state = vcpu->arch.mp_state;
7348
7349         return 0;
7350 }
7351
7352 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7353                                     struct kvm_mp_state *mp_state)
7354 {
7355         if (!lapic_in_kernel(vcpu) &&
7356             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7357                 return -EINVAL;
7358
7359         /* INITs are latched while in SMM */
7360         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7361             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7362              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7363                 return -EINVAL;
7364
7365         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7366                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7367                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7368         } else
7369                 vcpu->arch.mp_state = mp_state->mp_state;
7370         kvm_make_request(KVM_REQ_EVENT, vcpu);
7371         return 0;
7372 }
7373
7374 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7375                     int reason, bool has_error_code, u32 error_code)
7376 {
7377         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7378         int ret;
7379
7380         init_emulate_ctxt(vcpu);
7381
7382         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7383                                    has_error_code, error_code);
7384
7385         if (ret)
7386                 return EMULATE_FAIL;
7387
7388         kvm_rip_write(vcpu, ctxt->eip);
7389         kvm_set_rflags(vcpu, ctxt->eflags);
7390         kvm_make_request(KVM_REQ_EVENT, vcpu);
7391         return EMULATE_DONE;
7392 }
7393 EXPORT_SYMBOL_GPL(kvm_task_switch);
7394
7395 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7396                                   struct kvm_sregs *sregs)
7397 {
7398         struct msr_data apic_base_msr;
7399         int mmu_reset_needed = 0;
7400         int pending_vec, max_bits, idx;
7401         struct desc_ptr dt;
7402
7403         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
7404                 return -EINVAL;
7405
7406         dt.size = sregs->idt.limit;
7407         dt.address = sregs->idt.base;
7408         kvm_x86_ops->set_idt(vcpu, &dt);
7409         dt.size = sregs->gdt.limit;
7410         dt.address = sregs->gdt.base;
7411         kvm_x86_ops->set_gdt(vcpu, &dt);
7412
7413         vcpu->arch.cr2 = sregs->cr2;
7414         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7415         vcpu->arch.cr3 = sregs->cr3;
7416         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7417
7418         kvm_set_cr8(vcpu, sregs->cr8);
7419
7420         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7421         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7422         apic_base_msr.data = sregs->apic_base;
7423         apic_base_msr.host_initiated = true;
7424         kvm_set_apic_base(vcpu, &apic_base_msr);
7425
7426         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7427         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7428         vcpu->arch.cr0 = sregs->cr0;
7429
7430         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7431         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7432         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7433                 kvm_update_cpuid(vcpu);
7434
7435         idx = srcu_read_lock(&vcpu->kvm->srcu);
7436         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7437                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7438                 mmu_reset_needed = 1;
7439         }
7440         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7441
7442         if (mmu_reset_needed)
7443                 kvm_mmu_reset_context(vcpu);
7444
7445         max_bits = KVM_NR_INTERRUPTS;
7446         pending_vec = find_first_bit(
7447                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7448         if (pending_vec < max_bits) {
7449                 kvm_queue_interrupt(vcpu, pending_vec, false);
7450                 pr_debug("Set back pending irq %d\n", pending_vec);
7451         }
7452
7453         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7454         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7455         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7456         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7457         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7458         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7459
7460         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7461         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7462
7463         update_cr8_intercept(vcpu);
7464
7465         /* Older userspace won't unhalt the vcpu on reset. */
7466         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7467             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7468             !is_protmode(vcpu))
7469                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7470
7471         kvm_make_request(KVM_REQ_EVENT, vcpu);
7472
7473         return 0;
7474 }
7475
7476 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7477                                         struct kvm_guest_debug *dbg)
7478 {
7479         unsigned long rflags;
7480         int i, r;
7481
7482         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7483                 r = -EBUSY;
7484                 if (vcpu->arch.exception.pending)
7485                         goto out;
7486                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7487                         kvm_queue_exception(vcpu, DB_VECTOR);
7488                 else
7489                         kvm_queue_exception(vcpu, BP_VECTOR);
7490         }
7491
7492         /*
7493          * Read rflags as long as potentially injected trace flags are still
7494          * filtered out.
7495          */
7496         rflags = kvm_get_rflags(vcpu);
7497
7498         vcpu->guest_debug = dbg->control;
7499         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7500                 vcpu->guest_debug = 0;
7501
7502         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7503                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7504                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7505                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7506         } else {
7507                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7508                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7509         }
7510         kvm_update_dr7(vcpu);
7511
7512         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7513                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7514                         get_segment_base(vcpu, VCPU_SREG_CS);
7515
7516         /*
7517          * Trigger an rflags update that will inject or remove the trace
7518          * flags.
7519          */
7520         kvm_set_rflags(vcpu, rflags);
7521
7522         kvm_x86_ops->update_bp_intercept(vcpu);
7523
7524         r = 0;
7525
7526 out:
7527
7528         return r;
7529 }
7530
7531 /*
7532  * Translate a guest virtual address to a guest physical address.
7533  */
7534 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7535                                     struct kvm_translation *tr)
7536 {
7537         unsigned long vaddr = tr->linear_address;
7538         gpa_t gpa;
7539         int idx;
7540
7541         idx = srcu_read_lock(&vcpu->kvm->srcu);
7542         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7543         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7544         tr->physical_address = gpa;
7545         tr->valid = gpa != UNMAPPED_GVA;
7546         tr->writeable = 1;
7547         tr->usermode = 0;
7548
7549         return 0;
7550 }
7551
7552 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7553 {
7554         struct fxregs_state *fxsave =
7555                         &vcpu->arch.guest_fpu.state.fxsave;
7556
7557         memcpy(fpu->fpr, fxsave->st_space, 128);
7558         fpu->fcw = fxsave->cwd;
7559         fpu->fsw = fxsave->swd;
7560         fpu->ftwx = fxsave->twd;
7561         fpu->last_opcode = fxsave->fop;
7562         fpu->last_ip = fxsave->rip;
7563         fpu->last_dp = fxsave->rdp;
7564         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7565
7566         return 0;
7567 }
7568
7569 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7570 {
7571         struct fxregs_state *fxsave =
7572                         &vcpu->arch.guest_fpu.state.fxsave;
7573
7574         memcpy(fxsave->st_space, fpu->fpr, 128);
7575         fxsave->cwd = fpu->fcw;
7576         fxsave->swd = fpu->fsw;
7577         fxsave->twd = fpu->ftwx;
7578         fxsave->fop = fpu->last_opcode;
7579         fxsave->rip = fpu->last_ip;
7580         fxsave->rdp = fpu->last_dp;
7581         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7582
7583         return 0;
7584 }
7585
7586 static void fx_init(struct kvm_vcpu *vcpu)
7587 {
7588         fpstate_init(&vcpu->arch.guest_fpu.state);
7589         if (boot_cpu_has(X86_FEATURE_XSAVES))
7590                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7591                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7592
7593         /*
7594          * Ensure guest xcr0 is valid for loading
7595          */
7596         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7597
7598         vcpu->arch.cr0 |= X86_CR0_ET;
7599 }
7600
7601 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7602 {
7603         if (vcpu->guest_fpu_loaded)
7604                 return;
7605
7606         /*
7607          * Restore all possible states in the guest,
7608          * and assume host would use all available bits.
7609          * Guest xcr0 would be loaded later.
7610          */
7611         vcpu->guest_fpu_loaded = 1;
7612         __kernel_fpu_begin();
7613         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7614         trace_kvm_fpu(1);
7615 }
7616
7617 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7618 {
7619         if (!vcpu->guest_fpu_loaded)
7620                 return;
7621
7622         vcpu->guest_fpu_loaded = 0;
7623         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7624         __kernel_fpu_end();
7625         ++vcpu->stat.fpu_reload;
7626         trace_kvm_fpu(0);
7627 }
7628
7629 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7630 {
7631         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7632
7633         kvmclock_reset(vcpu);
7634
7635         kvm_x86_ops->vcpu_free(vcpu);
7636         free_cpumask_var(wbinvd_dirty_mask);
7637 }
7638
7639 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7640                                                 unsigned int id)
7641 {
7642         struct kvm_vcpu *vcpu;
7643
7644         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7645                 printk_once(KERN_WARNING
7646                 "kvm: SMP vm created on host with unstable TSC; "
7647                 "guest TSC will not be reliable\n");
7648
7649         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7650
7651         return vcpu;
7652 }
7653
7654 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7655 {
7656         int r;
7657
7658         kvm_vcpu_mtrr_init(vcpu);
7659         r = vcpu_load(vcpu);
7660         if (r)
7661                 return r;
7662         kvm_vcpu_reset(vcpu, false);
7663         kvm_mmu_setup(vcpu);
7664         vcpu_put(vcpu);
7665         return r;
7666 }
7667
7668 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7669 {
7670         struct msr_data msr;
7671         struct kvm *kvm = vcpu->kvm;
7672
7673         if (vcpu_load(vcpu))
7674                 return;
7675         msr.data = 0x0;
7676         msr.index = MSR_IA32_TSC;
7677         msr.host_initiated = true;
7678         kvm_write_tsc(vcpu, &msr);
7679         vcpu_put(vcpu);
7680
7681         if (!kvmclock_periodic_sync)
7682                 return;
7683
7684         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7685                                         KVMCLOCK_SYNC_PERIOD);
7686 }
7687
7688 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7689 {
7690         int r;
7691         vcpu->arch.apf.msr_val = 0;
7692
7693         r = vcpu_load(vcpu);
7694         BUG_ON(r);
7695         kvm_mmu_unload(vcpu);
7696         vcpu_put(vcpu);
7697
7698         kvm_x86_ops->vcpu_free(vcpu);
7699 }
7700
7701 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7702 {
7703         vcpu->arch.hflags = 0;
7704
7705         vcpu->arch.smi_pending = 0;
7706         atomic_set(&vcpu->arch.nmi_queued, 0);
7707         vcpu->arch.nmi_pending = 0;
7708         vcpu->arch.nmi_injected = false;
7709         kvm_clear_interrupt_queue(vcpu);
7710         kvm_clear_exception_queue(vcpu);
7711
7712         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7713         kvm_update_dr0123(vcpu);
7714         vcpu->arch.dr6 = DR6_INIT;
7715         kvm_update_dr6(vcpu);
7716         vcpu->arch.dr7 = DR7_FIXED_1;
7717         kvm_update_dr7(vcpu);
7718
7719         vcpu->arch.cr2 = 0;
7720
7721         kvm_make_request(KVM_REQ_EVENT, vcpu);
7722         vcpu->arch.apf.msr_val = 0;
7723         vcpu->arch.st.msr_val = 0;
7724
7725         kvmclock_reset(vcpu);
7726
7727         kvm_clear_async_pf_completion_queue(vcpu);
7728         kvm_async_pf_hash_reset(vcpu);
7729         vcpu->arch.apf.halted = false;
7730
7731         if (!init_event) {
7732                 kvm_pmu_reset(vcpu);
7733                 vcpu->arch.smbase = 0x30000;
7734         }
7735
7736         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7737         vcpu->arch.regs_avail = ~0;
7738         vcpu->arch.regs_dirty = ~0;
7739
7740         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7741 }
7742
7743 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7744 {
7745         struct kvm_segment cs;
7746
7747         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7748         cs.selector = vector << 8;
7749         cs.base = vector << 12;
7750         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7751         kvm_rip_write(vcpu, 0);
7752 }
7753
7754 int kvm_arch_hardware_enable(void)
7755 {
7756         struct kvm *kvm;
7757         struct kvm_vcpu *vcpu;
7758         int i;
7759         int ret;
7760         u64 local_tsc;
7761         u64 max_tsc = 0;
7762         bool stable, backwards_tsc = false;
7763
7764         kvm_shared_msr_cpu_online();
7765         ret = kvm_x86_ops->hardware_enable();
7766         if (ret != 0)
7767                 return ret;
7768
7769         local_tsc = rdtsc();
7770         stable = !check_tsc_unstable();
7771         list_for_each_entry(kvm, &vm_list, vm_list) {
7772                 kvm_for_each_vcpu(i, vcpu, kvm) {
7773                         if (!stable && vcpu->cpu == smp_processor_id())
7774                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7775                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7776                                 backwards_tsc = true;
7777                                 if (vcpu->arch.last_host_tsc > max_tsc)
7778                                         max_tsc = vcpu->arch.last_host_tsc;
7779                         }
7780                 }
7781         }
7782
7783         /*
7784          * Sometimes, even reliable TSCs go backwards.  This happens on
7785          * platforms that reset TSC during suspend or hibernate actions, but
7786          * maintain synchronization.  We must compensate.  Fortunately, we can
7787          * detect that condition here, which happens early in CPU bringup,
7788          * before any KVM threads can be running.  Unfortunately, we can't
7789          * bring the TSCs fully up to date with real time, as we aren't yet far
7790          * enough into CPU bringup that we know how much real time has actually
7791          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7792          * variables that haven't been updated yet.
7793          *
7794          * So we simply find the maximum observed TSC above, then record the
7795          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7796          * the adjustment will be applied.  Note that we accumulate
7797          * adjustments, in case multiple suspend cycles happen before some VCPU
7798          * gets a chance to run again.  In the event that no KVM threads get a
7799          * chance to run, we will miss the entire elapsed period, as we'll have
7800          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7801          * loose cycle time.  This isn't too big a deal, since the loss will be
7802          * uniform across all VCPUs (not to mention the scenario is extremely
7803          * unlikely). It is possible that a second hibernate recovery happens
7804          * much faster than a first, causing the observed TSC here to be
7805          * smaller; this would require additional padding adjustment, which is
7806          * why we set last_host_tsc to the local tsc observed here.
7807          *
7808          * N.B. - this code below runs only on platforms with reliable TSC,
7809          * as that is the only way backwards_tsc is set above.  Also note
7810          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7811          * have the same delta_cyc adjustment applied if backwards_tsc
7812          * is detected.  Note further, this adjustment is only done once,
7813          * as we reset last_host_tsc on all VCPUs to stop this from being
7814          * called multiple times (one for each physical CPU bringup).
7815          *
7816          * Platforms with unreliable TSCs don't have to deal with this, they
7817          * will be compensated by the logic in vcpu_load, which sets the TSC to
7818          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7819          * guarantee that they stay in perfect synchronization.
7820          */
7821         if (backwards_tsc) {
7822                 u64 delta_cyc = max_tsc - local_tsc;
7823                 backwards_tsc_observed = true;
7824                 list_for_each_entry(kvm, &vm_list, vm_list) {
7825                         kvm_for_each_vcpu(i, vcpu, kvm) {
7826                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7827                                 vcpu->arch.last_host_tsc = local_tsc;
7828                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7829                         }
7830
7831                         /*
7832                          * We have to disable TSC offset matching.. if you were
7833                          * booting a VM while issuing an S4 host suspend....
7834                          * you may have some problem.  Solving this issue is
7835                          * left as an exercise to the reader.
7836                          */
7837                         kvm->arch.last_tsc_nsec = 0;
7838                         kvm->arch.last_tsc_write = 0;
7839                 }
7840
7841         }
7842         return 0;
7843 }
7844
7845 void kvm_arch_hardware_disable(void)
7846 {
7847         kvm_x86_ops->hardware_disable();
7848         drop_user_return_notifiers();
7849 }
7850
7851 int kvm_arch_hardware_setup(void)
7852 {
7853         int r;
7854
7855         r = kvm_x86_ops->hardware_setup();
7856         if (r != 0)
7857                 return r;
7858
7859         if (kvm_has_tsc_control) {
7860                 /*
7861                  * Make sure the user can only configure tsc_khz values that
7862                  * fit into a signed integer.
7863                  * A min value is not calculated needed because it will always
7864                  * be 1 on all machines.
7865                  */
7866                 u64 max = min(0x7fffffffULL,
7867                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7868                 kvm_max_guest_tsc_khz = max;
7869
7870                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7871         }
7872
7873         kvm_init_msr_list();
7874         return 0;
7875 }
7876
7877 void kvm_arch_hardware_unsetup(void)
7878 {
7879         kvm_x86_ops->hardware_unsetup();
7880 }
7881
7882 void kvm_arch_check_processor_compat(void *rtn)
7883 {
7884         kvm_x86_ops->check_processor_compatibility(rtn);
7885 }
7886
7887 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7888 {
7889         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7890 }
7891 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7892
7893 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7894 {
7895         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7896 }
7897
7898 struct static_key kvm_no_apic_vcpu __read_mostly;
7899 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7900
7901 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7902 {
7903         struct page *page;
7904         struct kvm *kvm;
7905         int r;
7906
7907         BUG_ON(vcpu->kvm == NULL);
7908         kvm = vcpu->kvm;
7909
7910         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7911         vcpu->arch.pv.pv_unhalted = false;
7912         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7913         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7914                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7915         else
7916                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7917
7918         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7919         if (!page) {
7920                 r = -ENOMEM;
7921                 goto fail;
7922         }
7923         vcpu->arch.pio_data = page_address(page);
7924
7925         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7926
7927         r = kvm_mmu_create(vcpu);
7928         if (r < 0)
7929                 goto fail_free_pio_data;
7930
7931         if (irqchip_in_kernel(kvm)) {
7932                 r = kvm_create_lapic(vcpu);
7933                 if (r < 0)
7934                         goto fail_mmu_destroy;
7935         } else
7936                 static_key_slow_inc(&kvm_no_apic_vcpu);
7937
7938         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7939                                        GFP_KERNEL);
7940         if (!vcpu->arch.mce_banks) {
7941                 r = -ENOMEM;
7942                 goto fail_free_lapic;
7943         }
7944         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7945
7946         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7947                 r = -ENOMEM;
7948                 goto fail_free_mce_banks;
7949         }
7950
7951         fx_init(vcpu);
7952
7953         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7954         vcpu->arch.pv_time_enabled = false;
7955
7956         vcpu->arch.guest_supported_xcr0 = 0;
7957         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7958
7959         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7960
7961         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7962
7963         kvm_async_pf_hash_reset(vcpu);
7964         kvm_pmu_init(vcpu);
7965
7966         vcpu->arch.pending_external_vector = -1;
7967
7968         kvm_hv_vcpu_init(vcpu);
7969
7970         return 0;
7971
7972 fail_free_mce_banks:
7973         kfree(vcpu->arch.mce_banks);
7974 fail_free_lapic:
7975         kvm_free_lapic(vcpu);
7976 fail_mmu_destroy:
7977         kvm_mmu_destroy(vcpu);
7978 fail_free_pio_data:
7979         free_page((unsigned long)vcpu->arch.pio_data);
7980 fail:
7981         return r;
7982 }
7983
7984 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7985 {
7986         int idx;
7987
7988         kvm_hv_vcpu_uninit(vcpu);
7989         kvm_pmu_destroy(vcpu);
7990         kfree(vcpu->arch.mce_banks);
7991         kvm_free_lapic(vcpu);
7992         idx = srcu_read_lock(&vcpu->kvm->srcu);
7993         kvm_mmu_destroy(vcpu);
7994         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7995         free_page((unsigned long)vcpu->arch.pio_data);
7996         if (!lapic_in_kernel(vcpu))
7997                 static_key_slow_dec(&kvm_no_apic_vcpu);
7998 }
7999
8000 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8001 {
8002         kvm_x86_ops->sched_in(vcpu, cpu);
8003 }
8004
8005 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8006 {
8007         if (type)
8008                 return -EINVAL;
8009
8010         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8011         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8012         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8013         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8014         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8015
8016         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8017         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8018         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8019         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8020                 &kvm->arch.irq_sources_bitmap);
8021
8022         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8023         mutex_init(&kvm->arch.apic_map_lock);
8024         mutex_init(&kvm->arch.hyperv.hv_lock);
8025         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8026
8027         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8028         pvclock_update_vm_gtod_copy(kvm);
8029
8030         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8031         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8032
8033         kvm_page_track_init(kvm);
8034         kvm_mmu_init_vm(kvm);
8035
8036         if (kvm_x86_ops->vm_init)
8037                 return kvm_x86_ops->vm_init(kvm);
8038
8039         return 0;
8040 }
8041
8042 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8043 {
8044         int r;
8045         r = vcpu_load(vcpu);
8046         BUG_ON(r);
8047         kvm_mmu_unload(vcpu);
8048         vcpu_put(vcpu);
8049 }
8050
8051 static void kvm_free_vcpus(struct kvm *kvm)
8052 {
8053         unsigned int i;
8054         struct kvm_vcpu *vcpu;
8055
8056         /*
8057          * Unpin any mmu pages first.
8058          */
8059         kvm_for_each_vcpu(i, vcpu, kvm) {
8060                 kvm_clear_async_pf_completion_queue(vcpu);
8061                 kvm_unload_vcpu_mmu(vcpu);
8062         }
8063         kvm_for_each_vcpu(i, vcpu, kvm)
8064                 kvm_arch_vcpu_free(vcpu);
8065
8066         mutex_lock(&kvm->lock);
8067         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8068                 kvm->vcpus[i] = NULL;
8069
8070         atomic_set(&kvm->online_vcpus, 0);
8071         mutex_unlock(&kvm->lock);
8072 }
8073
8074 void kvm_arch_sync_events(struct kvm *kvm)
8075 {
8076         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8077         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8078         kvm_free_pit(kvm);
8079 }
8080
8081 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8082 {
8083         int i, r;
8084         unsigned long hva;
8085         struct kvm_memslots *slots = kvm_memslots(kvm);
8086         struct kvm_memory_slot *slot, old;
8087
8088         /* Called with kvm->slots_lock held.  */
8089         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8090                 return -EINVAL;
8091
8092         slot = id_to_memslot(slots, id);
8093         if (size) {
8094                 if (slot->npages)
8095                         return -EEXIST;
8096
8097                 /*
8098                  * MAP_SHARED to prevent internal slot pages from being moved
8099                  * by fork()/COW.
8100                  */
8101                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8102                               MAP_SHARED | MAP_ANONYMOUS, 0);
8103                 if (IS_ERR((void *)hva))
8104                         return PTR_ERR((void *)hva);
8105         } else {
8106                 if (!slot->npages)
8107                         return 0;
8108
8109                 hva = 0;
8110         }
8111
8112         old = *slot;
8113         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8114                 struct kvm_userspace_memory_region m;
8115
8116                 m.slot = id | (i << 16);
8117                 m.flags = 0;
8118                 m.guest_phys_addr = gpa;
8119                 m.userspace_addr = hva;
8120                 m.memory_size = size;
8121                 r = __kvm_set_memory_region(kvm, &m);
8122                 if (r < 0)
8123                         return r;
8124         }
8125
8126         if (!size) {
8127                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8128                 WARN_ON(r < 0);
8129         }
8130
8131         return 0;
8132 }
8133 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8134
8135 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8136 {
8137         int r;
8138
8139         mutex_lock(&kvm->slots_lock);
8140         r = __x86_set_memory_region(kvm, id, gpa, size);
8141         mutex_unlock(&kvm->slots_lock);
8142
8143         return r;
8144 }
8145 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8146
8147 void kvm_arch_destroy_vm(struct kvm *kvm)
8148 {
8149         if (current->mm == kvm->mm) {
8150                 /*
8151                  * Free memory regions allocated on behalf of userspace,
8152                  * unless the the memory map has changed due to process exit
8153                  * or fd copying.
8154                  */
8155                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8156                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8157                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8158         }
8159         if (kvm_x86_ops->vm_destroy)
8160                 kvm_x86_ops->vm_destroy(kvm);
8161         kvm_pic_destroy(kvm);
8162         kvm_ioapic_destroy(kvm);
8163         kvm_free_vcpus(kvm);
8164         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8165         kvm_mmu_uninit_vm(kvm);
8166         kvm_page_track_cleanup(kvm);
8167 }
8168
8169 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8170                            struct kvm_memory_slot *dont)
8171 {
8172         int i;
8173
8174         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8175                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8176                         kvfree(free->arch.rmap[i]);
8177                         free->arch.rmap[i] = NULL;
8178                 }
8179                 if (i == 0)
8180                         continue;
8181
8182                 if (!dont || free->arch.lpage_info[i - 1] !=
8183                              dont->arch.lpage_info[i - 1]) {
8184                         kvfree(free->arch.lpage_info[i - 1]);
8185                         free->arch.lpage_info[i - 1] = NULL;
8186                 }
8187         }
8188
8189         kvm_page_track_free_memslot(free, dont);
8190 }
8191
8192 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8193                             unsigned long npages)
8194 {
8195         int i;
8196
8197         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8198                 struct kvm_lpage_info *linfo;
8199                 unsigned long ugfn;
8200                 int lpages;
8201                 int level = i + 1;
8202
8203                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8204                                       slot->base_gfn, level) + 1;
8205
8206                 slot->arch.rmap[i] =
8207                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
8208                 if (!slot->arch.rmap[i])
8209                         goto out_free;
8210                 if (i == 0)
8211                         continue;
8212
8213                 linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
8214                 if (!linfo)
8215                         goto out_free;
8216
8217                 slot->arch.lpage_info[i - 1] = linfo;
8218
8219                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8220                         linfo[0].disallow_lpage = 1;
8221                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8222                         linfo[lpages - 1].disallow_lpage = 1;
8223                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8224                 /*
8225                  * If the gfn and userspace address are not aligned wrt each
8226                  * other, or if explicitly asked to, disable large page
8227                  * support for this slot
8228                  */
8229                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8230                     !kvm_largepages_enabled()) {
8231                         unsigned long j;
8232
8233                         for (j = 0; j < lpages; ++j)
8234                                 linfo[j].disallow_lpage = 1;
8235                 }
8236         }
8237
8238         if (kvm_page_track_create_memslot(slot, npages))
8239                 goto out_free;
8240
8241         return 0;
8242
8243 out_free:
8244         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8245                 kvfree(slot->arch.rmap[i]);
8246                 slot->arch.rmap[i] = NULL;
8247                 if (i == 0)
8248                         continue;
8249
8250                 kvfree(slot->arch.lpage_info[i - 1]);
8251                 slot->arch.lpage_info[i - 1] = NULL;
8252         }
8253         return -ENOMEM;
8254 }
8255
8256 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8257 {
8258         /*
8259          * memslots->generation has been incremented.
8260          * mmio generation may have reached its maximum value.
8261          */
8262         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8263 }
8264
8265 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8266                                 struct kvm_memory_slot *memslot,
8267                                 const struct kvm_userspace_memory_region *mem,
8268                                 enum kvm_mr_change change)
8269 {
8270         return 0;
8271 }
8272
8273 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8274                                      struct kvm_memory_slot *new)
8275 {
8276         /* Still write protect RO slot */
8277         if (new->flags & KVM_MEM_READONLY) {
8278                 kvm_mmu_slot_remove_write_access(kvm, new);
8279                 return;
8280         }
8281
8282         /*
8283          * Call kvm_x86_ops dirty logging hooks when they are valid.
8284          *
8285          * kvm_x86_ops->slot_disable_log_dirty is called when:
8286          *
8287          *  - KVM_MR_CREATE with dirty logging is disabled
8288          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8289          *
8290          * The reason is, in case of PML, we need to set D-bit for any slots
8291          * with dirty logging disabled in order to eliminate unnecessary GPA
8292          * logging in PML buffer (and potential PML buffer full VMEXT). This
8293          * guarantees leaving PML enabled during guest's lifetime won't have
8294          * any additonal overhead from PML when guest is running with dirty
8295          * logging disabled for memory slots.
8296          *
8297          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8298          * to dirty logging mode.
8299          *
8300          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8301          *
8302          * In case of write protect:
8303          *
8304          * Write protect all pages for dirty logging.
8305          *
8306          * All the sptes including the large sptes which point to this
8307          * slot are set to readonly. We can not create any new large
8308          * spte on this slot until the end of the logging.
8309          *
8310          * See the comments in fast_page_fault().
8311          */
8312         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8313                 if (kvm_x86_ops->slot_enable_log_dirty)
8314                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8315                 else
8316                         kvm_mmu_slot_remove_write_access(kvm, new);
8317         } else {
8318                 if (kvm_x86_ops->slot_disable_log_dirty)
8319                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8320         }
8321 }
8322
8323 void kvm_arch_commit_memory_region(struct kvm *kvm,
8324                                 const struct kvm_userspace_memory_region *mem,
8325                                 const struct kvm_memory_slot *old,
8326                                 const struct kvm_memory_slot *new,
8327                                 enum kvm_mr_change change)
8328 {
8329         int nr_mmu_pages = 0;
8330
8331         if (!kvm->arch.n_requested_mmu_pages)
8332                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8333
8334         if (nr_mmu_pages)
8335                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8336
8337         /*
8338          * Dirty logging tracks sptes in 4k granularity, meaning that large
8339          * sptes have to be split.  If live migration is successful, the guest
8340          * in the source machine will be destroyed and large sptes will be
8341          * created in the destination. However, if the guest continues to run
8342          * in the source machine (for example if live migration fails), small
8343          * sptes will remain around and cause bad performance.
8344          *
8345          * Scan sptes if dirty logging has been stopped, dropping those
8346          * which can be collapsed into a single large-page spte.  Later
8347          * page faults will create the large-page sptes.
8348          */
8349         if ((change != KVM_MR_DELETE) &&
8350                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8351                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8352                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8353
8354         /*
8355          * Set up write protection and/or dirty logging for the new slot.
8356          *
8357          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8358          * been zapped so no dirty logging staff is needed for old slot. For
8359          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8360          * new and it's also covered when dealing with the new slot.
8361          *
8362          * FIXME: const-ify all uses of struct kvm_memory_slot.
8363          */
8364         if (change != KVM_MR_DELETE)
8365                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8366 }
8367
8368 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8369 {
8370         kvm_mmu_invalidate_zap_all_pages(kvm);
8371 }
8372
8373 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8374                                    struct kvm_memory_slot *slot)
8375 {
8376         kvm_page_track_flush_slot(kvm, slot);
8377 }
8378
8379 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8380 {
8381         if (!list_empty_careful(&vcpu->async_pf.done))
8382                 return true;
8383
8384         if (kvm_apic_has_events(vcpu))
8385                 return true;
8386
8387         if (vcpu->arch.pv.pv_unhalted)
8388                 return true;
8389
8390         if (atomic_read(&vcpu->arch.nmi_queued))
8391                 return true;
8392
8393         if (test_bit(KVM_REQ_SMI, &vcpu->requests))
8394                 return true;
8395
8396         if (kvm_arch_interrupt_allowed(vcpu) &&
8397             kvm_cpu_has_interrupt(vcpu))
8398                 return true;
8399
8400         if (kvm_hv_has_stimer_pending(vcpu))
8401                 return true;
8402
8403         return false;
8404 }
8405
8406 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8407 {
8408         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8409 }
8410
8411 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8412 {
8413         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8414 }
8415
8416 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8417 {
8418         return kvm_x86_ops->interrupt_allowed(vcpu);
8419 }
8420
8421 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8422 {
8423         if (is_64_bit_mode(vcpu))
8424                 return kvm_rip_read(vcpu);
8425         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8426                      kvm_rip_read(vcpu));
8427 }
8428 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8429
8430 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8431 {
8432         return kvm_get_linear_rip(vcpu) == linear_rip;
8433 }
8434 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8435
8436 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8437 {
8438         unsigned long rflags;
8439
8440         rflags = kvm_x86_ops->get_rflags(vcpu);
8441         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8442                 rflags &= ~X86_EFLAGS_TF;
8443         return rflags;
8444 }
8445 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8446
8447 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8448 {
8449         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8450             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8451                 rflags |= X86_EFLAGS_TF;
8452         kvm_x86_ops->set_rflags(vcpu, rflags);
8453 }
8454
8455 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8456 {
8457         __kvm_set_rflags(vcpu, rflags);
8458         kvm_make_request(KVM_REQ_EVENT, vcpu);
8459 }
8460 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8461
8462 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8463 {
8464         int r;
8465
8466         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8467               work->wakeup_all)
8468                 return;
8469
8470         r = kvm_mmu_reload(vcpu);
8471         if (unlikely(r))
8472                 return;
8473
8474         if (!vcpu->arch.mmu.direct_map &&
8475               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8476                 return;
8477
8478         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8479 }
8480
8481 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8482 {
8483         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8484 }
8485
8486 static inline u32 kvm_async_pf_next_probe(u32 key)
8487 {
8488         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8489 }
8490
8491 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8492 {
8493         u32 key = kvm_async_pf_hash_fn(gfn);
8494
8495         while (vcpu->arch.apf.gfns[key] != ~0)
8496                 key = kvm_async_pf_next_probe(key);
8497
8498         vcpu->arch.apf.gfns[key] = gfn;
8499 }
8500
8501 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8502 {
8503         int i;
8504         u32 key = kvm_async_pf_hash_fn(gfn);
8505
8506         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8507                      (vcpu->arch.apf.gfns[key] != gfn &&
8508                       vcpu->arch.apf.gfns[key] != ~0); i++)
8509                 key = kvm_async_pf_next_probe(key);
8510
8511         return key;
8512 }
8513
8514 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8515 {
8516         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8517 }
8518
8519 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8520 {
8521         u32 i, j, k;
8522
8523         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8524         while (true) {
8525                 vcpu->arch.apf.gfns[i] = ~0;
8526                 do {
8527                         j = kvm_async_pf_next_probe(j);
8528                         if (vcpu->arch.apf.gfns[j] == ~0)
8529                                 return;
8530                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8531                         /*
8532                          * k lies cyclically in ]i,j]
8533                          * |    i.k.j |
8534                          * |....j i.k.| or  |.k..j i...|
8535                          */
8536                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8537                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8538                 i = j;
8539         }
8540 }
8541
8542 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8543 {
8544         return kvm_vcpu_write_guest_cached(vcpu, &vcpu->arch.apf.data, &val,
8545                                            sizeof(val));
8546 }
8547
8548 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8549                                      struct kvm_async_pf *work)
8550 {
8551         struct x86_exception fault;
8552
8553         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8554         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8555
8556         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8557             (vcpu->arch.apf.send_user_only &&
8558              kvm_x86_ops->get_cpl(vcpu) == 0))
8559                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8560         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8561                 fault.vector = PF_VECTOR;
8562                 fault.error_code_valid = true;
8563                 fault.error_code = 0;
8564                 fault.nested_page_fault = false;
8565                 fault.address = work->arch.token;
8566                 kvm_inject_page_fault(vcpu, &fault);
8567         }
8568 }
8569
8570 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8571                                  struct kvm_async_pf *work)
8572 {
8573         struct x86_exception fault;
8574
8575         if (work->wakeup_all)
8576                 work->arch.token = ~0; /* broadcast wakeup */
8577         else
8578                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8579         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8580
8581         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8582             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8583                 fault.vector = PF_VECTOR;
8584                 fault.error_code_valid = true;
8585                 fault.error_code = 0;
8586                 fault.nested_page_fault = false;
8587                 fault.address = work->arch.token;
8588                 kvm_inject_page_fault(vcpu, &fault);
8589         }
8590         vcpu->arch.apf.halted = false;
8591         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8592 }
8593
8594 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8595 {
8596         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8597                 return true;
8598         else
8599                 return !kvm_event_needs_reinjection(vcpu) &&
8600                         kvm_x86_ops->interrupt_allowed(vcpu);
8601 }
8602
8603 void kvm_arch_start_assignment(struct kvm *kvm)
8604 {
8605         atomic_inc(&kvm->arch.assigned_device_count);
8606 }
8607 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8608
8609 void kvm_arch_end_assignment(struct kvm *kvm)
8610 {
8611         atomic_dec(&kvm->arch.assigned_device_count);
8612 }
8613 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8614
8615 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8616 {
8617         return atomic_read(&kvm->arch.assigned_device_count);
8618 }
8619 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8620
8621 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8622 {
8623         atomic_inc(&kvm->arch.noncoherent_dma_count);
8624 }
8625 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8626
8627 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8628 {
8629         atomic_dec(&kvm->arch.noncoherent_dma_count);
8630 }
8631 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8632
8633 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8634 {
8635         return atomic_read(&kvm->arch.noncoherent_dma_count);
8636 }
8637 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8638
8639 bool kvm_arch_has_irq_bypass(void)
8640 {
8641         return kvm_x86_ops->update_pi_irte != NULL;
8642 }
8643
8644 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8645                                       struct irq_bypass_producer *prod)
8646 {
8647         struct kvm_kernel_irqfd *irqfd =
8648                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8649
8650         irqfd->producer = prod;
8651
8652         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8653                                            prod->irq, irqfd->gsi, 1);
8654 }
8655
8656 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8657                                       struct irq_bypass_producer *prod)
8658 {
8659         int ret;
8660         struct kvm_kernel_irqfd *irqfd =
8661                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8662
8663         WARN_ON(irqfd->producer != prod);
8664         irqfd->producer = NULL;
8665
8666         /*
8667          * When producer of consumer is unregistered, we change back to
8668          * remapped mode, so we can re-use the current implementation
8669          * when the irq is masked/disabled or the consumer side (KVM
8670          * int this case doesn't want to receive the interrupts.
8671         */
8672         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8673         if (ret)
8674                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8675                        " fails: %d\n", irqfd->consumer.token, ret);
8676 }
8677
8678 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8679                                    uint32_t guest_irq, bool set)
8680 {
8681         if (!kvm_x86_ops->update_pi_irte)
8682                 return -EINVAL;
8683
8684         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8685 }
8686
8687 bool kvm_vector_hashing_enabled(void)
8688 {
8689         return vector_hashing;
8690 }
8691 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8692
8693 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8694 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8695 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8696 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8697 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8698 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8699 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8700 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8701 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8702 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8703 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8704 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8705 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8706 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8707 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8708 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8709 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8710 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8711 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);