arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/api.h>
  72 #include <asm/fpu/xcr.h>
  73 #include <asm/fpu/xstate.h>
  74 #include <asm/pvclock.h>
  75 #include <asm/div64.h>
  76 #include <asm/irq_remapping.h>
  77 #include <asm/mshyperv.h>
  78 #include <asm/hypervisor.h>
  79 #include <asm/tlbflush.h>
  80 #include <asm/intel_pt.h>
  81 #include <asm/emulate_prefix.h>
  82 #include <asm/sgx.h>
  83 #include <clocksource/hyperv_timer.h>
  84
  85 #define CREATE_TRACE_POINTS
  86 #include "trace.h"
  87
  88 #define MAX_IO_MSRS 256
  89 #define KVM_MAX_MCE_BANKS 32
  90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  92
  93 #define emul_to_vcpu(ctxt) \
  94         ((struct kvm_vcpu *)(ctxt)->vcpu)
  95
  96 /* EFER defaults:
  97  * - enable syscall per default because its emulated by KVM
  98  * - enable LME and LMA per default on 64 bit KVM
  99  */
 100 #ifdef CONFIG_X86_64
 101 static
 102 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 103 #else
 104 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 105 #endif
 106
 107 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 108
 109 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 110
 111 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 112                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 113
 114 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 115 static void process_nmi(struct kvm_vcpu *vcpu);
 116 static void process_smi(struct kvm_vcpu *vcpu);
 117 static void enter_smm(struct kvm_vcpu *vcpu);
 118 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 119 static void store_regs(struct kvm_vcpu *vcpu);
 120 static int sync_regs(struct kvm_vcpu *vcpu);
 121 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
 122
 123 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 124 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 125
 126 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 127 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 128
 129 #define KVM_X86_OP(func)                                             \
 130         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 131                                 *(((struct kvm_x86_ops *)0)->func));
 132 #define KVM_X86_OP_NULL KVM_X86_OP
 133 #include <asm/kvm-x86-ops.h>
 134 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 135 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 136 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 137
 138 static bool __read_mostly ignore_msrs = 0;
 139 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 140
 141 bool __read_mostly report_ignored_msrs = true;
 142 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 143 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 144
 145 unsigned int min_timer_period_us = 200;
 146 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 147
 148 static bool __read_mostly kvmclock_periodic_sync = true;
 149 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 150
 151 bool __read_mostly kvm_has_tsc_control;
 152 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 153 u32  __read_mostly kvm_max_guest_tsc_khz;
 154 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 155 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 156 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 157 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 158 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 159 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 160 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 161 bool __read_mostly kvm_has_bus_lock_exit;
 162 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 163
 164 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 165 static u32 __read_mostly tsc_tolerance_ppm = 250;
 166 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 167
 168 /*
 169  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 170  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 171  * advancement entirely.  Any other value is used as-is and disables adaptive
 172  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 173  */
 174 static int __read_mostly lapic_timer_advance_ns = -1;
 175 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 176
 177 static bool __read_mostly vector_hashing = true;
 178 module_param(vector_hashing, bool, S_IRUGO);
 179
 180 bool __read_mostly enable_vmware_backdoor = false;
 181 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 182 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 183
 184 static bool __read_mostly force_emulation_prefix = false;
 185 module_param(force_emulation_prefix, bool, S_IRUGO);
 186
 187 int __read_mostly pi_inject_timer = -1;
 188 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 189
 190 /*
 191  * Restoring the host value for MSRs that are only consumed when running in
 192  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 193  * returns to userspace, i.e. the kernel can run with the guest's value.
 194  */
 195 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 196
 197 struct kvm_user_return_msrs {
 198         struct user_return_notifier urn;
 199         bool registered;
 200         struct kvm_user_return_msr_values {
 201                 u64 host;
 202                 u64 curr;
 203         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 204 };
 205
 206 u32 __read_mostly kvm_nr_uret_msrs;
 207 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 208 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 209 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 210
 211 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 212                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 213                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 214                                 | XFEATURE_MASK_PKRU)
 215
 216 u64 __read_mostly host_efer;
 217 EXPORT_SYMBOL_GPL(host_efer);
 218
 219 bool __read_mostly allow_smaller_maxphyaddr = 0;
 220 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 221
 222 bool __read_mostly enable_apicv = true;
 223 EXPORT_SYMBOL_GPL(enable_apicv);
 224
 225 u64 __read_mostly host_xss;
 226 EXPORT_SYMBOL_GPL(host_xss);
 227 u64 __read_mostly supported_xss;
 228 EXPORT_SYMBOL_GPL(supported_xss);
 229
 230 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 231         KVM_GENERIC_VM_STATS(),
 232         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 233         STATS_DESC_COUNTER(VM, mmu_pte_write),
 234         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 235         STATS_DESC_COUNTER(VM, mmu_flooded),
 236         STATS_DESC_COUNTER(VM, mmu_recycled),
 237         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 238         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 239         STATS_DESC_ICOUNTER(VM, pages_4k),
 240         STATS_DESC_ICOUNTER(VM, pages_2m),
 241         STATS_DESC_ICOUNTER(VM, pages_1g),
 242         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 243         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 244         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 245 };
 246
 247 const struct kvm_stats_header kvm_vm_stats_header = {
 248         .name_size = KVM_STATS_NAME_SIZE,
 249         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 250         .id_offset = sizeof(struct kvm_stats_header),
 251         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 252         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 253                        sizeof(kvm_vm_stats_desc),
 254 };
 255
 256 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 257         KVM_GENERIC_VCPU_STATS(),
 258         STATS_DESC_COUNTER(VCPU, pf_fixed),
 259         STATS_DESC_COUNTER(VCPU, pf_guest),
 260         STATS_DESC_COUNTER(VCPU, tlb_flush),
 261         STATS_DESC_COUNTER(VCPU, invlpg),
 262         STATS_DESC_COUNTER(VCPU, exits),
 263         STATS_DESC_COUNTER(VCPU, io_exits),
 264         STATS_DESC_COUNTER(VCPU, mmio_exits),
 265         STATS_DESC_COUNTER(VCPU, signal_exits),
 266         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 267         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 268         STATS_DESC_COUNTER(VCPU, l1d_flush),
 269         STATS_DESC_COUNTER(VCPU, halt_exits),
 270         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 271         STATS_DESC_COUNTER(VCPU, irq_exits),
 272         STATS_DESC_COUNTER(VCPU, host_state_reload),
 273         STATS_DESC_COUNTER(VCPU, fpu_reload),
 274         STATS_DESC_COUNTER(VCPU, insn_emulation),
 275         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 276         STATS_DESC_COUNTER(VCPU, hypercalls),
 277         STATS_DESC_COUNTER(VCPU, irq_injections),
 278         STATS_DESC_COUNTER(VCPU, nmi_injections),
 279         STATS_DESC_COUNTER(VCPU, req_event),
 280         STATS_DESC_COUNTER(VCPU, nested_run),
 281         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 282         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 283         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 284 };
 285
 286 const struct kvm_stats_header kvm_vcpu_stats_header = {
 287         .name_size = KVM_STATS_NAME_SIZE,
 288         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 289         .id_offset = sizeof(struct kvm_stats_header),
 290         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 291         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 292                        sizeof(kvm_vcpu_stats_desc),
 293 };
 294
 295 u64 __read_mostly host_xcr0;
 296 u64 __read_mostly supported_xcr0;
 297 EXPORT_SYMBOL_GPL(supported_xcr0);
 298
 299 static struct kmem_cache *x86_emulator_cache;
 300
 301 /*
 302  * When called, it means the previous get/set msr reached an invalid msr.
 303  * Return true if we want to ignore/silent this failed msr access.
 304  */
 305 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 306 {
 307         const char *op = write ? "wrmsr" : "rdmsr";
 308
 309         if (ignore_msrs) {
 310                 if (report_ignored_msrs)
 311                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 312                                       op, msr, data);
 313                 /* Mask the error */
 314                 return true;
 315         } else {
 316                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 317                                       op, msr, data);
 318                 return false;
 319         }
 320 }
 321
 322 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 323 {
 324         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 325         unsigned int size = sizeof(struct x86_emulate_ctxt);
 326
 327         return kmem_cache_create_usercopy("x86_emulator", size,
 328                                           __alignof__(struct x86_emulate_ctxt),
 329                                           SLAB_ACCOUNT, useroffset,
 330                                           size - useroffset, NULL);
 331 }
 332
 333 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 334
 335 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 336 {
 337         int i;
 338         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 339                 vcpu->arch.apf.gfns[i] = ~0;
 340 }
 341
 342 static void kvm_on_user_return(struct user_return_notifier *urn)
 343 {
 344         unsigned slot;
 345         struct kvm_user_return_msrs *msrs
 346                 = container_of(urn, struct kvm_user_return_msrs, urn);
 347         struct kvm_user_return_msr_values *values;
 348         unsigned long flags;
 349
 350         /*
 351          * Disabling irqs at this point since the following code could be
 352          * interrupted and executed through kvm_arch_hardware_disable()
 353          */
 354         local_irq_save(flags);
 355         if (msrs->registered) {
 356                 msrs->registered = false;
 357                 user_return_notifier_unregister(urn);
 358         }
 359         local_irq_restore(flags);
 360         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 361                 values = &msrs->values[slot];
 362                 if (values->host != values->curr) {
 363                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 364                         values->curr = values->host;
 365                 }
 366         }
 367 }
 368
 369 static int kvm_probe_user_return_msr(u32 msr)
 370 {
 371         u64 val;
 372         int ret;
 373
 374         preempt_disable();
 375         ret = rdmsrl_safe(msr, &val);
 376         if (ret)
 377                 goto out;
 378         ret = wrmsrl_safe(msr, val);
 379 out:
 380         preempt_enable();
 381         return ret;
 382 }
 383
 384 int kvm_add_user_return_msr(u32 msr)
 385 {
 386         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 387
 388         if (kvm_probe_user_return_msr(msr))
 389                 return -1;
 390
 391         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 392         return kvm_nr_uret_msrs++;
 393 }
 394 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 395
 396 int kvm_find_user_return_msr(u32 msr)
 397 {
 398         int i;
 399
 400         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 401                 if (kvm_uret_msrs_list[i] == msr)
 402                         return i;
 403         }
 404         return -1;
 405 }
 406 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 407
 408 static void kvm_user_return_msr_cpu_online(void)
 409 {
 410         unsigned int cpu = smp_processor_id();
 411         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 412         u64 value;
 413         int i;
 414
 415         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 416                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 417                 msrs->values[i].host = value;
 418                 msrs->values[i].curr = value;
 419         }
 420 }
 421
 422 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 423 {
 424         unsigned int cpu = smp_processor_id();
 425         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 426         int err;
 427
 428         value = (value & mask) | (msrs->values[slot].host & ~mask);
 429         if (value == msrs->values[slot].curr)
 430                 return 0;
 431         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 432         if (err)
 433                 return 1;
 434
 435         msrs->values[slot].curr = value;
 436         if (!msrs->registered) {
 437                 msrs->urn.on_user_return = kvm_on_user_return;
 438                 user_return_notifier_register(&msrs->urn);
 439                 msrs->registered = true;
 440         }
 441         return 0;
 442 }
 443 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 444
 445 static void drop_user_return_notifiers(void)
 446 {
 447         unsigned int cpu = smp_processor_id();
 448         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 449
 450         if (msrs->registered)
 451                 kvm_on_user_return(&msrs->urn);
 452 }
 453
 454 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 455 {
 456         return vcpu->arch.apic_base;
 457 }
 458 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 459
 460 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 461 {
 462         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 463 }
 464 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 465
 466 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 467 {
 468         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 469         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 470         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 471                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 472
 473         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 474                 return 1;
 475         if (!msr_info->host_initiated) {
 476                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 477                         return 1;
 478                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 479                         return 1;
 480         }
 481
 482         kvm_lapic_set_base(vcpu, msr_info->data);
 483         kvm_recalculate_apic_map(vcpu->kvm);
 484         return 0;
 485 }
 486 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 487
 488 /*
 489  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 490  *
 491  * Hardware virtualization extension instructions may fault if a reboot turns
 492  * off virtualization while processes are running.  Usually after catching the
 493  * fault we just panic; during reboot instead the instruction is ignored.
 494  */
 495 noinstr void kvm_spurious_fault(void)
 496 {
 497         /* Fault while not rebooting.  We want the trace. */
 498         BUG_ON(!kvm_rebooting);
 499 }
 500 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 501
 502 #define EXCPT_BENIGN            0
 503 #define EXCPT_CONTRIBUTORY      1
 504 #define EXCPT_PF                2
 505
 506 static int exception_class(int vector)
 507 {
 508         switch (vector) {
 509         case PF_VECTOR:
 510                 return EXCPT_PF;
 511         case DE_VECTOR:
 512         case TS_VECTOR:
 513         case NP_VECTOR:
 514         case SS_VECTOR:
 515         case GP_VECTOR:
 516                 return EXCPT_CONTRIBUTORY;
 517         default:
 518                 break;
 519         }
 520         return EXCPT_BENIGN;
 521 }
 522
 523 #define EXCPT_FAULT             0
 524 #define EXCPT_TRAP              1
 525 #define EXCPT_ABORT             2
 526 #define EXCPT_INTERRUPT         3
 527
 528 static int exception_type(int vector)
 529 {
 530         unsigned int mask;
 531
 532         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 533                 return EXCPT_INTERRUPT;
 534
 535         mask = 1 << vector;
 536
 537         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 538         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 539                 return EXCPT_TRAP;
 540
 541         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 542                 return EXCPT_ABORT;
 543
 544         /* Reserved exceptions will result in fault */
 545         return EXCPT_FAULT;
 546 }
 547
 548 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 549 {
 550         unsigned nr = vcpu->arch.exception.nr;
 551         bool has_payload = vcpu->arch.exception.has_payload;
 552         unsigned long payload = vcpu->arch.exception.payload;
 553
 554         if (!has_payload)
 555                 return;
 556
 557         switch (nr) {
 558         case DB_VECTOR:
 559                 /*
 560                  * "Certain debug exceptions may clear bit 0-3.  The
 561                  * remaining contents of the DR6 register are never
 562                  * cleared by the processor".
 563                  */
 564                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 565                 /*
 566                  * In order to reflect the #DB exception payload in guest
 567                  * dr6, three components need to be considered: active low
 568                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 569                  * DR6_BS and DR6_BT)
 570                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 571                  * In the target guest dr6:
 572                  * FIXED_1 bits should always be set.
 573                  * Active low bits should be cleared if 1-setting in payload.
 574                  * Active high bits should be set if 1-setting in payload.
 575                  *
 576                  * Note, the payload is compatible with the pending debug
 577                  * exceptions/exit qualification under VMX, that active_low bits
 578                  * are active high in payload.
 579                  * So they need to be flipped for DR6.
 580                  */
 581                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 582                 vcpu->arch.dr6 |= payload;
 583                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 584
 585                 /*
 586                  * The #DB payload is defined as compatible with the 'pending
 587                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 588                  * defined in the 'pending debug exceptions' field (enabled
 589                  * breakpoint), it is reserved and must be zero in DR6.
 590                  */
 591                 vcpu->arch.dr6 &= ~BIT(12);
 592                 break;
 593         case PF_VECTOR:
 594                 vcpu->arch.cr2 = payload;
 595                 break;
 596         }
 597
 598         vcpu->arch.exception.has_payload = false;
 599         vcpu->arch.exception.payload = 0;
 600 }
 601 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 602
 603 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 604                 unsigned nr, bool has_error, u32 error_code,
 605                 bool has_payload, unsigned long payload, bool reinject)
 606 {
 607         u32 prev_nr;
 608         int class1, class2;
 609
 610         kvm_make_request(KVM_REQ_EVENT, vcpu);
 611
 612         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 613         queue:
 614                 if (reinject) {
 615                         /*
 616                          * On vmentry, vcpu->arch.exception.pending is only
 617                          * true if an event injection was blocked by
 618                          * nested_run_pending.  In that case, however,
 619                          * vcpu_enter_guest requests an immediate exit,
 620                          * and the guest shouldn't proceed far enough to
 621                          * need reinjection.
 622                          */
 623                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 624                         vcpu->arch.exception.injected = true;
 625                         if (WARN_ON_ONCE(has_payload)) {
 626                                 /*
 627                                  * A reinjected event has already
 628                                  * delivered its payload.
 629                                  */
 630                                 has_payload = false;
 631                                 payload = 0;
 632                         }
 633                 } else {
 634                         vcpu->arch.exception.pending = true;
 635                         vcpu->arch.exception.injected = false;
 636                 }
 637                 vcpu->arch.exception.has_error_code = has_error;
 638                 vcpu->arch.exception.nr = nr;
 639                 vcpu->arch.exception.error_code = error_code;
 640                 vcpu->arch.exception.has_payload = has_payload;
 641                 vcpu->arch.exception.payload = payload;
 642                 if (!is_guest_mode(vcpu))
 643                         kvm_deliver_exception_payload(vcpu);
 644                 return;
 645         }
 646
 647         /* to check exception */
 648         prev_nr = vcpu->arch.exception.nr;
 649         if (prev_nr == DF_VECTOR) {
 650                 /* triple fault -> shutdown */
 651                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 652                 return;
 653         }
 654         class1 = exception_class(prev_nr);
 655         class2 = exception_class(nr);
 656         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 657                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 658                 /*
 659                  * Generate double fault per SDM Table 5-5.  Set
 660                  * exception.pending = true so that the double fault
 661                  * can trigger a nested vmexit.
 662                  */
 663                 vcpu->arch.exception.pending = true;
 664                 vcpu->arch.exception.injected = false;
 665                 vcpu->arch.exception.has_error_code = true;
 666                 vcpu->arch.exception.nr = DF_VECTOR;
 667                 vcpu->arch.exception.error_code = 0;
 668                 vcpu->arch.exception.has_payload = false;
 669                 vcpu->arch.exception.payload = 0;
 670         } else
 671                 /* replace previous exception with a new one in a hope
 672                    that instruction re-execution will regenerate lost
 673                    exception */
 674                 goto queue;
 675 }
 676
 677 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 678 {
 679         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 680 }
 681 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 682
 683 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 684 {
 685         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 686 }
 687 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 688
 689 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 690                            unsigned long payload)
 691 {
 692         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 693 }
 694 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 695
 696 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 697                                     u32 error_code, unsigned long payload)
 698 {
 699         kvm_multiple_exception(vcpu, nr, true, error_code,
 700                                true, payload, false);
 701 }
 702
 703 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 704 {
 705         if (err)
 706                 kvm_inject_gp(vcpu, 0);
 707         else
 708                 return kvm_skip_emulated_instruction(vcpu);
 709
 710         return 1;
 711 }
 712 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 713
 714 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
 715 {
 716         if (err) {
 717                 kvm_inject_gp(vcpu, 0);
 718                 return 1;
 719         }
 720
 721         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
 722                                        EMULTYPE_COMPLETE_USER_EXIT);
 723 }
 724
 725 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 726 {
 727         ++vcpu->stat.pf_guest;
 728         vcpu->arch.exception.nested_apf =
 729                 is_guest_mode(vcpu) && fault->async_page_fault;
 730         if (vcpu->arch.exception.nested_apf) {
 731                 vcpu->arch.apf.nested_apf_token = fault->address;
 732                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 733         } else {
 734                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 735                                         fault->address);
 736         }
 737 }
 738 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 739
 740 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 741                                     struct x86_exception *fault)
 742 {
 743         struct kvm_mmu *fault_mmu;
 744         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 745
 746         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 747                                                vcpu->arch.walk_mmu;
 748
 749         /*
 750          * Invalidate the TLB entry for the faulting address, if it exists,
 751          * else the access will fault indefinitely (and to emulate hardware).
 752          */
 753         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 754             !(fault->error_code & PFERR_RSVD_MASK))
 755                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 756                                        fault_mmu->root_hpa);
 757
 758         fault_mmu->inject_page_fault(vcpu, fault);
 759         return fault->nested_page_fault;
 760 }
 761 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 762
 763 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 764 {
 765         atomic_inc(&vcpu->arch.nmi_queued);
 766         kvm_make_request(KVM_REQ_NMI, vcpu);
 767 }
 768 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 769
 770 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 771 {
 772         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 773 }
 774 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 775
 776 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 777 {
 778         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 781
 782 /*
 783  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 784  * a #GP and return false.
 785  */
 786 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 787 {
 788         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 789                 return true;
 790         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 791         return false;
 792 }
 793 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 794
 795 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 796 {
 797         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 798                 return true;
 799
 800         kvm_queue_exception(vcpu, UD_VECTOR);
 801         return false;
 802 }
 803 EXPORT_SYMBOL_GPL(kvm_require_dr);
 804
 805 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 806 {
 807         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 808 }
 809
 810 /*
 811  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 812  */
 813 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 814 {
 815         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
 816         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 817         gpa_t real_gpa;
 818         int i;
 819         int ret;
 820         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 821
 822         /*
 823          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 824          * to an L1 GPA.
 825          */
 826         real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
 827                                      PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 828         if (real_gpa == UNMAPPED_GVA)
 829                 return 0;
 830
 831         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 832         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 833                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 834         if (ret < 0)
 835                 return 0;
 836
 837         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 838                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 839                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 840                         return 0;
 841                 }
 842         }
 843
 844         /*
 845          * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
 846          * Shadow page roots need to be reconstructed instead.
 847          */
 848         if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
 849                 kvm_mmu_free_roots(vcpu, mmu, KVM_MMU_ROOT_CURRENT);
 850
 851         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 852         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 853         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 854         vcpu->arch.pdptrs_from_userspace = false;
 855
 856         return 1;
 857 }
 858 EXPORT_SYMBOL_GPL(load_pdptrs);
 859
 860 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 861 {
 862         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 863                 kvm_clear_async_pf_completion_queue(vcpu);
 864                 kvm_async_pf_hash_reset(vcpu);
 865         }
 866
 867         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 868                 kvm_mmu_reset_context(vcpu);
 869
 870         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 871             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 872             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 873                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 874 }
 875 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 876
 877 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 878 {
 879         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 880
 881         cr0 |= X86_CR0_ET;
 882
 883 #ifdef CONFIG_X86_64
 884         if (cr0 & 0xffffffff00000000UL)
 885                 return 1;
 886 #endif
 887
 888         cr0 &= ~CR0_RESERVED_BITS;
 889
 890         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 891                 return 1;
 892
 893         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 894                 return 1;
 895
 896 #ifdef CONFIG_X86_64
 897         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 898             (cr0 & X86_CR0_PG)) {
 899                 int cs_db, cs_l;
 900
 901                 if (!is_pae(vcpu))
 902                         return 1;
 903                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 904                 if (cs_l)
 905                         return 1;
 906         }
 907 #endif
 908         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 909             is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
 910             !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
 911                 return 1;
 912
 913         if (!(cr0 & X86_CR0_PG) &&
 914             (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
 915                 return 1;
 916
 917         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 918
 919         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 920
 921         return 0;
 922 }
 923 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 924
 925 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 926 {
 927         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 928 }
 929 EXPORT_SYMBOL_GPL(kvm_lmsw);
 930
 931 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 932 {
 933         if (vcpu->arch.guest_state_protected)
 934                 return;
 935
 936         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 937
 938                 if (vcpu->arch.xcr0 != host_xcr0)
 939                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 940
 941                 if (vcpu->arch.xsaves_enabled &&
 942                     vcpu->arch.ia32_xss != host_xss)
 943                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 944         }
 945
 946         if (static_cpu_has(X86_FEATURE_PKU) &&
 947             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 948              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 949             vcpu->arch.pkru != vcpu->arch.host_pkru)
 950                 write_pkru(vcpu->arch.pkru);
 951 }
 952 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 953
 954 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 955 {
 956         if (vcpu->arch.guest_state_protected)
 957                 return;
 958
 959         if (static_cpu_has(X86_FEATURE_PKU) &&
 960             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 961              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 962                 vcpu->arch.pkru = rdpkru();
 963                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 964                         write_pkru(vcpu->arch.host_pkru);
 965         }
 966
 967         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 968
 969                 if (vcpu->arch.xcr0 != host_xcr0)
 970                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 971
 972                 if (vcpu->arch.xsaves_enabled &&
 973                     vcpu->arch.ia32_xss != host_xss)
 974                         wrmsrl(MSR_IA32_XSS, host_xss);
 975         }
 976
 977 }
 978 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 979
 980 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 981 {
 982         u64 xcr0 = xcr;
 983         u64 old_xcr0 = vcpu->arch.xcr0;
 984         u64 valid_bits;
 985
 986         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 987         if (index != XCR_XFEATURE_ENABLED_MASK)
 988                 return 1;
 989         if (!(xcr0 & XFEATURE_MASK_FP))
 990                 return 1;
 991         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 992                 return 1;
 993
 994         /*
 995          * Do not allow the guest to set bits that we do not support
 996          * saving.  However, xcr0 bit 0 is always set, even if the
 997          * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
 998          */
 999         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
1000         if (xcr0 & ~valid_bits)
1001                 return 1;
1002
1003         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1004             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1005                 return 1;
1006
1007         if (xcr0 & XFEATURE_MASK_AVX512) {
1008                 if (!(xcr0 & XFEATURE_MASK_YMM))
1009                         return 1;
1010                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1011                         return 1;
1012         }
1013         vcpu->arch.xcr0 = xcr0;
1014
1015         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1016                 kvm_update_cpuid_runtime(vcpu);
1017         return 0;
1018 }
1019
1020 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1021 {
1022         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1023             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1024                 kvm_inject_gp(vcpu, 0);
1025                 return 1;
1026         }
1027
1028         return kvm_skip_emulated_instruction(vcpu);
1029 }
1030 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1031
1032 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1033 {
1034         if (cr4 & cr4_reserved_bits)
1035                 return false;
1036
1037         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1038                 return false;
1039
1040         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1041 }
1042 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1043
1044 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1045 {
1046         /*
1047          * If any role bit is changed, the MMU needs to be reset.
1048          *
1049          * If CR4.PCIDE is changed 1 -> 0, the guest TLB must be flushed.
1050          * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1051          * according to the SDM; however, stale prev_roots could be reused
1052          * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1053          * free them all.  KVM_REQ_MMU_RELOAD is fit for the both cases; it
1054          * is slow, but changing CR4.PCIDE is a rare case.
1055          *
1056          * If CR4.PGE is changed, the guest TLB must be flushed.
1057          *
1058          * Note: resetting MMU is a superset of KVM_REQ_MMU_RELOAD and
1059          * KVM_REQ_MMU_RELOAD is a superset of KVM_REQ_TLB_FLUSH_GUEST, hence
1060          * the usage of "else if".
1061          */
1062         if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1063                 kvm_mmu_reset_context(vcpu);
1064         else if ((cr4 ^ old_cr4) & X86_CR4_PCIDE)
1065                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
1066         else if ((cr4 ^ old_cr4) & X86_CR4_PGE)
1067                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1068 }
1069 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1070
1071 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1072 {
1073         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1074
1075         if (!kvm_is_valid_cr4(vcpu, cr4))
1076                 return 1;
1077
1078         if (is_long_mode(vcpu)) {
1079                 if (!(cr4 & X86_CR4_PAE))
1080                         return 1;
1081                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1082                         return 1;
1083         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1084                    && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1085                    && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1086                 return 1;
1087
1088         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1089                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1090                         return 1;
1091
1092                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1093                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1094                         return 1;
1095         }
1096
1097         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1098
1099         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1100
1101         return 0;
1102 }
1103 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1104
1105 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1106 {
1107         struct kvm_mmu *mmu = vcpu->arch.mmu;
1108         unsigned long roots_to_free = 0;
1109         int i;
1110
1111         /*
1112          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1113          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1114          * also via the emulator.  KVM's TDP page tables are not in the scope of
1115          * the invalidation, but the guest's TLB entries need to be flushed as
1116          * the CPU may have cached entries in its TLB for the target PCID.
1117          */
1118         if (unlikely(tdp_enabled)) {
1119                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1120                 return;
1121         }
1122
1123         /*
1124          * If neither the current CR3 nor any of the prev_roots use the given
1125          * PCID, then nothing needs to be done here because a resync will
1126          * happen anyway before switching to any other CR3.
1127          */
1128         if (kvm_get_active_pcid(vcpu) == pcid) {
1129                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1130                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1131         }
1132
1133         /*
1134          * If PCID is disabled, there is no need to free prev_roots even if the
1135          * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1136          * with PCIDE=0.
1137          */
1138         if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1139                 return;
1140
1141         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1142                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1143                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1144
1145         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1146 }
1147
1148 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1149 {
1150         bool skip_tlb_flush = false;
1151         unsigned long pcid = 0;
1152 #ifdef CONFIG_X86_64
1153         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1154
1155         if (pcid_enabled) {
1156                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1157                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1158                 pcid = cr3 & X86_CR3_PCID_MASK;
1159         }
1160 #endif
1161
1162         /* PDPTRs are always reloaded for PAE paging. */
1163         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1164                 goto handle_tlb_flush;
1165
1166         /*
1167          * Do not condition the GPA check on long mode, this helper is used to
1168          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1169          * the current vCPU mode is accurate.
1170          */
1171         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1172                 return 1;
1173
1174         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1175                 return 1;
1176
1177         if (cr3 != kvm_read_cr3(vcpu))
1178                 kvm_mmu_new_pgd(vcpu, cr3);
1179
1180         vcpu->arch.cr3 = cr3;
1181         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1182         /* Do not call post_set_cr3, we do not get here for confidential guests.  */
1183
1184 handle_tlb_flush:
1185         /*
1186          * A load of CR3 that flushes the TLB flushes only the current PCID,
1187          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1188          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1189          * and it's impossible to use a non-zero PCID when PCID is disabled,
1190          * i.e. only PCID=0 can be relevant.
1191          */
1192         if (!skip_tlb_flush)
1193                 kvm_invalidate_pcid(vcpu, pcid);
1194
1195         return 0;
1196 }
1197 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1198
1199 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1200 {
1201         if (cr8 & CR8_RESERVED_BITS)
1202                 return 1;
1203         if (lapic_in_kernel(vcpu))
1204                 kvm_lapic_set_tpr(vcpu, cr8);
1205         else
1206                 vcpu->arch.cr8 = cr8;
1207         return 0;
1208 }
1209 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1210
1211 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1212 {
1213         if (lapic_in_kernel(vcpu))
1214                 return kvm_lapic_get_cr8(vcpu);
1215         else
1216                 return vcpu->arch.cr8;
1217 }
1218 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1219
1220 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1221 {
1222         int i;
1223
1224         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1225                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1226                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1227         }
1228 }
1229
1230 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1231 {
1232         unsigned long dr7;
1233
1234         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1235                 dr7 = vcpu->arch.guest_debug_dr7;
1236         else
1237                 dr7 = vcpu->arch.dr7;
1238         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1239         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1240         if (dr7 & DR7_BP_EN_MASK)
1241                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1242 }
1243 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1244
1245 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1246 {
1247         u64 fixed = DR6_FIXED_1;
1248
1249         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1250                 fixed |= DR6_RTM;
1251
1252         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1253                 fixed |= DR6_BUS_LOCK;
1254         return fixed;
1255 }
1256
1257 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1258 {
1259         size_t size = ARRAY_SIZE(vcpu->arch.db);
1260
1261         switch (dr) {
1262         case 0 ... 3:
1263                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1264                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1265                         vcpu->arch.eff_db[dr] = val;
1266                 break;
1267         case 4:
1268         case 6:
1269                 if (!kvm_dr6_valid(val))
1270                         return 1; /* #GP */
1271                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1272                 break;
1273         case 5:
1274         default: /* 7 */
1275                 if (!kvm_dr7_valid(val))
1276                         return 1; /* #GP */
1277                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1278                 kvm_update_dr7(vcpu);
1279                 break;
1280         }
1281
1282         return 0;
1283 }
1284 EXPORT_SYMBOL_GPL(kvm_set_dr);
1285
1286 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1287 {
1288         size_t size = ARRAY_SIZE(vcpu->arch.db);
1289
1290         switch (dr) {
1291         case 0 ... 3:
1292                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1293                 break;
1294         case 4:
1295         case 6:
1296                 *val = vcpu->arch.dr6;
1297                 break;
1298         case 5:
1299         default: /* 7 */
1300                 *val = vcpu->arch.dr7;
1301                 break;
1302         }
1303 }
1304 EXPORT_SYMBOL_GPL(kvm_get_dr);
1305
1306 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1307 {
1308         u32 ecx = kvm_rcx_read(vcpu);
1309         u64 data;
1310
1311         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1312                 kvm_inject_gp(vcpu, 0);
1313                 return 1;
1314         }
1315
1316         kvm_rax_write(vcpu, (u32)data);
1317         kvm_rdx_write(vcpu, data >> 32);
1318         return kvm_skip_emulated_instruction(vcpu);
1319 }
1320 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1321
1322 /*
1323  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1324  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1325  *
1326  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1327  * extract the supported MSRs from the related const lists.
1328  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1329  * capabilities of the host cpu. This capabilities test skips MSRs that are
1330  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1331  * may depend on host virtualization features rather than host cpu features.
1332  */
1333
1334 static const u32 msrs_to_save_all[] = {
1335         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1336         MSR_STAR,
1337 #ifdef CONFIG_X86_64
1338         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1339 #endif
1340         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1341         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1342         MSR_IA32_SPEC_CTRL,
1343         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1344         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1345         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1346         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1347         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1348         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1349         MSR_IA32_UMWAIT_CONTROL,
1350
1351         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1352         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1353         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1354         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1355         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1356         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1357         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1358         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1359         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1360         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1361         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1362         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1363         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1364         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1365         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1366         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1367         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1368         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1369         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1370         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1371         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1372         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1373
1374         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1375         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1376         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1377         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1378         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1379         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1380 };
1381
1382 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1383 static unsigned num_msrs_to_save;
1384
1385 static const u32 emulated_msrs_all[] = {
1386         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1387         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1388         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1389         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1390         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1391         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1392         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1393         HV_X64_MSR_RESET,
1394         HV_X64_MSR_VP_INDEX,
1395         HV_X64_MSR_VP_RUNTIME,
1396         HV_X64_MSR_SCONTROL,
1397         HV_X64_MSR_STIMER0_CONFIG,
1398         HV_X64_MSR_VP_ASSIST_PAGE,
1399         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1400         HV_X64_MSR_TSC_EMULATION_STATUS,
1401         HV_X64_MSR_SYNDBG_OPTIONS,
1402         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1403         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1404         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1405
1406         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1407         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1408
1409         MSR_IA32_TSC_ADJUST,
1410         MSR_IA32_TSC_DEADLINE,
1411         MSR_IA32_ARCH_CAPABILITIES,
1412         MSR_IA32_PERF_CAPABILITIES,
1413         MSR_IA32_MISC_ENABLE,
1414         MSR_IA32_MCG_STATUS,
1415         MSR_IA32_MCG_CTL,
1416         MSR_IA32_MCG_EXT_CTL,
1417         MSR_IA32_SMBASE,
1418         MSR_SMI_COUNT,
1419         MSR_PLATFORM_INFO,
1420         MSR_MISC_FEATURES_ENABLES,
1421         MSR_AMD64_VIRT_SPEC_CTRL,
1422         MSR_AMD64_TSC_RATIO,
1423         MSR_IA32_POWER_CTL,
1424         MSR_IA32_UCODE_REV,
1425
1426         /*
1427          * The following list leaves out MSRs whose values are determined
1428          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1429          * We always support the "true" VMX control MSRs, even if the host
1430          * processor does not, so I am putting these registers here rather
1431          * than in msrs_to_save_all.
1432          */
1433         MSR_IA32_VMX_BASIC,
1434         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1435         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1436         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1437         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1438         MSR_IA32_VMX_MISC,
1439         MSR_IA32_VMX_CR0_FIXED0,
1440         MSR_IA32_VMX_CR4_FIXED0,
1441         MSR_IA32_VMX_VMCS_ENUM,
1442         MSR_IA32_VMX_PROCBASED_CTLS2,
1443         MSR_IA32_VMX_EPT_VPID_CAP,
1444         MSR_IA32_VMX_VMFUNC,
1445
1446         MSR_K7_HWCR,
1447         MSR_KVM_POLL_CONTROL,
1448 };
1449
1450 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1451 static unsigned num_emulated_msrs;
1452
1453 /*
1454  * List of msr numbers which are used to expose MSR-based features that
1455  * can be used by a hypervisor to validate requested CPU features.
1456  */
1457 static const u32 msr_based_features_all[] = {
1458         MSR_IA32_VMX_BASIC,
1459         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1460         MSR_IA32_VMX_PINBASED_CTLS,
1461         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1462         MSR_IA32_VMX_PROCBASED_CTLS,
1463         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1464         MSR_IA32_VMX_EXIT_CTLS,
1465         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1466         MSR_IA32_VMX_ENTRY_CTLS,
1467         MSR_IA32_VMX_MISC,
1468         MSR_IA32_VMX_CR0_FIXED0,
1469         MSR_IA32_VMX_CR0_FIXED1,
1470         MSR_IA32_VMX_CR4_FIXED0,
1471         MSR_IA32_VMX_CR4_FIXED1,
1472         MSR_IA32_VMX_VMCS_ENUM,
1473         MSR_IA32_VMX_PROCBASED_CTLS2,
1474         MSR_IA32_VMX_EPT_VPID_CAP,
1475         MSR_IA32_VMX_VMFUNC,
1476
1477         MSR_F10H_DECFG,
1478         MSR_IA32_UCODE_REV,
1479         MSR_IA32_ARCH_CAPABILITIES,
1480         MSR_IA32_PERF_CAPABILITIES,
1481 };
1482
1483 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1484 static unsigned int num_msr_based_features;
1485
1486 static u64 kvm_get_arch_capabilities(void)
1487 {
1488         u64 data = 0;
1489
1490         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1491                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1492
1493         /*
1494          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1495          * the nested hypervisor runs with NX huge pages.  If it is not,
1496          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1497          * L1 guests, so it need not worry about its own (L2) guests.
1498          */
1499         data |= ARCH_CAP_PSCHANGE_MC_NO;
1500
1501         /*
1502          * If we're doing cache flushes (either "always" or "cond")
1503          * we will do one whenever the guest does a vmlaunch/vmresume.
1504          * If an outer hypervisor is doing the cache flush for us
1505          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1506          * capability to the guest too, and if EPT is disabled we're not
1507          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1508          * require a nested hypervisor to do a flush of its own.
1509          */
1510         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1511                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1512
1513         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1514                 data |= ARCH_CAP_RDCL_NO;
1515         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1516                 data |= ARCH_CAP_SSB_NO;
1517         if (!boot_cpu_has_bug(X86_BUG_MDS))
1518                 data |= ARCH_CAP_MDS_NO;
1519
1520         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1521                 /*
1522                  * If RTM=0 because the kernel has disabled TSX, the host might
1523                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1524                  * and therefore knows that there cannot be TAA) but keep
1525                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1526                  * and we want to allow migrating those guests to tsx=off hosts.
1527                  */
1528                 data &= ~ARCH_CAP_TAA_NO;
1529         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1530                 data |= ARCH_CAP_TAA_NO;
1531         } else {
1532                 /*
1533                  * Nothing to do here; we emulate TSX_CTRL if present on the
1534                  * host so the guest can choose between disabling TSX or
1535                  * using VERW to clear CPU buffers.
1536                  */
1537         }
1538
1539         return data;
1540 }
1541
1542 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1543 {
1544         switch (msr->index) {
1545         case MSR_IA32_ARCH_CAPABILITIES:
1546                 msr->data = kvm_get_arch_capabilities();
1547                 break;
1548         case MSR_IA32_UCODE_REV:
1549                 rdmsrl_safe(msr->index, &msr->data);
1550                 break;
1551         default:
1552                 return static_call(kvm_x86_get_msr_feature)(msr);
1553         }
1554         return 0;
1555 }
1556
1557 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1558 {
1559         struct kvm_msr_entry msr;
1560         int r;
1561
1562         msr.index = index;
1563         r = kvm_get_msr_feature(&msr);
1564
1565         if (r == KVM_MSR_RET_INVALID) {
1566                 /* Unconditionally clear the output for simplicity */
1567                 *data = 0;
1568                 if (kvm_msr_ignored_check(index, 0, false))
1569                         r = 0;
1570         }
1571
1572         if (r)
1573                 return r;
1574
1575         *data = msr.data;
1576
1577         return 0;
1578 }
1579
1580 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1581 {
1582         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1583                 return false;
1584
1585         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1586                 return false;
1587
1588         if (efer & (EFER_LME | EFER_LMA) &&
1589             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1590                 return false;
1591
1592         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1593                 return false;
1594
1595         return true;
1596
1597 }
1598 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1599 {
1600         if (efer & efer_reserved_bits)
1601                 return false;
1602
1603         return __kvm_valid_efer(vcpu, efer);
1604 }
1605 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1606
1607 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1608 {
1609         u64 old_efer = vcpu->arch.efer;
1610         u64 efer = msr_info->data;
1611         int r;
1612
1613         if (efer & efer_reserved_bits)
1614                 return 1;
1615
1616         if (!msr_info->host_initiated) {
1617                 if (!__kvm_valid_efer(vcpu, efer))
1618                         return 1;
1619
1620                 if (is_paging(vcpu) &&
1621                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1622                         return 1;
1623         }
1624
1625         efer &= ~EFER_LMA;
1626         efer |= vcpu->arch.efer & EFER_LMA;
1627
1628         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1629         if (r) {
1630                 WARN_ON(r > 0);
1631                 return r;
1632         }
1633
1634         /* Update reserved bits */
1635         if ((efer ^ old_efer) & EFER_NX)
1636                 kvm_mmu_reset_context(vcpu);
1637
1638         return 0;
1639 }
1640
1641 void kvm_enable_efer_bits(u64 mask)
1642 {
1643        efer_reserved_bits &= ~mask;
1644 }
1645 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1646
1647 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1648 {
1649         struct kvm_x86_msr_filter *msr_filter;
1650         struct msr_bitmap_range *ranges;
1651         struct kvm *kvm = vcpu->kvm;
1652         bool allowed;
1653         int idx;
1654         u32 i;
1655
1656         /* x2APIC MSRs do not support filtering. */
1657         if (index >= 0x800 && index <= 0x8ff)
1658                 return true;
1659
1660         idx = srcu_read_lock(&kvm->srcu);
1661
1662         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1663         if (!msr_filter) {
1664                 allowed = true;
1665                 goto out;
1666         }
1667
1668         allowed = msr_filter->default_allow;
1669         ranges = msr_filter->ranges;
1670
1671         for (i = 0; i < msr_filter->count; i++) {
1672                 u32 start = ranges[i].base;
1673                 u32 end = start + ranges[i].nmsrs;
1674                 u32 flags = ranges[i].flags;
1675                 unsigned long *bitmap = ranges[i].bitmap;
1676
1677                 if ((index >= start) && (index < end) && (flags & type)) {
1678                         allowed = !!test_bit(index - start, bitmap);
1679                         break;
1680                 }
1681         }
1682
1683 out:
1684         srcu_read_unlock(&kvm->srcu, idx);
1685
1686         return allowed;
1687 }
1688 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1689
1690 /*
1691  * Write @data into the MSR specified by @index.  Select MSR specific fault
1692  * checks are bypassed if @host_initiated is %true.
1693  * Returns 0 on success, non-0 otherwise.
1694  * Assumes vcpu_load() was already called.
1695  */
1696 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1697                          bool host_initiated)
1698 {
1699         struct msr_data msr;
1700
1701         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1702                 return KVM_MSR_RET_FILTERED;
1703
1704         switch (index) {
1705         case MSR_FS_BASE:
1706         case MSR_GS_BASE:
1707         case MSR_KERNEL_GS_BASE:
1708         case MSR_CSTAR:
1709         case MSR_LSTAR:
1710                 if (is_noncanonical_address(data, vcpu))
1711                         return 1;
1712                 break;
1713         case MSR_IA32_SYSENTER_EIP:
1714         case MSR_IA32_SYSENTER_ESP:
1715                 /*
1716                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1717                  * non-canonical address is written on Intel but not on
1718                  * AMD (which ignores the top 32-bits, because it does
1719                  * not implement 64-bit SYSENTER).
1720                  *
1721                  * 64-bit code should hence be able to write a non-canonical
1722                  * value on AMD.  Making the address canonical ensures that
1723                  * vmentry does not fail on Intel after writing a non-canonical
1724                  * value, and that something deterministic happens if the guest
1725                  * invokes 64-bit SYSENTER.
1726                  */
1727                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1728                 break;
1729         case MSR_TSC_AUX:
1730                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1731                         return 1;
1732
1733                 if (!host_initiated &&
1734                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1735                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1736                         return 1;
1737
1738                 /*
1739                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1740                  * incomplete and conflicting architectural behavior.  Current
1741                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1742                  * reserved and always read as zeros.  Enforce Intel's reserved
1743                  * bits check if and only if the guest CPU is Intel, and clear
1744                  * the bits in all other cases.  This ensures cross-vendor
1745                  * migration will provide consistent behavior for the guest.
1746                  */
1747                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1748                         return 1;
1749
1750                 data = (u32)data;
1751                 break;
1752         }
1753
1754         msr.data = data;
1755         msr.index = index;
1756         msr.host_initiated = host_initiated;
1757
1758         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1759 }
1760
1761 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1762                                      u32 index, u64 data, bool host_initiated)
1763 {
1764         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1765
1766         if (ret == KVM_MSR_RET_INVALID)
1767                 if (kvm_msr_ignored_check(index, data, true))
1768                         ret = 0;
1769
1770         return ret;
1771 }
1772
1773 /*
1774  * Read the MSR specified by @index into @data.  Select MSR specific fault
1775  * checks are bypassed if @host_initiated is %true.
1776  * Returns 0 on success, non-0 otherwise.
1777  * Assumes vcpu_load() was already called.
1778  */
1779 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1780                   bool host_initiated)
1781 {
1782         struct msr_data msr;
1783         int ret;
1784
1785         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1786                 return KVM_MSR_RET_FILTERED;
1787
1788         switch (index) {
1789         case MSR_TSC_AUX:
1790                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1791                         return 1;
1792
1793                 if (!host_initiated &&
1794                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1795                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1796                         return 1;
1797                 break;
1798         }
1799
1800         msr.index = index;
1801         msr.host_initiated = host_initiated;
1802
1803         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1804         if (!ret)
1805                 *data = msr.data;
1806         return ret;
1807 }
1808
1809 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1810                                      u32 index, u64 *data, bool host_initiated)
1811 {
1812         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1813
1814         if (ret == KVM_MSR_RET_INVALID) {
1815                 /* Unconditionally clear *data for simplicity */
1816                 *data = 0;
1817                 if (kvm_msr_ignored_check(index, 0, false))
1818                         ret = 0;
1819         }
1820
1821         return ret;
1822 }
1823
1824 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1825 {
1826         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1827 }
1828 EXPORT_SYMBOL_GPL(kvm_get_msr);
1829
1830 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1831 {
1832         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1833 }
1834 EXPORT_SYMBOL_GPL(kvm_set_msr);
1835
1836 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1837 {
1838         if (!vcpu->run->msr.error) {
1839                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1840                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1841         }
1842 }
1843
1844 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1845 {
1846         return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1847 }
1848
1849 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1850 {
1851         complete_userspace_rdmsr(vcpu);
1852         return complete_emulated_msr_access(vcpu);
1853 }
1854
1855 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1856 {
1857         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1858 }
1859
1860 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1861 {
1862         complete_userspace_rdmsr(vcpu);
1863         return complete_fast_msr_access(vcpu);
1864 }
1865
1866 static u64 kvm_msr_reason(int r)
1867 {
1868         switch (r) {
1869         case KVM_MSR_RET_INVALID:
1870                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1871         case KVM_MSR_RET_FILTERED:
1872                 return KVM_MSR_EXIT_REASON_FILTER;
1873         default:
1874                 return KVM_MSR_EXIT_REASON_INVAL;
1875         }
1876 }
1877
1878 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1879                               u32 exit_reason, u64 data,
1880                               int (*completion)(struct kvm_vcpu *vcpu),
1881                               int r)
1882 {
1883         u64 msr_reason = kvm_msr_reason(r);
1884
1885         /* Check if the user wanted to know about this MSR fault */
1886         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1887                 return 0;
1888
1889         vcpu->run->exit_reason = exit_reason;
1890         vcpu->run->msr.error = 0;
1891         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1892         vcpu->run->msr.reason = msr_reason;
1893         vcpu->run->msr.index = index;
1894         vcpu->run->msr.data = data;
1895         vcpu->arch.complete_userspace_io = completion;
1896
1897         return 1;
1898 }
1899
1900 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1901 {
1902         u32 ecx = kvm_rcx_read(vcpu);
1903         u64 data;
1904         int r;
1905
1906         r = kvm_get_msr(vcpu, ecx, &data);
1907
1908         if (!r) {
1909                 trace_kvm_msr_read(ecx, data);
1910
1911                 kvm_rax_write(vcpu, data & -1u);
1912                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1913         } else {
1914                 /* MSR read failed? See if we should ask user space */
1915                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
1916                                        complete_fast_rdmsr, r))
1917                         return 0;
1918                 trace_kvm_msr_read_ex(ecx);
1919         }
1920
1921         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1922 }
1923 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1924
1925 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1926 {
1927         u32 ecx = kvm_rcx_read(vcpu);
1928         u64 data = kvm_read_edx_eax(vcpu);
1929         int r;
1930
1931         r = kvm_set_msr(vcpu, ecx, data);
1932
1933         if (!r) {
1934                 trace_kvm_msr_write(ecx, data);
1935         } else {
1936                 /* MSR write failed? See if we should ask user space */
1937                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
1938                                        complete_fast_msr_access, r))
1939                         return 0;
1940                 /* Signal all other negative errors to userspace */
1941                 if (r < 0)
1942                         return r;
1943                 trace_kvm_msr_write_ex(ecx, data);
1944         }
1945
1946         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1947 }
1948 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1949
1950 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1951 {
1952         return kvm_skip_emulated_instruction(vcpu);
1953 }
1954 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1955
1956 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1957 {
1958         /* Treat an INVD instruction as a NOP and just skip it. */
1959         return kvm_emulate_as_nop(vcpu);
1960 }
1961 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1962
1963 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1964 {
1965         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1966         return kvm_emulate_as_nop(vcpu);
1967 }
1968 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1969
1970 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1971 {
1972         kvm_queue_exception(vcpu, UD_VECTOR);
1973         return 1;
1974 }
1975 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1976
1977 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1978 {
1979         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1980         return kvm_emulate_as_nop(vcpu);
1981 }
1982 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1983
1984 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1985 {
1986         xfer_to_guest_mode_prepare();
1987         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1988                 xfer_to_guest_mode_work_pending();
1989 }
1990
1991 /*
1992  * The fast path for frequent and performance sensitive wrmsr emulation,
1993  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1994  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1995  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1996  * other cases which must be called after interrupts are enabled on the host.
1997  */
1998 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1999 {
2000         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2001                 return 1;
2002
2003         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2004                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2005                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2006                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
2007
2008                 data &= ~(1 << 12);
2009                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
2010                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
2011                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
2012                 trace_kvm_apic_write(APIC_ICR, (u32)data);
2013                 return 0;
2014         }
2015
2016         return 1;
2017 }
2018
2019 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2020 {
2021         if (!kvm_can_use_hv_timer(vcpu))
2022                 return 1;
2023
2024         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2025         return 0;
2026 }
2027
2028 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2029 {
2030         u32 msr = kvm_rcx_read(vcpu);
2031         u64 data;
2032         fastpath_t ret = EXIT_FASTPATH_NONE;
2033
2034         switch (msr) {
2035         case APIC_BASE_MSR + (APIC_ICR >> 4):
2036                 data = kvm_read_edx_eax(vcpu);
2037                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2038                         kvm_skip_emulated_instruction(vcpu);
2039                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2040                 }
2041                 break;
2042         case MSR_IA32_TSC_DEADLINE:
2043                 data = kvm_read_edx_eax(vcpu);
2044                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2045                         kvm_skip_emulated_instruction(vcpu);
2046                         ret = EXIT_FASTPATH_REENTER_GUEST;
2047                 }
2048                 break;
2049         default:
2050                 break;
2051         }
2052
2053         if (ret != EXIT_FASTPATH_NONE)
2054                 trace_kvm_msr_write(msr, data);
2055
2056         return ret;
2057 }
2058 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2059
2060 /*
2061  * Adapt set_msr() to msr_io()'s calling convention
2062  */
2063 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2064 {
2065         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2066 }
2067
2068 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2069 {
2070         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2071 }
2072
2073 #ifdef CONFIG_X86_64
2074 struct pvclock_clock {
2075         int vclock_mode;
2076         u64 cycle_last;
2077         u64 mask;
2078         u32 mult;
2079         u32 shift;
2080         u64 base_cycles;
2081         u64 offset;
2082 };
2083
2084 struct pvclock_gtod_data {
2085         seqcount_t      seq;
2086
2087         struct pvclock_clock clock; /* extract of a clocksource struct */
2088         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2089
2090         ktime_t         offs_boot;
2091         u64             wall_time_sec;
2092 };
2093
2094 static struct pvclock_gtod_data pvclock_gtod_data;
2095
2096 static void update_pvclock_gtod(struct timekeeper *tk)
2097 {
2098         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2099
2100         write_seqcount_begin(&vdata->seq);
2101
2102         /* copy pvclock gtod data */
2103         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2104         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2105         vdata->clock.mask               = tk->tkr_mono.mask;
2106         vdata->clock.mult               = tk->tkr_mono.mult;
2107         vdata->clock.shift              = tk->tkr_mono.shift;
2108         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2109         vdata->clock.offset             = tk->tkr_mono.base;
2110
2111         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2112         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2113         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2114         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2115         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2116         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2117         vdata->raw_clock.offset         = tk->tkr_raw.base;
2118
2119         vdata->wall_time_sec            = tk->xtime_sec;
2120
2121         vdata->offs_boot                = tk->offs_boot;
2122
2123         write_seqcount_end(&vdata->seq);
2124 }
2125
2126 static s64 get_kvmclock_base_ns(void)
2127 {
2128         /* Count up from boot time, but with the frequency of the raw clock.  */
2129         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2130 }
2131 #else
2132 static s64 get_kvmclock_base_ns(void)
2133 {
2134         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2135         return ktime_get_boottime_ns();
2136 }
2137 #endif
2138
2139 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2140 {
2141         int version;
2142         int r;
2143         struct pvclock_wall_clock wc;
2144         u32 wc_sec_hi;
2145         u64 wall_nsec;
2146
2147         if (!wall_clock)
2148                 return;
2149
2150         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2151         if (r)
2152                 return;
2153
2154         if (version & 1)
2155                 ++version;  /* first time write, random junk */
2156
2157         ++version;
2158
2159         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2160                 return;
2161
2162         /*
2163          * The guest calculates current wall clock time by adding
2164          * system time (updated by kvm_guest_time_update below) to the
2165          * wall clock specified here.  We do the reverse here.
2166          */
2167         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2168
2169         wc.nsec = do_div(wall_nsec, 1000000000);
2170         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2171         wc.version = version;
2172
2173         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2174
2175         if (sec_hi_ofs) {
2176                 wc_sec_hi = wall_nsec >> 32;
2177                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2178                                 &wc_sec_hi, sizeof(wc_sec_hi));
2179         }
2180
2181         version++;
2182         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2183 }
2184
2185 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2186                                   bool old_msr, bool host_initiated)
2187 {
2188         struct kvm_arch *ka = &vcpu->kvm->arch;
2189
2190         if (vcpu->vcpu_id == 0 && !host_initiated) {
2191                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2192                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2193
2194                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2195         }
2196
2197         vcpu->arch.time = system_time;
2198         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2199
2200         /* we verify if the enable bit is set... */
2201         vcpu->arch.pv_time_enabled = false;
2202         if (!(system_time & 1))
2203                 return;
2204
2205         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2206                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2207                                        sizeof(struct pvclock_vcpu_time_info)))
2208                 vcpu->arch.pv_time_enabled = true;
2209
2210         return;
2211 }
2212
2213 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2214 {
2215         do_shl32_div32(dividend, divisor);
2216         return dividend;
2217 }
2218
2219 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2220                                s8 *pshift, u32 *pmultiplier)
2221 {
2222         uint64_t scaled64;
2223         int32_t  shift = 0;
2224         uint64_t tps64;
2225         uint32_t tps32;
2226
2227         tps64 = base_hz;
2228         scaled64 = scaled_hz;
2229         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2230                 tps64 >>= 1;
2231                 shift--;
2232         }
2233
2234         tps32 = (uint32_t)tps64;
2235         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2236                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2237                         scaled64 >>= 1;
2238                 else
2239                         tps32 <<= 1;
2240                 shift++;
2241         }
2242
2243         *pshift = shift;
2244         *pmultiplier = div_frac(scaled64, tps32);
2245 }
2246
2247 #ifdef CONFIG_X86_64
2248 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2249 #endif
2250
2251 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2252 static unsigned long max_tsc_khz;
2253
2254 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2255 {
2256         u64 v = (u64)khz * (1000000 + ppm);
2257         do_div(v, 1000000);
2258         return v;
2259 }
2260
2261 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2262
2263 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2264 {
2265         u64 ratio;
2266
2267         /* Guest TSC same frequency as host TSC? */
2268         if (!scale) {
2269                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2270                 return 0;
2271         }
2272
2273         /* TSC scaling supported? */
2274         if (!kvm_has_tsc_control) {
2275                 if (user_tsc_khz > tsc_khz) {
2276                         vcpu->arch.tsc_catchup = 1;
2277                         vcpu->arch.tsc_always_catchup = 1;
2278                         return 0;
2279                 } else {
2280                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2281                         return -1;
2282                 }
2283         }
2284
2285         /* TSC scaling required  - calculate ratio */
2286         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2287                                 user_tsc_khz, tsc_khz);
2288
2289         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2290                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2291                                     user_tsc_khz);
2292                 return -1;
2293         }
2294
2295         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2296         return 0;
2297 }
2298
2299 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2300 {
2301         u32 thresh_lo, thresh_hi;
2302         int use_scaling = 0;
2303
2304         /* tsc_khz can be zero if TSC calibration fails */
2305         if (user_tsc_khz == 0) {
2306                 /* set tsc_scaling_ratio to a safe value */
2307                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2308                 return -1;
2309         }
2310
2311         /* Compute a scale to convert nanoseconds in TSC cycles */
2312         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2313                            &vcpu->arch.virtual_tsc_shift,
2314                            &vcpu->arch.virtual_tsc_mult);
2315         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2316
2317         /*
2318          * Compute the variation in TSC rate which is acceptable
2319          * within the range of tolerance and decide if the
2320          * rate being applied is within that bounds of the hardware
2321          * rate.  If so, no scaling or compensation need be done.
2322          */
2323         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2324         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2325         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2326                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2327                 use_scaling = 1;
2328         }
2329         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2330 }
2331
2332 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2333 {
2334         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2335                                       vcpu->arch.virtual_tsc_mult,
2336                                       vcpu->arch.virtual_tsc_shift);
2337         tsc += vcpu->arch.this_tsc_write;
2338         return tsc;
2339 }
2340
2341 static inline int gtod_is_based_on_tsc(int mode)
2342 {
2343         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2344 }
2345
2346 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2347 {
2348 #ifdef CONFIG_X86_64
2349         bool vcpus_matched;
2350         struct kvm_arch *ka = &vcpu->kvm->arch;
2351         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2352
2353         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2354                          atomic_read(&vcpu->kvm->online_vcpus));
2355
2356         /*
2357          * Once the masterclock is enabled, always perform request in
2358          * order to update it.
2359          *
2360          * In order to enable masterclock, the host clocksource must be TSC
2361          * and the vcpus need to have matched TSCs.  When that happens,
2362          * perform request to enable masterclock.
2363          */
2364         if (ka->use_master_clock ||
2365             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2366                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2367
2368         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2369                             atomic_read(&vcpu->kvm->online_vcpus),
2370                             ka->use_master_clock, gtod->clock.vclock_mode);
2371 #endif
2372 }
2373
2374 /*
2375  * Multiply tsc by a fixed point number represented by ratio.
2376  *
2377  * The most significant 64-N bits (mult) of ratio represent the
2378  * integral part of the fixed point number; the remaining N bits
2379  * (frac) represent the fractional part, ie. ratio represents a fixed
2380  * point number (mult + frac * 2^(-N)).
2381  *
2382  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2383  */
2384 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2385 {
2386         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2387 }
2388
2389 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2390 {
2391         u64 _tsc = tsc;
2392
2393         if (ratio != kvm_default_tsc_scaling_ratio)
2394                 _tsc = __scale_tsc(ratio, tsc);
2395
2396         return _tsc;
2397 }
2398 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2399
2400 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2401 {
2402         u64 tsc;
2403
2404         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2405
2406         return target_tsc - tsc;
2407 }
2408
2409 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2410 {
2411         return vcpu->arch.l1_tsc_offset +
2412                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2413 }
2414 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2415
2416 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2417 {
2418         u64 nested_offset;
2419
2420         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2421                 nested_offset = l1_offset;
2422         else
2423                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2424                                                 kvm_tsc_scaling_ratio_frac_bits);
2425
2426         nested_offset += l2_offset;
2427         return nested_offset;
2428 }
2429 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2430
2431 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2432 {
2433         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2434                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2435                                        kvm_tsc_scaling_ratio_frac_bits);
2436
2437         return l1_multiplier;
2438 }
2439 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2440
2441 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2442 {
2443         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2444                                    vcpu->arch.l1_tsc_offset,
2445                                    l1_offset);
2446
2447         vcpu->arch.l1_tsc_offset = l1_offset;
2448
2449         /*
2450          * If we are here because L1 chose not to trap WRMSR to TSC then
2451          * according to the spec this should set L1's TSC (as opposed to
2452          * setting L1's offset for L2).
2453          */
2454         if (is_guest_mode(vcpu))
2455                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2456                         l1_offset,
2457                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2458                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2459         else
2460                 vcpu->arch.tsc_offset = l1_offset;
2461
2462         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2463 }
2464
2465 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2466 {
2467         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2468
2469         /* Userspace is changing the multiplier while L2 is active */
2470         if (is_guest_mode(vcpu))
2471                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2472                         l1_multiplier,
2473                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2474         else
2475                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2476
2477         if (kvm_has_tsc_control)
2478                 static_call(kvm_x86_write_tsc_multiplier)(
2479                         vcpu, vcpu->arch.tsc_scaling_ratio);
2480 }
2481
2482 static inline bool kvm_check_tsc_unstable(void)
2483 {
2484 #ifdef CONFIG_X86_64
2485         /*
2486          * TSC is marked unstable when we're running on Hyper-V,
2487          * 'TSC page' clocksource is good.
2488          */
2489         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2490                 return false;
2491 #endif
2492         return check_tsc_unstable();
2493 }
2494
2495 /*
2496  * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2497  * offset for the vcpu and tracks the TSC matching generation that the vcpu
2498  * participates in.
2499  */
2500 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2501                                   u64 ns, bool matched)
2502 {
2503         struct kvm *kvm = vcpu->kvm;
2504
2505         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2506
2507         /*
2508          * We also track th most recent recorded KHZ, write and time to
2509          * allow the matching interval to be extended at each write.
2510          */
2511         kvm->arch.last_tsc_nsec = ns;
2512         kvm->arch.last_tsc_write = tsc;
2513         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2514         kvm->arch.last_tsc_offset = offset;
2515
2516         vcpu->arch.last_guest_tsc = tsc;
2517
2518         kvm_vcpu_write_tsc_offset(vcpu, offset);
2519
2520         if (!matched) {
2521                 /*
2522                  * We split periods of matched TSC writes into generations.
2523                  * For each generation, we track the original measured
2524                  * nanosecond time, offset, and write, so if TSCs are in
2525                  * sync, we can match exact offset, and if not, we can match
2526                  * exact software computation in compute_guest_tsc()
2527                  *
2528                  * These values are tracked in kvm->arch.cur_xxx variables.
2529                  */
2530                 kvm->arch.cur_tsc_generation++;
2531                 kvm->arch.cur_tsc_nsec = ns;
2532                 kvm->arch.cur_tsc_write = tsc;
2533                 kvm->arch.cur_tsc_offset = offset;
2534                 kvm->arch.nr_vcpus_matched_tsc = 0;
2535         } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2536                 kvm->arch.nr_vcpus_matched_tsc++;
2537         }
2538
2539         /* Keep track of which generation this VCPU has synchronized to */
2540         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2541         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2542         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2543
2544         kvm_track_tsc_matching(vcpu);
2545 }
2546
2547 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2548 {
2549         struct kvm *kvm = vcpu->kvm;
2550         u64 offset, ns, elapsed;
2551         unsigned long flags;
2552         bool matched = false;
2553         bool synchronizing = false;
2554
2555         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2556         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2557         ns = get_kvmclock_base_ns();
2558         elapsed = ns - kvm->arch.last_tsc_nsec;
2559
2560         if (vcpu->arch.virtual_tsc_khz) {
2561                 if (data == 0) {
2562                         /*
2563                          * detection of vcpu initialization -- need to sync
2564                          * with other vCPUs. This particularly helps to keep
2565                          * kvm_clock stable after CPU hotplug
2566                          */
2567                         synchronizing = true;
2568                 } else {
2569                         u64 tsc_exp = kvm->arch.last_tsc_write +
2570                                                 nsec_to_cycles(vcpu, elapsed);
2571                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2572                         /*
2573                          * Special case: TSC write with a small delta (1 second)
2574                          * of virtual cycle time against real time is
2575                          * interpreted as an attempt to synchronize the CPU.
2576                          */
2577                         synchronizing = data < tsc_exp + tsc_hz &&
2578                                         data + tsc_hz > tsc_exp;
2579                 }
2580         }
2581
2582         /*
2583          * For a reliable TSC, we can match TSC offsets, and for an unstable
2584          * TSC, we add elapsed time in this computation.  We could let the
2585          * compensation code attempt to catch up if we fall behind, but
2586          * it's better to try to match offsets from the beginning.
2587          */
2588         if (synchronizing &&
2589             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2590                 if (!kvm_check_tsc_unstable()) {
2591                         offset = kvm->arch.cur_tsc_offset;
2592                 } else {
2593                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2594                         data += delta;
2595                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2596                 }
2597                 matched = true;
2598         }
2599
2600         __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2601         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2602 }
2603
2604 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2605                                            s64 adjustment)
2606 {
2607         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2608         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2609 }
2610
2611 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2612 {
2613         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2614                 WARN_ON(adjustment < 0);
2615         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2616                                    vcpu->arch.l1_tsc_scaling_ratio);
2617         adjust_tsc_offset_guest(vcpu, adjustment);
2618 }
2619
2620 #ifdef CONFIG_X86_64
2621
2622 static u64 read_tsc(void)
2623 {
2624         u64 ret = (u64)rdtsc_ordered();
2625         u64 last = pvclock_gtod_data.clock.cycle_last;
2626
2627         if (likely(ret >= last))
2628                 return ret;
2629
2630         /*
2631          * GCC likes to generate cmov here, but this branch is extremely
2632          * predictable (it's just a function of time and the likely is
2633          * very likely) and there's a data dependence, so force GCC
2634          * to generate a branch instead.  I don't barrier() because
2635          * we don't actually need a barrier, and if this function
2636          * ever gets inlined it will generate worse code.
2637          */
2638         asm volatile ("");
2639         return last;
2640 }
2641
2642 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2643                           int *mode)
2644 {
2645         long v;
2646         u64 tsc_pg_val;
2647
2648         switch (clock->vclock_mode) {
2649         case VDSO_CLOCKMODE_HVCLOCK:
2650                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2651                                                   tsc_timestamp);
2652                 if (tsc_pg_val != U64_MAX) {
2653                         /* TSC page valid */
2654                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2655                         v = (tsc_pg_val - clock->cycle_last) &
2656                                 clock->mask;
2657                 } else {
2658                         /* TSC page invalid */
2659                         *mode = VDSO_CLOCKMODE_NONE;
2660                 }
2661                 break;
2662         case VDSO_CLOCKMODE_TSC:
2663                 *mode = VDSO_CLOCKMODE_TSC;
2664                 *tsc_timestamp = read_tsc();
2665                 v = (*tsc_timestamp - clock->cycle_last) &
2666                         clock->mask;
2667                 break;
2668         default:
2669                 *mode = VDSO_CLOCKMODE_NONE;
2670         }
2671
2672         if (*mode == VDSO_CLOCKMODE_NONE)
2673                 *tsc_timestamp = v = 0;
2674
2675         return v * clock->mult;
2676 }
2677
2678 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2679 {
2680         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2681         unsigned long seq;
2682         int mode;
2683         u64 ns;
2684
2685         do {
2686                 seq = read_seqcount_begin(&gtod->seq);
2687                 ns = gtod->raw_clock.base_cycles;
2688                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2689                 ns >>= gtod->raw_clock.shift;
2690                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2691         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2692         *t = ns;
2693
2694         return mode;
2695 }
2696
2697 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2698 {
2699         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2700         unsigned long seq;
2701         int mode;
2702         u64 ns;
2703
2704         do {
2705                 seq = read_seqcount_begin(&gtod->seq);
2706                 ts->tv_sec = gtod->wall_time_sec;
2707                 ns = gtod->clock.base_cycles;
2708                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2709                 ns >>= gtod->clock.shift;
2710         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2711
2712         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2713         ts->tv_nsec = ns;
2714
2715         return mode;
2716 }
2717
2718 /* returns true if host is using TSC based clocksource */
2719 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2720 {
2721         /* checked again under seqlock below */
2722         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2723                 return false;
2724
2725         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2726                                                       tsc_timestamp));
2727 }
2728
2729 /* returns true if host is using TSC based clocksource */
2730 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2731                                            u64 *tsc_timestamp)
2732 {
2733         /* checked again under seqlock below */
2734         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2735                 return false;
2736
2737         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2738 }
2739 #endif
2740
2741 /*
2742  *
2743  * Assuming a stable TSC across physical CPUS, and a stable TSC
2744  * across virtual CPUs, the following condition is possible.
2745  * Each numbered line represents an event visible to both
2746  * CPUs at the next numbered event.
2747  *
2748  * "timespecX" represents host monotonic time. "tscX" represents
2749  * RDTSC value.
2750  *
2751  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2752  *
2753  * 1.  read timespec0,tsc0
2754  * 2.                                   | timespec1 = timespec0 + N
2755  *                                      | tsc1 = tsc0 + M
2756  * 3. transition to guest               | transition to guest
2757  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2758  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2759  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2760  *
2761  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2762  *
2763  *      - ret0 < ret1
2764  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2765  *              ...
2766  *      - 0 < N - M => M < N
2767  *
2768  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2769  * always the case (the difference between two distinct xtime instances
2770  * might be smaller then the difference between corresponding TSC reads,
2771  * when updating guest vcpus pvclock areas).
2772  *
2773  * To avoid that problem, do not allow visibility of distinct
2774  * system_timestamp/tsc_timestamp values simultaneously: use a master
2775  * copy of host monotonic time values. Update that master copy
2776  * in lockstep.
2777  *
2778  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2779  *
2780  */
2781
2782 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2783 {
2784 #ifdef CONFIG_X86_64
2785         struct kvm_arch *ka = &kvm->arch;
2786         int vclock_mode;
2787         bool host_tsc_clocksource, vcpus_matched;
2788
2789         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2790         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2791                         atomic_read(&kvm->online_vcpus));
2792
2793         /*
2794          * If the host uses TSC clock, then passthrough TSC as stable
2795          * to the guest.
2796          */
2797         host_tsc_clocksource = kvm_get_time_and_clockread(
2798                                         &ka->master_kernel_ns,
2799                                         &ka->master_cycle_now);
2800
2801         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2802                                 && !ka->backwards_tsc_observed
2803                                 && !ka->boot_vcpu_runs_old_kvmclock;
2804
2805         if (ka->use_master_clock)
2806                 atomic_set(&kvm_guest_has_master_clock, 1);
2807
2808         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2809         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2810                                         vcpus_matched);
2811 #endif
2812 }
2813
2814 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2815 {
2816         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2817 }
2818
2819 static void __kvm_start_pvclock_update(struct kvm *kvm)
2820 {
2821         raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2822         write_seqcount_begin(&kvm->arch.pvclock_sc);
2823 }
2824
2825 static void kvm_start_pvclock_update(struct kvm *kvm)
2826 {
2827         kvm_make_mclock_inprogress_request(kvm);
2828
2829         /* no guest entries from this point */
2830         __kvm_start_pvclock_update(kvm);
2831 }
2832
2833 static void kvm_end_pvclock_update(struct kvm *kvm)
2834 {
2835         struct kvm_arch *ka = &kvm->arch;
2836         struct kvm_vcpu *vcpu;
2837         unsigned long i;
2838
2839         write_seqcount_end(&ka->pvclock_sc);
2840         raw_spin_unlock_irq(&ka->tsc_write_lock);
2841         kvm_for_each_vcpu(i, vcpu, kvm)
2842                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2843
2844         /* guest entries allowed */
2845         kvm_for_each_vcpu(i, vcpu, kvm)
2846                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2847 }
2848
2849 static void kvm_update_masterclock(struct kvm *kvm)
2850 {
2851         kvm_hv_invalidate_tsc_page(kvm);
2852         kvm_start_pvclock_update(kvm);
2853         pvclock_update_vm_gtod_copy(kvm);
2854         kvm_end_pvclock_update(kvm);
2855 }
2856
2857 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc.  */
2858 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2859 {
2860         struct kvm_arch *ka = &kvm->arch;
2861         struct pvclock_vcpu_time_info hv_clock;
2862
2863         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2864         get_cpu();
2865
2866         data->flags = 0;
2867         if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2868 #ifdef CONFIG_X86_64
2869                 struct timespec64 ts;
2870
2871                 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2872                         data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2873                         data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2874                 } else
2875 #endif
2876                 data->host_tsc = rdtsc();
2877
2878                 data->flags |= KVM_CLOCK_TSC_STABLE;
2879                 hv_clock.tsc_timestamp = ka->master_cycle_now;
2880                 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2881                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2882                                    &hv_clock.tsc_shift,
2883                                    &hv_clock.tsc_to_system_mul);
2884                 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2885         } else {
2886                 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2887         }
2888
2889         put_cpu();
2890 }
2891
2892 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2893 {
2894         struct kvm_arch *ka = &kvm->arch;
2895         unsigned seq;
2896
2897         do {
2898                 seq = read_seqcount_begin(&ka->pvclock_sc);
2899                 __get_kvmclock(kvm, data);
2900         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2901 }
2902
2903 u64 get_kvmclock_ns(struct kvm *kvm)
2904 {
2905         struct kvm_clock_data data;
2906
2907         get_kvmclock(kvm, &data);
2908         return data.clock;
2909 }
2910
2911 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2912                                    struct gfn_to_hva_cache *cache,
2913                                    unsigned int offset)
2914 {
2915         struct kvm_vcpu_arch *vcpu = &v->arch;
2916         struct pvclock_vcpu_time_info guest_hv_clock;
2917
2918         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2919                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2920                 return;
2921
2922         /* This VCPU is paused, but it's legal for a guest to read another
2923          * VCPU's kvmclock, so we really have to follow the specification where
2924          * it says that version is odd if data is being modified, and even after
2925          * it is consistent.
2926          *
2927          * Version field updates must be kept separate.  This is because
2928          * kvm_write_guest_cached might use a "rep movs" instruction, and
2929          * writes within a string instruction are weakly ordered.  So there
2930          * are three writes overall.
2931          *
2932          * As a small optimization, only write the version field in the first
2933          * and third write.  The vcpu->pv_time cache is still valid, because the
2934          * version field is the first in the struct.
2935          */
2936         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2937
2938         if (guest_hv_clock.version & 1)
2939                 ++guest_hv_clock.version;  /* first time write, random junk */
2940
2941         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2942         kvm_write_guest_offset_cached(v->kvm, cache,
2943                                       &vcpu->hv_clock, offset,
2944                                       sizeof(vcpu->hv_clock.version));
2945
2946         smp_wmb();
2947
2948         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2949         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2950
2951         if (vcpu->pvclock_set_guest_stopped_request) {
2952                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2953                 vcpu->pvclock_set_guest_stopped_request = false;
2954         }
2955
2956         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2957
2958         kvm_write_guest_offset_cached(v->kvm, cache,
2959                                       &vcpu->hv_clock, offset,
2960                                       sizeof(vcpu->hv_clock));
2961
2962         smp_wmb();
2963
2964         vcpu->hv_clock.version++;
2965         kvm_write_guest_offset_cached(v->kvm, cache,
2966                                      &vcpu->hv_clock, offset,
2967                                      sizeof(vcpu->hv_clock.version));
2968 }
2969
2970 static int kvm_guest_time_update(struct kvm_vcpu *v)
2971 {
2972         unsigned long flags, tgt_tsc_khz;
2973         unsigned seq;
2974         struct kvm_vcpu_arch *vcpu = &v->arch;
2975         struct kvm_arch *ka = &v->kvm->arch;
2976         s64 kernel_ns;
2977         u64 tsc_timestamp, host_tsc;
2978         u8 pvclock_flags;
2979         bool use_master_clock;
2980
2981         kernel_ns = 0;
2982         host_tsc = 0;
2983
2984         /*
2985          * If the host uses TSC clock, then passthrough TSC as stable
2986          * to the guest.
2987          */
2988         do {
2989                 seq = read_seqcount_begin(&ka->pvclock_sc);
2990                 use_master_clock = ka->use_master_clock;
2991                 if (use_master_clock) {
2992                         host_tsc = ka->master_cycle_now;
2993                         kernel_ns = ka->master_kernel_ns;
2994                 }
2995         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2996
2997         /* Keep irq disabled to prevent changes to the clock */
2998         local_irq_save(flags);
2999         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3000         if (unlikely(tgt_tsc_khz == 0)) {
3001                 local_irq_restore(flags);
3002                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3003                 return 1;
3004         }
3005         if (!use_master_clock) {
3006                 host_tsc = rdtsc();
3007                 kernel_ns = get_kvmclock_base_ns();
3008         }
3009
3010         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3011
3012         /*
3013          * We may have to catch up the TSC to match elapsed wall clock
3014          * time for two reasons, even if kvmclock is used.
3015          *   1) CPU could have been running below the maximum TSC rate
3016          *   2) Broken TSC compensation resets the base at each VCPU
3017          *      entry to avoid unknown leaps of TSC even when running
3018          *      again on the same CPU.  This may cause apparent elapsed
3019          *      time to disappear, and the guest to stand still or run
3020          *      very slowly.
3021          */
3022         if (vcpu->tsc_catchup) {
3023                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3024                 if (tsc > tsc_timestamp) {
3025                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3026                         tsc_timestamp = tsc;
3027                 }
3028         }
3029
3030         local_irq_restore(flags);
3031
3032         /* With all the info we got, fill in the values */
3033
3034         if (kvm_has_tsc_control)
3035                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
3036                                             v->arch.l1_tsc_scaling_ratio);
3037
3038         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3039                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3040                                    &vcpu->hv_clock.tsc_shift,
3041                                    &vcpu->hv_clock.tsc_to_system_mul);
3042                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3043         }
3044
3045         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3046         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3047         vcpu->last_guest_tsc = tsc_timestamp;
3048
3049         /* If the host uses TSC clocksource, then it is stable */
3050         pvclock_flags = 0;
3051         if (use_master_clock)
3052                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3053
3054         vcpu->hv_clock.flags = pvclock_flags;
3055
3056         if (vcpu->pv_time_enabled)
3057                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
3058         if (vcpu->xen.vcpu_info_set)
3059                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
3060                                        offsetof(struct compat_vcpu_info, time));
3061         if (vcpu->xen.vcpu_time_info_set)
3062                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
3063         if (!v->vcpu_idx)
3064                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3065         return 0;
3066 }
3067
3068 /*
3069  * kvmclock updates which are isolated to a given vcpu, such as
3070  * vcpu->cpu migration, should not allow system_timestamp from
3071  * the rest of the vcpus to remain static. Otherwise ntp frequency
3072  * correction applies to one vcpu's system_timestamp but not
3073  * the others.
3074  *
3075  * So in those cases, request a kvmclock update for all vcpus.
3076  * We need to rate-limit these requests though, as they can
3077  * considerably slow guests that have a large number of vcpus.
3078  * The time for a remote vcpu to update its kvmclock is bound
3079  * by the delay we use to rate-limit the updates.
3080  */
3081
3082 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3083
3084 static void kvmclock_update_fn(struct work_struct *work)
3085 {
3086         unsigned long i;
3087         struct delayed_work *dwork = to_delayed_work(work);
3088         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3089                                            kvmclock_update_work);
3090         struct kvm *kvm = container_of(ka, struct kvm, arch);
3091         struct kvm_vcpu *vcpu;
3092
3093         kvm_for_each_vcpu(i, vcpu, kvm) {
3094                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3095                 kvm_vcpu_kick(vcpu);
3096         }
3097 }
3098
3099 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3100 {
3101         struct kvm *kvm = v->kvm;
3102
3103         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3104         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3105                                         KVMCLOCK_UPDATE_DELAY);
3106 }
3107
3108 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3109
3110 static void kvmclock_sync_fn(struct work_struct *work)
3111 {
3112         struct delayed_work *dwork = to_delayed_work(work);
3113         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3114                                            kvmclock_sync_work);
3115         struct kvm *kvm = container_of(ka, struct kvm, arch);
3116
3117         if (!kvmclock_periodic_sync)
3118                 return;
3119
3120         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3121         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3122                                         KVMCLOCK_SYNC_PERIOD);
3123 }
3124
3125 /*
3126  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3127  */
3128 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3129 {
3130         /* McStatusWrEn enabled? */
3131         if (guest_cpuid_is_amd_or_hygon(vcpu))
3132                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3133
3134         return false;
3135 }
3136
3137 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3138 {
3139         u64 mcg_cap = vcpu->arch.mcg_cap;
3140         unsigned bank_num = mcg_cap & 0xff;
3141         u32 msr = msr_info->index;
3142         u64 data = msr_info->data;
3143
3144         switch (msr) {
3145         case MSR_IA32_MCG_STATUS:
3146                 vcpu->arch.mcg_status = data;
3147                 break;
3148         case MSR_IA32_MCG_CTL:
3149                 if (!(mcg_cap & MCG_CTL_P) &&
3150                     (data || !msr_info->host_initiated))
3151                         return 1;
3152                 if (data != 0 && data != ~(u64)0)
3153                         return 1;
3154                 vcpu->arch.mcg_ctl = data;
3155                 break;
3156         default:
3157                 if (msr >= MSR_IA32_MC0_CTL &&
3158                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3159                         u32 offset = array_index_nospec(
3160                                 msr - MSR_IA32_MC0_CTL,
3161                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3162
3163                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3164                          * some Linux kernels though clear bit 10 in bank 4 to
3165                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3166                          * this to avoid an uncatched #GP in the guest
3167                          */
3168                         if ((offset & 0x3) == 0 &&
3169                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3170                                 return -1;
3171
3172                         /* MCi_STATUS */
3173                         if (!msr_info->host_initiated &&
3174                             (offset & 0x3) == 1 && data != 0) {
3175                                 if (!can_set_mci_status(vcpu))
3176                                         return -1;
3177                         }
3178
3179                         vcpu->arch.mce_banks[offset] = data;
3180                         break;
3181                 }
3182                 return 1;
3183         }
3184         return 0;
3185 }
3186
3187 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3188 {
3189         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3190
3191         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3192 }
3193
3194 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3195 {
3196         gpa_t gpa = data & ~0x3f;
3197
3198         /* Bits 4:5 are reserved, Should be zero */
3199         if (data & 0x30)
3200                 return 1;
3201
3202         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3203             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3204                 return 1;
3205
3206         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3207             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3208                 return 1;
3209
3210         if (!lapic_in_kernel(vcpu))
3211                 return data ? 1 : 0;
3212
3213         vcpu->arch.apf.msr_en_val = data;
3214
3215         if (!kvm_pv_async_pf_enabled(vcpu)) {
3216                 kvm_clear_async_pf_completion_queue(vcpu);
3217                 kvm_async_pf_hash_reset(vcpu);
3218                 return 0;
3219         }
3220
3221         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3222                                         sizeof(u64)))
3223                 return 1;
3224
3225         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3226         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3227
3228         kvm_async_pf_wakeup_all(vcpu);
3229
3230         return 0;
3231 }
3232
3233 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3234 {
3235         /* Bits 8-63 are reserved */
3236         if (data >> 8)
3237                 return 1;
3238
3239         if (!lapic_in_kernel(vcpu))
3240                 return 1;
3241
3242         vcpu->arch.apf.msr_int_val = data;
3243
3244         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3245
3246         return 0;
3247 }
3248
3249 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3250 {
3251         vcpu->arch.pv_time_enabled = false;
3252         vcpu->arch.time = 0;
3253 }
3254
3255 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3256 {
3257         ++vcpu->stat.tlb_flush;
3258         static_call(kvm_x86_tlb_flush_all)(vcpu);
3259 }
3260
3261 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3262 {
3263         ++vcpu->stat.tlb_flush;
3264
3265         if (!tdp_enabled) {
3266                 /*
3267                  * A TLB flush on behalf of the guest is equivalent to
3268                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3269                  * a forced sync of the shadow page tables.  Ensure all the
3270                  * roots are synced and the guest TLB in hardware is clean.
3271                  */
3272                 kvm_mmu_sync_roots(vcpu);
3273                 kvm_mmu_sync_prev_roots(vcpu);
3274         }
3275
3276         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3277 }
3278
3279
3280 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3281 {
3282         ++vcpu->stat.tlb_flush;
3283         static_call(kvm_x86_tlb_flush_current)(vcpu);
3284 }
3285
3286 /*
3287  * Service "local" TLB flush requests, which are specific to the current MMU
3288  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3289  * TLB flushes that are targeted at an MMU context also need to be serviced
3290  * prior before nested VM-Enter/VM-Exit.
3291  */
3292 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3293 {
3294         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3295                 kvm_vcpu_flush_tlb_current(vcpu);
3296
3297         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3298                 kvm_vcpu_flush_tlb_guest(vcpu);
3299 }
3300 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3301
3302 static void record_steal_time(struct kvm_vcpu *vcpu)
3303 {
3304         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3305         struct kvm_steal_time __user *st;
3306         struct kvm_memslots *slots;
3307         u64 steal;
3308         u32 version;
3309
3310         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3311                 kvm_xen_runstate_set_running(vcpu);
3312                 return;
3313         }
3314
3315         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3316                 return;
3317
3318         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3319                 return;
3320
3321         slots = kvm_memslots(vcpu->kvm);
3322
3323         if (unlikely(slots->generation != ghc->generation ||
3324                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3325                 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3326
3327                 /* We rely on the fact that it fits in a single page. */
3328                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3329
3330                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3331                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3332                         return;
3333         }
3334
3335         st = (struct kvm_steal_time __user *)ghc->hva;
3336         /*
3337          * Doing a TLB flush here, on the guest's behalf, can avoid
3338          * expensive IPIs.
3339          */
3340         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3341                 u8 st_preempted = 0;
3342                 int err = -EFAULT;
3343
3344                 if (!user_access_begin(st, sizeof(*st)))
3345                         return;
3346
3347                 asm volatile("1: xchgb %0, %2\n"
3348                              "xor %1, %1\n"
3349                              "2:\n"
3350                              _ASM_EXTABLE_UA(1b, 2b)
3351                              : "+q" (st_preempted),
3352                                "+&r" (err),
3353                                "+m" (st->preempted));
3354                 if (err)
3355                         goto out;
3356
3357                 user_access_end();
3358
3359                 vcpu->arch.st.preempted = 0;
3360
3361                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3362                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3363                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3364                         kvm_vcpu_flush_tlb_guest(vcpu);
3365
3366                 if (!user_access_begin(st, sizeof(*st)))
3367                         goto dirty;
3368         } else {
3369                 if (!user_access_begin(st, sizeof(*st)))
3370                         return;
3371
3372                 unsafe_put_user(0, &st->preempted, out);
3373                 vcpu->arch.st.preempted = 0;
3374         }
3375
3376         unsafe_get_user(version, &st->version, out);
3377         if (version & 1)
3378                 version += 1;  /* first time write, random junk */
3379
3380         version += 1;
3381         unsafe_put_user(version, &st->version, out);
3382
3383         smp_wmb();
3384
3385         unsafe_get_user(steal, &st->steal, out);
3386         steal += current->sched_info.run_delay -
3387                 vcpu->arch.st.last_steal;
3388         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3389         unsafe_put_user(steal, &st->steal, out);
3390
3391         version += 1;
3392         unsafe_put_user(version, &st->version, out);
3393
3394  out:
3395         user_access_end();
3396  dirty:
3397         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3398 }
3399
3400 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3401 {
3402         bool pr = false;
3403         u32 msr = msr_info->index;
3404         u64 data = msr_info->data;
3405
3406         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3407                 return kvm_xen_write_hypercall_page(vcpu, data);
3408
3409         switch (msr) {
3410         case MSR_AMD64_NB_CFG:
3411         case MSR_IA32_UCODE_WRITE:
3412         case MSR_VM_HSAVE_PA:
3413         case MSR_AMD64_PATCH_LOADER:
3414         case MSR_AMD64_BU_CFG2:
3415         case MSR_AMD64_DC_CFG:
3416         case MSR_F15H_EX_CFG:
3417                 break;
3418
3419         case MSR_IA32_UCODE_REV:
3420                 if (msr_info->host_initiated)
3421                         vcpu->arch.microcode_version = data;
3422                 break;
3423         case MSR_IA32_ARCH_CAPABILITIES:
3424                 if (!msr_info->host_initiated)
3425                         return 1;
3426                 vcpu->arch.arch_capabilities = data;
3427                 break;
3428         case MSR_IA32_PERF_CAPABILITIES: {
3429                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3430
3431                 if (!msr_info->host_initiated)
3432                         return 1;
3433                 if (kvm_get_msr_feature(&msr_ent))
3434                         return 1;
3435                 if (data & ~msr_ent.data)
3436                         return 1;
3437
3438                 vcpu->arch.perf_capabilities = data;
3439
3440                 return 0;
3441                 }
3442         case MSR_EFER:
3443                 return set_efer(vcpu, msr_info);
3444         case MSR_K7_HWCR:
3445                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3446                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3447                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3448
3449                 /* Handle McStatusWrEn */
3450                 if (data == BIT_ULL(18)) {
3451                         vcpu->arch.msr_hwcr = data;
3452                 } else if (data != 0) {
3453                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3454                                     data);
3455                         return 1;
3456                 }
3457                 break;
3458         case MSR_FAM10H_MMIO_CONF_BASE:
3459                 if (data != 0) {
3460                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3461                                     "0x%llx\n", data);
3462                         return 1;
3463                 }
3464                 break;
3465         case 0x200 ... 0x2ff:
3466                 return kvm_mtrr_set_msr(vcpu, msr, data);
3467         case MSR_IA32_APICBASE:
3468                 return kvm_set_apic_base(vcpu, msr_info);
3469         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3470                 return kvm_x2apic_msr_write(vcpu, msr, data);
3471         case MSR_IA32_TSC_DEADLINE:
3472                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3473                 break;
3474         case MSR_IA32_TSC_ADJUST:
3475                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3476                         if (!msr_info->host_initiated) {
3477                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3478                                 adjust_tsc_offset_guest(vcpu, adj);
3479                                 /* Before back to guest, tsc_timestamp must be adjusted
3480                                  * as well, otherwise guest's percpu pvclock time could jump.
3481                                  */
3482                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3483                         }
3484                         vcpu->arch.ia32_tsc_adjust_msr = data;
3485                 }
3486                 break;
3487         case MSR_IA32_MISC_ENABLE:
3488                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3489                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3490                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3491                                 return 1;
3492                         vcpu->arch.ia32_misc_enable_msr = data;
3493                         kvm_update_cpuid_runtime(vcpu);
3494                 } else {
3495                         vcpu->arch.ia32_misc_enable_msr = data;
3496                 }
3497                 break;
3498         case MSR_IA32_SMBASE:
3499                 if (!msr_info->host_initiated)
3500                         return 1;
3501                 vcpu->arch.smbase = data;
3502                 break;
3503         case MSR_IA32_POWER_CTL:
3504                 vcpu->arch.msr_ia32_power_ctl = data;
3505                 break;
3506         case MSR_IA32_TSC:
3507                 if (msr_info->host_initiated) {
3508                         kvm_synchronize_tsc(vcpu, data);
3509                 } else {
3510                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3511                         adjust_tsc_offset_guest(vcpu, adj);
3512                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3513                 }
3514                 break;
3515         case MSR_IA32_XSS:
3516                 if (!msr_info->host_initiated &&
3517                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3518                         return 1;
3519                 /*
3520                  * KVM supports exposing PT to the guest, but does not support
3521                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3522                  * XSAVES/XRSTORS to save/restore PT MSRs.
3523                  */
3524                 if (data & ~supported_xss)
3525                         return 1;
3526                 vcpu->arch.ia32_xss = data;
3527                 break;
3528         case MSR_SMI_COUNT:
3529                 if (!msr_info->host_initiated)
3530                         return 1;
3531                 vcpu->arch.smi_count = data;
3532                 break;
3533         case MSR_KVM_WALL_CLOCK_NEW:
3534                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3535                         return 1;
3536
3537                 vcpu->kvm->arch.wall_clock = data;
3538                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3539                 break;
3540         case MSR_KVM_WALL_CLOCK:
3541                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3542                         return 1;
3543
3544                 vcpu->kvm->arch.wall_clock = data;
3545                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3546                 break;
3547         case MSR_KVM_SYSTEM_TIME_NEW:
3548                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3549                         return 1;
3550
3551                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3552                 break;
3553         case MSR_KVM_SYSTEM_TIME:
3554                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3555                         return 1;
3556
3557                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3558                 break;
3559         case MSR_KVM_ASYNC_PF_EN:
3560                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3561                         return 1;
3562
3563                 if (kvm_pv_enable_async_pf(vcpu, data))
3564                         return 1;
3565                 break;
3566         case MSR_KVM_ASYNC_PF_INT:
3567                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3568                         return 1;
3569
3570                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3571                         return 1;
3572                 break;
3573         case MSR_KVM_ASYNC_PF_ACK:
3574                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3575                         return 1;
3576                 if (data & 0x1) {
3577                         vcpu->arch.apf.pageready_pending = false;
3578                         kvm_check_async_pf_completion(vcpu);
3579                 }
3580                 break;
3581         case MSR_KVM_STEAL_TIME:
3582                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3583                         return 1;
3584
3585                 if (unlikely(!sched_info_on()))
3586                         return 1;
3587
3588                 if (data & KVM_STEAL_RESERVED_MASK)
3589                         return 1;
3590
3591                 vcpu->arch.st.msr_val = data;
3592
3593                 if (!(data & KVM_MSR_ENABLED))
3594                         break;
3595
3596                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3597
3598                 break;
3599         case MSR_KVM_PV_EOI_EN:
3600                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3601                         return 1;
3602
3603                 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3604                         return 1;
3605                 break;
3606
3607         case MSR_KVM_POLL_CONTROL:
3608                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3609                         return 1;
3610
3611                 /* only enable bit supported */
3612                 if (data & (-1ULL << 1))
3613                         return 1;
3614
3615                 vcpu->arch.msr_kvm_poll_control = data;
3616                 break;
3617
3618         case MSR_IA32_MCG_CTL:
3619         case MSR_IA32_MCG_STATUS:
3620         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3621                 return set_msr_mce(vcpu, msr_info);
3622
3623         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3624         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3625                 pr = true;
3626                 fallthrough;
3627         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3628         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3629                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3630                         return kvm_pmu_set_msr(vcpu, msr_info);
3631
3632                 if (pr || data != 0)
3633                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3634                                     "0x%x data 0x%llx\n", msr, data);
3635                 break;
3636         case MSR_K7_CLK_CTL:
3637                 /*
3638                  * Ignore all writes to this no longer documented MSR.
3639                  * Writes are only relevant for old K7 processors,
3640                  * all pre-dating SVM, but a recommended workaround from
3641                  * AMD for these chips. It is possible to specify the
3642                  * affected processor models on the command line, hence
3643                  * the need to ignore the workaround.
3644                  */
3645                 break;
3646         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3647         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3648         case HV_X64_MSR_SYNDBG_OPTIONS:
3649         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3650         case HV_X64_MSR_CRASH_CTL:
3651         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3652         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3653         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3654         case HV_X64_MSR_TSC_EMULATION_STATUS:
3655                 return kvm_hv_set_msr_common(vcpu, msr, data,
3656                                              msr_info->host_initiated);
3657         case MSR_IA32_BBL_CR_CTL3:
3658                 /* Drop writes to this legacy MSR -- see rdmsr
3659                  * counterpart for further detail.
3660                  */
3661                 if (report_ignored_msrs)
3662                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3663                                 msr, data);
3664                 break;
3665         case MSR_AMD64_OSVW_ID_LENGTH:
3666                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3667                         return 1;
3668                 vcpu->arch.osvw.length = data;
3669                 break;
3670         case MSR_AMD64_OSVW_STATUS:
3671                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3672                         return 1;
3673                 vcpu->arch.osvw.status = data;
3674                 break;
3675         case MSR_PLATFORM_INFO:
3676                 if (!msr_info->host_initiated ||
3677                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3678                      cpuid_fault_enabled(vcpu)))
3679                         return 1;
3680                 vcpu->arch.msr_platform_info = data;
3681                 break;
3682         case MSR_MISC_FEATURES_ENABLES:
3683                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3684                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3685                      !supports_cpuid_fault(vcpu)))
3686                         return 1;
3687                 vcpu->arch.msr_misc_features_enables = data;
3688                 break;
3689         default:
3690                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3691                         return kvm_pmu_set_msr(vcpu, msr_info);
3692                 return KVM_MSR_RET_INVALID;
3693         }
3694         return 0;
3695 }
3696 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3697
3698 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3699 {
3700         u64 data;
3701         u64 mcg_cap = vcpu->arch.mcg_cap;
3702         unsigned bank_num = mcg_cap & 0xff;
3703
3704         switch (msr) {
3705         case MSR_IA32_P5_MC_ADDR:
3706         case MSR_IA32_P5_MC_TYPE:
3707                 data = 0;
3708                 break;
3709         case MSR_IA32_MCG_CAP:
3710                 data = vcpu->arch.mcg_cap;
3711                 break;
3712         case MSR_IA32_MCG_CTL:
3713                 if (!(mcg_cap & MCG_CTL_P) && !host)
3714                         return 1;
3715                 data = vcpu->arch.mcg_ctl;
3716                 break;
3717         case MSR_IA32_MCG_STATUS:
3718                 data = vcpu->arch.mcg_status;
3719                 break;
3720         default:
3721                 if (msr >= MSR_IA32_MC0_CTL &&
3722                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3723                         u32 offset = array_index_nospec(
3724                                 msr - MSR_IA32_MC0_CTL,
3725                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3726
3727                         data = vcpu->arch.mce_banks[offset];
3728                         break;
3729                 }
3730                 return 1;
3731         }
3732         *pdata = data;
3733         return 0;
3734 }
3735
3736 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3737 {
3738         switch (msr_info->index) {
3739         case MSR_IA32_PLATFORM_ID:
3740         case MSR_IA32_EBL_CR_POWERON:
3741         case MSR_IA32_LASTBRANCHFROMIP:
3742         case MSR_IA32_LASTBRANCHTOIP:
3743         case MSR_IA32_LASTINTFROMIP:
3744         case MSR_IA32_LASTINTTOIP:
3745         case MSR_AMD64_SYSCFG:
3746         case MSR_K8_TSEG_ADDR:
3747         case MSR_K8_TSEG_MASK:
3748         case MSR_VM_HSAVE_PA:
3749         case MSR_K8_INT_PENDING_MSG:
3750         case MSR_AMD64_NB_CFG:
3751         case MSR_FAM10H_MMIO_CONF_BASE:
3752         case MSR_AMD64_BU_CFG2:
3753         case MSR_IA32_PERF_CTL:
3754         case MSR_AMD64_DC_CFG:
3755         case MSR_F15H_EX_CFG:
3756         /*
3757          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3758          * limit) MSRs. Just return 0, as we do not want to expose the host
3759          * data here. Do not conditionalize this on CPUID, as KVM does not do
3760          * so for existing CPU-specific MSRs.
3761          */
3762         case MSR_RAPL_POWER_UNIT:
3763         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3764         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3765         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3766         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3767                 msr_info->data = 0;
3768                 break;
3769         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3770                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3771                         return kvm_pmu_get_msr(vcpu, msr_info);
3772                 if (!msr_info->host_initiated)
3773                         return 1;
3774                 msr_info->data = 0;
3775                 break;
3776         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3777         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3778         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3779         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3780                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3781                         return kvm_pmu_get_msr(vcpu, msr_info);
3782                 msr_info->data = 0;
3783                 break;
3784         case MSR_IA32_UCODE_REV:
3785                 msr_info->data = vcpu->arch.microcode_version;
3786                 break;
3787         case MSR_IA32_ARCH_CAPABILITIES:
3788                 if (!msr_info->host_initiated &&
3789                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3790                         return 1;
3791                 msr_info->data = vcpu->arch.arch_capabilities;
3792                 break;
3793         case MSR_IA32_PERF_CAPABILITIES:
3794                 if (!msr_info->host_initiated &&
3795                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3796                         return 1;
3797                 msr_info->data = vcpu->arch.perf_capabilities;
3798                 break;
3799         case MSR_IA32_POWER_CTL:
3800                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3801                 break;
3802         case MSR_IA32_TSC: {
3803                 /*
3804                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3805                  * even when not intercepted. AMD manual doesn't explicitly
3806                  * state this but appears to behave the same.
3807                  *
3808                  * On userspace reads and writes, however, we unconditionally
3809                  * return L1's TSC value to ensure backwards-compatible
3810                  * behavior for migration.
3811                  */
3812                 u64 offset, ratio;
3813
3814                 if (msr_info->host_initiated) {
3815                         offset = vcpu->arch.l1_tsc_offset;
3816                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3817                 } else {
3818                         offset = vcpu->arch.tsc_offset;
3819                         ratio = vcpu->arch.tsc_scaling_ratio;
3820                 }
3821
3822                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3823                 break;
3824         }
3825         case MSR_MTRRcap:
3826         case 0x200 ... 0x2ff:
3827                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3828         case 0xcd: /* fsb frequency */
3829                 msr_info->data = 3;
3830                 break;
3831                 /*
3832                  * MSR_EBC_FREQUENCY_ID
3833                  * Conservative value valid for even the basic CPU models.
3834                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3835                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3836                  * and 266MHz for model 3, or 4. Set Core Clock
3837                  * Frequency to System Bus Frequency Ratio to 1 (bits
3838                  * 31:24) even though these are only valid for CPU
3839                  * models > 2, however guests may end up dividing or
3840                  * multiplying by zero otherwise.
3841                  */
3842         case MSR_EBC_FREQUENCY_ID:
3843                 msr_info->data = 1 << 24;
3844                 break;
3845         case MSR_IA32_APICBASE:
3846                 msr_info->data = kvm_get_apic_base(vcpu);
3847                 break;
3848         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3849                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3850         case MSR_IA32_TSC_DEADLINE:
3851                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3852                 break;
3853         case MSR_IA32_TSC_ADJUST:
3854                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3855                 break;
3856         case MSR_IA32_MISC_ENABLE:
3857                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3858                 break;
3859         case MSR_IA32_SMBASE:
3860                 if (!msr_info->host_initiated)
3861                         return 1;
3862                 msr_info->data = vcpu->arch.smbase;
3863                 break;
3864         case MSR_SMI_COUNT:
3865                 msr_info->data = vcpu->arch.smi_count;
3866                 break;
3867         case MSR_IA32_PERF_STATUS:
3868                 /* TSC increment by tick */
3869                 msr_info->data = 1000ULL;
3870                 /* CPU multiplier */
3871                 msr_info->data |= (((uint64_t)4ULL) << 40);
3872                 break;
3873         case MSR_EFER:
3874                 msr_info->data = vcpu->arch.efer;
3875                 break;
3876         case MSR_KVM_WALL_CLOCK:
3877                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3878                         return 1;
3879
3880                 msr_info->data = vcpu->kvm->arch.wall_clock;
3881                 break;
3882         case MSR_KVM_WALL_CLOCK_NEW:
3883                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3884                         return 1;
3885
3886                 msr_info->data = vcpu->kvm->arch.wall_clock;
3887                 break;
3888         case MSR_KVM_SYSTEM_TIME:
3889                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3890                         return 1;
3891
3892                 msr_info->data = vcpu->arch.time;
3893                 break;
3894         case MSR_KVM_SYSTEM_TIME_NEW:
3895                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3896                         return 1;
3897
3898                 msr_info->data = vcpu->arch.time;
3899                 break;
3900         case MSR_KVM_ASYNC_PF_EN:
3901                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3902                         return 1;
3903
3904                 msr_info->data = vcpu->arch.apf.msr_en_val;
3905                 break;
3906         case MSR_KVM_ASYNC_PF_INT:
3907                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3908                         return 1;
3909
3910                 msr_info->data = vcpu->arch.apf.msr_int_val;
3911                 break;
3912         case MSR_KVM_ASYNC_PF_ACK:
3913                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3914                         return 1;
3915
3916                 msr_info->data = 0;
3917                 break;
3918         case MSR_KVM_STEAL_TIME:
3919                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3920                         return 1;
3921
3922                 msr_info->data = vcpu->arch.st.msr_val;
3923                 break;
3924         case MSR_KVM_PV_EOI_EN:
3925                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3926                         return 1;
3927
3928                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3929                 break;
3930         case MSR_KVM_POLL_CONTROL:
3931                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3932                         return 1;
3933
3934                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3935                 break;
3936         case MSR_IA32_P5_MC_ADDR:
3937         case MSR_IA32_P5_MC_TYPE:
3938         case MSR_IA32_MCG_CAP:
3939         case MSR_IA32_MCG_CTL:
3940         case MSR_IA32_MCG_STATUS:
3941         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3942                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3943                                    msr_info->host_initiated);
3944         case MSR_IA32_XSS:
3945                 if (!msr_info->host_initiated &&
3946                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3947                         return 1;
3948                 msr_info->data = vcpu->arch.ia32_xss;
3949                 break;
3950         case MSR_K7_CLK_CTL:
3951                 /*
3952                  * Provide expected ramp-up count for K7. All other
3953                  * are set to zero, indicating minimum divisors for
3954                  * every field.
3955                  *
3956                  * This prevents guest kernels on AMD host with CPU
3957                  * type 6, model 8 and higher from exploding due to
3958                  * the rdmsr failing.
3959                  */
3960                 msr_info->data = 0x20000000;
3961                 break;
3962         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3963         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3964         case HV_X64_MSR_SYNDBG_OPTIONS:
3965         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3966         case HV_X64_MSR_CRASH_CTL:
3967         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3968         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3969         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3970         case HV_X64_MSR_TSC_EMULATION_STATUS:
3971                 return kvm_hv_get_msr_common(vcpu,
3972                                              msr_info->index, &msr_info->data,
3973                                              msr_info->host_initiated);
3974         case MSR_IA32_BBL_CR_CTL3:
3975                 /* This legacy MSR exists but isn't fully documented in current
3976                  * silicon.  It is however accessed by winxp in very narrow
3977                  * scenarios where it sets bit #19, itself documented as
3978                  * a "reserved" bit.  Best effort attempt to source coherent
3979                  * read data here should the balance of the register be
3980                  * interpreted by the guest:
3981                  *
3982                  * L2 cache control register 3: 64GB range, 256KB size,
3983                  * enabled, latency 0x1, configured
3984                  */
3985                 msr_info->data = 0xbe702111;
3986                 break;
3987         case MSR_AMD64_OSVW_ID_LENGTH:
3988                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3989                         return 1;
3990                 msr_info->data = vcpu->arch.osvw.length;
3991                 break;
3992         case MSR_AMD64_OSVW_STATUS:
3993                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3994                         return 1;
3995                 msr_info->data = vcpu->arch.osvw.status;
3996                 break;
3997         case MSR_PLATFORM_INFO:
3998                 if (!msr_info->host_initiated &&
3999                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4000                         return 1;
4001                 msr_info->data = vcpu->arch.msr_platform_info;
4002                 break;
4003         case MSR_MISC_FEATURES_ENABLES:
4004                 msr_info->data = vcpu->arch.msr_misc_features_enables;
4005                 break;
4006         case MSR_K7_HWCR:
4007                 msr_info->data = vcpu->arch.msr_hwcr;
4008                 break;
4009         default:
4010                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4011                         return kvm_pmu_get_msr(vcpu, msr_info);
4012                 return KVM_MSR_RET_INVALID;
4013         }
4014         return 0;
4015 }
4016 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4017
4018 /*
4019  * Read or write a bunch of msrs. All parameters are kernel addresses.
4020  *
4021  * @return number of msrs set successfully.
4022  */
4023 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4024                     struct kvm_msr_entry *entries,
4025                     int (*do_msr)(struct kvm_vcpu *vcpu,
4026                                   unsigned index, u64 *data))
4027 {
4028         int i;
4029
4030         for (i = 0; i < msrs->nmsrs; ++i)
4031                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4032                         break;
4033
4034         return i;
4035 }
4036
4037 /*
4038  * Read or write a bunch of msrs. Parameters are user addresses.
4039  *
4040  * @return number of msrs set successfully.
4041  */
4042 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4043                   int (*do_msr)(struct kvm_vcpu *vcpu,
4044                                 unsigned index, u64 *data),
4045                   int writeback)
4046 {
4047         struct kvm_msrs msrs;
4048         struct kvm_msr_entry *entries;
4049         int r, n;
4050         unsigned size;
4051
4052         r = -EFAULT;
4053         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4054                 goto out;
4055
4056         r = -E2BIG;
4057         if (msrs.nmsrs >= MAX_IO_MSRS)
4058                 goto out;
4059
4060         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4061         entries = memdup_user(user_msrs->entries, size);
4062         if (IS_ERR(entries)) {
4063                 r = PTR_ERR(entries);
4064                 goto out;
4065         }
4066
4067         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4068         if (r < 0)
4069                 goto out_free;
4070
4071         r = -EFAULT;
4072         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4073                 goto out_free;
4074
4075         r = n;
4076
4077 out_free:
4078         kfree(entries);
4079 out:
4080         return r;
4081 }
4082
4083 static inline bool kvm_can_mwait_in_guest(void)
4084 {
4085         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4086                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4087                 boot_cpu_has(X86_FEATURE_ARAT);
4088 }
4089
4090 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4091                                             struct kvm_cpuid2 __user *cpuid_arg)
4092 {
4093         struct kvm_cpuid2 cpuid;
4094         int r;
4095
4096         r = -EFAULT;
4097         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4098                 return r;
4099
4100         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4101         if (r)
4102                 return r;
4103
4104         r = -EFAULT;
4105         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4106                 return r;
4107
4108         return 0;
4109 }
4110
4111 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4112 {
4113         int r = 0;
4114
4115         switch (ext) {
4116         case KVM_CAP_IRQCHIP:
4117         case KVM_CAP_HLT:
4118         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4119         case KVM_CAP_SET_TSS_ADDR:
4120         case KVM_CAP_EXT_CPUID:
4121         case KVM_CAP_EXT_EMUL_CPUID:
4122         case KVM_CAP_CLOCKSOURCE:
4123         case KVM_CAP_PIT:
4124         case KVM_CAP_NOP_IO_DELAY:
4125         case KVM_CAP_MP_STATE:
4126         case KVM_CAP_SYNC_MMU:
4127         case KVM_CAP_USER_NMI:
4128         case KVM_CAP_REINJECT_CONTROL:
4129         case KVM_CAP_IRQ_INJECT_STATUS:
4130         case KVM_CAP_IOEVENTFD:
4131         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4132         case KVM_CAP_PIT2:
4133         case KVM_CAP_PIT_STATE2:
4134         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4135         case KVM_CAP_VCPU_EVENTS:
4136         case KVM_CAP_HYPERV:
4137         case KVM_CAP_HYPERV_VAPIC:
4138         case KVM_CAP_HYPERV_SPIN:
4139         case KVM_CAP_HYPERV_SYNIC:
4140         case KVM_CAP_HYPERV_SYNIC2:
4141         case KVM_CAP_HYPERV_VP_INDEX:
4142         case KVM_CAP_HYPERV_EVENTFD:
4143         case KVM_CAP_HYPERV_TLBFLUSH:
4144         case KVM_CAP_HYPERV_SEND_IPI:
4145         case KVM_CAP_HYPERV_CPUID:
4146         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4147         case KVM_CAP_SYS_HYPERV_CPUID:
4148         case KVM_CAP_PCI_SEGMENT:
4149         case KVM_CAP_DEBUGREGS:
4150         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4151         case KVM_CAP_XSAVE:
4152         case KVM_CAP_ASYNC_PF:
4153         case KVM_CAP_ASYNC_PF_INT:
4154         case KVM_CAP_GET_TSC_KHZ:
4155         case KVM_CAP_KVMCLOCK_CTRL:
4156         case KVM_CAP_READONLY_MEM:
4157         case KVM_CAP_HYPERV_TIME:
4158         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4159         case KVM_CAP_TSC_DEADLINE_TIMER:
4160         case KVM_CAP_DISABLE_QUIRKS:
4161         case KVM_CAP_SET_BOOT_CPU_ID:
4162         case KVM_CAP_SPLIT_IRQCHIP:
4163         case KVM_CAP_IMMEDIATE_EXIT:
4164         case KVM_CAP_PMU_EVENT_FILTER:
4165         case KVM_CAP_GET_MSR_FEATURES:
4166         case KVM_CAP_MSR_PLATFORM_INFO:
4167         case KVM_CAP_EXCEPTION_PAYLOAD:
4168         case KVM_CAP_SET_GUEST_DEBUG:
4169         case KVM_CAP_LAST_CPU:
4170         case KVM_CAP_X86_USER_SPACE_MSR:
4171         case KVM_CAP_X86_MSR_FILTER:
4172         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4173 #ifdef CONFIG_X86_SGX_KVM
4174         case KVM_CAP_SGX_ATTRIBUTE:
4175 #endif
4176         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4177         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4178         case KVM_CAP_SREGS2:
4179         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4180         case KVM_CAP_VCPU_ATTRIBUTES:
4181                 r = 1;
4182                 break;
4183         case KVM_CAP_EXIT_HYPERCALL:
4184                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4185                 break;
4186         case KVM_CAP_SET_GUEST_DEBUG2:
4187                 return KVM_GUESTDBG_VALID_MASK;
4188 #ifdef CONFIG_KVM_XEN
4189         case KVM_CAP_XEN_HVM:
4190                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4191                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4192                     KVM_XEN_HVM_CONFIG_SHARED_INFO |
4193                     KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL;
4194                 if (sched_info_on())
4195                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4196                 break;
4197 #endif
4198         case KVM_CAP_SYNC_REGS:
4199                 r = KVM_SYNC_X86_VALID_FIELDS;
4200                 break;
4201         case KVM_CAP_ADJUST_CLOCK:
4202                 r = KVM_CLOCK_VALID_FLAGS;
4203                 break;
4204         case KVM_CAP_X86_DISABLE_EXITS:
4205                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4206                       KVM_X86_DISABLE_EXITS_CSTATE;
4207                 if(kvm_can_mwait_in_guest())
4208                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4209                 break;
4210         case KVM_CAP_X86_SMM:
4211                 /* SMBASE is usually relocated above 1M on modern chipsets,
4212                  * and SMM handlers might indeed rely on 4G segment limits,
4213                  * so do not report SMM to be available if real mode is
4214                  * emulated via vm86 mode.  Still, do not go to great lengths
4215                  * to avoid userspace's usage of the feature, because it is a
4216                  * fringe case that is not enabled except via specific settings
4217                  * of the module parameters.
4218                  */
4219                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4220                 break;
4221         case KVM_CAP_VAPIC:
4222                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4223                 break;
4224         case KVM_CAP_NR_VCPUS:
4225                 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4226                 break;
4227         case KVM_CAP_MAX_VCPUS:
4228                 r = KVM_MAX_VCPUS;
4229                 break;
4230         case KVM_CAP_MAX_VCPU_ID:
4231                 r = KVM_MAX_VCPU_IDS;
4232                 break;
4233         case KVM_CAP_PV_MMU:    /* obsolete */
4234                 r = 0;
4235                 break;
4236         case KVM_CAP_MCE:
4237                 r = KVM_MAX_MCE_BANKS;
4238                 break;
4239         case KVM_CAP_XCRS:
4240                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4241                 break;
4242         case KVM_CAP_TSC_CONTROL:
4243                 r = kvm_has_tsc_control;
4244                 break;
4245         case KVM_CAP_X2APIC_API:
4246                 r = KVM_X2APIC_API_VALID_FLAGS;
4247                 break;
4248         case KVM_CAP_NESTED_STATE:
4249                 r = kvm_x86_ops.nested_ops->get_state ?
4250                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4251                 break;
4252         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4253                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4254                 break;
4255         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4256                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4257                 break;
4258         case KVM_CAP_SMALLER_MAXPHYADDR:
4259                 r = (int) allow_smaller_maxphyaddr;
4260                 break;
4261         case KVM_CAP_STEAL_TIME:
4262                 r = sched_info_on();
4263                 break;
4264         case KVM_CAP_X86_BUS_LOCK_EXIT:
4265                 if (kvm_has_bus_lock_exit)
4266                         r = KVM_BUS_LOCK_DETECTION_OFF |
4267                             KVM_BUS_LOCK_DETECTION_EXIT;
4268                 else
4269                         r = 0;
4270                 break;
4271         default:
4272                 break;
4273         }
4274         return r;
4275
4276 }
4277
4278 long kvm_arch_dev_ioctl(struct file *filp,
4279                         unsigned int ioctl, unsigned long arg)
4280 {
4281         void __user *argp = (void __user *)arg;
4282         long r;
4283
4284         switch (ioctl) {
4285         case KVM_GET_MSR_INDEX_LIST: {
4286                 struct kvm_msr_list __user *user_msr_list = argp;
4287                 struct kvm_msr_list msr_list;
4288                 unsigned n;
4289
4290                 r = -EFAULT;
4291                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4292                         goto out;
4293                 n = msr_list.nmsrs;
4294                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4295                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4296                         goto out;
4297                 r = -E2BIG;
4298                 if (n < msr_list.nmsrs)
4299                         goto out;
4300                 r = -EFAULT;
4301                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4302                                  num_msrs_to_save * sizeof(u32)))
4303                         goto out;
4304                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4305                                  &emulated_msrs,
4306                                  num_emulated_msrs * sizeof(u32)))
4307                         goto out;
4308                 r = 0;
4309                 break;
4310         }
4311         case KVM_GET_SUPPORTED_CPUID:
4312         case KVM_GET_EMULATED_CPUID: {
4313                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4314                 struct kvm_cpuid2 cpuid;
4315
4316                 r = -EFAULT;
4317                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4318                         goto out;
4319
4320                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4321                                             ioctl);
4322                 if (r)
4323                         goto out;
4324
4325                 r = -EFAULT;
4326                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4327                         goto out;
4328                 r = 0;
4329                 break;
4330         }
4331         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4332                 r = -EFAULT;
4333                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4334                                  sizeof(kvm_mce_cap_supported)))
4335                         goto out;
4336                 r = 0;
4337                 break;
4338         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4339                 struct kvm_msr_list __user *user_msr_list = argp;
4340                 struct kvm_msr_list msr_list;
4341                 unsigned int n;
4342
4343                 r = -EFAULT;
4344                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4345                         goto out;
4346                 n = msr_list.nmsrs;
4347                 msr_list.nmsrs = num_msr_based_features;
4348                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4349                         goto out;
4350                 r = -E2BIG;
4351                 if (n < msr_list.nmsrs)
4352                         goto out;
4353                 r = -EFAULT;
4354                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4355                                  num_msr_based_features * sizeof(u32)))
4356                         goto out;
4357                 r = 0;
4358                 break;
4359         }
4360         case KVM_GET_MSRS:
4361                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4362                 break;
4363         case KVM_GET_SUPPORTED_HV_CPUID:
4364                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4365                 break;
4366         default:
4367                 r = -EINVAL;
4368                 break;
4369         }
4370 out:
4371         return r;
4372 }
4373
4374 static void wbinvd_ipi(void *garbage)
4375 {
4376         wbinvd();
4377 }
4378
4379 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4380 {
4381         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4382 }
4383
4384 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4385 {
4386         /* Address WBINVD may be executed by guest */
4387         if (need_emulate_wbinvd(vcpu)) {
4388                 if (static_call(kvm_x86_has_wbinvd_exit)())
4389                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4390                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4391                         smp_call_function_single(vcpu->cpu,
4392                                         wbinvd_ipi, NULL, 1);
4393         }
4394
4395         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4396
4397         /* Save host pkru register if supported */
4398         vcpu->arch.host_pkru = read_pkru();
4399
4400         /* Apply any externally detected TSC adjustments (due to suspend) */
4401         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4402                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4403                 vcpu->arch.tsc_offset_adjustment = 0;
4404                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4405         }
4406
4407         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4408                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4409                                 rdtsc() - vcpu->arch.last_host_tsc;
4410                 if (tsc_delta < 0)
4411                         mark_tsc_unstable("KVM discovered backwards TSC");
4412
4413                 if (kvm_check_tsc_unstable()) {
4414                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4415                                                 vcpu->arch.last_guest_tsc);
4416                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4417                         vcpu->arch.tsc_catchup = 1;
4418                 }
4419
4420                 if (kvm_lapic_hv_timer_in_use(vcpu))
4421                         kvm_lapic_restart_hv_timer(vcpu);
4422
4423                 /*
4424                  * On a host with synchronized TSC, there is no need to update
4425                  * kvmclock on vcpu->cpu migration
4426                  */
4427                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4428                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4429                 if (vcpu->cpu != cpu)
4430                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4431                 vcpu->cpu = cpu;
4432         }
4433
4434         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4435 }
4436
4437 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4438 {
4439         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4440         struct kvm_steal_time __user *st;
4441         struct kvm_memslots *slots;
4442         static const u8 preempted = KVM_VCPU_PREEMPTED;
4443
4444         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4445                 return;
4446
4447         if (vcpu->arch.st.preempted)
4448                 return;
4449
4450         /* This happens on process exit */
4451         if (unlikely(current->mm != vcpu->kvm->mm))
4452                 return;
4453
4454         slots = kvm_memslots(vcpu->kvm);
4455
4456         if (unlikely(slots->generation != ghc->generation ||
4457                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4458                 return;
4459
4460         st = (struct kvm_steal_time __user *)ghc->hva;
4461         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4462
4463         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4464                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4465
4466         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4467 }
4468
4469 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4470 {
4471         int idx;
4472
4473         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4474                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4475
4476         /*
4477          * Take the srcu lock as memslots will be accessed to check the gfn
4478          * cache generation against the memslots generation.
4479          */
4480         idx = srcu_read_lock(&vcpu->kvm->srcu);
4481         if (kvm_xen_msr_enabled(vcpu->kvm))
4482                 kvm_xen_runstate_set_preempted(vcpu);
4483         else
4484                 kvm_steal_time_set_preempted(vcpu);
4485         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4486
4487         static_call(kvm_x86_vcpu_put)(vcpu);
4488         vcpu->arch.last_host_tsc = rdtsc();
4489 }
4490
4491 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4492                                     struct kvm_lapic_state *s)
4493 {
4494         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4495
4496         return kvm_apic_get_state(vcpu, s);
4497 }
4498
4499 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4500                                     struct kvm_lapic_state *s)
4501 {
4502         int r;
4503
4504         r = kvm_apic_set_state(vcpu, s);
4505         if (r)
4506                 return r;
4507         update_cr8_intercept(vcpu);
4508
4509         return 0;
4510 }
4511
4512 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4513 {
4514         /*
4515          * We can accept userspace's request for interrupt injection
4516          * as long as we have a place to store the interrupt number.
4517          * The actual injection will happen when the CPU is able to
4518          * deliver the interrupt.
4519          */
4520         if (kvm_cpu_has_extint(vcpu))
4521                 return false;
4522
4523         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4524         return (!lapic_in_kernel(vcpu) ||
4525                 kvm_apic_accept_pic_intr(vcpu));
4526 }
4527
4528 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4529 {
4530         /*
4531          * Do not cause an interrupt window exit if an exception
4532          * is pending or an event needs reinjection; userspace
4533          * might want to inject the interrupt manually using KVM_SET_REGS
4534          * or KVM_SET_SREGS.  For that to work, we must be at an
4535          * instruction boundary and with no events half-injected.
4536          */
4537         return (kvm_arch_interrupt_allowed(vcpu) &&
4538                 kvm_cpu_accept_dm_intr(vcpu) &&
4539                 !kvm_event_needs_reinjection(vcpu) &&
4540                 !vcpu->arch.exception.pending);
4541 }
4542
4543 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4544                                     struct kvm_interrupt *irq)
4545 {
4546         if (irq->irq >= KVM_NR_INTERRUPTS)
4547                 return -EINVAL;
4548
4549         if (!irqchip_in_kernel(vcpu->kvm)) {
4550                 kvm_queue_interrupt(vcpu, irq->irq, false);
4551                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4552                 return 0;
4553         }
4554
4555         /*
4556          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4557          * fail for in-kernel 8259.
4558          */
4559         if (pic_in_kernel(vcpu->kvm))
4560                 return -ENXIO;
4561
4562         if (vcpu->arch.pending_external_vector != -1)
4563                 return -EEXIST;
4564
4565         vcpu->arch.pending_external_vector = irq->irq;
4566         kvm_make_request(KVM_REQ_EVENT, vcpu);
4567         return 0;
4568 }
4569
4570 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4571 {
4572         kvm_inject_nmi(vcpu);
4573
4574         return 0;
4575 }
4576
4577 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4578 {
4579         kvm_make_request(KVM_REQ_SMI, vcpu);
4580
4581         return 0;
4582 }
4583
4584 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4585                                            struct kvm_tpr_access_ctl *tac)
4586 {
4587         if (tac->flags)
4588                 return -EINVAL;
4589         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4590         return 0;
4591 }
4592
4593 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4594                                         u64 mcg_cap)
4595 {
4596         int r;
4597         unsigned bank_num = mcg_cap & 0xff, bank;
4598
4599         r = -EINVAL;
4600         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4601                 goto out;
4602         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4603                 goto out;
4604         r = 0;
4605         vcpu->arch.mcg_cap = mcg_cap;
4606         /* Init IA32_MCG_CTL to all 1s */
4607         if (mcg_cap & MCG_CTL_P)
4608                 vcpu->arch.mcg_ctl = ~(u64)0;
4609         /* Init IA32_MCi_CTL to all 1s */
4610         for (bank = 0; bank < bank_num; bank++)
4611                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4612
4613         static_call(kvm_x86_setup_mce)(vcpu);
4614 out:
4615         return r;
4616 }
4617
4618 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4619                                       struct kvm_x86_mce *mce)
4620 {
4621         u64 mcg_cap = vcpu->arch.mcg_cap;
4622         unsigned bank_num = mcg_cap & 0xff;
4623         u64 *banks = vcpu->arch.mce_banks;
4624
4625         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4626                 return -EINVAL;
4627         /*
4628          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4629          * reporting is disabled
4630          */
4631         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4632             vcpu->arch.mcg_ctl != ~(u64)0)
4633                 return 0;
4634         banks += 4 * mce->bank;
4635         /*
4636          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4637          * reporting is disabled for the bank
4638          */
4639         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4640                 return 0;
4641         if (mce->status & MCI_STATUS_UC) {
4642                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4643                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4644                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4645                         return 0;
4646                 }
4647                 if (banks[1] & MCI_STATUS_VAL)
4648                         mce->status |= MCI_STATUS_OVER;
4649                 banks[2] = mce->addr;
4650                 banks[3] = mce->misc;
4651                 vcpu->arch.mcg_status = mce->mcg_status;
4652                 banks[1] = mce->status;
4653                 kvm_queue_exception(vcpu, MC_VECTOR);
4654         } else if (!(banks[1] & MCI_STATUS_VAL)
4655                    || !(banks[1] & MCI_STATUS_UC)) {
4656                 if (banks[1] & MCI_STATUS_VAL)
4657                         mce->status |= MCI_STATUS_OVER;
4658                 banks[2] = mce->addr;
4659                 banks[3] = mce->misc;
4660                 banks[1] = mce->status;
4661         } else
4662                 banks[1] |= MCI_STATUS_OVER;
4663         return 0;
4664 }
4665
4666 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4667                                                struct kvm_vcpu_events *events)
4668 {
4669         process_nmi(vcpu);
4670
4671         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4672                 process_smi(vcpu);
4673
4674         /*
4675          * In guest mode, payload delivery should be deferred,
4676          * so that the L1 hypervisor can intercept #PF before
4677          * CR2 is modified (or intercept #DB before DR6 is
4678          * modified under nVMX). Unless the per-VM capability,
4679          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4680          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4681          * opportunistically defer the exception payload, deliver it if the
4682          * capability hasn't been requested before processing a
4683          * KVM_GET_VCPU_EVENTS.
4684          */
4685         if (!vcpu->kvm->arch.exception_payload_enabled &&
4686             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4687                 kvm_deliver_exception_payload(vcpu);
4688
4689         /*
4690          * The API doesn't provide the instruction length for software
4691          * exceptions, so don't report them. As long as the guest RIP
4692          * isn't advanced, we should expect to encounter the exception
4693          * again.
4694          */
4695         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4696                 events->exception.injected = 0;
4697                 events->exception.pending = 0;
4698         } else {
4699                 events->exception.injected = vcpu->arch.exception.injected;
4700                 events->exception.pending = vcpu->arch.exception.pending;
4701                 /*
4702                  * For ABI compatibility, deliberately conflate
4703                  * pending and injected exceptions when
4704                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4705                  */
4706                 if (!vcpu->kvm->arch.exception_payload_enabled)
4707                         events->exception.injected |=
4708                                 vcpu->arch.exception.pending;
4709         }
4710         events->exception.nr = vcpu->arch.exception.nr;
4711         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4712         events->exception.error_code = vcpu->arch.exception.error_code;
4713         events->exception_has_payload = vcpu->arch.exception.has_payload;
4714         events->exception_payload = vcpu->arch.exception.payload;
4715
4716         events->interrupt.injected =
4717                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4718         events->interrupt.nr = vcpu->arch.interrupt.nr;
4719         events->interrupt.soft = 0;
4720         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4721
4722         events->nmi.injected = vcpu->arch.nmi_injected;
4723         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4724         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4725         events->nmi.pad = 0;
4726
4727         events->sipi_vector = 0; /* never valid when reporting to user space */
4728
4729         events->smi.smm = is_smm(vcpu);
4730         events->smi.pending = vcpu->arch.smi_pending;
4731         events->smi.smm_inside_nmi =
4732                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4733         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4734
4735         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4736                          | KVM_VCPUEVENT_VALID_SHADOW
4737                          | KVM_VCPUEVENT_VALID_SMM);
4738         if (vcpu->kvm->arch.exception_payload_enabled)
4739                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4740
4741         memset(&events->reserved, 0, sizeof(events->reserved));
4742 }
4743
4744 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4745
4746 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4747                                               struct kvm_vcpu_events *events)
4748 {
4749         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4750                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4751                               | KVM_VCPUEVENT_VALID_SHADOW
4752                               | KVM_VCPUEVENT_VALID_SMM
4753                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4754                 return -EINVAL;
4755
4756         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4757                 if (!vcpu->kvm->arch.exception_payload_enabled)
4758                         return -EINVAL;
4759                 if (events->exception.pending)
4760                         events->exception.injected = 0;
4761                 else
4762                         events->exception_has_payload = 0;
4763         } else {
4764                 events->exception.pending = 0;
4765                 events->exception_has_payload = 0;
4766         }
4767
4768         if ((events->exception.injected || events->exception.pending) &&
4769             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4770                 return -EINVAL;
4771
4772         /* INITs are latched while in SMM */
4773         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4774             (events->smi.smm || events->smi.pending) &&
4775             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4776                 return -EINVAL;
4777
4778         process_nmi(vcpu);
4779         vcpu->arch.exception.injected = events->exception.injected;
4780         vcpu->arch.exception.pending = events->exception.pending;
4781         vcpu->arch.exception.nr = events->exception.nr;
4782         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4783         vcpu->arch.exception.error_code = events->exception.error_code;
4784         vcpu->arch.exception.has_payload = events->exception_has_payload;
4785         vcpu->arch.exception.payload = events->exception_payload;
4786
4787         vcpu->arch.interrupt.injected = events->interrupt.injected;
4788         vcpu->arch.interrupt.nr = events->interrupt.nr;
4789         vcpu->arch.interrupt.soft = events->interrupt.soft;
4790         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4791                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4792                                                 events->interrupt.shadow);
4793
4794         vcpu->arch.nmi_injected = events->nmi.injected;
4795         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4796                 vcpu->arch.nmi_pending = events->nmi.pending;
4797         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4798
4799         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4800             lapic_in_kernel(vcpu))
4801                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4802
4803         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4804                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4805                         kvm_smm_changed(vcpu, events->smi.smm);
4806
4807                 vcpu->arch.smi_pending = events->smi.pending;
4808
4809                 if (events->smi.smm) {
4810                         if (events->smi.smm_inside_nmi)
4811                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4812                         else
4813                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4814                 }
4815
4816                 if (lapic_in_kernel(vcpu)) {
4817                         if (events->smi.latched_init)
4818                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4819                         else
4820                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4821                 }
4822         }
4823
4824         kvm_make_request(KVM_REQ_EVENT, vcpu);
4825
4826         return 0;
4827 }
4828
4829 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4830                                              struct kvm_debugregs *dbgregs)
4831 {
4832         unsigned long val;
4833
4834         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4835         kvm_get_dr(vcpu, 6, &val);
4836         dbgregs->dr6 = val;
4837         dbgregs->dr7 = vcpu->arch.dr7;
4838         dbgregs->flags = 0;
4839         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4840 }
4841
4842 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4843                                             struct kvm_debugregs *dbgregs)
4844 {
4845         if (dbgregs->flags)
4846                 return -EINVAL;
4847
4848         if (!kvm_dr6_valid(dbgregs->dr6))
4849                 return -EINVAL;
4850         if (!kvm_dr7_valid(dbgregs->dr7))
4851                 return -EINVAL;
4852
4853         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4854         kvm_update_dr0123(vcpu);
4855         vcpu->arch.dr6 = dbgregs->dr6;
4856         vcpu->arch.dr7 = dbgregs->dr7;
4857         kvm_update_dr7(vcpu);
4858
4859         return 0;
4860 }
4861
4862 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4863                                          struct kvm_xsave *guest_xsave)
4864 {
4865         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
4866                 return;
4867
4868         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
4869                                        guest_xsave->region,
4870                                        sizeof(guest_xsave->region),
4871                                        vcpu->arch.pkru);
4872 }
4873
4874 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4875                                         struct kvm_xsave *guest_xsave)
4876 {
4877         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
4878                 return 0;
4879
4880         return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
4881                                               guest_xsave->region,
4882                                               supported_xcr0, &vcpu->arch.pkru);
4883 }
4884
4885 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4886                                         struct kvm_xcrs *guest_xcrs)
4887 {
4888         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4889                 guest_xcrs->nr_xcrs = 0;
4890                 return;
4891         }
4892
4893         guest_xcrs->nr_xcrs = 1;
4894         guest_xcrs->flags = 0;
4895         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4896         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4897 }
4898
4899 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4900                                        struct kvm_xcrs *guest_xcrs)
4901 {
4902         int i, r = 0;
4903
4904         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4905                 return -EINVAL;
4906
4907         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4908                 return -EINVAL;
4909
4910         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4911                 /* Only support XCR0 currently */
4912                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4913                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4914                                 guest_xcrs->xcrs[i].value);
4915                         break;
4916                 }
4917         if (r)
4918                 r = -EINVAL;
4919         return r;
4920 }
4921
4922 /*
4923  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4924  * stopped by the hypervisor.  This function will be called from the host only.
4925  * EINVAL is returned when the host attempts to set the flag for a guest that
4926  * does not support pv clocks.
4927  */
4928 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4929 {
4930         if (!vcpu->arch.pv_time_enabled)
4931                 return -EINVAL;
4932         vcpu->arch.pvclock_set_guest_stopped_request = true;
4933         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4934         return 0;
4935 }
4936
4937 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
4938                                  struct kvm_device_attr *attr)
4939 {
4940         int r;
4941
4942         switch (attr->attr) {
4943         case KVM_VCPU_TSC_OFFSET:
4944                 r = 0;
4945                 break;
4946         default:
4947                 r = -ENXIO;
4948         }
4949
4950         return r;
4951 }
4952
4953 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
4954                                  struct kvm_device_attr *attr)
4955 {
4956         u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;
4957         int r;
4958
4959         if ((u64)(unsigned long)uaddr != attr->addr)
4960                 return -EFAULT;
4961
4962         switch (attr->attr) {
4963         case KVM_VCPU_TSC_OFFSET:
4964                 r = -EFAULT;
4965                 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
4966                         break;
4967                 r = 0;
4968                 break;
4969         default:
4970                 r = -ENXIO;
4971         }
4972
4973         return r;
4974 }
4975
4976 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
4977                                  struct kvm_device_attr *attr)
4978 {
4979         u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;
4980         struct kvm *kvm = vcpu->kvm;
4981         int r;
4982
4983         if ((u64)(unsigned long)uaddr != attr->addr)
4984                 return -EFAULT;
4985
4986         switch (attr->attr) {
4987         case KVM_VCPU_TSC_OFFSET: {
4988                 u64 offset, tsc, ns;
4989                 unsigned long flags;
4990                 bool matched;
4991
4992                 r = -EFAULT;
4993                 if (get_user(offset, uaddr))
4994                         break;
4995
4996                 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
4997
4998                 matched = (vcpu->arch.virtual_tsc_khz &&
4999                            kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5000                            kvm->arch.last_tsc_offset == offset);
5001
5002                 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5003                 ns = get_kvmclock_base_ns();
5004
5005                 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5006                 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5007
5008                 r = 0;
5009                 break;
5010         }
5011         default:
5012                 r = -ENXIO;
5013         }
5014
5015         return r;
5016 }
5017
5018 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5019                                       unsigned int ioctl,
5020                                       void __user *argp)
5021 {
5022         struct kvm_device_attr attr;
5023         int r;
5024
5025         if (copy_from_user(&attr, argp, sizeof(attr)))
5026                 return -EFAULT;
5027
5028         if (attr.group != KVM_VCPU_TSC_CTRL)
5029                 return -ENXIO;
5030
5031         switch (ioctl) {
5032         case KVM_HAS_DEVICE_ATTR:
5033                 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5034                 break;
5035         case KVM_GET_DEVICE_ATTR:
5036                 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5037                 break;
5038         case KVM_SET_DEVICE_ATTR:
5039                 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5040                 break;
5041         }
5042
5043         return r;
5044 }
5045
5046 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5047                                      struct kvm_enable_cap *cap)
5048 {
5049         int r;
5050         uint16_t vmcs_version;
5051         void __user *user_ptr;
5052
5053         if (cap->flags)
5054                 return -EINVAL;
5055
5056         switch (cap->cap) {
5057         case KVM_CAP_HYPERV_SYNIC2:
5058                 if (cap->args[0])
5059                         return -EINVAL;
5060                 fallthrough;
5061
5062         case KVM_CAP_HYPERV_SYNIC:
5063                 if (!irqchip_in_kernel(vcpu->kvm))
5064                         return -EINVAL;
5065                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5066                                              KVM_CAP_HYPERV_SYNIC2);
5067         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5068                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5069                         return -ENOTTY;
5070                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5071                 if (!r) {
5072                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5073                         if (copy_to_user(user_ptr, &vmcs_version,
5074                                          sizeof(vmcs_version)))
5075                                 r = -EFAULT;
5076                 }
5077                 return r;
5078         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5079                 if (!kvm_x86_ops.enable_direct_tlbflush)
5080                         return -ENOTTY;
5081
5082                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5083
5084         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5085                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5086
5087         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5088                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5089                 if (vcpu->arch.pv_cpuid.enforce)
5090                         kvm_update_pv_runtime(vcpu);
5091
5092                 return 0;
5093         default:
5094                 return -EINVAL;
5095         }
5096 }
5097
5098 long kvm_arch_vcpu_ioctl(struct file *filp,
5099                          unsigned int ioctl, unsigned long arg)
5100 {
5101         struct kvm_vcpu *vcpu = filp->private_data;
5102         void __user *argp = (void __user *)arg;
5103         int r;
5104         union {
5105                 struct kvm_sregs2 *sregs2;
5106                 struct kvm_lapic_state *lapic;
5107                 struct kvm_xsave *xsave;
5108                 struct kvm_xcrs *xcrs;
5109                 void *buffer;
5110         } u;
5111
5112         vcpu_load(vcpu);
5113
5114         u.buffer = NULL;
5115         switch (ioctl) {
5116         case KVM_GET_LAPIC: {
5117                 r = -EINVAL;
5118                 if (!lapic_in_kernel(vcpu))
5119                         goto out;
5120                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5121                                 GFP_KERNEL_ACCOUNT);
5122
5123                 r = -ENOMEM;
5124                 if (!u.lapic)
5125                         goto out;
5126                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5127                 if (r)
5128                         goto out;
5129                 r = -EFAULT;
5130                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5131                         goto out;
5132                 r = 0;
5133                 break;
5134         }
5135         case KVM_SET_LAPIC: {
5136                 r = -EINVAL;
5137                 if (!lapic_in_kernel(vcpu))
5138                         goto out;
5139                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5140                 if (IS_ERR(u.lapic)) {
5141                         r = PTR_ERR(u.lapic);
5142                         goto out_nofree;
5143                 }
5144
5145                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5146                 break;
5147         }
5148         case KVM_INTERRUPT: {
5149                 struct kvm_interrupt irq;
5150
5151                 r = -EFAULT;
5152                 if (copy_from_user(&irq, argp, sizeof(irq)))
5153                         goto out;
5154                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5155                 break;
5156         }
5157         case KVM_NMI: {
5158                 r = kvm_vcpu_ioctl_nmi(vcpu);
5159                 break;
5160         }
5161         case KVM_SMI: {
5162                 r = kvm_vcpu_ioctl_smi(vcpu);
5163                 break;
5164         }
5165         case KVM_SET_CPUID: {
5166                 struct kvm_cpuid __user *cpuid_arg = argp;
5167                 struct kvm_cpuid cpuid;
5168
5169                 /*
5170                  * KVM does not correctly handle changing guest CPUID after KVM_RUN, as
5171                  * MAXPHYADDR, GBPAGES support, AMD reserved bit behavior, etc.. aren't
5172                  * tracked in kvm_mmu_page_role.  As a result, KVM may miss guest page
5173                  * faults due to reusing SPs/SPTEs.  In practice no sane VMM mucks with
5174                  * the core vCPU model on the fly, so fail.
5175                  */
5176                 r = -EINVAL;
5177                 if (vcpu->arch.last_vmentry_cpu != -1)
5178                         goto out;
5179
5180                 r = -EFAULT;
5181                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5182                         goto out;
5183                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5184                 break;
5185         }
5186         case KVM_SET_CPUID2: {
5187                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5188                 struct kvm_cpuid2 cpuid;
5189
5190                 /*
5191                  * KVM_SET_CPUID{,2} after KVM_RUN is forbidded, see the comment in
5192                  * KVM_SET_CPUID case above.
5193                  */
5194                 r = -EINVAL;
5195                 if (vcpu->arch.last_vmentry_cpu != -1)
5196                         goto out;
5197
5198                 r = -EFAULT;
5199                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5200                         goto out;
5201                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5202                                               cpuid_arg->entries);
5203                 break;
5204         }
5205         case KVM_GET_CPUID2: {
5206                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5207                 struct kvm_cpuid2 cpuid;
5208
5209                 r = -EFAULT;
5210                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5211                         goto out;
5212                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5213                                               cpuid_arg->entries);
5214                 if (r)
5215                         goto out;
5216                 r = -EFAULT;
5217                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5218                         goto out;
5219                 r = 0;
5220                 break;
5221         }
5222         case KVM_GET_MSRS: {
5223                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5224                 r = msr_io(vcpu, argp, do_get_msr, 1);
5225                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5226                 break;
5227         }
5228         case KVM_SET_MSRS: {
5229                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5230                 r = msr_io(vcpu, argp, do_set_msr, 0);
5231                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5232                 break;
5233         }
5234         case KVM_TPR_ACCESS_REPORTING: {
5235                 struct kvm_tpr_access_ctl tac;
5236
5237                 r = -EFAULT;
5238                 if (copy_from_user(&tac, argp, sizeof(tac)))
5239                         goto out;
5240                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5241                 if (r)
5242                         goto out;
5243                 r = -EFAULT;
5244                 if (copy_to_user(argp, &tac, sizeof(tac)))
5245                         goto out;
5246                 r = 0;
5247                 break;
5248         };
5249         case KVM_SET_VAPIC_ADDR: {
5250                 struct kvm_vapic_addr va;
5251                 int idx;
5252
5253                 r = -EINVAL;
5254                 if (!lapic_in_kernel(vcpu))
5255                         goto out;
5256                 r = -EFAULT;
5257                 if (copy_from_user(&va, argp, sizeof(va)))
5258                         goto out;
5259                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5260                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5261                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5262                 break;
5263         }
5264         case KVM_X86_SETUP_MCE: {
5265                 u64 mcg_cap;
5266
5267                 r = -EFAULT;
5268                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5269                         goto out;
5270                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5271                 break;
5272         }
5273         case KVM_X86_SET_MCE: {
5274                 struct kvm_x86_mce mce;
5275
5276                 r = -EFAULT;
5277                 if (copy_from_user(&mce, argp, sizeof(mce)))
5278                         goto out;
5279                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5280                 break;
5281         }
5282         case KVM_GET_VCPU_EVENTS: {
5283                 struct kvm_vcpu_events events;
5284
5285                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5286
5287                 r = -EFAULT;
5288                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5289                         break;
5290                 r = 0;
5291                 break;
5292         }
5293         case KVM_SET_VCPU_EVENTS: {
5294                 struct kvm_vcpu_events events;
5295
5296                 r = -EFAULT;
5297                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5298                         break;
5299
5300                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5301                 break;
5302         }
5303         case KVM_GET_DEBUGREGS: {
5304                 struct kvm_debugregs dbgregs;
5305
5306                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5307
5308                 r = -EFAULT;
5309                 if (copy_to_user(argp, &dbgregs,
5310                                  sizeof(struct kvm_debugregs)))
5311                         break;
5312                 r = 0;
5313                 break;
5314         }
5315         case KVM_SET_DEBUGREGS: {
5316                 struct kvm_debugregs dbgregs;
5317
5318                 r = -EFAULT;
5319                 if (copy_from_user(&dbgregs, argp,
5320                                    sizeof(struct kvm_debugregs)))
5321                         break;
5322
5323                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5324                 break;
5325         }
5326         case KVM_GET_XSAVE: {
5327                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5328                 r = -ENOMEM;
5329                 if (!u.xsave)
5330                         break;
5331
5332                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5333
5334                 r = -EFAULT;
5335                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5336                         break;
5337                 r = 0;
5338                 break;
5339         }
5340         case KVM_SET_XSAVE: {
5341                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5342                 if (IS_ERR(u.xsave)) {
5343                         r = PTR_ERR(u.xsave);
5344                         goto out_nofree;
5345                 }
5346
5347                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5348                 break;
5349         }
5350         case KVM_GET_XCRS: {
5351                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5352                 r = -ENOMEM;
5353                 if (!u.xcrs)
5354                         break;
5355
5356                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5357
5358                 r = -EFAULT;
5359                 if (copy_to_user(argp, u.xcrs,
5360                                  sizeof(struct kvm_xcrs)))
5361                         break;
5362                 r = 0;
5363                 break;
5364         }
5365         case KVM_SET_XCRS: {
5366                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5367                 if (IS_ERR(u.xcrs)) {
5368                         r = PTR_ERR(u.xcrs);
5369                         goto out_nofree;
5370                 }
5371
5372                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5373                 break;
5374         }
5375         case KVM_SET_TSC_KHZ: {
5376                 u32 user_tsc_khz;
5377
5378                 r = -EINVAL;
5379                 user_tsc_khz = (u32)arg;
5380
5381                 if (kvm_has_tsc_control &&
5382                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5383                         goto out;
5384
5385                 if (user_tsc_khz == 0)
5386                         user_tsc_khz = tsc_khz;
5387
5388                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5389                         r = 0;
5390
5391                 goto out;
5392         }
5393         case KVM_GET_TSC_KHZ: {
5394                 r = vcpu->arch.virtual_tsc_khz;
5395                 goto out;
5396         }
5397         case KVM_KVMCLOCK_CTRL: {
5398                 r = kvm_set_guest_paused(vcpu);
5399                 goto out;
5400         }
5401         case KVM_ENABLE_CAP: {
5402                 struct kvm_enable_cap cap;
5403
5404                 r = -EFAULT;
5405                 if (copy_from_user(&cap, argp, sizeof(cap)))
5406                         goto out;
5407                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5408                 break;
5409         }
5410         case KVM_GET_NESTED_STATE: {
5411                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5412                 u32 user_data_size;
5413
5414                 r = -EINVAL;
5415                 if (!kvm_x86_ops.nested_ops->get_state)
5416                         break;
5417
5418                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5419                 r = -EFAULT;
5420                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5421                         break;
5422
5423                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5424                                                      user_data_size);
5425                 if (r < 0)
5426                         break;
5427
5428                 if (r > user_data_size) {
5429                         if (put_user(r, &user_kvm_nested_state->size))
5430                                 r = -EFAULT;
5431                         else
5432                                 r = -E2BIG;
5433                         break;
5434                 }
5435
5436                 r = 0;
5437                 break;
5438         }
5439         case KVM_SET_NESTED_STATE: {
5440                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5441                 struct kvm_nested_state kvm_state;
5442                 int idx;
5443
5444                 r = -EINVAL;
5445                 if (!kvm_x86_ops.nested_ops->set_state)
5446                         break;
5447
5448                 r = -EFAULT;
5449                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5450                         break;
5451
5452                 r = -EINVAL;
5453                 if (kvm_state.size < sizeof(kvm_state))
5454                         break;
5455
5456                 if (kvm_state.flags &
5457                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5458                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5459                       | KVM_STATE_NESTED_GIF_SET))
5460                         break;
5461
5462                 /* nested_run_pending implies guest_mode.  */
5463                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5464                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5465                         break;
5466
5467                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5468                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5469                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5470                 break;
5471         }
5472         case KVM_GET_SUPPORTED_HV_CPUID:
5473                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5474                 break;
5475 #ifdef CONFIG_KVM_XEN
5476         case KVM_XEN_VCPU_GET_ATTR: {
5477                 struct kvm_xen_vcpu_attr xva;
5478
5479                 r = -EFAULT;
5480                 if (copy_from_user(&xva, argp, sizeof(xva)))
5481                         goto out;
5482                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5483                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5484                         r = -EFAULT;
5485                 break;
5486         }
5487         case KVM_XEN_VCPU_SET_ATTR: {
5488                 struct kvm_xen_vcpu_attr xva;
5489
5490                 r = -EFAULT;
5491                 if (copy_from_user(&xva, argp, sizeof(xva)))
5492                         goto out;
5493                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5494                 break;
5495         }
5496 #endif
5497         case KVM_GET_SREGS2: {
5498                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5499                 r = -ENOMEM;
5500                 if (!u.sregs2)
5501                         goto out;
5502                 __get_sregs2(vcpu, u.sregs2);
5503                 r = -EFAULT;
5504                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5505                         goto out;
5506                 r = 0;
5507                 break;
5508         }
5509         case KVM_SET_SREGS2: {
5510                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5511                 if (IS_ERR(u.sregs2)) {
5512                         r = PTR_ERR(u.sregs2);
5513                         u.sregs2 = NULL;
5514                         goto out;
5515                 }
5516                 r = __set_sregs2(vcpu, u.sregs2);
5517                 break;
5518         }
5519         case KVM_HAS_DEVICE_ATTR:
5520         case KVM_GET_DEVICE_ATTR:
5521         case KVM_SET_DEVICE_ATTR:
5522                 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5523                 break;
5524         default:
5525                 r = -EINVAL;
5526         }
5527 out:
5528         kfree(u.buffer);
5529 out_nofree:
5530         vcpu_put(vcpu);
5531         return r;
5532 }
5533
5534 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5535 {
5536         return VM_FAULT_SIGBUS;
5537 }
5538
5539 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5540 {
5541         int ret;
5542
5543         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5544                 return -EINVAL;
5545         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5546         return ret;
5547 }
5548
5549 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5550                                               u64 ident_addr)
5551 {
5552         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5553 }
5554
5555 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5556                                          unsigned long kvm_nr_mmu_pages)
5557 {
5558         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5559                 return -EINVAL;
5560
5561         mutex_lock(&kvm->slots_lock);
5562
5563         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5564         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5565
5566         mutex_unlock(&kvm->slots_lock);
5567         return 0;
5568 }
5569
5570 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5571 {
5572         return kvm->arch.n_max_mmu_pages;
5573 }
5574
5575 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5576 {
5577         struct kvm_pic *pic = kvm->arch.vpic;
5578         int r;
5579
5580         r = 0;
5581         switch (chip->chip_id) {
5582         case KVM_IRQCHIP_PIC_MASTER:
5583                 memcpy(&chip->chip.pic, &pic->pics[0],
5584                         sizeof(struct kvm_pic_state));
5585                 break;
5586         case KVM_IRQCHIP_PIC_SLAVE:
5587                 memcpy(&chip->chip.pic, &pic->pics[1],
5588                         sizeof(struct kvm_pic_state));
5589                 break;
5590         case KVM_IRQCHIP_IOAPIC:
5591                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5592                 break;
5593         default:
5594                 r = -EINVAL;
5595                 break;
5596         }
5597         return r;
5598 }
5599
5600 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5601 {
5602         struct kvm_pic *pic = kvm->arch.vpic;
5603         int r;
5604
5605         r = 0;
5606         switch (chip->chip_id) {
5607         case KVM_IRQCHIP_PIC_MASTER:
5608                 spin_lock(&pic->lock);
5609                 memcpy(&pic->pics[0], &chip->chip.pic,
5610                         sizeof(struct kvm_pic_state));
5611                 spin_unlock(&pic->lock);
5612                 break;
5613         case KVM_IRQCHIP_PIC_SLAVE:
5614                 spin_lock(&pic->lock);
5615                 memcpy(&pic->pics[1], &chip->chip.pic,
5616                         sizeof(struct kvm_pic_state));
5617                 spin_unlock(&pic->lock);
5618                 break;
5619         case KVM_IRQCHIP_IOAPIC:
5620                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5621                 break;
5622         default:
5623                 r = -EINVAL;
5624                 break;
5625         }
5626         kvm_pic_update_irq(pic);
5627         return r;
5628 }
5629
5630 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5631 {
5632         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5633
5634         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5635
5636         mutex_lock(&kps->lock);
5637         memcpy(ps, &kps->channels, sizeof(*ps));
5638         mutex_unlock(&kps->lock);
5639         return 0;
5640 }
5641
5642 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5643 {
5644         int i;
5645         struct kvm_pit *pit = kvm->arch.vpit;
5646
5647         mutex_lock(&pit->pit_state.lock);
5648         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5649         for (i = 0; i < 3; i++)
5650                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5651         mutex_unlock(&pit->pit_state.lock);
5652         return 0;
5653 }
5654
5655 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5656 {
5657         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5658         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5659                 sizeof(ps->channels));
5660         ps->flags = kvm->arch.vpit->pit_state.flags;
5661         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5662         memset(&ps->reserved, 0, sizeof(ps->reserved));
5663         return 0;
5664 }
5665
5666 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5667 {
5668         int start = 0;
5669         int i;
5670         u32 prev_legacy, cur_legacy;
5671         struct kvm_pit *pit = kvm->arch.vpit;
5672
5673         mutex_lock(&pit->pit_state.lock);
5674         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5675         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5676         if (!prev_legacy && cur_legacy)
5677                 start = 1;
5678         memcpy(&pit->pit_state.channels, &ps->channels,
5679                sizeof(pit->pit_state.channels));
5680         pit->pit_state.flags = ps->flags;
5681         for (i = 0; i < 3; i++)
5682                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5683                                    start && i == 0);
5684         mutex_unlock(&pit->pit_state.lock);
5685         return 0;
5686 }
5687
5688 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5689                                  struct kvm_reinject_control *control)
5690 {
5691         struct kvm_pit *pit = kvm->arch.vpit;
5692
5693         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5694          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5695          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5696          */
5697         mutex_lock(&pit->pit_state.lock);
5698         kvm_pit_set_reinject(pit, control->pit_reinject);
5699         mutex_unlock(&pit->pit_state.lock);
5700
5701         return 0;
5702 }
5703
5704 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5705 {
5706
5707         /*
5708          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5709          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5710          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5711          * VM-Exit.
5712          */
5713         struct kvm_vcpu *vcpu;
5714         unsigned long i;
5715
5716         kvm_for_each_vcpu(i, vcpu, kvm)
5717                 kvm_vcpu_kick(vcpu);
5718 }
5719
5720 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5721                         bool line_status)
5722 {
5723         if (!irqchip_in_kernel(kvm))
5724                 return -ENXIO;
5725
5726         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5727                                         irq_event->irq, irq_event->level,
5728                                         line_status);
5729         return 0;
5730 }
5731
5732 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5733                             struct kvm_enable_cap *cap)
5734 {
5735         int r;
5736
5737         if (cap->flags)
5738                 return -EINVAL;
5739
5740         switch (cap->cap) {
5741         case KVM_CAP_DISABLE_QUIRKS:
5742                 kvm->arch.disabled_quirks = cap->args[0];
5743                 r = 0;
5744                 break;
5745         case KVM_CAP_SPLIT_IRQCHIP: {
5746                 mutex_lock(&kvm->lock);
5747                 r = -EINVAL;
5748                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5749                         goto split_irqchip_unlock;
5750                 r = -EEXIST;
5751                 if (irqchip_in_kernel(kvm))
5752                         goto split_irqchip_unlock;
5753                 if (kvm->created_vcpus)
5754                         goto split_irqchip_unlock;
5755                 r = kvm_setup_empty_irq_routing(kvm);
5756                 if (r)
5757                         goto split_irqchip_unlock;
5758                 /* Pairs with irqchip_in_kernel. */
5759                 smp_wmb();
5760                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5761                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5762                 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
5763                 r = 0;
5764 split_irqchip_unlock:
5765                 mutex_unlock(&kvm->lock);
5766                 break;
5767         }
5768         case KVM_CAP_X2APIC_API:
5769                 r = -EINVAL;
5770                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5771                         break;
5772
5773                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5774                         kvm->arch.x2apic_format = true;
5775                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5776                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5777
5778                 r = 0;
5779                 break;
5780         case KVM_CAP_X86_DISABLE_EXITS:
5781                 r = -EINVAL;
5782                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5783                         break;
5784
5785                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5786                         kvm_can_mwait_in_guest())
5787                         kvm->arch.mwait_in_guest = true;
5788                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5789                         kvm->arch.hlt_in_guest = true;
5790                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5791                         kvm->arch.pause_in_guest = true;
5792                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5793                         kvm->arch.cstate_in_guest = true;
5794                 r = 0;
5795                 break;
5796         case KVM_CAP_MSR_PLATFORM_INFO:
5797                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5798                 r = 0;
5799                 break;
5800         case KVM_CAP_EXCEPTION_PAYLOAD:
5801                 kvm->arch.exception_payload_enabled = cap->args[0];
5802                 r = 0;
5803                 break;
5804         case KVM_CAP_X86_USER_SPACE_MSR:
5805                 kvm->arch.user_space_msr_mask = cap->args[0];
5806                 r = 0;
5807                 break;
5808         case KVM_CAP_X86_BUS_LOCK_EXIT:
5809                 r = -EINVAL;
5810                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5811                         break;
5812
5813                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5814                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5815                         break;
5816
5817                 if (kvm_has_bus_lock_exit &&
5818                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5819                         kvm->arch.bus_lock_detection_enabled = true;
5820                 r = 0;
5821                 break;
5822 #ifdef CONFIG_X86_SGX_KVM
5823         case KVM_CAP_SGX_ATTRIBUTE: {
5824                 unsigned long allowed_attributes = 0;
5825
5826                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5827                 if (r)
5828                         break;
5829
5830                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5831                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5832                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5833                         kvm->arch.sgx_provisioning_allowed = true;
5834                 else
5835                         r = -EINVAL;
5836                 break;
5837         }
5838 #endif
5839         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5840                 r = -EINVAL;
5841                 if (kvm_x86_ops.vm_copy_enc_context_from)
5842                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5843                 return r;
5844         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
5845                 r = -EINVAL;
5846                 if (kvm_x86_ops.vm_move_enc_context_from)
5847                         r = kvm_x86_ops.vm_move_enc_context_from(
5848                                 kvm, cap->args[0]);
5849                 return r;
5850         case KVM_CAP_EXIT_HYPERCALL:
5851                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5852                         r = -EINVAL;
5853                         break;
5854                 }
5855                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5856                 r = 0;
5857                 break;
5858         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5859                 r = -EINVAL;
5860                 if (cap->args[0] & ~1)
5861                         break;
5862                 kvm->arch.exit_on_emulation_error = cap->args[0];
5863                 r = 0;
5864                 break;
5865         default:
5866                 r = -EINVAL;
5867                 break;
5868         }
5869         return r;
5870 }
5871
5872 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5873 {
5874         struct kvm_x86_msr_filter *msr_filter;
5875
5876         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5877         if (!msr_filter)
5878                 return NULL;
5879
5880         msr_filter->default_allow = default_allow;
5881         return msr_filter;
5882 }
5883
5884 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5885 {
5886         u32 i;
5887
5888         if (!msr_filter)
5889                 return;
5890
5891         for (i = 0; i < msr_filter->count; i++)
5892                 kfree(msr_filter->ranges[i].bitmap);
5893
5894         kfree(msr_filter);
5895 }
5896
5897 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5898                               struct kvm_msr_filter_range *user_range)
5899 {
5900         unsigned long *bitmap = NULL;
5901         size_t bitmap_size;
5902
5903         if (!user_range->nmsrs)
5904                 return 0;
5905
5906         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5907                 return -EINVAL;
5908
5909         if (!user_range->flags)
5910                 return -EINVAL;
5911
5912         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5913         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5914                 return -EINVAL;
5915
5916         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5917         if (IS_ERR(bitmap))
5918                 return PTR_ERR(bitmap);
5919
5920         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5921                 .flags = user_range->flags,
5922                 .base = user_range->base,
5923                 .nmsrs = user_range->nmsrs,
5924                 .bitmap = bitmap,
5925         };
5926
5927         msr_filter->count++;
5928         return 0;
5929 }
5930
5931 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5932 {
5933         struct kvm_msr_filter __user *user_msr_filter = argp;
5934         struct kvm_x86_msr_filter *new_filter, *old_filter;
5935         struct kvm_msr_filter filter;
5936         bool default_allow;
5937         bool empty = true;
5938         int r = 0;
5939         u32 i;
5940
5941         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5942                 return -EFAULT;
5943
5944         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5945                 empty &= !filter.ranges[i].nmsrs;
5946
5947         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5948         if (empty && !default_allow)
5949                 return -EINVAL;
5950
5951         new_filter = kvm_alloc_msr_filter(default_allow);
5952         if (!new_filter)
5953                 return -ENOMEM;
5954
5955         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5956                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
5957                 if (r) {
5958                         kvm_free_msr_filter(new_filter);
5959                         return r;
5960                 }
5961         }
5962
5963         mutex_lock(&kvm->lock);
5964
5965         /* The per-VM filter is protected by kvm->lock... */
5966         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
5967
5968         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
5969         synchronize_srcu(&kvm->srcu);
5970
5971         kvm_free_msr_filter(old_filter);
5972
5973         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5974         mutex_unlock(&kvm->lock);
5975
5976         return 0;
5977 }
5978
5979 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
5980 static int kvm_arch_suspend_notifier(struct kvm *kvm)
5981 {
5982         struct kvm_vcpu *vcpu;
5983         unsigned long i;
5984         int ret = 0;
5985
5986         mutex_lock(&kvm->lock);
5987         kvm_for_each_vcpu(i, vcpu, kvm) {
5988                 if (!vcpu->arch.pv_time_enabled)
5989                         continue;
5990
5991                 ret = kvm_set_guest_paused(vcpu);
5992                 if (ret) {
5993                         kvm_err("Failed to pause guest VCPU%d: %d\n",
5994                                 vcpu->vcpu_id, ret);
5995                         break;
5996                 }
5997         }
5998         mutex_unlock(&kvm->lock);
5999
6000         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6001 }
6002
6003 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6004 {
6005         switch (state) {
6006         case PM_HIBERNATION_PREPARE:
6007         case PM_SUSPEND_PREPARE:
6008                 return kvm_arch_suspend_notifier(kvm);
6009         }
6010
6011         return NOTIFY_DONE;
6012 }
6013 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6014
6015 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6016 {
6017         struct kvm_clock_data data = { 0 };
6018
6019         get_kvmclock(kvm, &data);
6020         if (copy_to_user(argp, &data, sizeof(data)))
6021                 return -EFAULT;
6022
6023         return 0;
6024 }
6025
6026 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6027 {
6028         struct kvm_arch *ka = &kvm->arch;
6029         struct kvm_clock_data data;
6030         u64 now_raw_ns;
6031
6032         if (copy_from_user(&data, argp, sizeof(data)))
6033                 return -EFAULT;
6034
6035         /*
6036          * Only KVM_CLOCK_REALTIME is used, but allow passing the
6037          * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6038          */
6039         if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6040                 return -EINVAL;
6041
6042         kvm_hv_invalidate_tsc_page(kvm);
6043         kvm_start_pvclock_update(kvm);
6044         pvclock_update_vm_gtod_copy(kvm);
6045
6046         /*
6047          * This pairs with kvm_guest_time_update(): when masterclock is
6048          * in use, we use master_kernel_ns + kvmclock_offset to set
6049          * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6050          * is slightly ahead) here we risk going negative on unsigned
6051          * 'system_time' when 'data.clock' is very small.
6052          */
6053         if (data.flags & KVM_CLOCK_REALTIME) {
6054                 u64 now_real_ns = ktime_get_real_ns();
6055
6056                 /*
6057                  * Avoid stepping the kvmclock backwards.
6058                  */
6059                 if (now_real_ns > data.realtime)
6060                         data.clock += now_real_ns - data.realtime;
6061         }
6062
6063         if (ka->use_master_clock)
6064                 now_raw_ns = ka->master_kernel_ns;
6065         else
6066                 now_raw_ns = get_kvmclock_base_ns();
6067         ka->kvmclock_offset = data.clock - now_raw_ns;
6068         kvm_end_pvclock_update(kvm);
6069         return 0;
6070 }
6071
6072 long kvm_arch_vm_ioctl(struct file *filp,
6073                        unsigned int ioctl, unsigned long arg)
6074 {
6075         struct kvm *kvm = filp->private_data;
6076         void __user *argp = (void __user *)arg;
6077         int r = -ENOTTY;
6078         /*
6079          * This union makes it completely explicit to gcc-3.x
6080          * that these two variables' stack usage should be
6081          * combined, not added together.
6082          */
6083         union {
6084                 struct kvm_pit_state ps;
6085                 struct kvm_pit_state2 ps2;
6086                 struct kvm_pit_config pit_config;
6087         } u;
6088
6089         switch (ioctl) {
6090         case KVM_SET_TSS_ADDR:
6091                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6092                 break;
6093         case KVM_SET_IDENTITY_MAP_ADDR: {
6094                 u64 ident_addr;
6095
6096                 mutex_lock(&kvm->lock);
6097                 r = -EINVAL;
6098                 if (kvm->created_vcpus)
6099                         goto set_identity_unlock;
6100                 r = -EFAULT;
6101                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6102                         goto set_identity_unlock;
6103                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6104 set_identity_unlock:
6105                 mutex_unlock(&kvm->lock);
6106                 break;
6107         }
6108         case KVM_SET_NR_MMU_PAGES:
6109                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6110                 break;
6111         case KVM_GET_NR_MMU_PAGES:
6112                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6113                 break;
6114         case KVM_CREATE_IRQCHIP: {
6115                 mutex_lock(&kvm->lock);
6116
6117                 r = -EEXIST;
6118                 if (irqchip_in_kernel(kvm))
6119                         goto create_irqchip_unlock;
6120
6121                 r = -EINVAL;
6122                 if (kvm->created_vcpus)
6123                         goto create_irqchip_unlock;
6124
6125                 r = kvm_pic_init(kvm);
6126                 if (r)
6127                         goto create_irqchip_unlock;
6128
6129                 r = kvm_ioapic_init(kvm);
6130                 if (r) {
6131                         kvm_pic_destroy(kvm);
6132                         goto create_irqchip_unlock;
6133                 }
6134
6135                 r = kvm_setup_default_irq_routing(kvm);
6136                 if (r) {
6137                         kvm_ioapic_destroy(kvm);
6138                         kvm_pic_destroy(kvm);
6139                         goto create_irqchip_unlock;
6140                 }
6141                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6142                 smp_wmb();
6143                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6144                 kvm_request_apicv_update(kvm, true, APICV_INHIBIT_REASON_ABSENT);
6145         create_irqchip_unlock:
6146                 mutex_unlock(&kvm->lock);
6147                 break;
6148         }
6149         case KVM_CREATE_PIT:
6150                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6151                 goto create_pit;
6152         case KVM_CREATE_PIT2:
6153                 r = -EFAULT;
6154                 if (copy_from_user(&u.pit_config, argp,
6155                                    sizeof(struct kvm_pit_config)))
6156                         goto out;
6157         create_pit:
6158                 mutex_lock(&kvm->lock);
6159                 r = -EEXIST;
6160                 if (kvm->arch.vpit)
6161                         goto create_pit_unlock;
6162                 r = -ENOMEM;
6163                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6164                 if (kvm->arch.vpit)
6165                         r = 0;
6166         create_pit_unlock:
6167                 mutex_unlock(&kvm->lock);
6168                 break;
6169         case KVM_GET_IRQCHIP: {
6170                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6171                 struct kvm_irqchip *chip;
6172
6173                 chip = memdup_user(argp, sizeof(*chip));
6174                 if (IS_ERR(chip)) {
6175                         r = PTR_ERR(chip);
6176                         goto out;
6177                 }
6178
6179                 r = -ENXIO;
6180                 if (!irqchip_kernel(kvm))
6181                         goto get_irqchip_out;
6182                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6183                 if (r)
6184                         goto get_irqchip_out;
6185                 r = -EFAULT;
6186                 if (copy_to_user(argp, chip, sizeof(*chip)))
6187                         goto get_irqchip_out;
6188                 r = 0;
6189         get_irqchip_out:
6190                 kfree(chip);
6191                 break;
6192         }
6193         case KVM_SET_IRQCHIP: {
6194                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6195                 struct kvm_irqchip *chip;
6196
6197                 chip = memdup_user(argp, sizeof(*chip));
6198                 if (IS_ERR(chip)) {
6199                         r = PTR_ERR(chip);
6200                         goto out;
6201                 }
6202
6203                 r = -ENXIO;
6204                 if (!irqchip_kernel(kvm))
6205                         goto set_irqchip_out;
6206                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6207         set_irqchip_out:
6208                 kfree(chip);
6209                 break;
6210         }
6211         case KVM_GET_PIT: {
6212                 r = -EFAULT;
6213                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6214                         goto out;
6215                 r = -ENXIO;
6216                 if (!kvm->arch.vpit)
6217                         goto out;
6218                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6219                 if (r)
6220                         goto out;
6221                 r = -EFAULT;
6222                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6223                         goto out;
6224                 r = 0;
6225                 break;
6226         }
6227         case KVM_SET_PIT: {
6228                 r = -EFAULT;
6229                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6230                         goto out;
6231                 mutex_lock(&kvm->lock);
6232                 r = -ENXIO;
6233                 if (!kvm->arch.vpit)
6234                         goto set_pit_out;
6235                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6236 set_pit_out:
6237                 mutex_unlock(&kvm->lock);
6238                 break;
6239         }
6240         case KVM_GET_PIT2: {
6241                 r = -ENXIO;
6242                 if (!kvm->arch.vpit)
6243                         goto out;
6244                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6245                 if (r)
6246                         goto out;
6247                 r = -EFAULT;
6248                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6249                         goto out;
6250                 r = 0;
6251                 break;
6252         }
6253         case KVM_SET_PIT2: {
6254                 r = -EFAULT;
6255                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6256                         goto out;
6257                 mutex_lock(&kvm->lock);
6258                 r = -ENXIO;
6259                 if (!kvm->arch.vpit)
6260                         goto set_pit2_out;
6261                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6262 set_pit2_out:
6263                 mutex_unlock(&kvm->lock);
6264                 break;
6265         }
6266         case KVM_REINJECT_CONTROL: {
6267                 struct kvm_reinject_control control;
6268                 r =  -EFAULT;
6269                 if (copy_from_user(&control, argp, sizeof(control)))
6270                         goto out;
6271                 r = -ENXIO;
6272                 if (!kvm->arch.vpit)
6273                         goto out;
6274                 r = kvm_vm_ioctl_reinject(kvm, &control);
6275                 break;
6276         }
6277         case KVM_SET_BOOT_CPU_ID:
6278                 r = 0;
6279                 mutex_lock(&kvm->lock);
6280                 if (kvm->created_vcpus)
6281                         r = -EBUSY;
6282                 else
6283                         kvm->arch.bsp_vcpu_id = arg;
6284                 mutex_unlock(&kvm->lock);
6285                 break;
6286 #ifdef CONFIG_KVM_XEN
6287         case KVM_XEN_HVM_CONFIG: {
6288                 struct kvm_xen_hvm_config xhc;
6289                 r = -EFAULT;
6290                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6291                         goto out;
6292                 r = kvm_xen_hvm_config(kvm, &xhc);
6293                 break;
6294         }
6295         case KVM_XEN_HVM_GET_ATTR: {
6296                 struct kvm_xen_hvm_attr xha;
6297
6298                 r = -EFAULT;
6299                 if (copy_from_user(&xha, argp, sizeof(xha)))
6300                         goto out;
6301                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6302                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6303                         r = -EFAULT;
6304                 break;
6305         }
6306         case KVM_XEN_HVM_SET_ATTR: {
6307                 struct kvm_xen_hvm_attr xha;
6308
6309                 r = -EFAULT;
6310                 if (copy_from_user(&xha, argp, sizeof(xha)))
6311                         goto out;
6312                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6313                 break;
6314         }
6315 #endif
6316         case KVM_SET_CLOCK:
6317                 r = kvm_vm_ioctl_set_clock(kvm, argp);
6318                 break;
6319         case KVM_GET_CLOCK:
6320                 r = kvm_vm_ioctl_get_clock(kvm, argp);
6321                 break;
6322         case KVM_MEMORY_ENCRYPT_OP: {
6323                 r = -ENOTTY;
6324                 if (kvm_x86_ops.mem_enc_op)
6325                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6326                 break;
6327         }
6328         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6329                 struct kvm_enc_region region;
6330
6331                 r = -EFAULT;
6332                 if (copy_from_user(&region, argp, sizeof(region)))
6333                         goto out;
6334
6335                 r = -ENOTTY;
6336                 if (kvm_x86_ops.mem_enc_reg_region)
6337                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6338                 break;
6339         }
6340         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6341                 struct kvm_enc_region region;
6342
6343                 r = -EFAULT;
6344                 if (copy_from_user(&region, argp, sizeof(region)))
6345                         goto out;
6346
6347                 r = -ENOTTY;
6348                 if (kvm_x86_ops.mem_enc_unreg_region)
6349                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6350                 break;
6351         }
6352         case KVM_HYPERV_EVENTFD: {
6353                 struct kvm_hyperv_eventfd hvevfd;
6354
6355                 r = -EFAULT;
6356                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6357                         goto out;
6358                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6359                 break;
6360         }
6361         case KVM_SET_PMU_EVENT_FILTER:
6362                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6363                 break;
6364         case KVM_X86_SET_MSR_FILTER:
6365                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6366                 break;
6367         default:
6368                 r = -ENOTTY;
6369         }
6370 out:
6371         return r;
6372 }
6373
6374 static void kvm_init_msr_list(void)
6375 {
6376         struct x86_pmu_capability x86_pmu;
6377         u32 dummy[2];
6378         unsigned i;
6379
6380         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6381                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6382
6383         perf_get_x86_pmu_capability(&x86_pmu);
6384
6385         num_msrs_to_save = 0;
6386         num_emulated_msrs = 0;
6387         num_msr_based_features = 0;
6388
6389         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6390                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6391                         continue;
6392
6393                 /*
6394                  * Even MSRs that are valid in the host may not be exposed
6395                  * to the guests in some cases.
6396                  */
6397                 switch (msrs_to_save_all[i]) {
6398                 case MSR_IA32_BNDCFGS:
6399                         if (!kvm_mpx_supported())
6400                                 continue;
6401                         break;
6402                 case MSR_TSC_AUX:
6403                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6404                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6405                                 continue;
6406                         break;
6407                 case MSR_IA32_UMWAIT_CONTROL:
6408                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6409                                 continue;
6410                         break;
6411                 case MSR_IA32_RTIT_CTL:
6412                 case MSR_IA32_RTIT_STATUS:
6413                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6414                                 continue;
6415                         break;
6416                 case MSR_IA32_RTIT_CR3_MATCH:
6417                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6418                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6419                                 continue;
6420                         break;
6421                 case MSR_IA32_RTIT_OUTPUT_BASE:
6422                 case MSR_IA32_RTIT_OUTPUT_MASK:
6423                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6424                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6425                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6426                                 continue;
6427                         break;
6428                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6429                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6430                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6431                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6432                                 continue;
6433                         break;
6434                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6435                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6436                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6437                                 continue;
6438                         break;
6439                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6440                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6441                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6442                                 continue;
6443                         break;
6444                 default:
6445                         break;
6446                 }
6447
6448                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6449         }
6450
6451         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6452                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6453                         continue;
6454
6455                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6456         }
6457
6458         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6459                 struct kvm_msr_entry msr;
6460
6461                 msr.index = msr_based_features_all[i];
6462                 if (kvm_get_msr_feature(&msr))
6463                         continue;
6464
6465                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6466         }
6467 }
6468
6469 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6470                            const void *v)
6471 {
6472         int handled = 0;
6473         int n;
6474
6475         do {
6476                 n = min(len, 8);
6477                 if (!(lapic_in_kernel(vcpu) &&
6478                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6479                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6480                         break;
6481                 handled += n;
6482                 addr += n;
6483                 len -= n;
6484                 v += n;
6485         } while (len);
6486
6487         return handled;
6488 }
6489
6490 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6491 {
6492         int handled = 0;
6493         int n;
6494
6495         do {
6496                 n = min(len, 8);
6497                 if (!(lapic_in_kernel(vcpu) &&
6498                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6499                                          addr, n, v))
6500                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6501                         break;
6502                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6503                 handled += n;
6504                 addr += n;
6505                 len -= n;
6506                 v += n;
6507         } while (len);
6508
6509         return handled;
6510 }
6511
6512 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6513                         struct kvm_segment *var, int seg)
6514 {
6515         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6516 }
6517
6518 void kvm_get_segment(struct kvm_vcpu *vcpu,
6519                      struct kvm_segment *var, int seg)
6520 {
6521         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6522 }
6523
6524 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6525                            struct x86_exception *exception)
6526 {
6527         struct kvm_mmu *mmu = vcpu->arch.mmu;
6528         gpa_t t_gpa;
6529
6530         BUG_ON(!mmu_is_nested(vcpu));
6531
6532         /* NPT walks are always user-walks */
6533         access |= PFERR_USER_MASK;
6534         t_gpa  = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
6535
6536         return t_gpa;
6537 }
6538
6539 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6540                               struct x86_exception *exception)
6541 {
6542         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6543
6544         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6545         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6546 }
6547 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6548
6549  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6550                                 struct x86_exception *exception)
6551 {
6552         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6553
6554         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6555         access |= PFERR_FETCH_MASK;
6556         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6557 }
6558
6559 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6560                                struct x86_exception *exception)
6561 {
6562         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6563
6564         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6565         access |= PFERR_WRITE_MASK;
6566         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6567 }
6568 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6569
6570 /* uses this to access any guest's mapped memory without checking CPL */
6571 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6572                                 struct x86_exception *exception)
6573 {
6574         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6575
6576         return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
6577 }
6578
6579 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6580                                       struct kvm_vcpu *vcpu, u32 access,
6581                                       struct x86_exception *exception)
6582 {
6583         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6584         void *data = val;
6585         int r = X86EMUL_CONTINUE;
6586
6587         while (bytes) {
6588                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6589                 unsigned offset = addr & (PAGE_SIZE-1);
6590                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6591                 int ret;
6592
6593                 if (gpa == UNMAPPED_GVA)
6594                         return X86EMUL_PROPAGATE_FAULT;
6595                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6596                                                offset, toread);
6597                 if (ret < 0) {
6598                         r = X86EMUL_IO_NEEDED;
6599                         goto out;
6600                 }
6601
6602                 bytes -= toread;
6603                 data += toread;
6604                 addr += toread;
6605         }
6606 out:
6607         return r;
6608 }
6609
6610 /* used for instruction fetching */
6611 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6612                                 gva_t addr, void *val, unsigned int bytes,
6613                                 struct x86_exception *exception)
6614 {
6615         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6616         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6617         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6618         unsigned offset;
6619         int ret;
6620
6621         /* Inline kvm_read_guest_virt_helper for speed.  */
6622         gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
6623                                     exception);
6624         if (unlikely(gpa == UNMAPPED_GVA))
6625                 return X86EMUL_PROPAGATE_FAULT;
6626
6627         offset = addr & (PAGE_SIZE-1);
6628         if (WARN_ON(offset + bytes > PAGE_SIZE))
6629                 bytes = (unsigned)PAGE_SIZE - offset;
6630         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6631                                        offset, bytes);
6632         if (unlikely(ret < 0))
6633                 return X86EMUL_IO_NEEDED;
6634
6635         return X86EMUL_CONTINUE;
6636 }
6637
6638 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6639                                gva_t addr, void *val, unsigned int bytes,
6640                                struct x86_exception *exception)
6641 {
6642         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6643
6644         /*
6645          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6646          * is returned, but our callers are not ready for that and they blindly
6647          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6648          * uninitialized kernel stack memory into cr2 and error code.
6649          */
6650         memset(exception, 0, sizeof(*exception));
6651         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6652                                           exception);
6653 }
6654 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6655
6656 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6657                              gva_t addr, void *val, unsigned int bytes,
6658                              struct x86_exception *exception, bool system)
6659 {
6660         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6661         u32 access = 0;
6662
6663         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6664                 access |= PFERR_USER_MASK;
6665
6666         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6667 }
6668
6669 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6670                 unsigned long addr, void *val, unsigned int bytes)
6671 {
6672         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6673         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6674
6675         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6676 }
6677
6678 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6679                                       struct kvm_vcpu *vcpu, u32 access,
6680                                       struct x86_exception *exception)
6681 {
6682         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6683         void *data = val;
6684         int r = X86EMUL_CONTINUE;
6685
6686         while (bytes) {
6687                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6688                 unsigned offset = addr & (PAGE_SIZE-1);
6689                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6690                 int ret;
6691
6692                 if (gpa == UNMAPPED_GVA)
6693                         return X86EMUL_PROPAGATE_FAULT;
6694                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6695                 if (ret < 0) {
6696                         r = X86EMUL_IO_NEEDED;
6697                         goto out;
6698                 }
6699
6700                 bytes -= towrite;
6701                 data += towrite;
6702                 addr += towrite;
6703         }
6704 out:
6705         return r;
6706 }
6707
6708 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6709                               unsigned int bytes, struct x86_exception *exception,
6710                               bool system)
6711 {
6712         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6713         u32 access = PFERR_WRITE_MASK;
6714
6715         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6716                 access |= PFERR_USER_MASK;
6717
6718         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6719                                            access, exception);
6720 }
6721
6722 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6723                                 unsigned int bytes, struct x86_exception *exception)
6724 {
6725         /* kvm_write_guest_virt_system can pull in tons of pages. */
6726         vcpu->arch.l1tf_flush_l1d = true;
6727
6728         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6729                                            PFERR_WRITE_MASK, exception);
6730 }
6731 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6732
6733 int handle_ud(struct kvm_vcpu *vcpu)
6734 {
6735         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6736         int emul_type = EMULTYPE_TRAP_UD;
6737         char sig[5]; /* ud2; .ascii "kvm" */
6738         struct x86_exception e;
6739
6740         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6741                 return 1;
6742
6743         if (force_emulation_prefix &&
6744             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6745                                 sig, sizeof(sig), &e) == 0 &&
6746             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6747                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6748                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6749         }
6750
6751         return kvm_emulate_instruction(vcpu, emul_type);
6752 }
6753 EXPORT_SYMBOL_GPL(handle_ud);
6754
6755 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6756                             gpa_t gpa, bool write)
6757 {
6758         /* For APIC access vmexit */
6759         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6760                 return 1;
6761
6762         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6763                 trace_vcpu_match_mmio(gva, gpa, write, true);
6764                 return 1;
6765         }
6766
6767         return 0;
6768 }
6769
6770 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6771                                 gpa_t *gpa, struct x86_exception *exception,
6772                                 bool write)
6773 {
6774         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6775         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6776                 | (write ? PFERR_WRITE_MASK : 0);
6777
6778         /*
6779          * currently PKRU is only applied to ept enabled guest so
6780          * there is no pkey in EPT page table for L1 guest or EPT
6781          * shadow page table for L2 guest.
6782          */
6783         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6784             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6785                               vcpu->arch.mmio_access, 0, access))) {
6786                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6787                                         (gva & (PAGE_SIZE - 1));
6788                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6789                 return 1;
6790         }
6791
6792         *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6793
6794         if (*gpa == UNMAPPED_GVA)
6795                 return -1;
6796
6797         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6798 }
6799
6800 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6801                         const void *val, int bytes)
6802 {
6803         int ret;
6804
6805         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6806         if (ret < 0)
6807                 return 0;
6808         kvm_page_track_write(vcpu, gpa, val, bytes);
6809         return 1;
6810 }
6811
6812 struct read_write_emulator_ops {
6813         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6814                                   int bytes);
6815         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6816                                   void *val, int bytes);
6817         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6818                                int bytes, void *val);
6819         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6820                                     void *val, int bytes);
6821         bool write;
6822 };
6823
6824 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6825 {
6826         if (vcpu->mmio_read_completed) {
6827                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6828                                vcpu->mmio_fragments[0].gpa, val);
6829                 vcpu->mmio_read_completed = 0;
6830                 return 1;
6831         }
6832
6833         return 0;
6834 }
6835
6836 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6837                         void *val, int bytes)
6838 {
6839         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6840 }
6841
6842 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6843                          void *val, int bytes)
6844 {
6845         return emulator_write_phys(vcpu, gpa, val, bytes);
6846 }
6847
6848 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6849 {
6850         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6851         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6852 }
6853
6854 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6855                           void *val, int bytes)
6856 {
6857         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6858         return X86EMUL_IO_NEEDED;
6859 }
6860
6861 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6862                            void *val, int bytes)
6863 {
6864         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6865
6866         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6867         return X86EMUL_CONTINUE;
6868 }
6869
6870 static const struct read_write_emulator_ops read_emultor = {
6871         .read_write_prepare = read_prepare,
6872         .read_write_emulate = read_emulate,
6873         .read_write_mmio = vcpu_mmio_read,
6874         .read_write_exit_mmio = read_exit_mmio,
6875 };
6876
6877 static const struct read_write_emulator_ops write_emultor = {
6878         .read_write_emulate = write_emulate,
6879         .read_write_mmio = write_mmio,
6880         .read_write_exit_mmio = write_exit_mmio,
6881         .write = true,
6882 };
6883
6884 static int emulator_read_write_onepage(unsigned long addr, void *val,
6885                                        unsigned int bytes,
6886                                        struct x86_exception *exception,
6887                                        struct kvm_vcpu *vcpu,
6888                                        const struct read_write_emulator_ops *ops)
6889 {
6890         gpa_t gpa;
6891         int handled, ret;
6892         bool write = ops->write;
6893         struct kvm_mmio_fragment *frag;
6894         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6895
6896         /*
6897          * If the exit was due to a NPF we may already have a GPA.
6898          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6899          * Note, this cannot be used on string operations since string
6900          * operation using rep will only have the initial GPA from the NPF
6901          * occurred.
6902          */
6903         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6904             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6905                 gpa = ctxt->gpa_val;
6906                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6907         } else {
6908                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6909                 if (ret < 0)
6910                         return X86EMUL_PROPAGATE_FAULT;
6911         }
6912
6913         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6914                 return X86EMUL_CONTINUE;
6915
6916         /*
6917          * Is this MMIO handled locally?
6918          */
6919         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6920         if (handled == bytes)
6921                 return X86EMUL_CONTINUE;
6922
6923         gpa += handled;
6924         bytes -= handled;
6925         val += handled;
6926
6927         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6928         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6929         frag->gpa = gpa;
6930         frag->data = val;
6931         frag->len = bytes;
6932         return X86EMUL_CONTINUE;
6933 }
6934
6935 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6936                         unsigned long addr,
6937                         void *val, unsigned int bytes,
6938                         struct x86_exception *exception,
6939                         const struct read_write_emulator_ops *ops)
6940 {
6941         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6942         gpa_t gpa;
6943         int rc;
6944
6945         if (ops->read_write_prepare &&
6946                   ops->read_write_prepare(vcpu, val, bytes))
6947                 return X86EMUL_CONTINUE;
6948
6949         vcpu->mmio_nr_fragments = 0;
6950
6951         /* Crossing a page boundary? */
6952         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6953                 int now;
6954
6955                 now = -addr & ~PAGE_MASK;
6956                 rc = emulator_read_write_onepage(addr, val, now, exception,
6957                                                  vcpu, ops);
6958
6959                 if (rc != X86EMUL_CONTINUE)
6960                         return rc;
6961                 addr += now;
6962                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6963                         addr = (u32)addr;
6964                 val += now;
6965                 bytes -= now;
6966         }
6967
6968         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6969                                          vcpu, ops);
6970         if (rc != X86EMUL_CONTINUE)
6971                 return rc;
6972
6973         if (!vcpu->mmio_nr_fragments)
6974                 return rc;
6975
6976         gpa = vcpu->mmio_fragments[0].gpa;
6977
6978         vcpu->mmio_needed = 1;
6979         vcpu->mmio_cur_fragment = 0;
6980
6981         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6982         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6983         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6984         vcpu->run->mmio.phys_addr = gpa;
6985
6986         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6987 }
6988
6989 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6990                                   unsigned long addr,
6991                                   void *val,
6992                                   unsigned int bytes,
6993                                   struct x86_exception *exception)
6994 {
6995         return emulator_read_write(ctxt, addr, val, bytes,
6996                                    exception, &read_emultor);
6997 }
6998
6999 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7000                             unsigned long addr,
7001                             const void *val,
7002                             unsigned int bytes,
7003                             struct x86_exception *exception)
7004 {
7005         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7006                                    exception, &write_emultor);
7007 }
7008
7009 #define CMPXCHG_TYPE(t, ptr, old, new) \
7010         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
7011
7012 #ifdef CONFIG_X86_64
7013 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
7014 #else
7015 #  define CMPXCHG64(ptr, old, new) \
7016         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
7017 #endif
7018
7019 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7020                                      unsigned long addr,
7021                                      const void *old,
7022                                      const void *new,
7023                                      unsigned int bytes,
7024                                      struct x86_exception *exception)
7025 {
7026         struct kvm_host_map map;
7027         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7028         u64 page_line_mask;
7029         gpa_t gpa;
7030         char *kaddr;
7031         bool exchanged;
7032
7033         /* guests cmpxchg8b have to be emulated atomically */
7034         if (bytes > 8 || (bytes & (bytes - 1)))
7035                 goto emul_write;
7036
7037         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7038
7039         if (gpa == UNMAPPED_GVA ||
7040             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7041                 goto emul_write;
7042
7043         /*
7044          * Emulate the atomic as a straight write to avoid #AC if SLD is
7045          * enabled in the host and the access splits a cache line.
7046          */
7047         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7048                 page_line_mask = ~(cache_line_size() - 1);
7049         else
7050                 page_line_mask = PAGE_MASK;
7051
7052         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7053                 goto emul_write;
7054
7055         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
7056                 goto emul_write;
7057
7058         kaddr = map.hva + offset_in_page(gpa);
7059
7060         switch (bytes) {
7061         case 1:
7062                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
7063                 break;
7064         case 2:
7065                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
7066                 break;
7067         case 4:
7068                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
7069                 break;
7070         case 8:
7071                 exchanged = CMPXCHG64(kaddr, old, new);
7072                 break;
7073         default:
7074                 BUG();
7075         }
7076
7077         kvm_vcpu_unmap(vcpu, &map, true);
7078
7079         if (!exchanged)
7080                 return X86EMUL_CMPXCHG_FAILED;
7081
7082         kvm_page_track_write(vcpu, gpa, new, bytes);
7083
7084         return X86EMUL_CONTINUE;
7085
7086 emul_write:
7087         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7088
7089         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7090 }
7091
7092 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7093 {
7094         int r = 0, i;
7095
7096         for (i = 0; i < vcpu->arch.pio.count; i++) {
7097                 if (vcpu->arch.pio.in)
7098                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7099                                             vcpu->arch.pio.size, pd);
7100                 else
7101                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7102                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
7103                                              pd);
7104                 if (r)
7105                         break;
7106                 pd += vcpu->arch.pio.size;
7107         }
7108         return r;
7109 }
7110
7111 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7112                                unsigned short port,
7113                                unsigned int count, bool in)
7114 {
7115         vcpu->arch.pio.port = port;
7116         vcpu->arch.pio.in = in;
7117         vcpu->arch.pio.count  = count;
7118         vcpu->arch.pio.size = size;
7119
7120         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7121                 return 1;
7122
7123         vcpu->run->exit_reason = KVM_EXIT_IO;
7124         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7125         vcpu->run->io.size = size;
7126         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7127         vcpu->run->io.count = count;
7128         vcpu->run->io.port = port;
7129
7130         return 0;
7131 }
7132
7133 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7134                              unsigned short port, unsigned int count)
7135 {
7136         WARN_ON(vcpu->arch.pio.count);
7137         memset(vcpu->arch.pio_data, 0, size * count);
7138         return emulator_pio_in_out(vcpu, size, port, count, true);
7139 }
7140
7141 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7142 {
7143         int size = vcpu->arch.pio.size;
7144         unsigned count = vcpu->arch.pio.count;
7145         memcpy(val, vcpu->arch.pio_data, size * count);
7146         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7147         vcpu->arch.pio.count = 0;
7148 }
7149
7150 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7151                            unsigned short port, void *val, unsigned int count)
7152 {
7153         if (vcpu->arch.pio.count) {
7154                 /*
7155                  * Complete a previous iteration that required userspace I/O.
7156                  * Note, @count isn't guaranteed to match pio.count as userspace
7157                  * can modify ECX before rerunning the vCPU.  Ignore any such
7158                  * shenanigans as KVM doesn't support modifying the rep count,
7159                  * and the emulator ensures @count doesn't overflow the buffer.
7160                  */
7161         } else {
7162                 int r = __emulator_pio_in(vcpu, size, port, count);
7163                 if (!r)
7164                         return r;
7165
7166                 /* Results already available, fall through.  */
7167         }
7168
7169         complete_emulator_pio_in(vcpu, val);
7170         return 1;
7171 }
7172
7173 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7174                                     int size, unsigned short port, void *val,
7175                                     unsigned int count)
7176 {
7177         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7178
7179 }
7180
7181 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7182                             unsigned short port, const void *val,
7183                             unsigned int count)
7184 {
7185         int ret;
7186
7187         memcpy(vcpu->arch.pio_data, val, size * count);
7188         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7189         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7190         if (ret)
7191                 vcpu->arch.pio.count = 0;
7192
7193         return ret;
7194 }
7195
7196 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7197                                      int size, unsigned short port,
7198                                      const void *val, unsigned int count)
7199 {
7200         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7201 }
7202
7203 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7204 {
7205         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7206 }
7207
7208 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7209 {
7210         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7211 }
7212
7213 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7214 {
7215         if (!need_emulate_wbinvd(vcpu))
7216                 return X86EMUL_CONTINUE;
7217
7218         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7219                 int cpu = get_cpu();
7220
7221                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7222                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7223                                 wbinvd_ipi, NULL, 1);
7224                 put_cpu();
7225                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7226         } else
7227                 wbinvd();
7228         return X86EMUL_CONTINUE;
7229 }
7230
7231 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7232 {
7233         kvm_emulate_wbinvd_noskip(vcpu);
7234         return kvm_skip_emulated_instruction(vcpu);
7235 }
7236 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7237
7238
7239
7240 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7241 {
7242         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7243 }
7244
7245 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7246                             unsigned long *dest)
7247 {
7248         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7249 }
7250
7251 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7252                            unsigned long value)
7253 {
7254
7255         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7256 }
7257
7258 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7259 {
7260         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7261 }
7262
7263 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7264 {
7265         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7266         unsigned long value;
7267
7268         switch (cr) {
7269         case 0:
7270                 value = kvm_read_cr0(vcpu);
7271                 break;
7272         case 2:
7273                 value = vcpu->arch.cr2;
7274                 break;
7275         case 3:
7276                 value = kvm_read_cr3(vcpu);
7277                 break;
7278         case 4:
7279                 value = kvm_read_cr4(vcpu);
7280                 break;
7281         case 8:
7282                 value = kvm_get_cr8(vcpu);
7283                 break;
7284         default:
7285                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7286                 return 0;
7287         }
7288
7289         return value;
7290 }
7291
7292 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7293 {
7294         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7295         int res = 0;
7296
7297         switch (cr) {
7298         case 0:
7299                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7300                 break;
7301         case 2:
7302                 vcpu->arch.cr2 = val;
7303                 break;
7304         case 3:
7305                 res = kvm_set_cr3(vcpu, val);
7306                 break;
7307         case 4:
7308                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7309                 break;
7310         case 8:
7311                 res = kvm_set_cr8(vcpu, val);
7312                 break;
7313         default:
7314                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7315                 res = -1;
7316         }
7317
7318         return res;
7319 }
7320
7321 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7322 {
7323         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7324 }
7325
7326 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7327 {
7328         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7329 }
7330
7331 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7332 {
7333         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7334 }
7335
7336 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7337 {
7338         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7339 }
7340
7341 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7342 {
7343         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7344 }
7345
7346 static unsigned long emulator_get_cached_segment_base(
7347         struct x86_emulate_ctxt *ctxt, int seg)
7348 {
7349         return get_segment_base(emul_to_vcpu(ctxt), seg);
7350 }
7351
7352 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7353                                  struct desc_struct *desc, u32 *base3,
7354                                  int seg)
7355 {
7356         struct kvm_segment var;
7357
7358         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7359         *selector = var.selector;
7360
7361         if (var.unusable) {
7362                 memset(desc, 0, sizeof(*desc));
7363                 if (base3)
7364                         *base3 = 0;
7365                 return false;
7366         }
7367
7368         if (var.g)
7369                 var.limit >>= 12;
7370         set_desc_limit(desc, var.limit);
7371         set_desc_base(desc, (unsigned long)var.base);
7372 #ifdef CONFIG_X86_64
7373         if (base3)
7374                 *base3 = var.base >> 32;
7375 #endif
7376         desc->type = var.type;
7377         desc->s = var.s;
7378         desc->dpl = var.dpl;
7379         desc->p = var.present;
7380         desc->avl = var.avl;
7381         desc->l = var.l;
7382         desc->d = var.db;
7383         desc->g = var.g;
7384
7385         return true;
7386 }
7387
7388 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7389                                  struct desc_struct *desc, u32 base3,
7390                                  int seg)
7391 {
7392         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7393         struct kvm_segment var;
7394
7395         var.selector = selector;
7396         var.base = get_desc_base(desc);
7397 #ifdef CONFIG_X86_64
7398         var.base |= ((u64)base3) << 32;
7399 #endif
7400         var.limit = get_desc_limit(desc);
7401         if (desc->g)
7402                 var.limit = (var.limit << 12) | 0xfff;
7403         var.type = desc->type;
7404         var.dpl = desc->dpl;
7405         var.db = desc->d;
7406         var.s = desc->s;
7407         var.l = desc->l;
7408         var.g = desc->g;
7409         var.avl = desc->avl;
7410         var.present = desc->p;
7411         var.unusable = !var.present;
7412         var.padding = 0;
7413
7414         kvm_set_segment(vcpu, &var, seg);
7415         return;
7416 }
7417
7418 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7419                             u32 msr_index, u64 *pdata)
7420 {
7421         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7422         int r;
7423
7424         r = kvm_get_msr(vcpu, msr_index, pdata);
7425
7426         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7427                                     complete_emulated_rdmsr, r)) {
7428                 /* Bounce to user space */
7429                 return X86EMUL_IO_NEEDED;
7430         }
7431
7432         return r;
7433 }
7434
7435 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7436                             u32 msr_index, u64 data)
7437 {
7438         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7439         int r;
7440
7441         r = kvm_set_msr(vcpu, msr_index, data);
7442
7443         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7444                                     complete_emulated_msr_access, r)) {
7445                 /* Bounce to user space */
7446                 return X86EMUL_IO_NEEDED;
7447         }
7448
7449         return r;
7450 }
7451
7452 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7453 {
7454         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7455
7456         return vcpu->arch.smbase;
7457 }
7458
7459 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7460 {
7461         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7462
7463         vcpu->arch.smbase = smbase;
7464 }
7465
7466 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7467                               u32 pmc)
7468 {
7469         if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7470                 return 0;
7471         return -EINVAL;
7472 }
7473
7474 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7475                              u32 pmc, u64 *pdata)
7476 {
7477         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7478 }
7479
7480 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7481 {
7482         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7483 }
7484
7485 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7486                               struct x86_instruction_info *info,
7487                               enum x86_intercept_stage stage)
7488 {
7489         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7490                                             &ctxt->exception);
7491 }
7492
7493 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7494                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7495                               bool exact_only)
7496 {
7497         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7498 }
7499
7500 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7501 {
7502         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7503 }
7504
7505 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7506 {
7507         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7508 }
7509
7510 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7511 {
7512         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7513 }
7514
7515 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7516 {
7517         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7518 }
7519
7520 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7521 {
7522         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7523 }
7524
7525 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7526 {
7527         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7528 }
7529
7530 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7531 {
7532         return emul_to_vcpu(ctxt)->arch.hflags;
7533 }
7534
7535 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7536 {
7537         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7538
7539         kvm_smm_changed(vcpu, false);
7540 }
7541
7542 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7543                                   const char *smstate)
7544 {
7545         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7546 }
7547
7548 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7549 {
7550         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7551 }
7552
7553 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7554 {
7555         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7556 }
7557
7558 static const struct x86_emulate_ops emulate_ops = {
7559         .read_gpr            = emulator_read_gpr,
7560         .write_gpr           = emulator_write_gpr,
7561         .read_std            = emulator_read_std,
7562         .write_std           = emulator_write_std,
7563         .read_phys           = kvm_read_guest_phys_system,
7564         .fetch               = kvm_fetch_guest_virt,
7565         .read_emulated       = emulator_read_emulated,
7566         .write_emulated      = emulator_write_emulated,
7567         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7568         .invlpg              = emulator_invlpg,
7569         .pio_in_emulated     = emulator_pio_in_emulated,
7570         .pio_out_emulated    = emulator_pio_out_emulated,
7571         .get_segment         = emulator_get_segment,
7572         .set_segment         = emulator_set_segment,
7573         .get_cached_segment_base = emulator_get_cached_segment_base,
7574         .get_gdt             = emulator_get_gdt,
7575         .get_idt             = emulator_get_idt,
7576         .set_gdt             = emulator_set_gdt,
7577         .set_idt             = emulator_set_idt,
7578         .get_cr              = emulator_get_cr,
7579         .set_cr              = emulator_set_cr,
7580         .cpl                 = emulator_get_cpl,
7581         .get_dr              = emulator_get_dr,
7582         .set_dr              = emulator_set_dr,
7583         .get_smbase          = emulator_get_smbase,
7584         .set_smbase          = emulator_set_smbase,
7585         .set_msr             = emulator_set_msr,
7586         .get_msr             = emulator_get_msr,
7587         .check_pmc           = emulator_check_pmc,
7588         .read_pmc            = emulator_read_pmc,
7589         .halt                = emulator_halt,
7590         .wbinvd              = emulator_wbinvd,
7591         .fix_hypercall       = emulator_fix_hypercall,
7592         .intercept           = emulator_intercept,
7593         .get_cpuid           = emulator_get_cpuid,
7594         .guest_has_long_mode = emulator_guest_has_long_mode,
7595         .guest_has_movbe     = emulator_guest_has_movbe,
7596         .guest_has_fxsr      = emulator_guest_has_fxsr,
7597         .set_nmi_mask        = emulator_set_nmi_mask,
7598         .get_hflags          = emulator_get_hflags,
7599         .exiting_smm         = emulator_exiting_smm,
7600         .leave_smm           = emulator_leave_smm,
7601         .triple_fault        = emulator_triple_fault,
7602         .set_xcr             = emulator_set_xcr,
7603 };
7604
7605 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7606 {
7607         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7608         /*
7609          * an sti; sti; sequence only disable interrupts for the first
7610          * instruction. So, if the last instruction, be it emulated or
7611          * not, left the system with the INT_STI flag enabled, it
7612          * means that the last instruction is an sti. We should not
7613          * leave the flag on in this case. The same goes for mov ss
7614          */
7615         if (int_shadow & mask)
7616                 mask = 0;
7617         if (unlikely(int_shadow || mask)) {
7618                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7619                 if (!mask)
7620                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7621         }
7622 }
7623
7624 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7625 {
7626         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7627         if (ctxt->exception.vector == PF_VECTOR)
7628                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7629
7630         if (ctxt->exception.error_code_valid)
7631                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7632                                       ctxt->exception.error_code);
7633         else
7634                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7635         return false;
7636 }
7637
7638 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7639 {
7640         struct x86_emulate_ctxt *ctxt;
7641
7642         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7643         if (!ctxt) {
7644                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7645                 return NULL;
7646         }
7647
7648         ctxt->vcpu = vcpu;
7649         ctxt->ops = &emulate_ops;
7650         vcpu->arch.emulate_ctxt = ctxt;
7651
7652         return ctxt;
7653 }
7654
7655 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7656 {
7657         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7658         int cs_db, cs_l;
7659
7660         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7661
7662         ctxt->gpa_available = false;
7663         ctxt->eflags = kvm_get_rflags(vcpu);
7664         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7665
7666         ctxt->eip = kvm_rip_read(vcpu);
7667         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7668                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7669                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7670                      cs_db                              ? X86EMUL_MODE_PROT32 :
7671                                                           X86EMUL_MODE_PROT16;
7672         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7673         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7674         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7675
7676         ctxt->interruptibility = 0;
7677         ctxt->have_exception = false;
7678         ctxt->exception.vector = -1;
7679         ctxt->perm_ok = false;
7680
7681         init_decode_cache(ctxt);
7682         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7683 }
7684
7685 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7686 {
7687         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7688         int ret;
7689
7690         init_emulate_ctxt(vcpu);
7691
7692         ctxt->op_bytes = 2;
7693         ctxt->ad_bytes = 2;
7694         ctxt->_eip = ctxt->eip + inc_eip;
7695         ret = emulate_int_real(ctxt, irq);
7696
7697         if (ret != X86EMUL_CONTINUE) {
7698                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7699         } else {
7700                 ctxt->eip = ctxt->_eip;
7701                 kvm_rip_write(vcpu, ctxt->eip);
7702                 kvm_set_rflags(vcpu, ctxt->eflags);
7703         }
7704 }
7705 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7706
7707 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7708                                            u8 ndata, u8 *insn_bytes, u8 insn_size)
7709 {
7710         struct kvm_run *run = vcpu->run;
7711         u64 info[5];
7712         u8 info_start;
7713
7714         /*
7715          * Zero the whole array used to retrieve the exit info, as casting to
7716          * u32 for select entries will leave some chunks uninitialized.
7717          */
7718         memset(&info, 0, sizeof(info));
7719
7720         static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
7721                                            &info[2], (u32 *)&info[3],
7722                                            (u32 *)&info[4]);
7723
7724         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7725         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7726
7727         /*
7728          * There's currently space for 13 entries, but 5 are used for the exit
7729          * reason and info.  Restrict to 4 to reduce the maintenance burden
7730          * when expanding kvm_run.emulation_failure in the future.
7731          */
7732         if (WARN_ON_ONCE(ndata > 4))
7733                 ndata = 4;
7734
7735         /* Always include the flags as a 'data' entry. */
7736         info_start = 1;
7737         run->emulation_failure.flags = 0;
7738
7739         if (insn_size) {
7740                 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
7741                               sizeof(run->emulation_failure.insn_bytes) != 16));
7742                 info_start += 2;
7743                 run->emulation_failure.flags |=
7744                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7745                 run->emulation_failure.insn_size = insn_size;
7746                 memset(run->emulation_failure.insn_bytes, 0x90,
7747                        sizeof(run->emulation_failure.insn_bytes));
7748                 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
7749         }
7750
7751         memcpy(&run->internal.data[info_start], info, sizeof(info));
7752         memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
7753                ndata * sizeof(data[0]));
7754
7755         run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
7756 }
7757
7758 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
7759 {
7760         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7761
7762         prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
7763                                        ctxt->fetch.end - ctxt->fetch.data);
7764 }
7765
7766 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7767                                           u8 ndata)
7768 {
7769         prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
7770 }
7771 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
7772
7773 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7774 {
7775         __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
7776 }
7777 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
7778
7779 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7780 {
7781         struct kvm *kvm = vcpu->kvm;
7782
7783         ++vcpu->stat.insn_emulation_fail;
7784         trace_kvm_emulate_insn_failed(vcpu);
7785
7786         if (emulation_type & EMULTYPE_VMWARE_GP) {
7787                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7788                 return 1;
7789         }
7790
7791         if (kvm->arch.exit_on_emulation_error ||
7792             (emulation_type & EMULTYPE_SKIP)) {
7793                 prepare_emulation_ctxt_failure_exit(vcpu);
7794                 return 0;
7795         }
7796
7797         kvm_queue_exception(vcpu, UD_VECTOR);
7798
7799         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7800                 prepare_emulation_ctxt_failure_exit(vcpu);
7801                 return 0;
7802         }
7803
7804         return 1;
7805 }
7806
7807 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7808                                   bool write_fault_to_shadow_pgtable,
7809                                   int emulation_type)
7810 {
7811         gpa_t gpa = cr2_or_gpa;
7812         kvm_pfn_t pfn;
7813
7814         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7815                 return false;
7816
7817         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7818             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7819                 return false;
7820
7821         if (!vcpu->arch.mmu->direct_map) {
7822                 /*
7823                  * Write permission should be allowed since only
7824                  * write access need to be emulated.
7825                  */
7826                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7827
7828                 /*
7829                  * If the mapping is invalid in guest, let cpu retry
7830                  * it to generate fault.
7831                  */
7832                 if (gpa == UNMAPPED_GVA)
7833                         return true;
7834         }
7835
7836         /*
7837          * Do not retry the unhandleable instruction if it faults on the
7838          * readonly host memory, otherwise it will goto a infinite loop:
7839          * retry instruction -> write #PF -> emulation fail -> retry
7840          * instruction -> ...
7841          */
7842         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7843
7844         /*
7845          * If the instruction failed on the error pfn, it can not be fixed,
7846          * report the error to userspace.
7847          */
7848         if (is_error_noslot_pfn(pfn))
7849                 return false;
7850
7851         kvm_release_pfn_clean(pfn);
7852
7853         /* The instructions are well-emulated on direct mmu. */
7854         if (vcpu->arch.mmu->direct_map) {
7855                 unsigned int indirect_shadow_pages;
7856
7857                 write_lock(&vcpu->kvm->mmu_lock);
7858                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7859                 write_unlock(&vcpu->kvm->mmu_lock);
7860
7861                 if (indirect_shadow_pages)
7862                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7863
7864                 return true;
7865         }
7866
7867         /*
7868          * if emulation was due to access to shadowed page table
7869          * and it failed try to unshadow page and re-enter the
7870          * guest to let CPU execute the instruction.
7871          */
7872         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7873
7874         /*
7875          * If the access faults on its page table, it can not
7876          * be fixed by unprotecting shadow page and it should
7877          * be reported to userspace.
7878          */
7879         return !write_fault_to_shadow_pgtable;
7880 }
7881
7882 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7883                               gpa_t cr2_or_gpa,  int emulation_type)
7884 {
7885         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7886         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7887
7888         last_retry_eip = vcpu->arch.last_retry_eip;
7889         last_retry_addr = vcpu->arch.last_retry_addr;
7890
7891         /*
7892          * If the emulation is caused by #PF and it is non-page_table
7893          * writing instruction, it means the VM-EXIT is caused by shadow
7894          * page protected, we can zap the shadow page and retry this
7895          * instruction directly.
7896          *
7897          * Note: if the guest uses a non-page-table modifying instruction
7898          * on the PDE that points to the instruction, then we will unmap
7899          * the instruction and go to an infinite loop. So, we cache the
7900          * last retried eip and the last fault address, if we meet the eip
7901          * and the address again, we can break out of the potential infinite
7902          * loop.
7903          */
7904         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7905
7906         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7907                 return false;
7908
7909         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7910             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7911                 return false;
7912
7913         if (x86_page_table_writing_insn(ctxt))
7914                 return false;
7915
7916         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7917                 return false;
7918
7919         vcpu->arch.last_retry_eip = ctxt->eip;
7920         vcpu->arch.last_retry_addr = cr2_or_gpa;
7921
7922         if (!vcpu->arch.mmu->direct_map)
7923                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7924
7925         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7926
7927         return true;
7928 }
7929
7930 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7931 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7932
7933 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7934 {
7935         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7936
7937         if (entering_smm) {
7938                 vcpu->arch.hflags |= HF_SMM_MASK;
7939         } else {
7940                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7941
7942                 /* Process a latched INIT or SMI, if any.  */
7943                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7944
7945                 /*
7946                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7947                  * on SMM exit we still need to reload them from
7948                  * guest memory
7949                  */
7950                 vcpu->arch.pdptrs_from_userspace = false;
7951         }
7952
7953         kvm_mmu_reset_context(vcpu);
7954 }
7955
7956 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7957                                 unsigned long *db)
7958 {
7959         u32 dr6 = 0;
7960         int i;
7961         u32 enable, rwlen;
7962
7963         enable = dr7;
7964         rwlen = dr7 >> 16;
7965         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7966                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7967                         dr6 |= (1 << i);
7968         return dr6;
7969 }
7970
7971 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7972 {
7973         struct kvm_run *kvm_run = vcpu->run;
7974
7975         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7976                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7977                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7978                 kvm_run->debug.arch.exception = DB_VECTOR;
7979                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7980                 return 0;
7981         }
7982         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7983         return 1;
7984 }
7985
7986 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7987 {
7988         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7989         int r;
7990
7991         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
7992         if (unlikely(!r))
7993                 return 0;
7994
7995         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
7996
7997         /*
7998          * rflags is the old, "raw" value of the flags.  The new value has
7999          * not been saved yet.
8000          *
8001          * This is correct even for TF set by the guest, because "the
8002          * processor will not generate this exception after the instruction
8003          * that sets the TF flag".
8004          */
8005         if (unlikely(rflags & X86_EFLAGS_TF))
8006                 r = kvm_vcpu_do_singlestep(vcpu);
8007         return r;
8008 }
8009 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8010
8011 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
8012 {
8013         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8014             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8015                 struct kvm_run *kvm_run = vcpu->run;
8016                 unsigned long eip = kvm_get_linear_rip(vcpu);
8017                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8018                                            vcpu->arch.guest_debug_dr7,
8019                                            vcpu->arch.eff_db);
8020
8021                 if (dr6 != 0) {
8022                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8023                         kvm_run->debug.arch.pc = eip;
8024                         kvm_run->debug.arch.exception = DB_VECTOR;
8025                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
8026                         *r = 0;
8027                         return true;
8028                 }
8029         }
8030
8031         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8032             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8033                 unsigned long eip = kvm_get_linear_rip(vcpu);
8034                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8035                                            vcpu->arch.dr7,
8036                                            vcpu->arch.db);
8037
8038                 if (dr6 != 0) {
8039                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8040                         *r = 1;
8041                         return true;
8042                 }
8043         }
8044
8045         return false;
8046 }
8047
8048 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8049 {
8050         switch (ctxt->opcode_len) {
8051         case 1:
8052                 switch (ctxt->b) {
8053                 case 0xe4:      /* IN */
8054                 case 0xe5:
8055                 case 0xec:
8056                 case 0xed:
8057                 case 0xe6:      /* OUT */
8058                 case 0xe7:
8059                 case 0xee:
8060                 case 0xef:
8061                 case 0x6c:      /* INS */
8062                 case 0x6d:
8063                 case 0x6e:      /* OUTS */
8064                 case 0x6f:
8065                         return true;
8066                 }
8067                 break;
8068         case 2:
8069                 switch (ctxt->b) {
8070                 case 0x33:      /* RDPMC */
8071                         return true;
8072                 }
8073                 break;
8074         }
8075
8076         return false;
8077 }
8078
8079 /*
8080  * Decode to be emulated instruction. Return EMULATION_OK if success.
8081  */
8082 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8083                                     void *insn, int insn_len)
8084 {
8085         int r = EMULATION_OK;
8086         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8087
8088         init_emulate_ctxt(vcpu);
8089
8090         /*
8091          * We will reenter on the same instruction since we do not set
8092          * complete_userspace_io. This does not handle watchpoints yet,
8093          * those would be handled in the emulate_ops.
8094          */
8095         if (!(emulation_type & EMULTYPE_SKIP) &&
8096             kvm_vcpu_check_breakpoint(vcpu, &r))
8097                 return r;
8098
8099         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8100
8101         trace_kvm_emulate_insn_start(vcpu);
8102         ++vcpu->stat.insn_emulation;
8103
8104         return r;
8105 }
8106 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8107
8108 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8109                             int emulation_type, void *insn, int insn_len)
8110 {
8111         int r;
8112         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8113         bool writeback = true;
8114         bool write_fault_to_spt;
8115
8116         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
8117                 return 1;
8118
8119         vcpu->arch.l1tf_flush_l1d = true;
8120
8121         /*
8122          * Clear write_fault_to_shadow_pgtable here to ensure it is
8123          * never reused.
8124          */
8125         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8126         vcpu->arch.write_fault_to_shadow_pgtable = false;
8127
8128         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8129                 kvm_clear_exception_queue(vcpu);
8130
8131                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8132                                                     insn, insn_len);
8133                 if (r != EMULATION_OK)  {
8134                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8135                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8136                                 kvm_queue_exception(vcpu, UD_VECTOR);
8137                                 return 1;
8138                         }
8139                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8140                                                   write_fault_to_spt,
8141                                                   emulation_type))
8142                                 return 1;
8143                         if (ctxt->have_exception) {
8144                                 /*
8145                                  * #UD should result in just EMULATION_FAILED, and trap-like
8146                                  * exception should not be encountered during decode.
8147                                  */
8148                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8149                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8150                                 inject_emulated_exception(vcpu);
8151                                 return 1;
8152                         }
8153                         return handle_emulation_failure(vcpu, emulation_type);
8154                 }
8155         }
8156
8157         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8158             !is_vmware_backdoor_opcode(ctxt)) {
8159                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8160                 return 1;
8161         }
8162
8163         /*
8164          * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8165          * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8166          * The caller is responsible for updating interruptibility state and
8167          * injecting single-step #DBs.
8168          */
8169         if (emulation_type & EMULTYPE_SKIP) {
8170                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8171                         ctxt->eip = (u32)ctxt->_eip;
8172                 else
8173                         ctxt->eip = ctxt->_eip;
8174
8175                 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8176                         r = 1;
8177                         goto writeback;
8178                 }
8179
8180                 kvm_rip_write(vcpu, ctxt->eip);
8181                 if (ctxt->eflags & X86_EFLAGS_RF)
8182                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8183                 return 1;
8184         }
8185
8186         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8187                 return 1;
8188
8189         /* this is needed for vmware backdoor interface to work since it
8190            changes registers values  during IO operation */
8191         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8192                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8193                 emulator_invalidate_register_cache(ctxt);
8194         }
8195
8196 restart:
8197         if (emulation_type & EMULTYPE_PF) {
8198                 /* Save the faulting GPA (cr2) in the address field */
8199                 ctxt->exception.address = cr2_or_gpa;
8200
8201                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8202                 if (vcpu->arch.mmu->direct_map) {
8203                         ctxt->gpa_available = true;
8204                         ctxt->gpa_val = cr2_or_gpa;
8205                 }
8206         } else {
8207                 /* Sanitize the address out of an abundance of paranoia. */
8208                 ctxt->exception.address = 0;
8209         }
8210
8211         r = x86_emulate_insn(ctxt);
8212
8213         if (r == EMULATION_INTERCEPTED)
8214                 return 1;
8215
8216         if (r == EMULATION_FAILED) {
8217                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8218                                         emulation_type))
8219                         return 1;
8220
8221                 return handle_emulation_failure(vcpu, emulation_type);
8222         }
8223
8224         if (ctxt->have_exception) {
8225                 r = 1;
8226                 if (inject_emulated_exception(vcpu))
8227                         return r;
8228         } else if (vcpu->arch.pio.count) {
8229                 if (!vcpu->arch.pio.in) {
8230                         /* FIXME: return into emulator if single-stepping.  */
8231                         vcpu->arch.pio.count = 0;
8232                 } else {
8233                         writeback = false;
8234                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8235                 }
8236                 r = 0;
8237         } else if (vcpu->mmio_needed) {
8238                 ++vcpu->stat.mmio_exits;
8239
8240                 if (!vcpu->mmio_is_write)
8241                         writeback = false;
8242                 r = 0;
8243                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8244         } else if (vcpu->arch.complete_userspace_io) {
8245                 writeback = false;
8246                 r = 0;
8247         } else if (r == EMULATION_RESTART)
8248                 goto restart;
8249         else
8250                 r = 1;
8251
8252 writeback:
8253         if (writeback) {
8254                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8255                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8256                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8257                 if (!ctxt->have_exception ||
8258                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8259                         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8260                         if (ctxt->is_branch)
8261                                 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8262                         kvm_rip_write(vcpu, ctxt->eip);
8263                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8264                                 r = kvm_vcpu_do_singlestep(vcpu);
8265                         if (kvm_x86_ops.update_emulated_instruction)
8266                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8267                         __kvm_set_rflags(vcpu, ctxt->eflags);
8268                 }
8269
8270                 /*
8271                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8272                  * do nothing, and it will be requested again as soon as
8273                  * the shadow expires.  But we still need to check here,
8274                  * because POPF has no interrupt shadow.
8275                  */
8276                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8277                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8278         } else
8279                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8280
8281         return r;
8282 }
8283
8284 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8285 {
8286         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8287 }
8288 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8289
8290 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8291                                         void *insn, int insn_len)
8292 {
8293         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8294 }
8295 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8296
8297 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8298 {
8299         vcpu->arch.pio.count = 0;
8300         return 1;
8301 }
8302
8303 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8304 {
8305         vcpu->arch.pio.count = 0;
8306
8307         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8308                 return 1;
8309
8310         return kvm_skip_emulated_instruction(vcpu);
8311 }
8312
8313 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8314                             unsigned short port)
8315 {
8316         unsigned long val = kvm_rax_read(vcpu);
8317         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8318
8319         if (ret)
8320                 return ret;
8321
8322         /*
8323          * Workaround userspace that relies on old KVM behavior of %rip being
8324          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8325          */
8326         if (port == 0x7e &&
8327             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8328                 vcpu->arch.complete_userspace_io =
8329                         complete_fast_pio_out_port_0x7e;
8330                 kvm_skip_emulated_instruction(vcpu);
8331         } else {
8332                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8333                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8334         }
8335         return 0;
8336 }
8337
8338 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8339 {
8340         unsigned long val;
8341
8342         /* We should only ever be called with arch.pio.count equal to 1 */
8343         BUG_ON(vcpu->arch.pio.count != 1);
8344
8345         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8346                 vcpu->arch.pio.count = 0;
8347                 return 1;
8348         }
8349
8350         /* For size less than 4 we merge, else we zero extend */
8351         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8352
8353         /*
8354          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8355          * the copy and tracing
8356          */
8357         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8358         kvm_rax_write(vcpu, val);
8359
8360         return kvm_skip_emulated_instruction(vcpu);
8361 }
8362
8363 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8364                            unsigned short port)
8365 {
8366         unsigned long val;
8367         int ret;
8368
8369         /* For size less than 4 we merge, else we zero extend */
8370         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8371
8372         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8373         if (ret) {
8374                 kvm_rax_write(vcpu, val);
8375                 return ret;
8376         }
8377
8378         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8379         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8380
8381         return 0;
8382 }
8383
8384 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8385 {
8386         int ret;
8387
8388         if (in)
8389                 ret = kvm_fast_pio_in(vcpu, size, port);
8390         else
8391                 ret = kvm_fast_pio_out(vcpu, size, port);
8392         return ret && kvm_skip_emulated_instruction(vcpu);
8393 }
8394 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8395
8396 static int kvmclock_cpu_down_prep(unsigned int cpu)
8397 {
8398         __this_cpu_write(cpu_tsc_khz, 0);
8399         return 0;
8400 }
8401
8402 static void tsc_khz_changed(void *data)
8403 {
8404         struct cpufreq_freqs *freq = data;
8405         unsigned long khz = 0;
8406
8407         if (data)
8408                 khz = freq->new;
8409         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8410                 khz = cpufreq_quick_get(raw_smp_processor_id());
8411         if (!khz)
8412                 khz = tsc_khz;
8413         __this_cpu_write(cpu_tsc_khz, khz);
8414 }
8415
8416 #ifdef CONFIG_X86_64
8417 static void kvm_hyperv_tsc_notifier(void)
8418 {
8419         struct kvm *kvm;
8420         int cpu;
8421
8422         mutex_lock(&kvm_lock);
8423         list_for_each_entry(kvm, &vm_list, vm_list)
8424                 kvm_make_mclock_inprogress_request(kvm);
8425
8426         /* no guest entries from this point */
8427         hyperv_stop_tsc_emulation();
8428
8429         /* TSC frequency always matches when on Hyper-V */
8430         for_each_present_cpu(cpu)
8431                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8432         kvm_max_guest_tsc_khz = tsc_khz;
8433
8434         list_for_each_entry(kvm, &vm_list, vm_list) {
8435                 __kvm_start_pvclock_update(kvm);
8436                 pvclock_update_vm_gtod_copy(kvm);
8437                 kvm_end_pvclock_update(kvm);
8438         }
8439
8440         mutex_unlock(&kvm_lock);
8441 }
8442 #endif
8443
8444 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8445 {
8446         struct kvm *kvm;
8447         struct kvm_vcpu *vcpu;
8448         int send_ipi = 0;
8449         unsigned long i;
8450
8451         /*
8452          * We allow guests to temporarily run on slowing clocks,
8453          * provided we notify them after, or to run on accelerating
8454          * clocks, provided we notify them before.  Thus time never
8455          * goes backwards.
8456          *
8457          * However, we have a problem.  We can't atomically update
8458          * the frequency of a given CPU from this function; it is
8459          * merely a notifier, which can be called from any CPU.
8460          * Changing the TSC frequency at arbitrary points in time
8461          * requires a recomputation of local variables related to
8462          * the TSC for each VCPU.  We must flag these local variables
8463          * to be updated and be sure the update takes place with the
8464          * new frequency before any guests proceed.
8465          *
8466          * Unfortunately, the combination of hotplug CPU and frequency
8467          * change creates an intractable locking scenario; the order
8468          * of when these callouts happen is undefined with respect to
8469          * CPU hotplug, and they can race with each other.  As such,
8470          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8471          * undefined; you can actually have a CPU frequency change take
8472          * place in between the computation of X and the setting of the
8473          * variable.  To protect against this problem, all updates of
8474          * the per_cpu tsc_khz variable are done in an interrupt
8475          * protected IPI, and all callers wishing to update the value
8476          * must wait for a synchronous IPI to complete (which is trivial
8477          * if the caller is on the CPU already).  This establishes the
8478          * necessary total order on variable updates.
8479          *
8480          * Note that because a guest time update may take place
8481          * anytime after the setting of the VCPU's request bit, the
8482          * correct TSC value must be set before the request.  However,
8483          * to ensure the update actually makes it to any guest which
8484          * starts running in hardware virtualization between the set
8485          * and the acquisition of the spinlock, we must also ping the
8486          * CPU after setting the request bit.
8487          *
8488          */
8489
8490         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8491
8492         mutex_lock(&kvm_lock);
8493         list_for_each_entry(kvm, &vm_list, vm_list) {
8494                 kvm_for_each_vcpu(i, vcpu, kvm) {
8495                         if (vcpu->cpu != cpu)
8496                                 continue;
8497                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8498                         if (vcpu->cpu != raw_smp_processor_id())
8499                                 send_ipi = 1;
8500                 }
8501         }
8502         mutex_unlock(&kvm_lock);
8503
8504         if (freq->old < freq->new && send_ipi) {
8505                 /*
8506                  * We upscale the frequency.  Must make the guest
8507                  * doesn't see old kvmclock values while running with
8508                  * the new frequency, otherwise we risk the guest sees
8509                  * time go backwards.
8510                  *
8511                  * In case we update the frequency for another cpu
8512                  * (which might be in guest context) send an interrupt
8513                  * to kick the cpu out of guest context.  Next time
8514                  * guest context is entered kvmclock will be updated,
8515                  * so the guest will not see stale values.
8516                  */
8517                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8518         }
8519 }
8520
8521 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8522                                      void *data)
8523 {
8524         struct cpufreq_freqs *freq = data;
8525         int cpu;
8526
8527         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8528                 return 0;
8529         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8530                 return 0;
8531
8532         for_each_cpu(cpu, freq->policy->cpus)
8533                 __kvmclock_cpufreq_notifier(freq, cpu);
8534
8535         return 0;
8536 }
8537
8538 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8539         .notifier_call  = kvmclock_cpufreq_notifier
8540 };
8541
8542 static int kvmclock_cpu_online(unsigned int cpu)
8543 {
8544         tsc_khz_changed(NULL);
8545         return 0;
8546 }
8547
8548 static void kvm_timer_init(void)
8549 {
8550         max_tsc_khz = tsc_khz;
8551
8552         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8553 #ifdef CONFIG_CPU_FREQ
8554                 struct cpufreq_policy *policy;
8555                 int cpu;
8556
8557                 cpu = get_cpu();
8558                 policy = cpufreq_cpu_get(cpu);
8559                 if (policy) {
8560                         if (policy->cpuinfo.max_freq)
8561                                 max_tsc_khz = policy->cpuinfo.max_freq;
8562                         cpufreq_cpu_put(policy);
8563                 }
8564                 put_cpu();
8565 #endif
8566                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8567                                           CPUFREQ_TRANSITION_NOTIFIER);
8568         }
8569
8570         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8571                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8572 }
8573
8574 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8575 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8576
8577 int kvm_is_in_guest(void)
8578 {
8579         return __this_cpu_read(current_vcpu) != NULL;
8580 }
8581
8582 static int kvm_is_user_mode(void)
8583 {
8584         int user_mode = 3;
8585
8586         if (__this_cpu_read(current_vcpu))
8587                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8588
8589         return user_mode != 0;
8590 }
8591
8592 static unsigned long kvm_get_guest_ip(void)
8593 {
8594         unsigned long ip = 0;
8595
8596         if (__this_cpu_read(current_vcpu))
8597                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8598
8599         return ip;
8600 }
8601
8602 static void kvm_handle_intel_pt_intr(void)
8603 {
8604         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8605
8606         kvm_make_request(KVM_REQ_PMI, vcpu);
8607         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8608                         (unsigned long *)&vcpu->arch.pmu.global_status);
8609 }
8610
8611 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8612         .is_in_guest            = kvm_is_in_guest,
8613         .is_user_mode           = kvm_is_user_mode,
8614         .get_guest_ip           = kvm_get_guest_ip,
8615         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8616 };
8617
8618 #ifdef CONFIG_X86_64
8619 static void pvclock_gtod_update_fn(struct work_struct *work)
8620 {
8621         struct kvm *kvm;
8622         struct kvm_vcpu *vcpu;
8623         unsigned long i;
8624
8625         mutex_lock(&kvm_lock);
8626         list_for_each_entry(kvm, &vm_list, vm_list)
8627                 kvm_for_each_vcpu(i, vcpu, kvm)
8628                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8629         atomic_set(&kvm_guest_has_master_clock, 0);
8630         mutex_unlock(&kvm_lock);
8631 }
8632
8633 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8634
8635 /*
8636  * Indirection to move queue_work() out of the tk_core.seq write held
8637  * region to prevent possible deadlocks against time accessors which
8638  * are invoked with work related locks held.
8639  */
8640 static void pvclock_irq_work_fn(struct irq_work *w)
8641 {
8642         queue_work(system_long_wq, &pvclock_gtod_work);
8643 }
8644
8645 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8646
8647 /*
8648  * Notification about pvclock gtod data update.
8649  */
8650 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8651                                void *priv)
8652 {
8653         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8654         struct timekeeper *tk = priv;
8655
8656         update_pvclock_gtod(tk);
8657
8658         /*
8659          * Disable master clock if host does not trust, or does not use,
8660          * TSC based clocksource. Delegate queue_work() to irq_work as
8661          * this is invoked with tk_core.seq write held.
8662          */
8663         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8664             atomic_read(&kvm_guest_has_master_clock) != 0)
8665                 irq_work_queue(&pvclock_irq_work);
8666         return 0;
8667 }
8668
8669 static struct notifier_block pvclock_gtod_notifier = {
8670         .notifier_call = pvclock_gtod_notify,
8671 };
8672 #endif
8673
8674 int kvm_arch_init(void *opaque)
8675 {
8676         struct kvm_x86_init_ops *ops = opaque;
8677         int r;
8678
8679         if (kvm_x86_ops.hardware_enable) {
8680                 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8681                 r = -EEXIST;
8682                 goto out;
8683         }
8684
8685         if (!ops->cpu_has_kvm_support()) {
8686                 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8687                                    ops->runtime_ops->name);
8688                 r = -EOPNOTSUPP;
8689                 goto out;
8690         }
8691         if (ops->disabled_by_bios()) {
8692                 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8693                                    ops->runtime_ops->name);
8694                 r = -EOPNOTSUPP;
8695                 goto out;
8696         }
8697
8698         /*
8699          * KVM explicitly assumes that the guest has an FPU and
8700          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8701          * vCPU's FPU state as a fxregs_state struct.
8702          */
8703         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8704                 printk(KERN_ERR "kvm: inadequate fpu\n");
8705                 r = -EOPNOTSUPP;
8706                 goto out;
8707         }
8708
8709         r = -ENOMEM;
8710
8711         x86_emulator_cache = kvm_alloc_emulator_cache();
8712         if (!x86_emulator_cache) {
8713                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8714                 goto out;
8715         }
8716
8717         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8718         if (!user_return_msrs) {
8719                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8720                 goto out_free_x86_emulator_cache;
8721         }
8722         kvm_nr_uret_msrs = 0;
8723
8724         r = kvm_mmu_module_init();
8725         if (r)
8726                 goto out_free_percpu;
8727
8728         kvm_timer_init();
8729
8730         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8731
8732         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8733                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8734                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8735         }
8736
8737         if (pi_inject_timer == -1)
8738                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8739 #ifdef CONFIG_X86_64
8740         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8741
8742         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8743                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8744 #endif
8745
8746         return 0;
8747
8748 out_free_percpu:
8749         free_percpu(user_return_msrs);
8750 out_free_x86_emulator_cache:
8751         kmem_cache_destroy(x86_emulator_cache);
8752 out:
8753         return r;
8754 }
8755
8756 void kvm_arch_exit(void)
8757 {
8758 #ifdef CONFIG_X86_64
8759         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8760                 clear_hv_tscchange_cb();
8761 #endif
8762         kvm_lapic_exit();
8763         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8764
8765         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8766                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8767                                             CPUFREQ_TRANSITION_NOTIFIER);
8768         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8769 #ifdef CONFIG_X86_64
8770         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8771         irq_work_sync(&pvclock_irq_work);
8772         cancel_work_sync(&pvclock_gtod_work);
8773 #endif
8774         kvm_x86_ops.hardware_enable = NULL;
8775         kvm_mmu_module_exit();
8776         free_percpu(user_return_msrs);
8777         kmem_cache_destroy(x86_emulator_cache);
8778 #ifdef CONFIG_KVM_XEN
8779         static_key_deferred_flush(&kvm_xen_enabled);
8780         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8781 #endif
8782 }
8783
8784 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
8785 {
8786         /*
8787          * The vCPU has halted, e.g. executed HLT.  Update the run state if the
8788          * local APIC is in-kernel, the run loop will detect the non-runnable
8789          * state and halt the vCPU.  Exit to userspace if the local APIC is
8790          * managed by userspace, in which case userspace is responsible for
8791          * handling wake events.
8792          */
8793         ++vcpu->stat.halt_exits;
8794         if (lapic_in_kernel(vcpu)) {
8795                 vcpu->arch.mp_state = state;
8796                 return 1;
8797         } else {
8798                 vcpu->run->exit_reason = reason;
8799                 return 0;
8800         }
8801 }
8802
8803 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
8804 {
8805         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8806 }
8807 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
8808
8809 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8810 {
8811         int ret = kvm_skip_emulated_instruction(vcpu);
8812         /*
8813          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8814          * KVM_EXIT_DEBUG here.
8815          */
8816         return kvm_emulate_halt_noskip(vcpu) && ret;
8817 }
8818 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8819
8820 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8821 {
8822         int ret = kvm_skip_emulated_instruction(vcpu);
8823
8824         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
8825                                         KVM_EXIT_AP_RESET_HOLD) && ret;
8826 }
8827 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8828
8829 #ifdef CONFIG_X86_64
8830 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8831                                 unsigned long clock_type)
8832 {
8833         struct kvm_clock_pairing clock_pairing;
8834         struct timespec64 ts;
8835         u64 cycle;
8836         int ret;
8837
8838         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8839                 return -KVM_EOPNOTSUPP;
8840
8841         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8842                 return -KVM_EOPNOTSUPP;
8843
8844         clock_pairing.sec = ts.tv_sec;
8845         clock_pairing.nsec = ts.tv_nsec;
8846         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8847         clock_pairing.flags = 0;
8848         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8849
8850         ret = 0;
8851         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8852                             sizeof(struct kvm_clock_pairing)))
8853                 ret = -KVM_EFAULT;
8854
8855         return ret;
8856 }
8857 #endif
8858
8859 /*
8860  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8861  *
8862  * @apicid - apicid of vcpu to be kicked.
8863  */
8864 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8865 {
8866         struct kvm_lapic_irq lapic_irq;
8867
8868         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8869         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8870         lapic_irq.level = 0;
8871         lapic_irq.dest_id = apicid;
8872         lapic_irq.msi_redir_hint = false;
8873
8874         lapic_irq.delivery_mode = APIC_DM_REMRD;
8875         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8876 }
8877
8878 bool kvm_apicv_activated(struct kvm *kvm)
8879 {
8880         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8881 }
8882 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8883
8884 static void kvm_apicv_init(struct kvm *kvm)
8885 {
8886         init_rwsem(&kvm->arch.apicv_update_lock);
8887
8888         set_bit(APICV_INHIBIT_REASON_ABSENT,
8889                 &kvm->arch.apicv_inhibit_reasons);
8890         if (!enable_apicv)
8891                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8892                         &kvm->arch.apicv_inhibit_reasons);
8893 }
8894
8895 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8896 {
8897         struct kvm_vcpu *target = NULL;
8898         struct kvm_apic_map *map;
8899
8900         vcpu->stat.directed_yield_attempted++;
8901
8902         if (single_task_running())
8903                 goto no_yield;
8904
8905         rcu_read_lock();
8906         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8907
8908         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8909                 target = map->phys_map[dest_id]->vcpu;
8910
8911         rcu_read_unlock();
8912
8913         if (!target || !READ_ONCE(target->ready))
8914                 goto no_yield;
8915
8916         /* Ignore requests to yield to self */
8917         if (vcpu == target)
8918                 goto no_yield;
8919
8920         if (kvm_vcpu_yield_to(target) <= 0)
8921                 goto no_yield;
8922
8923         vcpu->stat.directed_yield_successful++;
8924
8925 no_yield:
8926         return;
8927 }
8928
8929 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8930 {
8931         u64 ret = vcpu->run->hypercall.ret;
8932
8933         if (!is_64_bit_mode(vcpu))
8934                 ret = (u32)ret;
8935         kvm_rax_write(vcpu, ret);
8936         ++vcpu->stat.hypercalls;
8937         return kvm_skip_emulated_instruction(vcpu);
8938 }
8939
8940 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8941 {
8942         unsigned long nr, a0, a1, a2, a3, ret;
8943         int op_64_bit;
8944
8945         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8946                 return kvm_xen_hypercall(vcpu);
8947
8948         if (kvm_hv_hypercall_enabled(vcpu))
8949                 return kvm_hv_hypercall(vcpu);
8950
8951         nr = kvm_rax_read(vcpu);
8952         a0 = kvm_rbx_read(vcpu);
8953         a1 = kvm_rcx_read(vcpu);
8954         a2 = kvm_rdx_read(vcpu);
8955         a3 = kvm_rsi_read(vcpu);
8956
8957         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8958
8959         op_64_bit = is_64_bit_hypercall(vcpu);
8960         if (!op_64_bit) {
8961                 nr &= 0xFFFFFFFF;
8962                 a0 &= 0xFFFFFFFF;
8963                 a1 &= 0xFFFFFFFF;
8964                 a2 &= 0xFFFFFFFF;
8965                 a3 &= 0xFFFFFFFF;
8966         }
8967
8968         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8969                 ret = -KVM_EPERM;
8970                 goto out;
8971         }
8972
8973         ret = -KVM_ENOSYS;
8974
8975         switch (nr) {
8976         case KVM_HC_VAPIC_POLL_IRQ:
8977                 ret = 0;
8978                 break;
8979         case KVM_HC_KICK_CPU:
8980                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8981                         break;
8982
8983                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8984                 kvm_sched_yield(vcpu, a1);
8985                 ret = 0;
8986                 break;
8987 #ifdef CONFIG_X86_64
8988         case KVM_HC_CLOCK_PAIRING:
8989                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8990                 break;
8991 #endif
8992         case KVM_HC_SEND_IPI:
8993                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8994                         break;
8995
8996                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8997                 break;
8998         case KVM_HC_SCHED_YIELD:
8999                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9000                         break;
9001
9002                 kvm_sched_yield(vcpu, a0);
9003                 ret = 0;
9004                 break;
9005         case KVM_HC_MAP_GPA_RANGE: {
9006                 u64 gpa = a0, npages = a1, attrs = a2;
9007
9008                 ret = -KVM_ENOSYS;
9009                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9010                         break;
9011
9012                 if (!PAGE_ALIGNED(gpa) || !npages ||
9013                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9014                         ret = -KVM_EINVAL;
9015                         break;
9016                 }
9017
9018                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
9019                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9020                 vcpu->run->hypercall.args[0]  = gpa;
9021                 vcpu->run->hypercall.args[1]  = npages;
9022                 vcpu->run->hypercall.args[2]  = attrs;
9023                 vcpu->run->hypercall.longmode = op_64_bit;
9024                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9025                 return 0;
9026         }
9027         default:
9028                 ret = -KVM_ENOSYS;
9029                 break;
9030         }
9031 out:
9032         if (!op_64_bit)
9033                 ret = (u32)ret;
9034         kvm_rax_write(vcpu, ret);
9035
9036         ++vcpu->stat.hypercalls;
9037         return kvm_skip_emulated_instruction(vcpu);
9038 }
9039 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9040
9041 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9042 {
9043         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9044         char instruction[3];
9045         unsigned long rip = kvm_rip_read(vcpu);
9046
9047         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9048
9049         return emulator_write_emulated(ctxt, rip, instruction, 3,
9050                 &ctxt->exception);
9051 }
9052
9053 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9054 {
9055         return vcpu->run->request_interrupt_window &&
9056                 likely(!pic_in_kernel(vcpu->kvm));
9057 }
9058
9059 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9060 {
9061         struct kvm_run *kvm_run = vcpu->run;
9062
9063         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9064         kvm_run->cr8 = kvm_get_cr8(vcpu);
9065         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9066
9067         /*
9068          * The call to kvm_ready_for_interrupt_injection() may end up in
9069          * kvm_xen_has_interrupt() which may require the srcu lock to be
9070          * held, to protect against changes in the vcpu_info address.
9071          */
9072         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9073         kvm_run->ready_for_interrupt_injection =
9074                 pic_in_kernel(vcpu->kvm) ||
9075                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9076         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9077
9078         if (is_smm(vcpu))
9079                 kvm_run->flags |= KVM_RUN_X86_SMM;
9080 }
9081
9082 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9083 {
9084         int max_irr, tpr;
9085
9086         if (!kvm_x86_ops.update_cr8_intercept)
9087                 return;
9088
9089         if (!lapic_in_kernel(vcpu))
9090                 return;
9091
9092         if (vcpu->arch.apicv_active)
9093                 return;
9094
9095         if (!vcpu->arch.apic->vapic_addr)
9096                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9097         else
9098                 max_irr = -1;
9099
9100         if (max_irr != -1)
9101                 max_irr >>= 4;
9102
9103         tpr = kvm_lapic_get_cr8(vcpu);
9104
9105         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9106 }
9107
9108
9109 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9110 {
9111         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9112                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9113                 return 1;
9114         }
9115
9116         return kvm_x86_ops.nested_ops->check_events(vcpu);
9117 }
9118
9119 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9120 {
9121         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9122                 vcpu->arch.exception.error_code = false;
9123         static_call(kvm_x86_queue_exception)(vcpu);
9124 }
9125
9126 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9127 {
9128         int r;
9129         bool can_inject = true;
9130
9131         /* try to reinject previous events if any */
9132
9133         if (vcpu->arch.exception.injected) {
9134                 kvm_inject_exception(vcpu);
9135                 can_inject = false;
9136         }
9137         /*
9138          * Do not inject an NMI or interrupt if there is a pending
9139          * exception.  Exceptions and interrupts are recognized at
9140          * instruction boundaries, i.e. the start of an instruction.
9141          * Trap-like exceptions, e.g. #DB, have higher priority than
9142          * NMIs and interrupts, i.e. traps are recognized before an
9143          * NMI/interrupt that's pending on the same instruction.
9144          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9145          * priority, but are only generated (pended) during instruction
9146          * execution, i.e. a pending fault-like exception means the
9147          * fault occurred on the *previous* instruction and must be
9148          * serviced prior to recognizing any new events in order to
9149          * fully complete the previous instruction.
9150          */
9151         else if (!vcpu->arch.exception.pending) {
9152                 if (vcpu->arch.nmi_injected) {
9153                         static_call(kvm_x86_set_nmi)(vcpu);
9154                         can_inject = false;
9155                 } else if (vcpu->arch.interrupt.injected) {
9156                         static_call(kvm_x86_set_irq)(vcpu);
9157                         can_inject = false;
9158                 }
9159         }
9160
9161         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9162                      vcpu->arch.exception.pending);
9163
9164         /*
9165          * Call check_nested_events() even if we reinjected a previous event
9166          * in order for caller to determine if it should require immediate-exit
9167          * from L2 to L1 due to pending L1 events which require exit
9168          * from L2 to L1.
9169          */
9170         if (is_guest_mode(vcpu)) {
9171                 r = kvm_check_nested_events(vcpu);
9172                 if (r < 0)
9173                         goto out;
9174         }
9175
9176         /* try to inject new event if pending */
9177         if (vcpu->arch.exception.pending) {
9178                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9179                                         vcpu->arch.exception.has_error_code,
9180                                         vcpu->arch.exception.error_code);
9181
9182                 vcpu->arch.exception.pending = false;
9183                 vcpu->arch.exception.injected = true;
9184
9185                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9186                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9187                                              X86_EFLAGS_RF);
9188
9189                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9190                         kvm_deliver_exception_payload(vcpu);
9191                         if (vcpu->arch.dr7 & DR7_GD) {
9192                                 vcpu->arch.dr7 &= ~DR7_GD;
9193                                 kvm_update_dr7(vcpu);
9194                         }
9195                 }
9196
9197                 kvm_inject_exception(vcpu);
9198                 can_inject = false;
9199         }
9200
9201         /* Don't inject interrupts if the user asked to avoid doing so */
9202         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9203                 return 0;
9204
9205         /*
9206          * Finally, inject interrupt events.  If an event cannot be injected
9207          * due to architectural conditions (e.g. IF=0) a window-open exit
9208          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9209          * and can architecturally be injected, but we cannot do it right now:
9210          * an interrupt could have arrived just now and we have to inject it
9211          * as a vmexit, or there could already an event in the queue, which is
9212          * indicated by can_inject.  In that case we request an immediate exit
9213          * in order to make progress and get back here for another iteration.
9214          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9215          */
9216         if (vcpu->arch.smi_pending) {
9217                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9218                 if (r < 0)
9219                         goto out;
9220                 if (r) {
9221                         vcpu->arch.smi_pending = false;
9222                         ++vcpu->arch.smi_count;
9223                         enter_smm(vcpu);
9224                         can_inject = false;
9225                 } else
9226                         static_call(kvm_x86_enable_smi_window)(vcpu);
9227         }
9228
9229         if (vcpu->arch.nmi_pending) {
9230                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9231                 if (r < 0)
9232                         goto out;
9233                 if (r) {
9234                         --vcpu->arch.nmi_pending;
9235                         vcpu->arch.nmi_injected = true;
9236                         static_call(kvm_x86_set_nmi)(vcpu);
9237                         can_inject = false;
9238                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9239                 }
9240                 if (vcpu->arch.nmi_pending)
9241                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9242         }
9243
9244         if (kvm_cpu_has_injectable_intr(vcpu)) {
9245                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9246                 if (r < 0)
9247                         goto out;
9248                 if (r) {
9249                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9250                         static_call(kvm_x86_set_irq)(vcpu);
9251                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9252                 }
9253                 if (kvm_cpu_has_injectable_intr(vcpu))
9254                         static_call(kvm_x86_enable_irq_window)(vcpu);
9255         }
9256
9257         if (is_guest_mode(vcpu) &&
9258             kvm_x86_ops.nested_ops->hv_timer_pending &&
9259             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9260                 *req_immediate_exit = true;
9261
9262         WARN_ON(vcpu->arch.exception.pending);
9263         return 0;
9264
9265 out:
9266         if (r == -EBUSY) {
9267                 *req_immediate_exit = true;
9268                 r = 0;
9269         }
9270         return r;
9271 }
9272
9273 static void process_nmi(struct kvm_vcpu *vcpu)
9274 {
9275         unsigned limit = 2;
9276
9277         /*
9278          * x86 is limited to one NMI running, and one NMI pending after it.
9279          * If an NMI is already in progress, limit further NMIs to just one.
9280          * Otherwise, allow two (and we'll inject the first one immediately).
9281          */
9282         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9283                 limit = 1;
9284
9285         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9286         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9287         kvm_make_request(KVM_REQ_EVENT, vcpu);
9288 }
9289
9290 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9291 {
9292         u32 flags = 0;
9293         flags |= seg->g       << 23;
9294         flags |= seg->db      << 22;
9295         flags |= seg->l       << 21;
9296         flags |= seg->avl     << 20;
9297         flags |= seg->present << 15;
9298         flags |= seg->dpl     << 13;
9299         flags |= seg->s       << 12;
9300         flags |= seg->type    << 8;
9301         return flags;
9302 }
9303
9304 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9305 {
9306         struct kvm_segment seg;
9307         int offset;
9308
9309         kvm_get_segment(vcpu, &seg, n);
9310         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9311
9312         if (n < 3)
9313                 offset = 0x7f84 + n * 12;
9314         else
9315                 offset = 0x7f2c + (n - 3) * 12;
9316
9317         put_smstate(u32, buf, offset + 8, seg.base);
9318         put_smstate(u32, buf, offset + 4, seg.limit);
9319         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9320 }
9321
9322 #ifdef CONFIG_X86_64
9323 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9324 {
9325         struct kvm_segment seg;
9326         int offset;
9327         u16 flags;
9328
9329         kvm_get_segment(vcpu, &seg, n);
9330         offset = 0x7e00 + n * 16;
9331
9332         flags = enter_smm_get_segment_flags(&seg) >> 8;
9333         put_smstate(u16, buf, offset, seg.selector);
9334         put_smstate(u16, buf, offset + 2, flags);
9335         put_smstate(u32, buf, offset + 4, seg.limit);
9336         put_smstate(u64, buf, offset + 8, seg.base);
9337 }
9338 #endif
9339
9340 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9341 {
9342         struct desc_ptr dt;
9343         struct kvm_segment seg;
9344         unsigned long val;
9345         int i;
9346
9347         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9348         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9349         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9350         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9351
9352         for (i = 0; i < 8; i++)
9353                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9354
9355         kvm_get_dr(vcpu, 6, &val);
9356         put_smstate(u32, buf, 0x7fcc, (u32)val);
9357         kvm_get_dr(vcpu, 7, &val);
9358         put_smstate(u32, buf, 0x7fc8, (u32)val);
9359
9360         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9361         put_smstate(u32, buf, 0x7fc4, seg.selector);
9362         put_smstate(u32, buf, 0x7f64, seg.base);
9363         put_smstate(u32, buf, 0x7f60, seg.limit);
9364         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9365
9366         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9367         put_smstate(u32, buf, 0x7fc0, seg.selector);
9368         put_smstate(u32, buf, 0x7f80, seg.base);
9369         put_smstate(u32, buf, 0x7f7c, seg.limit);
9370         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9371
9372         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9373         put_smstate(u32, buf, 0x7f74, dt.address);
9374         put_smstate(u32, buf, 0x7f70, dt.size);
9375
9376         static_call(kvm_x86_get_idt)(vcpu, &dt);
9377         put_smstate(u32, buf, 0x7f58, dt.address);
9378         put_smstate(u32, buf, 0x7f54, dt.size);
9379
9380         for (i = 0; i < 6; i++)
9381                 enter_smm_save_seg_32(vcpu, buf, i);
9382
9383         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9384
9385         /* revision id */
9386         put_smstate(u32, buf, 0x7efc, 0x00020000);
9387         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9388 }
9389
9390 #ifdef CONFIG_X86_64
9391 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9392 {
9393         struct desc_ptr dt;
9394         struct kvm_segment seg;
9395         unsigned long val;
9396         int i;
9397
9398         for (i = 0; i < 16; i++)
9399                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9400
9401         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9402         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9403
9404         kvm_get_dr(vcpu, 6, &val);
9405         put_smstate(u64, buf, 0x7f68, val);
9406         kvm_get_dr(vcpu, 7, &val);
9407         put_smstate(u64, buf, 0x7f60, val);
9408
9409         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9410         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9411         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9412
9413         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9414
9415         /* revision id */
9416         put_smstate(u32, buf, 0x7efc, 0x00020064);
9417
9418         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9419
9420         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9421         put_smstate(u16, buf, 0x7e90, seg.selector);
9422         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9423         put_smstate(u32, buf, 0x7e94, seg.limit);
9424         put_smstate(u64, buf, 0x7e98, seg.base);
9425
9426         static_call(kvm_x86_get_idt)(vcpu, &dt);
9427         put_smstate(u32, buf, 0x7e84, dt.size);
9428         put_smstate(u64, buf, 0x7e88, dt.address);
9429
9430         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9431         put_smstate(u16, buf, 0x7e70, seg.selector);
9432         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9433         put_smstate(u32, buf, 0x7e74, seg.limit);
9434         put_smstate(u64, buf, 0x7e78, seg.base);
9435
9436         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9437         put_smstate(u32, buf, 0x7e64, dt.size);
9438         put_smstate(u64, buf, 0x7e68, dt.address);
9439
9440         for (i = 0; i < 6; i++)
9441                 enter_smm_save_seg_64(vcpu, buf, i);
9442 }
9443 #endif
9444
9445 static void enter_smm(struct kvm_vcpu *vcpu)
9446 {
9447         struct kvm_segment cs, ds;
9448         struct desc_ptr dt;
9449         unsigned long cr0;
9450         char buf[512];
9451
9452         memset(buf, 0, 512);
9453 #ifdef CONFIG_X86_64
9454         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9455                 enter_smm_save_state_64(vcpu, buf);
9456         else
9457 #endif
9458                 enter_smm_save_state_32(vcpu, buf);
9459
9460         /*
9461          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9462          * state (e.g. leave guest mode) after we've saved the state into the
9463          * SMM state-save area.
9464          */
9465         static_call(kvm_x86_enter_smm)(vcpu, buf);
9466
9467         kvm_smm_changed(vcpu, true);
9468         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9469
9470         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9471                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9472         else
9473                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9474
9475         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9476         kvm_rip_write(vcpu, 0x8000);
9477
9478         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9479         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9480         vcpu->arch.cr0 = cr0;
9481
9482         static_call(kvm_x86_set_cr4)(vcpu, 0);
9483
9484         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9485         dt.address = dt.size = 0;
9486         static_call(kvm_x86_set_idt)(vcpu, &dt);
9487
9488         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9489
9490         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9491         cs.base = vcpu->arch.smbase;
9492
9493         ds.selector = 0;
9494         ds.base = 0;
9495
9496         cs.limit    = ds.limit = 0xffffffff;
9497         cs.type     = ds.type = 0x3;
9498         cs.dpl      = ds.dpl = 0;
9499         cs.db       = ds.db = 0;
9500         cs.s        = ds.s = 1;
9501         cs.l        = ds.l = 0;
9502         cs.g        = ds.g = 1;
9503         cs.avl      = ds.avl = 0;
9504         cs.present  = ds.present = 1;
9505         cs.unusable = ds.unusable = 0;
9506         cs.padding  = ds.padding = 0;
9507
9508         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9509         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9510         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9511         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9512         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9513         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9514
9515 #ifdef CONFIG_X86_64
9516         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9517                 static_call(kvm_x86_set_efer)(vcpu, 0);
9518 #endif
9519
9520         kvm_update_cpuid_runtime(vcpu);
9521         kvm_mmu_reset_context(vcpu);
9522 }
9523
9524 static void process_smi(struct kvm_vcpu *vcpu)
9525 {
9526         vcpu->arch.smi_pending = true;
9527         kvm_make_request(KVM_REQ_EVENT, vcpu);
9528 }
9529
9530 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9531                                        unsigned long *vcpu_bitmap)
9532 {
9533         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9534 }
9535
9536 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9537 {
9538         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9539 }
9540
9541 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9542 {
9543         bool activate;
9544
9545         if (!lapic_in_kernel(vcpu))
9546                 return;
9547
9548         down_read(&vcpu->kvm->arch.apicv_update_lock);
9549
9550         activate = kvm_apicv_activated(vcpu->kvm);
9551         if (vcpu->arch.apicv_active == activate)
9552                 goto out;
9553
9554         vcpu->arch.apicv_active = activate;
9555         kvm_apic_update_apicv(vcpu);
9556         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9557
9558         /*
9559          * When APICv gets disabled, we may still have injected interrupts
9560          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9561          * still active when the interrupt got accepted. Make sure
9562          * inject_pending_event() is called to check for that.
9563          */
9564         if (!vcpu->arch.apicv_active)
9565                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9566
9567 out:
9568         up_read(&vcpu->kvm->arch.apicv_update_lock);
9569 }
9570 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9571
9572 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9573 {
9574         unsigned long old, new;
9575
9576         lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9577
9578         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9579             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9580                 return;
9581
9582         old = new = kvm->arch.apicv_inhibit_reasons;
9583
9584         if (activate)
9585                 __clear_bit(bit, &new);
9586         else
9587                 __set_bit(bit, &new);
9588
9589         if (!!old != !!new) {
9590                 trace_kvm_apicv_update_request(activate, bit);
9591                 /*
9592                  * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9593                  * false positives in the sanity check WARN in svm_vcpu_run().
9594                  * This task will wait for all vCPUs to ack the kick IRQ before
9595                  * updating apicv_inhibit_reasons, and all other vCPUs will
9596                  * block on acquiring apicv_update_lock so that vCPUs can't
9597                  * redo svm_vcpu_run() without seeing the new inhibit state.
9598                  *
9599                  * Note, holding apicv_update_lock and taking it in the read
9600                  * side (handling the request) also prevents other vCPUs from
9601                  * servicing the request with a stale apicv_inhibit_reasons.
9602                  */
9603                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9604                 kvm->arch.apicv_inhibit_reasons = new;
9605                 if (new) {
9606                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9607                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9608                 }
9609         } else
9610                 kvm->arch.apicv_inhibit_reasons = new;
9611 }
9612 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9613
9614 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9615 {
9616         down_write(&kvm->arch.apicv_update_lock);
9617         __kvm_request_apicv_update(kvm, activate, bit);
9618         up_write(&kvm->arch.apicv_update_lock);
9619 }
9620 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9621
9622 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9623 {
9624         if (!kvm_apic_present(vcpu))
9625                 return;
9626
9627         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9628
9629         if (irqchip_split(vcpu->kvm))
9630                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9631         else {
9632                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9633                 if (ioapic_in_kernel(vcpu->kvm))
9634                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9635         }
9636
9637         if (is_guest_mode(vcpu))
9638                 vcpu->arch.load_eoi_exitmap_pending = true;
9639         else
9640                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9641 }
9642
9643 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9644 {
9645         u64 eoi_exit_bitmap[4];
9646
9647         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9648                 return;
9649
9650         if (to_hv_vcpu(vcpu)) {
9651                 bitmap_or((ulong *)eoi_exit_bitmap,
9652                           vcpu->arch.ioapic_handled_vectors,
9653                           to_hv_synic(vcpu)->vec_bitmap, 256);
9654                 static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9655                 return;
9656         }
9657
9658         static_call(kvm_x86_load_eoi_exitmap)(
9659                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9660 }
9661
9662 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9663                                             unsigned long start, unsigned long end)
9664 {
9665         unsigned long apic_address;
9666
9667         /*
9668          * The physical address of apic access page is stored in the VMCS.
9669          * Update it when it becomes invalid.
9670          */
9671         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9672         if (start <= apic_address && apic_address < end)
9673                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9674 }
9675
9676 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9677 {
9678         if (!lapic_in_kernel(vcpu))
9679                 return;
9680
9681         if (!kvm_x86_ops.set_apic_access_page_addr)
9682                 return;
9683
9684         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9685 }
9686
9687 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9688 {
9689         smp_send_reschedule(vcpu->cpu);
9690 }
9691 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9692
9693 /*
9694  * Returns 1 to let vcpu_run() continue the guest execution loop without
9695  * exiting to the userspace.  Otherwise, the value will be returned to the
9696  * userspace.
9697  */
9698 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9699 {
9700         int r;
9701         bool req_int_win =
9702                 dm_request_for_irq_injection(vcpu) &&
9703                 kvm_cpu_accept_dm_intr(vcpu);
9704         fastpath_t exit_fastpath;
9705
9706         bool req_immediate_exit = false;
9707
9708         /* Forbid vmenter if vcpu dirty ring is soft-full */
9709         if (unlikely(vcpu->kvm->dirty_ring_size &&
9710                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9711                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9712                 trace_kvm_dirty_ring_exit(vcpu);
9713                 r = 0;
9714                 goto out;
9715         }
9716
9717         if (kvm_request_pending(vcpu)) {
9718                 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
9719                         r = -EIO;
9720                         goto out;
9721                 }
9722                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9723                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9724                                 r = 0;
9725                                 goto out;
9726                         }
9727                 }
9728                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9729                         kvm_mmu_unload(vcpu);
9730                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9731                         __kvm_migrate_timers(vcpu);
9732                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9733                         kvm_update_masterclock(vcpu->kvm);
9734                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9735                         kvm_gen_kvmclock_update(vcpu);
9736                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9737                         r = kvm_guest_time_update(vcpu);
9738                         if (unlikely(r))
9739                                 goto out;
9740                 }
9741                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9742                         kvm_mmu_sync_roots(vcpu);
9743                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9744                         kvm_mmu_load_pgd(vcpu);
9745                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9746                         kvm_vcpu_flush_tlb_all(vcpu);
9747
9748                         /* Flushing all ASIDs flushes the current ASID... */
9749                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9750                 }
9751                 kvm_service_local_tlb_flush_requests(vcpu);
9752
9753                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9754                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9755                         r = 0;
9756                         goto out;
9757                 }
9758                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9759                         if (is_guest_mode(vcpu)) {
9760                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9761                         } else {
9762                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9763                                 vcpu->mmio_needed = 0;
9764                                 r = 0;
9765                                 goto out;
9766                         }
9767                 }
9768                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9769                         /* Page is swapped out. Do synthetic halt */
9770                         vcpu->arch.apf.halted = true;
9771                         r = 1;
9772                         goto out;
9773                 }
9774                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9775                         record_steal_time(vcpu);
9776                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9777                         process_smi(vcpu);
9778                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9779                         process_nmi(vcpu);
9780                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9781                         kvm_pmu_handle_event(vcpu);
9782                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9783                         kvm_pmu_deliver_pmi(vcpu);
9784                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9785                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9786                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9787                                      vcpu->arch.ioapic_handled_vectors)) {
9788                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9789                                 vcpu->run->eoi.vector =
9790                                                 vcpu->arch.pending_ioapic_eoi;
9791                                 r = 0;
9792                                 goto out;
9793                         }
9794                 }
9795                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9796                         vcpu_scan_ioapic(vcpu);
9797                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9798                         vcpu_load_eoi_exitmap(vcpu);
9799                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9800                         kvm_vcpu_reload_apic_access_page(vcpu);
9801                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9802                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9803                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9804                         r = 0;
9805                         goto out;
9806                 }
9807                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9808                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9809                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9810                         r = 0;
9811                         goto out;
9812                 }
9813                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9814                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9815
9816                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9817                         vcpu->run->hyperv = hv_vcpu->exit;
9818                         r = 0;
9819                         goto out;
9820                 }
9821
9822                 /*
9823                  * KVM_REQ_HV_STIMER has to be processed after
9824                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9825                  * depend on the guest clock being up-to-date
9826                  */
9827                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9828                         kvm_hv_process_stimers(vcpu);
9829                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9830                         kvm_vcpu_update_apicv(vcpu);
9831                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9832                         kvm_check_async_pf_completion(vcpu);
9833                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9834                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9835
9836                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9837                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9838         }
9839
9840         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9841             kvm_xen_has_interrupt(vcpu)) {
9842                 ++vcpu->stat.req_event;
9843                 r = kvm_apic_accept_events(vcpu);
9844                 if (r < 0) {
9845                         r = 0;
9846                         goto out;
9847                 }
9848                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9849                         r = 1;
9850                         goto out;
9851                 }
9852
9853                 r = inject_pending_event(vcpu, &req_immediate_exit);
9854                 if (r < 0) {
9855                         r = 0;
9856                         goto out;
9857                 }
9858                 if (req_int_win)
9859                         static_call(kvm_x86_enable_irq_window)(vcpu);
9860
9861                 if (kvm_lapic_enabled(vcpu)) {
9862                         update_cr8_intercept(vcpu);
9863                         kvm_lapic_sync_to_vapic(vcpu);
9864                 }
9865         }
9866
9867         r = kvm_mmu_reload(vcpu);
9868         if (unlikely(r)) {
9869                 goto cancel_injection;
9870         }
9871
9872         preempt_disable();
9873
9874         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9875
9876         /*
9877          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9878          * IPI are then delayed after guest entry, which ensures that they
9879          * result in virtual interrupt delivery.
9880          */
9881         local_irq_disable();
9882         vcpu->mode = IN_GUEST_MODE;
9883
9884         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9885
9886         /*
9887          * 1) We should set ->mode before checking ->requests.  Please see
9888          * the comment in kvm_vcpu_exiting_guest_mode().
9889          *
9890          * 2) For APICv, we should set ->mode before checking PID.ON. This
9891          * pairs with the memory barrier implicit in pi_test_and_set_on
9892          * (see vmx_deliver_posted_interrupt).
9893          *
9894          * 3) This also orders the write to mode from any reads to the page
9895          * tables done while the VCPU is running.  Please see the comment
9896          * in kvm_flush_remote_tlbs.
9897          */
9898         smp_mb__after_srcu_read_unlock();
9899
9900         /*
9901          * This handles the case where a posted interrupt was
9902          * notified with kvm_vcpu_kick.  Assigned devices can
9903          * use the POSTED_INTR_VECTOR even if APICv is disabled,
9904          * so do it even if APICv is disabled on this vCPU.
9905          */
9906         if (kvm_lapic_enabled(vcpu))
9907                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9908
9909         if (kvm_vcpu_exit_request(vcpu)) {
9910                 vcpu->mode = OUTSIDE_GUEST_MODE;
9911                 smp_wmb();
9912                 local_irq_enable();
9913                 preempt_enable();
9914                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9915                 r = 1;
9916                 goto cancel_injection;
9917         }
9918
9919         if (req_immediate_exit) {
9920                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9921                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9922         }
9923
9924         fpregs_assert_state_consistent();
9925         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9926                 switch_fpu_return();
9927
9928         if (unlikely(vcpu->arch.switch_db_regs)) {
9929                 set_debugreg(0, 7);
9930                 set_debugreg(vcpu->arch.eff_db[0], 0);
9931                 set_debugreg(vcpu->arch.eff_db[1], 1);
9932                 set_debugreg(vcpu->arch.eff_db[2], 2);
9933                 set_debugreg(vcpu->arch.eff_db[3], 3);
9934         } else if (unlikely(hw_breakpoint_active())) {
9935                 set_debugreg(0, 7);
9936         }
9937
9938         for (;;) {
9939                 /*
9940                  * Assert that vCPU vs. VM APICv state is consistent.  An APICv
9941                  * update must kick and wait for all vCPUs before toggling the
9942                  * per-VM state, and responsing vCPUs must wait for the update
9943                  * to complete before servicing KVM_REQ_APICV_UPDATE.
9944                  */
9945                 WARN_ON_ONCE(kvm_apicv_activated(vcpu->kvm) != kvm_vcpu_apicv_active(vcpu));
9946
9947                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9948                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9949                         break;
9950
9951                 if (kvm_lapic_enabled(vcpu))
9952                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9953
9954                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9955                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9956                         break;
9957                 }
9958         }
9959
9960         /*
9961          * Do this here before restoring debug registers on the host.  And
9962          * since we do this before handling the vmexit, a DR access vmexit
9963          * can (a) read the correct value of the debug registers, (b) set
9964          * KVM_DEBUGREG_WONT_EXIT again.
9965          */
9966         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9967                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9968                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9969                 kvm_update_dr0123(vcpu);
9970                 kvm_update_dr7(vcpu);
9971         }
9972
9973         /*
9974          * If the guest has used debug registers, at least dr7
9975          * will be disabled while returning to the host.
9976          * If we don't have active breakpoints in the host, we don't
9977          * care about the messed up debug address registers. But if
9978          * we have some of them active, restore the old state.
9979          */
9980         if (hw_breakpoint_active())
9981                 hw_breakpoint_restore();
9982
9983         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9984         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9985
9986         vcpu->mode = OUTSIDE_GUEST_MODE;
9987         smp_wmb();
9988
9989         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9990
9991         /*
9992          * Consume any pending interrupts, including the possible source of
9993          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9994          * An instruction is required after local_irq_enable() to fully unblock
9995          * interrupts on processors that implement an interrupt shadow, the
9996          * stat.exits increment will do nicely.
9997          */
9998         kvm_before_interrupt(vcpu);
9999         local_irq_enable();
10000         ++vcpu->stat.exits;
10001         local_irq_disable();
10002         kvm_after_interrupt(vcpu);
10003
10004         /*
10005          * Wait until after servicing IRQs to account guest time so that any
10006          * ticks that occurred while running the guest are properly accounted
10007          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
10008          * of accounting via context tracking, but the loss of accuracy is
10009          * acceptable for all known use cases.
10010          */
10011         vtime_account_guest_exit();
10012
10013         if (lapic_in_kernel(vcpu)) {
10014                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
10015                 if (delta != S64_MIN) {
10016                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
10017                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
10018                 }
10019         }
10020
10021         local_irq_enable();
10022         preempt_enable();
10023
10024         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10025
10026         /*
10027          * Profile KVM exit RIPs:
10028          */
10029         if (unlikely(prof_on == KVM_PROFILING)) {
10030                 unsigned long rip = kvm_rip_read(vcpu);
10031                 profile_hit(KVM_PROFILING, (void *)rip);
10032         }
10033
10034         if (unlikely(vcpu->arch.tsc_always_catchup))
10035                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10036
10037         if (vcpu->arch.apic_attention)
10038                 kvm_lapic_sync_from_vapic(vcpu);
10039
10040         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10041         return r;
10042
10043 cancel_injection:
10044         if (req_immediate_exit)
10045                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10046         static_call(kvm_x86_cancel_injection)(vcpu);
10047         if (unlikely(vcpu->arch.apic_attention))
10048                 kvm_lapic_sync_from_vapic(vcpu);
10049 out:
10050         return r;
10051 }
10052
10053 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
10054 {
10055         if (!kvm_arch_vcpu_runnable(vcpu) &&
10056             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
10057                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10058                 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10059                         kvm_vcpu_halt(vcpu);
10060                 else
10061                         kvm_vcpu_block(vcpu);
10062                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10063
10064                 if (kvm_x86_ops.post_block)
10065                         static_call(kvm_x86_post_block)(vcpu);
10066
10067                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10068                         return 1;
10069         }
10070
10071         if (kvm_apic_accept_events(vcpu) < 0)
10072                 return 0;
10073         switch(vcpu->arch.mp_state) {
10074         case KVM_MP_STATE_HALTED:
10075         case KVM_MP_STATE_AP_RESET_HOLD:
10076                 vcpu->arch.pv.pv_unhalted = false;
10077                 vcpu->arch.mp_state =
10078                         KVM_MP_STATE_RUNNABLE;
10079                 fallthrough;
10080         case KVM_MP_STATE_RUNNABLE:
10081                 vcpu->arch.apf.halted = false;
10082                 break;
10083         case KVM_MP_STATE_INIT_RECEIVED:
10084                 break;
10085         default:
10086                 return -EINTR;
10087         }
10088         return 1;
10089 }
10090
10091 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10092 {
10093         if (is_guest_mode(vcpu))
10094                 kvm_check_nested_events(vcpu);
10095
10096         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10097                 !vcpu->arch.apf.halted);
10098 }
10099
10100 static int vcpu_run(struct kvm_vcpu *vcpu)
10101 {
10102         int r;
10103         struct kvm *kvm = vcpu->kvm;
10104
10105         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10106         vcpu->arch.l1tf_flush_l1d = true;
10107
10108         for (;;) {
10109                 if (kvm_vcpu_running(vcpu)) {
10110                         r = vcpu_enter_guest(vcpu);
10111                 } else {
10112                         r = vcpu_block(kvm, vcpu);
10113                 }
10114
10115                 if (r <= 0)
10116                         break;
10117
10118                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10119                 if (kvm_cpu_has_pending_timer(vcpu))
10120                         kvm_inject_pending_timer_irqs(vcpu);
10121
10122                 if (dm_request_for_irq_injection(vcpu) &&
10123                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10124                         r = 0;
10125                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10126                         ++vcpu->stat.request_irq_exits;
10127                         break;
10128                 }
10129
10130                 if (__xfer_to_guest_mode_work_pending()) {
10131                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10132                         r = xfer_to_guest_mode_handle_work(vcpu);
10133                         if (r)
10134                                 return r;
10135                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10136                 }
10137         }
10138
10139         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10140
10141         return r;
10142 }
10143
10144 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10145 {
10146         int r;
10147
10148         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10149         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10150         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10151         return r;
10152 }
10153
10154 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10155 {
10156         BUG_ON(!vcpu->arch.pio.count);
10157
10158         return complete_emulated_io(vcpu);
10159 }
10160
10161 /*
10162  * Implements the following, as a state machine:
10163  *
10164  * read:
10165  *   for each fragment
10166  *     for each mmio piece in the fragment
10167  *       write gpa, len
10168  *       exit
10169  *       copy data
10170  *   execute insn
10171  *
10172  * write:
10173  *   for each fragment
10174  *     for each mmio piece in the fragment
10175  *       write gpa, len
10176  *       copy data
10177  *       exit
10178  */
10179 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10180 {
10181         struct kvm_run *run = vcpu->run;
10182         struct kvm_mmio_fragment *frag;
10183         unsigned len;
10184
10185         BUG_ON(!vcpu->mmio_needed);
10186
10187         /* Complete previous fragment */
10188         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10189         len = min(8u, frag->len);
10190         if (!vcpu->mmio_is_write)
10191                 memcpy(frag->data, run->mmio.data, len);
10192
10193         if (frag->len <= 8) {
10194                 /* Switch to the next fragment. */
10195                 frag++;
10196                 vcpu->mmio_cur_fragment++;
10197         } else {
10198                 /* Go forward to the next mmio piece. */
10199                 frag->data += len;
10200                 frag->gpa += len;
10201                 frag->len -= len;
10202         }
10203
10204         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10205                 vcpu->mmio_needed = 0;
10206
10207                 /* FIXME: return into emulator if single-stepping.  */
10208                 if (vcpu->mmio_is_write)
10209                         return 1;
10210                 vcpu->mmio_read_completed = 1;
10211                 return complete_emulated_io(vcpu);
10212         }
10213
10214         run->exit_reason = KVM_EXIT_MMIO;
10215         run->mmio.phys_addr = frag->gpa;
10216         if (vcpu->mmio_is_write)
10217                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10218         run->mmio.len = min(8u, frag->len);
10219         run->mmio.is_write = vcpu->mmio_is_write;
10220         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10221         return 0;
10222 }
10223
10224 /* Swap (qemu) user FPU context for the guest FPU context. */
10225 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10226 {
10227         /*
10228          * Exclude PKRU from restore as restored separately in
10229          * kvm_x86_ops.run().
10230          */
10231         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10232         trace_kvm_fpu(1);
10233 }
10234
10235 /* When vcpu_run ends, restore user space FPU context. */
10236 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10237 {
10238         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10239         ++vcpu->stat.fpu_reload;
10240         trace_kvm_fpu(0);
10241 }
10242
10243 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10244 {
10245         struct kvm_run *kvm_run = vcpu->run;
10246         int r;
10247
10248         vcpu_load(vcpu);
10249         kvm_sigset_activate(vcpu);
10250         kvm_run->flags = 0;
10251         kvm_load_guest_fpu(vcpu);
10252
10253         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10254                 if (kvm_run->immediate_exit) {
10255                         r = -EINTR;
10256                         goto out;
10257                 }
10258                 kvm_vcpu_block(vcpu);
10259                 if (kvm_apic_accept_events(vcpu) < 0) {
10260                         r = 0;
10261                         goto out;
10262                 }
10263                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10264                 r = -EAGAIN;
10265                 if (signal_pending(current)) {
10266                         r = -EINTR;
10267                         kvm_run->exit_reason = KVM_EXIT_INTR;
10268                         ++vcpu->stat.signal_exits;
10269                 }
10270                 goto out;
10271         }
10272
10273         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10274             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10275                 r = -EINVAL;
10276                 goto out;
10277         }
10278
10279         if (kvm_run->kvm_dirty_regs) {
10280                 r = sync_regs(vcpu);
10281                 if (r != 0)
10282                         goto out;
10283         }
10284
10285         /* re-sync apic's tpr */
10286         if (!lapic_in_kernel(vcpu)) {
10287                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10288                         r = -EINVAL;
10289                         goto out;
10290                 }
10291         }
10292
10293         if (unlikely(vcpu->arch.complete_userspace_io)) {
10294                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10295                 vcpu->arch.complete_userspace_io = NULL;
10296                 r = cui(vcpu);
10297                 if (r <= 0)
10298                         goto out;
10299         } else
10300                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10301
10302         if (kvm_run->immediate_exit)
10303                 r = -EINTR;
10304         else
10305                 r = vcpu_run(vcpu);
10306
10307 out:
10308         kvm_put_guest_fpu(vcpu);
10309         if (kvm_run->kvm_valid_regs)
10310                 store_regs(vcpu);
10311         post_kvm_run_save(vcpu);
10312         kvm_sigset_deactivate(vcpu);
10313
10314         vcpu_put(vcpu);
10315         return r;
10316 }
10317
10318 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10319 {
10320         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10321                 /*
10322                  * We are here if userspace calls get_regs() in the middle of
10323                  * instruction emulation. Registers state needs to be copied
10324                  * back from emulation context to vcpu. Userspace shouldn't do
10325                  * that usually, but some bad designed PV devices (vmware
10326                  * backdoor interface) need this to work
10327                  */
10328                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10329                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10330         }
10331         regs->rax = kvm_rax_read(vcpu);
10332         regs->rbx = kvm_rbx_read(vcpu);
10333         regs->rcx = kvm_rcx_read(vcpu);
10334         regs->rdx = kvm_rdx_read(vcpu);
10335         regs->rsi = kvm_rsi_read(vcpu);
10336         regs->rdi = kvm_rdi_read(vcpu);
10337         regs->rsp = kvm_rsp_read(vcpu);
10338         regs->rbp = kvm_rbp_read(vcpu);
10339 #ifdef CONFIG_X86_64
10340         regs->r8 = kvm_r8_read(vcpu);
10341         regs->r9 = kvm_r9_read(vcpu);
10342         regs->r10 = kvm_r10_read(vcpu);
10343         regs->r11 = kvm_r11_read(vcpu);
10344         regs->r12 = kvm_r12_read(vcpu);
10345         regs->r13 = kvm_r13_read(vcpu);
10346         regs->r14 = kvm_r14_read(vcpu);
10347         regs->r15 = kvm_r15_read(vcpu);
10348 #endif
10349
10350         regs->rip = kvm_rip_read(vcpu);
10351         regs->rflags = kvm_get_rflags(vcpu);
10352 }
10353
10354 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10355 {
10356         vcpu_load(vcpu);
10357         __get_regs(vcpu, regs);
10358         vcpu_put(vcpu);
10359         return 0;
10360 }
10361
10362 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10363 {
10364         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10365         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10366
10367         kvm_rax_write(vcpu, regs->rax);
10368         kvm_rbx_write(vcpu, regs->rbx);
10369         kvm_rcx_write(vcpu, regs->rcx);
10370         kvm_rdx_write(vcpu, regs->rdx);
10371         kvm_rsi_write(vcpu, regs->rsi);
10372         kvm_rdi_write(vcpu, regs->rdi);
10373         kvm_rsp_write(vcpu, regs->rsp);
10374         kvm_rbp_write(vcpu, regs->rbp);
10375 #ifdef CONFIG_X86_64
10376         kvm_r8_write(vcpu, regs->r8);
10377         kvm_r9_write(vcpu, regs->r9);
10378         kvm_r10_write(vcpu, regs->r10);
10379         kvm_r11_write(vcpu, regs->r11);
10380         kvm_r12_write(vcpu, regs->r12);
10381         kvm_r13_write(vcpu, regs->r13);
10382         kvm_r14_write(vcpu, regs->r14);
10383         kvm_r15_write(vcpu, regs->r15);
10384 #endif
10385
10386         kvm_rip_write(vcpu, regs->rip);
10387         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10388
10389         vcpu->arch.exception.pending = false;
10390
10391         kvm_make_request(KVM_REQ_EVENT, vcpu);
10392 }
10393
10394 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10395 {
10396         vcpu_load(vcpu);
10397         __set_regs(vcpu, regs);
10398         vcpu_put(vcpu);
10399         return 0;
10400 }
10401
10402 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10403 {
10404         struct kvm_segment cs;
10405
10406         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10407         *db = cs.db;
10408         *l = cs.l;
10409 }
10410 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10411
10412 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10413 {
10414         struct desc_ptr dt;
10415
10416         if (vcpu->arch.guest_state_protected)
10417                 goto skip_protected_regs;
10418
10419         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10420         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10421         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10422         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10423         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10424         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10425
10426         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10427         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10428
10429         static_call(kvm_x86_get_idt)(vcpu, &dt);
10430         sregs->idt.limit = dt.size;
10431         sregs->idt.base = dt.address;
10432         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10433         sregs->gdt.limit = dt.size;
10434         sregs->gdt.base = dt.address;
10435
10436         sregs->cr2 = vcpu->arch.cr2;
10437         sregs->cr3 = kvm_read_cr3(vcpu);
10438
10439 skip_protected_regs:
10440         sregs->cr0 = kvm_read_cr0(vcpu);
10441         sregs->cr4 = kvm_read_cr4(vcpu);
10442         sregs->cr8 = kvm_get_cr8(vcpu);
10443         sregs->efer = vcpu->arch.efer;
10444         sregs->apic_base = kvm_get_apic_base(vcpu);
10445 }
10446
10447 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10448 {
10449         __get_sregs_common(vcpu, sregs);
10450
10451         if (vcpu->arch.guest_state_protected)
10452                 return;
10453
10454         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10455                 set_bit(vcpu->arch.interrupt.nr,
10456                         (unsigned long *)sregs->interrupt_bitmap);
10457 }
10458
10459 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10460 {
10461         int i;
10462
10463         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10464
10465         if (vcpu->arch.guest_state_protected)
10466                 return;
10467
10468         if (is_pae_paging(vcpu)) {
10469                 for (i = 0 ; i < 4 ; i++)
10470                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10471                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10472         }
10473 }
10474
10475 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10476                                   struct kvm_sregs *sregs)
10477 {
10478         vcpu_load(vcpu);
10479         __get_sregs(vcpu, sregs);
10480         vcpu_put(vcpu);
10481         return 0;
10482 }
10483
10484 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10485                                     struct kvm_mp_state *mp_state)
10486 {
10487         int r;
10488
10489         vcpu_load(vcpu);
10490         if (kvm_mpx_supported())
10491                 kvm_load_guest_fpu(vcpu);
10492
10493         r = kvm_apic_accept_events(vcpu);
10494         if (r < 0)
10495                 goto out;
10496         r = 0;
10497
10498         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10499              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10500             vcpu->arch.pv.pv_unhalted)
10501                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10502         else
10503                 mp_state->mp_state = vcpu->arch.mp_state;
10504
10505 out:
10506         if (kvm_mpx_supported())
10507                 kvm_put_guest_fpu(vcpu);
10508         vcpu_put(vcpu);
10509         return r;
10510 }
10511
10512 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10513                                     struct kvm_mp_state *mp_state)
10514 {
10515         int ret = -EINVAL;
10516
10517         vcpu_load(vcpu);
10518
10519         if (!lapic_in_kernel(vcpu) &&
10520             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10521                 goto out;
10522
10523         /*
10524          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10525          * INIT state; latched init should be reported using
10526          * KVM_SET_VCPU_EVENTS, so reject it here.
10527          */
10528         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10529             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10530              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10531                 goto out;
10532
10533         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10534                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10535                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10536         } else
10537                 vcpu->arch.mp_state = mp_state->mp_state;
10538         kvm_make_request(KVM_REQ_EVENT, vcpu);
10539
10540         ret = 0;
10541 out:
10542         vcpu_put(vcpu);
10543         return ret;
10544 }
10545
10546 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10547                     int reason, bool has_error_code, u32 error_code)
10548 {
10549         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10550         int ret;
10551
10552         init_emulate_ctxt(vcpu);
10553
10554         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10555                                    has_error_code, error_code);
10556         if (ret) {
10557                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10558                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10559                 vcpu->run->internal.ndata = 0;
10560                 return 0;
10561         }
10562
10563         kvm_rip_write(vcpu, ctxt->eip);
10564         kvm_set_rflags(vcpu, ctxt->eflags);
10565         return 1;
10566 }
10567 EXPORT_SYMBOL_GPL(kvm_task_switch);
10568
10569 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10570 {
10571         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10572                 /*
10573                  * When EFER.LME and CR0.PG are set, the processor is in
10574                  * 64-bit mode (though maybe in a 32-bit code segment).
10575                  * CR4.PAE and EFER.LMA must be set.
10576                  */
10577                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10578                         return false;
10579                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10580                         return false;
10581         } else {
10582                 /*
10583                  * Not in 64-bit mode: EFER.LMA is clear and the code
10584                  * segment cannot be 64-bit.
10585                  */
10586                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10587                         return false;
10588         }
10589
10590         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10591 }
10592
10593 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10594                 int *mmu_reset_needed, bool update_pdptrs)
10595 {
10596         struct msr_data apic_base_msr;
10597         int idx;
10598         struct desc_ptr dt;
10599
10600         if (!kvm_is_valid_sregs(vcpu, sregs))
10601                 return -EINVAL;
10602
10603         apic_base_msr.data = sregs->apic_base;
10604         apic_base_msr.host_initiated = true;
10605         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10606                 return -EINVAL;
10607
10608         if (vcpu->arch.guest_state_protected)
10609                 return 0;
10610
10611         dt.size = sregs->idt.limit;
10612         dt.address = sregs->idt.base;
10613         static_call(kvm_x86_set_idt)(vcpu, &dt);
10614         dt.size = sregs->gdt.limit;
10615         dt.address = sregs->gdt.base;
10616         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10617
10618         vcpu->arch.cr2 = sregs->cr2;
10619         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10620         vcpu->arch.cr3 = sregs->cr3;
10621         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10622         static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
10623
10624         kvm_set_cr8(vcpu, sregs->cr8);
10625
10626         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10627         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10628
10629         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10630         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10631         vcpu->arch.cr0 = sregs->cr0;
10632
10633         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10634         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10635
10636         if (update_pdptrs) {
10637                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10638                 if (is_pae_paging(vcpu)) {
10639                         load_pdptrs(vcpu, kvm_read_cr3(vcpu));
10640                         *mmu_reset_needed = 1;
10641                 }
10642                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10643         }
10644
10645         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10646         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10647         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10648         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10649         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10650         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10651
10652         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10653         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10654
10655         update_cr8_intercept(vcpu);
10656
10657         /* Older userspace won't unhalt the vcpu on reset. */
10658         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10659             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10660             !is_protmode(vcpu))
10661                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10662
10663         return 0;
10664 }
10665
10666 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10667 {
10668         int pending_vec, max_bits;
10669         int mmu_reset_needed = 0;
10670         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10671
10672         if (ret)
10673                 return ret;
10674
10675         if (mmu_reset_needed)
10676                 kvm_mmu_reset_context(vcpu);
10677
10678         max_bits = KVM_NR_INTERRUPTS;
10679         pending_vec = find_first_bit(
10680                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10681
10682         if (pending_vec < max_bits) {
10683                 kvm_queue_interrupt(vcpu, pending_vec, false);
10684                 pr_debug("Set back pending irq %d\n", pending_vec);
10685                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10686         }
10687         return 0;
10688 }
10689
10690 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10691 {
10692         int mmu_reset_needed = 0;
10693         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10694         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10695                 !(sregs2->efer & EFER_LMA);
10696         int i, ret;
10697
10698         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10699                 return -EINVAL;
10700
10701         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10702                 return -EINVAL;
10703
10704         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10705                                  &mmu_reset_needed, !valid_pdptrs);
10706         if (ret)
10707                 return ret;
10708
10709         if (valid_pdptrs) {
10710                 for (i = 0; i < 4 ; i++)
10711                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10712
10713                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10714                 mmu_reset_needed = 1;
10715                 vcpu->arch.pdptrs_from_userspace = true;
10716         }
10717         if (mmu_reset_needed)
10718                 kvm_mmu_reset_context(vcpu);
10719         return 0;
10720 }
10721
10722 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10723                                   struct kvm_sregs *sregs)
10724 {
10725         int ret;
10726
10727         vcpu_load(vcpu);
10728         ret = __set_sregs(vcpu, sregs);
10729         vcpu_put(vcpu);
10730         return ret;
10731 }
10732
10733 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
10734 {
10735         bool inhibit = false;
10736         struct kvm_vcpu *vcpu;
10737         unsigned long i;
10738
10739         down_write(&kvm->arch.apicv_update_lock);
10740
10741         kvm_for_each_vcpu(i, vcpu, kvm) {
10742                 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
10743                         inhibit = true;
10744                         break;
10745                 }
10746         }
10747         __kvm_request_apicv_update(kvm, !inhibit, APICV_INHIBIT_REASON_BLOCKIRQ);
10748         up_write(&kvm->arch.apicv_update_lock);
10749 }
10750
10751 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10752                                         struct kvm_guest_debug *dbg)
10753 {
10754         unsigned long rflags;
10755         int i, r;
10756
10757         if (vcpu->arch.guest_state_protected)
10758                 return -EINVAL;
10759
10760         vcpu_load(vcpu);
10761
10762         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10763                 r = -EBUSY;
10764                 if (vcpu->arch.exception.pending)
10765                         goto out;
10766                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10767                         kvm_queue_exception(vcpu, DB_VECTOR);
10768                 else
10769                         kvm_queue_exception(vcpu, BP_VECTOR);
10770         }
10771
10772         /*
10773          * Read rflags as long as potentially injected trace flags are still
10774          * filtered out.
10775          */
10776         rflags = kvm_get_rflags(vcpu);
10777
10778         vcpu->guest_debug = dbg->control;
10779         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10780                 vcpu->guest_debug = 0;
10781
10782         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10783                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10784                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10785                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10786         } else {
10787                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10788                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10789         }
10790         kvm_update_dr7(vcpu);
10791
10792         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10793                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10794
10795         /*
10796          * Trigger an rflags update that will inject or remove the trace
10797          * flags.
10798          */
10799         kvm_set_rflags(vcpu, rflags);
10800
10801         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10802
10803         kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
10804
10805         r = 0;
10806
10807 out:
10808         vcpu_put(vcpu);
10809         return r;
10810 }
10811
10812 /*
10813  * Translate a guest virtual address to a guest physical address.
10814  */
10815 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10816                                     struct kvm_translation *tr)
10817 {
10818         unsigned long vaddr = tr->linear_address;
10819         gpa_t gpa;
10820         int idx;
10821
10822         vcpu_load(vcpu);
10823
10824         idx = srcu_read_lock(&vcpu->kvm->srcu);
10825         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10826         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10827         tr->physical_address = gpa;
10828         tr->valid = gpa != UNMAPPED_GVA;
10829         tr->writeable = 1;
10830         tr->usermode = 0;
10831
10832         vcpu_put(vcpu);
10833         return 0;
10834 }
10835
10836 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10837 {
10838         struct fxregs_state *fxsave;
10839
10840         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
10841                 return 0;
10842
10843         vcpu_load(vcpu);
10844
10845         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
10846         memcpy(fpu->fpr, fxsave->st_space, 128);
10847         fpu->fcw = fxsave->cwd;
10848         fpu->fsw = fxsave->swd;
10849         fpu->ftwx = fxsave->twd;
10850         fpu->last_opcode = fxsave->fop;
10851         fpu->last_ip = fxsave->rip;
10852         fpu->last_dp = fxsave->rdp;
10853         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10854
10855         vcpu_put(vcpu);
10856         return 0;
10857 }
10858
10859 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10860 {
10861         struct fxregs_state *fxsave;
10862
10863         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
10864                 return 0;
10865
10866         vcpu_load(vcpu);
10867
10868         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
10869
10870         memcpy(fxsave->st_space, fpu->fpr, 128);
10871         fxsave->cwd = fpu->fcw;
10872         fxsave->swd = fpu->fsw;
10873         fxsave->twd = fpu->ftwx;
10874         fxsave->fop = fpu->last_opcode;
10875         fxsave->rip = fpu->last_ip;
10876         fxsave->rdp = fpu->last_dp;
10877         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10878
10879         vcpu_put(vcpu);
10880         return 0;
10881 }
10882
10883 static void store_regs(struct kvm_vcpu *vcpu)
10884 {
10885         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10886
10887         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10888                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10889
10890         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10891                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10892
10893         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10894                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10895                                 vcpu, &vcpu->run->s.regs.events);
10896 }
10897
10898 static int sync_regs(struct kvm_vcpu *vcpu)
10899 {
10900         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10901                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10902                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10903         }
10904         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10905                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10906                         return -EINVAL;
10907                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10908         }
10909         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10910                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10911                                 vcpu, &vcpu->run->s.regs.events))
10912                         return -EINVAL;
10913                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10914         }
10915
10916         return 0;
10917 }
10918
10919 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10920 {
10921         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10922                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10923                              "guest TSC will not be reliable\n");
10924
10925         return 0;
10926 }
10927
10928 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10929 {
10930         struct page *page;
10931         int r;
10932
10933         vcpu->arch.last_vmentry_cpu = -1;
10934         vcpu->arch.regs_avail = ~0;
10935         vcpu->arch.regs_dirty = ~0;
10936
10937         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10938                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10939         else
10940                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10941
10942         r = kvm_mmu_create(vcpu);
10943         if (r < 0)
10944                 return r;
10945
10946         if (irqchip_in_kernel(vcpu->kvm)) {
10947                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10948                 if (r < 0)
10949                         goto fail_mmu_destroy;
10950                 if (kvm_apicv_activated(vcpu->kvm))
10951                         vcpu->arch.apicv_active = true;
10952         } else
10953                 static_branch_inc(&kvm_has_noapic_vcpu);
10954
10955         r = -ENOMEM;
10956
10957         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10958         if (!page)
10959                 goto fail_free_lapic;
10960         vcpu->arch.pio_data = page_address(page);
10961
10962         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10963                                        GFP_KERNEL_ACCOUNT);
10964         if (!vcpu->arch.mce_banks)
10965                 goto fail_free_pio_data;
10966         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10967
10968         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10969                                 GFP_KERNEL_ACCOUNT))
10970                 goto fail_free_mce_banks;
10971
10972         if (!alloc_emulate_ctxt(vcpu))
10973                 goto free_wbinvd_dirty_mask;
10974
10975         if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
10976                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10977                 goto free_emulate_ctxt;
10978         }
10979
10980         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
10981         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
10982
10983         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
10984
10985         kvm_async_pf_hash_reset(vcpu);
10986         kvm_pmu_init(vcpu);
10987
10988         vcpu->arch.pending_external_vector = -1;
10989         vcpu->arch.preempted_in_kernel = false;
10990
10991 #if IS_ENABLED(CONFIG_HYPERV)
10992         vcpu->arch.hv_root_tdp = INVALID_PAGE;
10993 #endif
10994
10995         r = static_call(kvm_x86_vcpu_create)(vcpu);
10996         if (r)
10997                 goto free_guest_fpu;
10998
10999         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11000         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11001         kvm_vcpu_mtrr_init(vcpu);
11002         vcpu_load(vcpu);
11003         kvm_set_tsc_khz(vcpu, max_tsc_khz);
11004         kvm_vcpu_reset(vcpu, false);
11005         kvm_init_mmu(vcpu);
11006         vcpu_put(vcpu);
11007         return 0;
11008
11009 free_guest_fpu:
11010         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11011 free_emulate_ctxt:
11012         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11013 free_wbinvd_dirty_mask:
11014         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11015 fail_free_mce_banks:
11016         kfree(vcpu->arch.mce_banks);
11017 fail_free_pio_data:
11018         free_page((unsigned long)vcpu->arch.pio_data);
11019 fail_free_lapic:
11020         kvm_free_lapic(vcpu);
11021 fail_mmu_destroy:
11022         kvm_mmu_destroy(vcpu);
11023         return r;
11024 }
11025
11026 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11027 {
11028         struct kvm *kvm = vcpu->kvm;
11029
11030         if (mutex_lock_killable(&vcpu->mutex))
11031                 return;
11032         vcpu_load(vcpu);
11033         kvm_synchronize_tsc(vcpu, 0);
11034         vcpu_put(vcpu);
11035
11036         /* poll control enabled by default */
11037         vcpu->arch.msr_kvm_poll_control = 1;
11038
11039         mutex_unlock(&vcpu->mutex);
11040
11041         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11042                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11043                                                 KVMCLOCK_SYNC_PERIOD);
11044 }
11045
11046 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11047 {
11048         int idx;
11049
11050         kvmclock_reset(vcpu);
11051
11052         static_call(kvm_x86_vcpu_free)(vcpu);
11053
11054         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11055         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11056         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11057
11058         kvm_hv_vcpu_uninit(vcpu);
11059         kvm_pmu_destroy(vcpu);
11060         kfree(vcpu->arch.mce_banks);
11061         kvm_free_lapic(vcpu);
11062         idx = srcu_read_lock(&vcpu->kvm->srcu);
11063         kvm_mmu_destroy(vcpu);
11064         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11065         free_page((unsigned long)vcpu->arch.pio_data);
11066         kvfree(vcpu->arch.cpuid_entries);
11067         if (!lapic_in_kernel(vcpu))
11068                 static_branch_dec(&kvm_has_noapic_vcpu);
11069 }
11070
11071 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11072 {
11073         struct kvm_cpuid_entry2 *cpuid_0x1;
11074         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11075         unsigned long new_cr0;
11076
11077         /*
11078          * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11079          * to handle side effects.  RESET emulation hits those flows and relies
11080          * on emulated/virtualized registers, including those that are loaded
11081          * into hardware, to be zeroed at vCPU creation.  Use CRs as a sentinel
11082          * to detect improper or missing initialization.
11083          */
11084         WARN_ON_ONCE(!init_event &&
11085                      (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11086
11087         kvm_lapic_reset(vcpu, init_event);
11088
11089         vcpu->arch.hflags = 0;
11090
11091         vcpu->arch.smi_pending = 0;
11092         vcpu->arch.smi_count = 0;
11093         atomic_set(&vcpu->arch.nmi_queued, 0);
11094         vcpu->arch.nmi_pending = 0;
11095         vcpu->arch.nmi_injected = false;
11096         kvm_clear_interrupt_queue(vcpu);
11097         kvm_clear_exception_queue(vcpu);
11098
11099         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11100         kvm_update_dr0123(vcpu);
11101         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11102         vcpu->arch.dr7 = DR7_FIXED_1;
11103         kvm_update_dr7(vcpu);
11104
11105         vcpu->arch.cr2 = 0;
11106
11107         kvm_make_request(KVM_REQ_EVENT, vcpu);
11108         vcpu->arch.apf.msr_en_val = 0;
11109         vcpu->arch.apf.msr_int_val = 0;
11110         vcpu->arch.st.msr_val = 0;
11111
11112         kvmclock_reset(vcpu);
11113
11114         kvm_clear_async_pf_completion_queue(vcpu);
11115         kvm_async_pf_hash_reset(vcpu);
11116         vcpu->arch.apf.halted = false;
11117
11118         if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11119                 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11120
11121                 /*
11122                  * To avoid have the INIT path from kvm_apic_has_events() that be
11123                  * called with loaded FPU and does not let userspace fix the state.
11124                  */
11125                 if (init_event)
11126                         kvm_put_guest_fpu(vcpu);
11127
11128                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11129                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11130
11131                 if (init_event)
11132                         kvm_load_guest_fpu(vcpu);
11133         }
11134
11135         if (!init_event) {
11136                 kvm_pmu_reset(vcpu);
11137                 vcpu->arch.smbase = 0x30000;
11138
11139                 vcpu->arch.msr_misc_features_enables = 0;
11140
11141                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
11142         }
11143
11144         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11145         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11146         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11147
11148         /*
11149          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11150          * if no CPUID match is found.  Note, it's impossible to get a match at
11151          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11152          * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11153          * on RESET.  But, go through the motions in case that's ever remedied.
11154          */
11155         cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11156         kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11157
11158         vcpu->arch.ia32_xss = 0;
11159
11160         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11161
11162         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11163         kvm_rip_write(vcpu, 0xfff0);
11164
11165         vcpu->arch.cr3 = 0;
11166         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11167
11168         /*
11169          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11170          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11171          * (or qualify) that with a footnote stating that CD/NW are preserved.
11172          */
11173         new_cr0 = X86_CR0_ET;
11174         if (init_event)
11175                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11176         else
11177                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11178
11179         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11180         static_call(kvm_x86_set_cr4)(vcpu, 0);
11181         static_call(kvm_x86_set_efer)(vcpu, 0);
11182         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11183
11184         /*
11185          * Reset the MMU context if paging was enabled prior to INIT (which is
11186          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
11187          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11188          * checked because it is unconditionally cleared on INIT and all other
11189          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11190          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11191          */
11192         if (old_cr0 & X86_CR0_PG)
11193                 kvm_mmu_reset_context(vcpu);
11194
11195         /*
11196          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11197          * APM states the TLBs are untouched by INIT, but it also states that
11198          * the TLBs are flushed on "External initialization of the processor."
11199          * Flush the guest TLB regardless of vendor, there is no meaningful
11200          * benefit in relying on the guest to flush the TLB immediately after
11201          * INIT.  A spurious TLB flush is benign and likely negligible from a
11202          * performance perspective.
11203          */
11204         if (init_event)
11205                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11206 }
11207 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11208
11209 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11210 {
11211         struct kvm_segment cs;
11212
11213         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11214         cs.selector = vector << 8;
11215         cs.base = vector << 12;
11216         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11217         kvm_rip_write(vcpu, 0);
11218 }
11219 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11220
11221 int kvm_arch_hardware_enable(void)
11222 {
11223         struct kvm *kvm;
11224         struct kvm_vcpu *vcpu;
11225         unsigned long i;
11226         int ret;
11227         u64 local_tsc;
11228         u64 max_tsc = 0;
11229         bool stable, backwards_tsc = false;
11230
11231         kvm_user_return_msr_cpu_online();
11232         ret = static_call(kvm_x86_hardware_enable)();
11233         if (ret != 0)
11234                 return ret;
11235
11236         local_tsc = rdtsc();
11237         stable = !kvm_check_tsc_unstable();
11238         list_for_each_entry(kvm, &vm_list, vm_list) {
11239                 kvm_for_each_vcpu(i, vcpu, kvm) {
11240                         if (!stable && vcpu->cpu == smp_processor_id())
11241                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11242                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11243                                 backwards_tsc = true;
11244                                 if (vcpu->arch.last_host_tsc > max_tsc)
11245                                         max_tsc = vcpu->arch.last_host_tsc;
11246                         }
11247                 }
11248         }
11249
11250         /*
11251          * Sometimes, even reliable TSCs go backwards.  This happens on
11252          * platforms that reset TSC during suspend or hibernate actions, but
11253          * maintain synchronization.  We must compensate.  Fortunately, we can
11254          * detect that condition here, which happens early in CPU bringup,
11255          * before any KVM threads can be running.  Unfortunately, we can't
11256          * bring the TSCs fully up to date with real time, as we aren't yet far
11257          * enough into CPU bringup that we know how much real time has actually
11258          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11259          * variables that haven't been updated yet.
11260          *
11261          * So we simply find the maximum observed TSC above, then record the
11262          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11263          * the adjustment will be applied.  Note that we accumulate
11264          * adjustments, in case multiple suspend cycles happen before some VCPU
11265          * gets a chance to run again.  In the event that no KVM threads get a
11266          * chance to run, we will miss the entire elapsed period, as we'll have
11267          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11268          * loose cycle time.  This isn't too big a deal, since the loss will be
11269          * uniform across all VCPUs (not to mention the scenario is extremely
11270          * unlikely). It is possible that a second hibernate recovery happens
11271          * much faster than a first, causing the observed TSC here to be
11272          * smaller; this would require additional padding adjustment, which is
11273          * why we set last_host_tsc to the local tsc observed here.
11274          *
11275          * N.B. - this code below runs only on platforms with reliable TSC,
11276          * as that is the only way backwards_tsc is set above.  Also note
11277          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11278          * have the same delta_cyc adjustment applied if backwards_tsc
11279          * is detected.  Note further, this adjustment is only done once,
11280          * as we reset last_host_tsc on all VCPUs to stop this from being
11281          * called multiple times (one for each physical CPU bringup).
11282          *
11283          * Platforms with unreliable TSCs don't have to deal with this, they
11284          * will be compensated by the logic in vcpu_load, which sets the TSC to
11285          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11286          * guarantee that they stay in perfect synchronization.
11287          */
11288         if (backwards_tsc) {
11289                 u64 delta_cyc = max_tsc - local_tsc;
11290                 list_for_each_entry(kvm, &vm_list, vm_list) {
11291                         kvm->arch.backwards_tsc_observed = true;
11292                         kvm_for_each_vcpu(i, vcpu, kvm) {
11293                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11294                                 vcpu->arch.last_host_tsc = local_tsc;
11295                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11296                         }
11297
11298                         /*
11299                          * We have to disable TSC offset matching.. if you were
11300                          * booting a VM while issuing an S4 host suspend....
11301                          * you may have some problem.  Solving this issue is
11302                          * left as an exercise to the reader.
11303                          */
11304                         kvm->arch.last_tsc_nsec = 0;
11305                         kvm->arch.last_tsc_write = 0;
11306                 }
11307
11308         }
11309         return 0;
11310 }
11311
11312 void kvm_arch_hardware_disable(void)
11313 {
11314         static_call(kvm_x86_hardware_disable)();
11315         drop_user_return_notifiers();
11316 }
11317
11318 int kvm_arch_hardware_setup(void *opaque)
11319 {
11320         struct kvm_x86_init_ops *ops = opaque;
11321         int r;
11322
11323         rdmsrl_safe(MSR_EFER, &host_efer);
11324
11325         if (boot_cpu_has(X86_FEATURE_XSAVES))
11326                 rdmsrl(MSR_IA32_XSS, host_xss);
11327
11328         r = ops->hardware_setup();
11329         if (r != 0)
11330                 return r;
11331
11332         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11333         kvm_ops_static_call_update();
11334
11335         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11336                 supported_xss = 0;
11337
11338 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11339         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11340 #undef __kvm_cpu_cap_has
11341
11342         if (kvm_has_tsc_control) {
11343                 /*
11344                  * Make sure the user can only configure tsc_khz values that
11345                  * fit into a signed integer.
11346                  * A min value is not calculated because it will always
11347                  * be 1 on all machines.
11348                  */
11349                 u64 max = min(0x7fffffffULL,
11350                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11351                 kvm_max_guest_tsc_khz = max;
11352
11353                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11354         }
11355
11356         kvm_init_msr_list();
11357         return 0;
11358 }
11359
11360 void kvm_arch_hardware_unsetup(void)
11361 {
11362         static_call(kvm_x86_hardware_unsetup)();
11363 }
11364
11365 int kvm_arch_check_processor_compat(void *opaque)
11366 {
11367         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11368         struct kvm_x86_init_ops *ops = opaque;
11369
11370         WARN_ON(!irqs_disabled());
11371
11372         if (__cr4_reserved_bits(cpu_has, c) !=
11373             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11374                 return -EIO;
11375
11376         return ops->check_processor_compatibility();
11377 }
11378
11379 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11380 {
11381         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11382 }
11383 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11384
11385 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11386 {
11387         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11388 }
11389
11390 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11391 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11392
11393 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11394 {
11395         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11396
11397         vcpu->arch.l1tf_flush_l1d = true;
11398         if (pmu->version && unlikely(pmu->event_count)) {
11399                 pmu->need_cleanup = true;
11400                 kvm_make_request(KVM_REQ_PMU, vcpu);
11401         }
11402         static_call(kvm_x86_sched_in)(vcpu, cpu);
11403 }
11404
11405 void kvm_arch_free_vm(struct kvm *kvm)
11406 {
11407         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11408         __kvm_arch_free_vm(kvm);
11409 }
11410
11411
11412 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11413 {
11414         int ret;
11415         unsigned long flags;
11416
11417         if (type)
11418                 return -EINVAL;
11419
11420         ret = kvm_page_track_init(kvm);
11421         if (ret)
11422                 return ret;
11423
11424         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11425         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11426         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11427         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11428         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11429         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11430
11431         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11432         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11433         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11434         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11435                 &kvm->arch.irq_sources_bitmap);
11436
11437         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11438         mutex_init(&kvm->arch.apic_map_lock);
11439         seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11440         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11441
11442         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11443         pvclock_update_vm_gtod_copy(kvm);
11444         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11445
11446         kvm->arch.guest_can_read_msr_platform_info = true;
11447
11448 #if IS_ENABLED(CONFIG_HYPERV)
11449         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11450         kvm->arch.hv_root_tdp = INVALID_PAGE;
11451 #endif
11452
11453         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11454         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11455
11456         kvm_apicv_init(kvm);
11457         kvm_hv_init_vm(kvm);
11458         kvm_mmu_init_vm(kvm);
11459         kvm_xen_init_vm(kvm);
11460
11461         return static_call(kvm_x86_vm_init)(kvm);
11462 }
11463
11464 int kvm_arch_post_init_vm(struct kvm *kvm)
11465 {
11466         return kvm_mmu_post_init_vm(kvm);
11467 }
11468
11469 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11470 {
11471         vcpu_load(vcpu);
11472         kvm_mmu_unload(vcpu);
11473         vcpu_put(vcpu);
11474 }
11475
11476 static void kvm_free_vcpus(struct kvm *kvm)
11477 {
11478         unsigned long i;
11479         struct kvm_vcpu *vcpu;
11480
11481         /*
11482          * Unpin any mmu pages first.
11483          */
11484         kvm_for_each_vcpu(i, vcpu, kvm) {
11485                 kvm_clear_async_pf_completion_queue(vcpu);
11486                 kvm_unload_vcpu_mmu(vcpu);
11487         }
11488
11489         kvm_destroy_vcpus(kvm);
11490 }
11491
11492 void kvm_arch_sync_events(struct kvm *kvm)
11493 {
11494         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11495         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11496         kvm_free_pit(kvm);
11497 }
11498
11499 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11500
11501 /**
11502  * __x86_set_memory_region: Setup KVM internal memory slot
11503  *
11504  * @kvm: the kvm pointer to the VM.
11505  * @id: the slot ID to setup.
11506  * @gpa: the GPA to install the slot (unused when @size == 0).
11507  * @size: the size of the slot. Set to zero to uninstall a slot.
11508  *
11509  * This function helps to setup a KVM internal memory slot.  Specify
11510  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11511  * slot.  The return code can be one of the following:
11512  *
11513  *   HVA:           on success (uninstall will return a bogus HVA)
11514  *   -errno:        on error
11515  *
11516  * The caller should always use IS_ERR() to check the return value
11517  * before use.  Note, the KVM internal memory slots are guaranteed to
11518  * remain valid and unchanged until the VM is destroyed, i.e., the
11519  * GPA->HVA translation will not change.  However, the HVA is a user
11520  * address, i.e. its accessibility is not guaranteed, and must be
11521  * accessed via __copy_{to,from}_user().
11522  */
11523 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11524                                       u32 size)
11525 {
11526         int i, r;
11527         unsigned long hva, old_npages;
11528         struct kvm_memslots *slots = kvm_memslots(kvm);
11529         struct kvm_memory_slot *slot;
11530
11531         /* Called with kvm->slots_lock held.  */
11532         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11533                 return ERR_PTR_USR(-EINVAL);
11534
11535         slot = id_to_memslot(slots, id);
11536         if (size) {
11537                 if (slot && slot->npages)
11538                         return ERR_PTR_USR(-EEXIST);
11539
11540                 /*
11541                  * MAP_SHARED to prevent internal slot pages from being moved
11542                  * by fork()/COW.
11543                  */
11544                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11545                               MAP_SHARED | MAP_ANONYMOUS, 0);
11546                 if (IS_ERR((void *)hva))
11547                         return (void __user *)hva;
11548         } else {
11549                 if (!slot || !slot->npages)
11550                         return NULL;
11551
11552                 old_npages = slot->npages;
11553                 hva = slot->userspace_addr;
11554         }
11555
11556         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11557                 struct kvm_userspace_memory_region m;
11558
11559                 m.slot = id | (i << 16);
11560                 m.flags = 0;
11561                 m.guest_phys_addr = gpa;
11562                 m.userspace_addr = hva;
11563                 m.memory_size = size;
11564                 r = __kvm_set_memory_region(kvm, &m);
11565                 if (r < 0)
11566                         return ERR_PTR_USR(r);
11567         }
11568
11569         if (!size)
11570                 vm_munmap(hva, old_npages * PAGE_SIZE);
11571
11572         return (void __user *)hva;
11573 }
11574 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11575
11576 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11577 {
11578         kvm_mmu_pre_destroy_vm(kvm);
11579 }
11580
11581 void kvm_arch_destroy_vm(struct kvm *kvm)
11582 {
11583         if (current->mm == kvm->mm) {
11584                 /*
11585                  * Free memory regions allocated on behalf of userspace,
11586                  * unless the the memory map has changed due to process exit
11587                  * or fd copying.
11588                  */
11589                 mutex_lock(&kvm->slots_lock);
11590                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11591                                         0, 0);
11592                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11593                                         0, 0);
11594                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11595                 mutex_unlock(&kvm->slots_lock);
11596         }
11597         static_call_cond(kvm_x86_vm_destroy)(kvm);
11598         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11599         kvm_pic_destroy(kvm);
11600         kvm_ioapic_destroy(kvm);
11601         kvm_free_vcpus(kvm);
11602         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11603         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11604         kvm_mmu_uninit_vm(kvm);
11605         kvm_page_track_cleanup(kvm);
11606         kvm_xen_destroy_vm(kvm);
11607         kvm_hv_destroy_vm(kvm);
11608 }
11609
11610 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11611 {
11612         int i;
11613
11614         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11615                 kvfree(slot->arch.rmap[i]);
11616                 slot->arch.rmap[i] = NULL;
11617         }
11618 }
11619
11620 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11621 {
11622         int i;
11623
11624         memslot_rmap_free(slot);
11625
11626         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11627                 kvfree(slot->arch.lpage_info[i - 1]);
11628                 slot->arch.lpage_info[i - 1] = NULL;
11629         }
11630
11631         kvm_page_track_free_memslot(slot);
11632 }
11633
11634 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
11635 {
11636         const int sz = sizeof(*slot->arch.rmap[0]);
11637         int i;
11638
11639         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11640                 int level = i + 1;
11641                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11642
11643                 if (slot->arch.rmap[i])
11644                         continue;
11645
11646                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11647                 if (!slot->arch.rmap[i]) {
11648                         memslot_rmap_free(slot);
11649                         return -ENOMEM;
11650                 }
11651         }
11652
11653         return 0;
11654 }
11655
11656 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11657                                       struct kvm_memory_slot *slot)
11658 {
11659         unsigned long npages = slot->npages;
11660         int i, r;
11661
11662         /*
11663          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11664          * old arrays will be freed by __kvm_set_memory_region() if installing
11665          * the new memslot is successful.
11666          */
11667         memset(&slot->arch, 0, sizeof(slot->arch));
11668
11669         if (kvm_memslots_have_rmaps(kvm)) {
11670                 r = memslot_rmap_alloc(slot, npages);
11671                 if (r)
11672                         return r;
11673         }
11674
11675         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11676                 struct kvm_lpage_info *linfo;
11677                 unsigned long ugfn;
11678                 int lpages;
11679                 int level = i + 1;
11680
11681                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11682
11683                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11684                 if (!linfo)
11685                         goto out_free;
11686
11687                 slot->arch.lpage_info[i - 1] = linfo;
11688
11689                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11690                         linfo[0].disallow_lpage = 1;
11691                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11692                         linfo[lpages - 1].disallow_lpage = 1;
11693                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11694                 /*
11695                  * If the gfn and userspace address are not aligned wrt each
11696                  * other, disable large page support for this slot.
11697                  */
11698                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11699                         unsigned long j;
11700
11701                         for (j = 0; j < lpages; ++j)
11702                                 linfo[j].disallow_lpage = 1;
11703                 }
11704         }
11705
11706         if (kvm_page_track_create_memslot(kvm, slot, npages))
11707                 goto out_free;
11708
11709         return 0;
11710
11711 out_free:
11712         memslot_rmap_free(slot);
11713
11714         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11715                 kvfree(slot->arch.lpage_info[i - 1]);
11716                 slot->arch.lpage_info[i - 1] = NULL;
11717         }
11718         return -ENOMEM;
11719 }
11720
11721 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11722 {
11723         struct kvm_vcpu *vcpu;
11724         unsigned long i;
11725
11726         /*
11727          * memslots->generation has been incremented.
11728          * mmio generation may have reached its maximum value.
11729          */
11730         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11731
11732         /* Force re-initialization of steal_time cache */
11733         kvm_for_each_vcpu(i, vcpu, kvm)
11734                 kvm_vcpu_kick(vcpu);
11735 }
11736
11737 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11738                                    const struct kvm_memory_slot *old,
11739                                    struct kvm_memory_slot *new,
11740                                    enum kvm_mr_change change)
11741 {
11742         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11743                 return kvm_alloc_memslot_metadata(kvm, new);
11744
11745         if (change == KVM_MR_FLAGS_ONLY)
11746                 memcpy(&new->arch, &old->arch, sizeof(old->arch));
11747         else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
11748                 return -EIO;
11749
11750         return 0;
11751 }
11752
11753
11754 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11755 {
11756         struct kvm_arch *ka = &kvm->arch;
11757
11758         if (!kvm_x86_ops.cpu_dirty_log_size)
11759                 return;
11760
11761         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11762             (!enable && --ka->cpu_dirty_logging_count == 0))
11763                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11764
11765         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11766 }
11767
11768 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11769                                      struct kvm_memory_slot *old,
11770                                      const struct kvm_memory_slot *new,
11771                                      enum kvm_mr_change change)
11772 {
11773         u32 old_flags = old ? old->flags : 0;
11774         u32 new_flags = new ? new->flags : 0;
11775         bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
11776
11777         /*
11778          * Update CPU dirty logging if dirty logging is being toggled.  This
11779          * applies to all operations.
11780          */
11781         if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
11782                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11783
11784         /*
11785          * Nothing more to do for RO slots (which can't be dirtied and can't be
11786          * made writable) or CREATE/MOVE/DELETE of a slot.
11787          *
11788          * For a memslot with dirty logging disabled:
11789          * CREATE:      No dirty mappings will already exist.
11790          * MOVE/DELETE: The old mappings will already have been cleaned up by
11791          *              kvm_arch_flush_shadow_memslot()
11792          *
11793          * For a memslot with dirty logging enabled:
11794          * CREATE:      No shadow pages exist, thus nothing to write-protect
11795          *              and no dirty bits to clear.
11796          * MOVE/DELETE: The old mappings will already have been cleaned up by
11797          *              kvm_arch_flush_shadow_memslot().
11798          */
11799         if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
11800                 return;
11801
11802         /*
11803          * READONLY and non-flags changes were filtered out above, and the only
11804          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11805          * logging isn't being toggled on or off.
11806          */
11807         if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11808                 return;
11809
11810         if (!log_dirty_pages) {
11811                 /*
11812                  * Dirty logging tracks sptes in 4k granularity, meaning that
11813                  * large sptes have to be split.  If live migration succeeds,
11814                  * the guest in the source machine will be destroyed and large
11815                  * sptes will be created in the destination.  However, if the
11816                  * guest continues to run in the source machine (for example if
11817                  * live migration fails), small sptes will remain around and
11818                  * cause bad performance.
11819                  *
11820                  * Scan sptes if dirty logging has been stopped, dropping those
11821                  * which can be collapsed into a single large-page spte.  Later
11822                  * page faults will create the large-page sptes.
11823                  */
11824                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11825         } else {
11826                 /*
11827                  * Initially-all-set does not require write protecting any page,
11828                  * because they're all assumed to be dirty.
11829                  */
11830                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11831                         return;
11832
11833                 if (kvm_x86_ops.cpu_dirty_log_size) {
11834                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11835                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11836                 } else {
11837                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11838                 }
11839         }
11840 }
11841
11842 void kvm_arch_commit_memory_region(struct kvm *kvm,
11843                                 struct kvm_memory_slot *old,
11844                                 const struct kvm_memory_slot *new,
11845                                 enum kvm_mr_change change)
11846 {
11847         if (!kvm->arch.n_requested_mmu_pages &&
11848             (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
11849                 unsigned long nr_mmu_pages;
11850
11851                 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
11852                 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
11853                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
11854         }
11855
11856         kvm_mmu_slot_apply_flags(kvm, old, new, change);
11857
11858         /* Free the arrays associated with the old memslot. */
11859         if (change == KVM_MR_MOVE)
11860                 kvm_arch_free_memslot(kvm, old);
11861 }
11862
11863 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11864 {
11865         kvm_mmu_zap_all(kvm);
11866 }
11867
11868 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11869                                    struct kvm_memory_slot *slot)
11870 {
11871         kvm_page_track_flush_slot(kvm, slot);
11872 }
11873
11874 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11875 {
11876         return (is_guest_mode(vcpu) &&
11877                         kvm_x86_ops.guest_apic_has_interrupt &&
11878                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11879 }
11880
11881 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11882 {
11883         if (!list_empty_careful(&vcpu->async_pf.done))
11884                 return true;
11885
11886         if (kvm_apic_has_events(vcpu))
11887                 return true;
11888
11889         if (vcpu->arch.pv.pv_unhalted)
11890                 return true;
11891
11892         if (vcpu->arch.exception.pending)
11893                 return true;
11894
11895         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11896             (vcpu->arch.nmi_pending &&
11897              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11898                 return true;
11899
11900         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11901             (vcpu->arch.smi_pending &&
11902              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11903                 return true;
11904
11905         if (kvm_arch_interrupt_allowed(vcpu) &&
11906             (kvm_cpu_has_interrupt(vcpu) ||
11907             kvm_guest_apic_has_interrupt(vcpu)))
11908                 return true;
11909
11910         if (kvm_hv_has_stimer_pending(vcpu))
11911                 return true;
11912
11913         if (is_guest_mode(vcpu) &&
11914             kvm_x86_ops.nested_ops->hv_timer_pending &&
11915             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11916                 return true;
11917
11918         return false;
11919 }
11920
11921 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11922 {
11923         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11924 }
11925
11926 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11927 {
11928         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11929                 return true;
11930
11931         return false;
11932 }
11933
11934 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11935 {
11936         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11937                 return true;
11938
11939         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11940                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11941                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11942                 return true;
11943
11944         return kvm_arch_dy_has_pending_interrupt(vcpu);
11945 }
11946
11947 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11948 {
11949         if (vcpu->arch.guest_state_protected)
11950                 return true;
11951
11952         return vcpu->arch.preempted_in_kernel;
11953 }
11954
11955 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11956 {
11957         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11958 }
11959
11960 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11961 {
11962         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11963 }
11964
11965 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11966 {
11967         /* Can't read the RIP when guest state is protected, just return 0 */
11968         if (vcpu->arch.guest_state_protected)
11969                 return 0;
11970
11971         if (is_64_bit_mode(vcpu))
11972                 return kvm_rip_read(vcpu);
11973         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
11974                      kvm_rip_read(vcpu));
11975 }
11976 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
11977
11978 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
11979 {
11980         return kvm_get_linear_rip(vcpu) == linear_rip;
11981 }
11982 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
11983
11984 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
11985 {
11986         unsigned long rflags;
11987
11988         rflags = static_call(kvm_x86_get_rflags)(vcpu);
11989         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11990                 rflags &= ~X86_EFLAGS_TF;
11991         return rflags;
11992 }
11993 EXPORT_SYMBOL_GPL(kvm_get_rflags);
11994
11995 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
11996 {
11997         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
11998             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
11999                 rflags |= X86_EFLAGS_TF;
12000         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12001 }
12002
12003 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12004 {
12005         __kvm_set_rflags(vcpu, rflags);
12006         kvm_make_request(KVM_REQ_EVENT, vcpu);
12007 }
12008 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12009
12010 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
12011 {
12012         int r;
12013
12014         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
12015               work->wakeup_all)
12016                 return;
12017
12018         r = kvm_mmu_reload(vcpu);
12019         if (unlikely(r))
12020                 return;
12021
12022         if (!vcpu->arch.mmu->direct_map &&
12023               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
12024                 return;
12025
12026         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
12027 }
12028
12029 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12030 {
12031         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12032
12033         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12034 }
12035
12036 static inline u32 kvm_async_pf_next_probe(u32 key)
12037 {
12038         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12039 }
12040
12041 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12042 {
12043         u32 key = kvm_async_pf_hash_fn(gfn);
12044
12045         while (vcpu->arch.apf.gfns[key] != ~0)
12046                 key = kvm_async_pf_next_probe(key);
12047
12048         vcpu->arch.apf.gfns[key] = gfn;
12049 }
12050
12051 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12052 {
12053         int i;
12054         u32 key = kvm_async_pf_hash_fn(gfn);
12055
12056         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12057                      (vcpu->arch.apf.gfns[key] != gfn &&
12058                       vcpu->arch.apf.gfns[key] != ~0); i++)
12059                 key = kvm_async_pf_next_probe(key);
12060
12061         return key;
12062 }
12063
12064 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12065 {
12066         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12067 }
12068
12069 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12070 {
12071         u32 i, j, k;
12072
12073         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12074
12075         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12076                 return;
12077
12078         while (true) {
12079                 vcpu->arch.apf.gfns[i] = ~0;
12080                 do {
12081                         j = kvm_async_pf_next_probe(j);
12082                         if (vcpu->arch.apf.gfns[j] == ~0)
12083                                 return;
12084                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12085                         /*
12086                          * k lies cyclically in ]i,j]
12087                          * |    i.k.j |
12088                          * |....j i.k.| or  |.k..j i...|
12089                          */
12090                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12091                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12092                 i = j;
12093         }
12094 }
12095
12096 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12097 {
12098         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12099
12100         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12101                                       sizeof(reason));
12102 }
12103
12104 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12105 {
12106         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12107
12108         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12109                                              &token, offset, sizeof(token));
12110 }
12111
12112 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12113 {
12114         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12115         u32 val;
12116
12117         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12118                                          &val, offset, sizeof(val)))
12119                 return false;
12120
12121         return !val;
12122 }
12123
12124 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12125 {
12126         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12127                 return false;
12128
12129         if (!kvm_pv_async_pf_enabled(vcpu) ||
12130             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12131                 return false;
12132
12133         return true;
12134 }
12135
12136 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12137 {
12138         if (unlikely(!lapic_in_kernel(vcpu) ||
12139                      kvm_event_needs_reinjection(vcpu) ||
12140                      vcpu->arch.exception.pending))
12141                 return false;
12142
12143         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12144                 return false;
12145
12146         /*
12147          * If interrupts are off we cannot even use an artificial
12148          * halt state.
12149          */
12150         return kvm_arch_interrupt_allowed(vcpu);
12151 }
12152
12153 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12154                                      struct kvm_async_pf *work)
12155 {
12156         struct x86_exception fault;
12157
12158         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12159         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12160
12161         if (kvm_can_deliver_async_pf(vcpu) &&
12162             !apf_put_user_notpresent(vcpu)) {
12163                 fault.vector = PF_VECTOR;
12164                 fault.error_code_valid = true;
12165                 fault.error_code = 0;
12166                 fault.nested_page_fault = false;
12167                 fault.address = work->arch.token;
12168                 fault.async_page_fault = true;
12169                 kvm_inject_page_fault(vcpu, &fault);
12170                 return true;
12171         } else {
12172                 /*
12173                  * It is not possible to deliver a paravirtualized asynchronous
12174                  * page fault, but putting the guest in an artificial halt state
12175                  * can be beneficial nevertheless: if an interrupt arrives, we
12176                  * can deliver it timely and perhaps the guest will schedule
12177                  * another process.  When the instruction that triggered a page
12178                  * fault is retried, hopefully the page will be ready in the host.
12179                  */
12180                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12181                 return false;
12182         }
12183 }
12184
12185 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12186                                  struct kvm_async_pf *work)
12187 {
12188         struct kvm_lapic_irq irq = {
12189                 .delivery_mode = APIC_DM_FIXED,
12190                 .vector = vcpu->arch.apf.vec
12191         };
12192
12193         if (work->wakeup_all)
12194                 work->arch.token = ~0; /* broadcast wakeup */
12195         else
12196                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12197         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12198
12199         if ((work->wakeup_all || work->notpresent_injected) &&
12200             kvm_pv_async_pf_enabled(vcpu) &&
12201             !apf_put_user_ready(vcpu, work->arch.token)) {
12202                 vcpu->arch.apf.pageready_pending = true;
12203                 kvm_apic_set_irq(vcpu, &irq, NULL);
12204         }
12205
12206         vcpu->arch.apf.halted = false;
12207         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12208 }
12209
12210 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12211 {
12212         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12213         if (!vcpu->arch.apf.pageready_pending)
12214                 kvm_vcpu_kick(vcpu);
12215 }
12216
12217 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12218 {
12219         if (!kvm_pv_async_pf_enabled(vcpu))
12220                 return true;
12221         else
12222                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12223 }
12224
12225 void kvm_arch_start_assignment(struct kvm *kvm)
12226 {
12227         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12228                 static_call_cond(kvm_x86_start_assignment)(kvm);
12229 }
12230 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12231
12232 void kvm_arch_end_assignment(struct kvm *kvm)
12233 {
12234         atomic_dec(&kvm->arch.assigned_device_count);
12235 }
12236 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12237
12238 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12239 {
12240         return atomic_read(&kvm->arch.assigned_device_count);
12241 }
12242 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12243
12244 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12245 {
12246         atomic_inc(&kvm->arch.noncoherent_dma_count);
12247 }
12248 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12249
12250 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12251 {
12252         atomic_dec(&kvm->arch.noncoherent_dma_count);
12253 }
12254 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12255
12256 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12257 {
12258         return atomic_read(&kvm->arch.noncoherent_dma_count);
12259 }
12260 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12261
12262 bool kvm_arch_has_irq_bypass(void)
12263 {
12264         return true;
12265 }
12266
12267 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12268                                       struct irq_bypass_producer *prod)
12269 {
12270         struct kvm_kernel_irqfd *irqfd =
12271                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12272         int ret;
12273
12274         irqfd->producer = prod;
12275         kvm_arch_start_assignment(irqfd->kvm);
12276         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12277                                          prod->irq, irqfd->gsi, 1);
12278
12279         if (ret)
12280                 kvm_arch_end_assignment(irqfd->kvm);
12281
12282         return ret;
12283 }
12284
12285 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12286                                       struct irq_bypass_producer *prod)
12287 {
12288         int ret;
12289         struct kvm_kernel_irqfd *irqfd =
12290                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12291
12292         WARN_ON(irqfd->producer != prod);
12293         irqfd->producer = NULL;
12294
12295         /*
12296          * When producer of consumer is unregistered, we change back to
12297          * remapped mode, so we can re-use the current implementation
12298          * when the irq is masked/disabled or the consumer side (KVM
12299          * int this case doesn't want to receive the interrupts.
12300         */
12301         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12302         if (ret)
12303                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12304                        " fails: %d\n", irqfd->consumer.token, ret);
12305
12306         kvm_arch_end_assignment(irqfd->kvm);
12307 }
12308
12309 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12310                                    uint32_t guest_irq, bool set)
12311 {
12312         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12313 }
12314
12315 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12316                                   struct kvm_kernel_irq_routing_entry *new)
12317 {
12318         if (new->type != KVM_IRQ_ROUTING_MSI)
12319                 return true;
12320
12321         return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12322 }
12323
12324 bool kvm_vector_hashing_enabled(void)
12325 {
12326         return vector_hashing;
12327 }
12328
12329 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12330 {
12331         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12332 }
12333 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12334
12335
12336 int kvm_spec_ctrl_test_value(u64 value)
12337 {
12338         /*
12339          * test that setting IA32_SPEC_CTRL to given value
12340          * is allowed by the host processor
12341          */
12342
12343         u64 saved_value;
12344         unsigned long flags;
12345         int ret = 0;
12346
12347         local_irq_save(flags);
12348
12349         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12350                 ret = 1;
12351         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12352                 ret = 1;
12353         else
12354                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12355
12356         local_irq_restore(flags);
12357
12358         return ret;
12359 }
12360 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12361
12362 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12363 {
12364         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
12365         struct x86_exception fault;
12366         u32 access = error_code &
12367                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12368
12369         if (!(error_code & PFERR_PRESENT_MASK) ||
12370             mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != UNMAPPED_GVA) {
12371                 /*
12372                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12373                  * tables probably do not match the TLB.  Just proceed
12374                  * with the error code that the processor gave.
12375                  */
12376                 fault.vector = PF_VECTOR;
12377                 fault.error_code_valid = true;
12378                 fault.error_code = error_code;
12379                 fault.nested_page_fault = false;
12380                 fault.address = gva;
12381         }
12382         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12383 }
12384 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12385
12386 /*
12387  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12388  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12389  * indicates whether exit to userspace is needed.
12390  */
12391 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12392                               struct x86_exception *e)
12393 {
12394         if (r == X86EMUL_PROPAGATE_FAULT) {
12395                 kvm_inject_emulated_page_fault(vcpu, e);
12396                 return 1;
12397         }
12398
12399         /*
12400          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12401          * while handling a VMX instruction KVM could've handled the request
12402          * correctly by exiting to userspace and performing I/O but there
12403          * doesn't seem to be a real use-case behind such requests, just return
12404          * KVM_EXIT_INTERNAL_ERROR for now.
12405          */
12406         kvm_prepare_emulation_failure_exit(vcpu);
12407
12408         return 0;
12409 }
12410 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12411
12412 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12413 {
12414         bool pcid_enabled;
12415         struct x86_exception e;
12416         struct {
12417                 u64 pcid;
12418                 u64 gla;
12419         } operand;
12420         int r;
12421
12422         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12423         if (r != X86EMUL_CONTINUE)
12424                 return kvm_handle_memory_failure(vcpu, r, &e);
12425
12426         if (operand.pcid >> 12 != 0) {
12427                 kvm_inject_gp(vcpu, 0);
12428                 return 1;
12429         }
12430
12431         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12432
12433         switch (type) {
12434         case INVPCID_TYPE_INDIV_ADDR:
12435                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12436                     is_noncanonical_address(operand.gla, vcpu)) {
12437                         kvm_inject_gp(vcpu, 0);
12438                         return 1;
12439                 }
12440                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12441                 return kvm_skip_emulated_instruction(vcpu);
12442
12443         case INVPCID_TYPE_SINGLE_CTXT:
12444                 if (!pcid_enabled && (operand.pcid != 0)) {
12445                         kvm_inject_gp(vcpu, 0);
12446                         return 1;
12447                 }
12448
12449                 kvm_invalidate_pcid(vcpu, operand.pcid);
12450                 return kvm_skip_emulated_instruction(vcpu);
12451
12452         case INVPCID_TYPE_ALL_NON_GLOBAL:
12453                 /*
12454                  * Currently, KVM doesn't mark global entries in the shadow
12455                  * page tables, so a non-global flush just degenerates to a
12456                  * global flush. If needed, we could optimize this later by
12457                  * keeping track of global entries in shadow page tables.
12458                  */
12459
12460                 fallthrough;
12461         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12462                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12463                 return kvm_skip_emulated_instruction(vcpu);
12464
12465         default:
12466                 kvm_inject_gp(vcpu, 0);
12467                 return 1;
12468         }
12469 }
12470 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12471
12472 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12473 {
12474         struct kvm_run *run = vcpu->run;
12475         struct kvm_mmio_fragment *frag;
12476         unsigned int len;
12477
12478         BUG_ON(!vcpu->mmio_needed);
12479
12480         /* Complete previous fragment */
12481         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12482         len = min(8u, frag->len);
12483         if (!vcpu->mmio_is_write)
12484                 memcpy(frag->data, run->mmio.data, len);
12485
12486         if (frag->len <= 8) {
12487                 /* Switch to the next fragment. */
12488                 frag++;
12489                 vcpu->mmio_cur_fragment++;
12490         } else {
12491                 /* Go forward to the next mmio piece. */
12492                 frag->data += len;
12493                 frag->gpa += len;
12494                 frag->len -= len;
12495         }
12496
12497         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12498                 vcpu->mmio_needed = 0;
12499
12500                 // VMG change, at this point, we're always done
12501                 // RIP has already been advanced
12502                 return 1;
12503         }
12504
12505         // More MMIO is needed
12506         run->mmio.phys_addr = frag->gpa;
12507         run->mmio.len = min(8u, frag->len);
12508         run->mmio.is_write = vcpu->mmio_is_write;
12509         if (run->mmio.is_write)
12510                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12511         run->exit_reason = KVM_EXIT_MMIO;
12512
12513         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12514
12515         return 0;
12516 }
12517
12518 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12519                           void *data)
12520 {
12521         int handled;
12522         struct kvm_mmio_fragment *frag;
12523
12524         if (!data)
12525                 return -EINVAL;
12526
12527         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12528         if (handled == bytes)
12529                 return 1;
12530
12531         bytes -= handled;
12532         gpa += handled;
12533         data += handled;
12534
12535         /*TODO: Check if need to increment number of frags */
12536         frag = vcpu->mmio_fragments;
12537         vcpu->mmio_nr_fragments = 1;
12538         frag->len = bytes;
12539         frag->gpa = gpa;
12540         frag->data = data;
12541
12542         vcpu->mmio_needed = 1;
12543         vcpu->mmio_cur_fragment = 0;
12544
12545         vcpu->run->mmio.phys_addr = gpa;
12546         vcpu->run->mmio.len = min(8u, frag->len);
12547         vcpu->run->mmio.is_write = 1;
12548         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12549         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12550
12551         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12552
12553         return 0;
12554 }
12555 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12556
12557 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12558                          void *data)
12559 {
12560         int handled;
12561         struct kvm_mmio_fragment *frag;
12562
12563         if (!data)
12564                 return -EINVAL;
12565
12566         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12567         if (handled == bytes)
12568                 return 1;
12569
12570         bytes -= handled;
12571         gpa += handled;
12572         data += handled;
12573
12574         /*TODO: Check if need to increment number of frags */
12575         frag = vcpu->mmio_fragments;
12576         vcpu->mmio_nr_fragments = 1;
12577         frag->len = bytes;
12578         frag->gpa = gpa;
12579         frag->data = data;
12580
12581         vcpu->mmio_needed = 1;
12582         vcpu->mmio_cur_fragment = 0;
12583
12584         vcpu->run->mmio.phys_addr = gpa;
12585         vcpu->run->mmio.len = min(8u, frag->len);
12586         vcpu->run->mmio.is_write = 0;
12587         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12588
12589         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12590
12591         return 0;
12592 }
12593 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12594
12595 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12596                            unsigned int port);
12597
12598 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12599 {
12600         int size = vcpu->arch.pio.size;
12601         int port = vcpu->arch.pio.port;
12602
12603         vcpu->arch.pio.count = 0;
12604         if (vcpu->arch.sev_pio_count)
12605                 return kvm_sev_es_outs(vcpu, size, port);
12606         return 1;
12607 }
12608
12609 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12610                            unsigned int port)
12611 {
12612         for (;;) {
12613                 unsigned int count =
12614                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12615                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12616
12617                 /* memcpy done already by emulator_pio_out.  */
12618                 vcpu->arch.sev_pio_count -= count;
12619                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12620                 if (!ret)
12621                         break;
12622
12623                 /* Emulation done by the kernel.  */
12624                 if (!vcpu->arch.sev_pio_count)
12625                         return 1;
12626         }
12627
12628         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12629         return 0;
12630 }
12631
12632 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12633                           unsigned int port);
12634
12635 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12636 {
12637         unsigned count = vcpu->arch.pio.count;
12638         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12639         vcpu->arch.sev_pio_count -= count;
12640         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12641 }
12642
12643 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12644 {
12645         int size = vcpu->arch.pio.size;
12646         int port = vcpu->arch.pio.port;
12647
12648         advance_sev_es_emulated_ins(vcpu);
12649         if (vcpu->arch.sev_pio_count)
12650                 return kvm_sev_es_ins(vcpu, size, port);
12651         return 1;
12652 }
12653
12654 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12655                           unsigned int port)
12656 {
12657         for (;;) {
12658                 unsigned int count =
12659                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12660                 if (!__emulator_pio_in(vcpu, size, port, count))
12661                         break;
12662
12663                 /* Emulation done by the kernel.  */
12664                 advance_sev_es_emulated_ins(vcpu);
12665                 if (!vcpu->arch.sev_pio_count)
12666                         return 1;
12667         }
12668
12669         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12670         return 0;
12671 }
12672
12673 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12674                          unsigned int port, void *data,  unsigned int count,
12675                          int in)
12676 {
12677         vcpu->arch.sev_pio_data = data;
12678         vcpu->arch.sev_pio_count = count;
12679         return in ? kvm_sev_es_ins(vcpu, size, port)
12680                   : kvm_sev_es_outs(vcpu, size, port);
12681 }
12682 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12683
12684 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12685 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12686 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12687 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12688 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12689 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12690 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12691 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12692 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12693 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12694 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12695 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12696 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12697 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12698 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12699 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12700 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12701 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12702 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12703 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12704 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12705 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12706 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12707 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
12708 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12709 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12710 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12711 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);