arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/api.h>
  72 #include <asm/fpu/xcr.h>
  73 #include <asm/fpu/xstate.h>
  74 #include <asm/pvclock.h>
  75 #include <asm/div64.h>
  76 #include <asm/irq_remapping.h>
  77 #include <asm/mshyperv.h>
  78 #include <asm/hypervisor.h>
  79 #include <asm/tlbflush.h>
  80 #include <asm/intel_pt.h>
  81 #include <asm/emulate_prefix.h>
  82 #include <asm/sgx.h>
  83 #include <clocksource/hyperv_timer.h>
  84
  85 #define CREATE_TRACE_POINTS
  86 #include "trace.h"
  87
  88 #define MAX_IO_MSRS 256
  89 #define KVM_MAX_MCE_BANKS 32
  90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  92
  93 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
  94
  95 #define emul_to_vcpu(ctxt) \
  96         ((struct kvm_vcpu *)(ctxt)->vcpu)
  97
  98 /* EFER defaults:
  99  * - enable syscall per default because its emulated by KVM
 100  * - enable LME and LMA per default on 64 bit KVM
 101  */
 102 #ifdef CONFIG_X86_64
 103 static
 104 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 105 #else
 106 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 107 #endif
 108
 109 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 110
 111 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 112
 113 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
 114
 115 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 116                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 117
 118 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 119 static void process_nmi(struct kvm_vcpu *vcpu);
 120 static void process_smi(struct kvm_vcpu *vcpu);
 121 static void enter_smm(struct kvm_vcpu *vcpu);
 122 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 123 static void store_regs(struct kvm_vcpu *vcpu);
 124 static int sync_regs(struct kvm_vcpu *vcpu);
 125 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
 126
 127 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 128 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 129
 130 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 131
 132 #define KVM_X86_OP(func)                                             \
 133         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 134                                 *(((struct kvm_x86_ops *)0)->func));
 135 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
 136 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
 137 #include <asm/kvm-x86-ops.h>
 138 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 139 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 140
 141 static bool __read_mostly ignore_msrs = 0;
 142 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 143
 144 bool __read_mostly report_ignored_msrs = true;
 145 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 146 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 147
 148 unsigned int min_timer_period_us = 200;
 149 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 150
 151 static bool __read_mostly kvmclock_periodic_sync = true;
 152 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 153
 154 bool __read_mostly kvm_has_tsc_control;
 155 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 156 u32  __read_mostly kvm_max_guest_tsc_khz;
 157 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 158 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 159 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 160 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 161 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 162 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 163 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 164 bool __read_mostly kvm_has_bus_lock_exit;
 165 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 166
 167 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 168 static u32 __read_mostly tsc_tolerance_ppm = 250;
 169 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 170
 171 /*
 172  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 173  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 174  * advancement entirely.  Any other value is used as-is and disables adaptive
 175  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 176  */
 177 static int __read_mostly lapic_timer_advance_ns = -1;
 178 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 179
 180 static bool __read_mostly vector_hashing = true;
 181 module_param(vector_hashing, bool, S_IRUGO);
 182
 183 bool __read_mostly enable_vmware_backdoor = false;
 184 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 185 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 186
 187 static bool __read_mostly force_emulation_prefix = false;
 188 module_param(force_emulation_prefix, bool, S_IRUGO);
 189
 190 int __read_mostly pi_inject_timer = -1;
 191 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 192
 193 /* Enable/disable PMU virtualization */
 194 bool __read_mostly enable_pmu = true;
 195 EXPORT_SYMBOL_GPL(enable_pmu);
 196 module_param(enable_pmu, bool, 0444);
 197
 198 bool __read_mostly eager_page_split = true;
 199 module_param(eager_page_split, bool, 0644);
 200
 201 /*
 202  * Restoring the host value for MSRs that are only consumed when running in
 203  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 204  * returns to userspace, i.e. the kernel can run with the guest's value.
 205  */
 206 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 207
 208 struct kvm_user_return_msrs {
 209         struct user_return_notifier urn;
 210         bool registered;
 211         struct kvm_user_return_msr_values {
 212                 u64 host;
 213                 u64 curr;
 214         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 215 };
 216
 217 u32 __read_mostly kvm_nr_uret_msrs;
 218 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 219 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 220 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 221
 222 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 223                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 224                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 225                                 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
 226
 227 u64 __read_mostly host_efer;
 228 EXPORT_SYMBOL_GPL(host_efer);
 229
 230 bool __read_mostly allow_smaller_maxphyaddr = 0;
 231 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 232
 233 bool __read_mostly enable_apicv = true;
 234 EXPORT_SYMBOL_GPL(enable_apicv);
 235
 236 u64 __read_mostly host_xss;
 237 EXPORT_SYMBOL_GPL(host_xss);
 238 u64 __read_mostly supported_xss;
 239 EXPORT_SYMBOL_GPL(supported_xss);
 240
 241 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 242         KVM_GENERIC_VM_STATS(),
 243         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 244         STATS_DESC_COUNTER(VM, mmu_pte_write),
 245         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 246         STATS_DESC_COUNTER(VM, mmu_flooded),
 247         STATS_DESC_COUNTER(VM, mmu_recycled),
 248         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 249         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 250         STATS_DESC_ICOUNTER(VM, pages_4k),
 251         STATS_DESC_ICOUNTER(VM, pages_2m),
 252         STATS_DESC_ICOUNTER(VM, pages_1g),
 253         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 254         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 255         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 256 };
 257
 258 const struct kvm_stats_header kvm_vm_stats_header = {
 259         .name_size = KVM_STATS_NAME_SIZE,
 260         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 261         .id_offset = sizeof(struct kvm_stats_header),
 262         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 263         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 264                        sizeof(kvm_vm_stats_desc),
 265 };
 266
 267 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 268         KVM_GENERIC_VCPU_STATS(),
 269         STATS_DESC_COUNTER(VCPU, pf_taken),
 270         STATS_DESC_COUNTER(VCPU, pf_fixed),
 271         STATS_DESC_COUNTER(VCPU, pf_emulate),
 272         STATS_DESC_COUNTER(VCPU, pf_spurious),
 273         STATS_DESC_COUNTER(VCPU, pf_fast),
 274         STATS_DESC_COUNTER(VCPU, pf_mmio_spte_created),
 275         STATS_DESC_COUNTER(VCPU, pf_guest),
 276         STATS_DESC_COUNTER(VCPU, tlb_flush),
 277         STATS_DESC_COUNTER(VCPU, invlpg),
 278         STATS_DESC_COUNTER(VCPU, exits),
 279         STATS_DESC_COUNTER(VCPU, io_exits),
 280         STATS_DESC_COUNTER(VCPU, mmio_exits),
 281         STATS_DESC_COUNTER(VCPU, signal_exits),
 282         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 283         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 284         STATS_DESC_COUNTER(VCPU, l1d_flush),
 285         STATS_DESC_COUNTER(VCPU, halt_exits),
 286         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 287         STATS_DESC_COUNTER(VCPU, irq_exits),
 288         STATS_DESC_COUNTER(VCPU, host_state_reload),
 289         STATS_DESC_COUNTER(VCPU, fpu_reload),
 290         STATS_DESC_COUNTER(VCPU, insn_emulation),
 291         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 292         STATS_DESC_COUNTER(VCPU, hypercalls),
 293         STATS_DESC_COUNTER(VCPU, irq_injections),
 294         STATS_DESC_COUNTER(VCPU, nmi_injections),
 295         STATS_DESC_COUNTER(VCPU, req_event),
 296         STATS_DESC_COUNTER(VCPU, nested_run),
 297         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 298         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 299         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 300 };
 301
 302 const struct kvm_stats_header kvm_vcpu_stats_header = {
 303         .name_size = KVM_STATS_NAME_SIZE,
 304         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 305         .id_offset = sizeof(struct kvm_stats_header),
 306         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 307         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 308                        sizeof(kvm_vcpu_stats_desc),
 309 };
 310
 311 u64 __read_mostly host_xcr0;
 312 u64 __read_mostly supported_xcr0;
 313 EXPORT_SYMBOL_GPL(supported_xcr0);
 314
 315 static struct kmem_cache *x86_emulator_cache;
 316
 317 /*
 318  * When called, it means the previous get/set msr reached an invalid msr.
 319  * Return true if we want to ignore/silent this failed msr access.
 320  */
 321 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 322 {
 323         const char *op = write ? "wrmsr" : "rdmsr";
 324
 325         if (ignore_msrs) {
 326                 if (report_ignored_msrs)
 327                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 328                                       op, msr, data);
 329                 /* Mask the error */
 330                 return true;
 331         } else {
 332                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 333                                       op, msr, data);
 334                 return false;
 335         }
 336 }
 337
 338 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 339 {
 340         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 341         unsigned int size = sizeof(struct x86_emulate_ctxt);
 342
 343         return kmem_cache_create_usercopy("x86_emulator", size,
 344                                           __alignof__(struct x86_emulate_ctxt),
 345                                           SLAB_ACCOUNT, useroffset,
 346                                           size - useroffset, NULL);
 347 }
 348
 349 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 350
 351 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 352 {
 353         int i;
 354         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 355                 vcpu->arch.apf.gfns[i] = ~0;
 356 }
 357
 358 static void kvm_on_user_return(struct user_return_notifier *urn)
 359 {
 360         unsigned slot;
 361         struct kvm_user_return_msrs *msrs
 362                 = container_of(urn, struct kvm_user_return_msrs, urn);
 363         struct kvm_user_return_msr_values *values;
 364         unsigned long flags;
 365
 366         /*
 367          * Disabling irqs at this point since the following code could be
 368          * interrupted and executed through kvm_arch_hardware_disable()
 369          */
 370         local_irq_save(flags);
 371         if (msrs->registered) {
 372                 msrs->registered = false;
 373                 user_return_notifier_unregister(urn);
 374         }
 375         local_irq_restore(flags);
 376         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 377                 values = &msrs->values[slot];
 378                 if (values->host != values->curr) {
 379                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 380                         values->curr = values->host;
 381                 }
 382         }
 383 }
 384
 385 static int kvm_probe_user_return_msr(u32 msr)
 386 {
 387         u64 val;
 388         int ret;
 389
 390         preempt_disable();
 391         ret = rdmsrl_safe(msr, &val);
 392         if (ret)
 393                 goto out;
 394         ret = wrmsrl_safe(msr, val);
 395 out:
 396         preempt_enable();
 397         return ret;
 398 }
 399
 400 int kvm_add_user_return_msr(u32 msr)
 401 {
 402         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 403
 404         if (kvm_probe_user_return_msr(msr))
 405                 return -1;
 406
 407         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 408         return kvm_nr_uret_msrs++;
 409 }
 410 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 411
 412 int kvm_find_user_return_msr(u32 msr)
 413 {
 414         int i;
 415
 416         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 417                 if (kvm_uret_msrs_list[i] == msr)
 418                         return i;
 419         }
 420         return -1;
 421 }
 422 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 423
 424 static void kvm_user_return_msr_cpu_online(void)
 425 {
 426         unsigned int cpu = smp_processor_id();
 427         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 428         u64 value;
 429         int i;
 430
 431         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 432                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 433                 msrs->values[i].host = value;
 434                 msrs->values[i].curr = value;
 435         }
 436 }
 437
 438 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 439 {
 440         unsigned int cpu = smp_processor_id();
 441         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 442         int err;
 443
 444         value = (value & mask) | (msrs->values[slot].host & ~mask);
 445         if (value == msrs->values[slot].curr)
 446                 return 0;
 447         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 448         if (err)
 449                 return 1;
 450
 451         msrs->values[slot].curr = value;
 452         if (!msrs->registered) {
 453                 msrs->urn.on_user_return = kvm_on_user_return;
 454                 user_return_notifier_register(&msrs->urn);
 455                 msrs->registered = true;
 456         }
 457         return 0;
 458 }
 459 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 460
 461 static void drop_user_return_notifiers(void)
 462 {
 463         unsigned int cpu = smp_processor_id();
 464         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 465
 466         if (msrs->registered)
 467                 kvm_on_user_return(&msrs->urn);
 468 }
 469
 470 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 471 {
 472         return vcpu->arch.apic_base;
 473 }
 474 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 475
 476 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 477 {
 478         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 479 }
 480 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 481
 482 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 483 {
 484         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 485         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 486         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 487                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 488
 489         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 490                 return 1;
 491         if (!msr_info->host_initiated) {
 492                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 493                         return 1;
 494                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 495                         return 1;
 496         }
 497
 498         kvm_lapic_set_base(vcpu, msr_info->data);
 499         kvm_recalculate_apic_map(vcpu->kvm);
 500         return 0;
 501 }
 502 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 503
 504 /*
 505  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 506  *
 507  * Hardware virtualization extension instructions may fault if a reboot turns
 508  * off virtualization while processes are running.  Usually after catching the
 509  * fault we just panic; during reboot instead the instruction is ignored.
 510  */
 511 noinstr void kvm_spurious_fault(void)
 512 {
 513         /* Fault while not rebooting.  We want the trace. */
 514         BUG_ON(!kvm_rebooting);
 515 }
 516 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 517
 518 #define EXCPT_BENIGN            0
 519 #define EXCPT_CONTRIBUTORY      1
 520 #define EXCPT_PF                2
 521
 522 static int exception_class(int vector)
 523 {
 524         switch (vector) {
 525         case PF_VECTOR:
 526                 return EXCPT_PF;
 527         case DE_VECTOR:
 528         case TS_VECTOR:
 529         case NP_VECTOR:
 530         case SS_VECTOR:
 531         case GP_VECTOR:
 532                 return EXCPT_CONTRIBUTORY;
 533         default:
 534                 break;
 535         }
 536         return EXCPT_BENIGN;
 537 }
 538
 539 #define EXCPT_FAULT             0
 540 #define EXCPT_TRAP              1
 541 #define EXCPT_ABORT             2
 542 #define EXCPT_INTERRUPT         3
 543
 544 static int exception_type(int vector)
 545 {
 546         unsigned int mask;
 547
 548         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 549                 return EXCPT_INTERRUPT;
 550
 551         mask = 1 << vector;
 552
 553         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 554         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 555                 return EXCPT_TRAP;
 556
 557         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 558                 return EXCPT_ABORT;
 559
 560         /* Reserved exceptions will result in fault */
 561         return EXCPT_FAULT;
 562 }
 563
 564 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 565 {
 566         unsigned nr = vcpu->arch.exception.nr;
 567         bool has_payload = vcpu->arch.exception.has_payload;
 568         unsigned long payload = vcpu->arch.exception.payload;
 569
 570         if (!has_payload)
 571                 return;
 572
 573         switch (nr) {
 574         case DB_VECTOR:
 575                 /*
 576                  * "Certain debug exceptions may clear bit 0-3.  The
 577                  * remaining contents of the DR6 register are never
 578                  * cleared by the processor".
 579                  */
 580                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 581                 /*
 582                  * In order to reflect the #DB exception payload in guest
 583                  * dr6, three components need to be considered: active low
 584                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 585                  * DR6_BS and DR6_BT)
 586                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 587                  * In the target guest dr6:
 588                  * FIXED_1 bits should always be set.
 589                  * Active low bits should be cleared if 1-setting in payload.
 590                  * Active high bits should be set if 1-setting in payload.
 591                  *
 592                  * Note, the payload is compatible with the pending debug
 593                  * exceptions/exit qualification under VMX, that active_low bits
 594                  * are active high in payload.
 595                  * So they need to be flipped for DR6.
 596                  */
 597                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 598                 vcpu->arch.dr6 |= payload;
 599                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 600
 601                 /*
 602                  * The #DB payload is defined as compatible with the 'pending
 603                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 604                  * defined in the 'pending debug exceptions' field (enabled
 605                  * breakpoint), it is reserved and must be zero in DR6.
 606                  */
 607                 vcpu->arch.dr6 &= ~BIT(12);
 608                 break;
 609         case PF_VECTOR:
 610                 vcpu->arch.cr2 = payload;
 611                 break;
 612         }
 613
 614         vcpu->arch.exception.has_payload = false;
 615         vcpu->arch.exception.payload = 0;
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 618
 619 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 620                 unsigned nr, bool has_error, u32 error_code,
 621                 bool has_payload, unsigned long payload, bool reinject)
 622 {
 623         u32 prev_nr;
 624         int class1, class2;
 625
 626         kvm_make_request(KVM_REQ_EVENT, vcpu);
 627
 628         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 629         queue:
 630                 if (reinject) {
 631                         /*
 632                          * On vmentry, vcpu->arch.exception.pending is only
 633                          * true if an event injection was blocked by
 634                          * nested_run_pending.  In that case, however,
 635                          * vcpu_enter_guest requests an immediate exit,
 636                          * and the guest shouldn't proceed far enough to
 637                          * need reinjection.
 638                          */
 639                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 640                         vcpu->arch.exception.injected = true;
 641                         if (WARN_ON_ONCE(has_payload)) {
 642                                 /*
 643                                  * A reinjected event has already
 644                                  * delivered its payload.
 645                                  */
 646                                 has_payload = false;
 647                                 payload = 0;
 648                         }
 649                 } else {
 650                         vcpu->arch.exception.pending = true;
 651                         vcpu->arch.exception.injected = false;
 652                 }
 653                 vcpu->arch.exception.has_error_code = has_error;
 654                 vcpu->arch.exception.nr = nr;
 655                 vcpu->arch.exception.error_code = error_code;
 656                 vcpu->arch.exception.has_payload = has_payload;
 657                 vcpu->arch.exception.payload = payload;
 658                 if (!is_guest_mode(vcpu))
 659                         kvm_deliver_exception_payload(vcpu);
 660                 return;
 661         }
 662
 663         /* to check exception */
 664         prev_nr = vcpu->arch.exception.nr;
 665         if (prev_nr == DF_VECTOR) {
 666                 /* triple fault -> shutdown */
 667                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 668                 return;
 669         }
 670         class1 = exception_class(prev_nr);
 671         class2 = exception_class(nr);
 672         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 673                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 674                 /*
 675                  * Generate double fault per SDM Table 5-5.  Set
 676                  * exception.pending = true so that the double fault
 677                  * can trigger a nested vmexit.
 678                  */
 679                 vcpu->arch.exception.pending = true;
 680                 vcpu->arch.exception.injected = false;
 681                 vcpu->arch.exception.has_error_code = true;
 682                 vcpu->arch.exception.nr = DF_VECTOR;
 683                 vcpu->arch.exception.error_code = 0;
 684                 vcpu->arch.exception.has_payload = false;
 685                 vcpu->arch.exception.payload = 0;
 686         } else
 687                 /* replace previous exception with a new one in a hope
 688                    that instruction re-execution will regenerate lost
 689                    exception */
 690                 goto queue;
 691 }
 692
 693 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 694 {
 695         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 696 }
 697 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 698
 699 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 700 {
 701         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 702 }
 703 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 704
 705 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 706                            unsigned long payload)
 707 {
 708         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 709 }
 710 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 711
 712 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 713                                     u32 error_code, unsigned long payload)
 714 {
 715         kvm_multiple_exception(vcpu, nr, true, error_code,
 716                                true, payload, false);
 717 }
 718
 719 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 720 {
 721         if (err)
 722                 kvm_inject_gp(vcpu, 0);
 723         else
 724                 return kvm_skip_emulated_instruction(vcpu);
 725
 726         return 1;
 727 }
 728 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 729
 730 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
 731 {
 732         if (err) {
 733                 kvm_inject_gp(vcpu, 0);
 734                 return 1;
 735         }
 736
 737         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
 738                                        EMULTYPE_COMPLETE_USER_EXIT);
 739 }
 740
 741 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 742 {
 743         ++vcpu->stat.pf_guest;
 744         vcpu->arch.exception.nested_apf =
 745                 is_guest_mode(vcpu) && fault->async_page_fault;
 746         if (vcpu->arch.exception.nested_apf) {
 747                 vcpu->arch.apf.nested_apf_token = fault->address;
 748                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 749         } else {
 750                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 751                                         fault->address);
 752         }
 753 }
 754 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 755
 756 /* Returns true if the page fault was immediately morphed into a VM-Exit. */
 757 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 758                                     struct x86_exception *fault)
 759 {
 760         struct kvm_mmu *fault_mmu;
 761         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 762
 763         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 764                                                vcpu->arch.walk_mmu;
 765
 766         /*
 767          * Invalidate the TLB entry for the faulting address, if it exists,
 768          * else the access will fault indefinitely (and to emulate hardware).
 769          */
 770         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 771             !(fault->error_code & PFERR_RSVD_MASK))
 772                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 773                                        fault_mmu->root.hpa);
 774
 775         /*
 776          * A workaround for KVM's bad exception handling.  If KVM injected an
 777          * exception into L2, and L2 encountered a #PF while vectoring the
 778          * injected exception, manually check to see if L1 wants to intercept
 779          * #PF, otherwise queuing the #PF will lead to #DF or a lost exception.
 780          * In all other cases, defer the check to nested_ops->check_events(),
 781          * which will correctly handle priority (this does not).  Note, other
 782          * exceptions, e.g. #GP, are theoretically affected, #PF is simply the
 783          * most problematic, e.g. when L0 and L1 are both intercepting #PF for
 784          * shadow paging.
 785          *
 786          * TODO: Rewrite exception handling to track injected and pending
 787          *       (VM-Exit) exceptions separately.
 788          */
 789         if (unlikely(vcpu->arch.exception.injected && is_guest_mode(vcpu)) &&
 790             kvm_x86_ops.nested_ops->handle_page_fault_workaround(vcpu, fault))
 791                 return true;
 792
 793         fault_mmu->inject_page_fault(vcpu, fault);
 794         return false;
 795 }
 796 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 797
 798 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 799 {
 800         atomic_inc(&vcpu->arch.nmi_queued);
 801         kvm_make_request(KVM_REQ_NMI, vcpu);
 802 }
 803 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 804
 805 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 806 {
 807         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 808 }
 809 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 810
 811 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 812 {
 813         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 814 }
 815 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 816
 817 /*
 818  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 819  * a #GP and return false.
 820  */
 821 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 822 {
 823         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 824                 return true;
 825         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 826         return false;
 827 }
 828 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 829
 830 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 831 {
 832         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 833                 return true;
 834
 835         kvm_queue_exception(vcpu, UD_VECTOR);
 836         return false;
 837 }
 838 EXPORT_SYMBOL_GPL(kvm_require_dr);
 839
 840 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 841 {
 842         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 843 }
 844
 845 /*
 846  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 847  */
 848 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 849 {
 850         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
 851         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 852         gpa_t real_gpa;
 853         int i;
 854         int ret;
 855         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 856
 857         /*
 858          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 859          * to an L1 GPA.
 860          */
 861         real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
 862                                      PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 863         if (real_gpa == UNMAPPED_GVA)
 864                 return 0;
 865
 866         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 867         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 868                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 869         if (ret < 0)
 870                 return 0;
 871
 872         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 873                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 874                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 875                         return 0;
 876                 }
 877         }
 878
 879         /*
 880          * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
 881          * Shadow page roots need to be reconstructed instead.
 882          */
 883         if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
 884                 kvm_mmu_free_roots(vcpu->kvm, mmu, KVM_MMU_ROOT_CURRENT);
 885
 886         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 887         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 888         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 889         vcpu->arch.pdptrs_from_userspace = false;
 890
 891         return 1;
 892 }
 893 EXPORT_SYMBOL_GPL(load_pdptrs);
 894
 895 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 896 {
 897         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 898                 kvm_clear_async_pf_completion_queue(vcpu);
 899                 kvm_async_pf_hash_reset(vcpu);
 900
 901                 /*
 902                  * Clearing CR0.PG is defined to flush the TLB from the guest's
 903                  * perspective.
 904                  */
 905                 if (!(cr0 & X86_CR0_PG))
 906                         kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
 907         }
 908
 909         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 910                 kvm_mmu_reset_context(vcpu);
 911
 912         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 913             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 914             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 915                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 916 }
 917 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 918
 919 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 920 {
 921         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 922
 923         cr0 |= X86_CR0_ET;
 924
 925 #ifdef CONFIG_X86_64
 926         if (cr0 & 0xffffffff00000000UL)
 927                 return 1;
 928 #endif
 929
 930         cr0 &= ~CR0_RESERVED_BITS;
 931
 932         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 933                 return 1;
 934
 935         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 936                 return 1;
 937
 938 #ifdef CONFIG_X86_64
 939         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 940             (cr0 & X86_CR0_PG)) {
 941                 int cs_db, cs_l;
 942
 943                 if (!is_pae(vcpu))
 944                         return 1;
 945                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 946                 if (cs_l)
 947                         return 1;
 948         }
 949 #endif
 950         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 951             is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
 952             !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
 953                 return 1;
 954
 955         if (!(cr0 & X86_CR0_PG) &&
 956             (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
 957                 return 1;
 958
 959         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 960
 961         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 962
 963         return 0;
 964 }
 965 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 966
 967 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 968 {
 969         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 970 }
 971 EXPORT_SYMBOL_GPL(kvm_lmsw);
 972
 973 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 974 {
 975         if (vcpu->arch.guest_state_protected)
 976                 return;
 977
 978         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 979
 980                 if (vcpu->arch.xcr0 != host_xcr0)
 981                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 982
 983                 if (vcpu->arch.xsaves_enabled &&
 984                     vcpu->arch.ia32_xss != host_xss)
 985                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 986         }
 987
 988 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
 989         if (static_cpu_has(X86_FEATURE_PKU) &&
 990             vcpu->arch.pkru != vcpu->arch.host_pkru &&
 991             ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
 992              kvm_read_cr4_bits(vcpu, X86_CR4_PKE)))
 993                 write_pkru(vcpu->arch.pkru);
 994 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
 995 }
 996 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 997
 998 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 999 {
1000         if (vcpu->arch.guest_state_protected)
1001                 return;
1002
1003 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1004         if (static_cpu_has(X86_FEATURE_PKU) &&
1005             ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
1006              kvm_read_cr4_bits(vcpu, X86_CR4_PKE))) {
1007                 vcpu->arch.pkru = rdpkru();
1008                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
1009                         write_pkru(vcpu->arch.host_pkru);
1010         }
1011 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
1012
1013         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
1014
1015                 if (vcpu->arch.xcr0 != host_xcr0)
1016                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
1017
1018                 if (vcpu->arch.xsaves_enabled &&
1019                     vcpu->arch.ia32_xss != host_xss)
1020                         wrmsrl(MSR_IA32_XSS, host_xss);
1021         }
1022
1023 }
1024 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
1025
1026 static inline u64 kvm_guest_supported_xcr0(struct kvm_vcpu *vcpu)
1027 {
1028         return vcpu->arch.guest_fpu.fpstate->user_xfeatures;
1029 }
1030
1031 #ifdef CONFIG_X86_64
1032 static inline u64 kvm_guest_supported_xfd(struct kvm_vcpu *vcpu)
1033 {
1034         return kvm_guest_supported_xcr0(vcpu) & XFEATURE_MASK_USER_DYNAMIC;
1035 }
1036 #endif
1037
1038 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
1039 {
1040         u64 xcr0 = xcr;
1041         u64 old_xcr0 = vcpu->arch.xcr0;
1042         u64 valid_bits;
1043
1044         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
1045         if (index != XCR_XFEATURE_ENABLED_MASK)
1046                 return 1;
1047         if (!(xcr0 & XFEATURE_MASK_FP))
1048                 return 1;
1049         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1050                 return 1;
1051
1052         /*
1053          * Do not allow the guest to set bits that we do not support
1054          * saving.  However, xcr0 bit 0 is always set, even if the
1055          * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1056          */
1057         valid_bits = kvm_guest_supported_xcr0(vcpu) | XFEATURE_MASK_FP;
1058         if (xcr0 & ~valid_bits)
1059                 return 1;
1060
1061         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1062             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1063                 return 1;
1064
1065         if (xcr0 & XFEATURE_MASK_AVX512) {
1066                 if (!(xcr0 & XFEATURE_MASK_YMM))
1067                         return 1;
1068                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1069                         return 1;
1070         }
1071
1072         if ((xcr0 & XFEATURE_MASK_XTILE) &&
1073             ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1074                 return 1;
1075
1076         vcpu->arch.xcr0 = xcr0;
1077
1078         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1079                 kvm_update_cpuid_runtime(vcpu);
1080         return 0;
1081 }
1082
1083 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1084 {
1085         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1086             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1087                 kvm_inject_gp(vcpu, 0);
1088                 return 1;
1089         }
1090
1091         return kvm_skip_emulated_instruction(vcpu);
1092 }
1093 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1094
1095 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1096 {
1097         if (cr4 & cr4_reserved_bits)
1098                 return false;
1099
1100         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1101                 return false;
1102
1103         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1104 }
1105 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1106
1107 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1108 {
1109         if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1110                 kvm_mmu_reset_context(vcpu);
1111
1112         /*
1113          * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1114          * according to the SDM; however, stale prev_roots could be reused
1115          * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1116          * free them all.  This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1117          * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1118          * so fall through.
1119          */
1120         if (!tdp_enabled &&
1121             (cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE))
1122                 kvm_mmu_unload(vcpu);
1123
1124         /*
1125          * The TLB has to be flushed for all PCIDs if any of the following
1126          * (architecturally required) changes happen:
1127          * - CR4.PCIDE is changed from 1 to 0
1128          * - CR4.PGE is toggled
1129          *
1130          * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1131          */
1132         if (((cr4 ^ old_cr4) & X86_CR4_PGE) ||
1133             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1134                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1135
1136         /*
1137          * The TLB has to be flushed for the current PCID if any of the
1138          * following (architecturally required) changes happen:
1139          * - CR4.SMEP is changed from 0 to 1
1140          * - CR4.PAE is toggled
1141          */
1142         else if (((cr4 ^ old_cr4) & X86_CR4_PAE) ||
1143                  ((cr4 & X86_CR4_SMEP) && !(old_cr4 & X86_CR4_SMEP)))
1144                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1145
1146 }
1147 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1148
1149 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1150 {
1151         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1152
1153         if (!kvm_is_valid_cr4(vcpu, cr4))
1154                 return 1;
1155
1156         if (is_long_mode(vcpu)) {
1157                 if (!(cr4 & X86_CR4_PAE))
1158                         return 1;
1159                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1160                         return 1;
1161         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1162                    && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1163                    && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1164                 return 1;
1165
1166         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1167                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1168                         return 1;
1169
1170                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1171                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1172                         return 1;
1173         }
1174
1175         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1176
1177         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1178
1179         return 0;
1180 }
1181 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1182
1183 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1184 {
1185         struct kvm_mmu *mmu = vcpu->arch.mmu;
1186         unsigned long roots_to_free = 0;
1187         int i;
1188
1189         /*
1190          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1191          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1192          * also via the emulator.  KVM's TDP page tables are not in the scope of
1193          * the invalidation, but the guest's TLB entries need to be flushed as
1194          * the CPU may have cached entries in its TLB for the target PCID.
1195          */
1196         if (unlikely(tdp_enabled)) {
1197                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1198                 return;
1199         }
1200
1201         /*
1202          * If neither the current CR3 nor any of the prev_roots use the given
1203          * PCID, then nothing needs to be done here because a resync will
1204          * happen anyway before switching to any other CR3.
1205          */
1206         if (kvm_get_active_pcid(vcpu) == pcid) {
1207                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1208                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1209         }
1210
1211         /*
1212          * If PCID is disabled, there is no need to free prev_roots even if the
1213          * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1214          * with PCIDE=0.
1215          */
1216         if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1217                 return;
1218
1219         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1220                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1221                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1222
1223         kvm_mmu_free_roots(vcpu->kvm, mmu, roots_to_free);
1224 }
1225
1226 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1227 {
1228         bool skip_tlb_flush = false;
1229         unsigned long pcid = 0;
1230 #ifdef CONFIG_X86_64
1231         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1232
1233         if (pcid_enabled) {
1234                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1235                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1236                 pcid = cr3 & X86_CR3_PCID_MASK;
1237         }
1238 #endif
1239
1240         /* PDPTRs are always reloaded for PAE paging. */
1241         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1242                 goto handle_tlb_flush;
1243
1244         /*
1245          * Do not condition the GPA check on long mode, this helper is used to
1246          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1247          * the current vCPU mode is accurate.
1248          */
1249         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1250                 return 1;
1251
1252         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1253                 return 1;
1254
1255         if (cr3 != kvm_read_cr3(vcpu))
1256                 kvm_mmu_new_pgd(vcpu, cr3);
1257
1258         vcpu->arch.cr3 = cr3;
1259         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1260         /* Do not call post_set_cr3, we do not get here for confidential guests.  */
1261
1262 handle_tlb_flush:
1263         /*
1264          * A load of CR3 that flushes the TLB flushes only the current PCID,
1265          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1266          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1267          * and it's impossible to use a non-zero PCID when PCID is disabled,
1268          * i.e. only PCID=0 can be relevant.
1269          */
1270         if (!skip_tlb_flush)
1271                 kvm_invalidate_pcid(vcpu, pcid);
1272
1273         return 0;
1274 }
1275 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1276
1277 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1278 {
1279         if (cr8 & CR8_RESERVED_BITS)
1280                 return 1;
1281         if (lapic_in_kernel(vcpu))
1282                 kvm_lapic_set_tpr(vcpu, cr8);
1283         else
1284                 vcpu->arch.cr8 = cr8;
1285         return 0;
1286 }
1287 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1288
1289 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1290 {
1291         if (lapic_in_kernel(vcpu))
1292                 return kvm_lapic_get_cr8(vcpu);
1293         else
1294                 return vcpu->arch.cr8;
1295 }
1296 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1297
1298 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1299 {
1300         int i;
1301
1302         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1303                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1304                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1305         }
1306 }
1307
1308 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1309 {
1310         unsigned long dr7;
1311
1312         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1313                 dr7 = vcpu->arch.guest_debug_dr7;
1314         else
1315                 dr7 = vcpu->arch.dr7;
1316         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1317         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1318         if (dr7 & DR7_BP_EN_MASK)
1319                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1320 }
1321 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1322
1323 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1324 {
1325         u64 fixed = DR6_FIXED_1;
1326
1327         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1328                 fixed |= DR6_RTM;
1329
1330         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1331                 fixed |= DR6_BUS_LOCK;
1332         return fixed;
1333 }
1334
1335 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1336 {
1337         size_t size = ARRAY_SIZE(vcpu->arch.db);
1338
1339         switch (dr) {
1340         case 0 ... 3:
1341                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1342                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1343                         vcpu->arch.eff_db[dr] = val;
1344                 break;
1345         case 4:
1346         case 6:
1347                 if (!kvm_dr6_valid(val))
1348                         return 1; /* #GP */
1349                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1350                 break;
1351         case 5:
1352         default: /* 7 */
1353                 if (!kvm_dr7_valid(val))
1354                         return 1; /* #GP */
1355                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1356                 kvm_update_dr7(vcpu);
1357                 break;
1358         }
1359
1360         return 0;
1361 }
1362 EXPORT_SYMBOL_GPL(kvm_set_dr);
1363
1364 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1365 {
1366         size_t size = ARRAY_SIZE(vcpu->arch.db);
1367
1368         switch (dr) {
1369         case 0 ... 3:
1370                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1371                 break;
1372         case 4:
1373         case 6:
1374                 *val = vcpu->arch.dr6;
1375                 break;
1376         case 5:
1377         default: /* 7 */
1378                 *val = vcpu->arch.dr7;
1379                 break;
1380         }
1381 }
1382 EXPORT_SYMBOL_GPL(kvm_get_dr);
1383
1384 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1385 {
1386         u32 ecx = kvm_rcx_read(vcpu);
1387         u64 data;
1388
1389         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1390                 kvm_inject_gp(vcpu, 0);
1391                 return 1;
1392         }
1393
1394         kvm_rax_write(vcpu, (u32)data);
1395         kvm_rdx_write(vcpu, data >> 32);
1396         return kvm_skip_emulated_instruction(vcpu);
1397 }
1398 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1399
1400 /*
1401  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1402  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1403  *
1404  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1405  * extract the supported MSRs from the related const lists.
1406  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1407  * capabilities of the host cpu. This capabilities test skips MSRs that are
1408  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1409  * may depend on host virtualization features rather than host cpu features.
1410  */
1411
1412 static const u32 msrs_to_save_all[] = {
1413         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1414         MSR_STAR,
1415 #ifdef CONFIG_X86_64
1416         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1417 #endif
1418         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1419         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1420         MSR_IA32_SPEC_CTRL,
1421         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1422         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1423         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1424         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1425         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1426         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1427         MSR_IA32_UMWAIT_CONTROL,
1428
1429         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1430         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1431         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1432         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1433         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1434         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1435         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1436         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1437         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1438         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1439         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1440         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1441         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1442         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1443         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1444         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1445         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1446         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1447         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1448         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1449         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1450         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1451
1452         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1453         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1454         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1455         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1456         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1457         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1458         MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1459 };
1460
1461 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1462 static unsigned num_msrs_to_save;
1463
1464 static const u32 emulated_msrs_all[] = {
1465         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1466         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1467         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1468         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1469         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1470         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1471         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1472         HV_X64_MSR_RESET,
1473         HV_X64_MSR_VP_INDEX,
1474         HV_X64_MSR_VP_RUNTIME,
1475         HV_X64_MSR_SCONTROL,
1476         HV_X64_MSR_STIMER0_CONFIG,
1477         HV_X64_MSR_VP_ASSIST_PAGE,
1478         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1479         HV_X64_MSR_TSC_EMULATION_STATUS,
1480         HV_X64_MSR_SYNDBG_OPTIONS,
1481         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1482         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1483         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1484
1485         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1486         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1487
1488         MSR_IA32_TSC_ADJUST,
1489         MSR_IA32_TSC_DEADLINE,
1490         MSR_IA32_ARCH_CAPABILITIES,
1491         MSR_IA32_PERF_CAPABILITIES,
1492         MSR_IA32_MISC_ENABLE,
1493         MSR_IA32_MCG_STATUS,
1494         MSR_IA32_MCG_CTL,
1495         MSR_IA32_MCG_EXT_CTL,
1496         MSR_IA32_SMBASE,
1497         MSR_SMI_COUNT,
1498         MSR_PLATFORM_INFO,
1499         MSR_MISC_FEATURES_ENABLES,
1500         MSR_AMD64_VIRT_SPEC_CTRL,
1501         MSR_AMD64_TSC_RATIO,
1502         MSR_IA32_POWER_CTL,
1503         MSR_IA32_UCODE_REV,
1504
1505         /*
1506          * The following list leaves out MSRs whose values are determined
1507          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1508          * We always support the "true" VMX control MSRs, even if the host
1509          * processor does not, so I am putting these registers here rather
1510          * than in msrs_to_save_all.
1511          */
1512         MSR_IA32_VMX_BASIC,
1513         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1514         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1515         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1516         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1517         MSR_IA32_VMX_MISC,
1518         MSR_IA32_VMX_CR0_FIXED0,
1519         MSR_IA32_VMX_CR4_FIXED0,
1520         MSR_IA32_VMX_VMCS_ENUM,
1521         MSR_IA32_VMX_PROCBASED_CTLS2,
1522         MSR_IA32_VMX_EPT_VPID_CAP,
1523         MSR_IA32_VMX_VMFUNC,
1524
1525         MSR_K7_HWCR,
1526         MSR_KVM_POLL_CONTROL,
1527 };
1528
1529 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1530 static unsigned num_emulated_msrs;
1531
1532 /*
1533  * List of msr numbers which are used to expose MSR-based features that
1534  * can be used by a hypervisor to validate requested CPU features.
1535  */
1536 static const u32 msr_based_features_all[] = {
1537         MSR_IA32_VMX_BASIC,
1538         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1539         MSR_IA32_VMX_PINBASED_CTLS,
1540         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1541         MSR_IA32_VMX_PROCBASED_CTLS,
1542         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1543         MSR_IA32_VMX_EXIT_CTLS,
1544         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1545         MSR_IA32_VMX_ENTRY_CTLS,
1546         MSR_IA32_VMX_MISC,
1547         MSR_IA32_VMX_CR0_FIXED0,
1548         MSR_IA32_VMX_CR0_FIXED1,
1549         MSR_IA32_VMX_CR4_FIXED0,
1550         MSR_IA32_VMX_CR4_FIXED1,
1551         MSR_IA32_VMX_VMCS_ENUM,
1552         MSR_IA32_VMX_PROCBASED_CTLS2,
1553         MSR_IA32_VMX_EPT_VPID_CAP,
1554         MSR_IA32_VMX_VMFUNC,
1555
1556         MSR_F10H_DECFG,
1557         MSR_IA32_UCODE_REV,
1558         MSR_IA32_ARCH_CAPABILITIES,
1559         MSR_IA32_PERF_CAPABILITIES,
1560 };
1561
1562 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1563 static unsigned int num_msr_based_features;
1564
1565 static u64 kvm_get_arch_capabilities(void)
1566 {
1567         u64 data = 0;
1568
1569         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1570                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1571
1572         /*
1573          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1574          * the nested hypervisor runs with NX huge pages.  If it is not,
1575          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1576          * L1 guests, so it need not worry about its own (L2) guests.
1577          */
1578         data |= ARCH_CAP_PSCHANGE_MC_NO;
1579
1580         /*
1581          * If we're doing cache flushes (either "always" or "cond")
1582          * we will do one whenever the guest does a vmlaunch/vmresume.
1583          * If an outer hypervisor is doing the cache flush for us
1584          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1585          * capability to the guest too, and if EPT is disabled we're not
1586          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1587          * require a nested hypervisor to do a flush of its own.
1588          */
1589         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1590                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1591
1592         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1593                 data |= ARCH_CAP_RDCL_NO;
1594         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1595                 data |= ARCH_CAP_SSB_NO;
1596         if (!boot_cpu_has_bug(X86_BUG_MDS))
1597                 data |= ARCH_CAP_MDS_NO;
1598
1599         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1600                 /*
1601                  * If RTM=0 because the kernel has disabled TSX, the host might
1602                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1603                  * and therefore knows that there cannot be TAA) but keep
1604                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1605                  * and we want to allow migrating those guests to tsx=off hosts.
1606                  */
1607                 data &= ~ARCH_CAP_TAA_NO;
1608         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1609                 data |= ARCH_CAP_TAA_NO;
1610         } else {
1611                 /*
1612                  * Nothing to do here; we emulate TSX_CTRL if present on the
1613                  * host so the guest can choose between disabling TSX or
1614                  * using VERW to clear CPU buffers.
1615                  */
1616         }
1617
1618         return data;
1619 }
1620
1621 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1622 {
1623         switch (msr->index) {
1624         case MSR_IA32_ARCH_CAPABILITIES:
1625                 msr->data = kvm_get_arch_capabilities();
1626                 break;
1627         case MSR_IA32_UCODE_REV:
1628                 rdmsrl_safe(msr->index, &msr->data);
1629                 break;
1630         default:
1631                 return static_call(kvm_x86_get_msr_feature)(msr);
1632         }
1633         return 0;
1634 }
1635
1636 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1637 {
1638         struct kvm_msr_entry msr;
1639         int r;
1640
1641         msr.index = index;
1642         r = kvm_get_msr_feature(&msr);
1643
1644         if (r == KVM_MSR_RET_INVALID) {
1645                 /* Unconditionally clear the output for simplicity */
1646                 *data = 0;
1647                 if (kvm_msr_ignored_check(index, 0, false))
1648                         r = 0;
1649         }
1650
1651         if (r)
1652                 return r;
1653
1654         *data = msr.data;
1655
1656         return 0;
1657 }
1658
1659 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1660 {
1661         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1662                 return false;
1663
1664         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1665                 return false;
1666
1667         if (efer & (EFER_LME | EFER_LMA) &&
1668             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1669                 return false;
1670
1671         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1672                 return false;
1673
1674         return true;
1675
1676 }
1677 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1678 {
1679         if (efer & efer_reserved_bits)
1680                 return false;
1681
1682         return __kvm_valid_efer(vcpu, efer);
1683 }
1684 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1685
1686 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1687 {
1688         u64 old_efer = vcpu->arch.efer;
1689         u64 efer = msr_info->data;
1690         int r;
1691
1692         if (efer & efer_reserved_bits)
1693                 return 1;
1694
1695         if (!msr_info->host_initiated) {
1696                 if (!__kvm_valid_efer(vcpu, efer))
1697                         return 1;
1698
1699                 if (is_paging(vcpu) &&
1700                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1701                         return 1;
1702         }
1703
1704         efer &= ~EFER_LMA;
1705         efer |= vcpu->arch.efer & EFER_LMA;
1706
1707         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1708         if (r) {
1709                 WARN_ON(r > 0);
1710                 return r;
1711         }
1712
1713         if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1714                 kvm_mmu_reset_context(vcpu);
1715
1716         return 0;
1717 }
1718
1719 void kvm_enable_efer_bits(u64 mask)
1720 {
1721        efer_reserved_bits &= ~mask;
1722 }
1723 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1724
1725 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1726 {
1727         struct kvm_x86_msr_filter *msr_filter;
1728         struct msr_bitmap_range *ranges;
1729         struct kvm *kvm = vcpu->kvm;
1730         bool allowed;
1731         int idx;
1732         u32 i;
1733
1734         /* x2APIC MSRs do not support filtering. */
1735         if (index >= 0x800 && index <= 0x8ff)
1736                 return true;
1737
1738         idx = srcu_read_lock(&kvm->srcu);
1739
1740         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1741         if (!msr_filter) {
1742                 allowed = true;
1743                 goto out;
1744         }
1745
1746         allowed = msr_filter->default_allow;
1747         ranges = msr_filter->ranges;
1748
1749         for (i = 0; i < msr_filter->count; i++) {
1750                 u32 start = ranges[i].base;
1751                 u32 end = start + ranges[i].nmsrs;
1752                 u32 flags = ranges[i].flags;
1753                 unsigned long *bitmap = ranges[i].bitmap;
1754
1755                 if ((index >= start) && (index < end) && (flags & type)) {
1756                         allowed = !!test_bit(index - start, bitmap);
1757                         break;
1758                 }
1759         }
1760
1761 out:
1762         srcu_read_unlock(&kvm->srcu, idx);
1763
1764         return allowed;
1765 }
1766 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1767
1768 /*
1769  * Write @data into the MSR specified by @index.  Select MSR specific fault
1770  * checks are bypassed if @host_initiated is %true.
1771  * Returns 0 on success, non-0 otherwise.
1772  * Assumes vcpu_load() was already called.
1773  */
1774 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1775                          bool host_initiated)
1776 {
1777         struct msr_data msr;
1778
1779         switch (index) {
1780         case MSR_FS_BASE:
1781         case MSR_GS_BASE:
1782         case MSR_KERNEL_GS_BASE:
1783         case MSR_CSTAR:
1784         case MSR_LSTAR:
1785                 if (is_noncanonical_address(data, vcpu))
1786                         return 1;
1787                 break;
1788         case MSR_IA32_SYSENTER_EIP:
1789         case MSR_IA32_SYSENTER_ESP:
1790                 /*
1791                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1792                  * non-canonical address is written on Intel but not on
1793                  * AMD (which ignores the top 32-bits, because it does
1794                  * not implement 64-bit SYSENTER).
1795                  *
1796                  * 64-bit code should hence be able to write a non-canonical
1797                  * value on AMD.  Making the address canonical ensures that
1798                  * vmentry does not fail on Intel after writing a non-canonical
1799                  * value, and that something deterministic happens if the guest
1800                  * invokes 64-bit SYSENTER.
1801                  */
1802                 data = __canonical_address(data, vcpu_virt_addr_bits(vcpu));
1803                 break;
1804         case MSR_TSC_AUX:
1805                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1806                         return 1;
1807
1808                 if (!host_initiated &&
1809                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1810                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1811                         return 1;
1812
1813                 /*
1814                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1815                  * incomplete and conflicting architectural behavior.  Current
1816                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1817                  * reserved and always read as zeros.  Enforce Intel's reserved
1818                  * bits check if and only if the guest CPU is Intel, and clear
1819                  * the bits in all other cases.  This ensures cross-vendor
1820                  * migration will provide consistent behavior for the guest.
1821                  */
1822                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1823                         return 1;
1824
1825                 data = (u32)data;
1826                 break;
1827         }
1828
1829         msr.data = data;
1830         msr.index = index;
1831         msr.host_initiated = host_initiated;
1832
1833         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1834 }
1835
1836 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1837                                      u32 index, u64 data, bool host_initiated)
1838 {
1839         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1840
1841         if (ret == KVM_MSR_RET_INVALID)
1842                 if (kvm_msr_ignored_check(index, data, true))
1843                         ret = 0;
1844
1845         return ret;
1846 }
1847
1848 /*
1849  * Read the MSR specified by @index into @data.  Select MSR specific fault
1850  * checks are bypassed if @host_initiated is %true.
1851  * Returns 0 on success, non-0 otherwise.
1852  * Assumes vcpu_load() was already called.
1853  */
1854 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1855                   bool host_initiated)
1856 {
1857         struct msr_data msr;
1858         int ret;
1859
1860         switch (index) {
1861         case MSR_TSC_AUX:
1862                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1863                         return 1;
1864
1865                 if (!host_initiated &&
1866                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1867                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1868                         return 1;
1869                 break;
1870         }
1871
1872         msr.index = index;
1873         msr.host_initiated = host_initiated;
1874
1875         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1876         if (!ret)
1877                 *data = msr.data;
1878         return ret;
1879 }
1880
1881 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1882                                      u32 index, u64 *data, bool host_initiated)
1883 {
1884         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1885
1886         if (ret == KVM_MSR_RET_INVALID) {
1887                 /* Unconditionally clear *data for simplicity */
1888                 *data = 0;
1889                 if (kvm_msr_ignored_check(index, 0, false))
1890                         ret = 0;
1891         }
1892
1893         return ret;
1894 }
1895
1896 static int kvm_get_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1897 {
1898         if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1899                 return KVM_MSR_RET_FILTERED;
1900         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1901 }
1902
1903 static int kvm_set_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 data)
1904 {
1905         if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1906                 return KVM_MSR_RET_FILTERED;
1907         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1908 }
1909
1910 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1911 {
1912         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1913 }
1914 EXPORT_SYMBOL_GPL(kvm_get_msr);
1915
1916 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1917 {
1918         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1919 }
1920 EXPORT_SYMBOL_GPL(kvm_set_msr);
1921
1922 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1923 {
1924         if (!vcpu->run->msr.error) {
1925                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1926                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1927         }
1928 }
1929
1930 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1931 {
1932         return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1933 }
1934
1935 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1936 {
1937         complete_userspace_rdmsr(vcpu);
1938         return complete_emulated_msr_access(vcpu);
1939 }
1940
1941 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1942 {
1943         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1944 }
1945
1946 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1947 {
1948         complete_userspace_rdmsr(vcpu);
1949         return complete_fast_msr_access(vcpu);
1950 }
1951
1952 static u64 kvm_msr_reason(int r)
1953 {
1954         switch (r) {
1955         case KVM_MSR_RET_INVALID:
1956                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1957         case KVM_MSR_RET_FILTERED:
1958                 return KVM_MSR_EXIT_REASON_FILTER;
1959         default:
1960                 return KVM_MSR_EXIT_REASON_INVAL;
1961         }
1962 }
1963
1964 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1965                               u32 exit_reason, u64 data,
1966                               int (*completion)(struct kvm_vcpu *vcpu),
1967                               int r)
1968 {
1969         u64 msr_reason = kvm_msr_reason(r);
1970
1971         /* Check if the user wanted to know about this MSR fault */
1972         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1973                 return 0;
1974
1975         vcpu->run->exit_reason = exit_reason;
1976         vcpu->run->msr.error = 0;
1977         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1978         vcpu->run->msr.reason = msr_reason;
1979         vcpu->run->msr.index = index;
1980         vcpu->run->msr.data = data;
1981         vcpu->arch.complete_userspace_io = completion;
1982
1983         return 1;
1984 }
1985
1986 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1987 {
1988         u32 ecx = kvm_rcx_read(vcpu);
1989         u64 data;
1990         int r;
1991
1992         r = kvm_get_msr_with_filter(vcpu, ecx, &data);
1993
1994         if (!r) {
1995                 trace_kvm_msr_read(ecx, data);
1996
1997                 kvm_rax_write(vcpu, data & -1u);
1998                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1999         } else {
2000                 /* MSR read failed? See if we should ask user space */
2001                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
2002                                        complete_fast_rdmsr, r))
2003                         return 0;
2004                 trace_kvm_msr_read_ex(ecx);
2005         }
2006
2007         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2008 }
2009 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
2010
2011 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
2012 {
2013         u32 ecx = kvm_rcx_read(vcpu);
2014         u64 data = kvm_read_edx_eax(vcpu);
2015         int r;
2016
2017         r = kvm_set_msr_with_filter(vcpu, ecx, data);
2018
2019         if (!r) {
2020                 trace_kvm_msr_write(ecx, data);
2021         } else {
2022                 /* MSR write failed? See if we should ask user space */
2023                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
2024                                        complete_fast_msr_access, r))
2025                         return 0;
2026                 /* Signal all other negative errors to userspace */
2027                 if (r < 0)
2028                         return r;
2029                 trace_kvm_msr_write_ex(ecx, data);
2030         }
2031
2032         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2033 }
2034 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
2035
2036 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
2037 {
2038         return kvm_skip_emulated_instruction(vcpu);
2039 }
2040 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
2041
2042 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
2043 {
2044         /* Treat an INVD instruction as a NOP and just skip it. */
2045         return kvm_emulate_as_nop(vcpu);
2046 }
2047 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
2048
2049 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
2050 {
2051         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
2052         return kvm_emulate_as_nop(vcpu);
2053 }
2054 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
2055
2056 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
2057 {
2058         kvm_queue_exception(vcpu, UD_VECTOR);
2059         return 1;
2060 }
2061 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
2062
2063 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
2064 {
2065         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
2066         return kvm_emulate_as_nop(vcpu);
2067 }
2068 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
2069
2070 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
2071 {
2072         xfer_to_guest_mode_prepare();
2073         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2074                 xfer_to_guest_mode_work_pending();
2075 }
2076
2077 /*
2078  * The fast path for frequent and performance sensitive wrmsr emulation,
2079  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2080  * the latency of virtual IPI by avoiding the expensive bits of transitioning
2081  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2082  * other cases which must be called after interrupts are enabled on the host.
2083  */
2084 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2085 {
2086         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2087                 return 1;
2088
2089         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2090             ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2091             ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2092             ((u32)(data >> 32) != X2APIC_BROADCAST))
2093                 return kvm_x2apic_icr_write(vcpu->arch.apic, data);
2094
2095         return 1;
2096 }
2097
2098 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2099 {
2100         if (!kvm_can_use_hv_timer(vcpu))
2101                 return 1;
2102
2103         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2104         return 0;
2105 }
2106
2107 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2108 {
2109         u32 msr = kvm_rcx_read(vcpu);
2110         u64 data;
2111         fastpath_t ret = EXIT_FASTPATH_NONE;
2112
2113         switch (msr) {
2114         case APIC_BASE_MSR + (APIC_ICR >> 4):
2115                 data = kvm_read_edx_eax(vcpu);
2116                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2117                         kvm_skip_emulated_instruction(vcpu);
2118                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2119                 }
2120                 break;
2121         case MSR_IA32_TSC_DEADLINE:
2122                 data = kvm_read_edx_eax(vcpu);
2123                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2124                         kvm_skip_emulated_instruction(vcpu);
2125                         ret = EXIT_FASTPATH_REENTER_GUEST;
2126                 }
2127                 break;
2128         default:
2129                 break;
2130         }
2131
2132         if (ret != EXIT_FASTPATH_NONE)
2133                 trace_kvm_msr_write(msr, data);
2134
2135         return ret;
2136 }
2137 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2138
2139 /*
2140  * Adapt set_msr() to msr_io()'s calling convention
2141  */
2142 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2143 {
2144         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2145 }
2146
2147 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2148 {
2149         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2150 }
2151
2152 #ifdef CONFIG_X86_64
2153 struct pvclock_clock {
2154         int vclock_mode;
2155         u64 cycle_last;
2156         u64 mask;
2157         u32 mult;
2158         u32 shift;
2159         u64 base_cycles;
2160         u64 offset;
2161 };
2162
2163 struct pvclock_gtod_data {
2164         seqcount_t      seq;
2165
2166         struct pvclock_clock clock; /* extract of a clocksource struct */
2167         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2168
2169         ktime_t         offs_boot;
2170         u64             wall_time_sec;
2171 };
2172
2173 static struct pvclock_gtod_data pvclock_gtod_data;
2174
2175 static void update_pvclock_gtod(struct timekeeper *tk)
2176 {
2177         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2178
2179         write_seqcount_begin(&vdata->seq);
2180
2181         /* copy pvclock gtod data */
2182         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2183         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2184         vdata->clock.mask               = tk->tkr_mono.mask;
2185         vdata->clock.mult               = tk->tkr_mono.mult;
2186         vdata->clock.shift              = tk->tkr_mono.shift;
2187         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2188         vdata->clock.offset             = tk->tkr_mono.base;
2189
2190         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2191         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2192         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2193         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2194         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2195         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2196         vdata->raw_clock.offset         = tk->tkr_raw.base;
2197
2198         vdata->wall_time_sec            = tk->xtime_sec;
2199
2200         vdata->offs_boot                = tk->offs_boot;
2201
2202         write_seqcount_end(&vdata->seq);
2203 }
2204
2205 static s64 get_kvmclock_base_ns(void)
2206 {
2207         /* Count up from boot time, but with the frequency of the raw clock.  */
2208         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2209 }
2210 #else
2211 static s64 get_kvmclock_base_ns(void)
2212 {
2213         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2214         return ktime_get_boottime_ns();
2215 }
2216 #endif
2217
2218 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2219 {
2220         int version;
2221         int r;
2222         struct pvclock_wall_clock wc;
2223         u32 wc_sec_hi;
2224         u64 wall_nsec;
2225
2226         if (!wall_clock)
2227                 return;
2228
2229         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2230         if (r)
2231                 return;
2232
2233         if (version & 1)
2234                 ++version;  /* first time write, random junk */
2235
2236         ++version;
2237
2238         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2239                 return;
2240
2241         /*
2242          * The guest calculates current wall clock time by adding
2243          * system time (updated by kvm_guest_time_update below) to the
2244          * wall clock specified here.  We do the reverse here.
2245          */
2246         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2247
2248         wc.nsec = do_div(wall_nsec, 1000000000);
2249         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2250         wc.version = version;
2251
2252         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2253
2254         if (sec_hi_ofs) {
2255                 wc_sec_hi = wall_nsec >> 32;
2256                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2257                                 &wc_sec_hi, sizeof(wc_sec_hi));
2258         }
2259
2260         version++;
2261         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2262 }
2263
2264 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2265                                   bool old_msr, bool host_initiated)
2266 {
2267         struct kvm_arch *ka = &vcpu->kvm->arch;
2268
2269         if (vcpu->vcpu_id == 0 && !host_initiated) {
2270                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2271                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2272
2273                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2274         }
2275
2276         vcpu->arch.time = system_time;
2277         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2278
2279         /* we verify if the enable bit is set... */
2280         if (system_time & 1) {
2281                 kvm_gfn_to_pfn_cache_init(vcpu->kvm, &vcpu->arch.pv_time, vcpu,
2282                                           KVM_HOST_USES_PFN, system_time & ~1ULL,
2283                                           sizeof(struct pvclock_vcpu_time_info));
2284         } else {
2285                 kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
2286         }
2287
2288         return;
2289 }
2290
2291 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2292 {
2293         do_shl32_div32(dividend, divisor);
2294         return dividend;
2295 }
2296
2297 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2298                                s8 *pshift, u32 *pmultiplier)
2299 {
2300         uint64_t scaled64;
2301         int32_t  shift = 0;
2302         uint64_t tps64;
2303         uint32_t tps32;
2304
2305         tps64 = base_hz;
2306         scaled64 = scaled_hz;
2307         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2308                 tps64 >>= 1;
2309                 shift--;
2310         }
2311
2312         tps32 = (uint32_t)tps64;
2313         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2314                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2315                         scaled64 >>= 1;
2316                 else
2317                         tps32 <<= 1;
2318                 shift++;
2319         }
2320
2321         *pshift = shift;
2322         *pmultiplier = div_frac(scaled64, tps32);
2323 }
2324
2325 #ifdef CONFIG_X86_64
2326 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2327 #endif
2328
2329 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2330 static unsigned long max_tsc_khz;
2331
2332 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2333 {
2334         u64 v = (u64)khz * (1000000 + ppm);
2335         do_div(v, 1000000);
2336         return v;
2337 }
2338
2339 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2340
2341 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2342 {
2343         u64 ratio;
2344
2345         /* Guest TSC same frequency as host TSC? */
2346         if (!scale) {
2347                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2348                 return 0;
2349         }
2350
2351         /* TSC scaling supported? */
2352         if (!kvm_has_tsc_control) {
2353                 if (user_tsc_khz > tsc_khz) {
2354                         vcpu->arch.tsc_catchup = 1;
2355                         vcpu->arch.tsc_always_catchup = 1;
2356                         return 0;
2357                 } else {
2358                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2359                         return -1;
2360                 }
2361         }
2362
2363         /* TSC scaling required  - calculate ratio */
2364         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2365                                 user_tsc_khz, tsc_khz);
2366
2367         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2368                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2369                                     user_tsc_khz);
2370                 return -1;
2371         }
2372
2373         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2374         return 0;
2375 }
2376
2377 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2378 {
2379         u32 thresh_lo, thresh_hi;
2380         int use_scaling = 0;
2381
2382         /* tsc_khz can be zero if TSC calibration fails */
2383         if (user_tsc_khz == 0) {
2384                 /* set tsc_scaling_ratio to a safe value */
2385                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2386                 return -1;
2387         }
2388
2389         /* Compute a scale to convert nanoseconds in TSC cycles */
2390         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2391                            &vcpu->arch.virtual_tsc_shift,
2392                            &vcpu->arch.virtual_tsc_mult);
2393         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2394
2395         /*
2396          * Compute the variation in TSC rate which is acceptable
2397          * within the range of tolerance and decide if the
2398          * rate being applied is within that bounds of the hardware
2399          * rate.  If so, no scaling or compensation need be done.
2400          */
2401         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2402         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2403         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2404                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2405                 use_scaling = 1;
2406         }
2407         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2408 }
2409
2410 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2411 {
2412         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2413                                       vcpu->arch.virtual_tsc_mult,
2414                                       vcpu->arch.virtual_tsc_shift);
2415         tsc += vcpu->arch.this_tsc_write;
2416         return tsc;
2417 }
2418
2419 #ifdef CONFIG_X86_64
2420 static inline int gtod_is_based_on_tsc(int mode)
2421 {
2422         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2423 }
2424 #endif
2425
2426 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2427 {
2428 #ifdef CONFIG_X86_64
2429         bool vcpus_matched;
2430         struct kvm_arch *ka = &vcpu->kvm->arch;
2431         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2432
2433         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2434                          atomic_read(&vcpu->kvm->online_vcpus));
2435
2436         /*
2437          * Once the masterclock is enabled, always perform request in
2438          * order to update it.
2439          *
2440          * In order to enable masterclock, the host clocksource must be TSC
2441          * and the vcpus need to have matched TSCs.  When that happens,
2442          * perform request to enable masterclock.
2443          */
2444         if (ka->use_master_clock ||
2445             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2446                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2447
2448         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2449                             atomic_read(&vcpu->kvm->online_vcpus),
2450                             ka->use_master_clock, gtod->clock.vclock_mode);
2451 #endif
2452 }
2453
2454 /*
2455  * Multiply tsc by a fixed point number represented by ratio.
2456  *
2457  * The most significant 64-N bits (mult) of ratio represent the
2458  * integral part of the fixed point number; the remaining N bits
2459  * (frac) represent the fractional part, ie. ratio represents a fixed
2460  * point number (mult + frac * 2^(-N)).
2461  *
2462  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2463  */
2464 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2465 {
2466         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2467 }
2468
2469 u64 kvm_scale_tsc(u64 tsc, u64 ratio)
2470 {
2471         u64 _tsc = tsc;
2472
2473         if (ratio != kvm_default_tsc_scaling_ratio)
2474                 _tsc = __scale_tsc(ratio, tsc);
2475
2476         return _tsc;
2477 }
2478 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2479
2480 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2481 {
2482         u64 tsc;
2483
2484         tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2485
2486         return target_tsc - tsc;
2487 }
2488
2489 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2490 {
2491         return vcpu->arch.l1_tsc_offset +
2492                 kvm_scale_tsc(host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2493 }
2494 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2495
2496 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2497 {
2498         u64 nested_offset;
2499
2500         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2501                 nested_offset = l1_offset;
2502         else
2503                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2504                                                 kvm_tsc_scaling_ratio_frac_bits);
2505
2506         nested_offset += l2_offset;
2507         return nested_offset;
2508 }
2509 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2510
2511 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2512 {
2513         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2514                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2515                                        kvm_tsc_scaling_ratio_frac_bits);
2516
2517         return l1_multiplier;
2518 }
2519 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2520
2521 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2522 {
2523         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2524                                    vcpu->arch.l1_tsc_offset,
2525                                    l1_offset);
2526
2527         vcpu->arch.l1_tsc_offset = l1_offset;
2528
2529         /*
2530          * If we are here because L1 chose not to trap WRMSR to TSC then
2531          * according to the spec this should set L1's TSC (as opposed to
2532          * setting L1's offset for L2).
2533          */
2534         if (is_guest_mode(vcpu))
2535                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2536                         l1_offset,
2537                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2538                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2539         else
2540                 vcpu->arch.tsc_offset = l1_offset;
2541
2542         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2543 }
2544
2545 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2546 {
2547         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2548
2549         /* Userspace is changing the multiplier while L2 is active */
2550         if (is_guest_mode(vcpu))
2551                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2552                         l1_multiplier,
2553                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2554         else
2555                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2556
2557         if (kvm_has_tsc_control)
2558                 static_call(kvm_x86_write_tsc_multiplier)(
2559                         vcpu, vcpu->arch.tsc_scaling_ratio);
2560 }
2561
2562 static inline bool kvm_check_tsc_unstable(void)
2563 {
2564 #ifdef CONFIG_X86_64
2565         /*
2566          * TSC is marked unstable when we're running on Hyper-V,
2567          * 'TSC page' clocksource is good.
2568          */
2569         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2570                 return false;
2571 #endif
2572         return check_tsc_unstable();
2573 }
2574
2575 /*
2576  * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2577  * offset for the vcpu and tracks the TSC matching generation that the vcpu
2578  * participates in.
2579  */
2580 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2581                                   u64 ns, bool matched)
2582 {
2583         struct kvm *kvm = vcpu->kvm;
2584
2585         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2586
2587         /*
2588          * We also track th most recent recorded KHZ, write and time to
2589          * allow the matching interval to be extended at each write.
2590          */
2591         kvm->arch.last_tsc_nsec = ns;
2592         kvm->arch.last_tsc_write = tsc;
2593         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2594         kvm->arch.last_tsc_offset = offset;
2595
2596         vcpu->arch.last_guest_tsc = tsc;
2597
2598         kvm_vcpu_write_tsc_offset(vcpu, offset);
2599
2600         if (!matched) {
2601                 /*
2602                  * We split periods of matched TSC writes into generations.
2603                  * For each generation, we track the original measured
2604                  * nanosecond time, offset, and write, so if TSCs are in
2605                  * sync, we can match exact offset, and if not, we can match
2606                  * exact software computation in compute_guest_tsc()
2607                  *
2608                  * These values are tracked in kvm->arch.cur_xxx variables.
2609                  */
2610                 kvm->arch.cur_tsc_generation++;
2611                 kvm->arch.cur_tsc_nsec = ns;
2612                 kvm->arch.cur_tsc_write = tsc;
2613                 kvm->arch.cur_tsc_offset = offset;
2614                 kvm->arch.nr_vcpus_matched_tsc = 0;
2615         } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2616                 kvm->arch.nr_vcpus_matched_tsc++;
2617         }
2618
2619         /* Keep track of which generation this VCPU has synchronized to */
2620         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2621         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2622         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2623
2624         kvm_track_tsc_matching(vcpu);
2625 }
2626
2627 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2628 {
2629         struct kvm *kvm = vcpu->kvm;
2630         u64 offset, ns, elapsed;
2631         unsigned long flags;
2632         bool matched = false;
2633         bool synchronizing = false;
2634
2635         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2636         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2637         ns = get_kvmclock_base_ns();
2638         elapsed = ns - kvm->arch.last_tsc_nsec;
2639
2640         if (vcpu->arch.virtual_tsc_khz) {
2641                 if (data == 0) {
2642                         /*
2643                          * detection of vcpu initialization -- need to sync
2644                          * with other vCPUs. This particularly helps to keep
2645                          * kvm_clock stable after CPU hotplug
2646                          */
2647                         synchronizing = true;
2648                 } else {
2649                         u64 tsc_exp = kvm->arch.last_tsc_write +
2650                                                 nsec_to_cycles(vcpu, elapsed);
2651                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2652                         /*
2653                          * Special case: TSC write with a small delta (1 second)
2654                          * of virtual cycle time against real time is
2655                          * interpreted as an attempt to synchronize the CPU.
2656                          */
2657                         synchronizing = data < tsc_exp + tsc_hz &&
2658                                         data + tsc_hz > tsc_exp;
2659                 }
2660         }
2661
2662         /*
2663          * For a reliable TSC, we can match TSC offsets, and for an unstable
2664          * TSC, we add elapsed time in this computation.  We could let the
2665          * compensation code attempt to catch up if we fall behind, but
2666          * it's better to try to match offsets from the beginning.
2667          */
2668         if (synchronizing &&
2669             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2670                 if (!kvm_check_tsc_unstable()) {
2671                         offset = kvm->arch.cur_tsc_offset;
2672                 } else {
2673                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2674                         data += delta;
2675                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2676                 }
2677                 matched = true;
2678         }
2679
2680         __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2681         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2682 }
2683
2684 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2685                                            s64 adjustment)
2686 {
2687         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2688         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2689 }
2690
2691 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2692 {
2693         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2694                 WARN_ON(adjustment < 0);
2695         adjustment = kvm_scale_tsc((u64) adjustment,
2696                                    vcpu->arch.l1_tsc_scaling_ratio);
2697         adjust_tsc_offset_guest(vcpu, adjustment);
2698 }
2699
2700 #ifdef CONFIG_X86_64
2701
2702 static u64 read_tsc(void)
2703 {
2704         u64 ret = (u64)rdtsc_ordered();
2705         u64 last = pvclock_gtod_data.clock.cycle_last;
2706
2707         if (likely(ret >= last))
2708                 return ret;
2709
2710         /*
2711          * GCC likes to generate cmov here, but this branch is extremely
2712          * predictable (it's just a function of time and the likely is
2713          * very likely) and there's a data dependence, so force GCC
2714          * to generate a branch instead.  I don't barrier() because
2715          * we don't actually need a barrier, and if this function
2716          * ever gets inlined it will generate worse code.
2717          */
2718         asm volatile ("");
2719         return last;
2720 }
2721
2722 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2723                           int *mode)
2724 {
2725         long v;
2726         u64 tsc_pg_val;
2727
2728         switch (clock->vclock_mode) {
2729         case VDSO_CLOCKMODE_HVCLOCK:
2730                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2731                                                   tsc_timestamp);
2732                 if (tsc_pg_val != U64_MAX) {
2733                         /* TSC page valid */
2734                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2735                         v = (tsc_pg_val - clock->cycle_last) &
2736                                 clock->mask;
2737                 } else {
2738                         /* TSC page invalid */
2739                         *mode = VDSO_CLOCKMODE_NONE;
2740                 }
2741                 break;
2742         case VDSO_CLOCKMODE_TSC:
2743                 *mode = VDSO_CLOCKMODE_TSC;
2744                 *tsc_timestamp = read_tsc();
2745                 v = (*tsc_timestamp - clock->cycle_last) &
2746                         clock->mask;
2747                 break;
2748         default:
2749                 *mode = VDSO_CLOCKMODE_NONE;
2750         }
2751
2752         if (*mode == VDSO_CLOCKMODE_NONE)
2753                 *tsc_timestamp = v = 0;
2754
2755         return v * clock->mult;
2756 }
2757
2758 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2759 {
2760         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2761         unsigned long seq;
2762         int mode;
2763         u64 ns;
2764
2765         do {
2766                 seq = read_seqcount_begin(&gtod->seq);
2767                 ns = gtod->raw_clock.base_cycles;
2768                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2769                 ns >>= gtod->raw_clock.shift;
2770                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2771         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2772         *t = ns;
2773
2774         return mode;
2775 }
2776
2777 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2778 {
2779         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2780         unsigned long seq;
2781         int mode;
2782         u64 ns;
2783
2784         do {
2785                 seq = read_seqcount_begin(&gtod->seq);
2786                 ts->tv_sec = gtod->wall_time_sec;
2787                 ns = gtod->clock.base_cycles;
2788                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2789                 ns >>= gtod->clock.shift;
2790         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2791
2792         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2793         ts->tv_nsec = ns;
2794
2795         return mode;
2796 }
2797
2798 /* returns true if host is using TSC based clocksource */
2799 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2800 {
2801         /* checked again under seqlock below */
2802         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2803                 return false;
2804
2805         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2806                                                       tsc_timestamp));
2807 }
2808
2809 /* returns true if host is using TSC based clocksource */
2810 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2811                                            u64 *tsc_timestamp)
2812 {
2813         /* checked again under seqlock below */
2814         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2815                 return false;
2816
2817         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2818 }
2819 #endif
2820
2821 /*
2822  *
2823  * Assuming a stable TSC across physical CPUS, and a stable TSC
2824  * across virtual CPUs, the following condition is possible.
2825  * Each numbered line represents an event visible to both
2826  * CPUs at the next numbered event.
2827  *
2828  * "timespecX" represents host monotonic time. "tscX" represents
2829  * RDTSC value.
2830  *
2831  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2832  *
2833  * 1.  read timespec0,tsc0
2834  * 2.                                   | timespec1 = timespec0 + N
2835  *                                      | tsc1 = tsc0 + M
2836  * 3. transition to guest               | transition to guest
2837  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2838  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2839  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2840  *
2841  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2842  *
2843  *      - ret0 < ret1
2844  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2845  *              ...
2846  *      - 0 < N - M => M < N
2847  *
2848  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2849  * always the case (the difference between two distinct xtime instances
2850  * might be smaller then the difference between corresponding TSC reads,
2851  * when updating guest vcpus pvclock areas).
2852  *
2853  * To avoid that problem, do not allow visibility of distinct
2854  * system_timestamp/tsc_timestamp values simultaneously: use a master
2855  * copy of host monotonic time values. Update that master copy
2856  * in lockstep.
2857  *
2858  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2859  *
2860  */
2861
2862 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2863 {
2864 #ifdef CONFIG_X86_64
2865         struct kvm_arch *ka = &kvm->arch;
2866         int vclock_mode;
2867         bool host_tsc_clocksource, vcpus_matched;
2868
2869         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2870         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2871                         atomic_read(&kvm->online_vcpus));
2872
2873         /*
2874          * If the host uses TSC clock, then passthrough TSC as stable
2875          * to the guest.
2876          */
2877         host_tsc_clocksource = kvm_get_time_and_clockread(
2878                                         &ka->master_kernel_ns,
2879                                         &ka->master_cycle_now);
2880
2881         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2882                                 && !ka->backwards_tsc_observed
2883                                 && !ka->boot_vcpu_runs_old_kvmclock;
2884
2885         if (ka->use_master_clock)
2886                 atomic_set(&kvm_guest_has_master_clock, 1);
2887
2888         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2889         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2890                                         vcpus_matched);
2891 #endif
2892 }
2893
2894 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2895 {
2896         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2897 }
2898
2899 static void __kvm_start_pvclock_update(struct kvm *kvm)
2900 {
2901         raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2902         write_seqcount_begin(&kvm->arch.pvclock_sc);
2903 }
2904
2905 static void kvm_start_pvclock_update(struct kvm *kvm)
2906 {
2907         kvm_make_mclock_inprogress_request(kvm);
2908
2909         /* no guest entries from this point */
2910         __kvm_start_pvclock_update(kvm);
2911 }
2912
2913 static void kvm_end_pvclock_update(struct kvm *kvm)
2914 {
2915         struct kvm_arch *ka = &kvm->arch;
2916         struct kvm_vcpu *vcpu;
2917         unsigned long i;
2918
2919         write_seqcount_end(&ka->pvclock_sc);
2920         raw_spin_unlock_irq(&ka->tsc_write_lock);
2921         kvm_for_each_vcpu(i, vcpu, kvm)
2922                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2923
2924         /* guest entries allowed */
2925         kvm_for_each_vcpu(i, vcpu, kvm)
2926                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2927 }
2928
2929 static void kvm_update_masterclock(struct kvm *kvm)
2930 {
2931         kvm_hv_request_tsc_page_update(kvm);
2932         kvm_start_pvclock_update(kvm);
2933         pvclock_update_vm_gtod_copy(kvm);
2934         kvm_end_pvclock_update(kvm);
2935 }
2936
2937 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc.  */
2938 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2939 {
2940         struct kvm_arch *ka = &kvm->arch;
2941         struct pvclock_vcpu_time_info hv_clock;
2942
2943         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2944         get_cpu();
2945
2946         data->flags = 0;
2947         if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2948 #ifdef CONFIG_X86_64
2949                 struct timespec64 ts;
2950
2951                 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2952                         data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2953                         data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2954                 } else
2955 #endif
2956                 data->host_tsc = rdtsc();
2957
2958                 data->flags |= KVM_CLOCK_TSC_STABLE;
2959                 hv_clock.tsc_timestamp = ka->master_cycle_now;
2960                 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2961                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2962                                    &hv_clock.tsc_shift,
2963                                    &hv_clock.tsc_to_system_mul);
2964                 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2965         } else {
2966                 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2967         }
2968
2969         put_cpu();
2970 }
2971
2972 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2973 {
2974         struct kvm_arch *ka = &kvm->arch;
2975         unsigned seq;
2976
2977         do {
2978                 seq = read_seqcount_begin(&ka->pvclock_sc);
2979                 __get_kvmclock(kvm, data);
2980         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2981 }
2982
2983 u64 get_kvmclock_ns(struct kvm *kvm)
2984 {
2985         struct kvm_clock_data data;
2986
2987         get_kvmclock(kvm, &data);
2988         return data.clock;
2989 }
2990
2991 static void kvm_setup_guest_pvclock(struct kvm_vcpu *v,
2992                                     struct gfn_to_pfn_cache *gpc,
2993                                     unsigned int offset)
2994 {
2995         struct kvm_vcpu_arch *vcpu = &v->arch;
2996         struct pvclock_vcpu_time_info *guest_hv_clock;
2997         unsigned long flags;
2998
2999         read_lock_irqsave(&gpc->lock, flags);
3000         while (!kvm_gfn_to_pfn_cache_check(v->kvm, gpc, gpc->gpa,
3001                                            offset + sizeof(*guest_hv_clock))) {
3002                 read_unlock_irqrestore(&gpc->lock, flags);
3003
3004                 if (kvm_gfn_to_pfn_cache_refresh(v->kvm, gpc, gpc->gpa,
3005                                                  offset + sizeof(*guest_hv_clock)))
3006                         return;
3007
3008                 read_lock_irqsave(&gpc->lock, flags);
3009         }
3010
3011         guest_hv_clock = (void *)(gpc->khva + offset);
3012
3013         /*
3014          * This VCPU is paused, but it's legal for a guest to read another
3015          * VCPU's kvmclock, so we really have to follow the specification where
3016          * it says that version is odd if data is being modified, and even after
3017          * it is consistent.
3018          */
3019
3020         guest_hv_clock->version = vcpu->hv_clock.version = (guest_hv_clock->version + 1) | 1;
3021         smp_wmb();
3022
3023         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
3024         vcpu->hv_clock.flags |= (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
3025
3026         if (vcpu->pvclock_set_guest_stopped_request) {
3027                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
3028                 vcpu->pvclock_set_guest_stopped_request = false;
3029         }
3030
3031         memcpy(guest_hv_clock, &vcpu->hv_clock, sizeof(*guest_hv_clock));
3032         smp_wmb();
3033
3034         guest_hv_clock->version = ++vcpu->hv_clock.version;
3035
3036         mark_page_dirty_in_slot(v->kvm, gpc->memslot, gpc->gpa >> PAGE_SHIFT);
3037         read_unlock_irqrestore(&gpc->lock, flags);
3038
3039         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
3040 }
3041
3042 static int kvm_guest_time_update(struct kvm_vcpu *v)
3043 {
3044         unsigned long flags, tgt_tsc_khz;
3045         unsigned seq;
3046         struct kvm_vcpu_arch *vcpu = &v->arch;
3047         struct kvm_arch *ka = &v->kvm->arch;
3048         s64 kernel_ns;
3049         u64 tsc_timestamp, host_tsc;
3050         u8 pvclock_flags;
3051         bool use_master_clock;
3052
3053         kernel_ns = 0;
3054         host_tsc = 0;
3055
3056         /*
3057          * If the host uses TSC clock, then passthrough TSC as stable
3058          * to the guest.
3059          */
3060         do {
3061                 seq = read_seqcount_begin(&ka->pvclock_sc);
3062                 use_master_clock = ka->use_master_clock;
3063                 if (use_master_clock) {
3064                         host_tsc = ka->master_cycle_now;
3065                         kernel_ns = ka->master_kernel_ns;
3066                 }
3067         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3068
3069         /* Keep irq disabled to prevent changes to the clock */
3070         local_irq_save(flags);
3071         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3072         if (unlikely(tgt_tsc_khz == 0)) {
3073                 local_irq_restore(flags);
3074                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3075                 return 1;
3076         }
3077         if (!use_master_clock) {
3078                 host_tsc = rdtsc();
3079                 kernel_ns = get_kvmclock_base_ns();
3080         }
3081
3082         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3083
3084         /*
3085          * We may have to catch up the TSC to match elapsed wall clock
3086          * time for two reasons, even if kvmclock is used.
3087          *   1) CPU could have been running below the maximum TSC rate
3088          *   2) Broken TSC compensation resets the base at each VCPU
3089          *      entry to avoid unknown leaps of TSC even when running
3090          *      again on the same CPU.  This may cause apparent elapsed
3091          *      time to disappear, and the guest to stand still or run
3092          *      very slowly.
3093          */
3094         if (vcpu->tsc_catchup) {
3095                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3096                 if (tsc > tsc_timestamp) {
3097                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3098                         tsc_timestamp = tsc;
3099                 }
3100         }
3101
3102         local_irq_restore(flags);
3103
3104         /* With all the info we got, fill in the values */
3105
3106         if (kvm_has_tsc_control)
3107                 tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz,
3108                                             v->arch.l1_tsc_scaling_ratio);
3109
3110         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3111                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3112                                    &vcpu->hv_clock.tsc_shift,
3113                                    &vcpu->hv_clock.tsc_to_system_mul);
3114                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3115         }
3116
3117         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3118         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3119         vcpu->last_guest_tsc = tsc_timestamp;
3120
3121         /* If the host uses TSC clocksource, then it is stable */
3122         pvclock_flags = 0;
3123         if (use_master_clock)
3124                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3125
3126         vcpu->hv_clock.flags = pvclock_flags;
3127
3128         if (vcpu->pv_time.active)
3129                 kvm_setup_guest_pvclock(v, &vcpu->pv_time, 0);
3130         if (vcpu->xen.vcpu_info_cache.active)
3131                 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_info_cache,
3132                                         offsetof(struct compat_vcpu_info, time));
3133         if (vcpu->xen.vcpu_time_info_cache.active)
3134                 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_time_info_cache, 0);
3135         kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3136         return 0;
3137 }
3138
3139 /*
3140  * kvmclock updates which are isolated to a given vcpu, such as
3141  * vcpu->cpu migration, should not allow system_timestamp from
3142  * the rest of the vcpus to remain static. Otherwise ntp frequency
3143  * correction applies to one vcpu's system_timestamp but not
3144  * the others.
3145  *
3146  * So in those cases, request a kvmclock update for all vcpus.
3147  * We need to rate-limit these requests though, as they can
3148  * considerably slow guests that have a large number of vcpus.
3149  * The time for a remote vcpu to update its kvmclock is bound
3150  * by the delay we use to rate-limit the updates.
3151  */
3152
3153 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3154
3155 static void kvmclock_update_fn(struct work_struct *work)
3156 {
3157         unsigned long i;
3158         struct delayed_work *dwork = to_delayed_work(work);
3159         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3160                                            kvmclock_update_work);
3161         struct kvm *kvm = container_of(ka, struct kvm, arch);
3162         struct kvm_vcpu *vcpu;
3163
3164         kvm_for_each_vcpu(i, vcpu, kvm) {
3165                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3166                 kvm_vcpu_kick(vcpu);
3167         }
3168 }
3169
3170 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3171 {
3172         struct kvm *kvm = v->kvm;
3173
3174         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3175         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3176                                         KVMCLOCK_UPDATE_DELAY);
3177 }
3178
3179 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3180
3181 static void kvmclock_sync_fn(struct work_struct *work)
3182 {
3183         struct delayed_work *dwork = to_delayed_work(work);
3184         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3185                                            kvmclock_sync_work);
3186         struct kvm *kvm = container_of(ka, struct kvm, arch);
3187
3188         if (!kvmclock_periodic_sync)
3189                 return;
3190
3191         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3192         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3193                                         KVMCLOCK_SYNC_PERIOD);
3194 }
3195
3196 /*
3197  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3198  */
3199 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3200 {
3201         /* McStatusWrEn enabled? */
3202         if (guest_cpuid_is_amd_or_hygon(vcpu))
3203                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3204
3205         return false;
3206 }
3207
3208 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3209 {
3210         u64 mcg_cap = vcpu->arch.mcg_cap;
3211         unsigned bank_num = mcg_cap & 0xff;
3212         u32 msr = msr_info->index;
3213         u64 data = msr_info->data;
3214
3215         switch (msr) {
3216         case MSR_IA32_MCG_STATUS:
3217                 vcpu->arch.mcg_status = data;
3218                 break;
3219         case MSR_IA32_MCG_CTL:
3220                 if (!(mcg_cap & MCG_CTL_P) &&
3221                     (data || !msr_info->host_initiated))
3222                         return 1;
3223                 if (data != 0 && data != ~(u64)0)
3224                         return 1;
3225                 vcpu->arch.mcg_ctl = data;
3226                 break;
3227         default:
3228                 if (msr >= MSR_IA32_MC0_CTL &&
3229                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3230                         u32 offset = array_index_nospec(
3231                                 msr - MSR_IA32_MC0_CTL,
3232                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3233
3234                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3235                          * some Linux kernels though clear bit 10 in bank 4 to
3236                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3237                          * this to avoid an uncatched #GP in the guest.
3238                          *
3239                          * UNIXWARE clears bit 0 of MC1_CTL to ignore
3240                          * correctable, single-bit ECC data errors.
3241                          */
3242                         if ((offset & 0x3) == 0 &&
3243                             data != 0 && (data | (1 << 10) | 1) != ~(u64)0)
3244                                 return -1;
3245
3246                         /* MCi_STATUS */
3247                         if (!msr_info->host_initiated &&
3248                             (offset & 0x3) == 1 && data != 0) {
3249                                 if (!can_set_mci_status(vcpu))
3250                                         return -1;
3251                         }
3252
3253                         vcpu->arch.mce_banks[offset] = data;
3254                         break;
3255                 }
3256                 return 1;
3257         }
3258         return 0;
3259 }
3260
3261 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3262 {
3263         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3264
3265         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3266 }
3267
3268 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3269 {
3270         gpa_t gpa = data & ~0x3f;
3271
3272         /* Bits 4:5 are reserved, Should be zero */
3273         if (data & 0x30)
3274                 return 1;
3275
3276         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3277             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3278                 return 1;
3279
3280         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3281             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3282                 return 1;
3283
3284         if (!lapic_in_kernel(vcpu))
3285                 return data ? 1 : 0;
3286
3287         vcpu->arch.apf.msr_en_val = data;
3288
3289         if (!kvm_pv_async_pf_enabled(vcpu)) {
3290                 kvm_clear_async_pf_completion_queue(vcpu);
3291                 kvm_async_pf_hash_reset(vcpu);
3292                 return 0;
3293         }
3294
3295         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3296                                         sizeof(u64)))
3297                 return 1;
3298
3299         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3300         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3301
3302         kvm_async_pf_wakeup_all(vcpu);
3303
3304         return 0;
3305 }
3306
3307 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3308 {
3309         /* Bits 8-63 are reserved */
3310         if (data >> 8)
3311                 return 1;
3312
3313         if (!lapic_in_kernel(vcpu))
3314                 return 1;
3315
3316         vcpu->arch.apf.msr_int_val = data;
3317
3318         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3319
3320         return 0;
3321 }
3322
3323 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3324 {
3325         kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
3326         vcpu->arch.time = 0;
3327 }
3328
3329 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3330 {
3331         ++vcpu->stat.tlb_flush;
3332         static_call(kvm_x86_flush_tlb_all)(vcpu);
3333 }
3334
3335 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3336 {
3337         ++vcpu->stat.tlb_flush;
3338
3339         if (!tdp_enabled) {
3340                 /*
3341                  * A TLB flush on behalf of the guest is equivalent to
3342                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3343                  * a forced sync of the shadow page tables.  Ensure all the
3344                  * roots are synced and the guest TLB in hardware is clean.
3345                  */
3346                 kvm_mmu_sync_roots(vcpu);
3347                 kvm_mmu_sync_prev_roots(vcpu);
3348         }
3349
3350         static_call(kvm_x86_flush_tlb_guest)(vcpu);
3351 }
3352
3353
3354 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3355 {
3356         ++vcpu->stat.tlb_flush;
3357         static_call(kvm_x86_flush_tlb_current)(vcpu);
3358 }
3359
3360 /*
3361  * Service "local" TLB flush requests, which are specific to the current MMU
3362  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3363  * TLB flushes that are targeted at an MMU context also need to be serviced
3364  * prior before nested VM-Enter/VM-Exit.
3365  */
3366 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3367 {
3368         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3369                 kvm_vcpu_flush_tlb_current(vcpu);
3370
3371         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3372                 kvm_vcpu_flush_tlb_guest(vcpu);
3373 }
3374 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3375
3376 static void record_steal_time(struct kvm_vcpu *vcpu)
3377 {
3378         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3379         struct kvm_steal_time __user *st;
3380         struct kvm_memslots *slots;
3381         u64 steal;
3382         u32 version;
3383
3384         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3385                 kvm_xen_runstate_set_running(vcpu);
3386                 return;
3387         }
3388
3389         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3390                 return;
3391
3392         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3393                 return;
3394
3395         slots = kvm_memslots(vcpu->kvm);
3396
3397         if (unlikely(slots->generation != ghc->generation ||
3398                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3399                 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3400
3401                 /* We rely on the fact that it fits in a single page. */
3402                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3403
3404                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3405                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3406                         return;
3407         }
3408
3409         st = (struct kvm_steal_time __user *)ghc->hva;
3410         /*
3411          * Doing a TLB flush here, on the guest's behalf, can avoid
3412          * expensive IPIs.
3413          */
3414         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3415                 u8 st_preempted = 0;
3416                 int err = -EFAULT;
3417
3418                 if (!user_access_begin(st, sizeof(*st)))
3419                         return;
3420
3421                 asm volatile("1: xchgb %0, %2\n"
3422                              "xor %1, %1\n"
3423                              "2:\n"
3424                              _ASM_EXTABLE_UA(1b, 2b)
3425                              : "+q" (st_preempted),
3426                                "+&r" (err),
3427                                "+m" (st->preempted));
3428                 if (err)
3429                         goto out;
3430
3431                 user_access_end();
3432
3433                 vcpu->arch.st.preempted = 0;
3434
3435                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3436                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3437                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3438                         kvm_vcpu_flush_tlb_guest(vcpu);
3439
3440                 if (!user_access_begin(st, sizeof(*st)))
3441                         goto dirty;
3442         } else {
3443                 if (!user_access_begin(st, sizeof(*st)))
3444                         return;
3445
3446                 unsafe_put_user(0, &st->preempted, out);
3447                 vcpu->arch.st.preempted = 0;
3448         }
3449
3450         unsafe_get_user(version, &st->version, out);
3451         if (version & 1)
3452                 version += 1;  /* first time write, random junk */
3453
3454         version += 1;
3455         unsafe_put_user(version, &st->version, out);
3456
3457         smp_wmb();
3458
3459         unsafe_get_user(steal, &st->steal, out);
3460         steal += current->sched_info.run_delay -
3461                 vcpu->arch.st.last_steal;
3462         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3463         unsafe_put_user(steal, &st->steal, out);
3464
3465         version += 1;
3466         unsafe_put_user(version, &st->version, out);
3467
3468  out:
3469         user_access_end();
3470  dirty:
3471         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3472 }
3473
3474 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3475 {
3476         bool pr = false;
3477         u32 msr = msr_info->index;
3478         u64 data = msr_info->data;
3479
3480         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3481                 return kvm_xen_write_hypercall_page(vcpu, data);
3482
3483         switch (msr) {
3484         case MSR_AMD64_NB_CFG:
3485         case MSR_IA32_UCODE_WRITE:
3486         case MSR_VM_HSAVE_PA:
3487         case MSR_AMD64_PATCH_LOADER:
3488         case MSR_AMD64_BU_CFG2:
3489         case MSR_AMD64_DC_CFG:
3490         case MSR_F15H_EX_CFG:
3491                 break;
3492
3493         case MSR_IA32_UCODE_REV:
3494                 if (msr_info->host_initiated)
3495                         vcpu->arch.microcode_version = data;
3496                 break;
3497         case MSR_IA32_ARCH_CAPABILITIES:
3498                 if (!msr_info->host_initiated)
3499                         return 1;
3500                 vcpu->arch.arch_capabilities = data;
3501                 break;
3502         case MSR_IA32_PERF_CAPABILITIES: {
3503                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3504
3505                 if (!msr_info->host_initiated)
3506                         return 1;
3507                 if (kvm_get_msr_feature(&msr_ent))
3508                         return 1;
3509                 if (data & ~msr_ent.data)
3510                         return 1;
3511
3512                 vcpu->arch.perf_capabilities = data;
3513
3514                 return 0;
3515                 }
3516         case MSR_EFER:
3517                 return set_efer(vcpu, msr_info);
3518         case MSR_K7_HWCR:
3519                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3520                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3521                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3522
3523                 /* Handle McStatusWrEn */
3524                 if (data == BIT_ULL(18)) {
3525                         vcpu->arch.msr_hwcr = data;
3526                 } else if (data != 0) {
3527                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3528                                     data);
3529                         return 1;
3530                 }
3531                 break;
3532         case MSR_FAM10H_MMIO_CONF_BASE:
3533                 if (data != 0) {
3534                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3535                                     "0x%llx\n", data);
3536                         return 1;
3537                 }
3538                 break;
3539         case 0x200 ... 0x2ff:
3540                 return kvm_mtrr_set_msr(vcpu, msr, data);
3541         case MSR_IA32_APICBASE:
3542                 return kvm_set_apic_base(vcpu, msr_info);
3543         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3544                 return kvm_x2apic_msr_write(vcpu, msr, data);
3545         case MSR_IA32_TSC_DEADLINE:
3546                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3547                 break;
3548         case MSR_IA32_TSC_ADJUST:
3549                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3550                         if (!msr_info->host_initiated) {
3551                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3552                                 adjust_tsc_offset_guest(vcpu, adj);
3553                                 /* Before back to guest, tsc_timestamp must be adjusted
3554                                  * as well, otherwise guest's percpu pvclock time could jump.
3555                                  */
3556                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3557                         }
3558                         vcpu->arch.ia32_tsc_adjust_msr = data;
3559                 }
3560                 break;
3561         case MSR_IA32_MISC_ENABLE:
3562                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3563                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3564                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3565                                 return 1;
3566                         vcpu->arch.ia32_misc_enable_msr = data;
3567                         kvm_update_cpuid_runtime(vcpu);
3568                 } else {
3569                         vcpu->arch.ia32_misc_enable_msr = data;
3570                 }
3571                 break;
3572         case MSR_IA32_SMBASE:
3573                 if (!msr_info->host_initiated)
3574                         return 1;
3575                 vcpu->arch.smbase = data;
3576                 break;
3577         case MSR_IA32_POWER_CTL:
3578                 vcpu->arch.msr_ia32_power_ctl = data;
3579                 break;
3580         case MSR_IA32_TSC:
3581                 if (msr_info->host_initiated) {
3582                         kvm_synchronize_tsc(vcpu, data);
3583                 } else {
3584                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3585                         adjust_tsc_offset_guest(vcpu, adj);
3586                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3587                 }
3588                 break;
3589         case MSR_IA32_XSS:
3590                 if (!msr_info->host_initiated &&
3591                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3592                         return 1;
3593                 /*
3594                  * KVM supports exposing PT to the guest, but does not support
3595                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3596                  * XSAVES/XRSTORS to save/restore PT MSRs.
3597                  */
3598                 if (data & ~supported_xss)
3599                         return 1;
3600                 vcpu->arch.ia32_xss = data;
3601                 kvm_update_cpuid_runtime(vcpu);
3602                 break;
3603         case MSR_SMI_COUNT:
3604                 if (!msr_info->host_initiated)
3605                         return 1;
3606                 vcpu->arch.smi_count = data;
3607                 break;
3608         case MSR_KVM_WALL_CLOCK_NEW:
3609                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3610                         return 1;
3611
3612                 vcpu->kvm->arch.wall_clock = data;
3613                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3614                 break;
3615         case MSR_KVM_WALL_CLOCK:
3616                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3617                         return 1;
3618
3619                 vcpu->kvm->arch.wall_clock = data;
3620                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3621                 break;
3622         case MSR_KVM_SYSTEM_TIME_NEW:
3623                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3624                         return 1;
3625
3626                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3627                 break;
3628         case MSR_KVM_SYSTEM_TIME:
3629                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3630                         return 1;
3631
3632                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3633                 break;
3634         case MSR_KVM_ASYNC_PF_EN:
3635                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3636                         return 1;
3637
3638                 if (kvm_pv_enable_async_pf(vcpu, data))
3639                         return 1;
3640                 break;
3641         case MSR_KVM_ASYNC_PF_INT:
3642                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3643                         return 1;
3644
3645                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3646                         return 1;
3647                 break;
3648         case MSR_KVM_ASYNC_PF_ACK:
3649                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3650                         return 1;
3651                 if (data & 0x1) {
3652                         vcpu->arch.apf.pageready_pending = false;
3653                         kvm_check_async_pf_completion(vcpu);
3654                 }
3655                 break;
3656         case MSR_KVM_STEAL_TIME:
3657                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3658                         return 1;
3659
3660                 if (unlikely(!sched_info_on()))
3661                         return 1;
3662
3663                 if (data & KVM_STEAL_RESERVED_MASK)
3664                         return 1;
3665
3666                 vcpu->arch.st.msr_val = data;
3667
3668                 if (!(data & KVM_MSR_ENABLED))
3669                         break;
3670
3671                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3672
3673                 break;
3674         case MSR_KVM_PV_EOI_EN:
3675                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3676                         return 1;
3677
3678                 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3679                         return 1;
3680                 break;
3681
3682         case MSR_KVM_POLL_CONTROL:
3683                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3684                         return 1;
3685
3686                 /* only enable bit supported */
3687                 if (data & (-1ULL << 1))
3688                         return 1;
3689
3690                 vcpu->arch.msr_kvm_poll_control = data;
3691                 break;
3692
3693         case MSR_IA32_MCG_CTL:
3694         case MSR_IA32_MCG_STATUS:
3695         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3696                 return set_msr_mce(vcpu, msr_info);
3697
3698         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3699         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3700                 pr = true;
3701                 fallthrough;
3702         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3703         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3704                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3705                         return kvm_pmu_set_msr(vcpu, msr_info);
3706
3707                 if (pr || data != 0)
3708                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3709                                     "0x%x data 0x%llx\n", msr, data);
3710                 break;
3711         case MSR_K7_CLK_CTL:
3712                 /*
3713                  * Ignore all writes to this no longer documented MSR.
3714                  * Writes are only relevant for old K7 processors,
3715                  * all pre-dating SVM, but a recommended workaround from
3716                  * AMD for these chips. It is possible to specify the
3717                  * affected processor models on the command line, hence
3718                  * the need to ignore the workaround.
3719                  */
3720                 break;
3721         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3722         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3723         case HV_X64_MSR_SYNDBG_OPTIONS:
3724         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3725         case HV_X64_MSR_CRASH_CTL:
3726         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3727         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3728         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3729         case HV_X64_MSR_TSC_EMULATION_STATUS:
3730                 return kvm_hv_set_msr_common(vcpu, msr, data,
3731                                              msr_info->host_initiated);
3732         case MSR_IA32_BBL_CR_CTL3:
3733                 /* Drop writes to this legacy MSR -- see rdmsr
3734                  * counterpart for further detail.
3735                  */
3736                 if (report_ignored_msrs)
3737                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3738                                 msr, data);
3739                 break;
3740         case MSR_AMD64_OSVW_ID_LENGTH:
3741                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3742                         return 1;
3743                 vcpu->arch.osvw.length = data;
3744                 break;
3745         case MSR_AMD64_OSVW_STATUS:
3746                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3747                         return 1;
3748                 vcpu->arch.osvw.status = data;
3749                 break;
3750         case MSR_PLATFORM_INFO:
3751                 if (!msr_info->host_initiated ||
3752                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3753                      cpuid_fault_enabled(vcpu)))
3754                         return 1;
3755                 vcpu->arch.msr_platform_info = data;
3756                 break;
3757         case MSR_MISC_FEATURES_ENABLES:
3758                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3759                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3760                      !supports_cpuid_fault(vcpu)))
3761                         return 1;
3762                 vcpu->arch.msr_misc_features_enables = data;
3763                 break;
3764 #ifdef CONFIG_X86_64
3765         case MSR_IA32_XFD:
3766                 if (!msr_info->host_initiated &&
3767                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3768                         return 1;
3769
3770                 if (data & ~kvm_guest_supported_xfd(vcpu))
3771                         return 1;
3772
3773                 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3774                 break;
3775         case MSR_IA32_XFD_ERR:
3776                 if (!msr_info->host_initiated &&
3777                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3778                         return 1;
3779
3780                 if (data & ~kvm_guest_supported_xfd(vcpu))
3781                         return 1;
3782
3783                 vcpu->arch.guest_fpu.xfd_err = data;
3784                 break;
3785 #endif
3786         default:
3787                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3788                         return kvm_pmu_set_msr(vcpu, msr_info);
3789                 return KVM_MSR_RET_INVALID;
3790         }
3791         return 0;
3792 }
3793 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3794
3795 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3796 {
3797         u64 data;
3798         u64 mcg_cap = vcpu->arch.mcg_cap;
3799         unsigned bank_num = mcg_cap & 0xff;
3800
3801         switch (msr) {
3802         case MSR_IA32_P5_MC_ADDR:
3803         case MSR_IA32_P5_MC_TYPE:
3804                 data = 0;
3805                 break;
3806         case MSR_IA32_MCG_CAP:
3807                 data = vcpu->arch.mcg_cap;
3808                 break;
3809         case MSR_IA32_MCG_CTL:
3810                 if (!(mcg_cap & MCG_CTL_P) && !host)
3811                         return 1;
3812                 data = vcpu->arch.mcg_ctl;
3813                 break;
3814         case MSR_IA32_MCG_STATUS:
3815                 data = vcpu->arch.mcg_status;
3816                 break;
3817         default:
3818                 if (msr >= MSR_IA32_MC0_CTL &&
3819                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3820                         u32 offset = array_index_nospec(
3821                                 msr - MSR_IA32_MC0_CTL,
3822                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3823
3824                         data = vcpu->arch.mce_banks[offset];
3825                         break;
3826                 }
3827                 return 1;
3828         }
3829         *pdata = data;
3830         return 0;
3831 }
3832
3833 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3834 {
3835         switch (msr_info->index) {
3836         case MSR_IA32_PLATFORM_ID:
3837         case MSR_IA32_EBL_CR_POWERON:
3838         case MSR_IA32_LASTBRANCHFROMIP:
3839         case MSR_IA32_LASTBRANCHTOIP:
3840         case MSR_IA32_LASTINTFROMIP:
3841         case MSR_IA32_LASTINTTOIP:
3842         case MSR_AMD64_SYSCFG:
3843         case MSR_K8_TSEG_ADDR:
3844         case MSR_K8_TSEG_MASK:
3845         case MSR_VM_HSAVE_PA:
3846         case MSR_K8_INT_PENDING_MSG:
3847         case MSR_AMD64_NB_CFG:
3848         case MSR_FAM10H_MMIO_CONF_BASE:
3849         case MSR_AMD64_BU_CFG2:
3850         case MSR_IA32_PERF_CTL:
3851         case MSR_AMD64_DC_CFG:
3852         case MSR_F15H_EX_CFG:
3853         /*
3854          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3855          * limit) MSRs. Just return 0, as we do not want to expose the host
3856          * data here. Do not conditionalize this on CPUID, as KVM does not do
3857          * so for existing CPU-specific MSRs.
3858          */
3859         case MSR_RAPL_POWER_UNIT:
3860         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3861         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3862         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3863         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3864                 msr_info->data = 0;
3865                 break;
3866         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3867                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3868                         return kvm_pmu_get_msr(vcpu, msr_info);
3869                 if (!msr_info->host_initiated)
3870                         return 1;
3871                 msr_info->data = 0;
3872                 break;
3873         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3874         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3875         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3876         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3877                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3878                         return kvm_pmu_get_msr(vcpu, msr_info);
3879                 msr_info->data = 0;
3880                 break;
3881         case MSR_IA32_UCODE_REV:
3882                 msr_info->data = vcpu->arch.microcode_version;
3883                 break;
3884         case MSR_IA32_ARCH_CAPABILITIES:
3885                 if (!msr_info->host_initiated &&
3886                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3887                         return 1;
3888                 msr_info->data = vcpu->arch.arch_capabilities;
3889                 break;
3890         case MSR_IA32_PERF_CAPABILITIES:
3891                 if (!msr_info->host_initiated &&
3892                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3893                         return 1;
3894                 msr_info->data = vcpu->arch.perf_capabilities;
3895                 break;
3896         case MSR_IA32_POWER_CTL:
3897                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3898                 break;
3899         case MSR_IA32_TSC: {
3900                 /*
3901                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3902                  * even when not intercepted. AMD manual doesn't explicitly
3903                  * state this but appears to behave the same.
3904                  *
3905                  * On userspace reads and writes, however, we unconditionally
3906                  * return L1's TSC value to ensure backwards-compatible
3907                  * behavior for migration.
3908                  */
3909                 u64 offset, ratio;
3910
3911                 if (msr_info->host_initiated) {
3912                         offset = vcpu->arch.l1_tsc_offset;
3913                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3914                 } else {
3915                         offset = vcpu->arch.tsc_offset;
3916                         ratio = vcpu->arch.tsc_scaling_ratio;
3917                 }
3918
3919                 msr_info->data = kvm_scale_tsc(rdtsc(), ratio) + offset;
3920                 break;
3921         }
3922         case MSR_MTRRcap:
3923         case 0x200 ... 0x2ff:
3924                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3925         case 0xcd: /* fsb frequency */
3926                 msr_info->data = 3;
3927                 break;
3928                 /*
3929                  * MSR_EBC_FREQUENCY_ID
3930                  * Conservative value valid for even the basic CPU models.
3931                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3932                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3933                  * and 266MHz for model 3, or 4. Set Core Clock
3934                  * Frequency to System Bus Frequency Ratio to 1 (bits
3935                  * 31:24) even though these are only valid for CPU
3936                  * models > 2, however guests may end up dividing or
3937                  * multiplying by zero otherwise.
3938                  */
3939         case MSR_EBC_FREQUENCY_ID:
3940                 msr_info->data = 1 << 24;
3941                 break;
3942         case MSR_IA32_APICBASE:
3943                 msr_info->data = kvm_get_apic_base(vcpu);
3944                 break;
3945         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3946                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3947         case MSR_IA32_TSC_DEADLINE:
3948                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3949                 break;
3950         case MSR_IA32_TSC_ADJUST:
3951                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3952                 break;
3953         case MSR_IA32_MISC_ENABLE:
3954                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3955                 break;
3956         case MSR_IA32_SMBASE:
3957                 if (!msr_info->host_initiated)
3958                         return 1;
3959                 msr_info->data = vcpu->arch.smbase;
3960                 break;
3961         case MSR_SMI_COUNT:
3962                 msr_info->data = vcpu->arch.smi_count;
3963                 break;
3964         case MSR_IA32_PERF_STATUS:
3965                 /* TSC increment by tick */
3966                 msr_info->data = 1000ULL;
3967                 /* CPU multiplier */
3968                 msr_info->data |= (((uint64_t)4ULL) << 40);
3969                 break;
3970         case MSR_EFER:
3971                 msr_info->data = vcpu->arch.efer;
3972                 break;
3973         case MSR_KVM_WALL_CLOCK:
3974                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3975                         return 1;
3976
3977                 msr_info->data = vcpu->kvm->arch.wall_clock;
3978                 break;
3979         case MSR_KVM_WALL_CLOCK_NEW:
3980                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3981                         return 1;
3982
3983                 msr_info->data = vcpu->kvm->arch.wall_clock;
3984                 break;
3985         case MSR_KVM_SYSTEM_TIME:
3986                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3987                         return 1;
3988
3989                 msr_info->data = vcpu->arch.time;
3990                 break;
3991         case MSR_KVM_SYSTEM_TIME_NEW:
3992                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3993                         return 1;
3994
3995                 msr_info->data = vcpu->arch.time;
3996                 break;
3997         case MSR_KVM_ASYNC_PF_EN:
3998                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3999                         return 1;
4000
4001                 msr_info->data = vcpu->arch.apf.msr_en_val;
4002                 break;
4003         case MSR_KVM_ASYNC_PF_INT:
4004                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4005                         return 1;
4006
4007                 msr_info->data = vcpu->arch.apf.msr_int_val;
4008                 break;
4009         case MSR_KVM_ASYNC_PF_ACK:
4010                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4011                         return 1;
4012
4013                 msr_info->data = 0;
4014                 break;
4015         case MSR_KVM_STEAL_TIME:
4016                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
4017                         return 1;
4018
4019                 msr_info->data = vcpu->arch.st.msr_val;
4020                 break;
4021         case MSR_KVM_PV_EOI_EN:
4022                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
4023                         return 1;
4024
4025                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
4026                 break;
4027         case MSR_KVM_POLL_CONTROL:
4028                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
4029                         return 1;
4030
4031                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
4032                 break;
4033         case MSR_IA32_P5_MC_ADDR:
4034         case MSR_IA32_P5_MC_TYPE:
4035         case MSR_IA32_MCG_CAP:
4036         case MSR_IA32_MCG_CTL:
4037         case MSR_IA32_MCG_STATUS:
4038         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
4039                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
4040                                    msr_info->host_initiated);
4041         case MSR_IA32_XSS:
4042                 if (!msr_info->host_initiated &&
4043                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
4044                         return 1;
4045                 msr_info->data = vcpu->arch.ia32_xss;
4046                 break;
4047         case MSR_K7_CLK_CTL:
4048                 /*
4049                  * Provide expected ramp-up count for K7. All other
4050                  * are set to zero, indicating minimum divisors for
4051                  * every field.
4052                  *
4053                  * This prevents guest kernels on AMD host with CPU
4054                  * type 6, model 8 and higher from exploding due to
4055                  * the rdmsr failing.
4056                  */
4057                 msr_info->data = 0x20000000;
4058                 break;
4059         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
4060         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4061         case HV_X64_MSR_SYNDBG_OPTIONS:
4062         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4063         case HV_X64_MSR_CRASH_CTL:
4064         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4065         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4066         case HV_X64_MSR_TSC_EMULATION_CONTROL:
4067         case HV_X64_MSR_TSC_EMULATION_STATUS:
4068                 return kvm_hv_get_msr_common(vcpu,
4069                                              msr_info->index, &msr_info->data,
4070                                              msr_info->host_initiated);
4071         case MSR_IA32_BBL_CR_CTL3:
4072                 /* This legacy MSR exists but isn't fully documented in current
4073                  * silicon.  It is however accessed by winxp in very narrow
4074                  * scenarios where it sets bit #19, itself documented as
4075                  * a "reserved" bit.  Best effort attempt to source coherent
4076                  * read data here should the balance of the register be
4077                  * interpreted by the guest:
4078                  *
4079                  * L2 cache control register 3: 64GB range, 256KB size,
4080                  * enabled, latency 0x1, configured
4081                  */
4082                 msr_info->data = 0xbe702111;
4083                 break;
4084         case MSR_AMD64_OSVW_ID_LENGTH:
4085                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4086                         return 1;
4087                 msr_info->data = vcpu->arch.osvw.length;
4088                 break;
4089         case MSR_AMD64_OSVW_STATUS:
4090                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4091                         return 1;
4092                 msr_info->data = vcpu->arch.osvw.status;
4093                 break;
4094         case MSR_PLATFORM_INFO:
4095                 if (!msr_info->host_initiated &&
4096                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4097                         return 1;
4098                 msr_info->data = vcpu->arch.msr_platform_info;
4099                 break;
4100         case MSR_MISC_FEATURES_ENABLES:
4101                 msr_info->data = vcpu->arch.msr_misc_features_enables;
4102                 break;
4103         case MSR_K7_HWCR:
4104                 msr_info->data = vcpu->arch.msr_hwcr;
4105                 break;
4106 #ifdef CONFIG_X86_64
4107         case MSR_IA32_XFD:
4108                 if (!msr_info->host_initiated &&
4109                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4110                         return 1;
4111
4112                 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4113                 break;
4114         case MSR_IA32_XFD_ERR:
4115                 if (!msr_info->host_initiated &&
4116                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4117                         return 1;
4118
4119                 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4120                 break;
4121 #endif
4122         default:
4123                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4124                         return kvm_pmu_get_msr(vcpu, msr_info);
4125                 return KVM_MSR_RET_INVALID;
4126         }
4127         return 0;
4128 }
4129 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4130
4131 /*
4132  * Read or write a bunch of msrs. All parameters are kernel addresses.
4133  *
4134  * @return number of msrs set successfully.
4135  */
4136 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4137                     struct kvm_msr_entry *entries,
4138                     int (*do_msr)(struct kvm_vcpu *vcpu,
4139                                   unsigned index, u64 *data))
4140 {
4141         int i;
4142
4143         for (i = 0; i < msrs->nmsrs; ++i)
4144                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4145                         break;
4146
4147         return i;
4148 }
4149
4150 /*
4151  * Read or write a bunch of msrs. Parameters are user addresses.
4152  *
4153  * @return number of msrs set successfully.
4154  */
4155 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4156                   int (*do_msr)(struct kvm_vcpu *vcpu,
4157                                 unsigned index, u64 *data),
4158                   int writeback)
4159 {
4160         struct kvm_msrs msrs;
4161         struct kvm_msr_entry *entries;
4162         int r, n;
4163         unsigned size;
4164
4165         r = -EFAULT;
4166         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4167                 goto out;
4168
4169         r = -E2BIG;
4170         if (msrs.nmsrs >= MAX_IO_MSRS)
4171                 goto out;
4172
4173         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4174         entries = memdup_user(user_msrs->entries, size);
4175         if (IS_ERR(entries)) {
4176                 r = PTR_ERR(entries);
4177                 goto out;
4178         }
4179
4180         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4181         if (r < 0)
4182                 goto out_free;
4183
4184         r = -EFAULT;
4185         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4186                 goto out_free;
4187
4188         r = n;
4189
4190 out_free:
4191         kfree(entries);
4192 out:
4193         return r;
4194 }
4195
4196 static inline bool kvm_can_mwait_in_guest(void)
4197 {
4198         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4199                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4200                 boot_cpu_has(X86_FEATURE_ARAT);
4201 }
4202
4203 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4204                                             struct kvm_cpuid2 __user *cpuid_arg)
4205 {
4206         struct kvm_cpuid2 cpuid;
4207         int r;
4208
4209         r = -EFAULT;
4210         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4211                 return r;
4212
4213         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4214         if (r)
4215                 return r;
4216
4217         r = -EFAULT;
4218         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4219                 return r;
4220
4221         return 0;
4222 }
4223
4224 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4225 {
4226         int r = 0;
4227
4228         switch (ext) {
4229         case KVM_CAP_IRQCHIP:
4230         case KVM_CAP_HLT:
4231         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4232         case KVM_CAP_SET_TSS_ADDR:
4233         case KVM_CAP_EXT_CPUID:
4234         case KVM_CAP_EXT_EMUL_CPUID:
4235         case KVM_CAP_CLOCKSOURCE:
4236         case KVM_CAP_PIT:
4237         case KVM_CAP_NOP_IO_DELAY:
4238         case KVM_CAP_MP_STATE:
4239         case KVM_CAP_SYNC_MMU:
4240         case KVM_CAP_USER_NMI:
4241         case KVM_CAP_REINJECT_CONTROL:
4242         case KVM_CAP_IRQ_INJECT_STATUS:
4243         case KVM_CAP_IOEVENTFD:
4244         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4245         case KVM_CAP_PIT2:
4246         case KVM_CAP_PIT_STATE2:
4247         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4248         case KVM_CAP_VCPU_EVENTS:
4249         case KVM_CAP_HYPERV:
4250         case KVM_CAP_HYPERV_VAPIC:
4251         case KVM_CAP_HYPERV_SPIN:
4252         case KVM_CAP_HYPERV_SYNIC:
4253         case KVM_CAP_HYPERV_SYNIC2:
4254         case KVM_CAP_HYPERV_VP_INDEX:
4255         case KVM_CAP_HYPERV_EVENTFD:
4256         case KVM_CAP_HYPERV_TLBFLUSH:
4257         case KVM_CAP_HYPERV_SEND_IPI:
4258         case KVM_CAP_HYPERV_CPUID:
4259         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4260         case KVM_CAP_SYS_HYPERV_CPUID:
4261         case KVM_CAP_PCI_SEGMENT:
4262         case KVM_CAP_DEBUGREGS:
4263         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4264         case KVM_CAP_XSAVE:
4265         case KVM_CAP_ASYNC_PF:
4266         case KVM_CAP_ASYNC_PF_INT:
4267         case KVM_CAP_GET_TSC_KHZ:
4268         case KVM_CAP_KVMCLOCK_CTRL:
4269         case KVM_CAP_READONLY_MEM:
4270         case KVM_CAP_HYPERV_TIME:
4271         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4272         case KVM_CAP_TSC_DEADLINE_TIMER:
4273         case KVM_CAP_DISABLE_QUIRKS:
4274         case KVM_CAP_SET_BOOT_CPU_ID:
4275         case KVM_CAP_SPLIT_IRQCHIP:
4276         case KVM_CAP_IMMEDIATE_EXIT:
4277         case KVM_CAP_PMU_EVENT_FILTER:
4278         case KVM_CAP_GET_MSR_FEATURES:
4279         case KVM_CAP_MSR_PLATFORM_INFO:
4280         case KVM_CAP_EXCEPTION_PAYLOAD:
4281         case KVM_CAP_SET_GUEST_DEBUG:
4282         case KVM_CAP_LAST_CPU:
4283         case KVM_CAP_X86_USER_SPACE_MSR:
4284         case KVM_CAP_X86_MSR_FILTER:
4285         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4286 #ifdef CONFIG_X86_SGX_KVM
4287         case KVM_CAP_SGX_ATTRIBUTE:
4288 #endif
4289         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4290         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4291         case KVM_CAP_SREGS2:
4292         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4293         case KVM_CAP_VCPU_ATTRIBUTES:
4294         case KVM_CAP_SYS_ATTRIBUTES:
4295         case KVM_CAP_VAPIC:
4296         case KVM_CAP_ENABLE_CAP:
4297                 r = 1;
4298                 break;
4299         case KVM_CAP_EXIT_HYPERCALL:
4300                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4301                 break;
4302         case KVM_CAP_SET_GUEST_DEBUG2:
4303                 return KVM_GUESTDBG_VALID_MASK;
4304 #ifdef CONFIG_KVM_XEN
4305         case KVM_CAP_XEN_HVM:
4306                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4307                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4308                     KVM_XEN_HVM_CONFIG_SHARED_INFO |
4309                     KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL |
4310                     KVM_XEN_HVM_CONFIG_EVTCHN_SEND;
4311                 if (sched_info_on())
4312                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4313                 break;
4314 #endif
4315         case KVM_CAP_SYNC_REGS:
4316                 r = KVM_SYNC_X86_VALID_FIELDS;
4317                 break;
4318         case KVM_CAP_ADJUST_CLOCK:
4319                 r = KVM_CLOCK_VALID_FLAGS;
4320                 break;
4321         case KVM_CAP_X86_DISABLE_EXITS:
4322                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4323                       KVM_X86_DISABLE_EXITS_CSTATE;
4324                 if(kvm_can_mwait_in_guest())
4325                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4326                 break;
4327         case KVM_CAP_X86_SMM:
4328                 /* SMBASE is usually relocated above 1M on modern chipsets,
4329                  * and SMM handlers might indeed rely on 4G segment limits,
4330                  * so do not report SMM to be available if real mode is
4331                  * emulated via vm86 mode.  Still, do not go to great lengths
4332                  * to avoid userspace's usage of the feature, because it is a
4333                  * fringe case that is not enabled except via specific settings
4334                  * of the module parameters.
4335                  */
4336                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4337                 break;
4338         case KVM_CAP_NR_VCPUS:
4339                 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4340                 break;
4341         case KVM_CAP_MAX_VCPUS:
4342                 r = KVM_MAX_VCPUS;
4343                 break;
4344         case KVM_CAP_MAX_VCPU_ID:
4345                 r = KVM_MAX_VCPU_IDS;
4346                 break;
4347         case KVM_CAP_PV_MMU:    /* obsolete */
4348                 r = 0;
4349                 break;
4350         case KVM_CAP_MCE:
4351                 r = KVM_MAX_MCE_BANKS;
4352                 break;
4353         case KVM_CAP_XCRS:
4354                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4355                 break;
4356         case KVM_CAP_TSC_CONTROL:
4357         case KVM_CAP_VM_TSC_CONTROL:
4358                 r = kvm_has_tsc_control;
4359                 break;
4360         case KVM_CAP_X2APIC_API:
4361                 r = KVM_X2APIC_API_VALID_FLAGS;
4362                 break;
4363         case KVM_CAP_NESTED_STATE:
4364                 r = kvm_x86_ops.nested_ops->get_state ?
4365                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4366                 break;
4367         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4368                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4369                 break;
4370         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4371                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4372                 break;
4373         case KVM_CAP_SMALLER_MAXPHYADDR:
4374                 r = (int) allow_smaller_maxphyaddr;
4375                 break;
4376         case KVM_CAP_STEAL_TIME:
4377                 r = sched_info_on();
4378                 break;
4379         case KVM_CAP_X86_BUS_LOCK_EXIT:
4380                 if (kvm_has_bus_lock_exit)
4381                         r = KVM_BUS_LOCK_DETECTION_OFF |
4382                             KVM_BUS_LOCK_DETECTION_EXIT;
4383                 else
4384                         r = 0;
4385                 break;
4386         case KVM_CAP_XSAVE2: {
4387                 u64 guest_perm = xstate_get_guest_group_perm();
4388
4389                 r = xstate_required_size(supported_xcr0 & guest_perm, false);
4390                 if (r < sizeof(struct kvm_xsave))
4391                         r = sizeof(struct kvm_xsave);
4392                 break;
4393         case KVM_CAP_PMU_CAPABILITY:
4394                 r = enable_pmu ? KVM_CAP_PMU_VALID_MASK : 0;
4395                 break;
4396         }
4397         case KVM_CAP_DISABLE_QUIRKS2:
4398                 r = KVM_X86_VALID_QUIRKS;
4399                 break;
4400         default:
4401                 break;
4402         }
4403         return r;
4404 }
4405
4406 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4407 {
4408         void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4409
4410         if ((u64)(unsigned long)uaddr != attr->addr)
4411                 return ERR_PTR_USR(-EFAULT);
4412         return uaddr;
4413 }
4414
4415 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4416 {
4417         u64 __user *uaddr = kvm_get_attr_addr(attr);
4418
4419         if (attr->group)
4420                 return -ENXIO;
4421
4422         if (IS_ERR(uaddr))
4423                 return PTR_ERR(uaddr);
4424
4425         switch (attr->attr) {
4426         case KVM_X86_XCOMP_GUEST_SUPP:
4427                 if (put_user(supported_xcr0, uaddr))
4428                         return -EFAULT;
4429                 return 0;
4430         default:
4431                 return -ENXIO;
4432                 break;
4433         }
4434 }
4435
4436 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4437 {
4438         if (attr->group)
4439                 return -ENXIO;
4440
4441         switch (attr->attr) {
4442         case KVM_X86_XCOMP_GUEST_SUPP:
4443                 return 0;
4444         default:
4445                 return -ENXIO;
4446         }
4447 }
4448
4449 long kvm_arch_dev_ioctl(struct file *filp,
4450                         unsigned int ioctl, unsigned long arg)
4451 {
4452         void __user *argp = (void __user *)arg;
4453         long r;
4454
4455         switch (ioctl) {
4456         case KVM_GET_MSR_INDEX_LIST: {
4457                 struct kvm_msr_list __user *user_msr_list = argp;
4458                 struct kvm_msr_list msr_list;
4459                 unsigned n;
4460
4461                 r = -EFAULT;
4462                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4463                         goto out;
4464                 n = msr_list.nmsrs;
4465                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4466                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4467                         goto out;
4468                 r = -E2BIG;
4469                 if (n < msr_list.nmsrs)
4470                         goto out;
4471                 r = -EFAULT;
4472                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4473                                  num_msrs_to_save * sizeof(u32)))
4474                         goto out;
4475                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4476                                  &emulated_msrs,
4477                                  num_emulated_msrs * sizeof(u32)))
4478                         goto out;
4479                 r = 0;
4480                 break;
4481         }
4482         case KVM_GET_SUPPORTED_CPUID:
4483         case KVM_GET_EMULATED_CPUID: {
4484                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4485                 struct kvm_cpuid2 cpuid;
4486
4487                 r = -EFAULT;
4488                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4489                         goto out;
4490
4491                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4492                                             ioctl);
4493                 if (r)
4494                         goto out;
4495
4496                 r = -EFAULT;
4497                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4498                         goto out;
4499                 r = 0;
4500                 break;
4501         }
4502         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4503                 r = -EFAULT;
4504                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4505                                  sizeof(kvm_mce_cap_supported)))
4506                         goto out;
4507                 r = 0;
4508                 break;
4509         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4510                 struct kvm_msr_list __user *user_msr_list = argp;
4511                 struct kvm_msr_list msr_list;
4512                 unsigned int n;
4513
4514                 r = -EFAULT;
4515                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4516                         goto out;
4517                 n = msr_list.nmsrs;
4518                 msr_list.nmsrs = num_msr_based_features;
4519                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4520                         goto out;
4521                 r = -E2BIG;
4522                 if (n < msr_list.nmsrs)
4523                         goto out;
4524                 r = -EFAULT;
4525                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4526                                  num_msr_based_features * sizeof(u32)))
4527                         goto out;
4528                 r = 0;
4529                 break;
4530         }
4531         case KVM_GET_MSRS:
4532                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4533                 break;
4534         case KVM_GET_SUPPORTED_HV_CPUID:
4535                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4536                 break;
4537         case KVM_GET_DEVICE_ATTR: {
4538                 struct kvm_device_attr attr;
4539                 r = -EFAULT;
4540                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4541                         break;
4542                 r = kvm_x86_dev_get_attr(&attr);
4543                 break;
4544         }
4545         case KVM_HAS_DEVICE_ATTR: {
4546                 struct kvm_device_attr attr;
4547                 r = -EFAULT;
4548                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4549                         break;
4550                 r = kvm_x86_dev_has_attr(&attr);
4551                 break;
4552         }
4553         default:
4554                 r = -EINVAL;
4555                 break;
4556         }
4557 out:
4558         return r;
4559 }
4560
4561 static void wbinvd_ipi(void *garbage)
4562 {
4563         wbinvd();
4564 }
4565
4566 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4567 {
4568         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4569 }
4570
4571 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4572 {
4573         /* Address WBINVD may be executed by guest */
4574         if (need_emulate_wbinvd(vcpu)) {
4575                 if (static_call(kvm_x86_has_wbinvd_exit)())
4576                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4577                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4578                         smp_call_function_single(vcpu->cpu,
4579                                         wbinvd_ipi, NULL, 1);
4580         }
4581
4582         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4583
4584         /* Save host pkru register if supported */
4585         vcpu->arch.host_pkru = read_pkru();
4586
4587         /* Apply any externally detected TSC adjustments (due to suspend) */
4588         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4589                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4590                 vcpu->arch.tsc_offset_adjustment = 0;
4591                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4592         }
4593
4594         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4595                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4596                                 rdtsc() - vcpu->arch.last_host_tsc;
4597                 if (tsc_delta < 0)
4598                         mark_tsc_unstable("KVM discovered backwards TSC");
4599
4600                 if (kvm_check_tsc_unstable()) {
4601                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4602                                                 vcpu->arch.last_guest_tsc);
4603                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4604                         vcpu->arch.tsc_catchup = 1;
4605                 }
4606
4607                 if (kvm_lapic_hv_timer_in_use(vcpu))
4608                         kvm_lapic_restart_hv_timer(vcpu);
4609
4610                 /*
4611                  * On a host with synchronized TSC, there is no need to update
4612                  * kvmclock on vcpu->cpu migration
4613                  */
4614                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4615                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4616                 if (vcpu->cpu != cpu)
4617                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4618                 vcpu->cpu = cpu;
4619         }
4620
4621         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4622 }
4623
4624 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4625 {
4626         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4627         struct kvm_steal_time __user *st;
4628         struct kvm_memslots *slots;
4629         static const u8 preempted = KVM_VCPU_PREEMPTED;
4630
4631         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4632                 return;
4633
4634         if (vcpu->arch.st.preempted)
4635                 return;
4636
4637         /* This happens on process exit */
4638         if (unlikely(current->mm != vcpu->kvm->mm))
4639                 return;
4640
4641         slots = kvm_memslots(vcpu->kvm);
4642
4643         if (unlikely(slots->generation != ghc->generation ||
4644                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4645                 return;
4646
4647         st = (struct kvm_steal_time __user *)ghc->hva;
4648         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4649
4650         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4651                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4652
4653         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4654 }
4655
4656 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4657 {
4658         int idx;
4659
4660         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4661                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4662
4663         /*
4664          * Take the srcu lock as memslots will be accessed to check the gfn
4665          * cache generation against the memslots generation.
4666          */
4667         idx = srcu_read_lock(&vcpu->kvm->srcu);
4668         if (kvm_xen_msr_enabled(vcpu->kvm))
4669                 kvm_xen_runstate_set_preempted(vcpu);
4670         else
4671                 kvm_steal_time_set_preempted(vcpu);
4672         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4673
4674         static_call(kvm_x86_vcpu_put)(vcpu);
4675         vcpu->arch.last_host_tsc = rdtsc();
4676 }
4677
4678 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4679                                     struct kvm_lapic_state *s)
4680 {
4681         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4682
4683         return kvm_apic_get_state(vcpu, s);
4684 }
4685
4686 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4687                                     struct kvm_lapic_state *s)
4688 {
4689         int r;
4690
4691         r = kvm_apic_set_state(vcpu, s);
4692         if (r)
4693                 return r;
4694         update_cr8_intercept(vcpu);
4695
4696         return 0;
4697 }
4698
4699 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4700 {
4701         /*
4702          * We can accept userspace's request for interrupt injection
4703          * as long as we have a place to store the interrupt number.
4704          * The actual injection will happen when the CPU is able to
4705          * deliver the interrupt.
4706          */
4707         if (kvm_cpu_has_extint(vcpu))
4708                 return false;
4709
4710         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4711         return (!lapic_in_kernel(vcpu) ||
4712                 kvm_apic_accept_pic_intr(vcpu));
4713 }
4714
4715 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4716 {
4717         /*
4718          * Do not cause an interrupt window exit if an exception
4719          * is pending or an event needs reinjection; userspace
4720          * might want to inject the interrupt manually using KVM_SET_REGS
4721          * or KVM_SET_SREGS.  For that to work, we must be at an
4722          * instruction boundary and with no events half-injected.
4723          */
4724         return (kvm_arch_interrupt_allowed(vcpu) &&
4725                 kvm_cpu_accept_dm_intr(vcpu) &&
4726                 !kvm_event_needs_reinjection(vcpu) &&
4727                 !vcpu->arch.exception.pending);
4728 }
4729
4730 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4731                                     struct kvm_interrupt *irq)
4732 {
4733         if (irq->irq >= KVM_NR_INTERRUPTS)
4734                 return -EINVAL;
4735
4736         if (!irqchip_in_kernel(vcpu->kvm)) {
4737                 kvm_queue_interrupt(vcpu, irq->irq, false);
4738                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4739                 return 0;
4740         }
4741
4742         /*
4743          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4744          * fail for in-kernel 8259.
4745          */
4746         if (pic_in_kernel(vcpu->kvm))
4747                 return -ENXIO;
4748
4749         if (vcpu->arch.pending_external_vector != -1)
4750                 return -EEXIST;
4751
4752         vcpu->arch.pending_external_vector = irq->irq;
4753         kvm_make_request(KVM_REQ_EVENT, vcpu);
4754         return 0;
4755 }
4756
4757 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4758 {
4759         kvm_inject_nmi(vcpu);
4760
4761         return 0;
4762 }
4763
4764 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4765 {
4766         kvm_make_request(KVM_REQ_SMI, vcpu);
4767
4768         return 0;
4769 }
4770
4771 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4772                                            struct kvm_tpr_access_ctl *tac)
4773 {
4774         if (tac->flags)
4775                 return -EINVAL;
4776         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4777         return 0;
4778 }
4779
4780 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4781                                         u64 mcg_cap)
4782 {
4783         int r;
4784         unsigned bank_num = mcg_cap & 0xff, bank;
4785
4786         r = -EINVAL;
4787         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4788                 goto out;
4789         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4790                 goto out;
4791         r = 0;
4792         vcpu->arch.mcg_cap = mcg_cap;
4793         /* Init IA32_MCG_CTL to all 1s */
4794         if (mcg_cap & MCG_CTL_P)
4795                 vcpu->arch.mcg_ctl = ~(u64)0;
4796         /* Init IA32_MCi_CTL to all 1s */
4797         for (bank = 0; bank < bank_num; bank++)
4798                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4799
4800         static_call(kvm_x86_setup_mce)(vcpu);
4801 out:
4802         return r;
4803 }
4804
4805 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4806                                       struct kvm_x86_mce *mce)
4807 {
4808         u64 mcg_cap = vcpu->arch.mcg_cap;
4809         unsigned bank_num = mcg_cap & 0xff;
4810         u64 *banks = vcpu->arch.mce_banks;
4811
4812         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4813                 return -EINVAL;
4814         /*
4815          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4816          * reporting is disabled
4817          */
4818         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4819             vcpu->arch.mcg_ctl != ~(u64)0)
4820                 return 0;
4821         banks += 4 * mce->bank;
4822         /*
4823          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4824          * reporting is disabled for the bank
4825          */
4826         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4827                 return 0;
4828         if (mce->status & MCI_STATUS_UC) {
4829                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4830                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4831                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4832                         return 0;
4833                 }
4834                 if (banks[1] & MCI_STATUS_VAL)
4835                         mce->status |= MCI_STATUS_OVER;
4836                 banks[2] = mce->addr;
4837                 banks[3] = mce->misc;
4838                 vcpu->arch.mcg_status = mce->mcg_status;
4839                 banks[1] = mce->status;
4840                 kvm_queue_exception(vcpu, MC_VECTOR);
4841         } else if (!(banks[1] & MCI_STATUS_VAL)
4842                    || !(banks[1] & MCI_STATUS_UC)) {
4843                 if (banks[1] & MCI_STATUS_VAL)
4844                         mce->status |= MCI_STATUS_OVER;
4845                 banks[2] = mce->addr;
4846                 banks[3] = mce->misc;
4847                 banks[1] = mce->status;
4848         } else
4849                 banks[1] |= MCI_STATUS_OVER;
4850         return 0;
4851 }
4852
4853 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4854                                                struct kvm_vcpu_events *events)
4855 {
4856         process_nmi(vcpu);
4857
4858         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4859                 process_smi(vcpu);
4860
4861         /*
4862          * In guest mode, payload delivery should be deferred,
4863          * so that the L1 hypervisor can intercept #PF before
4864          * CR2 is modified (or intercept #DB before DR6 is
4865          * modified under nVMX). Unless the per-VM capability,
4866          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4867          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4868          * opportunistically defer the exception payload, deliver it if the
4869          * capability hasn't been requested before processing a
4870          * KVM_GET_VCPU_EVENTS.
4871          */
4872         if (!vcpu->kvm->arch.exception_payload_enabled &&
4873             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4874                 kvm_deliver_exception_payload(vcpu);
4875
4876         /*
4877          * The API doesn't provide the instruction length for software
4878          * exceptions, so don't report them. As long as the guest RIP
4879          * isn't advanced, we should expect to encounter the exception
4880          * again.
4881          */
4882         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4883                 events->exception.injected = 0;
4884                 events->exception.pending = 0;
4885         } else {
4886                 events->exception.injected = vcpu->arch.exception.injected;
4887                 events->exception.pending = vcpu->arch.exception.pending;
4888                 /*
4889                  * For ABI compatibility, deliberately conflate
4890                  * pending and injected exceptions when
4891                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4892                  */
4893                 if (!vcpu->kvm->arch.exception_payload_enabled)
4894                         events->exception.injected |=
4895                                 vcpu->arch.exception.pending;
4896         }
4897         events->exception.nr = vcpu->arch.exception.nr;
4898         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4899         events->exception.error_code = vcpu->arch.exception.error_code;
4900         events->exception_has_payload = vcpu->arch.exception.has_payload;
4901         events->exception_payload = vcpu->arch.exception.payload;
4902
4903         events->interrupt.injected =
4904                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4905         events->interrupt.nr = vcpu->arch.interrupt.nr;
4906         events->interrupt.soft = 0;
4907         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4908
4909         events->nmi.injected = vcpu->arch.nmi_injected;
4910         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4911         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4912         events->nmi.pad = 0;
4913
4914         events->sipi_vector = 0; /* never valid when reporting to user space */
4915
4916         events->smi.smm = is_smm(vcpu);
4917         events->smi.pending = vcpu->arch.smi_pending;
4918         events->smi.smm_inside_nmi =
4919                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4920         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4921
4922         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4923                          | KVM_VCPUEVENT_VALID_SHADOW
4924                          | KVM_VCPUEVENT_VALID_SMM);
4925         if (vcpu->kvm->arch.exception_payload_enabled)
4926                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4927
4928         memset(&events->reserved, 0, sizeof(events->reserved));
4929 }
4930
4931 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4932
4933 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4934                                               struct kvm_vcpu_events *events)
4935 {
4936         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4937                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4938                               | KVM_VCPUEVENT_VALID_SHADOW
4939                               | KVM_VCPUEVENT_VALID_SMM
4940                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4941                 return -EINVAL;
4942
4943         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4944                 if (!vcpu->kvm->arch.exception_payload_enabled)
4945                         return -EINVAL;
4946                 if (events->exception.pending)
4947                         events->exception.injected = 0;
4948                 else
4949                         events->exception_has_payload = 0;
4950         } else {
4951                 events->exception.pending = 0;
4952                 events->exception_has_payload = 0;
4953         }
4954
4955         if ((events->exception.injected || events->exception.pending) &&
4956             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4957                 return -EINVAL;
4958
4959         /* INITs are latched while in SMM */
4960         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4961             (events->smi.smm || events->smi.pending) &&
4962             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4963                 return -EINVAL;
4964
4965         process_nmi(vcpu);
4966         vcpu->arch.exception.injected = events->exception.injected;
4967         vcpu->arch.exception.pending = events->exception.pending;
4968         vcpu->arch.exception.nr = events->exception.nr;
4969         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4970         vcpu->arch.exception.error_code = events->exception.error_code;
4971         vcpu->arch.exception.has_payload = events->exception_has_payload;
4972         vcpu->arch.exception.payload = events->exception_payload;
4973
4974         vcpu->arch.interrupt.injected = events->interrupt.injected;
4975         vcpu->arch.interrupt.nr = events->interrupt.nr;
4976         vcpu->arch.interrupt.soft = events->interrupt.soft;
4977         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4978                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4979                                                 events->interrupt.shadow);
4980
4981         vcpu->arch.nmi_injected = events->nmi.injected;
4982         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4983                 vcpu->arch.nmi_pending = events->nmi.pending;
4984         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4985
4986         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4987             lapic_in_kernel(vcpu))
4988                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4989
4990         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4991                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4992                         kvm_x86_ops.nested_ops->leave_nested(vcpu);
4993                         kvm_smm_changed(vcpu, events->smi.smm);
4994                 }
4995
4996                 vcpu->arch.smi_pending = events->smi.pending;
4997
4998                 if (events->smi.smm) {
4999                         if (events->smi.smm_inside_nmi)
5000                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
5001                         else
5002                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
5003                 }
5004
5005                 if (lapic_in_kernel(vcpu)) {
5006                         if (events->smi.latched_init)
5007                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5008                         else
5009                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5010                 }
5011         }
5012
5013         kvm_make_request(KVM_REQ_EVENT, vcpu);
5014
5015         return 0;
5016 }
5017
5018 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
5019                                              struct kvm_debugregs *dbgregs)
5020 {
5021         unsigned long val;
5022
5023         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
5024         kvm_get_dr(vcpu, 6, &val);
5025         dbgregs->dr6 = val;
5026         dbgregs->dr7 = vcpu->arch.dr7;
5027         dbgregs->flags = 0;
5028         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
5029 }
5030
5031 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
5032                                             struct kvm_debugregs *dbgregs)
5033 {
5034         if (dbgregs->flags)
5035                 return -EINVAL;
5036
5037         if (!kvm_dr6_valid(dbgregs->dr6))
5038                 return -EINVAL;
5039         if (!kvm_dr7_valid(dbgregs->dr7))
5040                 return -EINVAL;
5041
5042         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
5043         kvm_update_dr0123(vcpu);
5044         vcpu->arch.dr6 = dbgregs->dr6;
5045         vcpu->arch.dr7 = dbgregs->dr7;
5046         kvm_update_dr7(vcpu);
5047
5048         return 0;
5049 }
5050
5051 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
5052                                          struct kvm_xsave *guest_xsave)
5053 {
5054         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5055                 return;
5056
5057         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5058                                        guest_xsave->region,
5059                                        sizeof(guest_xsave->region),
5060                                        vcpu->arch.pkru);
5061 }
5062
5063 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
5064                                           u8 *state, unsigned int size)
5065 {
5066         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5067                 return;
5068
5069         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5070                                        state, size, vcpu->arch.pkru);
5071 }
5072
5073 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5074                                         struct kvm_xsave *guest_xsave)
5075 {
5076         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5077                 return 0;
5078
5079         return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5080                                               guest_xsave->region,
5081                                               supported_xcr0, &vcpu->arch.pkru);
5082 }
5083
5084 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5085                                         struct kvm_xcrs *guest_xcrs)
5086 {
5087         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5088                 guest_xcrs->nr_xcrs = 0;
5089                 return;
5090         }
5091
5092         guest_xcrs->nr_xcrs = 1;
5093         guest_xcrs->flags = 0;
5094         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5095         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5096 }
5097
5098 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5099                                        struct kvm_xcrs *guest_xcrs)
5100 {
5101         int i, r = 0;
5102
5103         if (!boot_cpu_has(X86_FEATURE_XSAVE))
5104                 return -EINVAL;
5105
5106         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5107                 return -EINVAL;
5108
5109         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5110                 /* Only support XCR0 currently */
5111                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5112                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5113                                 guest_xcrs->xcrs[i].value);
5114                         break;
5115                 }
5116         if (r)
5117                 r = -EINVAL;
5118         return r;
5119 }
5120
5121 /*
5122  * kvm_set_guest_paused() indicates to the guest kernel that it has been
5123  * stopped by the hypervisor.  This function will be called from the host only.
5124  * EINVAL is returned when the host attempts to set the flag for a guest that
5125  * does not support pv clocks.
5126  */
5127 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5128 {
5129         if (!vcpu->arch.pv_time.active)
5130                 return -EINVAL;
5131         vcpu->arch.pvclock_set_guest_stopped_request = true;
5132         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5133         return 0;
5134 }
5135
5136 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5137                                  struct kvm_device_attr *attr)
5138 {
5139         int r;
5140
5141         switch (attr->attr) {
5142         case KVM_VCPU_TSC_OFFSET:
5143                 r = 0;
5144                 break;
5145         default:
5146                 r = -ENXIO;
5147         }
5148
5149         return r;
5150 }
5151
5152 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5153                                  struct kvm_device_attr *attr)
5154 {
5155         u64 __user *uaddr = kvm_get_attr_addr(attr);
5156         int r;
5157
5158         if (IS_ERR(uaddr))
5159                 return PTR_ERR(uaddr);
5160
5161         switch (attr->attr) {
5162         case KVM_VCPU_TSC_OFFSET:
5163                 r = -EFAULT;
5164                 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5165                         break;
5166                 r = 0;
5167                 break;
5168         default:
5169                 r = -ENXIO;
5170         }
5171
5172         return r;
5173 }
5174
5175 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5176                                  struct kvm_device_attr *attr)
5177 {
5178         u64 __user *uaddr = kvm_get_attr_addr(attr);
5179         struct kvm *kvm = vcpu->kvm;
5180         int r;
5181
5182         if (IS_ERR(uaddr))
5183                 return PTR_ERR(uaddr);
5184
5185         switch (attr->attr) {
5186         case KVM_VCPU_TSC_OFFSET: {
5187                 u64 offset, tsc, ns;
5188                 unsigned long flags;
5189                 bool matched;
5190
5191                 r = -EFAULT;
5192                 if (get_user(offset, uaddr))
5193                         break;
5194
5195                 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5196
5197                 matched = (vcpu->arch.virtual_tsc_khz &&
5198                            kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5199                            kvm->arch.last_tsc_offset == offset);
5200
5201                 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5202                 ns = get_kvmclock_base_ns();
5203
5204                 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5205                 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5206
5207                 r = 0;
5208                 break;
5209         }
5210         default:
5211                 r = -ENXIO;
5212         }
5213
5214         return r;
5215 }
5216
5217 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5218                                       unsigned int ioctl,
5219                                       void __user *argp)
5220 {
5221         struct kvm_device_attr attr;
5222         int r;
5223
5224         if (copy_from_user(&attr, argp, sizeof(attr)))
5225                 return -EFAULT;
5226
5227         if (attr.group != KVM_VCPU_TSC_CTRL)
5228                 return -ENXIO;
5229
5230         switch (ioctl) {
5231         case KVM_HAS_DEVICE_ATTR:
5232                 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5233                 break;
5234         case KVM_GET_DEVICE_ATTR:
5235                 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5236                 break;
5237         case KVM_SET_DEVICE_ATTR:
5238                 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5239                 break;
5240         }
5241
5242         return r;
5243 }
5244
5245 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5246                                      struct kvm_enable_cap *cap)
5247 {
5248         int r;
5249         uint16_t vmcs_version;
5250         void __user *user_ptr;
5251
5252         if (cap->flags)
5253                 return -EINVAL;
5254
5255         switch (cap->cap) {
5256         case KVM_CAP_HYPERV_SYNIC2:
5257                 if (cap->args[0])
5258                         return -EINVAL;
5259                 fallthrough;
5260
5261         case KVM_CAP_HYPERV_SYNIC:
5262                 if (!irqchip_in_kernel(vcpu->kvm))
5263                         return -EINVAL;
5264                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5265                                              KVM_CAP_HYPERV_SYNIC2);
5266         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5267                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5268                         return -ENOTTY;
5269                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5270                 if (!r) {
5271                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5272                         if (copy_to_user(user_ptr, &vmcs_version,
5273                                          sizeof(vmcs_version)))
5274                                 r = -EFAULT;
5275                 }
5276                 return r;
5277         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5278                 if (!kvm_x86_ops.enable_direct_tlbflush)
5279                         return -ENOTTY;
5280
5281                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5282
5283         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5284                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5285
5286         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5287                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5288                 if (vcpu->arch.pv_cpuid.enforce)
5289                         kvm_update_pv_runtime(vcpu);
5290
5291                 return 0;
5292         default:
5293                 return -EINVAL;
5294         }
5295 }
5296
5297 long kvm_arch_vcpu_ioctl(struct file *filp,
5298                          unsigned int ioctl, unsigned long arg)
5299 {
5300         struct kvm_vcpu *vcpu = filp->private_data;
5301         void __user *argp = (void __user *)arg;
5302         int r;
5303         union {
5304                 struct kvm_sregs2 *sregs2;
5305                 struct kvm_lapic_state *lapic;
5306                 struct kvm_xsave *xsave;
5307                 struct kvm_xcrs *xcrs;
5308                 void *buffer;
5309         } u;
5310
5311         vcpu_load(vcpu);
5312
5313         u.buffer = NULL;
5314         switch (ioctl) {
5315         case KVM_GET_LAPIC: {
5316                 r = -EINVAL;
5317                 if (!lapic_in_kernel(vcpu))
5318                         goto out;
5319                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5320                                 GFP_KERNEL_ACCOUNT);
5321
5322                 r = -ENOMEM;
5323                 if (!u.lapic)
5324                         goto out;
5325                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5326                 if (r)
5327                         goto out;
5328                 r = -EFAULT;
5329                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5330                         goto out;
5331                 r = 0;
5332                 break;
5333         }
5334         case KVM_SET_LAPIC: {
5335                 r = -EINVAL;
5336                 if (!lapic_in_kernel(vcpu))
5337                         goto out;
5338                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5339                 if (IS_ERR(u.lapic)) {
5340                         r = PTR_ERR(u.lapic);
5341                         goto out_nofree;
5342                 }
5343
5344                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5345                 break;
5346         }
5347         case KVM_INTERRUPT: {
5348                 struct kvm_interrupt irq;
5349
5350                 r = -EFAULT;
5351                 if (copy_from_user(&irq, argp, sizeof(irq)))
5352                         goto out;
5353                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5354                 break;
5355         }
5356         case KVM_NMI: {
5357                 r = kvm_vcpu_ioctl_nmi(vcpu);
5358                 break;
5359         }
5360         case KVM_SMI: {
5361                 r = kvm_vcpu_ioctl_smi(vcpu);
5362                 break;
5363         }
5364         case KVM_SET_CPUID: {
5365                 struct kvm_cpuid __user *cpuid_arg = argp;
5366                 struct kvm_cpuid cpuid;
5367
5368                 r = -EFAULT;
5369                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5370                         goto out;
5371                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5372                 break;
5373         }
5374         case KVM_SET_CPUID2: {
5375                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5376                 struct kvm_cpuid2 cpuid;
5377
5378                 r = -EFAULT;
5379                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5380                         goto out;
5381                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5382                                               cpuid_arg->entries);
5383                 break;
5384         }
5385         case KVM_GET_CPUID2: {
5386                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5387                 struct kvm_cpuid2 cpuid;
5388
5389                 r = -EFAULT;
5390                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5391                         goto out;
5392                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5393                                               cpuid_arg->entries);
5394                 if (r)
5395                         goto out;
5396                 r = -EFAULT;
5397                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5398                         goto out;
5399                 r = 0;
5400                 break;
5401         }
5402         case KVM_GET_MSRS: {
5403                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5404                 r = msr_io(vcpu, argp, do_get_msr, 1);
5405                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5406                 break;
5407         }
5408         case KVM_SET_MSRS: {
5409                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5410                 r = msr_io(vcpu, argp, do_set_msr, 0);
5411                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5412                 break;
5413         }
5414         case KVM_TPR_ACCESS_REPORTING: {
5415                 struct kvm_tpr_access_ctl tac;
5416
5417                 r = -EFAULT;
5418                 if (copy_from_user(&tac, argp, sizeof(tac)))
5419                         goto out;
5420                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5421                 if (r)
5422                         goto out;
5423                 r = -EFAULT;
5424                 if (copy_to_user(argp, &tac, sizeof(tac)))
5425                         goto out;
5426                 r = 0;
5427                 break;
5428         };
5429         case KVM_SET_VAPIC_ADDR: {
5430                 struct kvm_vapic_addr va;
5431                 int idx;
5432
5433                 r = -EINVAL;
5434                 if (!lapic_in_kernel(vcpu))
5435                         goto out;
5436                 r = -EFAULT;
5437                 if (copy_from_user(&va, argp, sizeof(va)))
5438                         goto out;
5439                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5440                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5441                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5442                 break;
5443         }
5444         case KVM_X86_SETUP_MCE: {
5445                 u64 mcg_cap;
5446
5447                 r = -EFAULT;
5448                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5449                         goto out;
5450                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5451                 break;
5452         }
5453         case KVM_X86_SET_MCE: {
5454                 struct kvm_x86_mce mce;
5455
5456                 r = -EFAULT;
5457                 if (copy_from_user(&mce, argp, sizeof(mce)))
5458                         goto out;
5459                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5460                 break;
5461         }
5462         case KVM_GET_VCPU_EVENTS: {
5463                 struct kvm_vcpu_events events;
5464
5465                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5466
5467                 r = -EFAULT;
5468                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5469                         break;
5470                 r = 0;
5471                 break;
5472         }
5473         case KVM_SET_VCPU_EVENTS: {
5474                 struct kvm_vcpu_events events;
5475
5476                 r = -EFAULT;
5477                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5478                         break;
5479
5480                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5481                 break;
5482         }
5483         case KVM_GET_DEBUGREGS: {
5484                 struct kvm_debugregs dbgregs;
5485
5486                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5487
5488                 r = -EFAULT;
5489                 if (copy_to_user(argp, &dbgregs,
5490                                  sizeof(struct kvm_debugregs)))
5491                         break;
5492                 r = 0;
5493                 break;
5494         }
5495         case KVM_SET_DEBUGREGS: {
5496                 struct kvm_debugregs dbgregs;
5497
5498                 r = -EFAULT;
5499                 if (copy_from_user(&dbgregs, argp,
5500                                    sizeof(struct kvm_debugregs)))
5501                         break;
5502
5503                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5504                 break;
5505         }
5506         case KVM_GET_XSAVE: {
5507                 r = -EINVAL;
5508                 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5509                         break;
5510
5511                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5512                 r = -ENOMEM;
5513                 if (!u.xsave)
5514                         break;
5515
5516                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5517
5518                 r = -EFAULT;
5519                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5520                         break;
5521                 r = 0;
5522                 break;
5523         }
5524         case KVM_SET_XSAVE: {
5525                 int size = vcpu->arch.guest_fpu.uabi_size;
5526
5527                 u.xsave = memdup_user(argp, size);
5528                 if (IS_ERR(u.xsave)) {
5529                         r = PTR_ERR(u.xsave);
5530                         goto out_nofree;
5531                 }
5532
5533                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5534                 break;
5535         }
5536
5537         case KVM_GET_XSAVE2: {
5538                 int size = vcpu->arch.guest_fpu.uabi_size;
5539
5540                 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5541                 r = -ENOMEM;
5542                 if (!u.xsave)
5543                         break;
5544
5545                 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5546
5547                 r = -EFAULT;
5548                 if (copy_to_user(argp, u.xsave, size))
5549                         break;
5550
5551                 r = 0;
5552                 break;
5553         }
5554
5555         case KVM_GET_XCRS: {
5556                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5557                 r = -ENOMEM;
5558                 if (!u.xcrs)
5559                         break;
5560
5561                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5562
5563                 r = -EFAULT;
5564                 if (copy_to_user(argp, u.xcrs,
5565                                  sizeof(struct kvm_xcrs)))
5566                         break;
5567                 r = 0;
5568                 break;
5569         }
5570         case KVM_SET_XCRS: {
5571                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5572                 if (IS_ERR(u.xcrs)) {
5573                         r = PTR_ERR(u.xcrs);
5574                         goto out_nofree;
5575                 }
5576
5577                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5578                 break;
5579         }
5580         case KVM_SET_TSC_KHZ: {
5581                 u32 user_tsc_khz;
5582
5583                 r = -EINVAL;
5584                 user_tsc_khz = (u32)arg;
5585
5586                 if (kvm_has_tsc_control &&
5587                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5588                         goto out;
5589
5590                 if (user_tsc_khz == 0)
5591                         user_tsc_khz = tsc_khz;
5592
5593                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5594                         r = 0;
5595
5596                 goto out;
5597         }
5598         case KVM_GET_TSC_KHZ: {
5599                 r = vcpu->arch.virtual_tsc_khz;
5600                 goto out;
5601         }
5602         case KVM_KVMCLOCK_CTRL: {
5603                 r = kvm_set_guest_paused(vcpu);
5604                 goto out;
5605         }
5606         case KVM_ENABLE_CAP: {
5607                 struct kvm_enable_cap cap;
5608
5609                 r = -EFAULT;
5610                 if (copy_from_user(&cap, argp, sizeof(cap)))
5611                         goto out;
5612                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5613                 break;
5614         }
5615         case KVM_GET_NESTED_STATE: {
5616                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5617                 u32 user_data_size;
5618
5619                 r = -EINVAL;
5620                 if (!kvm_x86_ops.nested_ops->get_state)
5621                         break;
5622
5623                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5624                 r = -EFAULT;
5625                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5626                         break;
5627
5628                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5629                                                      user_data_size);
5630                 if (r < 0)
5631                         break;
5632
5633                 if (r > user_data_size) {
5634                         if (put_user(r, &user_kvm_nested_state->size))
5635                                 r = -EFAULT;
5636                         else
5637                                 r = -E2BIG;
5638                         break;
5639                 }
5640
5641                 r = 0;
5642                 break;
5643         }
5644         case KVM_SET_NESTED_STATE: {
5645                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5646                 struct kvm_nested_state kvm_state;
5647                 int idx;
5648
5649                 r = -EINVAL;
5650                 if (!kvm_x86_ops.nested_ops->set_state)
5651                         break;
5652
5653                 r = -EFAULT;
5654                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5655                         break;
5656
5657                 r = -EINVAL;
5658                 if (kvm_state.size < sizeof(kvm_state))
5659                         break;
5660
5661                 if (kvm_state.flags &
5662                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5663                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5664                       | KVM_STATE_NESTED_GIF_SET))
5665                         break;
5666
5667                 /* nested_run_pending implies guest_mode.  */
5668                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5669                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5670                         break;
5671
5672                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5673                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5674                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5675                 break;
5676         }
5677         case KVM_GET_SUPPORTED_HV_CPUID:
5678                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5679                 break;
5680 #ifdef CONFIG_KVM_XEN
5681         case KVM_XEN_VCPU_GET_ATTR: {
5682                 struct kvm_xen_vcpu_attr xva;
5683
5684                 r = -EFAULT;
5685                 if (copy_from_user(&xva, argp, sizeof(xva)))
5686                         goto out;
5687                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5688                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5689                         r = -EFAULT;
5690                 break;
5691         }
5692         case KVM_XEN_VCPU_SET_ATTR: {
5693                 struct kvm_xen_vcpu_attr xva;
5694
5695                 r = -EFAULT;
5696                 if (copy_from_user(&xva, argp, sizeof(xva)))
5697                         goto out;
5698                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5699                 break;
5700         }
5701 #endif
5702         case KVM_GET_SREGS2: {
5703                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5704                 r = -ENOMEM;
5705                 if (!u.sregs2)
5706                         goto out;
5707                 __get_sregs2(vcpu, u.sregs2);
5708                 r = -EFAULT;
5709                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5710                         goto out;
5711                 r = 0;
5712                 break;
5713         }
5714         case KVM_SET_SREGS2: {
5715                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5716                 if (IS_ERR(u.sregs2)) {
5717                         r = PTR_ERR(u.sregs2);
5718                         u.sregs2 = NULL;
5719                         goto out;
5720                 }
5721                 r = __set_sregs2(vcpu, u.sregs2);
5722                 break;
5723         }
5724         case KVM_HAS_DEVICE_ATTR:
5725         case KVM_GET_DEVICE_ATTR:
5726         case KVM_SET_DEVICE_ATTR:
5727                 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5728                 break;
5729         default:
5730                 r = -EINVAL;
5731         }
5732 out:
5733         kfree(u.buffer);
5734 out_nofree:
5735         vcpu_put(vcpu);
5736         return r;
5737 }
5738
5739 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5740 {
5741         return VM_FAULT_SIGBUS;
5742 }
5743
5744 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5745 {
5746         int ret;
5747
5748         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5749                 return -EINVAL;
5750         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5751         return ret;
5752 }
5753
5754 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5755                                               u64 ident_addr)
5756 {
5757         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5758 }
5759
5760 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5761                                          unsigned long kvm_nr_mmu_pages)
5762 {
5763         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5764                 return -EINVAL;
5765
5766         mutex_lock(&kvm->slots_lock);
5767
5768         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5769         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5770
5771         mutex_unlock(&kvm->slots_lock);
5772         return 0;
5773 }
5774
5775 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5776 {
5777         return kvm->arch.n_max_mmu_pages;
5778 }
5779
5780 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5781 {
5782         struct kvm_pic *pic = kvm->arch.vpic;
5783         int r;
5784
5785         r = 0;
5786         switch (chip->chip_id) {
5787         case KVM_IRQCHIP_PIC_MASTER:
5788                 memcpy(&chip->chip.pic, &pic->pics[0],
5789                         sizeof(struct kvm_pic_state));
5790                 break;
5791         case KVM_IRQCHIP_PIC_SLAVE:
5792                 memcpy(&chip->chip.pic, &pic->pics[1],
5793                         sizeof(struct kvm_pic_state));
5794                 break;
5795         case KVM_IRQCHIP_IOAPIC:
5796                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5797                 break;
5798         default:
5799                 r = -EINVAL;
5800                 break;
5801         }
5802         return r;
5803 }
5804
5805 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5806 {
5807         struct kvm_pic *pic = kvm->arch.vpic;
5808         int r;
5809
5810         r = 0;
5811         switch (chip->chip_id) {
5812         case KVM_IRQCHIP_PIC_MASTER:
5813                 spin_lock(&pic->lock);
5814                 memcpy(&pic->pics[0], &chip->chip.pic,
5815                         sizeof(struct kvm_pic_state));
5816                 spin_unlock(&pic->lock);
5817                 break;
5818         case KVM_IRQCHIP_PIC_SLAVE:
5819                 spin_lock(&pic->lock);
5820                 memcpy(&pic->pics[1], &chip->chip.pic,
5821                         sizeof(struct kvm_pic_state));
5822                 spin_unlock(&pic->lock);
5823                 break;
5824         case KVM_IRQCHIP_IOAPIC:
5825                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5826                 break;
5827         default:
5828                 r = -EINVAL;
5829                 break;
5830         }
5831         kvm_pic_update_irq(pic);
5832         return r;
5833 }
5834
5835 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5836 {
5837         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5838
5839         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5840
5841         mutex_lock(&kps->lock);
5842         memcpy(ps, &kps->channels, sizeof(*ps));
5843         mutex_unlock(&kps->lock);
5844         return 0;
5845 }
5846
5847 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5848 {
5849         int i;
5850         struct kvm_pit *pit = kvm->arch.vpit;
5851
5852         mutex_lock(&pit->pit_state.lock);
5853         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5854         for (i = 0; i < 3; i++)
5855                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5856         mutex_unlock(&pit->pit_state.lock);
5857         return 0;
5858 }
5859
5860 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5861 {
5862         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5863         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5864                 sizeof(ps->channels));
5865         ps->flags = kvm->arch.vpit->pit_state.flags;
5866         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5867         memset(&ps->reserved, 0, sizeof(ps->reserved));
5868         return 0;
5869 }
5870
5871 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5872 {
5873         int start = 0;
5874         int i;
5875         u32 prev_legacy, cur_legacy;
5876         struct kvm_pit *pit = kvm->arch.vpit;
5877
5878         mutex_lock(&pit->pit_state.lock);
5879         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5880         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5881         if (!prev_legacy && cur_legacy)
5882                 start = 1;
5883         memcpy(&pit->pit_state.channels, &ps->channels,
5884                sizeof(pit->pit_state.channels));
5885         pit->pit_state.flags = ps->flags;
5886         for (i = 0; i < 3; i++)
5887                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5888                                    start && i == 0);
5889         mutex_unlock(&pit->pit_state.lock);
5890         return 0;
5891 }
5892
5893 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5894                                  struct kvm_reinject_control *control)
5895 {
5896         struct kvm_pit *pit = kvm->arch.vpit;
5897
5898         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5899          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5900          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5901          */
5902         mutex_lock(&pit->pit_state.lock);
5903         kvm_pit_set_reinject(pit, control->pit_reinject);
5904         mutex_unlock(&pit->pit_state.lock);
5905
5906         return 0;
5907 }
5908
5909 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5910 {
5911
5912         /*
5913          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5914          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5915          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5916          * VM-Exit.
5917          */
5918         struct kvm_vcpu *vcpu;
5919         unsigned long i;
5920
5921         kvm_for_each_vcpu(i, vcpu, kvm)
5922                 kvm_vcpu_kick(vcpu);
5923 }
5924
5925 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5926                         bool line_status)
5927 {
5928         if (!irqchip_in_kernel(kvm))
5929                 return -ENXIO;
5930
5931         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5932                                         irq_event->irq, irq_event->level,
5933                                         line_status);
5934         return 0;
5935 }
5936
5937 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5938                             struct kvm_enable_cap *cap)
5939 {
5940         int r;
5941
5942         if (cap->flags)
5943                 return -EINVAL;
5944
5945         switch (cap->cap) {
5946         case KVM_CAP_DISABLE_QUIRKS2:
5947                 r = -EINVAL;
5948                 if (cap->args[0] & ~KVM_X86_VALID_QUIRKS)
5949                         break;
5950                 fallthrough;
5951         case KVM_CAP_DISABLE_QUIRKS:
5952                 kvm->arch.disabled_quirks = cap->args[0];
5953                 r = 0;
5954                 break;
5955         case KVM_CAP_SPLIT_IRQCHIP: {
5956                 mutex_lock(&kvm->lock);
5957                 r = -EINVAL;
5958                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5959                         goto split_irqchip_unlock;
5960                 r = -EEXIST;
5961                 if (irqchip_in_kernel(kvm))
5962                         goto split_irqchip_unlock;
5963                 if (kvm->created_vcpus)
5964                         goto split_irqchip_unlock;
5965                 r = kvm_setup_empty_irq_routing(kvm);
5966                 if (r)
5967                         goto split_irqchip_unlock;
5968                 /* Pairs with irqchip_in_kernel. */
5969                 smp_wmb();
5970                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5971                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5972                 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
5973                 r = 0;
5974 split_irqchip_unlock:
5975                 mutex_unlock(&kvm->lock);
5976                 break;
5977         }
5978         case KVM_CAP_X2APIC_API:
5979                 r = -EINVAL;
5980                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5981                         break;
5982
5983                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5984                         kvm->arch.x2apic_format = true;
5985                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5986                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5987
5988                 r = 0;
5989                 break;
5990         case KVM_CAP_X86_DISABLE_EXITS:
5991                 r = -EINVAL;
5992                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5993                         break;
5994
5995                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5996                         kvm_can_mwait_in_guest())
5997                         kvm->arch.mwait_in_guest = true;
5998                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5999                         kvm->arch.hlt_in_guest = true;
6000                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
6001                         kvm->arch.pause_in_guest = true;
6002                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
6003                         kvm->arch.cstate_in_guest = true;
6004                 r = 0;
6005                 break;
6006         case KVM_CAP_MSR_PLATFORM_INFO:
6007                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
6008                 r = 0;
6009                 break;
6010         case KVM_CAP_EXCEPTION_PAYLOAD:
6011                 kvm->arch.exception_payload_enabled = cap->args[0];
6012                 r = 0;
6013                 break;
6014         case KVM_CAP_X86_USER_SPACE_MSR:
6015                 kvm->arch.user_space_msr_mask = cap->args[0];
6016                 r = 0;
6017                 break;
6018         case KVM_CAP_X86_BUS_LOCK_EXIT:
6019                 r = -EINVAL;
6020                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
6021                         break;
6022
6023                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
6024                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
6025                         break;
6026
6027                 if (kvm_has_bus_lock_exit &&
6028                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
6029                         kvm->arch.bus_lock_detection_enabled = true;
6030                 r = 0;
6031                 break;
6032 #ifdef CONFIG_X86_SGX_KVM
6033         case KVM_CAP_SGX_ATTRIBUTE: {
6034                 unsigned long allowed_attributes = 0;
6035
6036                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
6037                 if (r)
6038                         break;
6039
6040                 /* KVM only supports the PROVISIONKEY privileged attribute. */
6041                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
6042                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
6043                         kvm->arch.sgx_provisioning_allowed = true;
6044                 else
6045                         r = -EINVAL;
6046                 break;
6047         }
6048 #endif
6049         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
6050                 r = -EINVAL;
6051                 if (!kvm_x86_ops.vm_copy_enc_context_from)
6052                         break;
6053
6054                 r = static_call(kvm_x86_vm_copy_enc_context_from)(kvm, cap->args[0]);
6055                 break;
6056         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
6057                 r = -EINVAL;
6058                 if (!kvm_x86_ops.vm_move_enc_context_from)
6059                         break;
6060
6061                 r = static_call(kvm_x86_vm_move_enc_context_from)(kvm, cap->args[0]);
6062                 break;
6063         case KVM_CAP_EXIT_HYPERCALL:
6064                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
6065                         r = -EINVAL;
6066                         break;
6067                 }
6068                 kvm->arch.hypercall_exit_enabled = cap->args[0];
6069                 r = 0;
6070                 break;
6071         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
6072                 r = -EINVAL;
6073                 if (cap->args[0] & ~1)
6074                         break;
6075                 kvm->arch.exit_on_emulation_error = cap->args[0];
6076                 r = 0;
6077                 break;
6078         case KVM_CAP_PMU_CAPABILITY:
6079                 r = -EINVAL;
6080                 if (!enable_pmu || (cap->args[0] & ~KVM_CAP_PMU_VALID_MASK))
6081                         break;
6082
6083                 mutex_lock(&kvm->lock);
6084                 if (!kvm->created_vcpus) {
6085                         kvm->arch.enable_pmu = !(cap->args[0] & KVM_PMU_CAP_DISABLE);
6086                         r = 0;
6087                 }
6088                 mutex_unlock(&kvm->lock);
6089                 break;
6090         default:
6091                 r = -EINVAL;
6092                 break;
6093         }
6094         return r;
6095 }
6096
6097 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6098 {
6099         struct kvm_x86_msr_filter *msr_filter;
6100
6101         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6102         if (!msr_filter)
6103                 return NULL;
6104
6105         msr_filter->default_allow = default_allow;
6106         return msr_filter;
6107 }
6108
6109 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6110 {
6111         u32 i;
6112
6113         if (!msr_filter)
6114                 return;
6115
6116         for (i = 0; i < msr_filter->count; i++)
6117                 kfree(msr_filter->ranges[i].bitmap);
6118
6119         kfree(msr_filter);
6120 }
6121
6122 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6123                               struct kvm_msr_filter_range *user_range)
6124 {
6125         unsigned long *bitmap = NULL;
6126         size_t bitmap_size;
6127
6128         if (!user_range->nmsrs)
6129                 return 0;
6130
6131         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
6132                 return -EINVAL;
6133
6134         if (!user_range->flags)
6135                 return -EINVAL;
6136
6137         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6138         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6139                 return -EINVAL;
6140
6141         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6142         if (IS_ERR(bitmap))
6143                 return PTR_ERR(bitmap);
6144
6145         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6146                 .flags = user_range->flags,
6147                 .base = user_range->base,
6148                 .nmsrs = user_range->nmsrs,
6149                 .bitmap = bitmap,
6150         };
6151
6152         msr_filter->count++;
6153         return 0;
6154 }
6155
6156 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
6157 {
6158         struct kvm_msr_filter __user *user_msr_filter = argp;
6159         struct kvm_x86_msr_filter *new_filter, *old_filter;
6160         struct kvm_msr_filter filter;
6161         bool default_allow;
6162         bool empty = true;
6163         int r = 0;
6164         u32 i;
6165
6166         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6167                 return -EFAULT;
6168
6169         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
6170                 empty &= !filter.ranges[i].nmsrs;
6171
6172         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
6173         if (empty && !default_allow)
6174                 return -EINVAL;
6175
6176         new_filter = kvm_alloc_msr_filter(default_allow);
6177         if (!new_filter)
6178                 return -ENOMEM;
6179
6180         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6181                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6182                 if (r) {
6183                         kvm_free_msr_filter(new_filter);
6184                         return r;
6185                 }
6186         }
6187
6188         mutex_lock(&kvm->lock);
6189
6190         /* The per-VM filter is protected by kvm->lock... */
6191         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6192
6193         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6194         synchronize_srcu(&kvm->srcu);
6195
6196         kvm_free_msr_filter(old_filter);
6197
6198         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6199         mutex_unlock(&kvm->lock);
6200
6201         return 0;
6202 }
6203
6204 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6205 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6206 {
6207         struct kvm_vcpu *vcpu;
6208         unsigned long i;
6209         int ret = 0;
6210
6211         mutex_lock(&kvm->lock);
6212         kvm_for_each_vcpu(i, vcpu, kvm) {
6213                 if (!vcpu->arch.pv_time.active)
6214                         continue;
6215
6216                 ret = kvm_set_guest_paused(vcpu);
6217                 if (ret) {
6218                         kvm_err("Failed to pause guest VCPU%d: %d\n",
6219                                 vcpu->vcpu_id, ret);
6220                         break;
6221                 }
6222         }
6223         mutex_unlock(&kvm->lock);
6224
6225         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6226 }
6227
6228 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6229 {
6230         switch (state) {
6231         case PM_HIBERNATION_PREPARE:
6232         case PM_SUSPEND_PREPARE:
6233                 return kvm_arch_suspend_notifier(kvm);
6234         }
6235
6236         return NOTIFY_DONE;
6237 }
6238 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6239
6240 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6241 {
6242         struct kvm_clock_data data = { 0 };
6243
6244         get_kvmclock(kvm, &data);
6245         if (copy_to_user(argp, &data, sizeof(data)))
6246                 return -EFAULT;
6247
6248         return 0;
6249 }
6250
6251 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6252 {
6253         struct kvm_arch *ka = &kvm->arch;
6254         struct kvm_clock_data data;
6255         u64 now_raw_ns;
6256
6257         if (copy_from_user(&data, argp, sizeof(data)))
6258                 return -EFAULT;
6259
6260         /*
6261          * Only KVM_CLOCK_REALTIME is used, but allow passing the
6262          * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6263          */
6264         if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6265                 return -EINVAL;
6266
6267         kvm_hv_request_tsc_page_update(kvm);
6268         kvm_start_pvclock_update(kvm);
6269         pvclock_update_vm_gtod_copy(kvm);
6270
6271         /*
6272          * This pairs with kvm_guest_time_update(): when masterclock is
6273          * in use, we use master_kernel_ns + kvmclock_offset to set
6274          * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6275          * is slightly ahead) here we risk going negative on unsigned
6276          * 'system_time' when 'data.clock' is very small.
6277          */
6278         if (data.flags & KVM_CLOCK_REALTIME) {
6279                 u64 now_real_ns = ktime_get_real_ns();
6280
6281                 /*
6282                  * Avoid stepping the kvmclock backwards.
6283                  */
6284                 if (now_real_ns > data.realtime)
6285                         data.clock += now_real_ns - data.realtime;
6286         }
6287
6288         if (ka->use_master_clock)
6289                 now_raw_ns = ka->master_kernel_ns;
6290         else
6291                 now_raw_ns = get_kvmclock_base_ns();
6292         ka->kvmclock_offset = data.clock - now_raw_ns;
6293         kvm_end_pvclock_update(kvm);
6294         return 0;
6295 }
6296
6297 long kvm_arch_vm_ioctl(struct file *filp,
6298                        unsigned int ioctl, unsigned long arg)
6299 {
6300         struct kvm *kvm = filp->private_data;
6301         void __user *argp = (void __user *)arg;
6302         int r = -ENOTTY;
6303         /*
6304          * This union makes it completely explicit to gcc-3.x
6305          * that these two variables' stack usage should be
6306          * combined, not added together.
6307          */
6308         union {
6309                 struct kvm_pit_state ps;
6310                 struct kvm_pit_state2 ps2;
6311                 struct kvm_pit_config pit_config;
6312         } u;
6313
6314         switch (ioctl) {
6315         case KVM_SET_TSS_ADDR:
6316                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6317                 break;
6318         case KVM_SET_IDENTITY_MAP_ADDR: {
6319                 u64 ident_addr;
6320
6321                 mutex_lock(&kvm->lock);
6322                 r = -EINVAL;
6323                 if (kvm->created_vcpus)
6324                         goto set_identity_unlock;
6325                 r = -EFAULT;
6326                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6327                         goto set_identity_unlock;
6328                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6329 set_identity_unlock:
6330                 mutex_unlock(&kvm->lock);
6331                 break;
6332         }
6333         case KVM_SET_NR_MMU_PAGES:
6334                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6335                 break;
6336         case KVM_GET_NR_MMU_PAGES:
6337                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6338                 break;
6339         case KVM_CREATE_IRQCHIP: {
6340                 mutex_lock(&kvm->lock);
6341
6342                 r = -EEXIST;
6343                 if (irqchip_in_kernel(kvm))
6344                         goto create_irqchip_unlock;
6345
6346                 r = -EINVAL;
6347                 if (kvm->created_vcpus)
6348                         goto create_irqchip_unlock;
6349
6350                 r = kvm_pic_init(kvm);
6351                 if (r)
6352                         goto create_irqchip_unlock;
6353
6354                 r = kvm_ioapic_init(kvm);
6355                 if (r) {
6356                         kvm_pic_destroy(kvm);
6357                         goto create_irqchip_unlock;
6358                 }
6359
6360                 r = kvm_setup_default_irq_routing(kvm);
6361                 if (r) {
6362                         kvm_ioapic_destroy(kvm);
6363                         kvm_pic_destroy(kvm);
6364                         goto create_irqchip_unlock;
6365                 }
6366                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6367                 smp_wmb();
6368                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6369                 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
6370         create_irqchip_unlock:
6371                 mutex_unlock(&kvm->lock);
6372                 break;
6373         }
6374         case KVM_CREATE_PIT:
6375                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6376                 goto create_pit;
6377         case KVM_CREATE_PIT2:
6378                 r = -EFAULT;
6379                 if (copy_from_user(&u.pit_config, argp,
6380                                    sizeof(struct kvm_pit_config)))
6381                         goto out;
6382         create_pit:
6383                 mutex_lock(&kvm->lock);
6384                 r = -EEXIST;
6385                 if (kvm->arch.vpit)
6386                         goto create_pit_unlock;
6387                 r = -ENOMEM;
6388                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6389                 if (kvm->arch.vpit)
6390                         r = 0;
6391         create_pit_unlock:
6392                 mutex_unlock(&kvm->lock);
6393                 break;
6394         case KVM_GET_IRQCHIP: {
6395                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6396                 struct kvm_irqchip *chip;
6397
6398                 chip = memdup_user(argp, sizeof(*chip));
6399                 if (IS_ERR(chip)) {
6400                         r = PTR_ERR(chip);
6401                         goto out;
6402                 }
6403
6404                 r = -ENXIO;
6405                 if (!irqchip_kernel(kvm))
6406                         goto get_irqchip_out;
6407                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6408                 if (r)
6409                         goto get_irqchip_out;
6410                 r = -EFAULT;
6411                 if (copy_to_user(argp, chip, sizeof(*chip)))
6412                         goto get_irqchip_out;
6413                 r = 0;
6414         get_irqchip_out:
6415                 kfree(chip);
6416                 break;
6417         }
6418         case KVM_SET_IRQCHIP: {
6419                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6420                 struct kvm_irqchip *chip;
6421
6422                 chip = memdup_user(argp, sizeof(*chip));
6423                 if (IS_ERR(chip)) {
6424                         r = PTR_ERR(chip);
6425                         goto out;
6426                 }
6427
6428                 r = -ENXIO;
6429                 if (!irqchip_kernel(kvm))
6430                         goto set_irqchip_out;
6431                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6432         set_irqchip_out:
6433                 kfree(chip);
6434                 break;
6435         }
6436         case KVM_GET_PIT: {
6437                 r = -EFAULT;
6438                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6439                         goto out;
6440                 r = -ENXIO;
6441                 if (!kvm->arch.vpit)
6442                         goto out;
6443                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6444                 if (r)
6445                         goto out;
6446                 r = -EFAULT;
6447                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6448                         goto out;
6449                 r = 0;
6450                 break;
6451         }
6452         case KVM_SET_PIT: {
6453                 r = -EFAULT;
6454                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6455                         goto out;
6456                 mutex_lock(&kvm->lock);
6457                 r = -ENXIO;
6458                 if (!kvm->arch.vpit)
6459                         goto set_pit_out;
6460                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6461 set_pit_out:
6462                 mutex_unlock(&kvm->lock);
6463                 break;
6464         }
6465         case KVM_GET_PIT2: {
6466                 r = -ENXIO;
6467                 if (!kvm->arch.vpit)
6468                         goto out;
6469                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6470                 if (r)
6471                         goto out;
6472                 r = -EFAULT;
6473                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6474                         goto out;
6475                 r = 0;
6476                 break;
6477         }
6478         case KVM_SET_PIT2: {
6479                 r = -EFAULT;
6480                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6481                         goto out;
6482                 mutex_lock(&kvm->lock);
6483                 r = -ENXIO;
6484                 if (!kvm->arch.vpit)
6485                         goto set_pit2_out;
6486                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6487 set_pit2_out:
6488                 mutex_unlock(&kvm->lock);
6489                 break;
6490         }
6491         case KVM_REINJECT_CONTROL: {
6492                 struct kvm_reinject_control control;
6493                 r =  -EFAULT;
6494                 if (copy_from_user(&control, argp, sizeof(control)))
6495                         goto out;
6496                 r = -ENXIO;
6497                 if (!kvm->arch.vpit)
6498                         goto out;
6499                 r = kvm_vm_ioctl_reinject(kvm, &control);
6500                 break;
6501         }
6502         case KVM_SET_BOOT_CPU_ID:
6503                 r = 0;
6504                 mutex_lock(&kvm->lock);
6505                 if (kvm->created_vcpus)
6506                         r = -EBUSY;
6507                 else
6508                         kvm->arch.bsp_vcpu_id = arg;
6509                 mutex_unlock(&kvm->lock);
6510                 break;
6511 #ifdef CONFIG_KVM_XEN
6512         case KVM_XEN_HVM_CONFIG: {
6513                 struct kvm_xen_hvm_config xhc;
6514                 r = -EFAULT;
6515                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6516                         goto out;
6517                 r = kvm_xen_hvm_config(kvm, &xhc);
6518                 break;
6519         }
6520         case KVM_XEN_HVM_GET_ATTR: {
6521                 struct kvm_xen_hvm_attr xha;
6522
6523                 r = -EFAULT;
6524                 if (copy_from_user(&xha, argp, sizeof(xha)))
6525                         goto out;
6526                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6527                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6528                         r = -EFAULT;
6529                 break;
6530         }
6531         case KVM_XEN_HVM_SET_ATTR: {
6532                 struct kvm_xen_hvm_attr xha;
6533
6534                 r = -EFAULT;
6535                 if (copy_from_user(&xha, argp, sizeof(xha)))
6536                         goto out;
6537                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6538                 break;
6539         }
6540         case KVM_XEN_HVM_EVTCHN_SEND: {
6541                 struct kvm_irq_routing_xen_evtchn uxe;
6542
6543                 r = -EFAULT;
6544                 if (copy_from_user(&uxe, argp, sizeof(uxe)))
6545                         goto out;
6546                 r = kvm_xen_hvm_evtchn_send(kvm, &uxe);
6547                 break;
6548         }
6549 #endif
6550         case KVM_SET_CLOCK:
6551                 r = kvm_vm_ioctl_set_clock(kvm, argp);
6552                 break;
6553         case KVM_GET_CLOCK:
6554                 r = kvm_vm_ioctl_get_clock(kvm, argp);
6555                 break;
6556         case KVM_SET_TSC_KHZ: {
6557                 u32 user_tsc_khz;
6558
6559                 r = -EINVAL;
6560                 user_tsc_khz = (u32)arg;
6561
6562                 if (kvm_has_tsc_control &&
6563                     user_tsc_khz >= kvm_max_guest_tsc_khz)
6564                         goto out;
6565
6566                 if (user_tsc_khz == 0)
6567                         user_tsc_khz = tsc_khz;
6568
6569                 WRITE_ONCE(kvm->arch.default_tsc_khz, user_tsc_khz);
6570                 r = 0;
6571
6572                 goto out;
6573         }
6574         case KVM_GET_TSC_KHZ: {
6575                 r = READ_ONCE(kvm->arch.default_tsc_khz);
6576                 goto out;
6577         }
6578         case KVM_MEMORY_ENCRYPT_OP: {
6579                 r = -ENOTTY;
6580                 if (!kvm_x86_ops.mem_enc_ioctl)
6581                         goto out;
6582
6583                 r = static_call(kvm_x86_mem_enc_ioctl)(kvm, argp);
6584                 break;
6585         }
6586         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6587                 struct kvm_enc_region region;
6588
6589                 r = -EFAULT;
6590                 if (copy_from_user(&region, argp, sizeof(region)))
6591                         goto out;
6592
6593                 r = -ENOTTY;
6594                 if (!kvm_x86_ops.mem_enc_register_region)
6595                         goto out;
6596
6597                 r = static_call(kvm_x86_mem_enc_register_region)(kvm, &region);
6598                 break;
6599         }
6600         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6601                 struct kvm_enc_region region;
6602
6603                 r = -EFAULT;
6604                 if (copy_from_user(&region, argp, sizeof(region)))
6605                         goto out;
6606
6607                 r = -ENOTTY;
6608                 if (!kvm_x86_ops.mem_enc_unregister_region)
6609                         goto out;
6610
6611                 r = static_call(kvm_x86_mem_enc_unregister_region)(kvm, &region);
6612                 break;
6613         }
6614         case KVM_HYPERV_EVENTFD: {
6615                 struct kvm_hyperv_eventfd hvevfd;
6616
6617                 r = -EFAULT;
6618                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6619                         goto out;
6620                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6621                 break;
6622         }
6623         case KVM_SET_PMU_EVENT_FILTER:
6624                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6625                 break;
6626         case KVM_X86_SET_MSR_FILTER:
6627                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6628                 break;
6629         default:
6630                 r = -ENOTTY;
6631         }
6632 out:
6633         return r;
6634 }
6635
6636 static void kvm_init_msr_list(void)
6637 {
6638         struct x86_pmu_capability x86_pmu;
6639         u32 dummy[2];
6640         unsigned i;
6641
6642         BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED != 3,
6643                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6644
6645         perf_get_x86_pmu_capability(&x86_pmu);
6646
6647         num_msrs_to_save = 0;
6648         num_emulated_msrs = 0;
6649         num_msr_based_features = 0;
6650
6651         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6652                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6653                         continue;
6654
6655                 /*
6656                  * Even MSRs that are valid in the host may not be exposed
6657                  * to the guests in some cases.
6658                  */
6659                 switch (msrs_to_save_all[i]) {
6660                 case MSR_IA32_BNDCFGS:
6661                         if (!kvm_mpx_supported())
6662                                 continue;
6663                         break;
6664                 case MSR_TSC_AUX:
6665                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6666                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6667                                 continue;
6668                         break;
6669                 case MSR_IA32_UMWAIT_CONTROL:
6670                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6671                                 continue;
6672                         break;
6673                 case MSR_IA32_RTIT_CTL:
6674                 case MSR_IA32_RTIT_STATUS:
6675                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6676                                 continue;
6677                         break;
6678                 case MSR_IA32_RTIT_CR3_MATCH:
6679                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6680                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6681                                 continue;
6682                         break;
6683                 case MSR_IA32_RTIT_OUTPUT_BASE:
6684                 case MSR_IA32_RTIT_OUTPUT_MASK:
6685                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6686                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6687                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6688                                 continue;
6689                         break;
6690                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6691                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6692                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6693                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6694                                 continue;
6695                         break;
6696                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6697                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6698                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6699                                 continue;
6700                         break;
6701                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6702                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6703                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6704                                 continue;
6705                         break;
6706                 case MSR_IA32_XFD:
6707                 case MSR_IA32_XFD_ERR:
6708                         if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
6709                                 continue;
6710                         break;
6711                 default:
6712                         break;
6713                 }
6714
6715                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6716         }
6717
6718         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6719                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6720                         continue;
6721
6722                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6723         }
6724
6725         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6726                 struct kvm_msr_entry msr;
6727
6728                 msr.index = msr_based_features_all[i];
6729                 if (kvm_get_msr_feature(&msr))
6730                         continue;
6731
6732                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6733         }
6734 }
6735
6736 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6737                            const void *v)
6738 {
6739         int handled = 0;
6740         int n;
6741
6742         do {
6743                 n = min(len, 8);
6744                 if (!(lapic_in_kernel(vcpu) &&
6745                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6746                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6747                         break;
6748                 handled += n;
6749                 addr += n;
6750                 len -= n;
6751                 v += n;
6752         } while (len);
6753
6754         return handled;
6755 }
6756
6757 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6758 {
6759         int handled = 0;
6760         int n;
6761
6762         do {
6763                 n = min(len, 8);
6764                 if (!(lapic_in_kernel(vcpu) &&
6765                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6766                                          addr, n, v))
6767                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6768                         break;
6769                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6770                 handled += n;
6771                 addr += n;
6772                 len -= n;
6773                 v += n;
6774         } while (len);
6775
6776         return handled;
6777 }
6778
6779 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6780                         struct kvm_segment *var, int seg)
6781 {
6782         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6783 }
6784
6785 void kvm_get_segment(struct kvm_vcpu *vcpu,
6786                      struct kvm_segment *var, int seg)
6787 {
6788         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6789 }
6790
6791 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u64 access,
6792                            struct x86_exception *exception)
6793 {
6794         struct kvm_mmu *mmu = vcpu->arch.mmu;
6795         gpa_t t_gpa;
6796
6797         BUG_ON(!mmu_is_nested(vcpu));
6798
6799         /* NPT walks are always user-walks */
6800         access |= PFERR_USER_MASK;
6801         t_gpa  = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
6802
6803         return t_gpa;
6804 }
6805
6806 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6807                               struct x86_exception *exception)
6808 {
6809         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6810
6811         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6812         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6813 }
6814 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6815
6816  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6817                                 struct x86_exception *exception)
6818 {
6819         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6820
6821         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6822         access |= PFERR_FETCH_MASK;
6823         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6824 }
6825
6826 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6827                                struct x86_exception *exception)
6828 {
6829         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6830
6831         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6832         access |= PFERR_WRITE_MASK;
6833         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6834 }
6835 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6836
6837 /* uses this to access any guest's mapped memory without checking CPL */
6838 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6839                                 struct x86_exception *exception)
6840 {
6841         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6842
6843         return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
6844 }
6845
6846 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6847                                       struct kvm_vcpu *vcpu, u64 access,
6848                                       struct x86_exception *exception)
6849 {
6850         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6851         void *data = val;
6852         int r = X86EMUL_CONTINUE;
6853
6854         while (bytes) {
6855                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6856                 unsigned offset = addr & (PAGE_SIZE-1);
6857                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6858                 int ret;
6859
6860                 if (gpa == UNMAPPED_GVA)
6861                         return X86EMUL_PROPAGATE_FAULT;
6862                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6863                                                offset, toread);
6864                 if (ret < 0) {
6865                         r = X86EMUL_IO_NEEDED;
6866                         goto out;
6867                 }
6868
6869                 bytes -= toread;
6870                 data += toread;
6871                 addr += toread;
6872         }
6873 out:
6874         return r;
6875 }
6876
6877 /* used for instruction fetching */
6878 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6879                                 gva_t addr, void *val, unsigned int bytes,
6880                                 struct x86_exception *exception)
6881 {
6882         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6883         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6884         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6885         unsigned offset;
6886         int ret;
6887
6888         /* Inline kvm_read_guest_virt_helper for speed.  */
6889         gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
6890                                     exception);
6891         if (unlikely(gpa == UNMAPPED_GVA))
6892                 return X86EMUL_PROPAGATE_FAULT;
6893
6894         offset = addr & (PAGE_SIZE-1);
6895         if (WARN_ON(offset + bytes > PAGE_SIZE))
6896                 bytes = (unsigned)PAGE_SIZE - offset;
6897         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6898                                        offset, bytes);
6899         if (unlikely(ret < 0))
6900                 return X86EMUL_IO_NEEDED;
6901
6902         return X86EMUL_CONTINUE;
6903 }
6904
6905 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6906                                gva_t addr, void *val, unsigned int bytes,
6907                                struct x86_exception *exception)
6908 {
6909         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6910
6911         /*
6912          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6913          * is returned, but our callers are not ready for that and they blindly
6914          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6915          * uninitialized kernel stack memory into cr2 and error code.
6916          */
6917         memset(exception, 0, sizeof(*exception));
6918         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6919                                           exception);
6920 }
6921 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6922
6923 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6924                              gva_t addr, void *val, unsigned int bytes,
6925                              struct x86_exception *exception, bool system)
6926 {
6927         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6928         u64 access = 0;
6929
6930         if (system)
6931                 access |= PFERR_IMPLICIT_ACCESS;
6932         else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
6933                 access |= PFERR_USER_MASK;
6934
6935         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6936 }
6937
6938 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6939                 unsigned long addr, void *val, unsigned int bytes)
6940 {
6941         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6942         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6943
6944         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6945 }
6946
6947 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6948                                       struct kvm_vcpu *vcpu, u64 access,
6949                                       struct x86_exception *exception)
6950 {
6951         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6952         void *data = val;
6953         int r = X86EMUL_CONTINUE;
6954
6955         while (bytes) {
6956                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6957                 unsigned offset = addr & (PAGE_SIZE-1);
6958                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6959                 int ret;
6960
6961                 if (gpa == UNMAPPED_GVA)
6962                         return X86EMUL_PROPAGATE_FAULT;
6963                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6964                 if (ret < 0) {
6965                         r = X86EMUL_IO_NEEDED;
6966                         goto out;
6967                 }
6968
6969                 bytes -= towrite;
6970                 data += towrite;
6971                 addr += towrite;
6972         }
6973 out:
6974         return r;
6975 }
6976
6977 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6978                               unsigned int bytes, struct x86_exception *exception,
6979                               bool system)
6980 {
6981         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6982         u64 access = PFERR_WRITE_MASK;
6983
6984         if (system)
6985                 access |= PFERR_IMPLICIT_ACCESS;
6986         else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
6987                 access |= PFERR_USER_MASK;
6988
6989         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6990                                            access, exception);
6991 }
6992
6993 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6994                                 unsigned int bytes, struct x86_exception *exception)
6995 {
6996         /* kvm_write_guest_virt_system can pull in tons of pages. */
6997         vcpu->arch.l1tf_flush_l1d = true;
6998
6999         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
7000                                            PFERR_WRITE_MASK, exception);
7001 }
7002 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
7003
7004 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
7005                                 void *insn, int insn_len)
7006 {
7007         return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
7008                                                             insn, insn_len);
7009 }
7010
7011 int handle_ud(struct kvm_vcpu *vcpu)
7012 {
7013         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
7014         int emul_type = EMULTYPE_TRAP_UD;
7015         char sig[5]; /* ud2; .ascii "kvm" */
7016         struct x86_exception e;
7017
7018         if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
7019                 return 1;
7020
7021         if (force_emulation_prefix &&
7022             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
7023                                 sig, sizeof(sig), &e) == 0 &&
7024             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
7025                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
7026                 emul_type = EMULTYPE_TRAP_UD_FORCED;
7027         }
7028
7029         return kvm_emulate_instruction(vcpu, emul_type);
7030 }
7031 EXPORT_SYMBOL_GPL(handle_ud);
7032
7033 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7034                             gpa_t gpa, bool write)
7035 {
7036         /* For APIC access vmexit */
7037         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7038                 return 1;
7039
7040         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
7041                 trace_vcpu_match_mmio(gva, gpa, write, true);
7042                 return 1;
7043         }
7044
7045         return 0;
7046 }
7047
7048 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7049                                 gpa_t *gpa, struct x86_exception *exception,
7050                                 bool write)
7051 {
7052         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7053         u64 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
7054                 | (write ? PFERR_WRITE_MASK : 0);
7055
7056         /*
7057          * currently PKRU is only applied to ept enabled guest so
7058          * there is no pkey in EPT page table for L1 guest or EPT
7059          * shadow page table for L2 guest.
7060          */
7061         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
7062             !permission_fault(vcpu, vcpu->arch.walk_mmu,
7063                               vcpu->arch.mmio_access, 0, access))) {
7064                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
7065                                         (gva & (PAGE_SIZE - 1));
7066                 trace_vcpu_match_mmio(gva, *gpa, write, false);
7067                 return 1;
7068         }
7069
7070         *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7071
7072         if (*gpa == UNMAPPED_GVA)
7073                 return -1;
7074
7075         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
7076 }
7077
7078 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
7079                         const void *val, int bytes)
7080 {
7081         int ret;
7082
7083         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
7084         if (ret < 0)
7085                 return 0;
7086         kvm_page_track_write(vcpu, gpa, val, bytes);
7087         return 1;
7088 }
7089
7090 struct read_write_emulator_ops {
7091         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
7092                                   int bytes);
7093         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
7094                                   void *val, int bytes);
7095         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7096                                int bytes, void *val);
7097         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7098                                     void *val, int bytes);
7099         bool write;
7100 };
7101
7102 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
7103 {
7104         if (vcpu->mmio_read_completed) {
7105                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
7106                                vcpu->mmio_fragments[0].gpa, val);
7107                 vcpu->mmio_read_completed = 0;
7108                 return 1;
7109         }
7110
7111         return 0;
7112 }
7113
7114 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7115                         void *val, int bytes)
7116 {
7117         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
7118 }
7119
7120 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7121                          void *val, int bytes)
7122 {
7123         return emulator_write_phys(vcpu, gpa, val, bytes);
7124 }
7125
7126 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
7127 {
7128         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7129         return vcpu_mmio_write(vcpu, gpa, bytes, val);
7130 }
7131
7132 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7133                           void *val, int bytes)
7134 {
7135         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7136         return X86EMUL_IO_NEEDED;
7137 }
7138
7139 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7140                            void *val, int bytes)
7141 {
7142         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7143
7144         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7145         return X86EMUL_CONTINUE;
7146 }
7147
7148 static const struct read_write_emulator_ops read_emultor = {
7149         .read_write_prepare = read_prepare,
7150         .read_write_emulate = read_emulate,
7151         .read_write_mmio = vcpu_mmio_read,
7152         .read_write_exit_mmio = read_exit_mmio,
7153 };
7154
7155 static const struct read_write_emulator_ops write_emultor = {
7156         .read_write_emulate = write_emulate,
7157         .read_write_mmio = write_mmio,
7158         .read_write_exit_mmio = write_exit_mmio,
7159         .write = true,
7160 };
7161
7162 static int emulator_read_write_onepage(unsigned long addr, void *val,
7163                                        unsigned int bytes,
7164                                        struct x86_exception *exception,
7165                                        struct kvm_vcpu *vcpu,
7166                                        const struct read_write_emulator_ops *ops)
7167 {
7168         gpa_t gpa;
7169         int handled, ret;
7170         bool write = ops->write;
7171         struct kvm_mmio_fragment *frag;
7172         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7173
7174         /*
7175          * If the exit was due to a NPF we may already have a GPA.
7176          * If the GPA is present, use it to avoid the GVA to GPA table walk.
7177          * Note, this cannot be used on string operations since string
7178          * operation using rep will only have the initial GPA from the NPF
7179          * occurred.
7180          */
7181         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7182             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7183                 gpa = ctxt->gpa_val;
7184                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7185         } else {
7186                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7187                 if (ret < 0)
7188                         return X86EMUL_PROPAGATE_FAULT;
7189         }
7190
7191         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7192                 return X86EMUL_CONTINUE;
7193
7194         /*
7195          * Is this MMIO handled locally?
7196          */
7197         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7198         if (handled == bytes)
7199                 return X86EMUL_CONTINUE;
7200
7201         gpa += handled;
7202         bytes -= handled;
7203         val += handled;
7204
7205         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7206         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7207         frag->gpa = gpa;
7208         frag->data = val;
7209         frag->len = bytes;
7210         return X86EMUL_CONTINUE;
7211 }
7212
7213 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7214                         unsigned long addr,
7215                         void *val, unsigned int bytes,
7216                         struct x86_exception *exception,
7217                         const struct read_write_emulator_ops *ops)
7218 {
7219         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7220         gpa_t gpa;
7221         int rc;
7222
7223         if (ops->read_write_prepare &&
7224                   ops->read_write_prepare(vcpu, val, bytes))
7225                 return X86EMUL_CONTINUE;
7226
7227         vcpu->mmio_nr_fragments = 0;
7228
7229         /* Crossing a page boundary? */
7230         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7231                 int now;
7232
7233                 now = -addr & ~PAGE_MASK;
7234                 rc = emulator_read_write_onepage(addr, val, now, exception,
7235                                                  vcpu, ops);
7236
7237                 if (rc != X86EMUL_CONTINUE)
7238                         return rc;
7239                 addr += now;
7240                 if (ctxt->mode != X86EMUL_MODE_PROT64)
7241                         addr = (u32)addr;
7242                 val += now;
7243                 bytes -= now;
7244         }
7245
7246         rc = emulator_read_write_onepage(addr, val, bytes, exception,
7247                                          vcpu, ops);
7248         if (rc != X86EMUL_CONTINUE)
7249                 return rc;
7250
7251         if (!vcpu->mmio_nr_fragments)
7252                 return rc;
7253
7254         gpa = vcpu->mmio_fragments[0].gpa;
7255
7256         vcpu->mmio_needed = 1;
7257         vcpu->mmio_cur_fragment = 0;
7258
7259         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7260         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7261         vcpu->run->exit_reason = KVM_EXIT_MMIO;
7262         vcpu->run->mmio.phys_addr = gpa;
7263
7264         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7265 }
7266
7267 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7268                                   unsigned long addr,
7269                                   void *val,
7270                                   unsigned int bytes,
7271                                   struct x86_exception *exception)
7272 {
7273         return emulator_read_write(ctxt, addr, val, bytes,
7274                                    exception, &read_emultor);
7275 }
7276
7277 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7278                             unsigned long addr,
7279                             const void *val,
7280                             unsigned int bytes,
7281                             struct x86_exception *exception)
7282 {
7283         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7284                                    exception, &write_emultor);
7285 }
7286
7287 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7288         (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7289
7290 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7291                                      unsigned long addr,
7292                                      const void *old,
7293                                      const void *new,
7294                                      unsigned int bytes,
7295                                      struct x86_exception *exception)
7296 {
7297         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7298         u64 page_line_mask;
7299         unsigned long hva;
7300         gpa_t gpa;
7301         int r;
7302
7303         /* guests cmpxchg8b have to be emulated atomically */
7304         if (bytes > 8 || (bytes & (bytes - 1)))
7305                 goto emul_write;
7306
7307         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7308
7309         if (gpa == UNMAPPED_GVA ||
7310             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7311                 goto emul_write;
7312
7313         /*
7314          * Emulate the atomic as a straight write to avoid #AC if SLD is
7315          * enabled in the host and the access splits a cache line.
7316          */
7317         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7318                 page_line_mask = ~(cache_line_size() - 1);
7319         else
7320                 page_line_mask = PAGE_MASK;
7321
7322         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7323                 goto emul_write;
7324
7325         hva = kvm_vcpu_gfn_to_hva(vcpu, gpa_to_gfn(gpa));
7326         if (kvm_is_error_hva(hva))
7327                 goto emul_write;
7328
7329         hva += offset_in_page(gpa);
7330
7331         switch (bytes) {
7332         case 1:
7333                 r = emulator_try_cmpxchg_user(u8, hva, old, new);
7334                 break;
7335         case 2:
7336                 r = emulator_try_cmpxchg_user(u16, hva, old, new);
7337                 break;
7338         case 4:
7339                 r = emulator_try_cmpxchg_user(u32, hva, old, new);
7340                 break;
7341         case 8:
7342                 r = emulator_try_cmpxchg_user(u64, hva, old, new);
7343                 break;
7344         default:
7345                 BUG();
7346         }
7347
7348         if (r < 0)
7349                 return X86EMUL_UNHANDLEABLE;
7350         if (r)
7351                 return X86EMUL_CMPXCHG_FAILED;
7352
7353         kvm_page_track_write(vcpu, gpa, new, bytes);
7354
7355         return X86EMUL_CONTINUE;
7356
7357 emul_write:
7358         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7359
7360         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7361 }
7362
7363 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7364 {
7365         int r = 0, i;
7366
7367         for (i = 0; i < vcpu->arch.pio.count; i++) {
7368                 if (vcpu->arch.pio.in)
7369                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7370                                             vcpu->arch.pio.size, pd);
7371                 else
7372                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7373                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
7374                                              pd);
7375                 if (r)
7376                         break;
7377                 pd += vcpu->arch.pio.size;
7378         }
7379         return r;
7380 }
7381
7382 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7383                                unsigned short port,
7384                                unsigned int count, bool in)
7385 {
7386         vcpu->arch.pio.port = port;
7387         vcpu->arch.pio.in = in;
7388         vcpu->arch.pio.count  = count;
7389         vcpu->arch.pio.size = size;
7390
7391         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7392                 return 1;
7393
7394         vcpu->run->exit_reason = KVM_EXIT_IO;
7395         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7396         vcpu->run->io.size = size;
7397         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7398         vcpu->run->io.count = count;
7399         vcpu->run->io.port = port;
7400
7401         return 0;
7402 }
7403
7404 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7405                              unsigned short port, unsigned int count)
7406 {
7407         WARN_ON(vcpu->arch.pio.count);
7408         memset(vcpu->arch.pio_data, 0, size * count);
7409         return emulator_pio_in_out(vcpu, size, port, count, true);
7410 }
7411
7412 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7413 {
7414         int size = vcpu->arch.pio.size;
7415         unsigned count = vcpu->arch.pio.count;
7416         memcpy(val, vcpu->arch.pio_data, size * count);
7417         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7418         vcpu->arch.pio.count = 0;
7419 }
7420
7421 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7422                            unsigned short port, void *val, unsigned int count)
7423 {
7424         if (vcpu->arch.pio.count) {
7425                 /*
7426                  * Complete a previous iteration that required userspace I/O.
7427                  * Note, @count isn't guaranteed to match pio.count as userspace
7428                  * can modify ECX before rerunning the vCPU.  Ignore any such
7429                  * shenanigans as KVM doesn't support modifying the rep count,
7430                  * and the emulator ensures @count doesn't overflow the buffer.
7431                  */
7432         } else {
7433                 int r = __emulator_pio_in(vcpu, size, port, count);
7434                 if (!r)
7435                         return r;
7436
7437                 /* Results already available, fall through.  */
7438         }
7439
7440         complete_emulator_pio_in(vcpu, val);
7441         return 1;
7442 }
7443
7444 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7445                                     int size, unsigned short port, void *val,
7446                                     unsigned int count)
7447 {
7448         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7449
7450 }
7451
7452 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7453                             unsigned short port, const void *val,
7454                             unsigned int count)
7455 {
7456         int ret;
7457
7458         memcpy(vcpu->arch.pio_data, val, size * count);
7459         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7460         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7461         if (ret)
7462                 vcpu->arch.pio.count = 0;
7463
7464         return ret;
7465 }
7466
7467 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7468                                      int size, unsigned short port,
7469                                      const void *val, unsigned int count)
7470 {
7471         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7472 }
7473
7474 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7475 {
7476         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7477 }
7478
7479 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7480 {
7481         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7482 }
7483
7484 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7485 {
7486         if (!need_emulate_wbinvd(vcpu))
7487                 return X86EMUL_CONTINUE;
7488
7489         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7490                 int cpu = get_cpu();
7491
7492                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7493                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7494                                 wbinvd_ipi, NULL, 1);
7495                 put_cpu();
7496                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7497         } else
7498                 wbinvd();
7499         return X86EMUL_CONTINUE;
7500 }
7501
7502 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7503 {
7504         kvm_emulate_wbinvd_noskip(vcpu);
7505         return kvm_skip_emulated_instruction(vcpu);
7506 }
7507 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7508
7509
7510
7511 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7512 {
7513         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7514 }
7515
7516 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7517                             unsigned long *dest)
7518 {
7519         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7520 }
7521
7522 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7523                            unsigned long value)
7524 {
7525
7526         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7527 }
7528
7529 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7530 {
7531         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7532 }
7533
7534 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7535 {
7536         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7537         unsigned long value;
7538
7539         switch (cr) {
7540         case 0:
7541                 value = kvm_read_cr0(vcpu);
7542                 break;
7543         case 2:
7544                 value = vcpu->arch.cr2;
7545                 break;
7546         case 3:
7547                 value = kvm_read_cr3(vcpu);
7548                 break;
7549         case 4:
7550                 value = kvm_read_cr4(vcpu);
7551                 break;
7552         case 8:
7553                 value = kvm_get_cr8(vcpu);
7554                 break;
7555         default:
7556                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7557                 return 0;
7558         }
7559
7560         return value;
7561 }
7562
7563 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7564 {
7565         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7566         int res = 0;
7567
7568         switch (cr) {
7569         case 0:
7570                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7571                 break;
7572         case 2:
7573                 vcpu->arch.cr2 = val;
7574                 break;
7575         case 3:
7576                 res = kvm_set_cr3(vcpu, val);
7577                 break;
7578         case 4:
7579                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7580                 break;
7581         case 8:
7582                 res = kvm_set_cr8(vcpu, val);
7583                 break;
7584         default:
7585                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7586                 res = -1;
7587         }
7588
7589         return res;
7590 }
7591
7592 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7593 {
7594         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7595 }
7596
7597 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7598 {
7599         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7600 }
7601
7602 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7603 {
7604         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7605 }
7606
7607 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7608 {
7609         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7610 }
7611
7612 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7613 {
7614         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7615 }
7616
7617 static unsigned long emulator_get_cached_segment_base(
7618         struct x86_emulate_ctxt *ctxt, int seg)
7619 {
7620         return get_segment_base(emul_to_vcpu(ctxt), seg);
7621 }
7622
7623 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7624                                  struct desc_struct *desc, u32 *base3,
7625                                  int seg)
7626 {
7627         struct kvm_segment var;
7628
7629         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7630         *selector = var.selector;
7631
7632         if (var.unusable) {
7633                 memset(desc, 0, sizeof(*desc));
7634                 if (base3)
7635                         *base3 = 0;
7636                 return false;
7637         }
7638
7639         if (var.g)
7640                 var.limit >>= 12;
7641         set_desc_limit(desc, var.limit);
7642         set_desc_base(desc, (unsigned long)var.base);
7643 #ifdef CONFIG_X86_64
7644         if (base3)
7645                 *base3 = var.base >> 32;
7646 #endif
7647         desc->type = var.type;
7648         desc->s = var.s;
7649         desc->dpl = var.dpl;
7650         desc->p = var.present;
7651         desc->avl = var.avl;
7652         desc->l = var.l;
7653         desc->d = var.db;
7654         desc->g = var.g;
7655
7656         return true;
7657 }
7658
7659 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7660                                  struct desc_struct *desc, u32 base3,
7661                                  int seg)
7662 {
7663         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7664         struct kvm_segment var;
7665
7666         var.selector = selector;
7667         var.base = get_desc_base(desc);
7668 #ifdef CONFIG_X86_64
7669         var.base |= ((u64)base3) << 32;
7670 #endif
7671         var.limit = get_desc_limit(desc);
7672         if (desc->g)
7673                 var.limit = (var.limit << 12) | 0xfff;
7674         var.type = desc->type;
7675         var.dpl = desc->dpl;
7676         var.db = desc->d;
7677         var.s = desc->s;
7678         var.l = desc->l;
7679         var.g = desc->g;
7680         var.avl = desc->avl;
7681         var.present = desc->p;
7682         var.unusable = !var.present;
7683         var.padding = 0;
7684
7685         kvm_set_segment(vcpu, &var, seg);
7686         return;
7687 }
7688
7689 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7690                                         u32 msr_index, u64 *pdata)
7691 {
7692         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7693         int r;
7694
7695         r = kvm_get_msr_with_filter(vcpu, msr_index, pdata);
7696
7697         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7698                                     complete_emulated_rdmsr, r)) {
7699                 /* Bounce to user space */
7700                 return X86EMUL_IO_NEEDED;
7701         }
7702
7703         return r;
7704 }
7705
7706 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7707                                         u32 msr_index, u64 data)
7708 {
7709         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7710         int r;
7711
7712         r = kvm_set_msr_with_filter(vcpu, msr_index, data);
7713
7714         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7715                                     complete_emulated_msr_access, r)) {
7716                 /* Bounce to user space */
7717                 return X86EMUL_IO_NEEDED;
7718         }
7719
7720         return r;
7721 }
7722
7723 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7724                             u32 msr_index, u64 *pdata)
7725 {
7726         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
7727 }
7728
7729 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7730                             u32 msr_index, u64 data)
7731 {
7732         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
7733 }
7734
7735 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7736 {
7737         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7738
7739         return vcpu->arch.smbase;
7740 }
7741
7742 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7743 {
7744         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7745
7746         vcpu->arch.smbase = smbase;
7747 }
7748
7749 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7750                               u32 pmc)
7751 {
7752         if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7753                 return 0;
7754         return -EINVAL;
7755 }
7756
7757 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7758                              u32 pmc, u64 *pdata)
7759 {
7760         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7761 }
7762
7763 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7764 {
7765         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7766 }
7767
7768 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7769                               struct x86_instruction_info *info,
7770                               enum x86_intercept_stage stage)
7771 {
7772         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7773                                             &ctxt->exception);
7774 }
7775
7776 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7777                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7778                               bool exact_only)
7779 {
7780         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7781 }
7782
7783 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7784 {
7785         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7786 }
7787
7788 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7789 {
7790         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7791 }
7792
7793 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7794 {
7795         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7796 }
7797
7798 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
7799 {
7800         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
7801 }
7802
7803 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7804 {
7805         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7806 }
7807
7808 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7809 {
7810         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7811 }
7812
7813 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7814 {
7815         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7816 }
7817
7818 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7819 {
7820         return emul_to_vcpu(ctxt)->arch.hflags;
7821 }
7822
7823 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7824 {
7825         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7826
7827         kvm_smm_changed(vcpu, false);
7828 }
7829
7830 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7831                                   const char *smstate)
7832 {
7833         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7834 }
7835
7836 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7837 {
7838         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7839 }
7840
7841 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7842 {
7843         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7844 }
7845
7846 static const struct x86_emulate_ops emulate_ops = {
7847         .read_gpr            = emulator_read_gpr,
7848         .write_gpr           = emulator_write_gpr,
7849         .read_std            = emulator_read_std,
7850         .write_std           = emulator_write_std,
7851         .read_phys           = kvm_read_guest_phys_system,
7852         .fetch               = kvm_fetch_guest_virt,
7853         .read_emulated       = emulator_read_emulated,
7854         .write_emulated      = emulator_write_emulated,
7855         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7856         .invlpg              = emulator_invlpg,
7857         .pio_in_emulated     = emulator_pio_in_emulated,
7858         .pio_out_emulated    = emulator_pio_out_emulated,
7859         .get_segment         = emulator_get_segment,
7860         .set_segment         = emulator_set_segment,
7861         .get_cached_segment_base = emulator_get_cached_segment_base,
7862         .get_gdt             = emulator_get_gdt,
7863         .get_idt             = emulator_get_idt,
7864         .set_gdt             = emulator_set_gdt,
7865         .set_idt             = emulator_set_idt,
7866         .get_cr              = emulator_get_cr,
7867         .set_cr              = emulator_set_cr,
7868         .cpl                 = emulator_get_cpl,
7869         .get_dr              = emulator_get_dr,
7870         .set_dr              = emulator_set_dr,
7871         .get_smbase          = emulator_get_smbase,
7872         .set_smbase          = emulator_set_smbase,
7873         .set_msr_with_filter = emulator_set_msr_with_filter,
7874         .get_msr_with_filter = emulator_get_msr_with_filter,
7875         .set_msr             = emulator_set_msr,
7876         .get_msr             = emulator_get_msr,
7877         .check_pmc           = emulator_check_pmc,
7878         .read_pmc            = emulator_read_pmc,
7879         .halt                = emulator_halt,
7880         .wbinvd              = emulator_wbinvd,
7881         .fix_hypercall       = emulator_fix_hypercall,
7882         .intercept           = emulator_intercept,
7883         .get_cpuid           = emulator_get_cpuid,
7884         .guest_has_long_mode = emulator_guest_has_long_mode,
7885         .guest_has_movbe     = emulator_guest_has_movbe,
7886         .guest_has_fxsr      = emulator_guest_has_fxsr,
7887         .guest_has_rdpid     = emulator_guest_has_rdpid,
7888         .set_nmi_mask        = emulator_set_nmi_mask,
7889         .get_hflags          = emulator_get_hflags,
7890         .exiting_smm         = emulator_exiting_smm,
7891         .leave_smm           = emulator_leave_smm,
7892         .triple_fault        = emulator_triple_fault,
7893         .set_xcr             = emulator_set_xcr,
7894 };
7895
7896 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7897 {
7898         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7899         /*
7900          * an sti; sti; sequence only disable interrupts for the first
7901          * instruction. So, if the last instruction, be it emulated or
7902          * not, left the system with the INT_STI flag enabled, it
7903          * means that the last instruction is an sti. We should not
7904          * leave the flag on in this case. The same goes for mov ss
7905          */
7906         if (int_shadow & mask)
7907                 mask = 0;
7908         if (unlikely(int_shadow || mask)) {
7909                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7910                 if (!mask)
7911                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7912         }
7913 }
7914
7915 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7916 {
7917         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7918         if (ctxt->exception.vector == PF_VECTOR)
7919                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7920
7921         if (ctxt->exception.error_code_valid)
7922                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7923                                       ctxt->exception.error_code);
7924         else
7925                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7926         return false;
7927 }
7928
7929 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7930 {
7931         struct x86_emulate_ctxt *ctxt;
7932
7933         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7934         if (!ctxt) {
7935                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7936                 return NULL;
7937         }
7938
7939         ctxt->vcpu = vcpu;
7940         ctxt->ops = &emulate_ops;
7941         vcpu->arch.emulate_ctxt = ctxt;
7942
7943         return ctxt;
7944 }
7945
7946 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7947 {
7948         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7949         int cs_db, cs_l;
7950
7951         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7952
7953         ctxt->gpa_available = false;
7954         ctxt->eflags = kvm_get_rflags(vcpu);
7955         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7956
7957         ctxt->eip = kvm_rip_read(vcpu);
7958         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7959                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7960                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7961                      cs_db                              ? X86EMUL_MODE_PROT32 :
7962                                                           X86EMUL_MODE_PROT16;
7963         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7964         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7965         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7966
7967         ctxt->interruptibility = 0;
7968         ctxt->have_exception = false;
7969         ctxt->exception.vector = -1;
7970         ctxt->perm_ok = false;
7971
7972         init_decode_cache(ctxt);
7973         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7974 }
7975
7976 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7977 {
7978         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7979         int ret;
7980
7981         init_emulate_ctxt(vcpu);
7982
7983         ctxt->op_bytes = 2;
7984         ctxt->ad_bytes = 2;
7985         ctxt->_eip = ctxt->eip + inc_eip;
7986         ret = emulate_int_real(ctxt, irq);
7987
7988         if (ret != X86EMUL_CONTINUE) {
7989                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7990         } else {
7991                 ctxt->eip = ctxt->_eip;
7992                 kvm_rip_write(vcpu, ctxt->eip);
7993                 kvm_set_rflags(vcpu, ctxt->eflags);
7994         }
7995 }
7996 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7997
7998 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7999                                            u8 ndata, u8 *insn_bytes, u8 insn_size)
8000 {
8001         struct kvm_run *run = vcpu->run;
8002         u64 info[5];
8003         u8 info_start;
8004
8005         /*
8006          * Zero the whole array used to retrieve the exit info, as casting to
8007          * u32 for select entries will leave some chunks uninitialized.
8008          */
8009         memset(&info, 0, sizeof(info));
8010
8011         static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
8012                                            &info[2], (u32 *)&info[3],
8013                                            (u32 *)&info[4]);
8014
8015         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8016         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
8017
8018         /*
8019          * There's currently space for 13 entries, but 5 are used for the exit
8020          * reason and info.  Restrict to 4 to reduce the maintenance burden
8021          * when expanding kvm_run.emulation_failure in the future.
8022          */
8023         if (WARN_ON_ONCE(ndata > 4))
8024                 ndata = 4;
8025
8026         /* Always include the flags as a 'data' entry. */
8027         info_start = 1;
8028         run->emulation_failure.flags = 0;
8029
8030         if (insn_size) {
8031                 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
8032                               sizeof(run->emulation_failure.insn_bytes) != 16));
8033                 info_start += 2;
8034                 run->emulation_failure.flags |=
8035                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
8036                 run->emulation_failure.insn_size = insn_size;
8037                 memset(run->emulation_failure.insn_bytes, 0x90,
8038                        sizeof(run->emulation_failure.insn_bytes));
8039                 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
8040         }
8041
8042         memcpy(&run->internal.data[info_start], info, sizeof(info));
8043         memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
8044                ndata * sizeof(data[0]));
8045
8046         run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
8047 }
8048
8049 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
8050 {
8051         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8052
8053         prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
8054                                        ctxt->fetch.end - ctxt->fetch.data);
8055 }
8056
8057 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8058                                           u8 ndata)
8059 {
8060         prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
8061 }
8062 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
8063
8064 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
8065 {
8066         __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
8067 }
8068 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
8069
8070 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
8071 {
8072         struct kvm *kvm = vcpu->kvm;
8073
8074         ++vcpu->stat.insn_emulation_fail;
8075         trace_kvm_emulate_insn_failed(vcpu);
8076
8077         if (emulation_type & EMULTYPE_VMWARE_GP) {
8078                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8079                 return 1;
8080         }
8081
8082         if (kvm->arch.exit_on_emulation_error ||
8083             (emulation_type & EMULTYPE_SKIP)) {
8084                 prepare_emulation_ctxt_failure_exit(vcpu);
8085                 return 0;
8086         }
8087
8088         kvm_queue_exception(vcpu, UD_VECTOR);
8089
8090         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
8091                 prepare_emulation_ctxt_failure_exit(vcpu);
8092                 return 0;
8093         }
8094
8095         return 1;
8096 }
8097
8098 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8099                                   bool write_fault_to_shadow_pgtable,
8100                                   int emulation_type)
8101 {
8102         gpa_t gpa = cr2_or_gpa;
8103         kvm_pfn_t pfn;
8104
8105         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8106                 return false;
8107
8108         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8109             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8110                 return false;
8111
8112         if (!vcpu->arch.mmu->root_role.direct) {
8113                 /*
8114                  * Write permission should be allowed since only
8115                  * write access need to be emulated.
8116                  */
8117                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8118
8119                 /*
8120                  * If the mapping is invalid in guest, let cpu retry
8121                  * it to generate fault.
8122                  */
8123                 if (gpa == UNMAPPED_GVA)
8124                         return true;
8125         }
8126
8127         /*
8128          * Do not retry the unhandleable instruction if it faults on the
8129          * readonly host memory, otherwise it will goto a infinite loop:
8130          * retry instruction -> write #PF -> emulation fail -> retry
8131          * instruction -> ...
8132          */
8133         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
8134
8135         /*
8136          * If the instruction failed on the error pfn, it can not be fixed,
8137          * report the error to userspace.
8138          */
8139         if (is_error_noslot_pfn(pfn))
8140                 return false;
8141
8142         kvm_release_pfn_clean(pfn);
8143
8144         /* The instructions are well-emulated on direct mmu. */
8145         if (vcpu->arch.mmu->root_role.direct) {
8146                 unsigned int indirect_shadow_pages;
8147
8148                 write_lock(&vcpu->kvm->mmu_lock);
8149                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8150                 write_unlock(&vcpu->kvm->mmu_lock);
8151
8152                 if (indirect_shadow_pages)
8153                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8154
8155                 return true;
8156         }
8157
8158         /*
8159          * if emulation was due to access to shadowed page table
8160          * and it failed try to unshadow page and re-enter the
8161          * guest to let CPU execute the instruction.
8162          */
8163         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8164
8165         /*
8166          * If the access faults on its page table, it can not
8167          * be fixed by unprotecting shadow page and it should
8168          * be reported to userspace.
8169          */
8170         return !write_fault_to_shadow_pgtable;
8171 }
8172
8173 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8174                               gpa_t cr2_or_gpa,  int emulation_type)
8175 {
8176         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8177         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8178
8179         last_retry_eip = vcpu->arch.last_retry_eip;
8180         last_retry_addr = vcpu->arch.last_retry_addr;
8181
8182         /*
8183          * If the emulation is caused by #PF and it is non-page_table
8184          * writing instruction, it means the VM-EXIT is caused by shadow
8185          * page protected, we can zap the shadow page and retry this
8186          * instruction directly.
8187          *
8188          * Note: if the guest uses a non-page-table modifying instruction
8189          * on the PDE that points to the instruction, then we will unmap
8190          * the instruction and go to an infinite loop. So, we cache the
8191          * last retried eip and the last fault address, if we meet the eip
8192          * and the address again, we can break out of the potential infinite
8193          * loop.
8194          */
8195         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8196
8197         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8198                 return false;
8199
8200         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8201             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8202                 return false;
8203
8204         if (x86_page_table_writing_insn(ctxt))
8205                 return false;
8206
8207         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8208                 return false;
8209
8210         vcpu->arch.last_retry_eip = ctxt->eip;
8211         vcpu->arch.last_retry_addr = cr2_or_gpa;
8212
8213         if (!vcpu->arch.mmu->root_role.direct)
8214                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8215
8216         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8217
8218         return true;
8219 }
8220
8221 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8222 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8223
8224 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
8225 {
8226         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
8227
8228         if (entering_smm) {
8229                 vcpu->arch.hflags |= HF_SMM_MASK;
8230         } else {
8231                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
8232
8233                 /* Process a latched INIT or SMI, if any.  */
8234                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8235
8236                 /*
8237                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8238                  * on SMM exit we still need to reload them from
8239                  * guest memory
8240                  */
8241                 vcpu->arch.pdptrs_from_userspace = false;
8242         }
8243
8244         kvm_mmu_reset_context(vcpu);
8245 }
8246
8247 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8248                                 unsigned long *db)
8249 {
8250         u32 dr6 = 0;
8251         int i;
8252         u32 enable, rwlen;
8253
8254         enable = dr7;
8255         rwlen = dr7 >> 16;
8256         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8257                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8258                         dr6 |= (1 << i);
8259         return dr6;
8260 }
8261
8262 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8263 {
8264         struct kvm_run *kvm_run = vcpu->run;
8265
8266         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8267                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8268                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8269                 kvm_run->debug.arch.exception = DB_VECTOR;
8270                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8271                 return 0;
8272         }
8273         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8274         return 1;
8275 }
8276
8277 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8278 {
8279         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8280         int r;
8281
8282         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8283         if (unlikely(!r))
8284                 return 0;
8285
8286         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8287
8288         /*
8289          * rflags is the old, "raw" value of the flags.  The new value has
8290          * not been saved yet.
8291          *
8292          * This is correct even for TF set by the guest, because "the
8293          * processor will not generate this exception after the instruction
8294          * that sets the TF flag".
8295          */
8296         if (unlikely(rflags & X86_EFLAGS_TF))
8297                 r = kvm_vcpu_do_singlestep(vcpu);
8298         return r;
8299 }
8300 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8301
8302 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, int *r)
8303 {
8304         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8305             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8306                 struct kvm_run *kvm_run = vcpu->run;
8307                 unsigned long eip = kvm_get_linear_rip(vcpu);
8308                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8309                                            vcpu->arch.guest_debug_dr7,
8310                                            vcpu->arch.eff_db);
8311
8312                 if (dr6 != 0) {
8313                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8314                         kvm_run->debug.arch.pc = eip;
8315                         kvm_run->debug.arch.exception = DB_VECTOR;
8316                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
8317                         *r = 0;
8318                         return true;
8319                 }
8320         }
8321
8322         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8323             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8324                 unsigned long eip = kvm_get_linear_rip(vcpu);
8325                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8326                                            vcpu->arch.dr7,
8327                                            vcpu->arch.db);
8328
8329                 if (dr6 != 0) {
8330                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8331                         *r = 1;
8332                         return true;
8333                 }
8334         }
8335
8336         return false;
8337 }
8338
8339 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8340 {
8341         switch (ctxt->opcode_len) {
8342         case 1:
8343                 switch (ctxt->b) {
8344                 case 0xe4:      /* IN */
8345                 case 0xe5:
8346                 case 0xec:
8347                 case 0xed:
8348                 case 0xe6:      /* OUT */
8349                 case 0xe7:
8350                 case 0xee:
8351                 case 0xef:
8352                 case 0x6c:      /* INS */
8353                 case 0x6d:
8354                 case 0x6e:      /* OUTS */
8355                 case 0x6f:
8356                         return true;
8357                 }
8358                 break;
8359         case 2:
8360                 switch (ctxt->b) {
8361                 case 0x33:      /* RDPMC */
8362                         return true;
8363                 }
8364                 break;
8365         }
8366
8367         return false;
8368 }
8369
8370 /*
8371  * Decode an instruction for emulation.  The caller is responsible for handling
8372  * code breakpoints.  Note, manually detecting code breakpoints is unnecessary
8373  * (and wrong) when emulating on an intercepted fault-like exception[*], as
8374  * code breakpoints have higher priority and thus have already been done by
8375  * hardware.
8376  *
8377  * [*] Except #MC, which is higher priority, but KVM should never emulate in
8378  *     response to a machine check.
8379  */
8380 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8381                                     void *insn, int insn_len)
8382 {
8383         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8384         int r;
8385
8386         init_emulate_ctxt(vcpu);
8387
8388         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8389
8390         trace_kvm_emulate_insn_start(vcpu);
8391         ++vcpu->stat.insn_emulation;
8392
8393         return r;
8394 }
8395 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8396
8397 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8398                             int emulation_type, void *insn, int insn_len)
8399 {
8400         int r;
8401         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8402         bool writeback = true;
8403         bool write_fault_to_spt;
8404
8405         if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8406                 return 1;
8407
8408         vcpu->arch.l1tf_flush_l1d = true;
8409
8410         /*
8411          * Clear write_fault_to_shadow_pgtable here to ensure it is
8412          * never reused.
8413          */
8414         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8415         vcpu->arch.write_fault_to_shadow_pgtable = false;
8416
8417         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8418                 kvm_clear_exception_queue(vcpu);
8419
8420                 /*
8421                  * Return immediately if RIP hits a code breakpoint, such #DBs
8422                  * are fault-like and are higher priority than any faults on
8423                  * the code fetch itself.
8424                  */
8425                 if (!(emulation_type & EMULTYPE_SKIP) &&
8426                     kvm_vcpu_check_code_breakpoint(vcpu, &r))
8427                         return r;
8428
8429                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8430                                                     insn, insn_len);
8431                 if (r != EMULATION_OK)  {
8432                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8433                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8434                                 kvm_queue_exception(vcpu, UD_VECTOR);
8435                                 return 1;
8436                         }
8437                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8438                                                   write_fault_to_spt,
8439                                                   emulation_type))
8440                                 return 1;
8441                         if (ctxt->have_exception) {
8442                                 /*
8443                                  * #UD should result in just EMULATION_FAILED, and trap-like
8444                                  * exception should not be encountered during decode.
8445                                  */
8446                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8447                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8448                                 inject_emulated_exception(vcpu);
8449                                 return 1;
8450                         }
8451                         return handle_emulation_failure(vcpu, emulation_type);
8452                 }
8453         }
8454
8455         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8456             !is_vmware_backdoor_opcode(ctxt)) {
8457                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8458                 return 1;
8459         }
8460
8461         /*
8462          * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8463          * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8464          * The caller is responsible for updating interruptibility state and
8465          * injecting single-step #DBs.
8466          */
8467         if (emulation_type & EMULTYPE_SKIP) {
8468                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8469                         ctxt->eip = (u32)ctxt->_eip;
8470                 else
8471                         ctxt->eip = ctxt->_eip;
8472
8473                 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8474                         r = 1;
8475                         goto writeback;
8476                 }
8477
8478                 kvm_rip_write(vcpu, ctxt->eip);
8479                 if (ctxt->eflags & X86_EFLAGS_RF)
8480                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8481                 return 1;
8482         }
8483
8484         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8485                 return 1;
8486
8487         /* this is needed for vmware backdoor interface to work since it
8488            changes registers values  during IO operation */
8489         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8490                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8491                 emulator_invalidate_register_cache(ctxt);
8492         }
8493
8494 restart:
8495         if (emulation_type & EMULTYPE_PF) {
8496                 /* Save the faulting GPA (cr2) in the address field */
8497                 ctxt->exception.address = cr2_or_gpa;
8498
8499                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8500                 if (vcpu->arch.mmu->root_role.direct) {
8501                         ctxt->gpa_available = true;
8502                         ctxt->gpa_val = cr2_or_gpa;
8503                 }
8504         } else {
8505                 /* Sanitize the address out of an abundance of paranoia. */
8506                 ctxt->exception.address = 0;
8507         }
8508
8509         r = x86_emulate_insn(ctxt);
8510
8511         if (r == EMULATION_INTERCEPTED)
8512                 return 1;
8513
8514         if (r == EMULATION_FAILED) {
8515                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8516                                         emulation_type))
8517                         return 1;
8518
8519                 return handle_emulation_failure(vcpu, emulation_type);
8520         }
8521
8522         if (ctxt->have_exception) {
8523                 r = 1;
8524                 if (inject_emulated_exception(vcpu))
8525                         return r;
8526         } else if (vcpu->arch.pio.count) {
8527                 if (!vcpu->arch.pio.in) {
8528                         /* FIXME: return into emulator if single-stepping.  */
8529                         vcpu->arch.pio.count = 0;
8530                 } else {
8531                         writeback = false;
8532                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8533                 }
8534                 r = 0;
8535         } else if (vcpu->mmio_needed) {
8536                 ++vcpu->stat.mmio_exits;
8537
8538                 if (!vcpu->mmio_is_write)
8539                         writeback = false;
8540                 r = 0;
8541                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8542         } else if (vcpu->arch.complete_userspace_io) {
8543                 writeback = false;
8544                 r = 0;
8545         } else if (r == EMULATION_RESTART)
8546                 goto restart;
8547         else
8548                 r = 1;
8549
8550 writeback:
8551         if (writeback) {
8552                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8553                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8554                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8555                 if (!ctxt->have_exception ||
8556                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8557                         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8558                         if (ctxt->is_branch)
8559                                 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8560                         kvm_rip_write(vcpu, ctxt->eip);
8561                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8562                                 r = kvm_vcpu_do_singlestep(vcpu);
8563                         static_call_cond(kvm_x86_update_emulated_instruction)(vcpu);
8564                         __kvm_set_rflags(vcpu, ctxt->eflags);
8565                 }
8566
8567                 /*
8568                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8569                  * do nothing, and it will be requested again as soon as
8570                  * the shadow expires.  But we still need to check here,
8571                  * because POPF has no interrupt shadow.
8572                  */
8573                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8574                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8575         } else
8576                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8577
8578         return r;
8579 }
8580
8581 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8582 {
8583         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8584 }
8585 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8586
8587 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8588                                         void *insn, int insn_len)
8589 {
8590         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8591 }
8592 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8593
8594 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8595 {
8596         vcpu->arch.pio.count = 0;
8597         return 1;
8598 }
8599
8600 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8601 {
8602         vcpu->arch.pio.count = 0;
8603
8604         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8605                 return 1;
8606
8607         return kvm_skip_emulated_instruction(vcpu);
8608 }
8609
8610 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8611                             unsigned short port)
8612 {
8613         unsigned long val = kvm_rax_read(vcpu);
8614         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8615
8616         if (ret)
8617                 return ret;
8618
8619         /*
8620          * Workaround userspace that relies on old KVM behavior of %rip being
8621          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8622          */
8623         if (port == 0x7e &&
8624             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8625                 vcpu->arch.complete_userspace_io =
8626                         complete_fast_pio_out_port_0x7e;
8627                 kvm_skip_emulated_instruction(vcpu);
8628         } else {
8629                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8630                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8631         }
8632         return 0;
8633 }
8634
8635 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8636 {
8637         unsigned long val;
8638
8639         /* We should only ever be called with arch.pio.count equal to 1 */
8640         BUG_ON(vcpu->arch.pio.count != 1);
8641
8642         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8643                 vcpu->arch.pio.count = 0;
8644                 return 1;
8645         }
8646
8647         /* For size less than 4 we merge, else we zero extend */
8648         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8649
8650         /*
8651          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8652          * the copy and tracing
8653          */
8654         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8655         kvm_rax_write(vcpu, val);
8656
8657         return kvm_skip_emulated_instruction(vcpu);
8658 }
8659
8660 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8661                            unsigned short port)
8662 {
8663         unsigned long val;
8664         int ret;
8665
8666         /* For size less than 4 we merge, else we zero extend */
8667         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8668
8669         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8670         if (ret) {
8671                 kvm_rax_write(vcpu, val);
8672                 return ret;
8673         }
8674
8675         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8676         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8677
8678         return 0;
8679 }
8680
8681 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8682 {
8683         int ret;
8684
8685         if (in)
8686                 ret = kvm_fast_pio_in(vcpu, size, port);
8687         else
8688                 ret = kvm_fast_pio_out(vcpu, size, port);
8689         return ret && kvm_skip_emulated_instruction(vcpu);
8690 }
8691 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8692
8693 static int kvmclock_cpu_down_prep(unsigned int cpu)
8694 {
8695         __this_cpu_write(cpu_tsc_khz, 0);
8696         return 0;
8697 }
8698
8699 static void tsc_khz_changed(void *data)
8700 {
8701         struct cpufreq_freqs *freq = data;
8702         unsigned long khz = 0;
8703
8704         if (data)
8705                 khz = freq->new;
8706         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8707                 khz = cpufreq_quick_get(raw_smp_processor_id());
8708         if (!khz)
8709                 khz = tsc_khz;
8710         __this_cpu_write(cpu_tsc_khz, khz);
8711 }
8712
8713 #ifdef CONFIG_X86_64
8714 static void kvm_hyperv_tsc_notifier(void)
8715 {
8716         struct kvm *kvm;
8717         int cpu;
8718
8719         mutex_lock(&kvm_lock);
8720         list_for_each_entry(kvm, &vm_list, vm_list)
8721                 kvm_make_mclock_inprogress_request(kvm);
8722
8723         /* no guest entries from this point */
8724         hyperv_stop_tsc_emulation();
8725
8726         /* TSC frequency always matches when on Hyper-V */
8727         for_each_present_cpu(cpu)
8728                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8729         kvm_max_guest_tsc_khz = tsc_khz;
8730
8731         list_for_each_entry(kvm, &vm_list, vm_list) {
8732                 __kvm_start_pvclock_update(kvm);
8733                 pvclock_update_vm_gtod_copy(kvm);
8734                 kvm_end_pvclock_update(kvm);
8735         }
8736
8737         mutex_unlock(&kvm_lock);
8738 }
8739 #endif
8740
8741 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8742 {
8743         struct kvm *kvm;
8744         struct kvm_vcpu *vcpu;
8745         int send_ipi = 0;
8746         unsigned long i;
8747
8748         /*
8749          * We allow guests to temporarily run on slowing clocks,
8750          * provided we notify them after, or to run on accelerating
8751          * clocks, provided we notify them before.  Thus time never
8752          * goes backwards.
8753          *
8754          * However, we have a problem.  We can't atomically update
8755          * the frequency of a given CPU from this function; it is
8756          * merely a notifier, which can be called from any CPU.
8757          * Changing the TSC frequency at arbitrary points in time
8758          * requires a recomputation of local variables related to
8759          * the TSC for each VCPU.  We must flag these local variables
8760          * to be updated and be sure the update takes place with the
8761          * new frequency before any guests proceed.
8762          *
8763          * Unfortunately, the combination of hotplug CPU and frequency
8764          * change creates an intractable locking scenario; the order
8765          * of when these callouts happen is undefined with respect to
8766          * CPU hotplug, and they can race with each other.  As such,
8767          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8768          * undefined; you can actually have a CPU frequency change take
8769          * place in between the computation of X and the setting of the
8770          * variable.  To protect against this problem, all updates of
8771          * the per_cpu tsc_khz variable are done in an interrupt
8772          * protected IPI, and all callers wishing to update the value
8773          * must wait for a synchronous IPI to complete (which is trivial
8774          * if the caller is on the CPU already).  This establishes the
8775          * necessary total order on variable updates.
8776          *
8777          * Note that because a guest time update may take place
8778          * anytime after the setting of the VCPU's request bit, the
8779          * correct TSC value must be set before the request.  However,
8780          * to ensure the update actually makes it to any guest which
8781          * starts running in hardware virtualization between the set
8782          * and the acquisition of the spinlock, we must also ping the
8783          * CPU after setting the request bit.
8784          *
8785          */
8786
8787         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8788
8789         mutex_lock(&kvm_lock);
8790         list_for_each_entry(kvm, &vm_list, vm_list) {
8791                 kvm_for_each_vcpu(i, vcpu, kvm) {
8792                         if (vcpu->cpu != cpu)
8793                                 continue;
8794                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8795                         if (vcpu->cpu != raw_smp_processor_id())
8796                                 send_ipi = 1;
8797                 }
8798         }
8799         mutex_unlock(&kvm_lock);
8800
8801         if (freq->old < freq->new && send_ipi) {
8802                 /*
8803                  * We upscale the frequency.  Must make the guest
8804                  * doesn't see old kvmclock values while running with
8805                  * the new frequency, otherwise we risk the guest sees
8806                  * time go backwards.
8807                  *
8808                  * In case we update the frequency for another cpu
8809                  * (which might be in guest context) send an interrupt
8810                  * to kick the cpu out of guest context.  Next time
8811                  * guest context is entered kvmclock will be updated,
8812                  * so the guest will not see stale values.
8813                  */
8814                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8815         }
8816 }
8817
8818 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8819                                      void *data)
8820 {
8821         struct cpufreq_freqs *freq = data;
8822         int cpu;
8823
8824         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8825                 return 0;
8826         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8827                 return 0;
8828
8829         for_each_cpu(cpu, freq->policy->cpus)
8830                 __kvmclock_cpufreq_notifier(freq, cpu);
8831
8832         return 0;
8833 }
8834
8835 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8836         .notifier_call  = kvmclock_cpufreq_notifier
8837 };
8838
8839 static int kvmclock_cpu_online(unsigned int cpu)
8840 {
8841         tsc_khz_changed(NULL);
8842         return 0;
8843 }
8844
8845 static void kvm_timer_init(void)
8846 {
8847         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8848                 max_tsc_khz = tsc_khz;
8849
8850                 if (IS_ENABLED(CONFIG_CPU_FREQ)) {
8851                         struct cpufreq_policy *policy;
8852                         int cpu;
8853
8854                         cpu = get_cpu();
8855                         policy = cpufreq_cpu_get(cpu);
8856                         if (policy) {
8857                                 if (policy->cpuinfo.max_freq)
8858                                         max_tsc_khz = policy->cpuinfo.max_freq;
8859                                 cpufreq_cpu_put(policy);
8860                         }
8861                         put_cpu();
8862                 }
8863                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8864                                           CPUFREQ_TRANSITION_NOTIFIER);
8865         }
8866
8867         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8868                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8869 }
8870
8871 #ifdef CONFIG_X86_64
8872 static void pvclock_gtod_update_fn(struct work_struct *work)
8873 {
8874         struct kvm *kvm;
8875         struct kvm_vcpu *vcpu;
8876         unsigned long i;
8877
8878         mutex_lock(&kvm_lock);
8879         list_for_each_entry(kvm, &vm_list, vm_list)
8880                 kvm_for_each_vcpu(i, vcpu, kvm)
8881                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8882         atomic_set(&kvm_guest_has_master_clock, 0);
8883         mutex_unlock(&kvm_lock);
8884 }
8885
8886 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8887
8888 /*
8889  * Indirection to move queue_work() out of the tk_core.seq write held
8890  * region to prevent possible deadlocks against time accessors which
8891  * are invoked with work related locks held.
8892  */
8893 static void pvclock_irq_work_fn(struct irq_work *w)
8894 {
8895         queue_work(system_long_wq, &pvclock_gtod_work);
8896 }
8897
8898 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8899
8900 /*
8901  * Notification about pvclock gtod data update.
8902  */
8903 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8904                                void *priv)
8905 {
8906         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8907         struct timekeeper *tk = priv;
8908
8909         update_pvclock_gtod(tk);
8910
8911         /*
8912          * Disable master clock if host does not trust, or does not use,
8913          * TSC based clocksource. Delegate queue_work() to irq_work as
8914          * this is invoked with tk_core.seq write held.
8915          */
8916         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8917             atomic_read(&kvm_guest_has_master_clock) != 0)
8918                 irq_work_queue(&pvclock_irq_work);
8919         return 0;
8920 }
8921
8922 static struct notifier_block pvclock_gtod_notifier = {
8923         .notifier_call = pvclock_gtod_notify,
8924 };
8925 #endif
8926
8927 int kvm_arch_init(void *opaque)
8928 {
8929         struct kvm_x86_init_ops *ops = opaque;
8930         int r;
8931
8932         if (kvm_x86_ops.hardware_enable) {
8933                 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8934                 r = -EEXIST;
8935                 goto out;
8936         }
8937
8938         if (!ops->cpu_has_kvm_support()) {
8939                 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8940                                    ops->runtime_ops->name);
8941                 r = -EOPNOTSUPP;
8942                 goto out;
8943         }
8944         if (ops->disabled_by_bios()) {
8945                 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8946                                    ops->runtime_ops->name);
8947                 r = -EOPNOTSUPP;
8948                 goto out;
8949         }
8950
8951         /*
8952          * KVM explicitly assumes that the guest has an FPU and
8953          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8954          * vCPU's FPU state as a fxregs_state struct.
8955          */
8956         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8957                 printk(KERN_ERR "kvm: inadequate fpu\n");
8958                 r = -EOPNOTSUPP;
8959                 goto out;
8960         }
8961
8962         if (IS_ENABLED(CONFIG_PREEMPT_RT) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8963                 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
8964                 r = -EOPNOTSUPP;
8965                 goto out;
8966         }
8967
8968         r = -ENOMEM;
8969
8970         x86_emulator_cache = kvm_alloc_emulator_cache();
8971         if (!x86_emulator_cache) {
8972                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8973                 goto out;
8974         }
8975
8976         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8977         if (!user_return_msrs) {
8978                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8979                 goto out_free_x86_emulator_cache;
8980         }
8981         kvm_nr_uret_msrs = 0;
8982
8983         r = kvm_mmu_vendor_module_init();
8984         if (r)
8985                 goto out_free_percpu;
8986
8987         kvm_timer_init();
8988
8989         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8990                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8991                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8992         }
8993
8994         if (pi_inject_timer == -1)
8995                 pi_inject_timer = housekeeping_enabled(HK_TYPE_TIMER);
8996 #ifdef CONFIG_X86_64
8997         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8998
8999         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9000                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
9001 #endif
9002
9003         return 0;
9004
9005 out_free_percpu:
9006         free_percpu(user_return_msrs);
9007 out_free_x86_emulator_cache:
9008         kmem_cache_destroy(x86_emulator_cache);
9009 out:
9010         return r;
9011 }
9012
9013 void kvm_arch_exit(void)
9014 {
9015 #ifdef CONFIG_X86_64
9016         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9017                 clear_hv_tscchange_cb();
9018 #endif
9019         kvm_lapic_exit();
9020
9021         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
9022                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
9023                                             CPUFREQ_TRANSITION_NOTIFIER);
9024         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
9025 #ifdef CONFIG_X86_64
9026         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
9027         irq_work_sync(&pvclock_irq_work);
9028         cancel_work_sync(&pvclock_gtod_work);
9029 #endif
9030         kvm_x86_ops.hardware_enable = NULL;
9031         kvm_mmu_vendor_module_exit();
9032         free_percpu(user_return_msrs);
9033         kmem_cache_destroy(x86_emulator_cache);
9034 #ifdef CONFIG_KVM_XEN
9035         static_key_deferred_flush(&kvm_xen_enabled);
9036         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
9037 #endif
9038 }
9039
9040 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
9041 {
9042         /*
9043          * The vCPU has halted, e.g. executed HLT.  Update the run state if the
9044          * local APIC is in-kernel, the run loop will detect the non-runnable
9045          * state and halt the vCPU.  Exit to userspace if the local APIC is
9046          * managed by userspace, in which case userspace is responsible for
9047          * handling wake events.
9048          */
9049         ++vcpu->stat.halt_exits;
9050         if (lapic_in_kernel(vcpu)) {
9051                 vcpu->arch.mp_state = state;
9052                 return 1;
9053         } else {
9054                 vcpu->run->exit_reason = reason;
9055                 return 0;
9056         }
9057 }
9058
9059 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
9060 {
9061         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
9062 }
9063 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
9064
9065 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
9066 {
9067         int ret = kvm_skip_emulated_instruction(vcpu);
9068         /*
9069          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9070          * KVM_EXIT_DEBUG here.
9071          */
9072         return kvm_emulate_halt_noskip(vcpu) && ret;
9073 }
9074 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
9075
9076 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
9077 {
9078         int ret = kvm_skip_emulated_instruction(vcpu);
9079
9080         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
9081                                         KVM_EXIT_AP_RESET_HOLD) && ret;
9082 }
9083 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
9084
9085 #ifdef CONFIG_X86_64
9086 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
9087                                 unsigned long clock_type)
9088 {
9089         struct kvm_clock_pairing clock_pairing;
9090         struct timespec64 ts;
9091         u64 cycle;
9092         int ret;
9093
9094         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
9095                 return -KVM_EOPNOTSUPP;
9096
9097         /*
9098          * When tsc is in permanent catchup mode guests won't be able to use
9099          * pvclock_read_retry loop to get consistent view of pvclock
9100          */
9101         if (vcpu->arch.tsc_always_catchup)
9102                 return -KVM_EOPNOTSUPP;
9103
9104         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
9105                 return -KVM_EOPNOTSUPP;
9106
9107         clock_pairing.sec = ts.tv_sec;
9108         clock_pairing.nsec = ts.tv_nsec;
9109         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
9110         clock_pairing.flags = 0;
9111         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
9112
9113         ret = 0;
9114         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
9115                             sizeof(struct kvm_clock_pairing)))
9116                 ret = -KVM_EFAULT;
9117
9118         return ret;
9119 }
9120 #endif
9121
9122 /*
9123  * kvm_pv_kick_cpu_op:  Kick a vcpu.
9124  *
9125  * @apicid - apicid of vcpu to be kicked.
9126  */
9127 static void kvm_pv_kick_cpu_op(struct kvm *kvm, int apicid)
9128 {
9129         struct kvm_lapic_irq lapic_irq;
9130
9131         lapic_irq.shorthand = APIC_DEST_NOSHORT;
9132         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
9133         lapic_irq.level = 0;
9134         lapic_irq.dest_id = apicid;
9135         lapic_irq.msi_redir_hint = false;
9136
9137         lapic_irq.delivery_mode = APIC_DM_REMRD;
9138         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
9139 }
9140
9141 bool kvm_apicv_activated(struct kvm *kvm)
9142 {
9143         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
9144 }
9145 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
9146
9147 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu)
9148 {
9149         ulong vm_reasons = READ_ONCE(vcpu->kvm->arch.apicv_inhibit_reasons);
9150         ulong vcpu_reasons = static_call(kvm_x86_vcpu_get_apicv_inhibit_reasons)(vcpu);
9151
9152         return (vm_reasons | vcpu_reasons) == 0;
9153 }
9154 EXPORT_SYMBOL_GPL(kvm_vcpu_apicv_activated);
9155
9156 static void set_or_clear_apicv_inhibit(unsigned long *inhibits,
9157                                        enum kvm_apicv_inhibit reason, bool set)
9158 {
9159         if (set)
9160                 __set_bit(reason, inhibits);
9161         else
9162                 __clear_bit(reason, inhibits);
9163
9164         trace_kvm_apicv_inhibit_changed(reason, set, *inhibits);
9165 }
9166
9167 static void kvm_apicv_init(struct kvm *kvm)
9168 {
9169         unsigned long *inhibits = &kvm->arch.apicv_inhibit_reasons;
9170
9171         init_rwsem(&kvm->arch.apicv_update_lock);
9172
9173         set_or_clear_apicv_inhibit(inhibits, APICV_INHIBIT_REASON_ABSENT, true);
9174
9175         if (!enable_apicv)
9176                 set_or_clear_apicv_inhibit(inhibits,
9177                                            APICV_INHIBIT_REASON_DISABLE, true);
9178 }
9179
9180 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
9181 {
9182         struct kvm_vcpu *target = NULL;
9183         struct kvm_apic_map *map;
9184
9185         vcpu->stat.directed_yield_attempted++;
9186
9187         if (single_task_running())
9188                 goto no_yield;
9189
9190         rcu_read_lock();
9191         map = rcu_dereference(vcpu->kvm->arch.apic_map);
9192
9193         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9194                 target = map->phys_map[dest_id]->vcpu;
9195
9196         rcu_read_unlock();
9197
9198         if (!target || !READ_ONCE(target->ready))
9199                 goto no_yield;
9200
9201         /* Ignore requests to yield to self */
9202         if (vcpu == target)
9203                 goto no_yield;
9204
9205         if (kvm_vcpu_yield_to(target) <= 0)
9206                 goto no_yield;
9207
9208         vcpu->stat.directed_yield_successful++;
9209
9210 no_yield:
9211         return;
9212 }
9213
9214 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9215 {
9216         u64 ret = vcpu->run->hypercall.ret;
9217
9218         if (!is_64_bit_mode(vcpu))
9219                 ret = (u32)ret;
9220         kvm_rax_write(vcpu, ret);
9221         ++vcpu->stat.hypercalls;
9222         return kvm_skip_emulated_instruction(vcpu);
9223 }
9224
9225 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9226 {
9227         unsigned long nr, a0, a1, a2, a3, ret;
9228         int op_64_bit;
9229
9230         if (kvm_xen_hypercall_enabled(vcpu->kvm))
9231                 return kvm_xen_hypercall(vcpu);
9232
9233         if (kvm_hv_hypercall_enabled(vcpu))
9234                 return kvm_hv_hypercall(vcpu);
9235
9236         nr = kvm_rax_read(vcpu);
9237         a0 = kvm_rbx_read(vcpu);
9238         a1 = kvm_rcx_read(vcpu);
9239         a2 = kvm_rdx_read(vcpu);
9240         a3 = kvm_rsi_read(vcpu);
9241
9242         trace_kvm_hypercall(nr, a0, a1, a2, a3);
9243
9244         op_64_bit = is_64_bit_hypercall(vcpu);
9245         if (!op_64_bit) {
9246                 nr &= 0xFFFFFFFF;
9247                 a0 &= 0xFFFFFFFF;
9248                 a1 &= 0xFFFFFFFF;
9249                 a2 &= 0xFFFFFFFF;
9250                 a3 &= 0xFFFFFFFF;
9251         }
9252
9253         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9254                 ret = -KVM_EPERM;
9255                 goto out;
9256         }
9257
9258         ret = -KVM_ENOSYS;
9259
9260         switch (nr) {
9261         case KVM_HC_VAPIC_POLL_IRQ:
9262                 ret = 0;
9263                 break;
9264         case KVM_HC_KICK_CPU:
9265                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9266                         break;
9267
9268                 kvm_pv_kick_cpu_op(vcpu->kvm, a1);
9269                 kvm_sched_yield(vcpu, a1);
9270                 ret = 0;
9271                 break;
9272 #ifdef CONFIG_X86_64
9273         case KVM_HC_CLOCK_PAIRING:
9274                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9275                 break;
9276 #endif
9277         case KVM_HC_SEND_IPI:
9278                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9279                         break;
9280
9281                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9282                 break;
9283         case KVM_HC_SCHED_YIELD:
9284                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9285                         break;
9286
9287                 kvm_sched_yield(vcpu, a0);
9288                 ret = 0;
9289                 break;
9290         case KVM_HC_MAP_GPA_RANGE: {
9291                 u64 gpa = a0, npages = a1, attrs = a2;
9292
9293                 ret = -KVM_ENOSYS;
9294                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9295                         break;
9296
9297                 if (!PAGE_ALIGNED(gpa) || !npages ||
9298                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9299                         ret = -KVM_EINVAL;
9300                         break;
9301                 }
9302
9303                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
9304                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9305                 vcpu->run->hypercall.args[0]  = gpa;
9306                 vcpu->run->hypercall.args[1]  = npages;
9307                 vcpu->run->hypercall.args[2]  = attrs;
9308                 vcpu->run->hypercall.longmode = op_64_bit;
9309                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9310                 return 0;
9311         }
9312         default:
9313                 ret = -KVM_ENOSYS;
9314                 break;
9315         }
9316 out:
9317         if (!op_64_bit)
9318                 ret = (u32)ret;
9319         kvm_rax_write(vcpu, ret);
9320
9321         ++vcpu->stat.hypercalls;
9322         return kvm_skip_emulated_instruction(vcpu);
9323 }
9324 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9325
9326 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9327 {
9328         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9329         char instruction[3];
9330         unsigned long rip = kvm_rip_read(vcpu);
9331
9332         /*
9333          * If the quirk is disabled, synthesize a #UD and let the guest pick up
9334          * the pieces.
9335          */
9336         if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_FIX_HYPERCALL_INSN)) {
9337                 ctxt->exception.error_code_valid = false;
9338                 ctxt->exception.vector = UD_VECTOR;
9339                 ctxt->have_exception = true;
9340                 return X86EMUL_PROPAGATE_FAULT;
9341         }
9342
9343         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9344
9345         return emulator_write_emulated(ctxt, rip, instruction, 3,
9346                 &ctxt->exception);
9347 }
9348
9349 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9350 {
9351         return vcpu->run->request_interrupt_window &&
9352                 likely(!pic_in_kernel(vcpu->kvm));
9353 }
9354
9355 /* Called within kvm->srcu read side.  */
9356 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9357 {
9358         struct kvm_run *kvm_run = vcpu->run;
9359
9360         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9361         kvm_run->cr8 = kvm_get_cr8(vcpu);
9362         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9363
9364         kvm_run->ready_for_interrupt_injection =
9365                 pic_in_kernel(vcpu->kvm) ||
9366                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9367
9368         if (is_smm(vcpu))
9369                 kvm_run->flags |= KVM_RUN_X86_SMM;
9370 }
9371
9372 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9373 {
9374         int max_irr, tpr;
9375
9376         if (!kvm_x86_ops.update_cr8_intercept)
9377                 return;
9378
9379         if (!lapic_in_kernel(vcpu))
9380                 return;
9381
9382         if (vcpu->arch.apicv_active)
9383                 return;
9384
9385         if (!vcpu->arch.apic->vapic_addr)
9386                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9387         else
9388                 max_irr = -1;
9389
9390         if (max_irr != -1)
9391                 max_irr >>= 4;
9392
9393         tpr = kvm_lapic_get_cr8(vcpu);
9394
9395         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9396 }
9397
9398
9399 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9400 {
9401         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9402                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9403                 return 1;
9404         }
9405
9406         return kvm_x86_ops.nested_ops->check_events(vcpu);
9407 }
9408
9409 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9410 {
9411         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9412                 vcpu->arch.exception.error_code = false;
9413         static_call(kvm_x86_queue_exception)(vcpu);
9414 }
9415
9416 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9417 {
9418         int r;
9419         bool can_inject = true;
9420
9421         /* try to reinject previous events if any */
9422
9423         if (vcpu->arch.exception.injected) {
9424                 kvm_inject_exception(vcpu);
9425                 can_inject = false;
9426         }
9427         /*
9428          * Do not inject an NMI or interrupt if there is a pending
9429          * exception.  Exceptions and interrupts are recognized at
9430          * instruction boundaries, i.e. the start of an instruction.
9431          * Trap-like exceptions, e.g. #DB, have higher priority than
9432          * NMIs and interrupts, i.e. traps are recognized before an
9433          * NMI/interrupt that's pending on the same instruction.
9434          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9435          * priority, but are only generated (pended) during instruction
9436          * execution, i.e. a pending fault-like exception means the
9437          * fault occurred on the *previous* instruction and must be
9438          * serviced prior to recognizing any new events in order to
9439          * fully complete the previous instruction.
9440          */
9441         else if (!vcpu->arch.exception.pending) {
9442                 if (vcpu->arch.nmi_injected) {
9443                         static_call(kvm_x86_inject_nmi)(vcpu);
9444                         can_inject = false;
9445                 } else if (vcpu->arch.interrupt.injected) {
9446                         static_call(kvm_x86_inject_irq)(vcpu);
9447                         can_inject = false;
9448                 }
9449         }
9450
9451         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9452                      vcpu->arch.exception.pending);
9453
9454         /*
9455          * Call check_nested_events() even if we reinjected a previous event
9456          * in order for caller to determine if it should require immediate-exit
9457          * from L2 to L1 due to pending L1 events which require exit
9458          * from L2 to L1.
9459          */
9460         if (is_guest_mode(vcpu)) {
9461                 r = kvm_check_nested_events(vcpu);
9462                 if (r < 0)
9463                         goto out;
9464         }
9465
9466         /* try to inject new event if pending */
9467         if (vcpu->arch.exception.pending) {
9468                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9469                                         vcpu->arch.exception.has_error_code,
9470                                         vcpu->arch.exception.error_code);
9471
9472                 vcpu->arch.exception.pending = false;
9473                 vcpu->arch.exception.injected = true;
9474
9475                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9476                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9477                                              X86_EFLAGS_RF);
9478
9479                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9480                         kvm_deliver_exception_payload(vcpu);
9481                         if (vcpu->arch.dr7 & DR7_GD) {
9482                                 vcpu->arch.dr7 &= ~DR7_GD;
9483                                 kvm_update_dr7(vcpu);
9484                         }
9485                 }
9486
9487                 kvm_inject_exception(vcpu);
9488                 can_inject = false;
9489         }
9490
9491         /* Don't inject interrupts if the user asked to avoid doing so */
9492         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9493                 return 0;
9494
9495         /*
9496          * Finally, inject interrupt events.  If an event cannot be injected
9497          * due to architectural conditions (e.g. IF=0) a window-open exit
9498          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9499          * and can architecturally be injected, but we cannot do it right now:
9500          * an interrupt could have arrived just now and we have to inject it
9501          * as a vmexit, or there could already an event in the queue, which is
9502          * indicated by can_inject.  In that case we request an immediate exit
9503          * in order to make progress and get back here for another iteration.
9504          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9505          */
9506         if (vcpu->arch.smi_pending) {
9507                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9508                 if (r < 0)
9509                         goto out;
9510                 if (r) {
9511                         vcpu->arch.smi_pending = false;
9512                         ++vcpu->arch.smi_count;
9513                         enter_smm(vcpu);
9514                         can_inject = false;
9515                 } else
9516                         static_call(kvm_x86_enable_smi_window)(vcpu);
9517         }
9518
9519         if (vcpu->arch.nmi_pending) {
9520                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9521                 if (r < 0)
9522                         goto out;
9523                 if (r) {
9524                         --vcpu->arch.nmi_pending;
9525                         vcpu->arch.nmi_injected = true;
9526                         static_call(kvm_x86_inject_nmi)(vcpu);
9527                         can_inject = false;
9528                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9529                 }
9530                 if (vcpu->arch.nmi_pending)
9531                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9532         }
9533
9534         if (kvm_cpu_has_injectable_intr(vcpu)) {
9535                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9536                 if (r < 0)
9537                         goto out;
9538                 if (r) {
9539                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9540                         static_call(kvm_x86_inject_irq)(vcpu);
9541                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9542                 }
9543                 if (kvm_cpu_has_injectable_intr(vcpu))
9544                         static_call(kvm_x86_enable_irq_window)(vcpu);
9545         }
9546
9547         if (is_guest_mode(vcpu) &&
9548             kvm_x86_ops.nested_ops->hv_timer_pending &&
9549             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9550                 *req_immediate_exit = true;
9551
9552         WARN_ON(vcpu->arch.exception.pending);
9553         return 0;
9554
9555 out:
9556         if (r == -EBUSY) {
9557                 *req_immediate_exit = true;
9558                 r = 0;
9559         }
9560         return r;
9561 }
9562
9563 static void process_nmi(struct kvm_vcpu *vcpu)
9564 {
9565         unsigned limit = 2;
9566
9567         /*
9568          * x86 is limited to one NMI running, and one NMI pending after it.
9569          * If an NMI is already in progress, limit further NMIs to just one.
9570          * Otherwise, allow two (and we'll inject the first one immediately).
9571          */
9572         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9573                 limit = 1;
9574
9575         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9576         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9577         kvm_make_request(KVM_REQ_EVENT, vcpu);
9578 }
9579
9580 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9581 {
9582         u32 flags = 0;
9583         flags |= seg->g       << 23;
9584         flags |= seg->db      << 22;
9585         flags |= seg->l       << 21;
9586         flags |= seg->avl     << 20;
9587         flags |= seg->present << 15;
9588         flags |= seg->dpl     << 13;
9589         flags |= seg->s       << 12;
9590         flags |= seg->type    << 8;
9591         return flags;
9592 }
9593
9594 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9595 {
9596         struct kvm_segment seg;
9597         int offset;
9598
9599         kvm_get_segment(vcpu, &seg, n);
9600         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9601
9602         if (n < 3)
9603                 offset = 0x7f84 + n * 12;
9604         else
9605                 offset = 0x7f2c + (n - 3) * 12;
9606
9607         put_smstate(u32, buf, offset + 8, seg.base);
9608         put_smstate(u32, buf, offset + 4, seg.limit);
9609         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9610 }
9611
9612 #ifdef CONFIG_X86_64
9613 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9614 {
9615         struct kvm_segment seg;
9616         int offset;
9617         u16 flags;
9618
9619         kvm_get_segment(vcpu, &seg, n);
9620         offset = 0x7e00 + n * 16;
9621
9622         flags = enter_smm_get_segment_flags(&seg) >> 8;
9623         put_smstate(u16, buf, offset, seg.selector);
9624         put_smstate(u16, buf, offset + 2, flags);
9625         put_smstate(u32, buf, offset + 4, seg.limit);
9626         put_smstate(u64, buf, offset + 8, seg.base);
9627 }
9628 #endif
9629
9630 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9631 {
9632         struct desc_ptr dt;
9633         struct kvm_segment seg;
9634         unsigned long val;
9635         int i;
9636
9637         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9638         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9639         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9640         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9641
9642         for (i = 0; i < 8; i++)
9643                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9644
9645         kvm_get_dr(vcpu, 6, &val);
9646         put_smstate(u32, buf, 0x7fcc, (u32)val);
9647         kvm_get_dr(vcpu, 7, &val);
9648         put_smstate(u32, buf, 0x7fc8, (u32)val);
9649
9650         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9651         put_smstate(u32, buf, 0x7fc4, seg.selector);
9652         put_smstate(u32, buf, 0x7f64, seg.base);
9653         put_smstate(u32, buf, 0x7f60, seg.limit);
9654         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9655
9656         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9657         put_smstate(u32, buf, 0x7fc0, seg.selector);
9658         put_smstate(u32, buf, 0x7f80, seg.base);
9659         put_smstate(u32, buf, 0x7f7c, seg.limit);
9660         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9661
9662         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9663         put_smstate(u32, buf, 0x7f74, dt.address);
9664         put_smstate(u32, buf, 0x7f70, dt.size);
9665
9666         static_call(kvm_x86_get_idt)(vcpu, &dt);
9667         put_smstate(u32, buf, 0x7f58, dt.address);
9668         put_smstate(u32, buf, 0x7f54, dt.size);
9669
9670         for (i = 0; i < 6; i++)
9671                 enter_smm_save_seg_32(vcpu, buf, i);
9672
9673         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9674
9675         /* revision id */
9676         put_smstate(u32, buf, 0x7efc, 0x00020000);
9677         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9678 }
9679
9680 #ifdef CONFIG_X86_64
9681 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9682 {
9683         struct desc_ptr dt;
9684         struct kvm_segment seg;
9685         unsigned long val;
9686         int i;
9687
9688         for (i = 0; i < 16; i++)
9689                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9690
9691         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9692         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9693
9694         kvm_get_dr(vcpu, 6, &val);
9695         put_smstate(u64, buf, 0x7f68, val);
9696         kvm_get_dr(vcpu, 7, &val);
9697         put_smstate(u64, buf, 0x7f60, val);
9698
9699         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9700         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9701         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9702
9703         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9704
9705         /* revision id */
9706         put_smstate(u32, buf, 0x7efc, 0x00020064);
9707
9708         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9709
9710         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9711         put_smstate(u16, buf, 0x7e90, seg.selector);
9712         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9713         put_smstate(u32, buf, 0x7e94, seg.limit);
9714         put_smstate(u64, buf, 0x7e98, seg.base);
9715
9716         static_call(kvm_x86_get_idt)(vcpu, &dt);
9717         put_smstate(u32, buf, 0x7e84, dt.size);
9718         put_smstate(u64, buf, 0x7e88, dt.address);
9719
9720         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9721         put_smstate(u16, buf, 0x7e70, seg.selector);
9722         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9723         put_smstate(u32, buf, 0x7e74, seg.limit);
9724         put_smstate(u64, buf, 0x7e78, seg.base);
9725
9726         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9727         put_smstate(u32, buf, 0x7e64, dt.size);
9728         put_smstate(u64, buf, 0x7e68, dt.address);
9729
9730         for (i = 0; i < 6; i++)
9731                 enter_smm_save_seg_64(vcpu, buf, i);
9732 }
9733 #endif
9734
9735 static void enter_smm(struct kvm_vcpu *vcpu)
9736 {
9737         struct kvm_segment cs, ds;
9738         struct desc_ptr dt;
9739         unsigned long cr0;
9740         char buf[512];
9741
9742         memset(buf, 0, 512);
9743 #ifdef CONFIG_X86_64
9744         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9745                 enter_smm_save_state_64(vcpu, buf);
9746         else
9747 #endif
9748                 enter_smm_save_state_32(vcpu, buf);
9749
9750         /*
9751          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9752          * state (e.g. leave guest mode) after we've saved the state into the
9753          * SMM state-save area.
9754          */
9755         static_call(kvm_x86_enter_smm)(vcpu, buf);
9756
9757         kvm_smm_changed(vcpu, true);
9758         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9759
9760         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9761                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9762         else
9763                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9764
9765         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9766         kvm_rip_write(vcpu, 0x8000);
9767
9768         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9769         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9770         vcpu->arch.cr0 = cr0;
9771
9772         static_call(kvm_x86_set_cr4)(vcpu, 0);
9773
9774         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9775         dt.address = dt.size = 0;
9776         static_call(kvm_x86_set_idt)(vcpu, &dt);
9777
9778         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9779
9780         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9781         cs.base = vcpu->arch.smbase;
9782
9783         ds.selector = 0;
9784         ds.base = 0;
9785
9786         cs.limit    = ds.limit = 0xffffffff;
9787         cs.type     = ds.type = 0x3;
9788         cs.dpl      = ds.dpl = 0;
9789         cs.db       = ds.db = 0;
9790         cs.s        = ds.s = 1;
9791         cs.l        = ds.l = 0;
9792         cs.g        = ds.g = 1;
9793         cs.avl      = ds.avl = 0;
9794         cs.present  = ds.present = 1;
9795         cs.unusable = ds.unusable = 0;
9796         cs.padding  = ds.padding = 0;
9797
9798         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9799         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9800         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9801         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9802         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9803         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9804
9805 #ifdef CONFIG_X86_64
9806         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9807                 static_call(kvm_x86_set_efer)(vcpu, 0);
9808 #endif
9809
9810         kvm_update_cpuid_runtime(vcpu);
9811         kvm_mmu_reset_context(vcpu);
9812 }
9813
9814 static void process_smi(struct kvm_vcpu *vcpu)
9815 {
9816         vcpu->arch.smi_pending = true;
9817         kvm_make_request(KVM_REQ_EVENT, vcpu);
9818 }
9819
9820 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9821                                        unsigned long *vcpu_bitmap)
9822 {
9823         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9824 }
9825
9826 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9827 {
9828         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9829 }
9830
9831 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9832 {
9833         bool activate;
9834
9835         if (!lapic_in_kernel(vcpu))
9836                 return;
9837
9838         down_read(&vcpu->kvm->arch.apicv_update_lock);
9839
9840         activate = kvm_vcpu_apicv_activated(vcpu);
9841
9842         if (vcpu->arch.apicv_active == activate)
9843                 goto out;
9844
9845         vcpu->arch.apicv_active = activate;
9846         kvm_apic_update_apicv(vcpu);
9847         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9848
9849         /*
9850          * When APICv gets disabled, we may still have injected interrupts
9851          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9852          * still active when the interrupt got accepted. Make sure
9853          * inject_pending_event() is called to check for that.
9854          */
9855         if (!vcpu->arch.apicv_active)
9856                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9857
9858 out:
9859         up_read(&vcpu->kvm->arch.apicv_update_lock);
9860 }
9861 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9862
9863 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
9864                                       enum kvm_apicv_inhibit reason, bool set)
9865 {
9866         unsigned long old, new;
9867
9868         lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9869
9870         if (!static_call(kvm_x86_check_apicv_inhibit_reasons)(reason))
9871                 return;
9872
9873         old = new = kvm->arch.apicv_inhibit_reasons;
9874
9875         set_or_clear_apicv_inhibit(&new, reason, set);
9876
9877         if (!!old != !!new) {
9878                 /*
9879                  * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9880                  * false positives in the sanity check WARN in svm_vcpu_run().
9881                  * This task will wait for all vCPUs to ack the kick IRQ before
9882                  * updating apicv_inhibit_reasons, and all other vCPUs will
9883                  * block on acquiring apicv_update_lock so that vCPUs can't
9884                  * redo svm_vcpu_run() without seeing the new inhibit state.
9885                  *
9886                  * Note, holding apicv_update_lock and taking it in the read
9887                  * side (handling the request) also prevents other vCPUs from
9888                  * servicing the request with a stale apicv_inhibit_reasons.
9889                  */
9890                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9891                 kvm->arch.apicv_inhibit_reasons = new;
9892                 if (new) {
9893                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9894                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9895                 }
9896         } else {
9897                 kvm->arch.apicv_inhibit_reasons = new;
9898         }
9899 }
9900
9901 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
9902                                     enum kvm_apicv_inhibit reason, bool set)
9903 {
9904         if (!enable_apicv)
9905                 return;
9906
9907         down_write(&kvm->arch.apicv_update_lock);
9908         __kvm_set_or_clear_apicv_inhibit(kvm, reason, set);
9909         up_write(&kvm->arch.apicv_update_lock);
9910 }
9911 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit);
9912
9913 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9914 {
9915         if (!kvm_apic_present(vcpu))
9916                 return;
9917
9918         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9919
9920         if (irqchip_split(vcpu->kvm))
9921                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9922         else {
9923                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9924                 if (ioapic_in_kernel(vcpu->kvm))
9925                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9926         }
9927
9928         if (is_guest_mode(vcpu))
9929                 vcpu->arch.load_eoi_exitmap_pending = true;
9930         else
9931                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9932 }
9933
9934 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9935 {
9936         u64 eoi_exit_bitmap[4];
9937
9938         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9939                 return;
9940
9941         if (to_hv_vcpu(vcpu)) {
9942                 bitmap_or((ulong *)eoi_exit_bitmap,
9943                           vcpu->arch.ioapic_handled_vectors,
9944                           to_hv_synic(vcpu)->vec_bitmap, 256);
9945                 static_call_cond(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9946                 return;
9947         }
9948
9949         static_call_cond(kvm_x86_load_eoi_exitmap)(
9950                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9951 }
9952
9953 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9954                                             unsigned long start, unsigned long end)
9955 {
9956         unsigned long apic_address;
9957
9958         /*
9959          * The physical address of apic access page is stored in the VMCS.
9960          * Update it when it becomes invalid.
9961          */
9962         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9963         if (start <= apic_address && apic_address < end)
9964                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9965 }
9966
9967 void kvm_arch_guest_memory_reclaimed(struct kvm *kvm)
9968 {
9969         static_call_cond(kvm_x86_guest_memory_reclaimed)(kvm);
9970 }
9971
9972 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9973 {
9974         if (!lapic_in_kernel(vcpu))
9975                 return;
9976
9977         static_call_cond(kvm_x86_set_apic_access_page_addr)(vcpu);
9978 }
9979
9980 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9981 {
9982         smp_send_reschedule(vcpu->cpu);
9983 }
9984 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9985
9986 /*
9987  * Called within kvm->srcu read side.
9988  * Returns 1 to let vcpu_run() continue the guest execution loop without
9989  * exiting to the userspace.  Otherwise, the value will be returned to the
9990  * userspace.
9991  */
9992 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9993 {
9994         int r;
9995         bool req_int_win =
9996                 dm_request_for_irq_injection(vcpu) &&
9997                 kvm_cpu_accept_dm_intr(vcpu);
9998         fastpath_t exit_fastpath;
9999
10000         bool req_immediate_exit = false;
10001
10002         /* Forbid vmenter if vcpu dirty ring is soft-full */
10003         if (unlikely(vcpu->kvm->dirty_ring_size &&
10004                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
10005                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
10006                 trace_kvm_dirty_ring_exit(vcpu);
10007                 r = 0;
10008                 goto out;
10009         }
10010
10011         if (kvm_request_pending(vcpu)) {
10012                 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
10013                         r = -EIO;
10014                         goto out;
10015                 }
10016                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
10017                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
10018                                 r = 0;
10019                                 goto out;
10020                         }
10021                 }
10022                 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
10023                         kvm_mmu_free_obsolete_roots(vcpu);
10024                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
10025                         __kvm_migrate_timers(vcpu);
10026                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
10027                         kvm_update_masterclock(vcpu->kvm);
10028                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
10029                         kvm_gen_kvmclock_update(vcpu);
10030                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
10031                         r = kvm_guest_time_update(vcpu);
10032                         if (unlikely(r))
10033                                 goto out;
10034                 }
10035                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
10036                         kvm_mmu_sync_roots(vcpu);
10037                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
10038                         kvm_mmu_load_pgd(vcpu);
10039                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
10040                         kvm_vcpu_flush_tlb_all(vcpu);
10041
10042                         /* Flushing all ASIDs flushes the current ASID... */
10043                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
10044                 }
10045                 kvm_service_local_tlb_flush_requests(vcpu);
10046
10047                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
10048                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
10049                         r = 0;
10050                         goto out;
10051                 }
10052                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
10053                         if (is_guest_mode(vcpu)) {
10054                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
10055                         } else {
10056                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
10057                                 vcpu->mmio_needed = 0;
10058                                 r = 0;
10059                                 goto out;
10060                         }
10061                 }
10062                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
10063                         /* Page is swapped out. Do synthetic halt */
10064                         vcpu->arch.apf.halted = true;
10065                         r = 1;
10066                         goto out;
10067                 }
10068                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
10069                         record_steal_time(vcpu);
10070                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
10071                         process_smi(vcpu);
10072                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
10073                         process_nmi(vcpu);
10074                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
10075                         kvm_pmu_handle_event(vcpu);
10076                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
10077                         kvm_pmu_deliver_pmi(vcpu);
10078                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
10079                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
10080                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
10081                                      vcpu->arch.ioapic_handled_vectors)) {
10082                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
10083                                 vcpu->run->eoi.vector =
10084                                                 vcpu->arch.pending_ioapic_eoi;
10085                                 r = 0;
10086                                 goto out;
10087                         }
10088                 }
10089                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
10090                         vcpu_scan_ioapic(vcpu);
10091                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
10092                         vcpu_load_eoi_exitmap(vcpu);
10093                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
10094                         kvm_vcpu_reload_apic_access_page(vcpu);
10095                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
10096                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10097                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
10098                         vcpu->run->system_event.ndata = 0;
10099                         r = 0;
10100                         goto out;
10101                 }
10102                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
10103                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10104                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
10105                         vcpu->run->system_event.ndata = 0;
10106                         r = 0;
10107                         goto out;
10108                 }
10109                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
10110                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
10111
10112                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
10113                         vcpu->run->hyperv = hv_vcpu->exit;
10114                         r = 0;
10115                         goto out;
10116                 }
10117
10118                 /*
10119                  * KVM_REQ_HV_STIMER has to be processed after
10120                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10121                  * depend on the guest clock being up-to-date
10122                  */
10123                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
10124                         kvm_hv_process_stimers(vcpu);
10125                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
10126                         kvm_vcpu_update_apicv(vcpu);
10127                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
10128                         kvm_check_async_pf_completion(vcpu);
10129                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
10130                         static_call(kvm_x86_msr_filter_changed)(vcpu);
10131
10132                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
10133                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
10134         }
10135
10136         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
10137             kvm_xen_has_interrupt(vcpu)) {
10138                 ++vcpu->stat.req_event;
10139                 r = kvm_apic_accept_events(vcpu);
10140                 if (r < 0) {
10141                         r = 0;
10142                         goto out;
10143                 }
10144                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
10145                         r = 1;
10146                         goto out;
10147                 }
10148
10149                 r = inject_pending_event(vcpu, &req_immediate_exit);
10150                 if (r < 0) {
10151                         r = 0;
10152                         goto out;
10153                 }
10154                 if (req_int_win)
10155                         static_call(kvm_x86_enable_irq_window)(vcpu);
10156
10157                 if (kvm_lapic_enabled(vcpu)) {
10158                         update_cr8_intercept(vcpu);
10159                         kvm_lapic_sync_to_vapic(vcpu);
10160                 }
10161         }
10162
10163         r = kvm_mmu_reload(vcpu);
10164         if (unlikely(r)) {
10165                 goto cancel_injection;
10166         }
10167
10168         preempt_disable();
10169
10170         static_call(kvm_x86_prepare_switch_to_guest)(vcpu);
10171
10172         /*
10173          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
10174          * IPI are then delayed after guest entry, which ensures that they
10175          * result in virtual interrupt delivery.
10176          */
10177         local_irq_disable();
10178
10179         /* Store vcpu->apicv_active before vcpu->mode.  */
10180         smp_store_release(&vcpu->mode, IN_GUEST_MODE);
10181
10182         kvm_vcpu_srcu_read_unlock(vcpu);
10183
10184         /*
10185          * 1) We should set ->mode before checking ->requests.  Please see
10186          * the comment in kvm_vcpu_exiting_guest_mode().
10187          *
10188          * 2) For APICv, we should set ->mode before checking PID.ON. This
10189          * pairs with the memory barrier implicit in pi_test_and_set_on
10190          * (see vmx_deliver_posted_interrupt).
10191          *
10192          * 3) This also orders the write to mode from any reads to the page
10193          * tables done while the VCPU is running.  Please see the comment
10194          * in kvm_flush_remote_tlbs.
10195          */
10196         smp_mb__after_srcu_read_unlock();
10197
10198         /*
10199          * Process pending posted interrupts to handle the case where the
10200          * notification IRQ arrived in the host, or was never sent (because the
10201          * target vCPU wasn't running).  Do this regardless of the vCPU's APICv
10202          * status, KVM doesn't update assigned devices when APICv is inhibited,
10203          * i.e. they can post interrupts even if APICv is temporarily disabled.
10204          */
10205         if (kvm_lapic_enabled(vcpu))
10206                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10207
10208         if (kvm_vcpu_exit_request(vcpu)) {
10209                 vcpu->mode = OUTSIDE_GUEST_MODE;
10210                 smp_wmb();
10211                 local_irq_enable();
10212                 preempt_enable();
10213                 kvm_vcpu_srcu_read_lock(vcpu);
10214                 r = 1;
10215                 goto cancel_injection;
10216         }
10217
10218         if (req_immediate_exit) {
10219                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10220                 static_call(kvm_x86_request_immediate_exit)(vcpu);
10221         }
10222
10223         fpregs_assert_state_consistent();
10224         if (test_thread_flag(TIF_NEED_FPU_LOAD))
10225                 switch_fpu_return();
10226
10227         if (vcpu->arch.guest_fpu.xfd_err)
10228                 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10229
10230         if (unlikely(vcpu->arch.switch_db_regs)) {
10231                 set_debugreg(0, 7);
10232                 set_debugreg(vcpu->arch.eff_db[0], 0);
10233                 set_debugreg(vcpu->arch.eff_db[1], 1);
10234                 set_debugreg(vcpu->arch.eff_db[2], 2);
10235                 set_debugreg(vcpu->arch.eff_db[3], 3);
10236         } else if (unlikely(hw_breakpoint_active())) {
10237                 set_debugreg(0, 7);
10238         }
10239
10240         guest_timing_enter_irqoff();
10241
10242         for (;;) {
10243                 /*
10244                  * Assert that vCPU vs. VM APICv state is consistent.  An APICv
10245                  * update must kick and wait for all vCPUs before toggling the
10246                  * per-VM state, and responsing vCPUs must wait for the update
10247                  * to complete before servicing KVM_REQ_APICV_UPDATE.
10248                  */
10249                 WARN_ON_ONCE(kvm_vcpu_apicv_activated(vcpu) != kvm_vcpu_apicv_active(vcpu));
10250
10251                 exit_fastpath = static_call(kvm_x86_vcpu_run)(vcpu);
10252                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10253                         break;
10254
10255                 if (kvm_lapic_enabled(vcpu))
10256                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10257
10258                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10259                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10260                         break;
10261                 }
10262         }
10263
10264         /*
10265          * Do this here before restoring debug registers on the host.  And
10266          * since we do this before handling the vmexit, a DR access vmexit
10267          * can (a) read the correct value of the debug registers, (b) set
10268          * KVM_DEBUGREG_WONT_EXIT again.
10269          */
10270         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10271                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10272                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10273                 kvm_update_dr0123(vcpu);
10274                 kvm_update_dr7(vcpu);
10275         }
10276
10277         /*
10278          * If the guest has used debug registers, at least dr7
10279          * will be disabled while returning to the host.
10280          * If we don't have active breakpoints in the host, we don't
10281          * care about the messed up debug address registers. But if
10282          * we have some of them active, restore the old state.
10283          */
10284         if (hw_breakpoint_active())
10285                 hw_breakpoint_restore();
10286
10287         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10288         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10289
10290         vcpu->mode = OUTSIDE_GUEST_MODE;
10291         smp_wmb();
10292
10293         /*
10294          * Sync xfd before calling handle_exit_irqoff() which may
10295          * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10296          * in #NM irqoff handler).
10297          */
10298         if (vcpu->arch.xfd_no_write_intercept)
10299                 fpu_sync_guest_vmexit_xfd_state();
10300
10301         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10302
10303         if (vcpu->arch.guest_fpu.xfd_err)
10304                 wrmsrl(MSR_IA32_XFD_ERR, 0);
10305
10306         /*
10307          * Consume any pending interrupts, including the possible source of
10308          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10309          * An instruction is required after local_irq_enable() to fully unblock
10310          * interrupts on processors that implement an interrupt shadow, the
10311          * stat.exits increment will do nicely.
10312          */
10313         kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10314         local_irq_enable();
10315         ++vcpu->stat.exits;
10316         local_irq_disable();
10317         kvm_after_interrupt(vcpu);
10318
10319         /*
10320          * Wait until after servicing IRQs to account guest time so that any
10321          * ticks that occurred while running the guest are properly accounted
10322          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
10323          * of accounting via context tracking, but the loss of accuracy is
10324          * acceptable for all known use cases.
10325          */
10326         guest_timing_exit_irqoff();
10327
10328         local_irq_enable();
10329         preempt_enable();
10330
10331         kvm_vcpu_srcu_read_lock(vcpu);
10332
10333         /*
10334          * Profile KVM exit RIPs:
10335          */
10336         if (unlikely(prof_on == KVM_PROFILING)) {
10337                 unsigned long rip = kvm_rip_read(vcpu);
10338                 profile_hit(KVM_PROFILING, (void *)rip);
10339         }
10340
10341         if (unlikely(vcpu->arch.tsc_always_catchup))
10342                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10343
10344         if (vcpu->arch.apic_attention)
10345                 kvm_lapic_sync_from_vapic(vcpu);
10346
10347         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10348         return r;
10349
10350 cancel_injection:
10351         if (req_immediate_exit)
10352                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10353         static_call(kvm_x86_cancel_injection)(vcpu);
10354         if (unlikely(vcpu->arch.apic_attention))
10355                 kvm_lapic_sync_from_vapic(vcpu);
10356 out:
10357         return r;
10358 }
10359
10360 /* Called within kvm->srcu read side.  */
10361 static inline int vcpu_block(struct kvm_vcpu *vcpu)
10362 {
10363         bool hv_timer;
10364
10365         if (!kvm_arch_vcpu_runnable(vcpu)) {
10366                 /*
10367                  * Switch to the software timer before halt-polling/blocking as
10368                  * the guest's timer may be a break event for the vCPU, and the
10369                  * hypervisor timer runs only when the CPU is in guest mode.
10370                  * Switch before halt-polling so that KVM recognizes an expired
10371                  * timer before blocking.
10372                  */
10373                 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10374                 if (hv_timer)
10375                         kvm_lapic_switch_to_sw_timer(vcpu);
10376
10377                 kvm_vcpu_srcu_read_unlock(vcpu);
10378                 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10379                         kvm_vcpu_halt(vcpu);
10380                 else
10381                         kvm_vcpu_block(vcpu);
10382                 kvm_vcpu_srcu_read_lock(vcpu);
10383
10384                 if (hv_timer)
10385                         kvm_lapic_switch_to_hv_timer(vcpu);
10386
10387                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10388                         return 1;
10389         }
10390
10391         if (kvm_apic_accept_events(vcpu) < 0)
10392                 return 0;
10393         switch(vcpu->arch.mp_state) {
10394         case KVM_MP_STATE_HALTED:
10395         case KVM_MP_STATE_AP_RESET_HOLD:
10396                 vcpu->arch.pv.pv_unhalted = false;
10397                 vcpu->arch.mp_state =
10398                         KVM_MP_STATE_RUNNABLE;
10399                 fallthrough;
10400         case KVM_MP_STATE_RUNNABLE:
10401                 vcpu->arch.apf.halted = false;
10402                 break;
10403         case KVM_MP_STATE_INIT_RECEIVED:
10404                 break;
10405         default:
10406                 return -EINTR;
10407         }
10408         return 1;
10409 }
10410
10411 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10412 {
10413         if (is_guest_mode(vcpu))
10414                 kvm_check_nested_events(vcpu);
10415
10416         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10417                 !vcpu->arch.apf.halted);
10418 }
10419
10420 /* Called within kvm->srcu read side.  */
10421 static int vcpu_run(struct kvm_vcpu *vcpu)
10422 {
10423         int r;
10424
10425         vcpu->arch.l1tf_flush_l1d = true;
10426
10427         for (;;) {
10428                 if (kvm_vcpu_running(vcpu)) {
10429                         r = vcpu_enter_guest(vcpu);
10430                 } else {
10431                         r = vcpu_block(vcpu);
10432                 }
10433
10434                 if (r <= 0)
10435                         break;
10436
10437                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10438                 if (kvm_xen_has_pending_events(vcpu))
10439                         kvm_xen_inject_pending_events(vcpu);
10440
10441                 if (kvm_cpu_has_pending_timer(vcpu))
10442                         kvm_inject_pending_timer_irqs(vcpu);
10443
10444                 if (dm_request_for_irq_injection(vcpu) &&
10445                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10446                         r = 0;
10447                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10448                         ++vcpu->stat.request_irq_exits;
10449                         break;
10450                 }
10451
10452                 if (__xfer_to_guest_mode_work_pending()) {
10453                         kvm_vcpu_srcu_read_unlock(vcpu);
10454                         r = xfer_to_guest_mode_handle_work(vcpu);
10455                         kvm_vcpu_srcu_read_lock(vcpu);
10456                         if (r)
10457                                 return r;
10458                 }
10459         }
10460
10461         return r;
10462 }
10463
10464 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10465 {
10466         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10467 }
10468
10469 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10470 {
10471         BUG_ON(!vcpu->arch.pio.count);
10472
10473         return complete_emulated_io(vcpu);
10474 }
10475
10476 /*
10477  * Implements the following, as a state machine:
10478  *
10479  * read:
10480  *   for each fragment
10481  *     for each mmio piece in the fragment
10482  *       write gpa, len
10483  *       exit
10484  *       copy data
10485  *   execute insn
10486  *
10487  * write:
10488  *   for each fragment
10489  *     for each mmio piece in the fragment
10490  *       write gpa, len
10491  *       copy data
10492  *       exit
10493  */
10494 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10495 {
10496         struct kvm_run *run = vcpu->run;
10497         struct kvm_mmio_fragment *frag;
10498         unsigned len;
10499
10500         BUG_ON(!vcpu->mmio_needed);
10501
10502         /* Complete previous fragment */
10503         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10504         len = min(8u, frag->len);
10505         if (!vcpu->mmio_is_write)
10506                 memcpy(frag->data, run->mmio.data, len);
10507
10508         if (frag->len <= 8) {
10509                 /* Switch to the next fragment. */
10510                 frag++;
10511                 vcpu->mmio_cur_fragment++;
10512         } else {
10513                 /* Go forward to the next mmio piece. */
10514                 frag->data += len;
10515                 frag->gpa += len;
10516                 frag->len -= len;
10517         }
10518
10519         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10520                 vcpu->mmio_needed = 0;
10521
10522                 /* FIXME: return into emulator if single-stepping.  */
10523                 if (vcpu->mmio_is_write)
10524                         return 1;
10525                 vcpu->mmio_read_completed = 1;
10526                 return complete_emulated_io(vcpu);
10527         }
10528
10529         run->exit_reason = KVM_EXIT_MMIO;
10530         run->mmio.phys_addr = frag->gpa;
10531         if (vcpu->mmio_is_write)
10532                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10533         run->mmio.len = min(8u, frag->len);
10534         run->mmio.is_write = vcpu->mmio_is_write;
10535         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10536         return 0;
10537 }
10538
10539 /* Swap (qemu) user FPU context for the guest FPU context. */
10540 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10541 {
10542         /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
10543         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10544         trace_kvm_fpu(1);
10545 }
10546
10547 /* When vcpu_run ends, restore user space FPU context. */
10548 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10549 {
10550         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10551         ++vcpu->stat.fpu_reload;
10552         trace_kvm_fpu(0);
10553 }
10554
10555 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10556 {
10557         struct kvm_run *kvm_run = vcpu->run;
10558         int r;
10559
10560         vcpu_load(vcpu);
10561         kvm_sigset_activate(vcpu);
10562         kvm_run->flags = 0;
10563         kvm_load_guest_fpu(vcpu);
10564
10565         kvm_vcpu_srcu_read_lock(vcpu);
10566         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10567                 if (kvm_run->immediate_exit) {
10568                         r = -EINTR;
10569                         goto out;
10570                 }
10571                 /*
10572                  * It should be impossible for the hypervisor timer to be in
10573                  * use before KVM has ever run the vCPU.
10574                  */
10575                 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10576
10577                 kvm_vcpu_srcu_read_unlock(vcpu);
10578                 kvm_vcpu_block(vcpu);
10579                 kvm_vcpu_srcu_read_lock(vcpu);
10580
10581                 if (kvm_apic_accept_events(vcpu) < 0) {
10582                         r = 0;
10583                         goto out;
10584                 }
10585                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10586                 r = -EAGAIN;
10587                 if (signal_pending(current)) {
10588                         r = -EINTR;
10589                         kvm_run->exit_reason = KVM_EXIT_INTR;
10590                         ++vcpu->stat.signal_exits;
10591                 }
10592                 goto out;
10593         }
10594
10595         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10596             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10597                 r = -EINVAL;
10598                 goto out;
10599         }
10600
10601         if (kvm_run->kvm_dirty_regs) {
10602                 r = sync_regs(vcpu);
10603                 if (r != 0)
10604                         goto out;
10605         }
10606
10607         /* re-sync apic's tpr */
10608         if (!lapic_in_kernel(vcpu)) {
10609                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10610                         r = -EINVAL;
10611                         goto out;
10612                 }
10613         }
10614
10615         if (unlikely(vcpu->arch.complete_userspace_io)) {
10616                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10617                 vcpu->arch.complete_userspace_io = NULL;
10618                 r = cui(vcpu);
10619                 if (r <= 0)
10620                         goto out;
10621         } else
10622                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10623
10624         if (kvm_run->immediate_exit) {
10625                 r = -EINTR;
10626                 goto out;
10627         }
10628
10629         r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
10630         if (r <= 0)
10631                 goto out;
10632
10633         r = vcpu_run(vcpu);
10634
10635 out:
10636         kvm_put_guest_fpu(vcpu);
10637         if (kvm_run->kvm_valid_regs)
10638                 store_regs(vcpu);
10639         post_kvm_run_save(vcpu);
10640         kvm_vcpu_srcu_read_unlock(vcpu);
10641
10642         kvm_sigset_deactivate(vcpu);
10643         vcpu_put(vcpu);
10644         return r;
10645 }
10646
10647 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10648 {
10649         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10650                 /*
10651                  * We are here if userspace calls get_regs() in the middle of
10652                  * instruction emulation. Registers state needs to be copied
10653                  * back from emulation context to vcpu. Userspace shouldn't do
10654                  * that usually, but some bad designed PV devices (vmware
10655                  * backdoor interface) need this to work
10656                  */
10657                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10658                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10659         }
10660         regs->rax = kvm_rax_read(vcpu);
10661         regs->rbx = kvm_rbx_read(vcpu);
10662         regs->rcx = kvm_rcx_read(vcpu);
10663         regs->rdx = kvm_rdx_read(vcpu);
10664         regs->rsi = kvm_rsi_read(vcpu);
10665         regs->rdi = kvm_rdi_read(vcpu);
10666         regs->rsp = kvm_rsp_read(vcpu);
10667         regs->rbp = kvm_rbp_read(vcpu);
10668 #ifdef CONFIG_X86_64
10669         regs->r8 = kvm_r8_read(vcpu);
10670         regs->r9 = kvm_r9_read(vcpu);
10671         regs->r10 = kvm_r10_read(vcpu);
10672         regs->r11 = kvm_r11_read(vcpu);
10673         regs->r12 = kvm_r12_read(vcpu);
10674         regs->r13 = kvm_r13_read(vcpu);
10675         regs->r14 = kvm_r14_read(vcpu);
10676         regs->r15 = kvm_r15_read(vcpu);
10677 #endif
10678
10679         regs->rip = kvm_rip_read(vcpu);
10680         regs->rflags = kvm_get_rflags(vcpu);
10681 }
10682
10683 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10684 {
10685         vcpu_load(vcpu);
10686         __get_regs(vcpu, regs);
10687         vcpu_put(vcpu);
10688         return 0;
10689 }
10690
10691 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10692 {
10693         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10694         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10695
10696         kvm_rax_write(vcpu, regs->rax);
10697         kvm_rbx_write(vcpu, regs->rbx);
10698         kvm_rcx_write(vcpu, regs->rcx);
10699         kvm_rdx_write(vcpu, regs->rdx);
10700         kvm_rsi_write(vcpu, regs->rsi);
10701         kvm_rdi_write(vcpu, regs->rdi);
10702         kvm_rsp_write(vcpu, regs->rsp);
10703         kvm_rbp_write(vcpu, regs->rbp);
10704 #ifdef CONFIG_X86_64
10705         kvm_r8_write(vcpu, regs->r8);
10706         kvm_r9_write(vcpu, regs->r9);
10707         kvm_r10_write(vcpu, regs->r10);
10708         kvm_r11_write(vcpu, regs->r11);
10709         kvm_r12_write(vcpu, regs->r12);
10710         kvm_r13_write(vcpu, regs->r13);
10711         kvm_r14_write(vcpu, regs->r14);
10712         kvm_r15_write(vcpu, regs->r15);
10713 #endif
10714
10715         kvm_rip_write(vcpu, regs->rip);
10716         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10717
10718         vcpu->arch.exception.pending = false;
10719
10720         kvm_make_request(KVM_REQ_EVENT, vcpu);
10721 }
10722
10723 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10724 {
10725         vcpu_load(vcpu);
10726         __set_regs(vcpu, regs);
10727         vcpu_put(vcpu);
10728         return 0;
10729 }
10730
10731 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10732 {
10733         struct desc_ptr dt;
10734
10735         if (vcpu->arch.guest_state_protected)
10736                 goto skip_protected_regs;
10737
10738         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10739         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10740         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10741         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10742         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10743         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10744
10745         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10746         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10747
10748         static_call(kvm_x86_get_idt)(vcpu, &dt);
10749         sregs->idt.limit = dt.size;
10750         sregs->idt.base = dt.address;
10751         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10752         sregs->gdt.limit = dt.size;
10753         sregs->gdt.base = dt.address;
10754
10755         sregs->cr2 = vcpu->arch.cr2;
10756         sregs->cr3 = kvm_read_cr3(vcpu);
10757
10758 skip_protected_regs:
10759         sregs->cr0 = kvm_read_cr0(vcpu);
10760         sregs->cr4 = kvm_read_cr4(vcpu);
10761         sregs->cr8 = kvm_get_cr8(vcpu);
10762         sregs->efer = vcpu->arch.efer;
10763         sregs->apic_base = kvm_get_apic_base(vcpu);
10764 }
10765
10766 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10767 {
10768         __get_sregs_common(vcpu, sregs);
10769
10770         if (vcpu->arch.guest_state_protected)
10771                 return;
10772
10773         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10774                 set_bit(vcpu->arch.interrupt.nr,
10775                         (unsigned long *)sregs->interrupt_bitmap);
10776 }
10777
10778 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10779 {
10780         int i;
10781
10782         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10783
10784         if (vcpu->arch.guest_state_protected)
10785                 return;
10786
10787         if (is_pae_paging(vcpu)) {
10788                 for (i = 0 ; i < 4 ; i++)
10789                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10790                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10791         }
10792 }
10793
10794 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10795                                   struct kvm_sregs *sregs)
10796 {
10797         vcpu_load(vcpu);
10798         __get_sregs(vcpu, sregs);
10799         vcpu_put(vcpu);
10800         return 0;
10801 }
10802
10803 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10804                                     struct kvm_mp_state *mp_state)
10805 {
10806         int r;
10807
10808         vcpu_load(vcpu);
10809         if (kvm_mpx_supported())
10810                 kvm_load_guest_fpu(vcpu);
10811
10812         r = kvm_apic_accept_events(vcpu);
10813         if (r < 0)
10814                 goto out;
10815         r = 0;
10816
10817         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10818              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10819             vcpu->arch.pv.pv_unhalted)
10820                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10821         else
10822                 mp_state->mp_state = vcpu->arch.mp_state;
10823
10824 out:
10825         if (kvm_mpx_supported())
10826                 kvm_put_guest_fpu(vcpu);
10827         vcpu_put(vcpu);
10828         return r;
10829 }
10830
10831 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10832                                     struct kvm_mp_state *mp_state)
10833 {
10834         int ret = -EINVAL;
10835
10836         vcpu_load(vcpu);
10837
10838         if (!lapic_in_kernel(vcpu) &&
10839             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10840                 goto out;
10841
10842         /*
10843          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10844          * INIT state; latched init should be reported using
10845          * KVM_SET_VCPU_EVENTS, so reject it here.
10846          */
10847         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10848             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10849              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10850                 goto out;
10851
10852         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10853                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10854                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10855         } else
10856                 vcpu->arch.mp_state = mp_state->mp_state;
10857         kvm_make_request(KVM_REQ_EVENT, vcpu);
10858
10859         ret = 0;
10860 out:
10861         vcpu_put(vcpu);
10862         return ret;
10863 }
10864
10865 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10866                     int reason, bool has_error_code, u32 error_code)
10867 {
10868         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10869         int ret;
10870
10871         init_emulate_ctxt(vcpu);
10872
10873         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10874                                    has_error_code, error_code);
10875         if (ret) {
10876                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10877                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10878                 vcpu->run->internal.ndata = 0;
10879                 return 0;
10880         }
10881
10882         kvm_rip_write(vcpu, ctxt->eip);
10883         kvm_set_rflags(vcpu, ctxt->eflags);
10884         return 1;
10885 }
10886 EXPORT_SYMBOL_GPL(kvm_task_switch);
10887
10888 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10889 {
10890         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10891                 /*
10892                  * When EFER.LME and CR0.PG are set, the processor is in
10893                  * 64-bit mode (though maybe in a 32-bit code segment).
10894                  * CR4.PAE and EFER.LMA must be set.
10895                  */
10896                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10897                         return false;
10898                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10899                         return false;
10900         } else {
10901                 /*
10902                  * Not in 64-bit mode: EFER.LMA is clear and the code
10903                  * segment cannot be 64-bit.
10904                  */
10905                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10906                         return false;
10907         }
10908
10909         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10910 }
10911
10912 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10913                 int *mmu_reset_needed, bool update_pdptrs)
10914 {
10915         struct msr_data apic_base_msr;
10916         int idx;
10917         struct desc_ptr dt;
10918
10919         if (!kvm_is_valid_sregs(vcpu, sregs))
10920                 return -EINVAL;
10921
10922         apic_base_msr.data = sregs->apic_base;
10923         apic_base_msr.host_initiated = true;
10924         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10925                 return -EINVAL;
10926
10927         if (vcpu->arch.guest_state_protected)
10928                 return 0;
10929
10930         dt.size = sregs->idt.limit;
10931         dt.address = sregs->idt.base;
10932         static_call(kvm_x86_set_idt)(vcpu, &dt);
10933         dt.size = sregs->gdt.limit;
10934         dt.address = sregs->gdt.base;
10935         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10936
10937         vcpu->arch.cr2 = sregs->cr2;
10938         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10939         vcpu->arch.cr3 = sregs->cr3;
10940         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10941         static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
10942
10943         kvm_set_cr8(vcpu, sregs->cr8);
10944
10945         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10946         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10947
10948         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10949         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10950         vcpu->arch.cr0 = sregs->cr0;
10951
10952         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10953         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10954
10955         if (update_pdptrs) {
10956                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10957                 if (is_pae_paging(vcpu)) {
10958                         load_pdptrs(vcpu, kvm_read_cr3(vcpu));
10959                         *mmu_reset_needed = 1;
10960                 }
10961                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10962         }
10963
10964         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10965         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10966         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10967         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10968         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10969         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10970
10971         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10972         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10973
10974         update_cr8_intercept(vcpu);
10975
10976         /* Older userspace won't unhalt the vcpu on reset. */
10977         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10978             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10979             !is_protmode(vcpu))
10980                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10981
10982         return 0;
10983 }
10984
10985 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10986 {
10987         int pending_vec, max_bits;
10988         int mmu_reset_needed = 0;
10989         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10990
10991         if (ret)
10992                 return ret;
10993
10994         if (mmu_reset_needed)
10995                 kvm_mmu_reset_context(vcpu);
10996
10997         max_bits = KVM_NR_INTERRUPTS;
10998         pending_vec = find_first_bit(
10999                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
11000
11001         if (pending_vec < max_bits) {
11002                 kvm_queue_interrupt(vcpu, pending_vec, false);
11003                 pr_debug("Set back pending irq %d\n", pending_vec);
11004                 kvm_make_request(KVM_REQ_EVENT, vcpu);
11005         }
11006         return 0;
11007 }
11008
11009 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
11010 {
11011         int mmu_reset_needed = 0;
11012         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
11013         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
11014                 !(sregs2->efer & EFER_LMA);
11015         int i, ret;
11016
11017         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
11018                 return -EINVAL;
11019
11020         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
11021                 return -EINVAL;
11022
11023         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
11024                                  &mmu_reset_needed, !valid_pdptrs);
11025         if (ret)
11026                 return ret;
11027
11028         if (valid_pdptrs) {
11029                 for (i = 0; i < 4 ; i++)
11030                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
11031
11032                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
11033                 mmu_reset_needed = 1;
11034                 vcpu->arch.pdptrs_from_userspace = true;
11035         }
11036         if (mmu_reset_needed)
11037                 kvm_mmu_reset_context(vcpu);
11038         return 0;
11039 }
11040
11041 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
11042                                   struct kvm_sregs *sregs)
11043 {
11044         int ret;
11045
11046         vcpu_load(vcpu);
11047         ret = __set_sregs(vcpu, sregs);
11048         vcpu_put(vcpu);
11049         return ret;
11050 }
11051
11052 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
11053 {
11054         bool set = false;
11055         struct kvm_vcpu *vcpu;
11056         unsigned long i;
11057
11058         if (!enable_apicv)
11059                 return;
11060
11061         down_write(&kvm->arch.apicv_update_lock);
11062
11063         kvm_for_each_vcpu(i, vcpu, kvm) {
11064                 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
11065                         set = true;
11066                         break;
11067                 }
11068         }
11069         __kvm_set_or_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_BLOCKIRQ, set);
11070         up_write(&kvm->arch.apicv_update_lock);
11071 }
11072
11073 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
11074                                         struct kvm_guest_debug *dbg)
11075 {
11076         unsigned long rflags;
11077         int i, r;
11078
11079         if (vcpu->arch.guest_state_protected)
11080                 return -EINVAL;
11081
11082         vcpu_load(vcpu);
11083
11084         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
11085                 r = -EBUSY;
11086                 if (vcpu->arch.exception.pending)
11087                         goto out;
11088                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
11089                         kvm_queue_exception(vcpu, DB_VECTOR);
11090                 else
11091                         kvm_queue_exception(vcpu, BP_VECTOR);
11092         }
11093
11094         /*
11095          * Read rflags as long as potentially injected trace flags are still
11096          * filtered out.
11097          */
11098         rflags = kvm_get_rflags(vcpu);
11099
11100         vcpu->guest_debug = dbg->control;
11101         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
11102                 vcpu->guest_debug = 0;
11103
11104         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
11105                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
11106                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
11107                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
11108         } else {
11109                 for (i = 0; i < KVM_NR_DB_REGS; i++)
11110                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
11111         }
11112         kvm_update_dr7(vcpu);
11113
11114         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11115                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
11116
11117         /*
11118          * Trigger an rflags update that will inject or remove the trace
11119          * flags.
11120          */
11121         kvm_set_rflags(vcpu, rflags);
11122
11123         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11124
11125         kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
11126
11127         r = 0;
11128
11129 out:
11130         vcpu_put(vcpu);
11131         return r;
11132 }
11133
11134 /*
11135  * Translate a guest virtual address to a guest physical address.
11136  */
11137 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
11138                                     struct kvm_translation *tr)
11139 {
11140         unsigned long vaddr = tr->linear_address;
11141         gpa_t gpa;
11142         int idx;
11143
11144         vcpu_load(vcpu);
11145
11146         idx = srcu_read_lock(&vcpu->kvm->srcu);
11147         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
11148         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11149         tr->physical_address = gpa;
11150         tr->valid = gpa != UNMAPPED_GVA;
11151         tr->writeable = 1;
11152         tr->usermode = 0;
11153
11154         vcpu_put(vcpu);
11155         return 0;
11156 }
11157
11158 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11159 {
11160         struct fxregs_state *fxsave;
11161
11162         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11163                 return 0;
11164
11165         vcpu_load(vcpu);
11166
11167         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11168         memcpy(fpu->fpr, fxsave->st_space, 128);
11169         fpu->fcw = fxsave->cwd;
11170         fpu->fsw = fxsave->swd;
11171         fpu->ftwx = fxsave->twd;
11172         fpu->last_opcode = fxsave->fop;
11173         fpu->last_ip = fxsave->rip;
11174         fpu->last_dp = fxsave->rdp;
11175         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
11176
11177         vcpu_put(vcpu);
11178         return 0;
11179 }
11180
11181 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11182 {
11183         struct fxregs_state *fxsave;
11184
11185         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11186                 return 0;
11187
11188         vcpu_load(vcpu);
11189
11190         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11191
11192         memcpy(fxsave->st_space, fpu->fpr, 128);
11193         fxsave->cwd = fpu->fcw;
11194         fxsave->swd = fpu->fsw;
11195         fxsave->twd = fpu->ftwx;
11196         fxsave->fop = fpu->last_opcode;
11197         fxsave->rip = fpu->last_ip;
11198         fxsave->rdp = fpu->last_dp;
11199         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11200
11201         vcpu_put(vcpu);
11202         return 0;
11203 }
11204
11205 static void store_regs(struct kvm_vcpu *vcpu)
11206 {
11207         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11208
11209         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11210                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11211
11212         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11213                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11214
11215         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11216                 kvm_vcpu_ioctl_x86_get_vcpu_events(
11217                                 vcpu, &vcpu->run->s.regs.events);
11218 }
11219
11220 static int sync_regs(struct kvm_vcpu *vcpu)
11221 {
11222         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11223                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11224                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11225         }
11226         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11227                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11228                         return -EINVAL;
11229                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11230         }
11231         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11232                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11233                                 vcpu, &vcpu->run->s.regs.events))
11234                         return -EINVAL;
11235                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11236         }
11237
11238         return 0;
11239 }
11240
11241 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11242 {
11243         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
11244                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
11245                              "guest TSC will not be reliable\n");
11246
11247         return 0;
11248 }
11249
11250 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11251 {
11252         struct page *page;
11253         int r;
11254
11255         vcpu->arch.last_vmentry_cpu = -1;
11256         vcpu->arch.regs_avail = ~0;
11257         vcpu->arch.regs_dirty = ~0;
11258
11259         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11260                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11261         else
11262                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11263
11264         r = kvm_mmu_create(vcpu);
11265         if (r < 0)
11266                 return r;
11267
11268         if (irqchip_in_kernel(vcpu->kvm)) {
11269                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11270                 if (r < 0)
11271                         goto fail_mmu_destroy;
11272
11273                 /*
11274                  * Defer evaluating inhibits until the vCPU is first run, as
11275                  * this vCPU will not get notified of any changes until this
11276                  * vCPU is visible to other vCPUs (marked online and added to
11277                  * the set of vCPUs).  Opportunistically mark APICv active as
11278                  * VMX in particularly is highly unlikely to have inhibits.
11279                  * Ignore the current per-VM APICv state so that vCPU creation
11280                  * is guaranteed to run with a deterministic value, the request
11281                  * will ensure the vCPU gets the correct state before VM-Entry.
11282                  */
11283                 if (enable_apicv) {
11284                         vcpu->arch.apicv_active = true;
11285                         kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
11286                 }
11287         } else
11288                 static_branch_inc(&kvm_has_noapic_vcpu);
11289
11290         r = -ENOMEM;
11291
11292         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11293         if (!page)
11294                 goto fail_free_lapic;
11295         vcpu->arch.pio_data = page_address(page);
11296
11297         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11298                                        GFP_KERNEL_ACCOUNT);
11299         if (!vcpu->arch.mce_banks)
11300                 goto fail_free_pio_data;
11301         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11302
11303         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11304                                 GFP_KERNEL_ACCOUNT))
11305                 goto fail_free_mce_banks;
11306
11307         if (!alloc_emulate_ctxt(vcpu))
11308                 goto free_wbinvd_dirty_mask;
11309
11310         if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11311                 pr_err("kvm: failed to allocate vcpu's fpu\n");
11312                 goto free_emulate_ctxt;
11313         }
11314
11315         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11316         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11317
11318         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11319
11320         kvm_async_pf_hash_reset(vcpu);
11321         kvm_pmu_init(vcpu);
11322
11323         vcpu->arch.pending_external_vector = -1;
11324         vcpu->arch.preempted_in_kernel = false;
11325
11326 #if IS_ENABLED(CONFIG_HYPERV)
11327         vcpu->arch.hv_root_tdp = INVALID_PAGE;
11328 #endif
11329
11330         r = static_call(kvm_x86_vcpu_create)(vcpu);
11331         if (r)
11332                 goto free_guest_fpu;
11333
11334         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11335         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11336         kvm_xen_init_vcpu(vcpu);
11337         kvm_vcpu_mtrr_init(vcpu);
11338         vcpu_load(vcpu);
11339         kvm_set_tsc_khz(vcpu, vcpu->kvm->arch.default_tsc_khz);
11340         kvm_vcpu_reset(vcpu, false);
11341         kvm_init_mmu(vcpu);
11342         vcpu_put(vcpu);
11343         return 0;
11344
11345 free_guest_fpu:
11346         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11347 free_emulate_ctxt:
11348         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11349 free_wbinvd_dirty_mask:
11350         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11351 fail_free_mce_banks:
11352         kfree(vcpu->arch.mce_banks);
11353 fail_free_pio_data:
11354         free_page((unsigned long)vcpu->arch.pio_data);
11355 fail_free_lapic:
11356         kvm_free_lapic(vcpu);
11357 fail_mmu_destroy:
11358         kvm_mmu_destroy(vcpu);
11359         return r;
11360 }
11361
11362 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11363 {
11364         struct kvm *kvm = vcpu->kvm;
11365
11366         if (mutex_lock_killable(&vcpu->mutex))
11367                 return;
11368         vcpu_load(vcpu);
11369         kvm_synchronize_tsc(vcpu, 0);
11370         vcpu_put(vcpu);
11371
11372         /* poll control enabled by default */
11373         vcpu->arch.msr_kvm_poll_control = 1;
11374
11375         mutex_unlock(&vcpu->mutex);
11376
11377         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11378                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11379                                                 KVMCLOCK_SYNC_PERIOD);
11380 }
11381
11382 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11383 {
11384         int idx;
11385
11386         kvmclock_reset(vcpu);
11387
11388         static_call(kvm_x86_vcpu_free)(vcpu);
11389
11390         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11391         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11392         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11393
11394         kvm_xen_destroy_vcpu(vcpu);
11395         kvm_hv_vcpu_uninit(vcpu);
11396         kvm_pmu_destroy(vcpu);
11397         kfree(vcpu->arch.mce_banks);
11398         kvm_free_lapic(vcpu);
11399         idx = srcu_read_lock(&vcpu->kvm->srcu);
11400         kvm_mmu_destroy(vcpu);
11401         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11402         free_page((unsigned long)vcpu->arch.pio_data);
11403         kvfree(vcpu->arch.cpuid_entries);
11404         if (!lapic_in_kernel(vcpu))
11405                 static_branch_dec(&kvm_has_noapic_vcpu);
11406 }
11407
11408 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11409 {
11410         struct kvm_cpuid_entry2 *cpuid_0x1;
11411         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11412         unsigned long new_cr0;
11413
11414         /*
11415          * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11416          * to handle side effects.  RESET emulation hits those flows and relies
11417          * on emulated/virtualized registers, including those that are loaded
11418          * into hardware, to be zeroed at vCPU creation.  Use CRs as a sentinel
11419          * to detect improper or missing initialization.
11420          */
11421         WARN_ON_ONCE(!init_event &&
11422                      (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11423
11424         kvm_lapic_reset(vcpu, init_event);
11425
11426         vcpu->arch.hflags = 0;
11427
11428         vcpu->arch.smi_pending = 0;
11429         vcpu->arch.smi_count = 0;
11430         atomic_set(&vcpu->arch.nmi_queued, 0);
11431         vcpu->arch.nmi_pending = 0;
11432         vcpu->arch.nmi_injected = false;
11433         kvm_clear_interrupt_queue(vcpu);
11434         kvm_clear_exception_queue(vcpu);
11435
11436         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11437         kvm_update_dr0123(vcpu);
11438         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11439         vcpu->arch.dr7 = DR7_FIXED_1;
11440         kvm_update_dr7(vcpu);
11441
11442         vcpu->arch.cr2 = 0;
11443
11444         kvm_make_request(KVM_REQ_EVENT, vcpu);
11445         vcpu->arch.apf.msr_en_val = 0;
11446         vcpu->arch.apf.msr_int_val = 0;
11447         vcpu->arch.st.msr_val = 0;
11448
11449         kvmclock_reset(vcpu);
11450
11451         kvm_clear_async_pf_completion_queue(vcpu);
11452         kvm_async_pf_hash_reset(vcpu);
11453         vcpu->arch.apf.halted = false;
11454
11455         if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11456                 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11457
11458                 /*
11459                  * To avoid have the INIT path from kvm_apic_has_events() that be
11460                  * called with loaded FPU and does not let userspace fix the state.
11461                  */
11462                 if (init_event)
11463                         kvm_put_guest_fpu(vcpu);
11464
11465                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11466                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11467
11468                 if (init_event)
11469                         kvm_load_guest_fpu(vcpu);
11470         }
11471
11472         if (!init_event) {
11473                 kvm_pmu_reset(vcpu);
11474                 vcpu->arch.smbase = 0x30000;
11475
11476                 vcpu->arch.msr_misc_features_enables = 0;
11477
11478                 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11479                 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11480         }
11481
11482         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11483         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11484         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11485
11486         /*
11487          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11488          * if no CPUID match is found.  Note, it's impossible to get a match at
11489          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11490          * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11491          * on RESET.  But, go through the motions in case that's ever remedied.
11492          */
11493         cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11494         kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11495
11496         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11497
11498         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11499         kvm_rip_write(vcpu, 0xfff0);
11500
11501         vcpu->arch.cr3 = 0;
11502         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11503
11504         /*
11505          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11506          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11507          * (or qualify) that with a footnote stating that CD/NW are preserved.
11508          */
11509         new_cr0 = X86_CR0_ET;
11510         if (init_event)
11511                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11512         else
11513                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11514
11515         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11516         static_call(kvm_x86_set_cr4)(vcpu, 0);
11517         static_call(kvm_x86_set_efer)(vcpu, 0);
11518         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11519
11520         /*
11521          * On the standard CR0/CR4/EFER modification paths, there are several
11522          * complex conditions determining whether the MMU has to be reset and/or
11523          * which PCIDs have to be flushed.  However, CR0.WP and the paging-related
11524          * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
11525          * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
11526          * CR0 will be '0' prior to RESET).  So we only need to check CR0.PG here.
11527          */
11528         if (old_cr0 & X86_CR0_PG) {
11529                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11530                 kvm_mmu_reset_context(vcpu);
11531         }
11532
11533         /*
11534          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11535          * APM states the TLBs are untouched by INIT, but it also states that
11536          * the TLBs are flushed on "External initialization of the processor."
11537          * Flush the guest TLB regardless of vendor, there is no meaningful
11538          * benefit in relying on the guest to flush the TLB immediately after
11539          * INIT.  A spurious TLB flush is benign and likely negligible from a
11540          * performance perspective.
11541          */
11542         if (init_event)
11543                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11544 }
11545 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11546
11547 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11548 {
11549         struct kvm_segment cs;
11550
11551         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11552         cs.selector = vector << 8;
11553         cs.base = vector << 12;
11554         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11555         kvm_rip_write(vcpu, 0);
11556 }
11557 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11558
11559 int kvm_arch_hardware_enable(void)
11560 {
11561         struct kvm *kvm;
11562         struct kvm_vcpu *vcpu;
11563         unsigned long i;
11564         int ret;
11565         u64 local_tsc;
11566         u64 max_tsc = 0;
11567         bool stable, backwards_tsc = false;
11568
11569         kvm_user_return_msr_cpu_online();
11570         ret = static_call(kvm_x86_hardware_enable)();
11571         if (ret != 0)
11572                 return ret;
11573
11574         local_tsc = rdtsc();
11575         stable = !kvm_check_tsc_unstable();
11576         list_for_each_entry(kvm, &vm_list, vm_list) {
11577                 kvm_for_each_vcpu(i, vcpu, kvm) {
11578                         if (!stable && vcpu->cpu == smp_processor_id())
11579                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11580                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11581                                 backwards_tsc = true;
11582                                 if (vcpu->arch.last_host_tsc > max_tsc)
11583                                         max_tsc = vcpu->arch.last_host_tsc;
11584                         }
11585                 }
11586         }
11587
11588         /*
11589          * Sometimes, even reliable TSCs go backwards.  This happens on
11590          * platforms that reset TSC during suspend or hibernate actions, but
11591          * maintain synchronization.  We must compensate.  Fortunately, we can
11592          * detect that condition here, which happens early in CPU bringup,
11593          * before any KVM threads can be running.  Unfortunately, we can't
11594          * bring the TSCs fully up to date with real time, as we aren't yet far
11595          * enough into CPU bringup that we know how much real time has actually
11596          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11597          * variables that haven't been updated yet.
11598          *
11599          * So we simply find the maximum observed TSC above, then record the
11600          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11601          * the adjustment will be applied.  Note that we accumulate
11602          * adjustments, in case multiple suspend cycles happen before some VCPU
11603          * gets a chance to run again.  In the event that no KVM threads get a
11604          * chance to run, we will miss the entire elapsed period, as we'll have
11605          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11606          * loose cycle time.  This isn't too big a deal, since the loss will be
11607          * uniform across all VCPUs (not to mention the scenario is extremely
11608          * unlikely). It is possible that a second hibernate recovery happens
11609          * much faster than a first, causing the observed TSC here to be
11610          * smaller; this would require additional padding adjustment, which is
11611          * why we set last_host_tsc to the local tsc observed here.
11612          *
11613          * N.B. - this code below runs only on platforms with reliable TSC,
11614          * as that is the only way backwards_tsc is set above.  Also note
11615          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11616          * have the same delta_cyc adjustment applied if backwards_tsc
11617          * is detected.  Note further, this adjustment is only done once,
11618          * as we reset last_host_tsc on all VCPUs to stop this from being
11619          * called multiple times (one for each physical CPU bringup).
11620          *
11621          * Platforms with unreliable TSCs don't have to deal with this, they
11622          * will be compensated by the logic in vcpu_load, which sets the TSC to
11623          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11624          * guarantee that they stay in perfect synchronization.
11625          */
11626         if (backwards_tsc) {
11627                 u64 delta_cyc = max_tsc - local_tsc;
11628                 list_for_each_entry(kvm, &vm_list, vm_list) {
11629                         kvm->arch.backwards_tsc_observed = true;
11630                         kvm_for_each_vcpu(i, vcpu, kvm) {
11631                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11632                                 vcpu->arch.last_host_tsc = local_tsc;
11633                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11634                         }
11635
11636                         /*
11637                          * We have to disable TSC offset matching.. if you were
11638                          * booting a VM while issuing an S4 host suspend....
11639                          * you may have some problem.  Solving this issue is
11640                          * left as an exercise to the reader.
11641                          */
11642                         kvm->arch.last_tsc_nsec = 0;
11643                         kvm->arch.last_tsc_write = 0;
11644                 }
11645
11646         }
11647         return 0;
11648 }
11649
11650 void kvm_arch_hardware_disable(void)
11651 {
11652         static_call(kvm_x86_hardware_disable)();
11653         drop_user_return_notifiers();
11654 }
11655
11656 static inline void kvm_ops_update(struct kvm_x86_init_ops *ops)
11657 {
11658         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11659
11660 #define __KVM_X86_OP(func) \
11661         static_call_update(kvm_x86_##func, kvm_x86_ops.func);
11662 #define KVM_X86_OP(func) \
11663         WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
11664 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
11665 #define KVM_X86_OP_OPTIONAL_RET0(func) \
11666         static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
11667                                            (void *)__static_call_return0);
11668 #include <asm/kvm-x86-ops.h>
11669 #undef __KVM_X86_OP
11670
11671         kvm_pmu_ops_update(ops->pmu_ops);
11672 }
11673
11674 int kvm_arch_hardware_setup(void *opaque)
11675 {
11676         struct kvm_x86_init_ops *ops = opaque;
11677         int r;
11678
11679         rdmsrl_safe(MSR_EFER, &host_efer);
11680
11681         if (boot_cpu_has(X86_FEATURE_XSAVES))
11682                 rdmsrl(MSR_IA32_XSS, host_xss);
11683
11684         r = ops->hardware_setup();
11685         if (r != 0)
11686                 return r;
11687
11688         kvm_ops_update(ops);
11689
11690         kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
11691
11692         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11693                 supported_xss = 0;
11694
11695 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11696         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11697 #undef __kvm_cpu_cap_has
11698
11699         if (kvm_has_tsc_control) {
11700                 /*
11701                  * Make sure the user can only configure tsc_khz values that
11702                  * fit into a signed integer.
11703                  * A min value is not calculated because it will always
11704                  * be 1 on all machines.
11705                  */
11706                 u64 max = min(0x7fffffffULL,
11707                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11708                 kvm_max_guest_tsc_khz = max;
11709         }
11710         kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11711         kvm_init_msr_list();
11712         return 0;
11713 }
11714
11715 void kvm_arch_hardware_unsetup(void)
11716 {
11717         kvm_unregister_perf_callbacks();
11718
11719         static_call(kvm_x86_hardware_unsetup)();
11720 }
11721
11722 int kvm_arch_check_processor_compat(void *opaque)
11723 {
11724         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11725         struct kvm_x86_init_ops *ops = opaque;
11726
11727         WARN_ON(!irqs_disabled());
11728
11729         if (__cr4_reserved_bits(cpu_has, c) !=
11730             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11731                 return -EIO;
11732
11733         return ops->check_processor_compatibility();
11734 }
11735
11736 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11737 {
11738         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11739 }
11740 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11741
11742 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11743 {
11744         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11745 }
11746
11747 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11748 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11749
11750 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11751 {
11752         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11753
11754         vcpu->arch.l1tf_flush_l1d = true;
11755         if (pmu->version && unlikely(pmu->event_count)) {
11756                 pmu->need_cleanup = true;
11757                 kvm_make_request(KVM_REQ_PMU, vcpu);
11758         }
11759         static_call(kvm_x86_sched_in)(vcpu, cpu);
11760 }
11761
11762 void kvm_arch_free_vm(struct kvm *kvm)
11763 {
11764         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11765         __kvm_arch_free_vm(kvm);
11766 }
11767
11768
11769 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11770 {
11771         int ret;
11772         unsigned long flags;
11773
11774         if (type)
11775                 return -EINVAL;
11776
11777         ret = kvm_page_track_init(kvm);
11778         if (ret)
11779                 goto out;
11780
11781         ret = kvm_mmu_init_vm(kvm);
11782         if (ret)
11783                 goto out_page_track;
11784
11785         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11786         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11787         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11788
11789         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11790         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11791         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11792         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11793                 &kvm->arch.irq_sources_bitmap);
11794
11795         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11796         mutex_init(&kvm->arch.apic_map_lock);
11797         seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11798         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11799
11800         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11801         pvclock_update_vm_gtod_copy(kvm);
11802         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11803
11804         kvm->arch.default_tsc_khz = max_tsc_khz ? : tsc_khz;
11805         kvm->arch.guest_can_read_msr_platform_info = true;
11806         kvm->arch.enable_pmu = enable_pmu;
11807
11808 #if IS_ENABLED(CONFIG_HYPERV)
11809         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11810         kvm->arch.hv_root_tdp = INVALID_PAGE;
11811 #endif
11812
11813         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11814         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11815
11816         kvm_apicv_init(kvm);
11817         kvm_hv_init_vm(kvm);
11818         kvm_xen_init_vm(kvm);
11819
11820         return static_call(kvm_x86_vm_init)(kvm);
11821
11822 out_page_track:
11823         kvm_page_track_cleanup(kvm);
11824 out:
11825         return ret;
11826 }
11827
11828 int kvm_arch_post_init_vm(struct kvm *kvm)
11829 {
11830         return kvm_mmu_post_init_vm(kvm);
11831 }
11832
11833 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11834 {
11835         vcpu_load(vcpu);
11836         kvm_mmu_unload(vcpu);
11837         vcpu_put(vcpu);
11838 }
11839
11840 static void kvm_unload_vcpu_mmus(struct kvm *kvm)
11841 {
11842         unsigned long i;
11843         struct kvm_vcpu *vcpu;
11844
11845         kvm_for_each_vcpu(i, vcpu, kvm) {
11846                 kvm_clear_async_pf_completion_queue(vcpu);
11847                 kvm_unload_vcpu_mmu(vcpu);
11848         }
11849 }
11850
11851 void kvm_arch_sync_events(struct kvm *kvm)
11852 {
11853         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11854         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11855         kvm_free_pit(kvm);
11856 }
11857
11858 /**
11859  * __x86_set_memory_region: Setup KVM internal memory slot
11860  *
11861  * @kvm: the kvm pointer to the VM.
11862  * @id: the slot ID to setup.
11863  * @gpa: the GPA to install the slot (unused when @size == 0).
11864  * @size: the size of the slot. Set to zero to uninstall a slot.
11865  *
11866  * This function helps to setup a KVM internal memory slot.  Specify
11867  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11868  * slot.  The return code can be one of the following:
11869  *
11870  *   HVA:           on success (uninstall will return a bogus HVA)
11871  *   -errno:        on error
11872  *
11873  * The caller should always use IS_ERR() to check the return value
11874  * before use.  Note, the KVM internal memory slots are guaranteed to
11875  * remain valid and unchanged until the VM is destroyed, i.e., the
11876  * GPA->HVA translation will not change.  However, the HVA is a user
11877  * address, i.e. its accessibility is not guaranteed, and must be
11878  * accessed via __copy_{to,from}_user().
11879  */
11880 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11881                                       u32 size)
11882 {
11883         int i, r;
11884         unsigned long hva, old_npages;
11885         struct kvm_memslots *slots = kvm_memslots(kvm);
11886         struct kvm_memory_slot *slot;
11887
11888         /* Called with kvm->slots_lock held.  */
11889         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11890                 return ERR_PTR_USR(-EINVAL);
11891
11892         slot = id_to_memslot(slots, id);
11893         if (size) {
11894                 if (slot && slot->npages)
11895                         return ERR_PTR_USR(-EEXIST);
11896
11897                 /*
11898                  * MAP_SHARED to prevent internal slot pages from being moved
11899                  * by fork()/COW.
11900                  */
11901                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11902                               MAP_SHARED | MAP_ANONYMOUS, 0);
11903                 if (IS_ERR((void *)hva))
11904                         return (void __user *)hva;
11905         } else {
11906                 if (!slot || !slot->npages)
11907                         return NULL;
11908
11909                 old_npages = slot->npages;
11910                 hva = slot->userspace_addr;
11911         }
11912
11913         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11914                 struct kvm_userspace_memory_region m;
11915
11916                 m.slot = id | (i << 16);
11917                 m.flags = 0;
11918                 m.guest_phys_addr = gpa;
11919                 m.userspace_addr = hva;
11920                 m.memory_size = size;
11921                 r = __kvm_set_memory_region(kvm, &m);
11922                 if (r < 0)
11923                         return ERR_PTR_USR(r);
11924         }
11925
11926         if (!size)
11927                 vm_munmap(hva, old_npages * PAGE_SIZE);
11928
11929         return (void __user *)hva;
11930 }
11931 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11932
11933 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11934 {
11935         kvm_mmu_pre_destroy_vm(kvm);
11936 }
11937
11938 void kvm_arch_destroy_vm(struct kvm *kvm)
11939 {
11940         if (current->mm == kvm->mm) {
11941                 /*
11942                  * Free memory regions allocated on behalf of userspace,
11943                  * unless the memory map has changed due to process exit
11944                  * or fd copying.
11945                  */
11946                 mutex_lock(&kvm->slots_lock);
11947                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11948                                         0, 0);
11949                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11950                                         0, 0);
11951                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11952                 mutex_unlock(&kvm->slots_lock);
11953         }
11954         kvm_unload_vcpu_mmus(kvm);
11955         static_call_cond(kvm_x86_vm_destroy)(kvm);
11956         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11957         kvm_pic_destroy(kvm);
11958         kvm_ioapic_destroy(kvm);
11959         kvm_destroy_vcpus(kvm);
11960         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11961         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11962         kvm_mmu_uninit_vm(kvm);
11963         kvm_page_track_cleanup(kvm);
11964         kvm_xen_destroy_vm(kvm);
11965         kvm_hv_destroy_vm(kvm);
11966 }
11967
11968 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11969 {
11970         int i;
11971
11972         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11973                 kvfree(slot->arch.rmap[i]);
11974                 slot->arch.rmap[i] = NULL;
11975         }
11976 }
11977
11978 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11979 {
11980         int i;
11981
11982         memslot_rmap_free(slot);
11983
11984         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11985                 kvfree(slot->arch.lpage_info[i - 1]);
11986                 slot->arch.lpage_info[i - 1] = NULL;
11987         }
11988
11989         kvm_page_track_free_memslot(slot);
11990 }
11991
11992 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
11993 {
11994         const int sz = sizeof(*slot->arch.rmap[0]);
11995         int i;
11996
11997         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11998                 int level = i + 1;
11999                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12000
12001                 if (slot->arch.rmap[i])
12002                         continue;
12003
12004                 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
12005                 if (!slot->arch.rmap[i]) {
12006                         memslot_rmap_free(slot);
12007                         return -ENOMEM;
12008                 }
12009         }
12010
12011         return 0;
12012 }
12013
12014 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
12015                                       struct kvm_memory_slot *slot)
12016 {
12017         unsigned long npages = slot->npages;
12018         int i, r;
12019
12020         /*
12021          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
12022          * old arrays will be freed by __kvm_set_memory_region() if installing
12023          * the new memslot is successful.
12024          */
12025         memset(&slot->arch, 0, sizeof(slot->arch));
12026
12027         if (kvm_memslots_have_rmaps(kvm)) {
12028                 r = memslot_rmap_alloc(slot, npages);
12029                 if (r)
12030                         return r;
12031         }
12032
12033         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12034                 struct kvm_lpage_info *linfo;
12035                 unsigned long ugfn;
12036                 int lpages;
12037                 int level = i + 1;
12038
12039                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12040
12041                 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
12042                 if (!linfo)
12043                         goto out_free;
12044
12045                 slot->arch.lpage_info[i - 1] = linfo;
12046
12047                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
12048                         linfo[0].disallow_lpage = 1;
12049                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
12050                         linfo[lpages - 1].disallow_lpage = 1;
12051                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
12052                 /*
12053                  * If the gfn and userspace address are not aligned wrt each
12054                  * other, disable large page support for this slot.
12055                  */
12056                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
12057                         unsigned long j;
12058
12059                         for (j = 0; j < lpages; ++j)
12060                                 linfo[j].disallow_lpage = 1;
12061                 }
12062         }
12063
12064         if (kvm_page_track_create_memslot(kvm, slot, npages))
12065                 goto out_free;
12066
12067         return 0;
12068
12069 out_free:
12070         memslot_rmap_free(slot);
12071
12072         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12073                 kvfree(slot->arch.lpage_info[i - 1]);
12074                 slot->arch.lpage_info[i - 1] = NULL;
12075         }
12076         return -ENOMEM;
12077 }
12078
12079 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
12080 {
12081         struct kvm_vcpu *vcpu;
12082         unsigned long i;
12083
12084         /*
12085          * memslots->generation has been incremented.
12086          * mmio generation may have reached its maximum value.
12087          */
12088         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
12089
12090         /* Force re-initialization of steal_time cache */
12091         kvm_for_each_vcpu(i, vcpu, kvm)
12092                 kvm_vcpu_kick(vcpu);
12093 }
12094
12095 int kvm_arch_prepare_memory_region(struct kvm *kvm,
12096                                    const struct kvm_memory_slot *old,
12097                                    struct kvm_memory_slot *new,
12098                                    enum kvm_mr_change change)
12099 {
12100         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE) {
12101                 if ((new->base_gfn + new->npages - 1) > kvm_mmu_max_gfn())
12102                         return -EINVAL;
12103
12104                 return kvm_alloc_memslot_metadata(kvm, new);
12105         }
12106
12107         if (change == KVM_MR_FLAGS_ONLY)
12108                 memcpy(&new->arch, &old->arch, sizeof(old->arch));
12109         else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
12110                 return -EIO;
12111
12112         return 0;
12113 }
12114
12115
12116 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
12117 {
12118         struct kvm_arch *ka = &kvm->arch;
12119
12120         if (!kvm_x86_ops.cpu_dirty_log_size)
12121                 return;
12122
12123         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
12124             (!enable && --ka->cpu_dirty_logging_count == 0))
12125                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
12126
12127         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
12128 }
12129
12130 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
12131                                      struct kvm_memory_slot *old,
12132                                      const struct kvm_memory_slot *new,
12133                                      enum kvm_mr_change change)
12134 {
12135         u32 old_flags = old ? old->flags : 0;
12136         u32 new_flags = new ? new->flags : 0;
12137         bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
12138
12139         /*
12140          * Update CPU dirty logging if dirty logging is being toggled.  This
12141          * applies to all operations.
12142          */
12143         if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
12144                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
12145
12146         /*
12147          * Nothing more to do for RO slots (which can't be dirtied and can't be
12148          * made writable) or CREATE/MOVE/DELETE of a slot.
12149          *
12150          * For a memslot with dirty logging disabled:
12151          * CREATE:      No dirty mappings will already exist.
12152          * MOVE/DELETE: The old mappings will already have been cleaned up by
12153          *              kvm_arch_flush_shadow_memslot()
12154          *
12155          * For a memslot with dirty logging enabled:
12156          * CREATE:      No shadow pages exist, thus nothing to write-protect
12157          *              and no dirty bits to clear.
12158          * MOVE/DELETE: The old mappings will already have been cleaned up by
12159          *              kvm_arch_flush_shadow_memslot().
12160          */
12161         if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
12162                 return;
12163
12164         /*
12165          * READONLY and non-flags changes were filtered out above, and the only
12166          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12167          * logging isn't being toggled on or off.
12168          */
12169         if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
12170                 return;
12171
12172         if (!log_dirty_pages) {
12173                 /*
12174                  * Dirty logging tracks sptes in 4k granularity, meaning that
12175                  * large sptes have to be split.  If live migration succeeds,
12176                  * the guest in the source machine will be destroyed and large
12177                  * sptes will be created in the destination.  However, if the
12178                  * guest continues to run in the source machine (for example if
12179                  * live migration fails), small sptes will remain around and
12180                  * cause bad performance.
12181                  *
12182                  * Scan sptes if dirty logging has been stopped, dropping those
12183                  * which can be collapsed into a single large-page spte.  Later
12184                  * page faults will create the large-page sptes.
12185                  */
12186                 kvm_mmu_zap_collapsible_sptes(kvm, new);
12187         } else {
12188                 /*
12189                  * Initially-all-set does not require write protecting any page,
12190                  * because they're all assumed to be dirty.
12191                  */
12192                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
12193                         return;
12194
12195                 if (READ_ONCE(eager_page_split))
12196                         kvm_mmu_slot_try_split_huge_pages(kvm, new, PG_LEVEL_4K);
12197
12198                 if (kvm_x86_ops.cpu_dirty_log_size) {
12199                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
12200                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
12201                 } else {
12202                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
12203                 }
12204         }
12205 }
12206
12207 void kvm_arch_commit_memory_region(struct kvm *kvm,
12208                                 struct kvm_memory_slot *old,
12209                                 const struct kvm_memory_slot *new,
12210                                 enum kvm_mr_change change)
12211 {
12212         if (!kvm->arch.n_requested_mmu_pages &&
12213             (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
12214                 unsigned long nr_mmu_pages;
12215
12216                 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
12217                 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
12218                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
12219         }
12220
12221         kvm_mmu_slot_apply_flags(kvm, old, new, change);
12222
12223         /* Free the arrays associated with the old memslot. */
12224         if (change == KVM_MR_MOVE)
12225                 kvm_arch_free_memslot(kvm, old);
12226 }
12227
12228 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12229 {
12230         kvm_mmu_zap_all(kvm);
12231 }
12232
12233 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12234                                    struct kvm_memory_slot *slot)
12235 {
12236         kvm_page_track_flush_slot(kvm, slot);
12237 }
12238
12239 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12240 {
12241         return (is_guest_mode(vcpu) &&
12242                 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12243 }
12244
12245 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12246 {
12247         if (!list_empty_careful(&vcpu->async_pf.done))
12248                 return true;
12249
12250         if (kvm_apic_has_events(vcpu))
12251                 return true;
12252
12253         if (vcpu->arch.pv.pv_unhalted)
12254                 return true;
12255
12256         if (vcpu->arch.exception.pending)
12257                 return true;
12258
12259         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12260             (vcpu->arch.nmi_pending &&
12261              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12262                 return true;
12263
12264         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12265             (vcpu->arch.smi_pending &&
12266              static_call(kvm_x86_smi_allowed)(vcpu, false)))
12267                 return true;
12268
12269         if (kvm_arch_interrupt_allowed(vcpu) &&
12270             (kvm_cpu_has_interrupt(vcpu) ||
12271             kvm_guest_apic_has_interrupt(vcpu)))
12272                 return true;
12273
12274         if (kvm_hv_has_stimer_pending(vcpu))
12275                 return true;
12276
12277         if (is_guest_mode(vcpu) &&
12278             kvm_x86_ops.nested_ops->hv_timer_pending &&
12279             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12280                 return true;
12281
12282         if (kvm_xen_has_pending_events(vcpu))
12283                 return true;
12284
12285         if (kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu))
12286                 return true;
12287
12288         return false;
12289 }
12290
12291 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12292 {
12293         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12294 }
12295
12296 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12297 {
12298         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12299                 return true;
12300
12301         return false;
12302 }
12303
12304 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12305 {
12306         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12307                 return true;
12308
12309         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12310                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12311                  kvm_test_request(KVM_REQ_EVENT, vcpu))
12312                 return true;
12313
12314         return kvm_arch_dy_has_pending_interrupt(vcpu);
12315 }
12316
12317 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12318 {
12319         if (vcpu->arch.guest_state_protected)
12320                 return true;
12321
12322         return vcpu->arch.preempted_in_kernel;
12323 }
12324
12325 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12326 {
12327         return kvm_rip_read(vcpu);
12328 }
12329
12330 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12331 {
12332         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12333 }
12334
12335 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12336 {
12337         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12338 }
12339
12340 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12341 {
12342         /* Can't read the RIP when guest state is protected, just return 0 */
12343         if (vcpu->arch.guest_state_protected)
12344                 return 0;
12345
12346         if (is_64_bit_mode(vcpu))
12347                 return kvm_rip_read(vcpu);
12348         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12349                      kvm_rip_read(vcpu));
12350 }
12351 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12352
12353 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12354 {
12355         return kvm_get_linear_rip(vcpu) == linear_rip;
12356 }
12357 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12358
12359 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12360 {
12361         unsigned long rflags;
12362
12363         rflags = static_call(kvm_x86_get_rflags)(vcpu);
12364         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12365                 rflags &= ~X86_EFLAGS_TF;
12366         return rflags;
12367 }
12368 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12369
12370 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12371 {
12372         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12373             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12374                 rflags |= X86_EFLAGS_TF;
12375         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12376 }
12377
12378 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12379 {
12380         __kvm_set_rflags(vcpu, rflags);
12381         kvm_make_request(KVM_REQ_EVENT, vcpu);
12382 }
12383 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12384
12385 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12386 {
12387         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12388
12389         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12390 }
12391
12392 static inline u32 kvm_async_pf_next_probe(u32 key)
12393 {
12394         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12395 }
12396
12397 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12398 {
12399         u32 key = kvm_async_pf_hash_fn(gfn);
12400
12401         while (vcpu->arch.apf.gfns[key] != ~0)
12402                 key = kvm_async_pf_next_probe(key);
12403
12404         vcpu->arch.apf.gfns[key] = gfn;
12405 }
12406
12407 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12408 {
12409         int i;
12410         u32 key = kvm_async_pf_hash_fn(gfn);
12411
12412         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12413                      (vcpu->arch.apf.gfns[key] != gfn &&
12414                       vcpu->arch.apf.gfns[key] != ~0); i++)
12415                 key = kvm_async_pf_next_probe(key);
12416
12417         return key;
12418 }
12419
12420 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12421 {
12422         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12423 }
12424
12425 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12426 {
12427         u32 i, j, k;
12428
12429         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12430
12431         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12432                 return;
12433
12434         while (true) {
12435                 vcpu->arch.apf.gfns[i] = ~0;
12436                 do {
12437                         j = kvm_async_pf_next_probe(j);
12438                         if (vcpu->arch.apf.gfns[j] == ~0)
12439                                 return;
12440                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12441                         /*
12442                          * k lies cyclically in ]i,j]
12443                          * |    i.k.j |
12444                          * |....j i.k.| or  |.k..j i...|
12445                          */
12446                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12447                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12448                 i = j;
12449         }
12450 }
12451
12452 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12453 {
12454         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12455
12456         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12457                                       sizeof(reason));
12458 }
12459
12460 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12461 {
12462         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12463
12464         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12465                                              &token, offset, sizeof(token));
12466 }
12467
12468 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12469 {
12470         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12471         u32 val;
12472
12473         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12474                                          &val, offset, sizeof(val)))
12475                 return false;
12476
12477         return !val;
12478 }
12479
12480 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12481 {
12482
12483         if (!kvm_pv_async_pf_enabled(vcpu))
12484                 return false;
12485
12486         if (vcpu->arch.apf.send_user_only &&
12487             static_call(kvm_x86_get_cpl)(vcpu) == 0)
12488                 return false;
12489
12490         if (is_guest_mode(vcpu)) {
12491                 /*
12492                  * L1 needs to opt into the special #PF vmexits that are
12493                  * used to deliver async page faults.
12494                  */
12495                 return vcpu->arch.apf.delivery_as_pf_vmexit;
12496         } else {
12497                 /*
12498                  * Play it safe in case the guest temporarily disables paging.
12499                  * The real mode IDT in particular is unlikely to have a #PF
12500                  * exception setup.
12501                  */
12502                 return is_paging(vcpu);
12503         }
12504 }
12505
12506 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12507 {
12508         if (unlikely(!lapic_in_kernel(vcpu) ||
12509                      kvm_event_needs_reinjection(vcpu) ||
12510                      vcpu->arch.exception.pending))
12511                 return false;
12512
12513         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12514                 return false;
12515
12516         /*
12517          * If interrupts are off we cannot even use an artificial
12518          * halt state.
12519          */
12520         return kvm_arch_interrupt_allowed(vcpu);
12521 }
12522
12523 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12524                                      struct kvm_async_pf *work)
12525 {
12526         struct x86_exception fault;
12527
12528         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12529         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12530
12531         if (kvm_can_deliver_async_pf(vcpu) &&
12532             !apf_put_user_notpresent(vcpu)) {
12533                 fault.vector = PF_VECTOR;
12534                 fault.error_code_valid = true;
12535                 fault.error_code = 0;
12536                 fault.nested_page_fault = false;
12537                 fault.address = work->arch.token;
12538                 fault.async_page_fault = true;
12539                 kvm_inject_page_fault(vcpu, &fault);
12540                 return true;
12541         } else {
12542                 /*
12543                  * It is not possible to deliver a paravirtualized asynchronous
12544                  * page fault, but putting the guest in an artificial halt state
12545                  * can be beneficial nevertheless: if an interrupt arrives, we
12546                  * can deliver it timely and perhaps the guest will schedule
12547                  * another process.  When the instruction that triggered a page
12548                  * fault is retried, hopefully the page will be ready in the host.
12549                  */
12550                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12551                 return false;
12552         }
12553 }
12554
12555 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12556                                  struct kvm_async_pf *work)
12557 {
12558         struct kvm_lapic_irq irq = {
12559                 .delivery_mode = APIC_DM_FIXED,
12560                 .vector = vcpu->arch.apf.vec
12561         };
12562
12563         if (work->wakeup_all)
12564                 work->arch.token = ~0; /* broadcast wakeup */
12565         else
12566                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12567         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12568
12569         if ((work->wakeup_all || work->notpresent_injected) &&
12570             kvm_pv_async_pf_enabled(vcpu) &&
12571             !apf_put_user_ready(vcpu, work->arch.token)) {
12572                 vcpu->arch.apf.pageready_pending = true;
12573                 kvm_apic_set_irq(vcpu, &irq, NULL);
12574         }
12575
12576         vcpu->arch.apf.halted = false;
12577         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12578 }
12579
12580 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12581 {
12582         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12583         if (!vcpu->arch.apf.pageready_pending)
12584                 kvm_vcpu_kick(vcpu);
12585 }
12586
12587 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12588 {
12589         if (!kvm_pv_async_pf_enabled(vcpu))
12590                 return true;
12591         else
12592                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12593 }
12594
12595 void kvm_arch_start_assignment(struct kvm *kvm)
12596 {
12597         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12598                 static_call_cond(kvm_x86_pi_start_assignment)(kvm);
12599 }
12600 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12601
12602 void kvm_arch_end_assignment(struct kvm *kvm)
12603 {
12604         atomic_dec(&kvm->arch.assigned_device_count);
12605 }
12606 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12607
12608 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12609 {
12610         return atomic_read(&kvm->arch.assigned_device_count);
12611 }
12612 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12613
12614 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12615 {
12616         atomic_inc(&kvm->arch.noncoherent_dma_count);
12617 }
12618 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12619
12620 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12621 {
12622         atomic_dec(&kvm->arch.noncoherent_dma_count);
12623 }
12624 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12625
12626 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12627 {
12628         return atomic_read(&kvm->arch.noncoherent_dma_count);
12629 }
12630 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12631
12632 bool kvm_arch_has_irq_bypass(void)
12633 {
12634         return true;
12635 }
12636
12637 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12638                                       struct irq_bypass_producer *prod)
12639 {
12640         struct kvm_kernel_irqfd *irqfd =
12641                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12642         int ret;
12643
12644         irqfd->producer = prod;
12645         kvm_arch_start_assignment(irqfd->kvm);
12646         ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm,
12647                                          prod->irq, irqfd->gsi, 1);
12648
12649         if (ret)
12650                 kvm_arch_end_assignment(irqfd->kvm);
12651
12652         return ret;
12653 }
12654
12655 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12656                                       struct irq_bypass_producer *prod)
12657 {
12658         int ret;
12659         struct kvm_kernel_irqfd *irqfd =
12660                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12661
12662         WARN_ON(irqfd->producer != prod);
12663         irqfd->producer = NULL;
12664
12665         /*
12666          * When producer of consumer is unregistered, we change back to
12667          * remapped mode, so we can re-use the current implementation
12668          * when the irq is masked/disabled or the consumer side (KVM
12669          * int this case doesn't want to receive the interrupts.
12670         */
12671         ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12672         if (ret)
12673                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12674                        " fails: %d\n", irqfd->consumer.token, ret);
12675
12676         kvm_arch_end_assignment(irqfd->kvm);
12677 }
12678
12679 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12680                                    uint32_t guest_irq, bool set)
12681 {
12682         return static_call(kvm_x86_pi_update_irte)(kvm, host_irq, guest_irq, set);
12683 }
12684
12685 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12686                                   struct kvm_kernel_irq_routing_entry *new)
12687 {
12688         if (new->type != KVM_IRQ_ROUTING_MSI)
12689                 return true;
12690
12691         return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12692 }
12693
12694 bool kvm_vector_hashing_enabled(void)
12695 {
12696         return vector_hashing;
12697 }
12698
12699 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12700 {
12701         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12702 }
12703 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12704
12705
12706 int kvm_spec_ctrl_test_value(u64 value)
12707 {
12708         /*
12709          * test that setting IA32_SPEC_CTRL to given value
12710          * is allowed by the host processor
12711          */
12712
12713         u64 saved_value;
12714         unsigned long flags;
12715         int ret = 0;
12716
12717         local_irq_save(flags);
12718
12719         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12720                 ret = 1;
12721         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12722                 ret = 1;
12723         else
12724                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12725
12726         local_irq_restore(flags);
12727
12728         return ret;
12729 }
12730 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12731
12732 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12733 {
12734         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
12735         struct x86_exception fault;
12736         u64 access = error_code &
12737                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12738
12739         if (!(error_code & PFERR_PRESENT_MASK) ||
12740             mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != UNMAPPED_GVA) {
12741                 /*
12742                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12743                  * tables probably do not match the TLB.  Just proceed
12744                  * with the error code that the processor gave.
12745                  */
12746                 fault.vector = PF_VECTOR;
12747                 fault.error_code_valid = true;
12748                 fault.error_code = error_code;
12749                 fault.nested_page_fault = false;
12750                 fault.address = gva;
12751         }
12752         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12753 }
12754 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12755
12756 /*
12757  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12758  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12759  * indicates whether exit to userspace is needed.
12760  */
12761 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12762                               struct x86_exception *e)
12763 {
12764         if (r == X86EMUL_PROPAGATE_FAULT) {
12765                 kvm_inject_emulated_page_fault(vcpu, e);
12766                 return 1;
12767         }
12768
12769         /*
12770          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12771          * while handling a VMX instruction KVM could've handled the request
12772          * correctly by exiting to userspace and performing I/O but there
12773          * doesn't seem to be a real use-case behind such requests, just return
12774          * KVM_EXIT_INTERNAL_ERROR for now.
12775          */
12776         kvm_prepare_emulation_failure_exit(vcpu);
12777
12778         return 0;
12779 }
12780 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12781
12782 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12783 {
12784         bool pcid_enabled;
12785         struct x86_exception e;
12786         struct {
12787                 u64 pcid;
12788                 u64 gla;
12789         } operand;
12790         int r;
12791
12792         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12793         if (r != X86EMUL_CONTINUE)
12794                 return kvm_handle_memory_failure(vcpu, r, &e);
12795
12796         if (operand.pcid >> 12 != 0) {
12797                 kvm_inject_gp(vcpu, 0);
12798                 return 1;
12799         }
12800
12801         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12802
12803         switch (type) {
12804         case INVPCID_TYPE_INDIV_ADDR:
12805                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12806                     is_noncanonical_address(operand.gla, vcpu)) {
12807                         kvm_inject_gp(vcpu, 0);
12808                         return 1;
12809                 }
12810                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12811                 return kvm_skip_emulated_instruction(vcpu);
12812
12813         case INVPCID_TYPE_SINGLE_CTXT:
12814                 if (!pcid_enabled && (operand.pcid != 0)) {
12815                         kvm_inject_gp(vcpu, 0);
12816                         return 1;
12817                 }
12818
12819                 kvm_invalidate_pcid(vcpu, operand.pcid);
12820                 return kvm_skip_emulated_instruction(vcpu);
12821
12822         case INVPCID_TYPE_ALL_NON_GLOBAL:
12823                 /*
12824                  * Currently, KVM doesn't mark global entries in the shadow
12825                  * page tables, so a non-global flush just degenerates to a
12826                  * global flush. If needed, we could optimize this later by
12827                  * keeping track of global entries in shadow page tables.
12828                  */
12829
12830                 fallthrough;
12831         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12832                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12833                 return kvm_skip_emulated_instruction(vcpu);
12834
12835         default:
12836                 kvm_inject_gp(vcpu, 0);
12837                 return 1;
12838         }
12839 }
12840 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12841
12842 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12843 {
12844         struct kvm_run *run = vcpu->run;
12845         struct kvm_mmio_fragment *frag;
12846         unsigned int len;
12847
12848         BUG_ON(!vcpu->mmio_needed);
12849
12850         /* Complete previous fragment */
12851         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12852         len = min(8u, frag->len);
12853         if (!vcpu->mmio_is_write)
12854                 memcpy(frag->data, run->mmio.data, len);
12855
12856         if (frag->len <= 8) {
12857                 /* Switch to the next fragment. */
12858                 frag++;
12859                 vcpu->mmio_cur_fragment++;
12860         } else {
12861                 /* Go forward to the next mmio piece. */
12862                 frag->data += len;
12863                 frag->gpa += len;
12864                 frag->len -= len;
12865         }
12866
12867         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12868                 vcpu->mmio_needed = 0;
12869
12870                 // VMG change, at this point, we're always done
12871                 // RIP has already been advanced
12872                 return 1;
12873         }
12874
12875         // More MMIO is needed
12876         run->mmio.phys_addr = frag->gpa;
12877         run->mmio.len = min(8u, frag->len);
12878         run->mmio.is_write = vcpu->mmio_is_write;
12879         if (run->mmio.is_write)
12880                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12881         run->exit_reason = KVM_EXIT_MMIO;
12882
12883         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12884
12885         return 0;
12886 }
12887
12888 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12889                           void *data)
12890 {
12891         int handled;
12892         struct kvm_mmio_fragment *frag;
12893
12894         if (!data)
12895                 return -EINVAL;
12896
12897         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12898         if (handled == bytes)
12899                 return 1;
12900
12901         bytes -= handled;
12902         gpa += handled;
12903         data += handled;
12904
12905         /*TODO: Check if need to increment number of frags */
12906         frag = vcpu->mmio_fragments;
12907         vcpu->mmio_nr_fragments = 1;
12908         frag->len = bytes;
12909         frag->gpa = gpa;
12910         frag->data = data;
12911
12912         vcpu->mmio_needed = 1;
12913         vcpu->mmio_cur_fragment = 0;
12914
12915         vcpu->run->mmio.phys_addr = gpa;
12916         vcpu->run->mmio.len = min(8u, frag->len);
12917         vcpu->run->mmio.is_write = 1;
12918         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12919         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12920
12921         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12922
12923         return 0;
12924 }
12925 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12926
12927 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12928                          void *data)
12929 {
12930         int handled;
12931         struct kvm_mmio_fragment *frag;
12932
12933         if (!data)
12934                 return -EINVAL;
12935
12936         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12937         if (handled == bytes)
12938                 return 1;
12939
12940         bytes -= handled;
12941         gpa += handled;
12942         data += handled;
12943
12944         /*TODO: Check if need to increment number of frags */
12945         frag = vcpu->mmio_fragments;
12946         vcpu->mmio_nr_fragments = 1;
12947         frag->len = bytes;
12948         frag->gpa = gpa;
12949         frag->data = data;
12950
12951         vcpu->mmio_needed = 1;
12952         vcpu->mmio_cur_fragment = 0;
12953
12954         vcpu->run->mmio.phys_addr = gpa;
12955         vcpu->run->mmio.len = min(8u, frag->len);
12956         vcpu->run->mmio.is_write = 0;
12957         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12958
12959         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12960
12961         return 0;
12962 }
12963 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12964
12965 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12966                            unsigned int port);
12967
12968 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12969 {
12970         int size = vcpu->arch.pio.size;
12971         int port = vcpu->arch.pio.port;
12972
12973         vcpu->arch.pio.count = 0;
12974         if (vcpu->arch.sev_pio_count)
12975                 return kvm_sev_es_outs(vcpu, size, port);
12976         return 1;
12977 }
12978
12979 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12980                            unsigned int port)
12981 {
12982         for (;;) {
12983                 unsigned int count =
12984                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12985                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12986
12987                 /* memcpy done already by emulator_pio_out.  */
12988                 vcpu->arch.sev_pio_count -= count;
12989                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12990                 if (!ret)
12991                         break;
12992
12993                 /* Emulation done by the kernel.  */
12994                 if (!vcpu->arch.sev_pio_count)
12995                         return 1;
12996         }
12997
12998         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12999         return 0;
13000 }
13001
13002 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13003                           unsigned int port);
13004
13005 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
13006 {
13007         unsigned count = vcpu->arch.pio.count;
13008         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
13009         vcpu->arch.sev_pio_count -= count;
13010         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
13011 }
13012
13013 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
13014 {
13015         int size = vcpu->arch.pio.size;
13016         int port = vcpu->arch.pio.port;
13017
13018         advance_sev_es_emulated_ins(vcpu);
13019         if (vcpu->arch.sev_pio_count)
13020                 return kvm_sev_es_ins(vcpu, size, port);
13021         return 1;
13022 }
13023
13024 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13025                           unsigned int port)
13026 {
13027         for (;;) {
13028                 unsigned int count =
13029                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13030                 if (!__emulator_pio_in(vcpu, size, port, count))
13031                         break;
13032
13033                 /* Emulation done by the kernel.  */
13034                 advance_sev_es_emulated_ins(vcpu);
13035                 if (!vcpu->arch.sev_pio_count)
13036                         return 1;
13037         }
13038
13039         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
13040         return 0;
13041 }
13042
13043 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
13044                          unsigned int port, void *data,  unsigned int count,
13045                          int in)
13046 {
13047         vcpu->arch.sev_pio_data = data;
13048         vcpu->arch.sev_pio_count = count;
13049         return in ? kvm_sev_es_ins(vcpu, size, port)
13050                   : kvm_sev_es_outs(vcpu, size, port);
13051 }
13052 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
13053
13054 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
13055 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
13056 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
13057 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
13058 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
13059 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
13060 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
13061 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
13062 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
13063 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
13064 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
13065 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
13066 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
13067 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
13068 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
13069 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
13070 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
13071 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
13072 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
13073 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
13074 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
13075 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
13076 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_kick_vcpu_slowpath);
13077 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
13078 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
13079 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
13080 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
13081 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
13082
13083 static int __init kvm_x86_init(void)
13084 {
13085         kvm_mmu_x86_module_init();
13086         return 0;
13087 }
13088 module_init(kvm_x86_init);
13089
13090 static void __exit kvm_x86_exit(void)
13091 {
13092         /*
13093          * If module_init() is implemented, module_exit() must also be
13094          * implemented to allow module unload.
13095          */
13096 }
13097 module_exit(kvm_x86_exit);