arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <trace/events/kvm.h>
  55
  56 #define CREATE_TRACE_POINTS
  57 #include "trace.h"
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67
  68 #define MAX_IO_MSRS 256
  69 #define KVM_MAX_MCE_BANKS 32
  70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  71
  72 #define emul_to_vcpu(ctxt) \
  73         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  74
  75 /* EFER defaults:
  76  * - enable syscall per default because its emulated by KVM
  77  * - enable LME and LMA per default on 64 bit KVM
  78  */
  79 #ifdef CONFIG_X86_64
  80 static
  81 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  82 #else
  83 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  84 #endif
  85
  86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  88
  89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  90 static void process_nmi(struct kvm_vcpu *vcpu);
  91 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  92
  93 struct kvm_x86_ops *kvm_x86_ops;
  94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  95
  96 static bool ignore_msrs = 0;
  97 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  98
  99 unsigned int min_timer_period_us = 500;
 100 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 101
 102 static bool __read_mostly kvmclock_periodic_sync = true;
 103 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 104
 105 bool kvm_has_tsc_control;
 106 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 107 u32  kvm_max_guest_tsc_khz;
 108 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 109
 110 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 111 static u32 tsc_tolerance_ppm = 250;
 112 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 113
 114 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 115 unsigned int lapic_timer_advance_ns = 0;
 116 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 117
 118 static bool backwards_tsc_observed = false;
 119
 120 #define KVM_NR_SHARED_MSRS 16
 121
 122 struct kvm_shared_msrs_global {
 123         int nr;
 124         u32 msrs[KVM_NR_SHARED_MSRS];
 125 };
 126
 127 struct kvm_shared_msrs {
 128         struct user_return_notifier urn;
 129         bool registered;
 130         struct kvm_shared_msr_values {
 131                 u64 host;
 132                 u64 curr;
 133         } values[KVM_NR_SHARED_MSRS];
 134 };
 135
 136 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 137 static struct kvm_shared_msrs __percpu *shared_msrs;
 138
 139 struct kvm_stats_debugfs_item debugfs_entries[] = {
 140         { "pf_fixed", VCPU_STAT(pf_fixed) },
 141         { "pf_guest", VCPU_STAT(pf_guest) },
 142         { "tlb_flush", VCPU_STAT(tlb_flush) },
 143         { "invlpg", VCPU_STAT(invlpg) },
 144         { "exits", VCPU_STAT(exits) },
 145         { "io_exits", VCPU_STAT(io_exits) },
 146         { "mmio_exits", VCPU_STAT(mmio_exits) },
 147         { "signal_exits", VCPU_STAT(signal_exits) },
 148         { "irq_window", VCPU_STAT(irq_window_exits) },
 149         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 150         { "halt_exits", VCPU_STAT(halt_exits) },
 151         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 152         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 153         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 154         { "hypercalls", VCPU_STAT(hypercalls) },
 155         { "request_irq", VCPU_STAT(request_irq_exits) },
 156         { "irq_exits", VCPU_STAT(irq_exits) },
 157         { "host_state_reload", VCPU_STAT(host_state_reload) },
 158         { "efer_reload", VCPU_STAT(efer_reload) },
 159         { "fpu_reload", VCPU_STAT(fpu_reload) },
 160         { "insn_emulation", VCPU_STAT(insn_emulation) },
 161         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 162         { "irq_injections", VCPU_STAT(irq_injections) },
 163         { "nmi_injections", VCPU_STAT(nmi_injections) },
 164         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 165         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 166         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 167         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 168         { "mmu_flooded", VM_STAT(mmu_flooded) },
 169         { "mmu_recycled", VM_STAT(mmu_recycled) },
 170         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 171         { "mmu_unsync", VM_STAT(mmu_unsync) },
 172         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 173         { "largepages", VM_STAT(lpages) },
 174         { NULL }
 175 };
 176
 177 u64 __read_mostly host_xcr0;
 178
 179 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 180
 181 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 182 {
 183         int i;
 184         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 185                 vcpu->arch.apf.gfns[i] = ~0;
 186 }
 187
 188 static void kvm_on_user_return(struct user_return_notifier *urn)
 189 {
 190         unsigned slot;
 191         struct kvm_shared_msrs *locals
 192                 = container_of(urn, struct kvm_shared_msrs, urn);
 193         struct kvm_shared_msr_values *values;
 194
 195         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 196                 values = &locals->values[slot];
 197                 if (values->host != values->curr) {
 198                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 199                         values->curr = values->host;
 200                 }
 201         }
 202         locals->registered = false;
 203         user_return_notifier_unregister(urn);
 204 }
 205
 206 static void shared_msr_update(unsigned slot, u32 msr)
 207 {
 208         u64 value;
 209         unsigned int cpu = smp_processor_id();
 210         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 211
 212         /* only read, and nobody should modify it at this time,
 213          * so don't need lock */
 214         if (slot >= shared_msrs_global.nr) {
 215                 printk(KERN_ERR "kvm: invalid MSR slot!");
 216                 return;
 217         }
 218         rdmsrl_safe(msr, &value);
 219         smsr->values[slot].host = value;
 220         smsr->values[slot].curr = value;
 221 }
 222
 223 void kvm_define_shared_msr(unsigned slot, u32 msr)
 224 {
 225         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 226         shared_msrs_global.msrs[slot] = msr;
 227         if (slot >= shared_msrs_global.nr)
 228                 shared_msrs_global.nr = slot + 1;
 229 }
 230 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 231
 232 static void kvm_shared_msr_cpu_online(void)
 233 {
 234         unsigned i;
 235
 236         for (i = 0; i < shared_msrs_global.nr; ++i)
 237                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 238 }
 239
 240 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 241 {
 242         unsigned int cpu = smp_processor_id();
 243         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 244         int err;
 245
 246         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 247                 return 0;
 248         smsr->values[slot].curr = value;
 249         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 250         if (err)
 251                 return 1;
 252
 253         if (!smsr->registered) {
 254                 smsr->urn.on_user_return = kvm_on_user_return;
 255                 user_return_notifier_register(&smsr->urn);
 256                 smsr->registered = true;
 257         }
 258         return 0;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 261
 262 static void drop_user_return_notifiers(void)
 263 {
 264         unsigned int cpu = smp_processor_id();
 265         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 266
 267         if (smsr->registered)
 268                 kvm_on_user_return(&smsr->urn);
 269 }
 270
 271 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 272 {
 273         return vcpu->arch.apic_base;
 274 }
 275 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 276
 277 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 278 {
 279         u64 old_state = vcpu->arch.apic_base &
 280                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 281         u64 new_state = msr_info->data &
 282                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 283         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 284                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 285
 286         if (!msr_info->host_initiated &&
 287             ((msr_info->data & reserved_bits) != 0 ||
 288              new_state == X2APIC_ENABLE ||
 289              (new_state == MSR_IA32_APICBASE_ENABLE &&
 290               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 291              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 292               old_state == 0)))
 293                 return 1;
 294
 295         kvm_lapic_set_base(vcpu, msr_info->data);
 296         return 0;
 297 }
 298 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 299
 300 asmlinkage __visible void kvm_spurious_fault(void)
 301 {
 302         /* Fault while not rebooting.  We want the trace. */
 303         BUG();
 304 }
 305 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 306
 307 #define EXCPT_BENIGN            0
 308 #define EXCPT_CONTRIBUTORY      1
 309 #define EXCPT_PF                2
 310
 311 static int exception_class(int vector)
 312 {
 313         switch (vector) {
 314         case PF_VECTOR:
 315                 return EXCPT_PF;
 316         case DE_VECTOR:
 317         case TS_VECTOR:
 318         case NP_VECTOR:
 319         case SS_VECTOR:
 320         case GP_VECTOR:
 321                 return EXCPT_CONTRIBUTORY;
 322         default:
 323                 break;
 324         }
 325         return EXCPT_BENIGN;
 326 }
 327
 328 #define EXCPT_FAULT             0
 329 #define EXCPT_TRAP              1
 330 #define EXCPT_ABORT             2
 331 #define EXCPT_INTERRUPT         3
 332
 333 static int exception_type(int vector)
 334 {
 335         unsigned int mask;
 336
 337         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 338                 return EXCPT_INTERRUPT;
 339
 340         mask = 1 << vector;
 341
 342         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 343         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 344                 return EXCPT_TRAP;
 345
 346         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 347                 return EXCPT_ABORT;
 348
 349         /* Reserved exceptions will result in fault */
 350         return EXCPT_FAULT;
 351 }
 352
 353 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 354                 unsigned nr, bool has_error, u32 error_code,
 355                 bool reinject)
 356 {
 357         u32 prev_nr;
 358         int class1, class2;
 359
 360         kvm_make_request(KVM_REQ_EVENT, vcpu);
 361
 362         if (!vcpu->arch.exception.pending) {
 363         queue:
 364                 if (has_error && !is_protmode(vcpu))
 365                         has_error = false;
 366                 vcpu->arch.exception.pending = true;
 367                 vcpu->arch.exception.has_error_code = has_error;
 368                 vcpu->arch.exception.nr = nr;
 369                 vcpu->arch.exception.error_code = error_code;
 370                 vcpu->arch.exception.reinject = reinject;
 371                 return;
 372         }
 373
 374         /* to check exception */
 375         prev_nr = vcpu->arch.exception.nr;
 376         if (prev_nr == DF_VECTOR) {
 377                 /* triple fault -> shutdown */
 378                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 379                 return;
 380         }
 381         class1 = exception_class(prev_nr);
 382         class2 = exception_class(nr);
 383         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 384                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 385                 /* generate double fault per SDM Table 5-5 */
 386                 vcpu->arch.exception.pending = true;
 387                 vcpu->arch.exception.has_error_code = true;
 388                 vcpu->arch.exception.nr = DF_VECTOR;
 389                 vcpu->arch.exception.error_code = 0;
 390         } else
 391                 /* replace previous exception with a new one in a hope
 392                    that instruction re-execution will regenerate lost
 393                    exception */
 394                 goto queue;
 395 }
 396
 397 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 398 {
 399         kvm_multiple_exception(vcpu, nr, false, 0, false);
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 402
 403 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 404 {
 405         kvm_multiple_exception(vcpu, nr, false, 0, true);
 406 }
 407 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 408
 409 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 410 {
 411         if (err)
 412                 kvm_inject_gp(vcpu, 0);
 413         else
 414                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 415 }
 416 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 417
 418 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 419 {
 420         ++vcpu->stat.pf_guest;
 421         vcpu->arch.cr2 = fault->address;
 422         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 425
 426 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 427 {
 428         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 429                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 430         else
 431                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 432
 433         return fault->nested_page_fault;
 434 }
 435
 436 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 437 {
 438         atomic_inc(&vcpu->arch.nmi_queued);
 439         kvm_make_request(KVM_REQ_NMI, vcpu);
 440 }
 441 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 442
 443 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 444 {
 445         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 446 }
 447 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 448
 449 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 450 {
 451         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 454
 455 /*
 456  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 457  * a #GP and return false.
 458  */
 459 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 460 {
 461         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 462                 return true;
 463         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 464         return false;
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 467
 468 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 469 {
 470         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 471                 return true;
 472
 473         kvm_queue_exception(vcpu, UD_VECTOR);
 474         return false;
 475 }
 476 EXPORT_SYMBOL_GPL(kvm_require_dr);
 477
 478 /*
 479  * This function will be used to read from the physical memory of the currently
 480  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 481  * can read from guest physical or from the guest's guest physical memory.
 482  */
 483 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 484                             gfn_t ngfn, void *data, int offset, int len,
 485                             u32 access)
 486 {
 487         struct x86_exception exception;
 488         gfn_t real_gfn;
 489         gpa_t ngpa;
 490
 491         ngpa     = gfn_to_gpa(ngfn);
 492         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 493         if (real_gfn == UNMAPPED_GVA)
 494                 return -EFAULT;
 495
 496         real_gfn = gpa_to_gfn(real_gfn);
 497
 498         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 499 }
 500 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 501
 502 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 503                                void *data, int offset, int len, u32 access)
 504 {
 505         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 506                                        data, offset, len, access);
 507 }
 508
 509 /*
 510  * Load the pae pdptrs.  Return true is they are all valid.
 511  */
 512 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 513 {
 514         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 515         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 516         int i;
 517         int ret;
 518         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 519
 520         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 521                                       offset * sizeof(u64), sizeof(pdpte),
 522                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 523         if (ret < 0) {
 524                 ret = 0;
 525                 goto out;
 526         }
 527         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 528                 if (is_present_gpte(pdpte[i]) &&
 529                     (pdpte[i] &
 530                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 531                         ret = 0;
 532                         goto out;
 533                 }
 534         }
 535         ret = 1;
 536
 537         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 538         __set_bit(VCPU_EXREG_PDPTR,
 539                   (unsigned long *)&vcpu->arch.regs_avail);
 540         __set_bit(VCPU_EXREG_PDPTR,
 541                   (unsigned long *)&vcpu->arch.regs_dirty);
 542 out:
 543
 544         return ret;
 545 }
 546 EXPORT_SYMBOL_GPL(load_pdptrs);
 547
 548 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 549 {
 550         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 551         bool changed = true;
 552         int offset;
 553         gfn_t gfn;
 554         int r;
 555
 556         if (is_long_mode(vcpu) || !is_pae(vcpu))
 557                 return false;
 558
 559         if (!test_bit(VCPU_EXREG_PDPTR,
 560                       (unsigned long *)&vcpu->arch.regs_avail))
 561                 return true;
 562
 563         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 564         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 565         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 566                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 567         if (r < 0)
 568                 goto out;
 569         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 570 out:
 571
 572         return changed;
 573 }
 574
 575 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 576 {
 577         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 578         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 579
 580         cr0 |= X86_CR0_ET;
 581
 582 #ifdef CONFIG_X86_64
 583         if (cr0 & 0xffffffff00000000UL)
 584                 return 1;
 585 #endif
 586
 587         cr0 &= ~CR0_RESERVED_BITS;
 588
 589         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 590                 return 1;
 591
 592         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 593                 return 1;
 594
 595         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 596 #ifdef CONFIG_X86_64
 597                 if ((vcpu->arch.efer & EFER_LME)) {
 598                         int cs_db, cs_l;
 599
 600                         if (!is_pae(vcpu))
 601                                 return 1;
 602                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 603                         if (cs_l)
 604                                 return 1;
 605                 } else
 606 #endif
 607                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 608                                                  kvm_read_cr3(vcpu)))
 609                         return 1;
 610         }
 611
 612         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 613                 return 1;
 614
 615         kvm_x86_ops->set_cr0(vcpu, cr0);
 616
 617         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 618                 kvm_clear_async_pf_completion_queue(vcpu);
 619                 kvm_async_pf_hash_reset(vcpu);
 620         }
 621
 622         if ((cr0 ^ old_cr0) & update_bits)
 623                 kvm_mmu_reset_context(vcpu);
 624
 625         if ((cr0 ^ old_cr0) & X86_CR0_CD)
 626                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 627
 628         return 0;
 629 }
 630 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 631
 632 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 633 {
 634         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 635 }
 636 EXPORT_SYMBOL_GPL(kvm_lmsw);
 637
 638 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 639 {
 640         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 641                         !vcpu->guest_xcr0_loaded) {
 642                 /* kvm_set_xcr() also depends on this */
 643                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 644                 vcpu->guest_xcr0_loaded = 1;
 645         }
 646 }
 647
 648 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 649 {
 650         if (vcpu->guest_xcr0_loaded) {
 651                 if (vcpu->arch.xcr0 != host_xcr0)
 652                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 653                 vcpu->guest_xcr0_loaded = 0;
 654         }
 655 }
 656
 657 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 658 {
 659         u64 xcr0 = xcr;
 660         u64 old_xcr0 = vcpu->arch.xcr0;
 661         u64 valid_bits;
 662
 663         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 664         if (index != XCR_XFEATURE_ENABLED_MASK)
 665                 return 1;
 666         if (!(xcr0 & XSTATE_FP))
 667                 return 1;
 668         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 669                 return 1;
 670
 671         /*
 672          * Do not allow the guest to set bits that we do not support
 673          * saving.  However, xcr0 bit 0 is always set, even if the
 674          * emulated CPU does not support XSAVE (see fx_init).
 675          */
 676         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 677         if (xcr0 & ~valid_bits)
 678                 return 1;
 679
 680         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 681                 return 1;
 682
 683         if (xcr0 & XSTATE_AVX512) {
 684                 if (!(xcr0 & XSTATE_YMM))
 685                         return 1;
 686                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 687                         return 1;
 688         }
 689         kvm_put_guest_xcr0(vcpu);
 690         vcpu->arch.xcr0 = xcr0;
 691
 692         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 693                 kvm_update_cpuid(vcpu);
 694         return 0;
 695 }
 696
 697 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 698 {
 699         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 700             __kvm_set_xcr(vcpu, index, xcr)) {
 701                 kvm_inject_gp(vcpu, 0);
 702                 return 1;
 703         }
 704         return 0;
 705 }
 706 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 707
 708 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 709 {
 710         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 711         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 712                                    X86_CR4_SMEP | X86_CR4_SMAP;
 713
 714         if (cr4 & CR4_RESERVED_BITS)
 715                 return 1;
 716
 717         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 718                 return 1;
 719
 720         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 721                 return 1;
 722
 723         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 724                 return 1;
 725
 726         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 727                 return 1;
 728
 729         if (is_long_mode(vcpu)) {
 730                 if (!(cr4 & X86_CR4_PAE))
 731                         return 1;
 732         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 733                    && ((cr4 ^ old_cr4) & pdptr_bits)
 734                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 735                                    kvm_read_cr3(vcpu)))
 736                 return 1;
 737
 738         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 739                 if (!guest_cpuid_has_pcid(vcpu))
 740                         return 1;
 741
 742                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 743                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 744                         return 1;
 745         }
 746
 747         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 748                 return 1;
 749
 750         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 751             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 752                 kvm_mmu_reset_context(vcpu);
 753
 754         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 755                 kvm_update_cpuid(vcpu);
 756
 757         return 0;
 758 }
 759 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 760
 761 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 762 {
 763 #ifdef CONFIG_X86_64
 764         cr3 &= ~CR3_PCID_INVD;
 765 #endif
 766
 767         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 768                 kvm_mmu_sync_roots(vcpu);
 769                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 770                 return 0;
 771         }
 772
 773         if (is_long_mode(vcpu)) {
 774                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 775                         return 1;
 776         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 777                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 778                 return 1;
 779
 780         vcpu->arch.cr3 = cr3;
 781         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 782         kvm_mmu_new_cr3(vcpu);
 783         return 0;
 784 }
 785 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 786
 787 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 788 {
 789         if (cr8 & CR8_RESERVED_BITS)
 790                 return 1;
 791         if (lapic_in_kernel(vcpu))
 792                 kvm_lapic_set_tpr(vcpu, cr8);
 793         else
 794                 vcpu->arch.cr8 = cr8;
 795         return 0;
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 798
 799 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 800 {
 801         if (lapic_in_kernel(vcpu))
 802                 return kvm_lapic_get_cr8(vcpu);
 803         else
 804                 return vcpu->arch.cr8;
 805 }
 806 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 807
 808 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 809 {
 810         int i;
 811
 812         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 813                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 814                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 815                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 816         }
 817 }
 818
 819 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 820 {
 821         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 822                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 823 }
 824
 825 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 826 {
 827         unsigned long dr7;
 828
 829         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 830                 dr7 = vcpu->arch.guest_debug_dr7;
 831         else
 832                 dr7 = vcpu->arch.dr7;
 833         kvm_x86_ops->set_dr7(vcpu, dr7);
 834         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 835         if (dr7 & DR7_BP_EN_MASK)
 836                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 837 }
 838
 839 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 840 {
 841         u64 fixed = DR6_FIXED_1;
 842
 843         if (!guest_cpuid_has_rtm(vcpu))
 844                 fixed |= DR6_RTM;
 845         return fixed;
 846 }
 847
 848 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 849 {
 850         switch (dr) {
 851         case 0 ... 3:
 852                 vcpu->arch.db[dr] = val;
 853                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 854                         vcpu->arch.eff_db[dr] = val;
 855                 break;
 856         case 4:
 857                 /* fall through */
 858         case 6:
 859                 if (val & 0xffffffff00000000ULL)
 860                         return -1; /* #GP */
 861                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 862                 kvm_update_dr6(vcpu);
 863                 break;
 864         case 5:
 865                 /* fall through */
 866         default: /* 7 */
 867                 if (val & 0xffffffff00000000ULL)
 868                         return -1; /* #GP */
 869                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 870                 kvm_update_dr7(vcpu);
 871                 break;
 872         }
 873
 874         return 0;
 875 }
 876
 877 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 878 {
 879         if (__kvm_set_dr(vcpu, dr, val)) {
 880                 kvm_inject_gp(vcpu, 0);
 881                 return 1;
 882         }
 883         return 0;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_set_dr);
 886
 887 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 888 {
 889         switch (dr) {
 890         case 0 ... 3:
 891                 *val = vcpu->arch.db[dr];
 892                 break;
 893         case 4:
 894                 /* fall through */
 895         case 6:
 896                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 897                         *val = vcpu->arch.dr6;
 898                 else
 899                         *val = kvm_x86_ops->get_dr6(vcpu);
 900                 break;
 901         case 5:
 902                 /* fall through */
 903         default: /* 7 */
 904                 *val = vcpu->arch.dr7;
 905                 break;
 906         }
 907         return 0;
 908 }
 909 EXPORT_SYMBOL_GPL(kvm_get_dr);
 910
 911 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 912 {
 913         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 914         u64 data;
 915         int err;
 916
 917         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 918         if (err)
 919                 return err;
 920         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 921         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 922         return err;
 923 }
 924 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 925
 926 /*
 927  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 928  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 929  *
 930  * This list is modified at module load time to reflect the
 931  * capabilities of the host cpu. This capabilities test skips MSRs that are
 932  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 933  * may depend on host virtualization features rather than host cpu features.
 934  */
 935
 936 static u32 msrs_to_save[] = {
 937         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 938         MSR_STAR,
 939 #ifdef CONFIG_X86_64
 940         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 941 #endif
 942         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 943         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 944 };
 945
 946 static unsigned num_msrs_to_save;
 947
 948 static u32 emulated_msrs[] = {
 949         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 950         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 951         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 952         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 953         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 954         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 955         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 956         MSR_KVM_PV_EOI_EN,
 957
 958         MSR_IA32_TSC_ADJUST,
 959         MSR_IA32_TSCDEADLINE,
 960         MSR_IA32_MISC_ENABLE,
 961         MSR_IA32_MCG_STATUS,
 962         MSR_IA32_MCG_CTL,
 963         MSR_IA32_SMBASE,
 964 };
 965
 966 static unsigned num_emulated_msrs;
 967
 968 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 969 {
 970         if (efer & efer_reserved_bits)
 971                 return false;
 972
 973         if (efer & EFER_FFXSR) {
 974                 struct kvm_cpuid_entry2 *feat;
 975
 976                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 977                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 978                         return false;
 979         }
 980
 981         if (efer & EFER_SVME) {
 982                 struct kvm_cpuid_entry2 *feat;
 983
 984                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 985                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 986                         return false;
 987         }
 988
 989         return true;
 990 }
 991 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 992
 993 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 994 {
 995         u64 old_efer = vcpu->arch.efer;
 996
 997         if (!kvm_valid_efer(vcpu, efer))
 998                 return 1;
 999
1000         if (is_paging(vcpu)
1001             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1002                 return 1;
1003
1004         efer &= ~EFER_LMA;
1005         efer |= vcpu->arch.efer & EFER_LMA;
1006
1007         kvm_x86_ops->set_efer(vcpu, efer);
1008
1009         /* Update reserved bits */
1010         if ((efer ^ old_efer) & EFER_NX)
1011                 kvm_mmu_reset_context(vcpu);
1012
1013         return 0;
1014 }
1015
1016 void kvm_enable_efer_bits(u64 mask)
1017 {
1018        efer_reserved_bits &= ~mask;
1019 }
1020 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1021
1022 /*
1023  * Writes msr value into into the appropriate "register".
1024  * Returns 0 on success, non-0 otherwise.
1025  * Assumes vcpu_load() was already called.
1026  */
1027 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1028 {
1029         switch (msr->index) {
1030         case MSR_FS_BASE:
1031         case MSR_GS_BASE:
1032         case MSR_KERNEL_GS_BASE:
1033         case MSR_CSTAR:
1034         case MSR_LSTAR:
1035                 if (is_noncanonical_address(msr->data))
1036                         return 1;
1037                 break;
1038         case MSR_IA32_SYSENTER_EIP:
1039         case MSR_IA32_SYSENTER_ESP:
1040                 /*
1041                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1042                  * non-canonical address is written on Intel but not on
1043                  * AMD (which ignores the top 32-bits, because it does
1044                  * not implement 64-bit SYSENTER).
1045                  *
1046                  * 64-bit code should hence be able to write a non-canonical
1047                  * value on AMD.  Making the address canonical ensures that
1048                  * vmentry does not fail on Intel after writing a non-canonical
1049                  * value, and that something deterministic happens if the guest
1050                  * invokes 64-bit SYSENTER.
1051                  */
1052                 msr->data = get_canonical(msr->data);
1053         }
1054         return kvm_x86_ops->set_msr(vcpu, msr);
1055 }
1056 EXPORT_SYMBOL_GPL(kvm_set_msr);
1057
1058 /*
1059  * Adapt set_msr() to msr_io()'s calling convention
1060  */
1061 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1062 {
1063         struct msr_data msr;
1064         int r;
1065
1066         msr.index = index;
1067         msr.host_initiated = true;
1068         r = kvm_get_msr(vcpu, &msr);
1069         if (r)
1070                 return r;
1071
1072         *data = msr.data;
1073         return 0;
1074 }
1075
1076 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1077 {
1078         struct msr_data msr;
1079
1080         msr.data = *data;
1081         msr.index = index;
1082         msr.host_initiated = true;
1083         return kvm_set_msr(vcpu, &msr);
1084 }
1085
1086 #ifdef CONFIG_X86_64
1087 struct pvclock_gtod_data {
1088         seqcount_t      seq;
1089
1090         struct { /* extract of a clocksource struct */
1091                 int vclock_mode;
1092                 cycle_t cycle_last;
1093                 cycle_t mask;
1094                 u32     mult;
1095                 u32     shift;
1096         } clock;
1097
1098         u64             boot_ns;
1099         u64             nsec_base;
1100 };
1101
1102 static struct pvclock_gtod_data pvclock_gtod_data;
1103
1104 static void update_pvclock_gtod(struct timekeeper *tk)
1105 {
1106         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1107         u64 boot_ns;
1108
1109         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1110
1111         write_seqcount_begin(&vdata->seq);
1112
1113         /* copy pvclock gtod data */
1114         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1115         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1116         vdata->clock.mask               = tk->tkr_mono.mask;
1117         vdata->clock.mult               = tk->tkr_mono.mult;
1118         vdata->clock.shift              = tk->tkr_mono.shift;
1119
1120         vdata->boot_ns                  = boot_ns;
1121         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1122
1123         write_seqcount_end(&vdata->seq);
1124 }
1125 #endif
1126
1127 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1128 {
1129         /*
1130          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1131          * vcpu_enter_guest.  This function is only called from
1132          * the physical CPU that is running vcpu.
1133          */
1134         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1135 }
1136
1137 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1138 {
1139         int version;
1140         int r;
1141         struct pvclock_wall_clock wc;
1142         struct timespec boot;
1143
1144         if (!wall_clock)
1145                 return;
1146
1147         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1148         if (r)
1149                 return;
1150
1151         if (version & 1)
1152                 ++version;  /* first time write, random junk */
1153
1154         ++version;
1155
1156         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1157
1158         /*
1159          * The guest calculates current wall clock time by adding
1160          * system time (updated by kvm_guest_time_update below) to the
1161          * wall clock specified here.  guest system time equals host
1162          * system time for us, thus we must fill in host boot time here.
1163          */
1164         getboottime(&boot);
1165
1166         if (kvm->arch.kvmclock_offset) {
1167                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1168                 boot = timespec_sub(boot, ts);
1169         }
1170         wc.sec = boot.tv_sec;
1171         wc.nsec = boot.tv_nsec;
1172         wc.version = version;
1173
1174         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1175
1176         version++;
1177         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1178 }
1179
1180 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1181 {
1182         uint32_t quotient, remainder;
1183
1184         /* Don't try to replace with do_div(), this one calculates
1185          * "(dividend << 32) / divisor" */
1186         __asm__ ( "divl %4"
1187                   : "=a" (quotient), "=d" (remainder)
1188                   : "0" (0), "1" (dividend), "r" (divisor) );
1189         return quotient;
1190 }
1191
1192 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1193                                s8 *pshift, u32 *pmultiplier)
1194 {
1195         uint64_t scaled64;
1196         int32_t  shift = 0;
1197         uint64_t tps64;
1198         uint32_t tps32;
1199
1200         tps64 = base_khz * 1000LL;
1201         scaled64 = scaled_khz * 1000LL;
1202         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1203                 tps64 >>= 1;
1204                 shift--;
1205         }
1206
1207         tps32 = (uint32_t)tps64;
1208         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1209                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1210                         scaled64 >>= 1;
1211                 else
1212                         tps32 <<= 1;
1213                 shift++;
1214         }
1215
1216         *pshift = shift;
1217         *pmultiplier = div_frac(scaled64, tps32);
1218
1219         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1220                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1221 }
1222
1223 #ifdef CONFIG_X86_64
1224 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1225 #endif
1226
1227 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1228 static unsigned long max_tsc_khz;
1229
1230 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1231 {
1232         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1233                                    vcpu->arch.virtual_tsc_shift);
1234 }
1235
1236 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1237 {
1238         u64 v = (u64)khz * (1000000 + ppm);
1239         do_div(v, 1000000);
1240         return v;
1241 }
1242
1243 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1244 {
1245         u32 thresh_lo, thresh_hi;
1246         int use_scaling = 0;
1247
1248         /* tsc_khz can be zero if TSC calibration fails */
1249         if (this_tsc_khz == 0)
1250                 return;
1251
1252         /* Compute a scale to convert nanoseconds in TSC cycles */
1253         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1254                            &vcpu->arch.virtual_tsc_shift,
1255                            &vcpu->arch.virtual_tsc_mult);
1256         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1257
1258         /*
1259          * Compute the variation in TSC rate which is acceptable
1260          * within the range of tolerance and decide if the
1261          * rate being applied is within that bounds of the hardware
1262          * rate.  If so, no scaling or compensation need be done.
1263          */
1264         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1265         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1266         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1267                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1268                 use_scaling = 1;
1269         }
1270         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1271 }
1272
1273 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1274 {
1275         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1276                                       vcpu->arch.virtual_tsc_mult,
1277                                       vcpu->arch.virtual_tsc_shift);
1278         tsc += vcpu->arch.this_tsc_write;
1279         return tsc;
1280 }
1281
1282 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1283 {
1284 #ifdef CONFIG_X86_64
1285         bool vcpus_matched;
1286         struct kvm_arch *ka = &vcpu->kvm->arch;
1287         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1288
1289         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1290                          atomic_read(&vcpu->kvm->online_vcpus));
1291
1292         /*
1293          * Once the masterclock is enabled, always perform request in
1294          * order to update it.
1295          *
1296          * In order to enable masterclock, the host clocksource must be TSC
1297          * and the vcpus need to have matched TSCs.  When that happens,
1298          * perform request to enable masterclock.
1299          */
1300         if (ka->use_master_clock ||
1301             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1302                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1303
1304         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1305                             atomic_read(&vcpu->kvm->online_vcpus),
1306                             ka->use_master_clock, gtod->clock.vclock_mode);
1307 #endif
1308 }
1309
1310 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1311 {
1312         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1313         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1314 }
1315
1316 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1317 {
1318         struct kvm *kvm = vcpu->kvm;
1319         u64 offset, ns, elapsed;
1320         unsigned long flags;
1321         s64 usdiff;
1322         bool matched;
1323         bool already_matched;
1324         u64 data = msr->data;
1325
1326         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1327         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1328         ns = get_kernel_ns();
1329         elapsed = ns - kvm->arch.last_tsc_nsec;
1330
1331         if (vcpu->arch.virtual_tsc_khz) {
1332                 int faulted = 0;
1333
1334                 /* n.b - signed multiplication and division required */
1335                 usdiff = data - kvm->arch.last_tsc_write;
1336 #ifdef CONFIG_X86_64
1337                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1338 #else
1339                 /* do_div() only does unsigned */
1340                 asm("1: idivl %[divisor]\n"
1341                     "2: xor %%edx, %%edx\n"
1342                     "   movl $0, %[faulted]\n"
1343                     "3:\n"
1344                     ".section .fixup,\"ax\"\n"
1345                     "4: movl $1, %[faulted]\n"
1346                     "   jmp  3b\n"
1347                     ".previous\n"
1348
1349                 _ASM_EXTABLE(1b, 4b)
1350
1351                 : "=A"(usdiff), [faulted] "=r" (faulted)
1352                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1353
1354 #endif
1355                 do_div(elapsed, 1000);
1356                 usdiff -= elapsed;
1357                 if (usdiff < 0)
1358                         usdiff = -usdiff;
1359
1360                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1361                 if (faulted)
1362                         usdiff = USEC_PER_SEC;
1363         } else
1364                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1365
1366         /*
1367          * Special case: TSC write with a small delta (1 second) of virtual
1368          * cycle time against real time is interpreted as an attempt to
1369          * synchronize the CPU.
1370          *
1371          * For a reliable TSC, we can match TSC offsets, and for an unstable
1372          * TSC, we add elapsed time in this computation.  We could let the
1373          * compensation code attempt to catch up if we fall behind, but
1374          * it's better to try to match offsets from the beginning.
1375          */
1376         if (usdiff < USEC_PER_SEC &&
1377             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1378                 if (!check_tsc_unstable()) {
1379                         offset = kvm->arch.cur_tsc_offset;
1380                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1381                 } else {
1382                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1383                         data += delta;
1384                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1385                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1386                 }
1387                 matched = true;
1388                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1389         } else {
1390                 /*
1391                  * We split periods of matched TSC writes into generations.
1392                  * For each generation, we track the original measured
1393                  * nanosecond time, offset, and write, so if TSCs are in
1394                  * sync, we can match exact offset, and if not, we can match
1395                  * exact software computation in compute_guest_tsc()
1396                  *
1397                  * These values are tracked in kvm->arch.cur_xxx variables.
1398                  */
1399                 kvm->arch.cur_tsc_generation++;
1400                 kvm->arch.cur_tsc_nsec = ns;
1401                 kvm->arch.cur_tsc_write = data;
1402                 kvm->arch.cur_tsc_offset = offset;
1403                 matched = false;
1404                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1405                          kvm->arch.cur_tsc_generation, data);
1406         }
1407
1408         /*
1409          * We also track th most recent recorded KHZ, write and time to
1410          * allow the matching interval to be extended at each write.
1411          */
1412         kvm->arch.last_tsc_nsec = ns;
1413         kvm->arch.last_tsc_write = data;
1414         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1415
1416         vcpu->arch.last_guest_tsc = data;
1417
1418         /* Keep track of which generation this VCPU has synchronized to */
1419         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1420         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1421         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1422
1423         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1424                 update_ia32_tsc_adjust_msr(vcpu, offset);
1425         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1426         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1427
1428         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1429         if (!matched) {
1430                 kvm->arch.nr_vcpus_matched_tsc = 0;
1431         } else if (!already_matched) {
1432                 kvm->arch.nr_vcpus_matched_tsc++;
1433         }
1434
1435         kvm_track_tsc_matching(vcpu);
1436         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1437 }
1438
1439 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1440
1441 #ifdef CONFIG_X86_64
1442
1443 static cycle_t read_tsc(void)
1444 {
1445         cycle_t ret = (cycle_t)rdtsc_ordered();
1446         u64 last = pvclock_gtod_data.clock.cycle_last;
1447
1448         if (likely(ret >= last))
1449                 return ret;
1450
1451         /*
1452          * GCC likes to generate cmov here, but this branch is extremely
1453          * predictable (it's just a funciton of time and the likely is
1454          * very likely) and there's a data dependence, so force GCC
1455          * to generate a branch instead.  I don't barrier() because
1456          * we don't actually need a barrier, and if this function
1457          * ever gets inlined it will generate worse code.
1458          */
1459         asm volatile ("");
1460         return last;
1461 }
1462
1463 static inline u64 vgettsc(cycle_t *cycle_now)
1464 {
1465         long v;
1466         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1467
1468         *cycle_now = read_tsc();
1469
1470         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1471         return v * gtod->clock.mult;
1472 }
1473
1474 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1475 {
1476         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1477         unsigned long seq;
1478         int mode;
1479         u64 ns;
1480
1481         do {
1482                 seq = read_seqcount_begin(&gtod->seq);
1483                 mode = gtod->clock.vclock_mode;
1484                 ns = gtod->nsec_base;
1485                 ns += vgettsc(cycle_now);
1486                 ns >>= gtod->clock.shift;
1487                 ns += gtod->boot_ns;
1488         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1489         *t = ns;
1490
1491         return mode;
1492 }
1493
1494 /* returns true if host is using tsc clocksource */
1495 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1496 {
1497         /* checked again under seqlock below */
1498         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1499                 return false;
1500
1501         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1502 }
1503 #endif
1504
1505 /*
1506  *
1507  * Assuming a stable TSC across physical CPUS, and a stable TSC
1508  * across virtual CPUs, the following condition is possible.
1509  * Each numbered line represents an event visible to both
1510  * CPUs at the next numbered event.
1511  *
1512  * "timespecX" represents host monotonic time. "tscX" represents
1513  * RDTSC value.
1514  *
1515  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1516  *
1517  * 1.  read timespec0,tsc0
1518  * 2.                                   | timespec1 = timespec0 + N
1519  *                                      | tsc1 = tsc0 + M
1520  * 3. transition to guest               | transition to guest
1521  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1522  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1523  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1524  *
1525  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1526  *
1527  *      - ret0 < ret1
1528  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1529  *              ...
1530  *      - 0 < N - M => M < N
1531  *
1532  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1533  * always the case (the difference between two distinct xtime instances
1534  * might be smaller then the difference between corresponding TSC reads,
1535  * when updating guest vcpus pvclock areas).
1536  *
1537  * To avoid that problem, do not allow visibility of distinct
1538  * system_timestamp/tsc_timestamp values simultaneously: use a master
1539  * copy of host monotonic time values. Update that master copy
1540  * in lockstep.
1541  *
1542  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1543  *
1544  */
1545
1546 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1547 {
1548 #ifdef CONFIG_X86_64
1549         struct kvm_arch *ka = &kvm->arch;
1550         int vclock_mode;
1551         bool host_tsc_clocksource, vcpus_matched;
1552
1553         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1554                         atomic_read(&kvm->online_vcpus));
1555
1556         /*
1557          * If the host uses TSC clock, then passthrough TSC as stable
1558          * to the guest.
1559          */
1560         host_tsc_clocksource = kvm_get_time_and_clockread(
1561                                         &ka->master_kernel_ns,
1562                                         &ka->master_cycle_now);
1563
1564         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1565                                 && !backwards_tsc_observed
1566                                 && !ka->boot_vcpu_runs_old_kvmclock;
1567
1568         if (ka->use_master_clock)
1569                 atomic_set(&kvm_guest_has_master_clock, 1);
1570
1571         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1572         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1573                                         vcpus_matched);
1574 #endif
1575 }
1576
1577 static void kvm_gen_update_masterclock(struct kvm *kvm)
1578 {
1579 #ifdef CONFIG_X86_64
1580         int i;
1581         struct kvm_vcpu *vcpu;
1582         struct kvm_arch *ka = &kvm->arch;
1583
1584         spin_lock(&ka->pvclock_gtod_sync_lock);
1585         kvm_make_mclock_inprogress_request(kvm);
1586         /* no guest entries from this point */
1587         pvclock_update_vm_gtod_copy(kvm);
1588
1589         kvm_for_each_vcpu(i, vcpu, kvm)
1590                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1591
1592         /* guest entries allowed */
1593         kvm_for_each_vcpu(i, vcpu, kvm)
1594                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1595
1596         spin_unlock(&ka->pvclock_gtod_sync_lock);
1597 #endif
1598 }
1599
1600 static int kvm_guest_time_update(struct kvm_vcpu *v)
1601 {
1602         unsigned long flags, this_tsc_khz;
1603         struct kvm_vcpu_arch *vcpu = &v->arch;
1604         struct kvm_arch *ka = &v->kvm->arch;
1605         s64 kernel_ns;
1606         u64 tsc_timestamp, host_tsc;
1607         struct pvclock_vcpu_time_info guest_hv_clock;
1608         u8 pvclock_flags;
1609         bool use_master_clock;
1610
1611         kernel_ns = 0;
1612         host_tsc = 0;
1613
1614         /*
1615          * If the host uses TSC clock, then passthrough TSC as stable
1616          * to the guest.
1617          */
1618         spin_lock(&ka->pvclock_gtod_sync_lock);
1619         use_master_clock = ka->use_master_clock;
1620         if (use_master_clock) {
1621                 host_tsc = ka->master_cycle_now;
1622                 kernel_ns = ka->master_kernel_ns;
1623         }
1624         spin_unlock(&ka->pvclock_gtod_sync_lock);
1625
1626         /* Keep irq disabled to prevent changes to the clock */
1627         local_irq_save(flags);
1628         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1629         if (unlikely(this_tsc_khz == 0)) {
1630                 local_irq_restore(flags);
1631                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1632                 return 1;
1633         }
1634         if (!use_master_clock) {
1635                 host_tsc = rdtsc();
1636                 kernel_ns = get_kernel_ns();
1637         }
1638
1639         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1640
1641         /*
1642          * We may have to catch up the TSC to match elapsed wall clock
1643          * time for two reasons, even if kvmclock is used.
1644          *   1) CPU could have been running below the maximum TSC rate
1645          *   2) Broken TSC compensation resets the base at each VCPU
1646          *      entry to avoid unknown leaps of TSC even when running
1647          *      again on the same CPU.  This may cause apparent elapsed
1648          *      time to disappear, and the guest to stand still or run
1649          *      very slowly.
1650          */
1651         if (vcpu->tsc_catchup) {
1652                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1653                 if (tsc > tsc_timestamp) {
1654                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1655                         tsc_timestamp = tsc;
1656                 }
1657         }
1658
1659         local_irq_restore(flags);
1660
1661         if (!vcpu->pv_time_enabled)
1662                 return 0;
1663
1664         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1665                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1666                                    &vcpu->hv_clock.tsc_shift,
1667                                    &vcpu->hv_clock.tsc_to_system_mul);
1668                 vcpu->hw_tsc_khz = this_tsc_khz;
1669         }
1670
1671         /* With all the info we got, fill in the values */
1672         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1673         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1674         vcpu->last_guest_tsc = tsc_timestamp;
1675
1676         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1677                 &guest_hv_clock, sizeof(guest_hv_clock))))
1678                 return 0;
1679
1680         /* This VCPU is paused, but it's legal for a guest to read another
1681          * VCPU's kvmclock, so we really have to follow the specification where
1682          * it says that version is odd if data is being modified, and even after
1683          * it is consistent.
1684          *
1685          * Version field updates must be kept separate.  This is because
1686          * kvm_write_guest_cached might use a "rep movs" instruction, and
1687          * writes within a string instruction are weakly ordered.  So there
1688          * are three writes overall.
1689          *
1690          * As a small optimization, only write the version field in the first
1691          * and third write.  The vcpu->pv_time cache is still valid, because the
1692          * version field is the first in the struct.
1693          */
1694         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1695
1696         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1697         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1698                                 &vcpu->hv_clock,
1699                                 sizeof(vcpu->hv_clock.version));
1700
1701         smp_wmb();
1702
1703         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1704         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1705
1706         if (vcpu->pvclock_set_guest_stopped_request) {
1707                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1708                 vcpu->pvclock_set_guest_stopped_request = false;
1709         }
1710
1711         /* If the host uses TSC clocksource, then it is stable */
1712         if (use_master_clock)
1713                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1714
1715         vcpu->hv_clock.flags = pvclock_flags;
1716
1717         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1718
1719         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1720                                 &vcpu->hv_clock,
1721                                 sizeof(vcpu->hv_clock));
1722
1723         smp_wmb();
1724
1725         vcpu->hv_clock.version++;
1726         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1727                                 &vcpu->hv_clock,
1728                                 sizeof(vcpu->hv_clock.version));
1729         return 0;
1730 }
1731
1732 /*
1733  * kvmclock updates which are isolated to a given vcpu, such as
1734  * vcpu->cpu migration, should not allow system_timestamp from
1735  * the rest of the vcpus to remain static. Otherwise ntp frequency
1736  * correction applies to one vcpu's system_timestamp but not
1737  * the others.
1738  *
1739  * So in those cases, request a kvmclock update for all vcpus.
1740  * We need to rate-limit these requests though, as they can
1741  * considerably slow guests that have a large number of vcpus.
1742  * The time for a remote vcpu to update its kvmclock is bound
1743  * by the delay we use to rate-limit the updates.
1744  */
1745
1746 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1747
1748 static void kvmclock_update_fn(struct work_struct *work)
1749 {
1750         int i;
1751         struct delayed_work *dwork = to_delayed_work(work);
1752         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1753                                            kvmclock_update_work);
1754         struct kvm *kvm = container_of(ka, struct kvm, arch);
1755         struct kvm_vcpu *vcpu;
1756
1757         kvm_for_each_vcpu(i, vcpu, kvm) {
1758                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1759                 kvm_vcpu_kick(vcpu);
1760         }
1761 }
1762
1763 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1764 {
1765         struct kvm *kvm = v->kvm;
1766
1767         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1768         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1769                                         KVMCLOCK_UPDATE_DELAY);
1770 }
1771
1772 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1773
1774 static void kvmclock_sync_fn(struct work_struct *work)
1775 {
1776         struct delayed_work *dwork = to_delayed_work(work);
1777         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1778                                            kvmclock_sync_work);
1779         struct kvm *kvm = container_of(ka, struct kvm, arch);
1780
1781         if (!kvmclock_periodic_sync)
1782                 return;
1783
1784         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1785         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1786                                         KVMCLOCK_SYNC_PERIOD);
1787 }
1788
1789 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1790 {
1791         u64 mcg_cap = vcpu->arch.mcg_cap;
1792         unsigned bank_num = mcg_cap & 0xff;
1793
1794         switch (msr) {
1795         case MSR_IA32_MCG_STATUS:
1796                 vcpu->arch.mcg_status = data;
1797                 break;
1798         case MSR_IA32_MCG_CTL:
1799                 if (!(mcg_cap & MCG_CTL_P))
1800                         return 1;
1801                 if (data != 0 && data != ~(u64)0)
1802                         return -1;
1803                 vcpu->arch.mcg_ctl = data;
1804                 break;
1805         default:
1806                 if (msr >= MSR_IA32_MC0_CTL &&
1807                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1808                         u32 offset = msr - MSR_IA32_MC0_CTL;
1809                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1810                          * some Linux kernels though clear bit 10 in bank 4 to
1811                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1812                          * this to avoid an uncatched #GP in the guest
1813                          */
1814                         if ((offset & 0x3) == 0 &&
1815                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1816                                 return -1;
1817                         vcpu->arch.mce_banks[offset] = data;
1818                         break;
1819                 }
1820                 return 1;
1821         }
1822         return 0;
1823 }
1824
1825 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1826 {
1827         struct kvm *kvm = vcpu->kvm;
1828         int lm = is_long_mode(vcpu);
1829         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1830                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1831         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1832                 : kvm->arch.xen_hvm_config.blob_size_32;
1833         u32 page_num = data & ~PAGE_MASK;
1834         u64 page_addr = data & PAGE_MASK;
1835         u8 *page;
1836         int r;
1837
1838         r = -E2BIG;
1839         if (page_num >= blob_size)
1840                 goto out;
1841         r = -ENOMEM;
1842         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1843         if (IS_ERR(page)) {
1844                 r = PTR_ERR(page);
1845                 goto out;
1846         }
1847         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1848                 goto out_free;
1849         r = 0;
1850 out_free:
1851         kfree(page);
1852 out:
1853         return r;
1854 }
1855
1856 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1857 {
1858         gpa_t gpa = data & ~0x3f;
1859
1860         /* Bits 2:5 are reserved, Should be zero */
1861         if (data & 0x3c)
1862                 return 1;
1863
1864         vcpu->arch.apf.msr_val = data;
1865
1866         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1867                 kvm_clear_async_pf_completion_queue(vcpu);
1868                 kvm_async_pf_hash_reset(vcpu);
1869                 return 0;
1870         }
1871
1872         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1873                                         sizeof(u32)))
1874                 return 1;
1875
1876         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1877         kvm_async_pf_wakeup_all(vcpu);
1878         return 0;
1879 }
1880
1881 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1882 {
1883         vcpu->arch.pv_time_enabled = false;
1884 }
1885
1886 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1887 {
1888         u64 delta;
1889
1890         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1891                 return;
1892
1893         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1894         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1895         vcpu->arch.st.accum_steal = delta;
1896 }
1897
1898 static void record_steal_time(struct kvm_vcpu *vcpu)
1899 {
1900         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1901                 return;
1902
1903         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1904                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1905                 return;
1906
1907         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1908         vcpu->arch.st.steal.version += 2;
1909         vcpu->arch.st.accum_steal = 0;
1910
1911         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1912                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1913 }
1914
1915 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1916 {
1917         bool pr = false;
1918         u32 msr = msr_info->index;
1919         u64 data = msr_info->data;
1920
1921         switch (msr) {
1922         case MSR_AMD64_NB_CFG:
1923         case MSR_IA32_UCODE_REV:
1924         case MSR_IA32_UCODE_WRITE:
1925         case MSR_VM_HSAVE_PA:
1926         case MSR_AMD64_PATCH_LOADER:
1927         case MSR_AMD64_BU_CFG2:
1928                 break;
1929
1930         case MSR_EFER:
1931                 return set_efer(vcpu, data);
1932         case MSR_K7_HWCR:
1933                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1934                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1935                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1936                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
1937                 if (data != 0) {
1938                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1939                                     data);
1940                         return 1;
1941                 }
1942                 break;
1943         case MSR_FAM10H_MMIO_CONF_BASE:
1944                 if (data != 0) {
1945                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1946                                     "0x%llx\n", data);
1947                         return 1;
1948                 }
1949                 break;
1950         case MSR_IA32_DEBUGCTLMSR:
1951                 if (!data) {
1952                         /* We support the non-activated case already */
1953                         break;
1954                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1955                         /* Values other than LBR and BTF are vendor-specific,
1956                            thus reserved and should throw a #GP */
1957                         return 1;
1958                 }
1959                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1960                             __func__, data);
1961                 break;
1962         case 0x200 ... 0x2ff:
1963                 return kvm_mtrr_set_msr(vcpu, msr, data);
1964         case MSR_IA32_APICBASE:
1965                 return kvm_set_apic_base(vcpu, msr_info);
1966         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1967                 return kvm_x2apic_msr_write(vcpu, msr, data);
1968         case MSR_IA32_TSCDEADLINE:
1969                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1970                 break;
1971         case MSR_IA32_TSC_ADJUST:
1972                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1973                         if (!msr_info->host_initiated) {
1974                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1975                                 adjust_tsc_offset_guest(vcpu, adj);
1976                         }
1977                         vcpu->arch.ia32_tsc_adjust_msr = data;
1978                 }
1979                 break;
1980         case MSR_IA32_MISC_ENABLE:
1981                 vcpu->arch.ia32_misc_enable_msr = data;
1982                 break;
1983         case MSR_IA32_SMBASE:
1984                 if (!msr_info->host_initiated)
1985                         return 1;
1986                 vcpu->arch.smbase = data;
1987                 break;
1988         case MSR_KVM_WALL_CLOCK_NEW:
1989         case MSR_KVM_WALL_CLOCK:
1990                 vcpu->kvm->arch.wall_clock = data;
1991                 kvm_write_wall_clock(vcpu->kvm, data);
1992                 break;
1993         case MSR_KVM_SYSTEM_TIME_NEW:
1994         case MSR_KVM_SYSTEM_TIME: {
1995                 u64 gpa_offset;
1996                 struct kvm_arch *ka = &vcpu->kvm->arch;
1997
1998                 kvmclock_reset(vcpu);
1999
2000                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2001                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2002
2003                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2004                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2005                                         &vcpu->requests);
2006
2007                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2008                 }
2009
2010                 vcpu->arch.time = data;
2011                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2012
2013                 /* we verify if the enable bit is set... */
2014                 if (!(data & 1))
2015                         break;
2016
2017                 gpa_offset = data & ~(PAGE_MASK | 1);
2018
2019                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2020                      &vcpu->arch.pv_time, data & ~1ULL,
2021                      sizeof(struct pvclock_vcpu_time_info)))
2022                         vcpu->arch.pv_time_enabled = false;
2023                 else
2024                         vcpu->arch.pv_time_enabled = true;
2025
2026                 break;
2027         }
2028         case MSR_KVM_ASYNC_PF_EN:
2029                 if (kvm_pv_enable_async_pf(vcpu, data))
2030                         return 1;
2031                 break;
2032         case MSR_KVM_STEAL_TIME:
2033
2034                 if (unlikely(!sched_info_on()))
2035                         return 1;
2036
2037                 if (data & KVM_STEAL_RESERVED_MASK)
2038                         return 1;
2039
2040                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2041                                                 data & KVM_STEAL_VALID_BITS,
2042                                                 sizeof(struct kvm_steal_time)))
2043                         return 1;
2044
2045                 vcpu->arch.st.msr_val = data;
2046
2047                 if (!(data & KVM_MSR_ENABLED))
2048                         break;
2049
2050                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2051
2052                 preempt_disable();
2053                 accumulate_steal_time(vcpu);
2054                 preempt_enable();
2055
2056                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2057
2058                 break;
2059         case MSR_KVM_PV_EOI_EN:
2060                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2061                         return 1;
2062                 break;
2063
2064         case MSR_IA32_MCG_CTL:
2065         case MSR_IA32_MCG_STATUS:
2066         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2067                 return set_msr_mce(vcpu, msr, data);
2068
2069         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2070         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2071                 pr = true; /* fall through */
2072         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2073         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2074                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2075                         return kvm_pmu_set_msr(vcpu, msr_info);
2076
2077                 if (pr || data != 0)
2078                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2079                                     "0x%x data 0x%llx\n", msr, data);
2080                 break;
2081         case MSR_K7_CLK_CTL:
2082                 /*
2083                  * Ignore all writes to this no longer documented MSR.
2084                  * Writes are only relevant for old K7 processors,
2085                  * all pre-dating SVM, but a recommended workaround from
2086                  * AMD for these chips. It is possible to specify the
2087                  * affected processor models on the command line, hence
2088                  * the need to ignore the workaround.
2089                  */
2090                 break;
2091         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2092         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2093         case HV_X64_MSR_CRASH_CTL:
2094                 return kvm_hv_set_msr_common(vcpu, msr, data,
2095                                              msr_info->host_initiated);
2096         case MSR_IA32_BBL_CR_CTL3:
2097                 /* Drop writes to this legacy MSR -- see rdmsr
2098                  * counterpart for further detail.
2099                  */
2100                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2101                 break;
2102         case MSR_AMD64_OSVW_ID_LENGTH:
2103                 if (!guest_cpuid_has_osvw(vcpu))
2104                         return 1;
2105                 vcpu->arch.osvw.length = data;
2106                 break;
2107         case MSR_AMD64_OSVW_STATUS:
2108                 if (!guest_cpuid_has_osvw(vcpu))
2109                         return 1;
2110                 vcpu->arch.osvw.status = data;
2111                 break;
2112         default:
2113                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2114                         return xen_hvm_config(vcpu, data);
2115                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2116                         return kvm_pmu_set_msr(vcpu, msr_info);
2117                 if (!ignore_msrs) {
2118                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2119                                     msr, data);
2120                         return 1;
2121                 } else {
2122                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2123                                     msr, data);
2124                         break;
2125                 }
2126         }
2127         return 0;
2128 }
2129 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2130
2131
2132 /*
2133  * Reads an msr value (of 'msr_index') into 'pdata'.
2134  * Returns 0 on success, non-0 otherwise.
2135  * Assumes vcpu_load() was already called.
2136  */
2137 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2138 {
2139         return kvm_x86_ops->get_msr(vcpu, msr);
2140 }
2141 EXPORT_SYMBOL_GPL(kvm_get_msr);
2142
2143 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2144 {
2145         u64 data;
2146         u64 mcg_cap = vcpu->arch.mcg_cap;
2147         unsigned bank_num = mcg_cap & 0xff;
2148
2149         switch (msr) {
2150         case MSR_IA32_P5_MC_ADDR:
2151         case MSR_IA32_P5_MC_TYPE:
2152                 data = 0;
2153                 break;
2154         case MSR_IA32_MCG_CAP:
2155                 data = vcpu->arch.mcg_cap;
2156                 break;
2157         case MSR_IA32_MCG_CTL:
2158                 if (!(mcg_cap & MCG_CTL_P))
2159                         return 1;
2160                 data = vcpu->arch.mcg_ctl;
2161                 break;
2162         case MSR_IA32_MCG_STATUS:
2163                 data = vcpu->arch.mcg_status;
2164                 break;
2165         default:
2166                 if (msr >= MSR_IA32_MC0_CTL &&
2167                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2168                         u32 offset = msr - MSR_IA32_MC0_CTL;
2169                         data = vcpu->arch.mce_banks[offset];
2170                         break;
2171                 }
2172                 return 1;
2173         }
2174         *pdata = data;
2175         return 0;
2176 }
2177
2178 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2179 {
2180         switch (msr_info->index) {
2181         case MSR_IA32_PLATFORM_ID:
2182         case MSR_IA32_EBL_CR_POWERON:
2183         case MSR_IA32_DEBUGCTLMSR:
2184         case MSR_IA32_LASTBRANCHFROMIP:
2185         case MSR_IA32_LASTBRANCHTOIP:
2186         case MSR_IA32_LASTINTFROMIP:
2187         case MSR_IA32_LASTINTTOIP:
2188         case MSR_K8_SYSCFG:
2189         case MSR_K8_TSEG_ADDR:
2190         case MSR_K8_TSEG_MASK:
2191         case MSR_K7_HWCR:
2192         case MSR_VM_HSAVE_PA:
2193         case MSR_K8_INT_PENDING_MSG:
2194         case MSR_AMD64_NB_CFG:
2195         case MSR_FAM10H_MMIO_CONF_BASE:
2196         case MSR_AMD64_BU_CFG2:
2197                 msr_info->data = 0;
2198                 break;
2199         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2200         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2201         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2202         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2203                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2204                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2205                 msr_info->data = 0;
2206                 break;
2207         case MSR_IA32_UCODE_REV:
2208                 msr_info->data = 0x100000000ULL;
2209                 break;
2210         case MSR_MTRRcap:
2211         case 0x200 ... 0x2ff:
2212                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2213         case 0xcd: /* fsb frequency */
2214                 msr_info->data = 3;
2215                 break;
2216                 /*
2217                  * MSR_EBC_FREQUENCY_ID
2218                  * Conservative value valid for even the basic CPU models.
2219                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2220                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2221                  * and 266MHz for model 3, or 4. Set Core Clock
2222                  * Frequency to System Bus Frequency Ratio to 1 (bits
2223                  * 31:24) even though these are only valid for CPU
2224                  * models > 2, however guests may end up dividing or
2225                  * multiplying by zero otherwise.
2226                  */
2227         case MSR_EBC_FREQUENCY_ID:
2228                 msr_info->data = 1 << 24;
2229                 break;
2230         case MSR_IA32_APICBASE:
2231                 msr_info->data = kvm_get_apic_base(vcpu);
2232                 break;
2233         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2234                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2235                 break;
2236         case MSR_IA32_TSCDEADLINE:
2237                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2238                 break;
2239         case MSR_IA32_TSC_ADJUST:
2240                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2241                 break;
2242         case MSR_IA32_MISC_ENABLE:
2243                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2244                 break;
2245         case MSR_IA32_SMBASE:
2246                 if (!msr_info->host_initiated)
2247                         return 1;
2248                 msr_info->data = vcpu->arch.smbase;
2249                 break;
2250         case MSR_IA32_PERF_STATUS:
2251                 /* TSC increment by tick */
2252                 msr_info->data = 1000ULL;
2253                 /* CPU multiplier */
2254                 msr_info->data |= (((uint64_t)4ULL) << 40);
2255                 break;
2256         case MSR_EFER:
2257                 msr_info->data = vcpu->arch.efer;
2258                 break;
2259         case MSR_KVM_WALL_CLOCK:
2260         case MSR_KVM_WALL_CLOCK_NEW:
2261                 msr_info->data = vcpu->kvm->arch.wall_clock;
2262                 break;
2263         case MSR_KVM_SYSTEM_TIME:
2264         case MSR_KVM_SYSTEM_TIME_NEW:
2265                 msr_info->data = vcpu->arch.time;
2266                 break;
2267         case MSR_KVM_ASYNC_PF_EN:
2268                 msr_info->data = vcpu->arch.apf.msr_val;
2269                 break;
2270         case MSR_KVM_STEAL_TIME:
2271                 msr_info->data = vcpu->arch.st.msr_val;
2272                 break;
2273         case MSR_KVM_PV_EOI_EN:
2274                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2275                 break;
2276         case MSR_IA32_P5_MC_ADDR:
2277         case MSR_IA32_P5_MC_TYPE:
2278         case MSR_IA32_MCG_CAP:
2279         case MSR_IA32_MCG_CTL:
2280         case MSR_IA32_MCG_STATUS:
2281         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2282                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2283         case MSR_K7_CLK_CTL:
2284                 /*
2285                  * Provide expected ramp-up count for K7. All other
2286                  * are set to zero, indicating minimum divisors for
2287                  * every field.
2288                  *
2289                  * This prevents guest kernels on AMD host with CPU
2290                  * type 6, model 8 and higher from exploding due to
2291                  * the rdmsr failing.
2292                  */
2293                 msr_info->data = 0x20000000;
2294                 break;
2295         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2296         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2297         case HV_X64_MSR_CRASH_CTL:
2298                 return kvm_hv_get_msr_common(vcpu,
2299                                              msr_info->index, &msr_info->data);
2300                 break;
2301         case MSR_IA32_BBL_CR_CTL3:
2302                 /* This legacy MSR exists but isn't fully documented in current
2303                  * silicon.  It is however accessed by winxp in very narrow
2304                  * scenarios where it sets bit #19, itself documented as
2305                  * a "reserved" bit.  Best effort attempt to source coherent
2306                  * read data here should the balance of the register be
2307                  * interpreted by the guest:
2308                  *
2309                  * L2 cache control register 3: 64GB range, 256KB size,
2310                  * enabled, latency 0x1, configured
2311                  */
2312                 msr_info->data = 0xbe702111;
2313                 break;
2314         case MSR_AMD64_OSVW_ID_LENGTH:
2315                 if (!guest_cpuid_has_osvw(vcpu))
2316                         return 1;
2317                 msr_info->data = vcpu->arch.osvw.length;
2318                 break;
2319         case MSR_AMD64_OSVW_STATUS:
2320                 if (!guest_cpuid_has_osvw(vcpu))
2321                         return 1;
2322                 msr_info->data = vcpu->arch.osvw.status;
2323                 break;
2324         default:
2325                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2326                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2327                 if (!ignore_msrs) {
2328                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2329                         return 1;
2330                 } else {
2331                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2332                         msr_info->data = 0;
2333                 }
2334                 break;
2335         }
2336         return 0;
2337 }
2338 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2339
2340 /*
2341  * Read or write a bunch of msrs. All parameters are kernel addresses.
2342  *
2343  * @return number of msrs set successfully.
2344  */
2345 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2346                     struct kvm_msr_entry *entries,
2347                     int (*do_msr)(struct kvm_vcpu *vcpu,
2348                                   unsigned index, u64 *data))
2349 {
2350         int i, idx;
2351
2352         idx = srcu_read_lock(&vcpu->kvm->srcu);
2353         for (i = 0; i < msrs->nmsrs; ++i)
2354                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2355                         break;
2356         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2357
2358         return i;
2359 }
2360
2361 /*
2362  * Read or write a bunch of msrs. Parameters are user addresses.
2363  *
2364  * @return number of msrs set successfully.
2365  */
2366 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2367                   int (*do_msr)(struct kvm_vcpu *vcpu,
2368                                 unsigned index, u64 *data),
2369                   int writeback)
2370 {
2371         struct kvm_msrs msrs;
2372         struct kvm_msr_entry *entries;
2373         int r, n;
2374         unsigned size;
2375
2376         r = -EFAULT;
2377         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2378                 goto out;
2379
2380         r = -E2BIG;
2381         if (msrs.nmsrs >= MAX_IO_MSRS)
2382                 goto out;
2383
2384         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2385         entries = memdup_user(user_msrs->entries, size);
2386         if (IS_ERR(entries)) {
2387                 r = PTR_ERR(entries);
2388                 goto out;
2389         }
2390
2391         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2392         if (r < 0)
2393                 goto out_free;
2394
2395         r = -EFAULT;
2396         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2397                 goto out_free;
2398
2399         r = n;
2400
2401 out_free:
2402         kfree(entries);
2403 out:
2404         return r;
2405 }
2406
2407 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2408 {
2409         int r;
2410
2411         switch (ext) {
2412         case KVM_CAP_IRQCHIP:
2413         case KVM_CAP_HLT:
2414         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2415         case KVM_CAP_SET_TSS_ADDR:
2416         case KVM_CAP_EXT_CPUID:
2417         case KVM_CAP_EXT_EMUL_CPUID:
2418         case KVM_CAP_CLOCKSOURCE:
2419         case KVM_CAP_PIT:
2420         case KVM_CAP_NOP_IO_DELAY:
2421         case KVM_CAP_MP_STATE:
2422         case KVM_CAP_SYNC_MMU:
2423         case KVM_CAP_USER_NMI:
2424         case KVM_CAP_REINJECT_CONTROL:
2425         case KVM_CAP_IRQ_INJECT_STATUS:
2426         case KVM_CAP_IOEVENTFD:
2427         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2428         case KVM_CAP_PIT2:
2429         case KVM_CAP_PIT_STATE2:
2430         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2431         case KVM_CAP_XEN_HVM:
2432         case KVM_CAP_ADJUST_CLOCK:
2433         case KVM_CAP_VCPU_EVENTS:
2434         case KVM_CAP_HYPERV:
2435         case KVM_CAP_HYPERV_VAPIC:
2436         case KVM_CAP_HYPERV_SPIN:
2437         case KVM_CAP_PCI_SEGMENT:
2438         case KVM_CAP_DEBUGREGS:
2439         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2440         case KVM_CAP_XSAVE:
2441         case KVM_CAP_ASYNC_PF:
2442         case KVM_CAP_GET_TSC_KHZ:
2443         case KVM_CAP_KVMCLOCK_CTRL:
2444         case KVM_CAP_READONLY_MEM:
2445         case KVM_CAP_HYPERV_TIME:
2446         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2447         case KVM_CAP_TSC_DEADLINE_TIMER:
2448         case KVM_CAP_ENABLE_CAP_VM:
2449         case KVM_CAP_DISABLE_QUIRKS:
2450         case KVM_CAP_SET_BOOT_CPU_ID:
2451         case KVM_CAP_SPLIT_IRQCHIP:
2452 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2453         case KVM_CAP_ASSIGN_DEV_IRQ:
2454         case KVM_CAP_PCI_2_3:
2455 #endif
2456                 r = 1;
2457                 break;
2458         case KVM_CAP_X86_SMM:
2459                 /* SMBASE is usually relocated above 1M on modern chipsets,
2460                  * and SMM handlers might indeed rely on 4G segment limits,
2461                  * so do not report SMM to be available if real mode is
2462                  * emulated via vm86 mode.  Still, do not go to great lengths
2463                  * to avoid userspace's usage of the feature, because it is a
2464                  * fringe case that is not enabled except via specific settings
2465                  * of the module parameters.
2466                  */
2467                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2468                 break;
2469         case KVM_CAP_COALESCED_MMIO:
2470                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2471                 break;
2472         case KVM_CAP_VAPIC:
2473                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2474                 break;
2475         case KVM_CAP_NR_VCPUS:
2476                 r = KVM_SOFT_MAX_VCPUS;
2477                 break;
2478         case KVM_CAP_MAX_VCPUS:
2479                 r = KVM_MAX_VCPUS;
2480                 break;
2481         case KVM_CAP_NR_MEMSLOTS:
2482                 r = KVM_USER_MEM_SLOTS;
2483                 break;
2484         case KVM_CAP_PV_MMU:    /* obsolete */
2485                 r = 0;
2486                 break;
2487 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2488         case KVM_CAP_IOMMU:
2489                 r = iommu_present(&pci_bus_type);
2490                 break;
2491 #endif
2492         case KVM_CAP_MCE:
2493                 r = KVM_MAX_MCE_BANKS;
2494                 break;
2495         case KVM_CAP_XCRS:
2496                 r = cpu_has_xsave;
2497                 break;
2498         case KVM_CAP_TSC_CONTROL:
2499                 r = kvm_has_tsc_control;
2500                 break;
2501         default:
2502                 r = 0;
2503                 break;
2504         }
2505         return r;
2506
2507 }
2508
2509 long kvm_arch_dev_ioctl(struct file *filp,
2510                         unsigned int ioctl, unsigned long arg)
2511 {
2512         void __user *argp = (void __user *)arg;
2513         long r;
2514
2515         switch (ioctl) {
2516         case KVM_GET_MSR_INDEX_LIST: {
2517                 struct kvm_msr_list __user *user_msr_list = argp;
2518                 struct kvm_msr_list msr_list;
2519                 unsigned n;
2520
2521                 r = -EFAULT;
2522                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2523                         goto out;
2524                 n = msr_list.nmsrs;
2525                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2526                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2527                         goto out;
2528                 r = -E2BIG;
2529                 if (n < msr_list.nmsrs)
2530                         goto out;
2531                 r = -EFAULT;
2532                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2533                                  num_msrs_to_save * sizeof(u32)))
2534                         goto out;
2535                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2536                                  &emulated_msrs,
2537                                  num_emulated_msrs * sizeof(u32)))
2538                         goto out;
2539                 r = 0;
2540                 break;
2541         }
2542         case KVM_GET_SUPPORTED_CPUID:
2543         case KVM_GET_EMULATED_CPUID: {
2544                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2545                 struct kvm_cpuid2 cpuid;
2546
2547                 r = -EFAULT;
2548                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2549                         goto out;
2550
2551                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2552                                             ioctl);
2553                 if (r)
2554                         goto out;
2555
2556                 r = -EFAULT;
2557                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2558                         goto out;
2559                 r = 0;
2560                 break;
2561         }
2562         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2563                 u64 mce_cap;
2564
2565                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2566                 r = -EFAULT;
2567                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2568                         goto out;
2569                 r = 0;
2570                 break;
2571         }
2572         default:
2573                 r = -EINVAL;
2574         }
2575 out:
2576         return r;
2577 }
2578
2579 static void wbinvd_ipi(void *garbage)
2580 {
2581         wbinvd();
2582 }
2583
2584 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2585 {
2586         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2587 }
2588
2589 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2590 {
2591         /* Address WBINVD may be executed by guest */
2592         if (need_emulate_wbinvd(vcpu)) {
2593                 if (kvm_x86_ops->has_wbinvd_exit())
2594                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2595                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2596                         smp_call_function_single(vcpu->cpu,
2597                                         wbinvd_ipi, NULL, 1);
2598         }
2599
2600         kvm_x86_ops->vcpu_load(vcpu, cpu);
2601
2602         /* Apply any externally detected TSC adjustments (due to suspend) */
2603         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2604                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2605                 vcpu->arch.tsc_offset_adjustment = 0;
2606                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2607         }
2608
2609         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2610                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2611                                 rdtsc() - vcpu->arch.last_host_tsc;
2612                 if (tsc_delta < 0)
2613                         mark_tsc_unstable("KVM discovered backwards TSC");
2614                 if (check_tsc_unstable()) {
2615                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2616                                                 vcpu->arch.last_guest_tsc);
2617                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2618                         vcpu->arch.tsc_catchup = 1;
2619                 }
2620                 /*
2621                  * On a host with synchronized TSC, there is no need to update
2622                  * kvmclock on vcpu->cpu migration
2623                  */
2624                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2625                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2626                 if (vcpu->cpu != cpu)
2627                         kvm_migrate_timers(vcpu);
2628                 vcpu->cpu = cpu;
2629         }
2630
2631         accumulate_steal_time(vcpu);
2632         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2633 }
2634
2635 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2636 {
2637         kvm_x86_ops->vcpu_put(vcpu);
2638         kvm_put_guest_fpu(vcpu);
2639         vcpu->arch.last_host_tsc = rdtsc();
2640 }
2641
2642 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2643                                     struct kvm_lapic_state *s)
2644 {
2645         kvm_x86_ops->sync_pir_to_irr(vcpu);
2646         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2647
2648         return 0;
2649 }
2650
2651 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2652                                     struct kvm_lapic_state *s)
2653 {
2654         kvm_apic_post_state_restore(vcpu, s);
2655         update_cr8_intercept(vcpu);
2656
2657         return 0;
2658 }
2659
2660 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2661                                     struct kvm_interrupt *irq)
2662 {
2663         if (irq->irq >= KVM_NR_INTERRUPTS)
2664                 return -EINVAL;
2665
2666         if (!irqchip_in_kernel(vcpu->kvm)) {
2667                 kvm_queue_interrupt(vcpu, irq->irq, false);
2668                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2669                 return 0;
2670         }
2671
2672         /*
2673          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2674          * fail for in-kernel 8259.
2675          */
2676         if (pic_in_kernel(vcpu->kvm))
2677                 return -ENXIO;
2678
2679         if (vcpu->arch.pending_external_vector != -1)
2680                 return -EEXIST;
2681
2682         vcpu->arch.pending_external_vector = irq->irq;
2683         return 0;
2684 }
2685
2686 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2687 {
2688         kvm_inject_nmi(vcpu);
2689
2690         return 0;
2691 }
2692
2693 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2694 {
2695         kvm_make_request(KVM_REQ_SMI, vcpu);
2696
2697         return 0;
2698 }
2699
2700 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2701                                            struct kvm_tpr_access_ctl *tac)
2702 {
2703         if (tac->flags)
2704                 return -EINVAL;
2705         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2706         return 0;
2707 }
2708
2709 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2710                                         u64 mcg_cap)
2711 {
2712         int r;
2713         unsigned bank_num = mcg_cap & 0xff, bank;
2714
2715         r = -EINVAL;
2716         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2717                 goto out;
2718         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2719                 goto out;
2720         r = 0;
2721         vcpu->arch.mcg_cap = mcg_cap;
2722         /* Init IA32_MCG_CTL to all 1s */
2723         if (mcg_cap & MCG_CTL_P)
2724                 vcpu->arch.mcg_ctl = ~(u64)0;
2725         /* Init IA32_MCi_CTL to all 1s */
2726         for (bank = 0; bank < bank_num; bank++)
2727                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2728 out:
2729         return r;
2730 }
2731
2732 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2733                                       struct kvm_x86_mce *mce)
2734 {
2735         u64 mcg_cap = vcpu->arch.mcg_cap;
2736         unsigned bank_num = mcg_cap & 0xff;
2737         u64 *banks = vcpu->arch.mce_banks;
2738
2739         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2740                 return -EINVAL;
2741         /*
2742          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2743          * reporting is disabled
2744          */
2745         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2746             vcpu->arch.mcg_ctl != ~(u64)0)
2747                 return 0;
2748         banks += 4 * mce->bank;
2749         /*
2750          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2751          * reporting is disabled for the bank
2752          */
2753         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2754                 return 0;
2755         if (mce->status & MCI_STATUS_UC) {
2756                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2757                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2758                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2759                         return 0;
2760                 }
2761                 if (banks[1] & MCI_STATUS_VAL)
2762                         mce->status |= MCI_STATUS_OVER;
2763                 banks[2] = mce->addr;
2764                 banks[3] = mce->misc;
2765                 vcpu->arch.mcg_status = mce->mcg_status;
2766                 banks[1] = mce->status;
2767                 kvm_queue_exception(vcpu, MC_VECTOR);
2768         } else if (!(banks[1] & MCI_STATUS_VAL)
2769                    || !(banks[1] & MCI_STATUS_UC)) {
2770                 if (banks[1] & MCI_STATUS_VAL)
2771                         mce->status |= MCI_STATUS_OVER;
2772                 banks[2] = mce->addr;
2773                 banks[3] = mce->misc;
2774                 banks[1] = mce->status;
2775         } else
2776                 banks[1] |= MCI_STATUS_OVER;
2777         return 0;
2778 }
2779
2780 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2781                                                struct kvm_vcpu_events *events)
2782 {
2783         process_nmi(vcpu);
2784         events->exception.injected =
2785                 vcpu->arch.exception.pending &&
2786                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2787         events->exception.nr = vcpu->arch.exception.nr;
2788         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2789         events->exception.pad = 0;
2790         events->exception.error_code = vcpu->arch.exception.error_code;
2791
2792         events->interrupt.injected =
2793                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2794         events->interrupt.nr = vcpu->arch.interrupt.nr;
2795         events->interrupt.soft = 0;
2796         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2797
2798         events->nmi.injected = vcpu->arch.nmi_injected;
2799         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2800         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2801         events->nmi.pad = 0;
2802
2803         events->sipi_vector = 0; /* never valid when reporting to user space */
2804
2805         events->smi.smm = is_smm(vcpu);
2806         events->smi.pending = vcpu->arch.smi_pending;
2807         events->smi.smm_inside_nmi =
2808                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2809         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2810
2811         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2812                          | KVM_VCPUEVENT_VALID_SHADOW
2813                          | KVM_VCPUEVENT_VALID_SMM);
2814         memset(&events->reserved, 0, sizeof(events->reserved));
2815 }
2816
2817 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2818                                               struct kvm_vcpu_events *events)
2819 {
2820         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2821                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2822                               | KVM_VCPUEVENT_VALID_SHADOW
2823                               | KVM_VCPUEVENT_VALID_SMM))
2824                 return -EINVAL;
2825
2826         process_nmi(vcpu);
2827         vcpu->arch.exception.pending = events->exception.injected;
2828         vcpu->arch.exception.nr = events->exception.nr;
2829         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2830         vcpu->arch.exception.error_code = events->exception.error_code;
2831
2832         vcpu->arch.interrupt.pending = events->interrupt.injected;
2833         vcpu->arch.interrupt.nr = events->interrupt.nr;
2834         vcpu->arch.interrupt.soft = events->interrupt.soft;
2835         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2836                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2837                                                   events->interrupt.shadow);
2838
2839         vcpu->arch.nmi_injected = events->nmi.injected;
2840         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2841                 vcpu->arch.nmi_pending = events->nmi.pending;
2842         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2843
2844         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2845             kvm_vcpu_has_lapic(vcpu))
2846                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2847
2848         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2849                 if (events->smi.smm)
2850                         vcpu->arch.hflags |= HF_SMM_MASK;
2851                 else
2852                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2853                 vcpu->arch.smi_pending = events->smi.pending;
2854                 if (events->smi.smm_inside_nmi)
2855                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2856                 else
2857                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2858                 if (kvm_vcpu_has_lapic(vcpu)) {
2859                         if (events->smi.latched_init)
2860                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2861                         else
2862                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2863                 }
2864         }
2865
2866         kvm_make_request(KVM_REQ_EVENT, vcpu);
2867
2868         return 0;
2869 }
2870
2871 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2872                                              struct kvm_debugregs *dbgregs)
2873 {
2874         unsigned long val;
2875
2876         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2877         kvm_get_dr(vcpu, 6, &val);
2878         dbgregs->dr6 = val;
2879         dbgregs->dr7 = vcpu->arch.dr7;
2880         dbgregs->flags = 0;
2881         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2882 }
2883
2884 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2885                                             struct kvm_debugregs *dbgregs)
2886 {
2887         if (dbgregs->flags)
2888                 return -EINVAL;
2889
2890         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2891         kvm_update_dr0123(vcpu);
2892         vcpu->arch.dr6 = dbgregs->dr6;
2893         kvm_update_dr6(vcpu);
2894         vcpu->arch.dr7 = dbgregs->dr7;
2895         kvm_update_dr7(vcpu);
2896
2897         return 0;
2898 }
2899
2900 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
2901
2902 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
2903 {
2904         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2905         u64 xstate_bv = xsave->header.xfeatures;
2906         u64 valid;
2907
2908         /*
2909          * Copy legacy XSAVE area, to avoid complications with CPUID
2910          * leaves 0 and 1 in the loop below.
2911          */
2912         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
2913
2914         /* Set XSTATE_BV */
2915         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
2916
2917         /*
2918          * Copy each region from the possibly compacted offset to the
2919          * non-compacted offset.
2920          */
2921         valid = xstate_bv & ~XSTATE_FPSSE;
2922         while (valid) {
2923                 u64 feature = valid & -valid;
2924                 int index = fls64(feature) - 1;
2925                 void *src = get_xsave_addr(xsave, feature);
2926
2927                 if (src) {
2928                         u32 size, offset, ecx, edx;
2929                         cpuid_count(XSTATE_CPUID, index,
2930                                     &size, &offset, &ecx, &edx);
2931                         memcpy(dest + offset, src, size);
2932                 }
2933
2934                 valid -= feature;
2935         }
2936 }
2937
2938 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
2939 {
2940         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2941         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
2942         u64 valid;
2943
2944         /*
2945          * Copy legacy XSAVE area, to avoid complications with CPUID
2946          * leaves 0 and 1 in the loop below.
2947          */
2948         memcpy(xsave, src, XSAVE_HDR_OFFSET);
2949
2950         /* Set XSTATE_BV and possibly XCOMP_BV.  */
2951         xsave->header.xfeatures = xstate_bv;
2952         if (cpu_has_xsaves)
2953                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
2954
2955         /*
2956          * Copy each region from the non-compacted offset to the
2957          * possibly compacted offset.
2958          */
2959         valid = xstate_bv & ~XSTATE_FPSSE;
2960         while (valid) {
2961                 u64 feature = valid & -valid;
2962                 int index = fls64(feature) - 1;
2963                 void *dest = get_xsave_addr(xsave, feature);
2964
2965                 if (dest) {
2966                         u32 size, offset, ecx, edx;
2967                         cpuid_count(XSTATE_CPUID, index,
2968                                     &size, &offset, &ecx, &edx);
2969                         memcpy(dest, src + offset, size);
2970                 }
2971
2972                 valid -= feature;
2973         }
2974 }
2975
2976 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2977                                          struct kvm_xsave *guest_xsave)
2978 {
2979         if (cpu_has_xsave) {
2980                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
2981                 fill_xsave((u8 *) guest_xsave->region, vcpu);
2982         } else {
2983                 memcpy(guest_xsave->region,
2984                         &vcpu->arch.guest_fpu.state.fxsave,
2985                         sizeof(struct fxregs_state));
2986                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2987                         XSTATE_FPSSE;
2988         }
2989 }
2990
2991 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2992                                         struct kvm_xsave *guest_xsave)
2993 {
2994         u64 xstate_bv =
2995                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2996
2997         if (cpu_has_xsave) {
2998                 /*
2999                  * Here we allow setting states that are not present in
3000                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3001                  * with old userspace.
3002                  */
3003                 if (xstate_bv & ~kvm_supported_xcr0())
3004                         return -EINVAL;
3005                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3006         } else {
3007                 if (xstate_bv & ~XSTATE_FPSSE)
3008                         return -EINVAL;
3009                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3010                         guest_xsave->region, sizeof(struct fxregs_state));
3011         }
3012         return 0;
3013 }
3014
3015 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3016                                         struct kvm_xcrs *guest_xcrs)
3017 {
3018         if (!cpu_has_xsave) {
3019                 guest_xcrs->nr_xcrs = 0;
3020                 return;
3021         }
3022
3023         guest_xcrs->nr_xcrs = 1;
3024         guest_xcrs->flags = 0;
3025         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3026         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3027 }
3028
3029 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3030                                        struct kvm_xcrs *guest_xcrs)
3031 {
3032         int i, r = 0;
3033
3034         if (!cpu_has_xsave)
3035                 return -EINVAL;
3036
3037         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3038                 return -EINVAL;
3039
3040         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3041                 /* Only support XCR0 currently */
3042                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3043                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3044                                 guest_xcrs->xcrs[i].value);
3045                         break;
3046                 }
3047         if (r)
3048                 r = -EINVAL;
3049         return r;
3050 }
3051
3052 /*
3053  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3054  * stopped by the hypervisor.  This function will be called from the host only.
3055  * EINVAL is returned when the host attempts to set the flag for a guest that
3056  * does not support pv clocks.
3057  */
3058 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3059 {
3060         if (!vcpu->arch.pv_time_enabled)
3061                 return -EINVAL;
3062         vcpu->arch.pvclock_set_guest_stopped_request = true;
3063         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3064         return 0;
3065 }
3066
3067 long kvm_arch_vcpu_ioctl(struct file *filp,
3068                          unsigned int ioctl, unsigned long arg)
3069 {
3070         struct kvm_vcpu *vcpu = filp->private_data;
3071         void __user *argp = (void __user *)arg;
3072         int r;
3073         union {
3074                 struct kvm_lapic_state *lapic;
3075                 struct kvm_xsave *xsave;
3076                 struct kvm_xcrs *xcrs;
3077                 void *buffer;
3078         } u;
3079
3080         u.buffer = NULL;
3081         switch (ioctl) {
3082         case KVM_GET_LAPIC: {
3083                 r = -EINVAL;
3084                 if (!vcpu->arch.apic)
3085                         goto out;
3086                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3087
3088                 r = -ENOMEM;
3089                 if (!u.lapic)
3090                         goto out;
3091                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3092                 if (r)
3093                         goto out;
3094                 r = -EFAULT;
3095                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3096                         goto out;
3097                 r = 0;
3098                 break;
3099         }
3100         case KVM_SET_LAPIC: {
3101                 r = -EINVAL;
3102                 if (!vcpu->arch.apic)
3103                         goto out;
3104                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3105                 if (IS_ERR(u.lapic))
3106                         return PTR_ERR(u.lapic);
3107
3108                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3109                 break;
3110         }
3111         case KVM_INTERRUPT: {
3112                 struct kvm_interrupt irq;
3113
3114                 r = -EFAULT;
3115                 if (copy_from_user(&irq, argp, sizeof irq))
3116                         goto out;
3117                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3118                 break;
3119         }
3120         case KVM_NMI: {
3121                 r = kvm_vcpu_ioctl_nmi(vcpu);
3122                 break;
3123         }
3124         case KVM_SMI: {
3125                 r = kvm_vcpu_ioctl_smi(vcpu);
3126                 break;
3127         }
3128         case KVM_SET_CPUID: {
3129                 struct kvm_cpuid __user *cpuid_arg = argp;
3130                 struct kvm_cpuid cpuid;
3131
3132                 r = -EFAULT;
3133                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3134                         goto out;
3135                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3136                 break;
3137         }
3138         case KVM_SET_CPUID2: {
3139                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3140                 struct kvm_cpuid2 cpuid;
3141
3142                 r = -EFAULT;
3143                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3144                         goto out;
3145                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3146                                               cpuid_arg->entries);
3147                 break;
3148         }
3149         case KVM_GET_CPUID2: {
3150                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3151                 struct kvm_cpuid2 cpuid;
3152
3153                 r = -EFAULT;
3154                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3155                         goto out;
3156                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3157                                               cpuid_arg->entries);
3158                 if (r)
3159                         goto out;
3160                 r = -EFAULT;
3161                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3162                         goto out;
3163                 r = 0;
3164                 break;
3165         }
3166         case KVM_GET_MSRS:
3167                 r = msr_io(vcpu, argp, do_get_msr, 1);
3168                 break;
3169         case KVM_SET_MSRS:
3170                 r = msr_io(vcpu, argp, do_set_msr, 0);
3171                 break;
3172         case KVM_TPR_ACCESS_REPORTING: {
3173                 struct kvm_tpr_access_ctl tac;
3174
3175                 r = -EFAULT;
3176                 if (copy_from_user(&tac, argp, sizeof tac))
3177                         goto out;
3178                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3179                 if (r)
3180                         goto out;
3181                 r = -EFAULT;
3182                 if (copy_to_user(argp, &tac, sizeof tac))
3183                         goto out;
3184                 r = 0;
3185                 break;
3186         };
3187         case KVM_SET_VAPIC_ADDR: {
3188                 struct kvm_vapic_addr va;
3189
3190                 r = -EINVAL;
3191                 if (!lapic_in_kernel(vcpu))
3192                         goto out;
3193                 r = -EFAULT;
3194                 if (copy_from_user(&va, argp, sizeof va))
3195                         goto out;
3196                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3197                 break;
3198         }
3199         case KVM_X86_SETUP_MCE: {
3200                 u64 mcg_cap;
3201
3202                 r = -EFAULT;
3203                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3204                         goto out;
3205                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3206                 break;
3207         }
3208         case KVM_X86_SET_MCE: {
3209                 struct kvm_x86_mce mce;
3210
3211                 r = -EFAULT;
3212                 if (copy_from_user(&mce, argp, sizeof mce))
3213                         goto out;
3214                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3215                 break;
3216         }
3217         case KVM_GET_VCPU_EVENTS: {
3218                 struct kvm_vcpu_events events;
3219
3220                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3221
3222                 r = -EFAULT;
3223                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3224                         break;
3225                 r = 0;
3226                 break;
3227         }
3228         case KVM_SET_VCPU_EVENTS: {
3229                 struct kvm_vcpu_events events;
3230
3231                 r = -EFAULT;
3232                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3233                         break;
3234
3235                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3236                 break;
3237         }
3238         case KVM_GET_DEBUGREGS: {
3239                 struct kvm_debugregs dbgregs;
3240
3241                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3242
3243                 r = -EFAULT;
3244                 if (copy_to_user(argp, &dbgregs,
3245                                  sizeof(struct kvm_debugregs)))
3246                         break;
3247                 r = 0;
3248                 break;
3249         }
3250         case KVM_SET_DEBUGREGS: {
3251                 struct kvm_debugregs dbgregs;
3252
3253                 r = -EFAULT;
3254                 if (copy_from_user(&dbgregs, argp,
3255                                    sizeof(struct kvm_debugregs)))
3256                         break;
3257
3258                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3259                 break;
3260         }
3261         case KVM_GET_XSAVE: {
3262                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3263                 r = -ENOMEM;
3264                 if (!u.xsave)
3265                         break;
3266
3267                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3268
3269                 r = -EFAULT;
3270                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3271                         break;
3272                 r = 0;
3273                 break;
3274         }
3275         case KVM_SET_XSAVE: {
3276                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3277                 if (IS_ERR(u.xsave))
3278                         return PTR_ERR(u.xsave);
3279
3280                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3281                 break;
3282         }
3283         case KVM_GET_XCRS: {
3284                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3285                 r = -ENOMEM;
3286                 if (!u.xcrs)
3287                         break;
3288
3289                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3290
3291                 r = -EFAULT;
3292                 if (copy_to_user(argp, u.xcrs,
3293                                  sizeof(struct kvm_xcrs)))
3294                         break;
3295                 r = 0;
3296                 break;
3297         }
3298         case KVM_SET_XCRS: {
3299                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3300                 if (IS_ERR(u.xcrs))
3301                         return PTR_ERR(u.xcrs);
3302
3303                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3304                 break;
3305         }
3306         case KVM_SET_TSC_KHZ: {
3307                 u32 user_tsc_khz;
3308
3309                 r = -EINVAL;
3310                 user_tsc_khz = (u32)arg;
3311
3312                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3313                         goto out;
3314
3315                 if (user_tsc_khz == 0)
3316                         user_tsc_khz = tsc_khz;
3317
3318                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3319
3320                 r = 0;
3321                 goto out;
3322         }
3323         case KVM_GET_TSC_KHZ: {
3324                 r = vcpu->arch.virtual_tsc_khz;
3325                 goto out;
3326         }
3327         case KVM_KVMCLOCK_CTRL: {
3328                 r = kvm_set_guest_paused(vcpu);
3329                 goto out;
3330         }
3331         default:
3332                 r = -EINVAL;
3333         }
3334 out:
3335         kfree(u.buffer);
3336         return r;
3337 }
3338
3339 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3340 {
3341         return VM_FAULT_SIGBUS;
3342 }
3343
3344 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3345 {
3346         int ret;
3347
3348         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3349                 return -EINVAL;
3350         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3351         return ret;
3352 }
3353
3354 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3355                                               u64 ident_addr)
3356 {
3357         kvm->arch.ept_identity_map_addr = ident_addr;
3358         return 0;
3359 }
3360
3361 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3362                                           u32 kvm_nr_mmu_pages)
3363 {
3364         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3365                 return -EINVAL;
3366
3367         mutex_lock(&kvm->slots_lock);
3368
3369         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3370         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3371
3372         mutex_unlock(&kvm->slots_lock);
3373         return 0;
3374 }
3375
3376 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3377 {
3378         return kvm->arch.n_max_mmu_pages;
3379 }
3380
3381 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3382 {
3383         int r;
3384
3385         r = 0;
3386         switch (chip->chip_id) {
3387         case KVM_IRQCHIP_PIC_MASTER:
3388                 memcpy(&chip->chip.pic,
3389                         &pic_irqchip(kvm)->pics[0],
3390                         sizeof(struct kvm_pic_state));
3391                 break;
3392         case KVM_IRQCHIP_PIC_SLAVE:
3393                 memcpy(&chip->chip.pic,
3394                         &pic_irqchip(kvm)->pics[1],
3395                         sizeof(struct kvm_pic_state));
3396                 break;
3397         case KVM_IRQCHIP_IOAPIC:
3398                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3399                 break;
3400         default:
3401                 r = -EINVAL;
3402                 break;
3403         }
3404         return r;
3405 }
3406
3407 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3408 {
3409         int r;
3410
3411         r = 0;
3412         switch (chip->chip_id) {
3413         case KVM_IRQCHIP_PIC_MASTER:
3414                 spin_lock(&pic_irqchip(kvm)->lock);
3415                 memcpy(&pic_irqchip(kvm)->pics[0],
3416                         &chip->chip.pic,
3417                         sizeof(struct kvm_pic_state));
3418                 spin_unlock(&pic_irqchip(kvm)->lock);
3419                 break;
3420         case KVM_IRQCHIP_PIC_SLAVE:
3421                 spin_lock(&pic_irqchip(kvm)->lock);
3422                 memcpy(&pic_irqchip(kvm)->pics[1],
3423                         &chip->chip.pic,
3424                         sizeof(struct kvm_pic_state));
3425                 spin_unlock(&pic_irqchip(kvm)->lock);
3426                 break;
3427         case KVM_IRQCHIP_IOAPIC:
3428                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3429                 break;
3430         default:
3431                 r = -EINVAL;
3432                 break;
3433         }
3434         kvm_pic_update_irq(pic_irqchip(kvm));
3435         return r;
3436 }
3437
3438 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3439 {
3440         int r = 0;
3441
3442         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3443         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3444         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3445         return r;
3446 }
3447
3448 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3449 {
3450         int r = 0;
3451
3452         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3453         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3454         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3455         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3456         return r;
3457 }
3458
3459 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3460 {
3461         int r = 0;
3462
3463         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3464         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3465                 sizeof(ps->channels));
3466         ps->flags = kvm->arch.vpit->pit_state.flags;
3467         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3468         memset(&ps->reserved, 0, sizeof(ps->reserved));
3469         return r;
3470 }
3471
3472 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3473 {
3474         int r = 0, start = 0;
3475         u32 prev_legacy, cur_legacy;
3476         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3477         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3478         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3479         if (!prev_legacy && cur_legacy)
3480                 start = 1;
3481         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3482                sizeof(kvm->arch.vpit->pit_state.channels));
3483         kvm->arch.vpit->pit_state.flags = ps->flags;
3484         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3485         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3486         return r;
3487 }
3488
3489 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3490                                  struct kvm_reinject_control *control)
3491 {
3492         if (!kvm->arch.vpit)
3493                 return -ENXIO;
3494         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3495         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3496         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3497         return 0;
3498 }
3499
3500 /**
3501  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3502  * @kvm: kvm instance
3503  * @log: slot id and address to which we copy the log
3504  *
3505  * Steps 1-4 below provide general overview of dirty page logging. See
3506  * kvm_get_dirty_log_protect() function description for additional details.
3507  *
3508  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3509  * always flush the TLB (step 4) even if previous step failed  and the dirty
3510  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3511  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3512  * writes will be marked dirty for next log read.
3513  *
3514  *   1. Take a snapshot of the bit and clear it if needed.
3515  *   2. Write protect the corresponding page.
3516  *   3. Copy the snapshot to the userspace.
3517  *   4. Flush TLB's if needed.
3518  */
3519 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3520 {
3521         bool is_dirty = false;
3522         int r;
3523
3524         mutex_lock(&kvm->slots_lock);
3525
3526         /*
3527          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3528          */
3529         if (kvm_x86_ops->flush_log_dirty)
3530                 kvm_x86_ops->flush_log_dirty(kvm);
3531
3532         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3533
3534         /*
3535          * All the TLBs can be flushed out of mmu lock, see the comments in
3536          * kvm_mmu_slot_remove_write_access().
3537          */
3538         lockdep_assert_held(&kvm->slots_lock);
3539         if (is_dirty)
3540                 kvm_flush_remote_tlbs(kvm);
3541
3542         mutex_unlock(&kvm->slots_lock);
3543         return r;
3544 }
3545
3546 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3547                         bool line_status)
3548 {
3549         if (!irqchip_in_kernel(kvm))
3550                 return -ENXIO;
3551
3552         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3553                                         irq_event->irq, irq_event->level,
3554                                         line_status);
3555         return 0;
3556 }
3557
3558 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3559                                    struct kvm_enable_cap *cap)
3560 {
3561         int r;
3562
3563         if (cap->flags)
3564                 return -EINVAL;
3565
3566         switch (cap->cap) {
3567         case KVM_CAP_DISABLE_QUIRKS:
3568                 kvm->arch.disabled_quirks = cap->args[0];
3569                 r = 0;
3570                 break;
3571         case KVM_CAP_SPLIT_IRQCHIP: {
3572                 mutex_lock(&kvm->lock);
3573                 r = -EINVAL;
3574                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3575                         goto split_irqchip_unlock;
3576                 r = -EEXIST;
3577                 if (irqchip_in_kernel(kvm))
3578                         goto split_irqchip_unlock;
3579                 if (atomic_read(&kvm->online_vcpus))
3580                         goto split_irqchip_unlock;
3581                 r = kvm_setup_empty_irq_routing(kvm);
3582                 if (r)
3583                         goto split_irqchip_unlock;
3584                 /* Pairs with irqchip_in_kernel. */
3585                 smp_wmb();
3586                 kvm->arch.irqchip_split = true;
3587                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3588                 r = 0;
3589 split_irqchip_unlock:
3590                 mutex_unlock(&kvm->lock);
3591                 break;
3592         }
3593         default:
3594                 r = -EINVAL;
3595                 break;
3596         }
3597         return r;
3598 }
3599
3600 long kvm_arch_vm_ioctl(struct file *filp,
3601                        unsigned int ioctl, unsigned long arg)
3602 {
3603         struct kvm *kvm = filp->private_data;
3604         void __user *argp = (void __user *)arg;
3605         int r = -ENOTTY;
3606         /*
3607          * This union makes it completely explicit to gcc-3.x
3608          * that these two variables' stack usage should be
3609          * combined, not added together.
3610          */
3611         union {
3612                 struct kvm_pit_state ps;
3613                 struct kvm_pit_state2 ps2;
3614                 struct kvm_pit_config pit_config;
3615         } u;
3616
3617         switch (ioctl) {
3618         case KVM_SET_TSS_ADDR:
3619                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3620                 break;
3621         case KVM_SET_IDENTITY_MAP_ADDR: {
3622                 u64 ident_addr;
3623
3624                 r = -EFAULT;
3625                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3626                         goto out;
3627                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3628                 break;
3629         }
3630         case KVM_SET_NR_MMU_PAGES:
3631                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3632                 break;
3633         case KVM_GET_NR_MMU_PAGES:
3634                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3635                 break;
3636         case KVM_CREATE_IRQCHIP: {
3637                 struct kvm_pic *vpic;
3638
3639                 mutex_lock(&kvm->lock);
3640                 r = -EEXIST;
3641                 if (kvm->arch.vpic)
3642                         goto create_irqchip_unlock;
3643                 r = -EINVAL;
3644                 if (atomic_read(&kvm->online_vcpus))
3645                         goto create_irqchip_unlock;
3646                 r = -ENOMEM;
3647                 vpic = kvm_create_pic(kvm);
3648                 if (vpic) {
3649                         r = kvm_ioapic_init(kvm);
3650                         if (r) {
3651                                 mutex_lock(&kvm->slots_lock);
3652                                 kvm_destroy_pic(vpic);
3653                                 mutex_unlock(&kvm->slots_lock);
3654                                 goto create_irqchip_unlock;
3655                         }
3656                 } else
3657                         goto create_irqchip_unlock;
3658                 r = kvm_setup_default_irq_routing(kvm);
3659                 if (r) {
3660                         mutex_lock(&kvm->slots_lock);
3661                         mutex_lock(&kvm->irq_lock);
3662                         kvm_ioapic_destroy(kvm);
3663                         kvm_destroy_pic(vpic);
3664                         mutex_unlock(&kvm->irq_lock);
3665                         mutex_unlock(&kvm->slots_lock);
3666                         goto create_irqchip_unlock;
3667                 }
3668                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3669                 smp_wmb();
3670                 kvm->arch.vpic = vpic;
3671         create_irqchip_unlock:
3672                 mutex_unlock(&kvm->lock);
3673                 break;
3674         }
3675         case KVM_CREATE_PIT:
3676                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3677                 goto create_pit;
3678         case KVM_CREATE_PIT2:
3679                 r = -EFAULT;
3680                 if (copy_from_user(&u.pit_config, argp,
3681                                    sizeof(struct kvm_pit_config)))
3682                         goto out;
3683         create_pit:
3684                 mutex_lock(&kvm->slots_lock);
3685                 r = -EEXIST;
3686                 if (kvm->arch.vpit)
3687                         goto create_pit_unlock;
3688                 r = -ENOMEM;
3689                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3690                 if (kvm->arch.vpit)
3691                         r = 0;
3692         create_pit_unlock:
3693                 mutex_unlock(&kvm->slots_lock);
3694                 break;
3695         case KVM_GET_IRQCHIP: {
3696                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3697                 struct kvm_irqchip *chip;
3698
3699                 chip = memdup_user(argp, sizeof(*chip));
3700                 if (IS_ERR(chip)) {
3701                         r = PTR_ERR(chip);
3702                         goto out;
3703                 }
3704
3705                 r = -ENXIO;
3706                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3707                         goto get_irqchip_out;
3708                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3709                 if (r)
3710                         goto get_irqchip_out;
3711                 r = -EFAULT;
3712                 if (copy_to_user(argp, chip, sizeof *chip))
3713                         goto get_irqchip_out;
3714                 r = 0;
3715         get_irqchip_out:
3716                 kfree(chip);
3717                 break;
3718         }
3719         case KVM_SET_IRQCHIP: {
3720                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3721                 struct kvm_irqchip *chip;
3722
3723                 chip = memdup_user(argp, sizeof(*chip));
3724                 if (IS_ERR(chip)) {
3725                         r = PTR_ERR(chip);
3726                         goto out;
3727                 }
3728
3729                 r = -ENXIO;
3730                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3731                         goto set_irqchip_out;
3732                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3733                 if (r)
3734                         goto set_irqchip_out;
3735                 r = 0;
3736         set_irqchip_out:
3737                 kfree(chip);
3738                 break;
3739         }
3740         case KVM_GET_PIT: {
3741                 r = -EFAULT;
3742                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3743                         goto out;
3744                 r = -ENXIO;
3745                 if (!kvm->arch.vpit)
3746                         goto out;
3747                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3748                 if (r)
3749                         goto out;
3750                 r = -EFAULT;
3751                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3752                         goto out;
3753                 r = 0;
3754                 break;
3755         }
3756         case KVM_SET_PIT: {
3757                 r = -EFAULT;
3758                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3759                         goto out;
3760                 r = -ENXIO;
3761                 if (!kvm->arch.vpit)
3762                         goto out;
3763                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3764                 break;
3765         }
3766         case KVM_GET_PIT2: {
3767                 r = -ENXIO;
3768                 if (!kvm->arch.vpit)
3769                         goto out;
3770                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3771                 if (r)
3772                         goto out;
3773                 r = -EFAULT;
3774                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3775                         goto out;
3776                 r = 0;
3777                 break;
3778         }
3779         case KVM_SET_PIT2: {
3780                 r = -EFAULT;
3781                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3782                         goto out;
3783                 r = -ENXIO;
3784                 if (!kvm->arch.vpit)
3785                         goto out;
3786                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3787                 break;
3788         }
3789         case KVM_REINJECT_CONTROL: {
3790                 struct kvm_reinject_control control;
3791                 r =  -EFAULT;
3792                 if (copy_from_user(&control, argp, sizeof(control)))
3793                         goto out;
3794                 r = kvm_vm_ioctl_reinject(kvm, &control);
3795                 break;
3796         }
3797         case KVM_SET_BOOT_CPU_ID:
3798                 r = 0;
3799                 mutex_lock(&kvm->lock);
3800                 if (atomic_read(&kvm->online_vcpus) != 0)
3801                         r = -EBUSY;
3802                 else
3803                         kvm->arch.bsp_vcpu_id = arg;
3804                 mutex_unlock(&kvm->lock);
3805                 break;
3806         case KVM_XEN_HVM_CONFIG: {
3807                 r = -EFAULT;
3808                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3809                                    sizeof(struct kvm_xen_hvm_config)))
3810                         goto out;
3811                 r = -EINVAL;
3812                 if (kvm->arch.xen_hvm_config.flags)
3813                         goto out;
3814                 r = 0;
3815                 break;
3816         }
3817         case KVM_SET_CLOCK: {
3818                 struct kvm_clock_data user_ns;
3819                 u64 now_ns;
3820                 s64 delta;
3821
3822                 r = -EFAULT;
3823                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3824                         goto out;
3825
3826                 r = -EINVAL;
3827                 if (user_ns.flags)
3828                         goto out;
3829
3830                 r = 0;
3831                 local_irq_disable();
3832                 now_ns = get_kernel_ns();
3833                 delta = user_ns.clock - now_ns;
3834                 local_irq_enable();
3835                 kvm->arch.kvmclock_offset = delta;
3836                 kvm_gen_update_masterclock(kvm);
3837                 break;
3838         }
3839         case KVM_GET_CLOCK: {
3840                 struct kvm_clock_data user_ns;
3841                 u64 now_ns;
3842
3843                 local_irq_disable();
3844                 now_ns = get_kernel_ns();
3845                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3846                 local_irq_enable();
3847                 user_ns.flags = 0;
3848                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3849
3850                 r = -EFAULT;
3851                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3852                         goto out;
3853                 r = 0;
3854                 break;
3855         }
3856         case KVM_ENABLE_CAP: {
3857                 struct kvm_enable_cap cap;
3858
3859                 r = -EFAULT;
3860                 if (copy_from_user(&cap, argp, sizeof(cap)))
3861                         goto out;
3862                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3863                 break;
3864         }
3865         default:
3866                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3867         }
3868 out:
3869         return r;
3870 }
3871
3872 static void kvm_init_msr_list(void)
3873 {
3874         u32 dummy[2];
3875         unsigned i, j;
3876
3877         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
3878                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3879                         continue;
3880
3881                 /*
3882                  * Even MSRs that are valid in the host may not be exposed
3883                  * to the guests in some cases.  We could work around this
3884                  * in VMX with the generic MSR save/load machinery, but it
3885                  * is not really worthwhile since it will really only
3886                  * happen with nested virtualization.
3887                  */
3888                 switch (msrs_to_save[i]) {
3889                 case MSR_IA32_BNDCFGS:
3890                         if (!kvm_x86_ops->mpx_supported())
3891                                 continue;
3892                         break;
3893                 default:
3894                         break;
3895                 }
3896
3897                 if (j < i)
3898                         msrs_to_save[j] = msrs_to_save[i];
3899                 j++;
3900         }
3901         num_msrs_to_save = j;
3902
3903         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
3904                 switch (emulated_msrs[i]) {
3905                 case MSR_IA32_SMBASE:
3906                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
3907                                 continue;
3908                         break;
3909                 default:
3910                         break;
3911                 }
3912
3913                 if (j < i)
3914                         emulated_msrs[j] = emulated_msrs[i];
3915                 j++;
3916         }
3917         num_emulated_msrs = j;
3918 }
3919
3920 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3921                            const void *v)
3922 {
3923         int handled = 0;
3924         int n;
3925
3926         do {
3927                 n = min(len, 8);
3928                 if (!(vcpu->arch.apic &&
3929                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
3930                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
3931                         break;
3932                 handled += n;
3933                 addr += n;
3934                 len -= n;
3935                 v += n;
3936         } while (len);
3937
3938         return handled;
3939 }
3940
3941 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3942 {
3943         int handled = 0;
3944         int n;
3945
3946         do {
3947                 n = min(len, 8);
3948                 if (!(vcpu->arch.apic &&
3949                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
3950                                          addr, n, v))
3951                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
3952                         break;
3953                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3954                 handled += n;
3955                 addr += n;
3956                 len -= n;
3957                 v += n;
3958         } while (len);
3959
3960         return handled;
3961 }
3962
3963 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3964                         struct kvm_segment *var, int seg)
3965 {
3966         kvm_x86_ops->set_segment(vcpu, var, seg);
3967 }
3968
3969 void kvm_get_segment(struct kvm_vcpu *vcpu,
3970                      struct kvm_segment *var, int seg)
3971 {
3972         kvm_x86_ops->get_segment(vcpu, var, seg);
3973 }
3974
3975 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
3976                            struct x86_exception *exception)
3977 {
3978         gpa_t t_gpa;
3979
3980         BUG_ON(!mmu_is_nested(vcpu));
3981
3982         /* NPT walks are always user-walks */
3983         access |= PFERR_USER_MASK;
3984         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
3985
3986         return t_gpa;
3987 }
3988
3989 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3990                               struct x86_exception *exception)
3991 {
3992         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3993         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3994 }
3995
3996  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3997                                 struct x86_exception *exception)
3998 {
3999         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4000         access |= PFERR_FETCH_MASK;
4001         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4002 }
4003
4004 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4005                                struct x86_exception *exception)
4006 {
4007         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4008         access |= PFERR_WRITE_MASK;
4009         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4010 }
4011
4012 /* uses this to access any guest's mapped memory without checking CPL */
4013 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4014                                 struct x86_exception *exception)
4015 {
4016         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4017 }
4018
4019 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4020                                       struct kvm_vcpu *vcpu, u32 access,
4021                                       struct x86_exception *exception)
4022 {
4023         void *data = val;
4024         int r = X86EMUL_CONTINUE;
4025
4026         while (bytes) {
4027                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4028                                                             exception);
4029                 unsigned offset = addr & (PAGE_SIZE-1);
4030                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4031                 int ret;
4032
4033                 if (gpa == UNMAPPED_GVA)
4034                         return X86EMUL_PROPAGATE_FAULT;
4035                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4036                                                offset, toread);
4037                 if (ret < 0) {
4038                         r = X86EMUL_IO_NEEDED;
4039                         goto out;
4040                 }
4041
4042                 bytes -= toread;
4043                 data += toread;
4044                 addr += toread;
4045         }
4046 out:
4047         return r;
4048 }
4049
4050 /* used for instruction fetching */
4051 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4052                                 gva_t addr, void *val, unsigned int bytes,
4053                                 struct x86_exception *exception)
4054 {
4055         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4056         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4057         unsigned offset;
4058         int ret;
4059
4060         /* Inline kvm_read_guest_virt_helper for speed.  */
4061         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4062                                                     exception);
4063         if (unlikely(gpa == UNMAPPED_GVA))
4064                 return X86EMUL_PROPAGATE_FAULT;
4065
4066         offset = addr & (PAGE_SIZE-1);
4067         if (WARN_ON(offset + bytes > PAGE_SIZE))
4068                 bytes = (unsigned)PAGE_SIZE - offset;
4069         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4070                                        offset, bytes);
4071         if (unlikely(ret < 0))
4072                 return X86EMUL_IO_NEEDED;
4073
4074         return X86EMUL_CONTINUE;
4075 }
4076
4077 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4078                                gva_t addr, void *val, unsigned int bytes,
4079                                struct x86_exception *exception)
4080 {
4081         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4082         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4083
4084         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4085                                           exception);
4086 }
4087 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4088
4089 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4090                                       gva_t addr, void *val, unsigned int bytes,
4091                                       struct x86_exception *exception)
4092 {
4093         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4094         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4095 }
4096
4097 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4098                                        gva_t addr, void *val,
4099                                        unsigned int bytes,
4100                                        struct x86_exception *exception)
4101 {
4102         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4103         void *data = val;
4104         int r = X86EMUL_CONTINUE;
4105
4106         while (bytes) {
4107                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4108                                                              PFERR_WRITE_MASK,
4109                                                              exception);
4110                 unsigned offset = addr & (PAGE_SIZE-1);
4111                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4112                 int ret;
4113
4114                 if (gpa == UNMAPPED_GVA)
4115                         return X86EMUL_PROPAGATE_FAULT;
4116                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4117                 if (ret < 0) {
4118                         r = X86EMUL_IO_NEEDED;
4119                         goto out;
4120                 }
4121
4122                 bytes -= towrite;
4123                 data += towrite;
4124                 addr += towrite;
4125         }
4126 out:
4127         return r;
4128 }
4129 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4130
4131 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4132                                 gpa_t *gpa, struct x86_exception *exception,
4133                                 bool write)
4134 {
4135         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4136                 | (write ? PFERR_WRITE_MASK : 0);
4137
4138         if (vcpu_match_mmio_gva(vcpu, gva)
4139             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4140                                  vcpu->arch.access, access)) {
4141                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4142                                         (gva & (PAGE_SIZE - 1));
4143                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4144                 return 1;
4145         }
4146
4147         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4148
4149         if (*gpa == UNMAPPED_GVA)
4150                 return -1;
4151
4152         /* For APIC access vmexit */
4153         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4154                 return 1;
4155
4156         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4157                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4158                 return 1;
4159         }
4160
4161         return 0;
4162 }
4163
4164 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4165                         const void *val, int bytes)
4166 {
4167         int ret;
4168
4169         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4170         if (ret < 0)
4171                 return 0;
4172         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4173         return 1;
4174 }
4175
4176 struct read_write_emulator_ops {
4177         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4178                                   int bytes);
4179         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4180                                   void *val, int bytes);
4181         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4182                                int bytes, void *val);
4183         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4184                                     void *val, int bytes);
4185         bool write;
4186 };
4187
4188 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4189 {
4190         if (vcpu->mmio_read_completed) {
4191                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4192                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4193                 vcpu->mmio_read_completed = 0;
4194                 return 1;
4195         }
4196
4197         return 0;
4198 }
4199
4200 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4201                         void *val, int bytes)
4202 {
4203         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4204 }
4205
4206 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4207                          void *val, int bytes)
4208 {
4209         return emulator_write_phys(vcpu, gpa, val, bytes);
4210 }
4211
4212 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4213 {
4214         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4215         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4216 }
4217
4218 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4219                           void *val, int bytes)
4220 {
4221         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4222         return X86EMUL_IO_NEEDED;
4223 }
4224
4225 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4226                            void *val, int bytes)
4227 {
4228         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4229
4230         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4231         return X86EMUL_CONTINUE;
4232 }
4233
4234 static const struct read_write_emulator_ops read_emultor = {
4235         .read_write_prepare = read_prepare,
4236         .read_write_emulate = read_emulate,
4237         .read_write_mmio = vcpu_mmio_read,
4238         .read_write_exit_mmio = read_exit_mmio,
4239 };
4240
4241 static const struct read_write_emulator_ops write_emultor = {
4242         .read_write_emulate = write_emulate,
4243         .read_write_mmio = write_mmio,
4244         .read_write_exit_mmio = write_exit_mmio,
4245         .write = true,
4246 };
4247
4248 static int emulator_read_write_onepage(unsigned long addr, void *val,
4249                                        unsigned int bytes,
4250                                        struct x86_exception *exception,
4251                                        struct kvm_vcpu *vcpu,
4252                                        const struct read_write_emulator_ops *ops)
4253 {
4254         gpa_t gpa;
4255         int handled, ret;
4256         bool write = ops->write;
4257         struct kvm_mmio_fragment *frag;
4258
4259         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4260
4261         if (ret < 0)
4262                 return X86EMUL_PROPAGATE_FAULT;
4263
4264         /* For APIC access vmexit */
4265         if (ret)
4266                 goto mmio;
4267
4268         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4269                 return X86EMUL_CONTINUE;
4270
4271 mmio:
4272         /*
4273          * Is this MMIO handled locally?
4274          */
4275         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4276         if (handled == bytes)
4277                 return X86EMUL_CONTINUE;
4278
4279         gpa += handled;
4280         bytes -= handled;
4281         val += handled;
4282
4283         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4284         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4285         frag->gpa = gpa;
4286         frag->data = val;
4287         frag->len = bytes;
4288         return X86EMUL_CONTINUE;
4289 }
4290
4291 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4292                         unsigned long addr,
4293                         void *val, unsigned int bytes,
4294                         struct x86_exception *exception,
4295                         const struct read_write_emulator_ops *ops)
4296 {
4297         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4298         gpa_t gpa;
4299         int rc;
4300
4301         if (ops->read_write_prepare &&
4302                   ops->read_write_prepare(vcpu, val, bytes))
4303                 return X86EMUL_CONTINUE;
4304
4305         vcpu->mmio_nr_fragments = 0;
4306
4307         /* Crossing a page boundary? */
4308         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4309                 int now;
4310
4311                 now = -addr & ~PAGE_MASK;
4312                 rc = emulator_read_write_onepage(addr, val, now, exception,
4313                                                  vcpu, ops);
4314
4315                 if (rc != X86EMUL_CONTINUE)
4316                         return rc;
4317                 addr += now;
4318                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4319                         addr = (u32)addr;
4320                 val += now;
4321                 bytes -= now;
4322         }
4323
4324         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4325                                          vcpu, ops);
4326         if (rc != X86EMUL_CONTINUE)
4327                 return rc;
4328
4329         if (!vcpu->mmio_nr_fragments)
4330                 return rc;
4331
4332         gpa = vcpu->mmio_fragments[0].gpa;
4333
4334         vcpu->mmio_needed = 1;
4335         vcpu->mmio_cur_fragment = 0;
4336
4337         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4338         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4339         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4340         vcpu->run->mmio.phys_addr = gpa;
4341
4342         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4343 }
4344
4345 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4346                                   unsigned long addr,
4347                                   void *val,
4348                                   unsigned int bytes,
4349                                   struct x86_exception *exception)
4350 {
4351         return emulator_read_write(ctxt, addr, val, bytes,
4352                                    exception, &read_emultor);
4353 }
4354
4355 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4356                             unsigned long addr,
4357                             const void *val,
4358                             unsigned int bytes,
4359                             struct x86_exception *exception)
4360 {
4361         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4362                                    exception, &write_emultor);
4363 }
4364
4365 #define CMPXCHG_TYPE(t, ptr, old, new) \
4366         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4367
4368 #ifdef CONFIG_X86_64
4369 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4370 #else
4371 #  define CMPXCHG64(ptr, old, new) \
4372         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4373 #endif
4374
4375 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4376                                      unsigned long addr,
4377                                      const void *old,
4378                                      const void *new,
4379                                      unsigned int bytes,
4380                                      struct x86_exception *exception)
4381 {
4382         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4383         gpa_t gpa;
4384         struct page *page;
4385         char *kaddr;
4386         bool exchanged;
4387
4388         /* guests cmpxchg8b have to be emulated atomically */
4389         if (bytes > 8 || (bytes & (bytes - 1)))
4390                 goto emul_write;
4391
4392         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4393
4394         if (gpa == UNMAPPED_GVA ||
4395             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4396                 goto emul_write;
4397
4398         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4399                 goto emul_write;
4400
4401         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4402         if (is_error_page(page))
4403                 goto emul_write;
4404
4405         kaddr = kmap_atomic(page);
4406         kaddr += offset_in_page(gpa);
4407         switch (bytes) {
4408         case 1:
4409                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4410                 break;
4411         case 2:
4412                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4413                 break;
4414         case 4:
4415                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4416                 break;
4417         case 8:
4418                 exchanged = CMPXCHG64(kaddr, old, new);
4419                 break;
4420         default:
4421                 BUG();
4422         }
4423         kunmap_atomic(kaddr);
4424         kvm_release_page_dirty(page);
4425
4426         if (!exchanged)
4427                 return X86EMUL_CMPXCHG_FAILED;
4428
4429         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4430         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4431
4432         return X86EMUL_CONTINUE;
4433
4434 emul_write:
4435         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4436
4437         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4438 }
4439
4440 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4441 {
4442         /* TODO: String I/O for in kernel device */
4443         int r;
4444
4445         if (vcpu->arch.pio.in)
4446                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4447                                     vcpu->arch.pio.size, pd);
4448         else
4449                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4450                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4451                                      pd);
4452         return r;
4453 }
4454
4455 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4456                                unsigned short port, void *val,
4457                                unsigned int count, bool in)
4458 {
4459         vcpu->arch.pio.port = port;
4460         vcpu->arch.pio.in = in;
4461         vcpu->arch.pio.count  = count;
4462         vcpu->arch.pio.size = size;
4463
4464         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4465                 vcpu->arch.pio.count = 0;
4466                 return 1;
4467         }
4468
4469         vcpu->run->exit_reason = KVM_EXIT_IO;
4470         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4471         vcpu->run->io.size = size;
4472         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4473         vcpu->run->io.count = count;
4474         vcpu->run->io.port = port;
4475
4476         return 0;
4477 }
4478
4479 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4480                                     int size, unsigned short port, void *val,
4481                                     unsigned int count)
4482 {
4483         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4484         int ret;
4485
4486         if (vcpu->arch.pio.count)
4487                 goto data_avail;
4488
4489         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4490         if (ret) {
4491 data_avail:
4492                 memcpy(val, vcpu->arch.pio_data, size * count);
4493                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4494                 vcpu->arch.pio.count = 0;
4495                 return 1;
4496         }
4497
4498         return 0;
4499 }
4500
4501 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4502                                      int size, unsigned short port,
4503                                      const void *val, unsigned int count)
4504 {
4505         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4506
4507         memcpy(vcpu->arch.pio_data, val, size * count);
4508         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4509         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4510 }
4511
4512 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4513 {
4514         return kvm_x86_ops->get_segment_base(vcpu, seg);
4515 }
4516
4517 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4518 {
4519         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4520 }
4521
4522 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4523 {
4524         if (!need_emulate_wbinvd(vcpu))
4525                 return X86EMUL_CONTINUE;
4526
4527         if (kvm_x86_ops->has_wbinvd_exit()) {
4528                 int cpu = get_cpu();
4529
4530                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4531                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4532                                 wbinvd_ipi, NULL, 1);
4533                 put_cpu();
4534                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4535         } else
4536                 wbinvd();
4537         return X86EMUL_CONTINUE;
4538 }
4539
4540 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4541 {
4542         kvm_x86_ops->skip_emulated_instruction(vcpu);
4543         return kvm_emulate_wbinvd_noskip(vcpu);
4544 }
4545 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4546
4547
4548
4549 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4550 {
4551         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4552 }
4553
4554 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4555                            unsigned long *dest)
4556 {
4557         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4558 }
4559
4560 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4561                            unsigned long value)
4562 {
4563
4564         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4565 }
4566
4567 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4568 {
4569         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4570 }
4571
4572 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4573 {
4574         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4575         unsigned long value;
4576
4577         switch (cr) {
4578         case 0:
4579                 value = kvm_read_cr0(vcpu);
4580                 break;
4581         case 2:
4582                 value = vcpu->arch.cr2;
4583                 break;
4584         case 3:
4585                 value = kvm_read_cr3(vcpu);
4586                 break;
4587         case 4:
4588                 value = kvm_read_cr4(vcpu);
4589                 break;
4590         case 8:
4591                 value = kvm_get_cr8(vcpu);
4592                 break;
4593         default:
4594                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4595                 return 0;
4596         }
4597
4598         return value;
4599 }
4600
4601 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4602 {
4603         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4604         int res = 0;
4605
4606         switch (cr) {
4607         case 0:
4608                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4609                 break;
4610         case 2:
4611                 vcpu->arch.cr2 = val;
4612                 break;
4613         case 3:
4614                 res = kvm_set_cr3(vcpu, val);
4615                 break;
4616         case 4:
4617                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4618                 break;
4619         case 8:
4620                 res = kvm_set_cr8(vcpu, val);
4621                 break;
4622         default:
4623                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4624                 res = -1;
4625         }
4626
4627         return res;
4628 }
4629
4630 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4631 {
4632         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4633 }
4634
4635 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4636 {
4637         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4638 }
4639
4640 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4641 {
4642         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4643 }
4644
4645 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4646 {
4647         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4648 }
4649
4650 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4651 {
4652         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4653 }
4654
4655 static unsigned long emulator_get_cached_segment_base(
4656         struct x86_emulate_ctxt *ctxt, int seg)
4657 {
4658         return get_segment_base(emul_to_vcpu(ctxt), seg);
4659 }
4660
4661 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4662                                  struct desc_struct *desc, u32 *base3,
4663                                  int seg)
4664 {
4665         struct kvm_segment var;
4666
4667         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4668         *selector = var.selector;
4669
4670         if (var.unusable) {
4671                 memset(desc, 0, sizeof(*desc));
4672                 return false;
4673         }
4674
4675         if (var.g)
4676                 var.limit >>= 12;
4677         set_desc_limit(desc, var.limit);
4678         set_desc_base(desc, (unsigned long)var.base);
4679 #ifdef CONFIG_X86_64
4680         if (base3)
4681                 *base3 = var.base >> 32;
4682 #endif
4683         desc->type = var.type;
4684         desc->s = var.s;
4685         desc->dpl = var.dpl;
4686         desc->p = var.present;
4687         desc->avl = var.avl;
4688         desc->l = var.l;
4689         desc->d = var.db;
4690         desc->g = var.g;
4691
4692         return true;
4693 }
4694
4695 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4696                                  struct desc_struct *desc, u32 base3,
4697                                  int seg)
4698 {
4699         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4700         struct kvm_segment var;
4701
4702         var.selector = selector;
4703         var.base = get_desc_base(desc);
4704 #ifdef CONFIG_X86_64
4705         var.base |= ((u64)base3) << 32;
4706 #endif
4707         var.limit = get_desc_limit(desc);
4708         if (desc->g)
4709                 var.limit = (var.limit << 12) | 0xfff;
4710         var.type = desc->type;
4711         var.dpl = desc->dpl;
4712         var.db = desc->d;
4713         var.s = desc->s;
4714         var.l = desc->l;
4715         var.g = desc->g;
4716         var.avl = desc->avl;
4717         var.present = desc->p;
4718         var.unusable = !var.present;
4719         var.padding = 0;
4720
4721         kvm_set_segment(vcpu, &var, seg);
4722         return;
4723 }
4724
4725 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4726                             u32 msr_index, u64 *pdata)
4727 {
4728         struct msr_data msr;
4729         int r;
4730
4731         msr.index = msr_index;
4732         msr.host_initiated = false;
4733         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4734         if (r)
4735                 return r;
4736
4737         *pdata = msr.data;
4738         return 0;
4739 }
4740
4741 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4742                             u32 msr_index, u64 data)
4743 {
4744         struct msr_data msr;
4745
4746         msr.data = data;
4747         msr.index = msr_index;
4748         msr.host_initiated = false;
4749         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4750 }
4751
4752 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4753 {
4754         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4755
4756         return vcpu->arch.smbase;
4757 }
4758
4759 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4760 {
4761         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4762
4763         vcpu->arch.smbase = smbase;
4764 }
4765
4766 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4767                               u32 pmc)
4768 {
4769         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4770 }
4771
4772 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4773                              u32 pmc, u64 *pdata)
4774 {
4775         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4776 }
4777
4778 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4779 {
4780         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4781 }
4782
4783 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4784 {
4785         preempt_disable();
4786         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4787         /*
4788          * CR0.TS may reference the host fpu state, not the guest fpu state,
4789          * so it may be clear at this point.
4790          */
4791         clts();
4792 }
4793
4794 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4795 {
4796         preempt_enable();
4797 }
4798
4799 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4800                               struct x86_instruction_info *info,
4801                               enum x86_intercept_stage stage)
4802 {
4803         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4804 }
4805
4806 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4807                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4808 {
4809         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4810 }
4811
4812 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4813 {
4814         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4815 }
4816
4817 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4818 {
4819         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4820 }
4821
4822 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4823 {
4824         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4825 }
4826
4827 static const struct x86_emulate_ops emulate_ops = {
4828         .read_gpr            = emulator_read_gpr,
4829         .write_gpr           = emulator_write_gpr,
4830         .read_std            = kvm_read_guest_virt_system,
4831         .write_std           = kvm_write_guest_virt_system,
4832         .fetch               = kvm_fetch_guest_virt,
4833         .read_emulated       = emulator_read_emulated,
4834         .write_emulated      = emulator_write_emulated,
4835         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4836         .invlpg              = emulator_invlpg,
4837         .pio_in_emulated     = emulator_pio_in_emulated,
4838         .pio_out_emulated    = emulator_pio_out_emulated,
4839         .get_segment         = emulator_get_segment,
4840         .set_segment         = emulator_set_segment,
4841         .get_cached_segment_base = emulator_get_cached_segment_base,
4842         .get_gdt             = emulator_get_gdt,
4843         .get_idt             = emulator_get_idt,
4844         .set_gdt             = emulator_set_gdt,
4845         .set_idt             = emulator_set_idt,
4846         .get_cr              = emulator_get_cr,
4847         .set_cr              = emulator_set_cr,
4848         .cpl                 = emulator_get_cpl,
4849         .get_dr              = emulator_get_dr,
4850         .set_dr              = emulator_set_dr,
4851         .get_smbase          = emulator_get_smbase,
4852         .set_smbase          = emulator_set_smbase,
4853         .set_msr             = emulator_set_msr,
4854         .get_msr             = emulator_get_msr,
4855         .check_pmc           = emulator_check_pmc,
4856         .read_pmc            = emulator_read_pmc,
4857         .halt                = emulator_halt,
4858         .wbinvd              = emulator_wbinvd,
4859         .fix_hypercall       = emulator_fix_hypercall,
4860         .get_fpu             = emulator_get_fpu,
4861         .put_fpu             = emulator_put_fpu,
4862         .intercept           = emulator_intercept,
4863         .get_cpuid           = emulator_get_cpuid,
4864         .set_nmi_mask        = emulator_set_nmi_mask,
4865 };
4866
4867 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4868 {
4869         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4870         /*
4871          * an sti; sti; sequence only disable interrupts for the first
4872          * instruction. So, if the last instruction, be it emulated or
4873          * not, left the system with the INT_STI flag enabled, it
4874          * means that the last instruction is an sti. We should not
4875          * leave the flag on in this case. The same goes for mov ss
4876          */
4877         if (int_shadow & mask)
4878                 mask = 0;
4879         if (unlikely(int_shadow || mask)) {
4880                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4881                 if (!mask)
4882                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4883         }
4884 }
4885
4886 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
4887 {
4888         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4889         if (ctxt->exception.vector == PF_VECTOR)
4890                 return kvm_propagate_fault(vcpu, &ctxt->exception);
4891
4892         if (ctxt->exception.error_code_valid)
4893                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4894                                       ctxt->exception.error_code);
4895         else
4896                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4897         return false;
4898 }
4899
4900 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4901 {
4902         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4903         int cs_db, cs_l;
4904
4905         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4906
4907         ctxt->eflags = kvm_get_rflags(vcpu);
4908         ctxt->eip = kvm_rip_read(vcpu);
4909         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4910                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4911                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
4912                      cs_db                              ? X86EMUL_MODE_PROT32 :
4913                                                           X86EMUL_MODE_PROT16;
4914         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
4915         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
4916         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
4917         ctxt->emul_flags = vcpu->arch.hflags;
4918
4919         init_decode_cache(ctxt);
4920         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4921 }
4922
4923 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4924 {
4925         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4926         int ret;
4927
4928         init_emulate_ctxt(vcpu);
4929
4930         ctxt->op_bytes = 2;
4931         ctxt->ad_bytes = 2;
4932         ctxt->_eip = ctxt->eip + inc_eip;
4933         ret = emulate_int_real(ctxt, irq);
4934
4935         if (ret != X86EMUL_CONTINUE)
4936                 return EMULATE_FAIL;
4937
4938         ctxt->eip = ctxt->_eip;
4939         kvm_rip_write(vcpu, ctxt->eip);
4940         kvm_set_rflags(vcpu, ctxt->eflags);
4941
4942         if (irq == NMI_VECTOR)
4943                 vcpu->arch.nmi_pending = 0;
4944         else
4945                 vcpu->arch.interrupt.pending = false;
4946
4947         return EMULATE_DONE;
4948 }
4949 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4950
4951 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4952 {
4953         int r = EMULATE_DONE;
4954
4955         ++vcpu->stat.insn_emulation_fail;
4956         trace_kvm_emulate_insn_failed(vcpu);
4957         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
4958                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4959                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4960                 vcpu->run->internal.ndata = 0;
4961                 r = EMULATE_FAIL;
4962         }
4963         kvm_queue_exception(vcpu, UD_VECTOR);
4964
4965         return r;
4966 }
4967
4968 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4969                                   bool write_fault_to_shadow_pgtable,
4970                                   int emulation_type)
4971 {
4972         gpa_t gpa = cr2;
4973         pfn_t pfn;
4974
4975         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4976                 return false;
4977
4978         if (!vcpu->arch.mmu.direct_map) {
4979                 /*
4980                  * Write permission should be allowed since only
4981                  * write access need to be emulated.
4982                  */
4983                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4984
4985                 /*
4986                  * If the mapping is invalid in guest, let cpu retry
4987                  * it to generate fault.
4988                  */
4989                 if (gpa == UNMAPPED_GVA)
4990                         return true;
4991         }
4992
4993         /*
4994          * Do not retry the unhandleable instruction if it faults on the
4995          * readonly host memory, otherwise it will goto a infinite loop:
4996          * retry instruction -> write #PF -> emulation fail -> retry
4997          * instruction -> ...
4998          */
4999         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5000
5001         /*
5002          * If the instruction failed on the error pfn, it can not be fixed,
5003          * report the error to userspace.
5004          */
5005         if (is_error_noslot_pfn(pfn))
5006                 return false;
5007
5008         kvm_release_pfn_clean(pfn);
5009
5010         /* The instructions are well-emulated on direct mmu. */
5011         if (vcpu->arch.mmu.direct_map) {
5012                 unsigned int indirect_shadow_pages;
5013
5014                 spin_lock(&vcpu->kvm->mmu_lock);
5015                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5016                 spin_unlock(&vcpu->kvm->mmu_lock);
5017
5018                 if (indirect_shadow_pages)
5019                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5020
5021                 return true;
5022         }
5023
5024         /*
5025          * if emulation was due to access to shadowed page table
5026          * and it failed try to unshadow page and re-enter the
5027          * guest to let CPU execute the instruction.
5028          */
5029         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5030
5031         /*
5032          * If the access faults on its page table, it can not
5033          * be fixed by unprotecting shadow page and it should
5034          * be reported to userspace.
5035          */
5036         return !write_fault_to_shadow_pgtable;
5037 }
5038
5039 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5040                               unsigned long cr2,  int emulation_type)
5041 {
5042         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5043         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5044
5045         last_retry_eip = vcpu->arch.last_retry_eip;
5046         last_retry_addr = vcpu->arch.last_retry_addr;
5047
5048         /*
5049          * If the emulation is caused by #PF and it is non-page_table
5050          * writing instruction, it means the VM-EXIT is caused by shadow
5051          * page protected, we can zap the shadow page and retry this
5052          * instruction directly.
5053          *
5054          * Note: if the guest uses a non-page-table modifying instruction
5055          * on the PDE that points to the instruction, then we will unmap
5056          * the instruction and go to an infinite loop. So, we cache the
5057          * last retried eip and the last fault address, if we meet the eip
5058          * and the address again, we can break out of the potential infinite
5059          * loop.
5060          */
5061         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5062
5063         if (!(emulation_type & EMULTYPE_RETRY))
5064                 return false;
5065
5066         if (x86_page_table_writing_insn(ctxt))
5067                 return false;
5068
5069         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5070                 return false;
5071
5072         vcpu->arch.last_retry_eip = ctxt->eip;
5073         vcpu->arch.last_retry_addr = cr2;
5074
5075         if (!vcpu->arch.mmu.direct_map)
5076                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5077
5078         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5079
5080         return true;
5081 }
5082
5083 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5084 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5085
5086 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5087 {
5088         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5089                 /* This is a good place to trace that we are exiting SMM.  */
5090                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5091
5092                 if (unlikely(vcpu->arch.smi_pending)) {
5093                         kvm_make_request(KVM_REQ_SMI, vcpu);
5094                         vcpu->arch.smi_pending = 0;
5095                 } else {
5096                         /* Process a latched INIT, if any.  */
5097                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5098                 }
5099         }
5100
5101         kvm_mmu_reset_context(vcpu);
5102 }
5103
5104 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5105 {
5106         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5107
5108         vcpu->arch.hflags = emul_flags;
5109
5110         if (changed & HF_SMM_MASK)
5111                 kvm_smm_changed(vcpu);
5112 }
5113
5114 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5115                                 unsigned long *db)
5116 {
5117         u32 dr6 = 0;
5118         int i;
5119         u32 enable, rwlen;
5120
5121         enable = dr7;
5122         rwlen = dr7 >> 16;
5123         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5124                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5125                         dr6 |= (1 << i);
5126         return dr6;
5127 }
5128
5129 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5130 {
5131         struct kvm_run *kvm_run = vcpu->run;
5132
5133         /*
5134          * rflags is the old, "raw" value of the flags.  The new value has
5135          * not been saved yet.
5136          *
5137          * This is correct even for TF set by the guest, because "the
5138          * processor will not generate this exception after the instruction
5139          * that sets the TF flag".
5140          */
5141         if (unlikely(rflags & X86_EFLAGS_TF)) {
5142                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5143                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5144                                                   DR6_RTM;
5145                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5146                         kvm_run->debug.arch.exception = DB_VECTOR;
5147                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5148                         *r = EMULATE_USER_EXIT;
5149                 } else {
5150                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5151                         /*
5152                          * "Certain debug exceptions may clear bit 0-3.  The
5153                          * remaining contents of the DR6 register are never
5154                          * cleared by the processor".
5155                          */
5156                         vcpu->arch.dr6 &= ~15;
5157                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5158                         kvm_queue_exception(vcpu, DB_VECTOR);
5159                 }
5160         }
5161 }
5162
5163 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5164 {
5165         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5166             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5167                 struct kvm_run *kvm_run = vcpu->run;
5168                 unsigned long eip = kvm_get_linear_rip(vcpu);
5169                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5170                                            vcpu->arch.guest_debug_dr7,
5171                                            vcpu->arch.eff_db);
5172
5173                 if (dr6 != 0) {
5174                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5175                         kvm_run->debug.arch.pc = eip;
5176                         kvm_run->debug.arch.exception = DB_VECTOR;
5177                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5178                         *r = EMULATE_USER_EXIT;
5179                         return true;
5180                 }
5181         }
5182
5183         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5184             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5185                 unsigned long eip = kvm_get_linear_rip(vcpu);
5186                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5187                                            vcpu->arch.dr7,
5188                                            vcpu->arch.db);
5189
5190                 if (dr6 != 0) {
5191                         vcpu->arch.dr6 &= ~15;
5192                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5193                         kvm_queue_exception(vcpu, DB_VECTOR);
5194                         *r = EMULATE_DONE;
5195                         return true;
5196                 }
5197         }
5198
5199         return false;
5200 }
5201
5202 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5203                             unsigned long cr2,
5204                             int emulation_type,
5205                             void *insn,
5206                             int insn_len)
5207 {
5208         int r;
5209         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5210         bool writeback = true;
5211         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5212
5213         /*
5214          * Clear write_fault_to_shadow_pgtable here to ensure it is
5215          * never reused.
5216          */
5217         vcpu->arch.write_fault_to_shadow_pgtable = false;
5218         kvm_clear_exception_queue(vcpu);
5219
5220         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5221                 init_emulate_ctxt(vcpu);
5222
5223                 /*
5224                  * We will reenter on the same instruction since
5225                  * we do not set complete_userspace_io.  This does not
5226                  * handle watchpoints yet, those would be handled in
5227                  * the emulate_ops.
5228                  */
5229                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5230                         return r;
5231
5232                 ctxt->interruptibility = 0;
5233                 ctxt->have_exception = false;
5234                 ctxt->exception.vector = -1;
5235                 ctxt->perm_ok = false;
5236
5237                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5238
5239                 r = x86_decode_insn(ctxt, insn, insn_len);
5240
5241                 trace_kvm_emulate_insn_start(vcpu);
5242                 ++vcpu->stat.insn_emulation;
5243                 if (r != EMULATION_OK)  {
5244                         if (emulation_type & EMULTYPE_TRAP_UD)
5245                                 return EMULATE_FAIL;
5246                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5247                                                 emulation_type))
5248                                 return EMULATE_DONE;
5249                         if (emulation_type & EMULTYPE_SKIP)
5250                                 return EMULATE_FAIL;
5251                         return handle_emulation_failure(vcpu);
5252                 }
5253         }
5254
5255         if (emulation_type & EMULTYPE_SKIP) {
5256                 kvm_rip_write(vcpu, ctxt->_eip);
5257                 if (ctxt->eflags & X86_EFLAGS_RF)
5258                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5259                 return EMULATE_DONE;
5260         }
5261
5262         if (retry_instruction(ctxt, cr2, emulation_type))
5263                 return EMULATE_DONE;
5264
5265         /* this is needed for vmware backdoor interface to work since it
5266            changes registers values  during IO operation */
5267         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5268                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5269                 emulator_invalidate_register_cache(ctxt);
5270         }
5271
5272 restart:
5273         r = x86_emulate_insn(ctxt);
5274
5275         if (r == EMULATION_INTERCEPTED)
5276                 return EMULATE_DONE;
5277
5278         if (r == EMULATION_FAILED) {
5279                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5280                                         emulation_type))
5281                         return EMULATE_DONE;
5282
5283                 return handle_emulation_failure(vcpu);
5284         }
5285
5286         if (ctxt->have_exception) {
5287                 r = EMULATE_DONE;
5288                 if (inject_emulated_exception(vcpu))
5289                         return r;
5290         } else if (vcpu->arch.pio.count) {
5291                 if (!vcpu->arch.pio.in) {
5292                         /* FIXME: return into emulator if single-stepping.  */
5293                         vcpu->arch.pio.count = 0;
5294                 } else {
5295                         writeback = false;
5296                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5297                 }
5298                 r = EMULATE_USER_EXIT;
5299         } else if (vcpu->mmio_needed) {
5300                 if (!vcpu->mmio_is_write)
5301                         writeback = false;
5302                 r = EMULATE_USER_EXIT;
5303                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5304         } else if (r == EMULATION_RESTART)
5305                 goto restart;
5306         else
5307                 r = EMULATE_DONE;
5308
5309         if (writeback) {
5310                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5311                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5312                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5313                 if (vcpu->arch.hflags != ctxt->emul_flags)
5314                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5315                 kvm_rip_write(vcpu, ctxt->eip);
5316                 if (r == EMULATE_DONE)
5317                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5318                 if (!ctxt->have_exception ||
5319                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5320                         __kvm_set_rflags(vcpu, ctxt->eflags);
5321
5322                 /*
5323                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5324                  * do nothing, and it will be requested again as soon as
5325                  * the shadow expires.  But we still need to check here,
5326                  * because POPF has no interrupt shadow.
5327                  */
5328                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5329                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5330         } else
5331                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5332
5333         return r;
5334 }
5335 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5336
5337 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5338 {
5339         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5340         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5341                                             size, port, &val, 1);
5342         /* do not return to emulator after return from userspace */
5343         vcpu->arch.pio.count = 0;
5344         return ret;
5345 }
5346 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5347
5348 static void tsc_bad(void *info)
5349 {
5350         __this_cpu_write(cpu_tsc_khz, 0);
5351 }
5352
5353 static void tsc_khz_changed(void *data)
5354 {
5355         struct cpufreq_freqs *freq = data;
5356         unsigned long khz = 0;
5357
5358         if (data)
5359                 khz = freq->new;
5360         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5361                 khz = cpufreq_quick_get(raw_smp_processor_id());
5362         if (!khz)
5363                 khz = tsc_khz;
5364         __this_cpu_write(cpu_tsc_khz, khz);
5365 }
5366
5367 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5368                                      void *data)
5369 {
5370         struct cpufreq_freqs *freq = data;
5371         struct kvm *kvm;
5372         struct kvm_vcpu *vcpu;
5373         int i, send_ipi = 0;
5374
5375         /*
5376          * We allow guests to temporarily run on slowing clocks,
5377          * provided we notify them after, or to run on accelerating
5378          * clocks, provided we notify them before.  Thus time never
5379          * goes backwards.
5380          *
5381          * However, we have a problem.  We can't atomically update
5382          * the frequency of a given CPU from this function; it is
5383          * merely a notifier, which can be called from any CPU.
5384          * Changing the TSC frequency at arbitrary points in time
5385          * requires a recomputation of local variables related to
5386          * the TSC for each VCPU.  We must flag these local variables
5387          * to be updated and be sure the update takes place with the
5388          * new frequency before any guests proceed.
5389          *
5390          * Unfortunately, the combination of hotplug CPU and frequency
5391          * change creates an intractable locking scenario; the order
5392          * of when these callouts happen is undefined with respect to
5393          * CPU hotplug, and they can race with each other.  As such,
5394          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5395          * undefined; you can actually have a CPU frequency change take
5396          * place in between the computation of X and the setting of the
5397          * variable.  To protect against this problem, all updates of
5398          * the per_cpu tsc_khz variable are done in an interrupt
5399          * protected IPI, and all callers wishing to update the value
5400          * must wait for a synchronous IPI to complete (which is trivial
5401          * if the caller is on the CPU already).  This establishes the
5402          * necessary total order on variable updates.
5403          *
5404          * Note that because a guest time update may take place
5405          * anytime after the setting of the VCPU's request bit, the
5406          * correct TSC value must be set before the request.  However,
5407          * to ensure the update actually makes it to any guest which
5408          * starts running in hardware virtualization between the set
5409          * and the acquisition of the spinlock, we must also ping the
5410          * CPU after setting the request bit.
5411          *
5412          */
5413
5414         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5415                 return 0;
5416         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5417                 return 0;
5418
5419         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5420
5421         spin_lock(&kvm_lock);
5422         list_for_each_entry(kvm, &vm_list, vm_list) {
5423                 kvm_for_each_vcpu(i, vcpu, kvm) {
5424                         if (vcpu->cpu != freq->cpu)
5425                                 continue;
5426                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5427                         if (vcpu->cpu != smp_processor_id())
5428                                 send_ipi = 1;
5429                 }
5430         }
5431         spin_unlock(&kvm_lock);
5432
5433         if (freq->old < freq->new && send_ipi) {
5434                 /*
5435                  * We upscale the frequency.  Must make the guest
5436                  * doesn't see old kvmclock values while running with
5437                  * the new frequency, otherwise we risk the guest sees
5438                  * time go backwards.
5439                  *
5440                  * In case we update the frequency for another cpu
5441                  * (which might be in guest context) send an interrupt
5442                  * to kick the cpu out of guest context.  Next time
5443                  * guest context is entered kvmclock will be updated,
5444                  * so the guest will not see stale values.
5445                  */
5446                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5447         }
5448         return 0;
5449 }
5450
5451 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5452         .notifier_call  = kvmclock_cpufreq_notifier
5453 };
5454
5455 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5456                                         unsigned long action, void *hcpu)
5457 {
5458         unsigned int cpu = (unsigned long)hcpu;
5459
5460         switch (action) {
5461                 case CPU_ONLINE:
5462                 case CPU_DOWN_FAILED:
5463                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5464                         break;
5465                 case CPU_DOWN_PREPARE:
5466                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5467                         break;
5468         }
5469         return NOTIFY_OK;
5470 }
5471
5472 static struct notifier_block kvmclock_cpu_notifier_block = {
5473         .notifier_call  = kvmclock_cpu_notifier,
5474         .priority = -INT_MAX
5475 };
5476
5477 static void kvm_timer_init(void)
5478 {
5479         int cpu;
5480
5481         max_tsc_khz = tsc_khz;
5482
5483         cpu_notifier_register_begin();
5484         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5485 #ifdef CONFIG_CPU_FREQ
5486                 struct cpufreq_policy policy;
5487                 memset(&policy, 0, sizeof(policy));
5488                 cpu = get_cpu();
5489                 cpufreq_get_policy(&policy, cpu);
5490                 if (policy.cpuinfo.max_freq)
5491                         max_tsc_khz = policy.cpuinfo.max_freq;
5492                 put_cpu();
5493 #endif
5494                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5495                                           CPUFREQ_TRANSITION_NOTIFIER);
5496         }
5497         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5498         for_each_online_cpu(cpu)
5499                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5500
5501         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5502         cpu_notifier_register_done();
5503
5504 }
5505
5506 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5507
5508 int kvm_is_in_guest(void)
5509 {
5510         return __this_cpu_read(current_vcpu) != NULL;
5511 }
5512
5513 static int kvm_is_user_mode(void)
5514 {
5515         int user_mode = 3;
5516
5517         if (__this_cpu_read(current_vcpu))
5518                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5519
5520         return user_mode != 0;
5521 }
5522
5523 static unsigned long kvm_get_guest_ip(void)
5524 {
5525         unsigned long ip = 0;
5526
5527         if (__this_cpu_read(current_vcpu))
5528                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5529
5530         return ip;
5531 }
5532
5533 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5534         .is_in_guest            = kvm_is_in_guest,
5535         .is_user_mode           = kvm_is_user_mode,
5536         .get_guest_ip           = kvm_get_guest_ip,
5537 };
5538
5539 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5540 {
5541         __this_cpu_write(current_vcpu, vcpu);
5542 }
5543 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5544
5545 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5546 {
5547         __this_cpu_write(current_vcpu, NULL);
5548 }
5549 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5550
5551 static void kvm_set_mmio_spte_mask(void)
5552 {
5553         u64 mask;
5554         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5555
5556         /*
5557          * Set the reserved bits and the present bit of an paging-structure
5558          * entry to generate page fault with PFER.RSV = 1.
5559          */
5560          /* Mask the reserved physical address bits. */
5561         mask = rsvd_bits(maxphyaddr, 51);
5562
5563         /* Bit 62 is always reserved for 32bit host. */
5564         mask |= 0x3ull << 62;
5565
5566         /* Set the present bit. */
5567         mask |= 1ull;
5568
5569 #ifdef CONFIG_X86_64
5570         /*
5571          * If reserved bit is not supported, clear the present bit to disable
5572          * mmio page fault.
5573          */
5574         if (maxphyaddr == 52)
5575                 mask &= ~1ull;
5576 #endif
5577
5578         kvm_mmu_set_mmio_spte_mask(mask);
5579 }
5580
5581 #ifdef CONFIG_X86_64
5582 static void pvclock_gtod_update_fn(struct work_struct *work)
5583 {
5584         struct kvm *kvm;
5585
5586         struct kvm_vcpu *vcpu;
5587         int i;
5588
5589         spin_lock(&kvm_lock);
5590         list_for_each_entry(kvm, &vm_list, vm_list)
5591                 kvm_for_each_vcpu(i, vcpu, kvm)
5592                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5593         atomic_set(&kvm_guest_has_master_clock, 0);
5594         spin_unlock(&kvm_lock);
5595 }
5596
5597 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5598
5599 /*
5600  * Notification about pvclock gtod data update.
5601  */
5602 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5603                                void *priv)
5604 {
5605         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5606         struct timekeeper *tk = priv;
5607
5608         update_pvclock_gtod(tk);
5609
5610         /* disable master clock if host does not trust, or does not
5611          * use, TSC clocksource
5612          */
5613         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5614             atomic_read(&kvm_guest_has_master_clock) != 0)
5615                 queue_work(system_long_wq, &pvclock_gtod_work);
5616
5617         return 0;
5618 }
5619
5620 static struct notifier_block pvclock_gtod_notifier = {
5621         .notifier_call = pvclock_gtod_notify,
5622 };
5623 #endif
5624
5625 int kvm_arch_init(void *opaque)
5626 {
5627         int r;
5628         struct kvm_x86_ops *ops = opaque;
5629
5630         if (kvm_x86_ops) {
5631                 printk(KERN_ERR "kvm: already loaded the other module\n");
5632                 r = -EEXIST;
5633                 goto out;
5634         }
5635
5636         if (!ops->cpu_has_kvm_support()) {
5637                 printk(KERN_ERR "kvm: no hardware support\n");
5638                 r = -EOPNOTSUPP;
5639                 goto out;
5640         }
5641         if (ops->disabled_by_bios()) {
5642                 printk(KERN_ERR "kvm: disabled by bios\n");
5643                 r = -EOPNOTSUPP;
5644                 goto out;
5645         }
5646
5647         r = -ENOMEM;
5648         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5649         if (!shared_msrs) {
5650                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5651                 goto out;
5652         }
5653
5654         r = kvm_mmu_module_init();
5655         if (r)
5656                 goto out_free_percpu;
5657
5658         kvm_set_mmio_spte_mask();
5659
5660         kvm_x86_ops = ops;
5661
5662         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5663                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5664
5665         kvm_timer_init();
5666
5667         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5668
5669         if (cpu_has_xsave)
5670                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5671
5672         kvm_lapic_init();
5673 #ifdef CONFIG_X86_64
5674         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5675 #endif
5676
5677         return 0;
5678
5679 out_free_percpu:
5680         free_percpu(shared_msrs);
5681 out:
5682         return r;
5683 }
5684
5685 void kvm_arch_exit(void)
5686 {
5687         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5688
5689         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5690                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5691                                             CPUFREQ_TRANSITION_NOTIFIER);
5692         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5693 #ifdef CONFIG_X86_64
5694         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5695 #endif
5696         kvm_x86_ops = NULL;
5697         kvm_mmu_module_exit();
5698         free_percpu(shared_msrs);
5699 }
5700
5701 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5702 {
5703         ++vcpu->stat.halt_exits;
5704         if (lapic_in_kernel(vcpu)) {
5705                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5706                 return 1;
5707         } else {
5708                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5709                 return 0;
5710         }
5711 }
5712 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5713
5714 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5715 {
5716         kvm_x86_ops->skip_emulated_instruction(vcpu);
5717         return kvm_vcpu_halt(vcpu);
5718 }
5719 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5720
5721 /*
5722  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5723  *
5724  * @apicid - apicid of vcpu to be kicked.
5725  */
5726 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5727 {
5728         struct kvm_lapic_irq lapic_irq;
5729
5730         lapic_irq.shorthand = 0;
5731         lapic_irq.dest_mode = 0;
5732         lapic_irq.dest_id = apicid;
5733         lapic_irq.msi_redir_hint = false;
5734
5735         lapic_irq.delivery_mode = APIC_DM_REMRD;
5736         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5737 }
5738
5739 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5740 {
5741         unsigned long nr, a0, a1, a2, a3, ret;
5742         int op_64_bit, r = 1;
5743
5744         kvm_x86_ops->skip_emulated_instruction(vcpu);
5745
5746         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5747                 return kvm_hv_hypercall(vcpu);
5748
5749         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5750         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5751         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5752         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5753         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5754
5755         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5756
5757         op_64_bit = is_64_bit_mode(vcpu);
5758         if (!op_64_bit) {
5759                 nr &= 0xFFFFFFFF;
5760                 a0 &= 0xFFFFFFFF;
5761                 a1 &= 0xFFFFFFFF;
5762                 a2 &= 0xFFFFFFFF;
5763                 a3 &= 0xFFFFFFFF;
5764         }
5765
5766         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5767                 ret = -KVM_EPERM;
5768                 goto out;
5769         }
5770
5771         switch (nr) {
5772         case KVM_HC_VAPIC_POLL_IRQ:
5773                 ret = 0;
5774                 break;
5775         case KVM_HC_KICK_CPU:
5776                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5777                 ret = 0;
5778                 break;
5779         default:
5780                 ret = -KVM_ENOSYS;
5781                 break;
5782         }
5783 out:
5784         if (!op_64_bit)
5785                 ret = (u32)ret;
5786         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5787         ++vcpu->stat.hypercalls;
5788         return r;
5789 }
5790 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5791
5792 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5793 {
5794         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5795         char instruction[3];
5796         unsigned long rip = kvm_rip_read(vcpu);
5797
5798         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5799
5800         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5801 }
5802
5803 /*
5804  * Check if userspace requested an interrupt window, and that the
5805  * interrupt window is open.
5806  *
5807  * No need to exit to userspace if we already have an interrupt queued.
5808  */
5809 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5810 {
5811         if (!vcpu->run->request_interrupt_window || pic_in_kernel(vcpu->kvm))
5812                 return false;
5813
5814         if (kvm_cpu_has_interrupt(vcpu))
5815                 return false;
5816
5817         return (irqchip_split(vcpu->kvm)
5818                 ? kvm_apic_accept_pic_intr(vcpu)
5819                 : kvm_arch_interrupt_allowed(vcpu));
5820 }
5821
5822 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5823 {
5824         struct kvm_run *kvm_run = vcpu->run;
5825
5826         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5827         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5828         kvm_run->cr8 = kvm_get_cr8(vcpu);
5829         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5830         if (!irqchip_in_kernel(vcpu->kvm))
5831                 kvm_run->ready_for_interrupt_injection =
5832                         kvm_arch_interrupt_allowed(vcpu) &&
5833                         !kvm_cpu_has_interrupt(vcpu) &&
5834                         !kvm_event_needs_reinjection(vcpu);
5835         else if (!pic_in_kernel(vcpu->kvm))
5836                 kvm_run->ready_for_interrupt_injection =
5837                         kvm_apic_accept_pic_intr(vcpu) &&
5838                         !kvm_cpu_has_interrupt(vcpu);
5839         else
5840                 kvm_run->ready_for_interrupt_injection = 1;
5841 }
5842
5843 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5844 {
5845         int max_irr, tpr;
5846
5847         if (!kvm_x86_ops->update_cr8_intercept)
5848                 return;
5849
5850         if (!vcpu->arch.apic)
5851                 return;
5852
5853         if (!vcpu->arch.apic->vapic_addr)
5854                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5855         else
5856                 max_irr = -1;
5857
5858         if (max_irr != -1)
5859                 max_irr >>= 4;
5860
5861         tpr = kvm_lapic_get_cr8(vcpu);
5862
5863         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5864 }
5865
5866 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5867 {
5868         int r;
5869
5870         /* try to reinject previous events if any */
5871         if (vcpu->arch.exception.pending) {
5872                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5873                                         vcpu->arch.exception.has_error_code,
5874                                         vcpu->arch.exception.error_code);
5875
5876                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5877                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5878                                              X86_EFLAGS_RF);
5879
5880                 if (vcpu->arch.exception.nr == DB_VECTOR &&
5881                     (vcpu->arch.dr7 & DR7_GD)) {
5882                         vcpu->arch.dr7 &= ~DR7_GD;
5883                         kvm_update_dr7(vcpu);
5884                 }
5885
5886                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5887                                           vcpu->arch.exception.has_error_code,
5888                                           vcpu->arch.exception.error_code,
5889                                           vcpu->arch.exception.reinject);
5890                 return 0;
5891         }
5892
5893         if (vcpu->arch.nmi_injected) {
5894                 kvm_x86_ops->set_nmi(vcpu);
5895                 return 0;
5896         }
5897
5898         if (vcpu->arch.interrupt.pending) {
5899                 kvm_x86_ops->set_irq(vcpu);
5900                 return 0;
5901         }
5902
5903         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5904                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5905                 if (r != 0)
5906                         return r;
5907         }
5908
5909         /* try to inject new event if pending */
5910         if (vcpu->arch.nmi_pending) {
5911                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5912                         --vcpu->arch.nmi_pending;
5913                         vcpu->arch.nmi_injected = true;
5914                         kvm_x86_ops->set_nmi(vcpu);
5915                 }
5916         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5917                 /*
5918                  * Because interrupts can be injected asynchronously, we are
5919                  * calling check_nested_events again here to avoid a race condition.
5920                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5921                  * proposal and current concerns.  Perhaps we should be setting
5922                  * KVM_REQ_EVENT only on certain events and not unconditionally?
5923                  */
5924                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5925                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5926                         if (r != 0)
5927                                 return r;
5928                 }
5929                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5930                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5931                                             false);
5932                         kvm_x86_ops->set_irq(vcpu);
5933                 }
5934         }
5935         return 0;
5936 }
5937
5938 static void process_nmi(struct kvm_vcpu *vcpu)
5939 {
5940         unsigned limit = 2;
5941
5942         /*
5943          * x86 is limited to one NMI running, and one NMI pending after it.
5944          * If an NMI is already in progress, limit further NMIs to just one.
5945          * Otherwise, allow two (and we'll inject the first one immediately).
5946          */
5947         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5948                 limit = 1;
5949
5950         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5951         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5952         kvm_make_request(KVM_REQ_EVENT, vcpu);
5953 }
5954
5955 #define put_smstate(type, buf, offset, val)                       \
5956         *(type *)((buf) + (offset) - 0x7e00) = val
5957
5958 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
5959 {
5960         u32 flags = 0;
5961         flags |= seg->g       << 23;
5962         flags |= seg->db      << 22;
5963         flags |= seg->l       << 21;
5964         flags |= seg->avl     << 20;
5965         flags |= seg->present << 15;
5966         flags |= seg->dpl     << 13;
5967         flags |= seg->s       << 12;
5968         flags |= seg->type    << 8;
5969         return flags;
5970 }
5971
5972 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
5973 {
5974         struct kvm_segment seg;
5975         int offset;
5976
5977         kvm_get_segment(vcpu, &seg, n);
5978         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
5979
5980         if (n < 3)
5981                 offset = 0x7f84 + n * 12;
5982         else
5983                 offset = 0x7f2c + (n - 3) * 12;
5984
5985         put_smstate(u32, buf, offset + 8, seg.base);
5986         put_smstate(u32, buf, offset + 4, seg.limit);
5987         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
5988 }
5989
5990 #ifdef CONFIG_X86_64
5991 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
5992 {
5993         struct kvm_segment seg;
5994         int offset;
5995         u16 flags;
5996
5997         kvm_get_segment(vcpu, &seg, n);
5998         offset = 0x7e00 + n * 16;
5999
6000         flags = process_smi_get_segment_flags(&seg) >> 8;
6001         put_smstate(u16, buf, offset, seg.selector);
6002         put_smstate(u16, buf, offset + 2, flags);
6003         put_smstate(u32, buf, offset + 4, seg.limit);
6004         put_smstate(u64, buf, offset + 8, seg.base);
6005 }
6006 #endif
6007
6008 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6009 {
6010         struct desc_ptr dt;
6011         struct kvm_segment seg;
6012         unsigned long val;
6013         int i;
6014
6015         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6016         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6017         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6018         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6019
6020         for (i = 0; i < 8; i++)
6021                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6022
6023         kvm_get_dr(vcpu, 6, &val);
6024         put_smstate(u32, buf, 0x7fcc, (u32)val);
6025         kvm_get_dr(vcpu, 7, &val);
6026         put_smstate(u32, buf, 0x7fc8, (u32)val);
6027
6028         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6029         put_smstate(u32, buf, 0x7fc4, seg.selector);
6030         put_smstate(u32, buf, 0x7f64, seg.base);
6031         put_smstate(u32, buf, 0x7f60, seg.limit);
6032         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6033
6034         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6035         put_smstate(u32, buf, 0x7fc0, seg.selector);
6036         put_smstate(u32, buf, 0x7f80, seg.base);
6037         put_smstate(u32, buf, 0x7f7c, seg.limit);
6038         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6039
6040         kvm_x86_ops->get_gdt(vcpu, &dt);
6041         put_smstate(u32, buf, 0x7f74, dt.address);
6042         put_smstate(u32, buf, 0x7f70, dt.size);
6043
6044         kvm_x86_ops->get_idt(vcpu, &dt);
6045         put_smstate(u32, buf, 0x7f58, dt.address);
6046         put_smstate(u32, buf, 0x7f54, dt.size);
6047
6048         for (i = 0; i < 6; i++)
6049                 process_smi_save_seg_32(vcpu, buf, i);
6050
6051         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6052
6053         /* revision id */
6054         put_smstate(u32, buf, 0x7efc, 0x00020000);
6055         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6056 }
6057
6058 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6059 {
6060 #ifdef CONFIG_X86_64
6061         struct desc_ptr dt;
6062         struct kvm_segment seg;
6063         unsigned long val;
6064         int i;
6065
6066         for (i = 0; i < 16; i++)
6067                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6068
6069         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6070         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6071
6072         kvm_get_dr(vcpu, 6, &val);
6073         put_smstate(u64, buf, 0x7f68, val);
6074         kvm_get_dr(vcpu, 7, &val);
6075         put_smstate(u64, buf, 0x7f60, val);
6076
6077         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6078         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6079         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6080
6081         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6082
6083         /* revision id */
6084         put_smstate(u32, buf, 0x7efc, 0x00020064);
6085
6086         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6087
6088         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6089         put_smstate(u16, buf, 0x7e90, seg.selector);
6090         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6091         put_smstate(u32, buf, 0x7e94, seg.limit);
6092         put_smstate(u64, buf, 0x7e98, seg.base);
6093
6094         kvm_x86_ops->get_idt(vcpu, &dt);
6095         put_smstate(u32, buf, 0x7e84, dt.size);
6096         put_smstate(u64, buf, 0x7e88, dt.address);
6097
6098         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6099         put_smstate(u16, buf, 0x7e70, seg.selector);
6100         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6101         put_smstate(u32, buf, 0x7e74, seg.limit);
6102         put_smstate(u64, buf, 0x7e78, seg.base);
6103
6104         kvm_x86_ops->get_gdt(vcpu, &dt);
6105         put_smstate(u32, buf, 0x7e64, dt.size);
6106         put_smstate(u64, buf, 0x7e68, dt.address);
6107
6108         for (i = 0; i < 6; i++)
6109                 process_smi_save_seg_64(vcpu, buf, i);
6110 #else
6111         WARN_ON_ONCE(1);
6112 #endif
6113 }
6114
6115 static void process_smi(struct kvm_vcpu *vcpu)
6116 {
6117         struct kvm_segment cs, ds;
6118         struct desc_ptr dt;
6119         char buf[512];
6120         u32 cr0;
6121
6122         if (is_smm(vcpu)) {
6123                 vcpu->arch.smi_pending = true;
6124                 return;
6125         }
6126
6127         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6128         vcpu->arch.hflags |= HF_SMM_MASK;
6129         memset(buf, 0, 512);
6130         if (guest_cpuid_has_longmode(vcpu))
6131                 process_smi_save_state_64(vcpu, buf);
6132         else
6133                 process_smi_save_state_32(vcpu, buf);
6134
6135         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6136
6137         if (kvm_x86_ops->get_nmi_mask(vcpu))
6138                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6139         else
6140                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6141
6142         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6143         kvm_rip_write(vcpu, 0x8000);
6144
6145         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6146         kvm_x86_ops->set_cr0(vcpu, cr0);
6147         vcpu->arch.cr0 = cr0;
6148
6149         kvm_x86_ops->set_cr4(vcpu, 0);
6150
6151         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6152         dt.address = dt.size = 0;
6153         kvm_x86_ops->set_idt(vcpu, &dt);
6154
6155         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6156
6157         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6158         cs.base = vcpu->arch.smbase;
6159
6160         ds.selector = 0;
6161         ds.base = 0;
6162
6163         cs.limit    = ds.limit = 0xffffffff;
6164         cs.type     = ds.type = 0x3;
6165         cs.dpl      = ds.dpl = 0;
6166         cs.db       = ds.db = 0;
6167         cs.s        = ds.s = 1;
6168         cs.l        = ds.l = 0;
6169         cs.g        = ds.g = 1;
6170         cs.avl      = ds.avl = 0;
6171         cs.present  = ds.present = 1;
6172         cs.unusable = ds.unusable = 0;
6173         cs.padding  = ds.padding = 0;
6174
6175         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6176         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6177         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6178         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6179         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6180         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6181
6182         if (guest_cpuid_has_longmode(vcpu))
6183                 kvm_x86_ops->set_efer(vcpu, 0);
6184
6185         kvm_update_cpuid(vcpu);
6186         kvm_mmu_reset_context(vcpu);
6187 }
6188
6189 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6190 {
6191         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6192                 return;
6193
6194         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6195
6196         if (irqchip_split(vcpu->kvm))
6197                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.eoi_exit_bitmap);
6198         else
6199                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6200         kvm_x86_ops->load_eoi_exitmap(vcpu);
6201 }
6202
6203 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6204 {
6205         ++vcpu->stat.tlb_flush;
6206         kvm_x86_ops->tlb_flush(vcpu);
6207 }
6208
6209 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6210 {
6211         struct page *page = NULL;
6212
6213         if (!lapic_in_kernel(vcpu))
6214                 return;
6215
6216         if (!kvm_x86_ops->set_apic_access_page_addr)
6217                 return;
6218
6219         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6220         if (is_error_page(page))
6221                 return;
6222         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6223
6224         /*
6225          * Do not pin apic access page in memory, the MMU notifier
6226          * will call us again if it is migrated or swapped out.
6227          */
6228         put_page(page);
6229 }
6230 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6231
6232 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6233                                            unsigned long address)
6234 {
6235         /*
6236          * The physical address of apic access page is stored in the VMCS.
6237          * Update it when it becomes invalid.
6238          */
6239         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6240                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6241 }
6242
6243 /*
6244  * Returns 1 to let vcpu_run() continue the guest execution loop without
6245  * exiting to the userspace.  Otherwise, the value will be returned to the
6246  * userspace.
6247  */
6248 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6249 {
6250         int r;
6251         bool req_int_win = !lapic_in_kernel(vcpu) &&
6252                 vcpu->run->request_interrupt_window;
6253         bool req_immediate_exit = false;
6254
6255         if (vcpu->requests) {
6256                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6257                         kvm_mmu_unload(vcpu);
6258                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6259                         __kvm_migrate_timers(vcpu);
6260                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6261                         kvm_gen_update_masterclock(vcpu->kvm);
6262                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6263                         kvm_gen_kvmclock_update(vcpu);
6264                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6265                         r = kvm_guest_time_update(vcpu);
6266                         if (unlikely(r))
6267                                 goto out;
6268                 }
6269                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6270                         kvm_mmu_sync_roots(vcpu);
6271                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6272                         kvm_vcpu_flush_tlb(vcpu);
6273                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6274                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6275                         r = 0;
6276                         goto out;
6277                 }
6278                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6279                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6280                         r = 0;
6281                         goto out;
6282                 }
6283                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6284                         vcpu->fpu_active = 0;
6285                         kvm_x86_ops->fpu_deactivate(vcpu);
6286                 }
6287                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6288                         /* Page is swapped out. Do synthetic halt */
6289                         vcpu->arch.apf.halted = true;
6290                         r = 1;
6291                         goto out;
6292                 }
6293                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6294                         record_steal_time(vcpu);
6295                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6296                         process_smi(vcpu);
6297                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6298                         process_nmi(vcpu);
6299                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6300                         kvm_pmu_handle_event(vcpu);
6301                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6302                         kvm_pmu_deliver_pmi(vcpu);
6303                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6304                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6305                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6306                                      (void *) vcpu->arch.eoi_exit_bitmap)) {
6307                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6308                                 vcpu->run->eoi.vector =
6309                                                 vcpu->arch.pending_ioapic_eoi;
6310                                 r = 0;
6311                                 goto out;
6312                         }
6313                 }
6314                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6315                         vcpu_scan_ioapic(vcpu);
6316                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6317                         kvm_vcpu_reload_apic_access_page(vcpu);
6318                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6319                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6320                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6321                         r = 0;
6322                         goto out;
6323                 }
6324         }
6325
6326         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6327                 kvm_apic_accept_events(vcpu);
6328                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6329                         r = 1;
6330                         goto out;
6331                 }
6332
6333                 if (inject_pending_event(vcpu, req_int_win) != 0)
6334                         req_immediate_exit = true;
6335                 /* enable NMI/IRQ window open exits if needed */
6336                 else if (vcpu->arch.nmi_pending)
6337                         kvm_x86_ops->enable_nmi_window(vcpu);
6338                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6339                         kvm_x86_ops->enable_irq_window(vcpu);
6340
6341                 if (kvm_lapic_enabled(vcpu)) {
6342                         /*
6343                          * Update architecture specific hints for APIC
6344                          * virtual interrupt delivery.
6345                          */
6346                         if (kvm_x86_ops->hwapic_irr_update)
6347                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6348                                         kvm_lapic_find_highest_irr(vcpu));
6349                         update_cr8_intercept(vcpu);
6350                         kvm_lapic_sync_to_vapic(vcpu);
6351                 }
6352         }
6353
6354         r = kvm_mmu_reload(vcpu);
6355         if (unlikely(r)) {
6356                 goto cancel_injection;
6357         }
6358
6359         preempt_disable();
6360
6361         kvm_x86_ops->prepare_guest_switch(vcpu);
6362         if (vcpu->fpu_active)
6363                 kvm_load_guest_fpu(vcpu);
6364         kvm_load_guest_xcr0(vcpu);
6365
6366         vcpu->mode = IN_GUEST_MODE;
6367
6368         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6369
6370         /* We should set ->mode before check ->requests,
6371          * see the comment in make_all_cpus_request.
6372          */
6373         smp_mb__after_srcu_read_unlock();
6374
6375         local_irq_disable();
6376
6377         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6378             || need_resched() || signal_pending(current)) {
6379                 vcpu->mode = OUTSIDE_GUEST_MODE;
6380                 smp_wmb();
6381                 local_irq_enable();
6382                 preempt_enable();
6383                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6384                 r = 1;
6385                 goto cancel_injection;
6386         }
6387
6388         if (req_immediate_exit)
6389                 smp_send_reschedule(vcpu->cpu);
6390
6391         __kvm_guest_enter();
6392
6393         if (unlikely(vcpu->arch.switch_db_regs)) {
6394                 set_debugreg(0, 7);
6395                 set_debugreg(vcpu->arch.eff_db[0], 0);
6396                 set_debugreg(vcpu->arch.eff_db[1], 1);
6397                 set_debugreg(vcpu->arch.eff_db[2], 2);
6398                 set_debugreg(vcpu->arch.eff_db[3], 3);
6399                 set_debugreg(vcpu->arch.dr6, 6);
6400                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6401         }
6402
6403         trace_kvm_entry(vcpu->vcpu_id);
6404         wait_lapic_expire(vcpu);
6405         kvm_x86_ops->run(vcpu);
6406
6407         /*
6408          * Do this here before restoring debug registers on the host.  And
6409          * since we do this before handling the vmexit, a DR access vmexit
6410          * can (a) read the correct value of the debug registers, (b) set
6411          * KVM_DEBUGREG_WONT_EXIT again.
6412          */
6413         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6414                 int i;
6415
6416                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6417                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6418                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6419                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6420         }
6421
6422         /*
6423          * If the guest has used debug registers, at least dr7
6424          * will be disabled while returning to the host.
6425          * If we don't have active breakpoints in the host, we don't
6426          * care about the messed up debug address registers. But if
6427          * we have some of them active, restore the old state.
6428          */
6429         if (hw_breakpoint_active())
6430                 hw_breakpoint_restore();
6431
6432         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6433                                                            rdtsc());
6434
6435         vcpu->mode = OUTSIDE_GUEST_MODE;
6436         smp_wmb();
6437
6438         /* Interrupt is enabled by handle_external_intr() */
6439         kvm_x86_ops->handle_external_intr(vcpu);
6440
6441         ++vcpu->stat.exits;
6442
6443         /*
6444          * We must have an instruction between local_irq_enable() and
6445          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6446          * the interrupt shadow.  The stat.exits increment will do nicely.
6447          * But we need to prevent reordering, hence this barrier():
6448          */
6449         barrier();
6450
6451         kvm_guest_exit();
6452
6453         preempt_enable();
6454
6455         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6456
6457         /*
6458          * Profile KVM exit RIPs:
6459          */
6460         if (unlikely(prof_on == KVM_PROFILING)) {
6461                 unsigned long rip = kvm_rip_read(vcpu);
6462                 profile_hit(KVM_PROFILING, (void *)rip);
6463         }
6464
6465         if (unlikely(vcpu->arch.tsc_always_catchup))
6466                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6467
6468         if (vcpu->arch.apic_attention)
6469                 kvm_lapic_sync_from_vapic(vcpu);
6470
6471         r = kvm_x86_ops->handle_exit(vcpu);
6472         return r;
6473
6474 cancel_injection:
6475         kvm_x86_ops->cancel_injection(vcpu);
6476         if (unlikely(vcpu->arch.apic_attention))
6477                 kvm_lapic_sync_from_vapic(vcpu);
6478 out:
6479         return r;
6480 }
6481
6482 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6483 {
6484         if (!kvm_arch_vcpu_runnable(vcpu)) {
6485                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6486                 kvm_vcpu_block(vcpu);
6487                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6488                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6489                         return 1;
6490         }
6491
6492         kvm_apic_accept_events(vcpu);
6493         switch(vcpu->arch.mp_state) {
6494         case KVM_MP_STATE_HALTED:
6495                 vcpu->arch.pv.pv_unhalted = false;
6496                 vcpu->arch.mp_state =
6497                         KVM_MP_STATE_RUNNABLE;
6498         case KVM_MP_STATE_RUNNABLE:
6499                 vcpu->arch.apf.halted = false;
6500                 break;
6501         case KVM_MP_STATE_INIT_RECEIVED:
6502                 break;
6503         default:
6504                 return -EINTR;
6505                 break;
6506         }
6507         return 1;
6508 }
6509
6510 static int vcpu_run(struct kvm_vcpu *vcpu)
6511 {
6512         int r;
6513         struct kvm *kvm = vcpu->kvm;
6514
6515         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6516
6517         for (;;) {
6518                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6519                     !vcpu->arch.apf.halted)
6520                         r = vcpu_enter_guest(vcpu);
6521                 else
6522                         r = vcpu_block(kvm, vcpu);
6523                 if (r <= 0)
6524                         break;
6525
6526                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6527                 if (kvm_cpu_has_pending_timer(vcpu))
6528                         kvm_inject_pending_timer_irqs(vcpu);
6529
6530                 if (dm_request_for_irq_injection(vcpu)) {
6531                         r = 0;
6532                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6533                         ++vcpu->stat.request_irq_exits;
6534                         break;
6535                 }
6536
6537                 kvm_check_async_pf_completion(vcpu);
6538
6539                 if (signal_pending(current)) {
6540                         r = -EINTR;
6541                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6542                         ++vcpu->stat.signal_exits;
6543                         break;
6544                 }
6545                 if (need_resched()) {
6546                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6547                         cond_resched();
6548                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6549                 }
6550         }
6551
6552         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6553
6554         return r;
6555 }
6556
6557 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6558 {
6559         int r;
6560         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6561         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6562         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6563         if (r != EMULATE_DONE)
6564                 return 0;
6565         return 1;
6566 }
6567
6568 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6569 {
6570         BUG_ON(!vcpu->arch.pio.count);
6571
6572         return complete_emulated_io(vcpu);
6573 }
6574
6575 /*
6576  * Implements the following, as a state machine:
6577  *
6578  * read:
6579  *   for each fragment
6580  *     for each mmio piece in the fragment
6581  *       write gpa, len
6582  *       exit
6583  *       copy data
6584  *   execute insn
6585  *
6586  * write:
6587  *   for each fragment
6588  *     for each mmio piece in the fragment
6589  *       write gpa, len
6590  *       copy data
6591  *       exit
6592  */
6593 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6594 {
6595         struct kvm_run *run = vcpu->run;
6596         struct kvm_mmio_fragment *frag;
6597         unsigned len;
6598
6599         BUG_ON(!vcpu->mmio_needed);
6600
6601         /* Complete previous fragment */
6602         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6603         len = min(8u, frag->len);
6604         if (!vcpu->mmio_is_write)
6605                 memcpy(frag->data, run->mmio.data, len);
6606
6607         if (frag->len <= 8) {
6608                 /* Switch to the next fragment. */
6609                 frag++;
6610                 vcpu->mmio_cur_fragment++;
6611         } else {
6612                 /* Go forward to the next mmio piece. */
6613                 frag->data += len;
6614                 frag->gpa += len;
6615                 frag->len -= len;
6616         }
6617
6618         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6619                 vcpu->mmio_needed = 0;
6620
6621                 /* FIXME: return into emulator if single-stepping.  */
6622                 if (vcpu->mmio_is_write)
6623                         return 1;
6624                 vcpu->mmio_read_completed = 1;
6625                 return complete_emulated_io(vcpu);
6626         }
6627
6628         run->exit_reason = KVM_EXIT_MMIO;
6629         run->mmio.phys_addr = frag->gpa;
6630         if (vcpu->mmio_is_write)
6631                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6632         run->mmio.len = min(8u, frag->len);
6633         run->mmio.is_write = vcpu->mmio_is_write;
6634         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6635         return 0;
6636 }
6637
6638
6639 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6640 {
6641         struct fpu *fpu = &current->thread.fpu;
6642         int r;
6643         sigset_t sigsaved;
6644
6645         fpu__activate_curr(fpu);
6646
6647         if (vcpu->sigset_active)
6648                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6649
6650         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6651                 kvm_vcpu_block(vcpu);
6652                 kvm_apic_accept_events(vcpu);
6653                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6654                 r = -EAGAIN;
6655                 goto out;
6656         }
6657
6658         /* re-sync apic's tpr */
6659         if (!lapic_in_kernel(vcpu)) {
6660                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6661                         r = -EINVAL;
6662                         goto out;
6663                 }
6664         }
6665
6666         if (unlikely(vcpu->arch.complete_userspace_io)) {
6667                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6668                 vcpu->arch.complete_userspace_io = NULL;
6669                 r = cui(vcpu);
6670                 if (r <= 0)
6671                         goto out;
6672         } else
6673                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6674
6675         r = vcpu_run(vcpu);
6676
6677 out:
6678         post_kvm_run_save(vcpu);
6679         if (vcpu->sigset_active)
6680                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6681
6682         return r;
6683 }
6684
6685 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6686 {
6687         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6688                 /*
6689                  * We are here if userspace calls get_regs() in the middle of
6690                  * instruction emulation. Registers state needs to be copied
6691                  * back from emulation context to vcpu. Userspace shouldn't do
6692                  * that usually, but some bad designed PV devices (vmware
6693                  * backdoor interface) need this to work
6694                  */
6695                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6696                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6697         }
6698         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6699         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6700         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6701         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6702         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6703         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6704         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6705         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6706 #ifdef CONFIG_X86_64
6707         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6708         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6709         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6710         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6711         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6712         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6713         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6714         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6715 #endif
6716
6717         regs->rip = kvm_rip_read(vcpu);
6718         regs->rflags = kvm_get_rflags(vcpu);
6719
6720         return 0;
6721 }
6722
6723 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6724 {
6725         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6726         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6727
6728         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6729         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6730         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6731         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6732         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6733         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6734         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6735         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6736 #ifdef CONFIG_X86_64
6737         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6738         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6739         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6740         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6741         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6742         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6743         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6744         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6745 #endif
6746
6747         kvm_rip_write(vcpu, regs->rip);
6748         kvm_set_rflags(vcpu, regs->rflags);
6749
6750         vcpu->arch.exception.pending = false;
6751
6752         kvm_make_request(KVM_REQ_EVENT, vcpu);
6753
6754         return 0;
6755 }
6756
6757 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6758 {
6759         struct kvm_segment cs;
6760
6761         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6762         *db = cs.db;
6763         *l = cs.l;
6764 }
6765 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6766
6767 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6768                                   struct kvm_sregs *sregs)
6769 {
6770         struct desc_ptr dt;
6771
6772         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6773         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6774         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6775         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6776         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6777         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6778
6779         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6780         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6781
6782         kvm_x86_ops->get_idt(vcpu, &dt);
6783         sregs->idt.limit = dt.size;
6784         sregs->idt.base = dt.address;
6785         kvm_x86_ops->get_gdt(vcpu, &dt);
6786         sregs->gdt.limit = dt.size;
6787         sregs->gdt.base = dt.address;
6788
6789         sregs->cr0 = kvm_read_cr0(vcpu);
6790         sregs->cr2 = vcpu->arch.cr2;
6791         sregs->cr3 = kvm_read_cr3(vcpu);
6792         sregs->cr4 = kvm_read_cr4(vcpu);
6793         sregs->cr8 = kvm_get_cr8(vcpu);
6794         sregs->efer = vcpu->arch.efer;
6795         sregs->apic_base = kvm_get_apic_base(vcpu);
6796
6797         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6798
6799         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6800                 set_bit(vcpu->arch.interrupt.nr,
6801                         (unsigned long *)sregs->interrupt_bitmap);
6802
6803         return 0;
6804 }
6805
6806 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6807                                     struct kvm_mp_state *mp_state)
6808 {
6809         kvm_apic_accept_events(vcpu);
6810         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6811                                         vcpu->arch.pv.pv_unhalted)
6812                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6813         else
6814                 mp_state->mp_state = vcpu->arch.mp_state;
6815
6816         return 0;
6817 }
6818
6819 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6820                                     struct kvm_mp_state *mp_state)
6821 {
6822         if (!kvm_vcpu_has_lapic(vcpu) &&
6823             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6824                 return -EINVAL;
6825
6826         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6827                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6828                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6829         } else
6830                 vcpu->arch.mp_state = mp_state->mp_state;
6831         kvm_make_request(KVM_REQ_EVENT, vcpu);
6832         return 0;
6833 }
6834
6835 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6836                     int reason, bool has_error_code, u32 error_code)
6837 {
6838         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6839         int ret;
6840
6841         init_emulate_ctxt(vcpu);
6842
6843         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6844                                    has_error_code, error_code);
6845
6846         if (ret)
6847                 return EMULATE_FAIL;
6848
6849         kvm_rip_write(vcpu, ctxt->eip);
6850         kvm_set_rflags(vcpu, ctxt->eflags);
6851         kvm_make_request(KVM_REQ_EVENT, vcpu);
6852         return EMULATE_DONE;
6853 }
6854 EXPORT_SYMBOL_GPL(kvm_task_switch);
6855
6856 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6857                                   struct kvm_sregs *sregs)
6858 {
6859         struct msr_data apic_base_msr;
6860         int mmu_reset_needed = 0;
6861         int pending_vec, max_bits, idx;
6862         struct desc_ptr dt;
6863
6864         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6865                 return -EINVAL;
6866
6867         dt.size = sregs->idt.limit;
6868         dt.address = sregs->idt.base;
6869         kvm_x86_ops->set_idt(vcpu, &dt);
6870         dt.size = sregs->gdt.limit;
6871         dt.address = sregs->gdt.base;
6872         kvm_x86_ops->set_gdt(vcpu, &dt);
6873
6874         vcpu->arch.cr2 = sregs->cr2;
6875         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6876         vcpu->arch.cr3 = sregs->cr3;
6877         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6878
6879         kvm_set_cr8(vcpu, sregs->cr8);
6880
6881         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6882         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6883         apic_base_msr.data = sregs->apic_base;
6884         apic_base_msr.host_initiated = true;
6885         kvm_set_apic_base(vcpu, &apic_base_msr);
6886
6887         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6888         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6889         vcpu->arch.cr0 = sregs->cr0;
6890
6891         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6892         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6893         if (sregs->cr4 & X86_CR4_OSXSAVE)
6894                 kvm_update_cpuid(vcpu);
6895
6896         idx = srcu_read_lock(&vcpu->kvm->srcu);
6897         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6898                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6899                 mmu_reset_needed = 1;
6900         }
6901         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6902
6903         if (mmu_reset_needed)
6904                 kvm_mmu_reset_context(vcpu);
6905
6906         max_bits = KVM_NR_INTERRUPTS;
6907         pending_vec = find_first_bit(
6908                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6909         if (pending_vec < max_bits) {
6910                 kvm_queue_interrupt(vcpu, pending_vec, false);
6911                 pr_debug("Set back pending irq %d\n", pending_vec);
6912         }
6913
6914         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6915         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6916         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6917         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6918         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6919         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6920
6921         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6922         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6923
6924         update_cr8_intercept(vcpu);
6925
6926         /* Older userspace won't unhalt the vcpu on reset. */
6927         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6928             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6929             !is_protmode(vcpu))
6930                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6931
6932         kvm_make_request(KVM_REQ_EVENT, vcpu);
6933
6934         return 0;
6935 }
6936
6937 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6938                                         struct kvm_guest_debug *dbg)
6939 {
6940         unsigned long rflags;
6941         int i, r;
6942
6943         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6944                 r = -EBUSY;
6945                 if (vcpu->arch.exception.pending)
6946                         goto out;
6947                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6948                         kvm_queue_exception(vcpu, DB_VECTOR);
6949                 else
6950                         kvm_queue_exception(vcpu, BP_VECTOR);
6951         }
6952
6953         /*
6954          * Read rflags as long as potentially injected trace flags are still
6955          * filtered out.
6956          */
6957         rflags = kvm_get_rflags(vcpu);
6958
6959         vcpu->guest_debug = dbg->control;
6960         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6961                 vcpu->guest_debug = 0;
6962
6963         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6964                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6965                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6966                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6967         } else {
6968                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6969                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6970         }
6971         kvm_update_dr7(vcpu);
6972
6973         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6974                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6975                         get_segment_base(vcpu, VCPU_SREG_CS);
6976
6977         /*
6978          * Trigger an rflags update that will inject or remove the trace
6979          * flags.
6980          */
6981         kvm_set_rflags(vcpu, rflags);
6982
6983         kvm_x86_ops->update_db_bp_intercept(vcpu);
6984
6985         r = 0;
6986
6987 out:
6988
6989         return r;
6990 }
6991
6992 /*
6993  * Translate a guest virtual address to a guest physical address.
6994  */
6995 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6996                                     struct kvm_translation *tr)
6997 {
6998         unsigned long vaddr = tr->linear_address;
6999         gpa_t gpa;
7000         int idx;
7001
7002         idx = srcu_read_lock(&vcpu->kvm->srcu);
7003         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7004         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7005         tr->physical_address = gpa;
7006         tr->valid = gpa != UNMAPPED_GVA;
7007         tr->writeable = 1;
7008         tr->usermode = 0;
7009
7010         return 0;
7011 }
7012
7013 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7014 {
7015         struct fxregs_state *fxsave =
7016                         &vcpu->arch.guest_fpu.state.fxsave;
7017
7018         memcpy(fpu->fpr, fxsave->st_space, 128);
7019         fpu->fcw = fxsave->cwd;
7020         fpu->fsw = fxsave->swd;
7021         fpu->ftwx = fxsave->twd;
7022         fpu->last_opcode = fxsave->fop;
7023         fpu->last_ip = fxsave->rip;
7024         fpu->last_dp = fxsave->rdp;
7025         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7026
7027         return 0;
7028 }
7029
7030 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7031 {
7032         struct fxregs_state *fxsave =
7033                         &vcpu->arch.guest_fpu.state.fxsave;
7034
7035         memcpy(fxsave->st_space, fpu->fpr, 128);
7036         fxsave->cwd = fpu->fcw;
7037         fxsave->swd = fpu->fsw;
7038         fxsave->twd = fpu->ftwx;
7039         fxsave->fop = fpu->last_opcode;
7040         fxsave->rip = fpu->last_ip;
7041         fxsave->rdp = fpu->last_dp;
7042         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7043
7044         return 0;
7045 }
7046
7047 static void fx_init(struct kvm_vcpu *vcpu)
7048 {
7049         fpstate_init(&vcpu->arch.guest_fpu.state);
7050         if (cpu_has_xsaves)
7051                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7052                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7053
7054         /*
7055          * Ensure guest xcr0 is valid for loading
7056          */
7057         vcpu->arch.xcr0 = XSTATE_FP;
7058
7059         vcpu->arch.cr0 |= X86_CR0_ET;
7060 }
7061
7062 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7063 {
7064         if (vcpu->guest_fpu_loaded)
7065                 return;
7066
7067         /*
7068          * Restore all possible states in the guest,
7069          * and assume host would use all available bits.
7070          * Guest xcr0 would be loaded later.
7071          */
7072         kvm_put_guest_xcr0(vcpu);
7073         vcpu->guest_fpu_loaded = 1;
7074         __kernel_fpu_begin();
7075         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7076         trace_kvm_fpu(1);
7077 }
7078
7079 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7080 {
7081         kvm_put_guest_xcr0(vcpu);
7082
7083         if (!vcpu->guest_fpu_loaded) {
7084                 vcpu->fpu_counter = 0;
7085                 return;
7086         }
7087
7088         vcpu->guest_fpu_loaded = 0;
7089         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7090         __kernel_fpu_end();
7091         ++vcpu->stat.fpu_reload;
7092         /*
7093          * If using eager FPU mode, or if the guest is a frequent user
7094          * of the FPU, just leave the FPU active for next time.
7095          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7096          * the FPU in bursts will revert to loading it on demand.
7097          */
7098         if (!vcpu->arch.eager_fpu) {
7099                 if (++vcpu->fpu_counter < 5)
7100                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7101         }
7102         trace_kvm_fpu(0);
7103 }
7104
7105 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7106 {
7107         kvmclock_reset(vcpu);
7108
7109         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7110         kvm_x86_ops->vcpu_free(vcpu);
7111 }
7112
7113 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7114                                                 unsigned int id)
7115 {
7116         struct kvm_vcpu *vcpu;
7117
7118         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7119                 printk_once(KERN_WARNING
7120                 "kvm: SMP vm created on host with unstable TSC; "
7121                 "guest TSC will not be reliable\n");
7122
7123         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7124
7125         return vcpu;
7126 }
7127
7128 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7129 {
7130         int r;
7131
7132         kvm_vcpu_mtrr_init(vcpu);
7133         r = vcpu_load(vcpu);
7134         if (r)
7135                 return r;
7136         kvm_vcpu_reset(vcpu, false);
7137         kvm_mmu_setup(vcpu);
7138         vcpu_put(vcpu);
7139         return r;
7140 }
7141
7142 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7143 {
7144         struct msr_data msr;
7145         struct kvm *kvm = vcpu->kvm;
7146
7147         if (vcpu_load(vcpu))
7148                 return;
7149         msr.data = 0x0;
7150         msr.index = MSR_IA32_TSC;
7151         msr.host_initiated = true;
7152         kvm_write_tsc(vcpu, &msr);
7153         vcpu_put(vcpu);
7154
7155         if (!kvmclock_periodic_sync)
7156                 return;
7157
7158         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7159                                         KVMCLOCK_SYNC_PERIOD);
7160 }
7161
7162 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7163 {
7164         int r;
7165         vcpu->arch.apf.msr_val = 0;
7166
7167         r = vcpu_load(vcpu);
7168         BUG_ON(r);
7169         kvm_mmu_unload(vcpu);
7170         vcpu_put(vcpu);
7171
7172         kvm_x86_ops->vcpu_free(vcpu);
7173 }
7174
7175 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7176 {
7177         vcpu->arch.hflags = 0;
7178
7179         atomic_set(&vcpu->arch.nmi_queued, 0);
7180         vcpu->arch.nmi_pending = 0;
7181         vcpu->arch.nmi_injected = false;
7182         kvm_clear_interrupt_queue(vcpu);
7183         kvm_clear_exception_queue(vcpu);
7184
7185         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7186         kvm_update_dr0123(vcpu);
7187         vcpu->arch.dr6 = DR6_INIT;
7188         kvm_update_dr6(vcpu);
7189         vcpu->arch.dr7 = DR7_FIXED_1;
7190         kvm_update_dr7(vcpu);
7191
7192         vcpu->arch.cr2 = 0;
7193
7194         kvm_make_request(KVM_REQ_EVENT, vcpu);
7195         vcpu->arch.apf.msr_val = 0;
7196         vcpu->arch.st.msr_val = 0;
7197
7198         kvmclock_reset(vcpu);
7199
7200         kvm_clear_async_pf_completion_queue(vcpu);
7201         kvm_async_pf_hash_reset(vcpu);
7202         vcpu->arch.apf.halted = false;
7203
7204         if (!init_event) {
7205                 kvm_pmu_reset(vcpu);
7206                 vcpu->arch.smbase = 0x30000;
7207         }
7208
7209         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7210         vcpu->arch.regs_avail = ~0;
7211         vcpu->arch.regs_dirty = ~0;
7212
7213         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7214 }
7215
7216 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7217 {
7218         struct kvm_segment cs;
7219
7220         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7221         cs.selector = vector << 8;
7222         cs.base = vector << 12;
7223         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7224         kvm_rip_write(vcpu, 0);
7225 }
7226
7227 int kvm_arch_hardware_enable(void)
7228 {
7229         struct kvm *kvm;
7230         struct kvm_vcpu *vcpu;
7231         int i;
7232         int ret;
7233         u64 local_tsc;
7234         u64 max_tsc = 0;
7235         bool stable, backwards_tsc = false;
7236
7237         kvm_shared_msr_cpu_online();
7238         ret = kvm_x86_ops->hardware_enable();
7239         if (ret != 0)
7240                 return ret;
7241
7242         local_tsc = rdtsc();
7243         stable = !check_tsc_unstable();
7244         list_for_each_entry(kvm, &vm_list, vm_list) {
7245                 kvm_for_each_vcpu(i, vcpu, kvm) {
7246                         if (!stable && vcpu->cpu == smp_processor_id())
7247                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7248                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7249                                 backwards_tsc = true;
7250                                 if (vcpu->arch.last_host_tsc > max_tsc)
7251                                         max_tsc = vcpu->arch.last_host_tsc;
7252                         }
7253                 }
7254         }
7255
7256         /*
7257          * Sometimes, even reliable TSCs go backwards.  This happens on
7258          * platforms that reset TSC during suspend or hibernate actions, but
7259          * maintain synchronization.  We must compensate.  Fortunately, we can
7260          * detect that condition here, which happens early in CPU bringup,
7261          * before any KVM threads can be running.  Unfortunately, we can't
7262          * bring the TSCs fully up to date with real time, as we aren't yet far
7263          * enough into CPU bringup that we know how much real time has actually
7264          * elapsed; our helper function, get_kernel_ns() will be using boot
7265          * variables that haven't been updated yet.
7266          *
7267          * So we simply find the maximum observed TSC above, then record the
7268          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7269          * the adjustment will be applied.  Note that we accumulate
7270          * adjustments, in case multiple suspend cycles happen before some VCPU
7271          * gets a chance to run again.  In the event that no KVM threads get a
7272          * chance to run, we will miss the entire elapsed period, as we'll have
7273          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7274          * loose cycle time.  This isn't too big a deal, since the loss will be
7275          * uniform across all VCPUs (not to mention the scenario is extremely
7276          * unlikely). It is possible that a second hibernate recovery happens
7277          * much faster than a first, causing the observed TSC here to be
7278          * smaller; this would require additional padding adjustment, which is
7279          * why we set last_host_tsc to the local tsc observed here.
7280          *
7281          * N.B. - this code below runs only on platforms with reliable TSC,
7282          * as that is the only way backwards_tsc is set above.  Also note
7283          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7284          * have the same delta_cyc adjustment applied if backwards_tsc
7285          * is detected.  Note further, this adjustment is only done once,
7286          * as we reset last_host_tsc on all VCPUs to stop this from being
7287          * called multiple times (one for each physical CPU bringup).
7288          *
7289          * Platforms with unreliable TSCs don't have to deal with this, they
7290          * will be compensated by the logic in vcpu_load, which sets the TSC to
7291          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7292          * guarantee that they stay in perfect synchronization.
7293          */
7294         if (backwards_tsc) {
7295                 u64 delta_cyc = max_tsc - local_tsc;
7296                 backwards_tsc_observed = true;
7297                 list_for_each_entry(kvm, &vm_list, vm_list) {
7298                         kvm_for_each_vcpu(i, vcpu, kvm) {
7299                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7300                                 vcpu->arch.last_host_tsc = local_tsc;
7301                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7302                         }
7303
7304                         /*
7305                          * We have to disable TSC offset matching.. if you were
7306                          * booting a VM while issuing an S4 host suspend....
7307                          * you may have some problem.  Solving this issue is
7308                          * left as an exercise to the reader.
7309                          */
7310                         kvm->arch.last_tsc_nsec = 0;
7311                         kvm->arch.last_tsc_write = 0;
7312                 }
7313
7314         }
7315         return 0;
7316 }
7317
7318 void kvm_arch_hardware_disable(void)
7319 {
7320         kvm_x86_ops->hardware_disable();
7321         drop_user_return_notifiers();
7322 }
7323
7324 int kvm_arch_hardware_setup(void)
7325 {
7326         int r;
7327
7328         r = kvm_x86_ops->hardware_setup();
7329         if (r != 0)
7330                 return r;
7331
7332         kvm_init_msr_list();
7333         return 0;
7334 }
7335
7336 void kvm_arch_hardware_unsetup(void)
7337 {
7338         kvm_x86_ops->hardware_unsetup();
7339 }
7340
7341 void kvm_arch_check_processor_compat(void *rtn)
7342 {
7343         kvm_x86_ops->check_processor_compatibility(rtn);
7344 }
7345
7346 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7347 {
7348         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7349 }
7350 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7351
7352 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7353 {
7354         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7355 }
7356
7357 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7358 {
7359         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7360 }
7361
7362 struct static_key kvm_no_apic_vcpu __read_mostly;
7363
7364 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7365 {
7366         struct page *page;
7367         struct kvm *kvm;
7368         int r;
7369
7370         BUG_ON(vcpu->kvm == NULL);
7371         kvm = vcpu->kvm;
7372
7373         vcpu->arch.pv.pv_unhalted = false;
7374         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7375         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7376                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7377         else
7378                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7379
7380         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7381         if (!page) {
7382                 r = -ENOMEM;
7383                 goto fail;
7384         }
7385         vcpu->arch.pio_data = page_address(page);
7386
7387         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7388
7389         r = kvm_mmu_create(vcpu);
7390         if (r < 0)
7391                 goto fail_free_pio_data;
7392
7393         if (irqchip_in_kernel(kvm)) {
7394                 r = kvm_create_lapic(vcpu);
7395                 if (r < 0)
7396                         goto fail_mmu_destroy;
7397         } else
7398                 static_key_slow_inc(&kvm_no_apic_vcpu);
7399
7400         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7401                                        GFP_KERNEL);
7402         if (!vcpu->arch.mce_banks) {
7403                 r = -ENOMEM;
7404                 goto fail_free_lapic;
7405         }
7406         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7407
7408         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7409                 r = -ENOMEM;
7410                 goto fail_free_mce_banks;
7411         }
7412
7413         fx_init(vcpu);
7414
7415         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7416         vcpu->arch.pv_time_enabled = false;
7417
7418         vcpu->arch.guest_supported_xcr0 = 0;
7419         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7420
7421         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7422
7423         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7424
7425         kvm_async_pf_hash_reset(vcpu);
7426         kvm_pmu_init(vcpu);
7427
7428         vcpu->arch.pending_external_vector = -1;
7429
7430         return 0;
7431
7432 fail_free_mce_banks:
7433         kfree(vcpu->arch.mce_banks);
7434 fail_free_lapic:
7435         kvm_free_lapic(vcpu);
7436 fail_mmu_destroy:
7437         kvm_mmu_destroy(vcpu);
7438 fail_free_pio_data:
7439         free_page((unsigned long)vcpu->arch.pio_data);
7440 fail:
7441         return r;
7442 }
7443
7444 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7445 {
7446         int idx;
7447
7448         kvm_pmu_destroy(vcpu);
7449         kfree(vcpu->arch.mce_banks);
7450         kvm_free_lapic(vcpu);
7451         idx = srcu_read_lock(&vcpu->kvm->srcu);
7452         kvm_mmu_destroy(vcpu);
7453         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7454         free_page((unsigned long)vcpu->arch.pio_data);
7455         if (!lapic_in_kernel(vcpu))
7456                 static_key_slow_dec(&kvm_no_apic_vcpu);
7457 }
7458
7459 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7460 {
7461         kvm_x86_ops->sched_in(vcpu, cpu);
7462 }
7463
7464 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7465 {
7466         if (type)
7467                 return -EINVAL;
7468
7469         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7470         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7471         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7472         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7473         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7474
7475         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7476         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7477         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7478         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7479                 &kvm->arch.irq_sources_bitmap);
7480
7481         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7482         mutex_init(&kvm->arch.apic_map_lock);
7483         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7484
7485         pvclock_update_vm_gtod_copy(kvm);
7486
7487         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7488         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7489
7490         return 0;
7491 }
7492
7493 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7494 {
7495         int r;
7496         r = vcpu_load(vcpu);
7497         BUG_ON(r);
7498         kvm_mmu_unload(vcpu);
7499         vcpu_put(vcpu);
7500 }
7501
7502 static void kvm_free_vcpus(struct kvm *kvm)
7503 {
7504         unsigned int i;
7505         struct kvm_vcpu *vcpu;
7506
7507         /*
7508          * Unpin any mmu pages first.
7509          */
7510         kvm_for_each_vcpu(i, vcpu, kvm) {
7511                 kvm_clear_async_pf_completion_queue(vcpu);
7512                 kvm_unload_vcpu_mmu(vcpu);
7513         }
7514         kvm_for_each_vcpu(i, vcpu, kvm)
7515                 kvm_arch_vcpu_free(vcpu);
7516
7517         mutex_lock(&kvm->lock);
7518         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7519                 kvm->vcpus[i] = NULL;
7520
7521         atomic_set(&kvm->online_vcpus, 0);
7522         mutex_unlock(&kvm->lock);
7523 }
7524
7525 void kvm_arch_sync_events(struct kvm *kvm)
7526 {
7527         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7528         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7529         kvm_free_all_assigned_devices(kvm);
7530         kvm_free_pit(kvm);
7531 }
7532
7533 int __x86_set_memory_region(struct kvm *kvm,
7534                             const struct kvm_userspace_memory_region *mem)
7535 {
7536         int i, r;
7537
7538         /* Called with kvm->slots_lock held.  */
7539         BUG_ON(mem->slot >= KVM_MEM_SLOTS_NUM);
7540
7541         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7542                 struct kvm_userspace_memory_region m = *mem;
7543
7544                 m.slot |= i << 16;
7545                 r = __kvm_set_memory_region(kvm, &m);
7546                 if (r < 0)
7547                         return r;
7548         }
7549
7550         return 0;
7551 }
7552 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7553
7554 int x86_set_memory_region(struct kvm *kvm,
7555                           const struct kvm_userspace_memory_region *mem)
7556 {
7557         int r;
7558
7559         mutex_lock(&kvm->slots_lock);
7560         r = __x86_set_memory_region(kvm, mem);
7561         mutex_unlock(&kvm->slots_lock);
7562
7563         return r;
7564 }
7565 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7566
7567 void kvm_arch_destroy_vm(struct kvm *kvm)
7568 {
7569         if (current->mm == kvm->mm) {
7570                 /*
7571                  * Free memory regions allocated on behalf of userspace,
7572                  * unless the the memory map has changed due to process exit
7573                  * or fd copying.
7574                  */
7575                 struct kvm_userspace_memory_region mem;
7576                 memset(&mem, 0, sizeof(mem));
7577                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7578                 x86_set_memory_region(kvm, &mem);
7579
7580                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7581                 x86_set_memory_region(kvm, &mem);
7582
7583                 mem.slot = TSS_PRIVATE_MEMSLOT;
7584                 x86_set_memory_region(kvm, &mem);
7585         }
7586         kvm_iommu_unmap_guest(kvm);
7587         kfree(kvm->arch.vpic);
7588         kfree(kvm->arch.vioapic);
7589         kvm_free_vcpus(kvm);
7590         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7591 }
7592
7593 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7594                            struct kvm_memory_slot *dont)
7595 {
7596         int i;
7597
7598         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7599                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7600                         kvfree(free->arch.rmap[i]);
7601                         free->arch.rmap[i] = NULL;
7602                 }
7603                 if (i == 0)
7604                         continue;
7605
7606                 if (!dont || free->arch.lpage_info[i - 1] !=
7607                              dont->arch.lpage_info[i - 1]) {
7608                         kvfree(free->arch.lpage_info[i - 1]);
7609                         free->arch.lpage_info[i - 1] = NULL;
7610                 }
7611         }
7612 }
7613
7614 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7615                             unsigned long npages)
7616 {
7617         int i;
7618
7619         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7620                 unsigned long ugfn;
7621                 int lpages;
7622                 int level = i + 1;
7623
7624                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7625                                       slot->base_gfn, level) + 1;
7626
7627                 slot->arch.rmap[i] =
7628                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7629                 if (!slot->arch.rmap[i])
7630                         goto out_free;
7631                 if (i == 0)
7632                         continue;
7633
7634                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7635                                         sizeof(*slot->arch.lpage_info[i - 1]));
7636                 if (!slot->arch.lpage_info[i - 1])
7637                         goto out_free;
7638
7639                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7640                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7641                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7642                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7643                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7644                 /*
7645                  * If the gfn and userspace address are not aligned wrt each
7646                  * other, or if explicitly asked to, disable large page
7647                  * support for this slot
7648                  */
7649                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7650                     !kvm_largepages_enabled()) {
7651                         unsigned long j;
7652
7653                         for (j = 0; j < lpages; ++j)
7654                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7655                 }
7656         }
7657
7658         return 0;
7659
7660 out_free:
7661         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7662                 kvfree(slot->arch.rmap[i]);
7663                 slot->arch.rmap[i] = NULL;
7664                 if (i == 0)
7665                         continue;
7666
7667                 kvfree(slot->arch.lpage_info[i - 1]);
7668                 slot->arch.lpage_info[i - 1] = NULL;
7669         }
7670         return -ENOMEM;
7671 }
7672
7673 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7674 {
7675         /*
7676          * memslots->generation has been incremented.
7677          * mmio generation may have reached its maximum value.
7678          */
7679         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7680 }
7681
7682 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7683                                 struct kvm_memory_slot *memslot,
7684                                 const struct kvm_userspace_memory_region *mem,
7685                                 enum kvm_mr_change change)
7686 {
7687         /*
7688          * Only private memory slots need to be mapped here since
7689          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7690          */
7691         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7692                 unsigned long userspace_addr;
7693
7694                 /*
7695                  * MAP_SHARED to prevent internal slot pages from being moved
7696                  * by fork()/COW.
7697                  */
7698                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7699                                          PROT_READ | PROT_WRITE,
7700                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7701
7702                 if (IS_ERR((void *)userspace_addr))
7703                         return PTR_ERR((void *)userspace_addr);
7704
7705                 memslot->userspace_addr = userspace_addr;
7706         }
7707
7708         return 0;
7709 }
7710
7711 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7712                                      struct kvm_memory_slot *new)
7713 {
7714         /* Still write protect RO slot */
7715         if (new->flags & KVM_MEM_READONLY) {
7716                 kvm_mmu_slot_remove_write_access(kvm, new);
7717                 return;
7718         }
7719
7720         /*
7721          * Call kvm_x86_ops dirty logging hooks when they are valid.
7722          *
7723          * kvm_x86_ops->slot_disable_log_dirty is called when:
7724          *
7725          *  - KVM_MR_CREATE with dirty logging is disabled
7726          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7727          *
7728          * The reason is, in case of PML, we need to set D-bit for any slots
7729          * with dirty logging disabled in order to eliminate unnecessary GPA
7730          * logging in PML buffer (and potential PML buffer full VMEXT). This
7731          * guarantees leaving PML enabled during guest's lifetime won't have
7732          * any additonal overhead from PML when guest is running with dirty
7733          * logging disabled for memory slots.
7734          *
7735          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7736          * to dirty logging mode.
7737          *
7738          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7739          *
7740          * In case of write protect:
7741          *
7742          * Write protect all pages for dirty logging.
7743          *
7744          * All the sptes including the large sptes which point to this
7745          * slot are set to readonly. We can not create any new large
7746          * spte on this slot until the end of the logging.
7747          *
7748          * See the comments in fast_page_fault().
7749          */
7750         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7751                 if (kvm_x86_ops->slot_enable_log_dirty)
7752                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7753                 else
7754                         kvm_mmu_slot_remove_write_access(kvm, new);
7755         } else {
7756                 if (kvm_x86_ops->slot_disable_log_dirty)
7757                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7758         }
7759 }
7760
7761 void kvm_arch_commit_memory_region(struct kvm *kvm,
7762                                 const struct kvm_userspace_memory_region *mem,
7763                                 const struct kvm_memory_slot *old,
7764                                 const struct kvm_memory_slot *new,
7765                                 enum kvm_mr_change change)
7766 {
7767         int nr_mmu_pages = 0;
7768
7769         if (change == KVM_MR_DELETE && old->id >= KVM_USER_MEM_SLOTS) {
7770                 int ret;
7771
7772                 ret = vm_munmap(old->userspace_addr,
7773                                 old->npages * PAGE_SIZE);
7774                 if (ret < 0)
7775                         printk(KERN_WARNING
7776                                "kvm_vm_ioctl_set_memory_region: "
7777                                "failed to munmap memory\n");
7778         }
7779
7780         if (!kvm->arch.n_requested_mmu_pages)
7781                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7782
7783         if (nr_mmu_pages)
7784                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7785
7786         /*
7787          * Dirty logging tracks sptes in 4k granularity, meaning that large
7788          * sptes have to be split.  If live migration is successful, the guest
7789          * in the source machine will be destroyed and large sptes will be
7790          * created in the destination. However, if the guest continues to run
7791          * in the source machine (for example if live migration fails), small
7792          * sptes will remain around and cause bad performance.
7793          *
7794          * Scan sptes if dirty logging has been stopped, dropping those
7795          * which can be collapsed into a single large-page spte.  Later
7796          * page faults will create the large-page sptes.
7797          */
7798         if ((change != KVM_MR_DELETE) &&
7799                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7800                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7801                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7802
7803         /*
7804          * Set up write protection and/or dirty logging for the new slot.
7805          *
7806          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7807          * been zapped so no dirty logging staff is needed for old slot. For
7808          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7809          * new and it's also covered when dealing with the new slot.
7810          *
7811          * FIXME: const-ify all uses of struct kvm_memory_slot.
7812          */
7813         if (change != KVM_MR_DELETE)
7814                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7815 }
7816
7817 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7818 {
7819         kvm_mmu_invalidate_zap_all_pages(kvm);
7820 }
7821
7822 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7823                                    struct kvm_memory_slot *slot)
7824 {
7825         kvm_mmu_invalidate_zap_all_pages(kvm);
7826 }
7827
7828 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7829 {
7830         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7831                 kvm_x86_ops->check_nested_events(vcpu, false);
7832
7833         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7834                 !vcpu->arch.apf.halted)
7835                 || !list_empty_careful(&vcpu->async_pf.done)
7836                 || kvm_apic_has_events(vcpu)
7837                 || vcpu->arch.pv.pv_unhalted
7838                 || atomic_read(&vcpu->arch.nmi_queued) ||
7839                 (kvm_arch_interrupt_allowed(vcpu) &&
7840                  kvm_cpu_has_interrupt(vcpu));
7841 }
7842
7843 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7844 {
7845         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7846 }
7847
7848 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7849 {
7850         return kvm_x86_ops->interrupt_allowed(vcpu);
7851 }
7852
7853 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
7854 {
7855         if (is_64_bit_mode(vcpu))
7856                 return kvm_rip_read(vcpu);
7857         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
7858                      kvm_rip_read(vcpu));
7859 }
7860 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
7861
7862 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7863 {
7864         return kvm_get_linear_rip(vcpu) == linear_rip;
7865 }
7866 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7867
7868 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7869 {
7870         unsigned long rflags;
7871
7872         rflags = kvm_x86_ops->get_rflags(vcpu);
7873         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7874                 rflags &= ~X86_EFLAGS_TF;
7875         return rflags;
7876 }
7877 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7878
7879 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7880 {
7881         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7882             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7883                 rflags |= X86_EFLAGS_TF;
7884         kvm_x86_ops->set_rflags(vcpu, rflags);
7885 }
7886
7887 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7888 {
7889         __kvm_set_rflags(vcpu, rflags);
7890         kvm_make_request(KVM_REQ_EVENT, vcpu);
7891 }
7892 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7893
7894 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7895 {
7896         int r;
7897
7898         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7899               work->wakeup_all)
7900                 return;
7901
7902         r = kvm_mmu_reload(vcpu);
7903         if (unlikely(r))
7904                 return;
7905
7906         if (!vcpu->arch.mmu.direct_map &&
7907               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7908                 return;
7909
7910         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7911 }
7912
7913 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7914 {
7915         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7916 }
7917
7918 static inline u32 kvm_async_pf_next_probe(u32 key)
7919 {
7920         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7921 }
7922
7923 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7924 {
7925         u32 key = kvm_async_pf_hash_fn(gfn);
7926
7927         while (vcpu->arch.apf.gfns[key] != ~0)
7928                 key = kvm_async_pf_next_probe(key);
7929
7930         vcpu->arch.apf.gfns[key] = gfn;
7931 }
7932
7933 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7934 {
7935         int i;
7936         u32 key = kvm_async_pf_hash_fn(gfn);
7937
7938         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7939                      (vcpu->arch.apf.gfns[key] != gfn &&
7940                       vcpu->arch.apf.gfns[key] != ~0); i++)
7941                 key = kvm_async_pf_next_probe(key);
7942
7943         return key;
7944 }
7945
7946 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7947 {
7948         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7949 }
7950
7951 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7952 {
7953         u32 i, j, k;
7954
7955         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7956         while (true) {
7957                 vcpu->arch.apf.gfns[i] = ~0;
7958                 do {
7959                         j = kvm_async_pf_next_probe(j);
7960                         if (vcpu->arch.apf.gfns[j] == ~0)
7961                                 return;
7962                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7963                         /*
7964                          * k lies cyclically in ]i,j]
7965                          * |    i.k.j |
7966                          * |....j i.k.| or  |.k..j i...|
7967                          */
7968                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7969                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7970                 i = j;
7971         }
7972 }
7973
7974 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7975 {
7976
7977         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7978                                       sizeof(val));
7979 }
7980
7981 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7982                                      struct kvm_async_pf *work)
7983 {
7984         struct x86_exception fault;
7985
7986         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7987         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7988
7989         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7990             (vcpu->arch.apf.send_user_only &&
7991              kvm_x86_ops->get_cpl(vcpu) == 0))
7992                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7993         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7994                 fault.vector = PF_VECTOR;
7995                 fault.error_code_valid = true;
7996                 fault.error_code = 0;
7997                 fault.nested_page_fault = false;
7998                 fault.address = work->arch.token;
7999                 kvm_inject_page_fault(vcpu, &fault);
8000         }
8001 }
8002
8003 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8004                                  struct kvm_async_pf *work)
8005 {
8006         struct x86_exception fault;
8007
8008         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8009         if (work->wakeup_all)
8010                 work->arch.token = ~0; /* broadcast wakeup */
8011         else
8012                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8013
8014         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8015             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8016                 fault.vector = PF_VECTOR;
8017                 fault.error_code_valid = true;
8018                 fault.error_code = 0;
8019                 fault.nested_page_fault = false;
8020                 fault.address = work->arch.token;
8021                 kvm_inject_page_fault(vcpu, &fault);
8022         }
8023         vcpu->arch.apf.halted = false;
8024         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8025 }
8026
8027 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8028 {
8029         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8030                 return true;
8031         else
8032                 return !kvm_event_needs_reinjection(vcpu) &&
8033                         kvm_x86_ops->interrupt_allowed(vcpu);
8034 }
8035
8036 void kvm_arch_start_assignment(struct kvm *kvm)
8037 {
8038         atomic_inc(&kvm->arch.assigned_device_count);
8039 }
8040 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8041
8042 void kvm_arch_end_assignment(struct kvm *kvm)
8043 {
8044         atomic_dec(&kvm->arch.assigned_device_count);
8045 }
8046 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8047
8048 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8049 {
8050         return atomic_read(&kvm->arch.assigned_device_count);
8051 }
8052 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8053
8054 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8055 {
8056         atomic_inc(&kvm->arch.noncoherent_dma_count);
8057 }
8058 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8059
8060 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8061 {
8062         atomic_dec(&kvm->arch.noncoherent_dma_count);
8063 }
8064 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8065
8066 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8067 {
8068         return atomic_read(&kvm->arch.noncoherent_dma_count);
8069 }
8070 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8071
8072 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8073 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8074 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8075 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8076 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8077 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8078 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8079 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8080 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8081 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8082 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8083 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8084 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8085 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8086 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);