2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <trace/events/kvm.h>
53 #define CREATE_TRACE_POINTS
56 #include <asm/debugreg.h>
62 #include <asm/fpu-internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
67 #define MAX_IO_MSRS 256
68 #define KVM_MAX_MCE_BANKS 32
69 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
71 #define emul_to_vcpu(ctxt) \
72 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
75 * - enable syscall per default because its emulated by KVM
76 * - enable LME and LMA per default on 64 bit KVM
80 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
82 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
85 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
86 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
88 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
89 static void process_nmi(struct kvm_vcpu *vcpu);
91 struct kvm_x86_ops *kvm_x86_ops;
92 EXPORT_SYMBOL_GPL(kvm_x86_ops);
94 static bool ignore_msrs = 0;
95 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
97 bool kvm_has_tsc_control;
98 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
99 u32 kvm_max_guest_tsc_khz;
100 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
102 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
103 static u32 tsc_tolerance_ppm = 250;
104 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
106 #define KVM_NR_SHARED_MSRS 16
108 struct kvm_shared_msrs_global {
110 u32 msrs[KVM_NR_SHARED_MSRS];
113 struct kvm_shared_msrs {
114 struct user_return_notifier urn;
116 struct kvm_shared_msr_values {
119 } values[KVM_NR_SHARED_MSRS];
122 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
123 static struct kvm_shared_msrs __percpu *shared_msrs;
125 struct kvm_stats_debugfs_item debugfs_entries[] = {
126 { "pf_fixed", VCPU_STAT(pf_fixed) },
127 { "pf_guest", VCPU_STAT(pf_guest) },
128 { "tlb_flush", VCPU_STAT(tlb_flush) },
129 { "invlpg", VCPU_STAT(invlpg) },
130 { "exits", VCPU_STAT(exits) },
131 { "io_exits", VCPU_STAT(io_exits) },
132 { "mmio_exits", VCPU_STAT(mmio_exits) },
133 { "signal_exits", VCPU_STAT(signal_exits) },
134 { "irq_window", VCPU_STAT(irq_window_exits) },
135 { "nmi_window", VCPU_STAT(nmi_window_exits) },
136 { "halt_exits", VCPU_STAT(halt_exits) },
137 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
138 { "hypercalls", VCPU_STAT(hypercalls) },
139 { "request_irq", VCPU_STAT(request_irq_exits) },
140 { "irq_exits", VCPU_STAT(irq_exits) },
141 { "host_state_reload", VCPU_STAT(host_state_reload) },
142 { "efer_reload", VCPU_STAT(efer_reload) },
143 { "fpu_reload", VCPU_STAT(fpu_reload) },
144 { "insn_emulation", VCPU_STAT(insn_emulation) },
145 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
146 { "irq_injections", VCPU_STAT(irq_injections) },
147 { "nmi_injections", VCPU_STAT(nmi_injections) },
148 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
149 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
150 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
151 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
152 { "mmu_flooded", VM_STAT(mmu_flooded) },
153 { "mmu_recycled", VM_STAT(mmu_recycled) },
154 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
155 { "mmu_unsync", VM_STAT(mmu_unsync) },
156 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
157 { "largepages", VM_STAT(lpages) },
161 u64 __read_mostly host_xcr0;
163 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
165 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
168 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
169 vcpu->arch.apf.gfns[i] = ~0;
172 static void kvm_on_user_return(struct user_return_notifier *urn)
175 struct kvm_shared_msrs *locals
176 = container_of(urn, struct kvm_shared_msrs, urn);
177 struct kvm_shared_msr_values *values;
179 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
180 values = &locals->values[slot];
181 if (values->host != values->curr) {
182 wrmsrl(shared_msrs_global.msrs[slot], values->host);
183 values->curr = values->host;
186 locals->registered = false;
187 user_return_notifier_unregister(urn);
190 static void shared_msr_update(unsigned slot, u32 msr)
193 unsigned int cpu = smp_processor_id();
194 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
196 /* only read, and nobody should modify it at this time,
197 * so don't need lock */
198 if (slot >= shared_msrs_global.nr) {
199 printk(KERN_ERR "kvm: invalid MSR slot!");
202 rdmsrl_safe(msr, &value);
203 smsr->values[slot].host = value;
204 smsr->values[slot].curr = value;
207 void kvm_define_shared_msr(unsigned slot, u32 msr)
209 if (slot >= shared_msrs_global.nr)
210 shared_msrs_global.nr = slot + 1;
211 shared_msrs_global.msrs[slot] = msr;
212 /* we need ensured the shared_msr_global have been updated */
215 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
217 static void kvm_shared_msr_cpu_online(void)
221 for (i = 0; i < shared_msrs_global.nr; ++i)
222 shared_msr_update(i, shared_msrs_global.msrs[i]);
225 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
227 unsigned int cpu = smp_processor_id();
228 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
230 if (((value ^ smsr->values[slot].curr) & mask) == 0)
232 smsr->values[slot].curr = value;
233 wrmsrl(shared_msrs_global.msrs[slot], value);
234 if (!smsr->registered) {
235 smsr->urn.on_user_return = kvm_on_user_return;
236 user_return_notifier_register(&smsr->urn);
237 smsr->registered = true;
240 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
242 static void drop_user_return_notifiers(void *ignore)
244 unsigned int cpu = smp_processor_id();
245 struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
247 if (smsr->registered)
248 kvm_on_user_return(&smsr->urn);
251 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
253 return vcpu->arch.apic_base;
255 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
257 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
259 /* TODO: reserve bits check */
260 kvm_lapic_set_base(vcpu, data);
262 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
264 asmlinkage void kvm_spurious_fault(void)
266 /* Fault while not rebooting. We want the trace. */
269 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
271 #define EXCPT_BENIGN 0
272 #define EXCPT_CONTRIBUTORY 1
275 static int exception_class(int vector)
285 return EXCPT_CONTRIBUTORY;
292 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
293 unsigned nr, bool has_error, u32 error_code,
299 kvm_make_request(KVM_REQ_EVENT, vcpu);
301 if (!vcpu->arch.exception.pending) {
303 vcpu->arch.exception.pending = true;
304 vcpu->arch.exception.has_error_code = has_error;
305 vcpu->arch.exception.nr = nr;
306 vcpu->arch.exception.error_code = error_code;
307 vcpu->arch.exception.reinject = reinject;
311 /* to check exception */
312 prev_nr = vcpu->arch.exception.nr;
313 if (prev_nr == DF_VECTOR) {
314 /* triple fault -> shutdown */
315 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
318 class1 = exception_class(prev_nr);
319 class2 = exception_class(nr);
320 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
321 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
322 /* generate double fault per SDM Table 5-5 */
323 vcpu->arch.exception.pending = true;
324 vcpu->arch.exception.has_error_code = true;
325 vcpu->arch.exception.nr = DF_VECTOR;
326 vcpu->arch.exception.error_code = 0;
328 /* replace previous exception with a new one in a hope
329 that instruction re-execution will regenerate lost
334 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
336 kvm_multiple_exception(vcpu, nr, false, 0, false);
338 EXPORT_SYMBOL_GPL(kvm_queue_exception);
340 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
342 kvm_multiple_exception(vcpu, nr, false, 0, true);
344 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
346 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
349 kvm_inject_gp(vcpu, 0);
351 kvm_x86_ops->skip_emulated_instruction(vcpu);
353 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
355 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
357 ++vcpu->stat.pf_guest;
358 vcpu->arch.cr2 = fault->address;
359 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
361 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
363 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
365 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
366 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
368 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
371 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
373 atomic_inc(&vcpu->arch.nmi_queued);
374 kvm_make_request(KVM_REQ_NMI, vcpu);
376 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
378 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
380 kvm_multiple_exception(vcpu, nr, true, error_code, false);
382 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
384 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
386 kvm_multiple_exception(vcpu, nr, true, error_code, true);
388 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
391 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
392 * a #GP and return false.
394 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
396 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
398 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
401 EXPORT_SYMBOL_GPL(kvm_require_cpl);
404 * This function will be used to read from the physical memory of the currently
405 * running guest. The difference to kvm_read_guest_page is that this function
406 * can read from guest physical or from the guest's guest physical memory.
408 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
409 gfn_t ngfn, void *data, int offset, int len,
415 ngpa = gfn_to_gpa(ngfn);
416 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
417 if (real_gfn == UNMAPPED_GVA)
420 real_gfn = gpa_to_gfn(real_gfn);
422 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
424 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
426 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
427 void *data, int offset, int len, u32 access)
429 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
430 data, offset, len, access);
434 * Load the pae pdptrs. Return true is they are all valid.
436 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
438 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
439 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
442 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
444 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
445 offset * sizeof(u64), sizeof(pdpte),
446 PFERR_USER_MASK|PFERR_WRITE_MASK);
451 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
452 if (is_present_gpte(pdpte[i]) &&
453 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
460 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
461 __set_bit(VCPU_EXREG_PDPTR,
462 (unsigned long *)&vcpu->arch.regs_avail);
463 __set_bit(VCPU_EXREG_PDPTR,
464 (unsigned long *)&vcpu->arch.regs_dirty);
469 EXPORT_SYMBOL_GPL(load_pdptrs);
471 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
473 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
479 if (is_long_mode(vcpu) || !is_pae(vcpu))
482 if (!test_bit(VCPU_EXREG_PDPTR,
483 (unsigned long *)&vcpu->arch.regs_avail))
486 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
487 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
488 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
489 PFERR_USER_MASK | PFERR_WRITE_MASK);
492 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
498 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
500 unsigned long old_cr0 = kvm_read_cr0(vcpu);
501 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
502 X86_CR0_CD | X86_CR0_NW;
507 if (cr0 & 0xffffffff00000000UL)
511 cr0 &= ~CR0_RESERVED_BITS;
513 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
516 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
519 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
521 if ((vcpu->arch.efer & EFER_LME)) {
526 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
531 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
536 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
539 kvm_x86_ops->set_cr0(vcpu, cr0);
541 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
542 kvm_clear_async_pf_completion_queue(vcpu);
543 kvm_async_pf_hash_reset(vcpu);
546 if ((cr0 ^ old_cr0) & update_bits)
547 kvm_mmu_reset_context(vcpu);
550 EXPORT_SYMBOL_GPL(kvm_set_cr0);
552 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
554 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
556 EXPORT_SYMBOL_GPL(kvm_lmsw);
558 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
562 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
563 if (index != XCR_XFEATURE_ENABLED_MASK)
566 if (kvm_x86_ops->get_cpl(vcpu) != 0)
568 if (!(xcr0 & XSTATE_FP))
570 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
572 if (xcr0 & ~host_xcr0)
574 vcpu->arch.xcr0 = xcr0;
575 vcpu->guest_xcr0_loaded = 0;
579 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
581 if (__kvm_set_xcr(vcpu, index, xcr)) {
582 kvm_inject_gp(vcpu, 0);
587 EXPORT_SYMBOL_GPL(kvm_set_xcr);
589 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
591 unsigned long old_cr4 = kvm_read_cr4(vcpu);
592 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
593 X86_CR4_PAE | X86_CR4_SMEP;
594 if (cr4 & CR4_RESERVED_BITS)
597 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
600 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
603 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
606 if (is_long_mode(vcpu)) {
607 if (!(cr4 & X86_CR4_PAE))
609 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
610 && ((cr4 ^ old_cr4) & pdptr_bits)
611 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
615 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
616 if (!guest_cpuid_has_pcid(vcpu))
619 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
620 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
624 if (kvm_x86_ops->set_cr4(vcpu, cr4))
627 if (((cr4 ^ old_cr4) & pdptr_bits) ||
628 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
629 kvm_mmu_reset_context(vcpu);
631 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
632 kvm_update_cpuid(vcpu);
636 EXPORT_SYMBOL_GPL(kvm_set_cr4);
638 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
640 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
641 kvm_mmu_sync_roots(vcpu);
642 kvm_mmu_flush_tlb(vcpu);
646 if (is_long_mode(vcpu)) {
647 if (kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) {
648 if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
651 if (cr3 & CR3_L_MODE_RESERVED_BITS)
655 if (cr3 & CR3_PAE_RESERVED_BITS)
657 if (is_paging(vcpu) &&
658 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
662 * We don't check reserved bits in nonpae mode, because
663 * this isn't enforced, and VMware depends on this.
668 * Does the new cr3 value map to physical memory? (Note, we
669 * catch an invalid cr3 even in real-mode, because it would
670 * cause trouble later on when we turn on paging anyway.)
672 * A real CPU would silently accept an invalid cr3 and would
673 * attempt to use it - with largely undefined (and often hard
674 * to debug) behavior on the guest side.
676 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
678 vcpu->arch.cr3 = cr3;
679 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
680 vcpu->arch.mmu.new_cr3(vcpu);
683 EXPORT_SYMBOL_GPL(kvm_set_cr3);
685 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
687 if (cr8 & CR8_RESERVED_BITS)
689 if (irqchip_in_kernel(vcpu->kvm))
690 kvm_lapic_set_tpr(vcpu, cr8);
692 vcpu->arch.cr8 = cr8;
695 EXPORT_SYMBOL_GPL(kvm_set_cr8);
697 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
699 if (irqchip_in_kernel(vcpu->kvm))
700 return kvm_lapic_get_cr8(vcpu);
702 return vcpu->arch.cr8;
704 EXPORT_SYMBOL_GPL(kvm_get_cr8);
706 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
710 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
711 dr7 = vcpu->arch.guest_debug_dr7;
713 dr7 = vcpu->arch.dr7;
714 kvm_x86_ops->set_dr7(vcpu, dr7);
715 vcpu->arch.switch_db_regs = (dr7 & DR7_BP_EN_MASK);
718 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
722 vcpu->arch.db[dr] = val;
723 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
724 vcpu->arch.eff_db[dr] = val;
727 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
731 if (val & 0xffffffff00000000ULL)
733 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
736 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
740 if (val & 0xffffffff00000000ULL)
742 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
743 kvm_update_dr7(vcpu);
750 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
754 res = __kvm_set_dr(vcpu, dr, val);
756 kvm_queue_exception(vcpu, UD_VECTOR);
758 kvm_inject_gp(vcpu, 0);
762 EXPORT_SYMBOL_GPL(kvm_set_dr);
764 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
768 *val = vcpu->arch.db[dr];
771 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
775 *val = vcpu->arch.dr6;
778 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
782 *val = vcpu->arch.dr7;
789 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
791 if (_kvm_get_dr(vcpu, dr, val)) {
792 kvm_queue_exception(vcpu, UD_VECTOR);
797 EXPORT_SYMBOL_GPL(kvm_get_dr);
799 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
801 u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
805 err = kvm_pmu_read_pmc(vcpu, ecx, &data);
808 kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
809 kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
812 EXPORT_SYMBOL_GPL(kvm_rdpmc);
815 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
816 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
818 * This list is modified at module load time to reflect the
819 * capabilities of the host cpu. This capabilities test skips MSRs that are
820 * kvm-specific. Those are put in the beginning of the list.
823 #define KVM_SAVE_MSRS_BEGIN 10
824 static u32 msrs_to_save[] = {
825 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
826 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
827 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
828 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
830 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
833 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
835 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
838 static unsigned num_msrs_to_save;
840 static const u32 emulated_msrs[] = {
842 MSR_IA32_TSCDEADLINE,
843 MSR_IA32_MISC_ENABLE,
848 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
850 if (efer & efer_reserved_bits)
853 if (efer & EFER_FFXSR) {
854 struct kvm_cpuid_entry2 *feat;
856 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
857 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
861 if (efer & EFER_SVME) {
862 struct kvm_cpuid_entry2 *feat;
864 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
865 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
871 EXPORT_SYMBOL_GPL(kvm_valid_efer);
873 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
875 u64 old_efer = vcpu->arch.efer;
877 if (!kvm_valid_efer(vcpu, efer))
881 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
885 efer |= vcpu->arch.efer & EFER_LMA;
887 kvm_x86_ops->set_efer(vcpu, efer);
889 /* Update reserved bits */
890 if ((efer ^ old_efer) & EFER_NX)
891 kvm_mmu_reset_context(vcpu);
896 void kvm_enable_efer_bits(u64 mask)
898 efer_reserved_bits &= ~mask;
900 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
904 * Writes msr value into into the appropriate "register".
905 * Returns 0 on success, non-0 otherwise.
906 * Assumes vcpu_load() was already called.
908 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
910 return kvm_x86_ops->set_msr(vcpu, msr);
914 * Adapt set_msr() to msr_io()'s calling convention
916 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
922 msr.host_initiated = true;
923 return kvm_set_msr(vcpu, &msr);
927 struct pvclock_gtod_data {
930 struct { /* extract of a clocksource struct */
938 /* open coded 'struct timespec' */
939 u64 monotonic_time_snsec;
940 time_t monotonic_time_sec;
943 static struct pvclock_gtod_data pvclock_gtod_data;
945 static void update_pvclock_gtod(struct timekeeper *tk)
947 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
949 write_seqcount_begin(&vdata->seq);
951 /* copy pvclock gtod data */
952 vdata->clock.vclock_mode = tk->clock->archdata.vclock_mode;
953 vdata->clock.cycle_last = tk->clock->cycle_last;
954 vdata->clock.mask = tk->clock->mask;
955 vdata->clock.mult = tk->mult;
956 vdata->clock.shift = tk->shift;
958 vdata->monotonic_time_sec = tk->xtime_sec
959 + tk->wall_to_monotonic.tv_sec;
960 vdata->monotonic_time_snsec = tk->xtime_nsec
961 + (tk->wall_to_monotonic.tv_nsec
963 while (vdata->monotonic_time_snsec >=
964 (((u64)NSEC_PER_SEC) << tk->shift)) {
965 vdata->monotonic_time_snsec -=
966 ((u64)NSEC_PER_SEC) << tk->shift;
967 vdata->monotonic_time_sec++;
970 write_seqcount_end(&vdata->seq);
975 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
979 struct pvclock_wall_clock wc;
980 struct timespec boot;
985 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
990 ++version; /* first time write, random junk */
994 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
997 * The guest calculates current wall clock time by adding
998 * system time (updated by kvm_guest_time_update below) to the
999 * wall clock specified here. guest system time equals host
1000 * system time for us, thus we must fill in host boot time here.
1004 if (kvm->arch.kvmclock_offset) {
1005 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1006 boot = timespec_sub(boot, ts);
1008 wc.sec = boot.tv_sec;
1009 wc.nsec = boot.tv_nsec;
1010 wc.version = version;
1012 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1015 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1018 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1020 uint32_t quotient, remainder;
1022 /* Don't try to replace with do_div(), this one calculates
1023 * "(dividend << 32) / divisor" */
1025 : "=a" (quotient), "=d" (remainder)
1026 : "0" (0), "1" (dividend), "r" (divisor) );
1030 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1031 s8 *pshift, u32 *pmultiplier)
1038 tps64 = base_khz * 1000LL;
1039 scaled64 = scaled_khz * 1000LL;
1040 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1045 tps32 = (uint32_t)tps64;
1046 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1047 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1055 *pmultiplier = div_frac(scaled64, tps32);
1057 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1058 __func__, base_khz, scaled_khz, shift, *pmultiplier);
1061 static inline u64 get_kernel_ns(void)
1065 WARN_ON(preemptible());
1067 monotonic_to_bootbased(&ts);
1068 return timespec_to_ns(&ts);
1071 #ifdef CONFIG_X86_64
1072 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1075 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1076 unsigned long max_tsc_khz;
1078 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1080 return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1081 vcpu->arch.virtual_tsc_shift);
1084 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1086 u64 v = (u64)khz * (1000000 + ppm);
1091 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1093 u32 thresh_lo, thresh_hi;
1094 int use_scaling = 0;
1096 /* tsc_khz can be zero if TSC calibration fails */
1097 if (this_tsc_khz == 0)
1100 /* Compute a scale to convert nanoseconds in TSC cycles */
1101 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1102 &vcpu->arch.virtual_tsc_shift,
1103 &vcpu->arch.virtual_tsc_mult);
1104 vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1107 * Compute the variation in TSC rate which is acceptable
1108 * within the range of tolerance and decide if the
1109 * rate being applied is within that bounds of the hardware
1110 * rate. If so, no scaling or compensation need be done.
1112 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1113 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1114 if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1115 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1118 kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1121 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1123 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1124 vcpu->arch.virtual_tsc_mult,
1125 vcpu->arch.virtual_tsc_shift);
1126 tsc += vcpu->arch.this_tsc_write;
1130 void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1132 #ifdef CONFIG_X86_64
1134 bool do_request = false;
1135 struct kvm_arch *ka = &vcpu->kvm->arch;
1136 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1138 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1139 atomic_read(&vcpu->kvm->online_vcpus));
1141 if (vcpus_matched && gtod->clock.vclock_mode == VCLOCK_TSC)
1142 if (!ka->use_master_clock)
1145 if (!vcpus_matched && ka->use_master_clock)
1149 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1151 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1152 atomic_read(&vcpu->kvm->online_vcpus),
1153 ka->use_master_clock, gtod->clock.vclock_mode);
1157 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1159 u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1160 vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1163 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1165 struct kvm *kvm = vcpu->kvm;
1166 u64 offset, ns, elapsed;
1167 unsigned long flags;
1170 u64 data = msr->data;
1172 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1173 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1174 ns = get_kernel_ns();
1175 elapsed = ns - kvm->arch.last_tsc_nsec;
1177 if (vcpu->arch.virtual_tsc_khz) {
1178 /* n.b - signed multiplication and division required */
1179 usdiff = data - kvm->arch.last_tsc_write;
1180 #ifdef CONFIG_X86_64
1181 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1183 /* do_div() only does unsigned */
1184 asm("idivl %2; xor %%edx, %%edx"
1186 : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1188 do_div(elapsed, 1000);
1193 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1196 * Special case: TSC write with a small delta (1 second) of virtual
1197 * cycle time against real time is interpreted as an attempt to
1198 * synchronize the CPU.
1200 * For a reliable TSC, we can match TSC offsets, and for an unstable
1201 * TSC, we add elapsed time in this computation. We could let the
1202 * compensation code attempt to catch up if we fall behind, but
1203 * it's better to try to match offsets from the beginning.
1205 if (usdiff < USEC_PER_SEC &&
1206 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1207 if (!check_tsc_unstable()) {
1208 offset = kvm->arch.cur_tsc_offset;
1209 pr_debug("kvm: matched tsc offset for %llu\n", data);
1211 u64 delta = nsec_to_cycles(vcpu, elapsed);
1213 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1214 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1219 * We split periods of matched TSC writes into generations.
1220 * For each generation, we track the original measured
1221 * nanosecond time, offset, and write, so if TSCs are in
1222 * sync, we can match exact offset, and if not, we can match
1223 * exact software computation in compute_guest_tsc()
1225 * These values are tracked in kvm->arch.cur_xxx variables.
1227 kvm->arch.cur_tsc_generation++;
1228 kvm->arch.cur_tsc_nsec = ns;
1229 kvm->arch.cur_tsc_write = data;
1230 kvm->arch.cur_tsc_offset = offset;
1232 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1233 kvm->arch.cur_tsc_generation, data);
1237 * We also track th most recent recorded KHZ, write and time to
1238 * allow the matching interval to be extended at each write.
1240 kvm->arch.last_tsc_nsec = ns;
1241 kvm->arch.last_tsc_write = data;
1242 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1244 /* Reset of TSC must disable overshoot protection below */
1245 vcpu->arch.hv_clock.tsc_timestamp = 0;
1246 vcpu->arch.last_guest_tsc = data;
1248 /* Keep track of which generation this VCPU has synchronized to */
1249 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1250 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1251 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1253 if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1254 update_ia32_tsc_adjust_msr(vcpu, offset);
1255 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1256 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1258 spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1260 kvm->arch.nr_vcpus_matched_tsc++;
1262 kvm->arch.nr_vcpus_matched_tsc = 0;
1264 kvm_track_tsc_matching(vcpu);
1265 spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1268 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1270 #ifdef CONFIG_X86_64
1272 static cycle_t read_tsc(void)
1278 * Empirically, a fence (of type that depends on the CPU)
1279 * before rdtsc is enough to ensure that rdtsc is ordered
1280 * with respect to loads. The various CPU manuals are unclear
1281 * as to whether rdtsc can be reordered with later loads,
1282 * but no one has ever seen it happen.
1285 ret = (cycle_t)vget_cycles();
1287 last = pvclock_gtod_data.clock.cycle_last;
1289 if (likely(ret >= last))
1293 * GCC likes to generate cmov here, but this branch is extremely
1294 * predictable (it's just a funciton of time and the likely is
1295 * very likely) and there's a data dependence, so force GCC
1296 * to generate a branch instead. I don't barrier() because
1297 * we don't actually need a barrier, and if this function
1298 * ever gets inlined it will generate worse code.
1304 static inline u64 vgettsc(cycle_t *cycle_now)
1307 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1309 *cycle_now = read_tsc();
1311 v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1312 return v * gtod->clock.mult;
1315 static int do_monotonic(struct timespec *ts, cycle_t *cycle_now)
1320 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1324 seq = read_seqcount_begin(>od->seq);
1325 mode = gtod->clock.vclock_mode;
1326 ts->tv_sec = gtod->monotonic_time_sec;
1327 ns = gtod->monotonic_time_snsec;
1328 ns += vgettsc(cycle_now);
1329 ns >>= gtod->clock.shift;
1330 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
1331 timespec_add_ns(ts, ns);
1336 /* returns true if host is using tsc clocksource */
1337 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1341 /* checked again under seqlock below */
1342 if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1345 if (do_monotonic(&ts, cycle_now) != VCLOCK_TSC)
1348 monotonic_to_bootbased(&ts);
1349 *kernel_ns = timespec_to_ns(&ts);
1357 * Assuming a stable TSC across physical CPUS, and a stable TSC
1358 * across virtual CPUs, the following condition is possible.
1359 * Each numbered line represents an event visible to both
1360 * CPUs at the next numbered event.
1362 * "timespecX" represents host monotonic time. "tscX" represents
1365 * VCPU0 on CPU0 | VCPU1 on CPU1
1367 * 1. read timespec0,tsc0
1368 * 2. | timespec1 = timespec0 + N
1370 * 3. transition to guest | transition to guest
1371 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1372 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1373 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1375 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1378 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1380 * - 0 < N - M => M < N
1382 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1383 * always the case (the difference between two distinct xtime instances
1384 * might be smaller then the difference between corresponding TSC reads,
1385 * when updating guest vcpus pvclock areas).
1387 * To avoid that problem, do not allow visibility of distinct
1388 * system_timestamp/tsc_timestamp values simultaneously: use a master
1389 * copy of host monotonic time values. Update that master copy
1392 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1396 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1398 #ifdef CONFIG_X86_64
1399 struct kvm_arch *ka = &kvm->arch;
1401 bool host_tsc_clocksource, vcpus_matched;
1403 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1404 atomic_read(&kvm->online_vcpus));
1407 * If the host uses TSC clock, then passthrough TSC as stable
1410 host_tsc_clocksource = kvm_get_time_and_clockread(
1411 &ka->master_kernel_ns,
1412 &ka->master_cycle_now);
1414 ka->use_master_clock = host_tsc_clocksource & vcpus_matched;
1416 if (ka->use_master_clock)
1417 atomic_set(&kvm_guest_has_master_clock, 1);
1419 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1420 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1425 static int kvm_guest_time_update(struct kvm_vcpu *v)
1427 unsigned long flags, this_tsc_khz;
1428 struct kvm_vcpu_arch *vcpu = &v->arch;
1429 struct kvm_arch *ka = &v->kvm->arch;
1430 s64 kernel_ns, max_kernel_ns;
1431 u64 tsc_timestamp, host_tsc;
1432 struct pvclock_vcpu_time_info guest_hv_clock;
1434 bool use_master_clock;
1440 * If the host uses TSC clock, then passthrough TSC as stable
1443 spin_lock(&ka->pvclock_gtod_sync_lock);
1444 use_master_clock = ka->use_master_clock;
1445 if (use_master_clock) {
1446 host_tsc = ka->master_cycle_now;
1447 kernel_ns = ka->master_kernel_ns;
1449 spin_unlock(&ka->pvclock_gtod_sync_lock);
1451 /* Keep irq disabled to prevent changes to the clock */
1452 local_irq_save(flags);
1453 this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1454 if (unlikely(this_tsc_khz == 0)) {
1455 local_irq_restore(flags);
1456 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1459 if (!use_master_clock) {
1460 host_tsc = native_read_tsc();
1461 kernel_ns = get_kernel_ns();
1464 tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1467 * We may have to catch up the TSC to match elapsed wall clock
1468 * time for two reasons, even if kvmclock is used.
1469 * 1) CPU could have been running below the maximum TSC rate
1470 * 2) Broken TSC compensation resets the base at each VCPU
1471 * entry to avoid unknown leaps of TSC even when running
1472 * again on the same CPU. This may cause apparent elapsed
1473 * time to disappear, and the guest to stand still or run
1476 if (vcpu->tsc_catchup) {
1477 u64 tsc = compute_guest_tsc(v, kernel_ns);
1478 if (tsc > tsc_timestamp) {
1479 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1480 tsc_timestamp = tsc;
1484 local_irq_restore(flags);
1486 if (!vcpu->pv_time_enabled)
1490 * Time as measured by the TSC may go backwards when resetting the base
1491 * tsc_timestamp. The reason for this is that the TSC resolution is
1492 * higher than the resolution of the other clock scales. Thus, many
1493 * possible measurments of the TSC correspond to one measurement of any
1494 * other clock, and so a spread of values is possible. This is not a
1495 * problem for the computation of the nanosecond clock; with TSC rates
1496 * around 1GHZ, there can only be a few cycles which correspond to one
1497 * nanosecond value, and any path through this code will inevitably
1498 * take longer than that. However, with the kernel_ns value itself,
1499 * the precision may be much lower, down to HZ granularity. If the
1500 * first sampling of TSC against kernel_ns ends in the low part of the
1501 * range, and the second in the high end of the range, we can get:
1503 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1505 * As the sampling errors potentially range in the thousands of cycles,
1506 * it is possible such a time value has already been observed by the
1507 * guest. To protect against this, we must compute the system time as
1508 * observed by the guest and ensure the new system time is greater.
1511 if (vcpu->hv_clock.tsc_timestamp) {
1512 max_kernel_ns = vcpu->last_guest_tsc -
1513 vcpu->hv_clock.tsc_timestamp;
1514 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1515 vcpu->hv_clock.tsc_to_system_mul,
1516 vcpu->hv_clock.tsc_shift);
1517 max_kernel_ns += vcpu->last_kernel_ns;
1520 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1521 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1522 &vcpu->hv_clock.tsc_shift,
1523 &vcpu->hv_clock.tsc_to_system_mul);
1524 vcpu->hw_tsc_khz = this_tsc_khz;
1527 /* with a master <monotonic time, tsc value> tuple,
1528 * pvclock clock reads always increase at the (scaled) rate
1529 * of guest TSC - no need to deal with sampling errors.
1531 if (!use_master_clock) {
1532 if (max_kernel_ns > kernel_ns)
1533 kernel_ns = max_kernel_ns;
1535 /* With all the info we got, fill in the values */
1536 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1537 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1538 vcpu->last_kernel_ns = kernel_ns;
1539 vcpu->last_guest_tsc = tsc_timestamp;
1542 * The interface expects us to write an even number signaling that the
1543 * update is finished. Since the guest won't see the intermediate
1544 * state, we just increase by 2 at the end.
1546 vcpu->hv_clock.version += 2;
1548 if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1549 &guest_hv_clock, sizeof(guest_hv_clock))))
1552 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1553 pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1555 if (vcpu->pvclock_set_guest_stopped_request) {
1556 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1557 vcpu->pvclock_set_guest_stopped_request = false;
1560 /* If the host uses TSC clocksource, then it is stable */
1561 if (use_master_clock)
1562 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1564 vcpu->hv_clock.flags = pvclock_flags;
1566 kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1568 sizeof(vcpu->hv_clock));
1572 static bool msr_mtrr_valid(unsigned msr)
1575 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1576 case MSR_MTRRfix64K_00000:
1577 case MSR_MTRRfix16K_80000:
1578 case MSR_MTRRfix16K_A0000:
1579 case MSR_MTRRfix4K_C0000:
1580 case MSR_MTRRfix4K_C8000:
1581 case MSR_MTRRfix4K_D0000:
1582 case MSR_MTRRfix4K_D8000:
1583 case MSR_MTRRfix4K_E0000:
1584 case MSR_MTRRfix4K_E8000:
1585 case MSR_MTRRfix4K_F0000:
1586 case MSR_MTRRfix4K_F8000:
1587 case MSR_MTRRdefType:
1588 case MSR_IA32_CR_PAT:
1596 static bool valid_pat_type(unsigned t)
1598 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1601 static bool valid_mtrr_type(unsigned t)
1603 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1606 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1610 if (!msr_mtrr_valid(msr))
1613 if (msr == MSR_IA32_CR_PAT) {
1614 for (i = 0; i < 8; i++)
1615 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1618 } else if (msr == MSR_MTRRdefType) {
1621 return valid_mtrr_type(data & 0xff);
1622 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1623 for (i = 0; i < 8 ; i++)
1624 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1629 /* variable MTRRs */
1630 return valid_mtrr_type(data & 0xff);
1633 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1635 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1637 if (!mtrr_valid(vcpu, msr, data))
1640 if (msr == MSR_MTRRdefType) {
1641 vcpu->arch.mtrr_state.def_type = data;
1642 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1643 } else if (msr == MSR_MTRRfix64K_00000)
1645 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1646 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1647 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1648 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1649 else if (msr == MSR_IA32_CR_PAT)
1650 vcpu->arch.pat = data;
1651 else { /* Variable MTRRs */
1652 int idx, is_mtrr_mask;
1655 idx = (msr - 0x200) / 2;
1656 is_mtrr_mask = msr - 0x200 - 2 * idx;
1659 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1662 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1666 kvm_mmu_reset_context(vcpu);
1670 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1672 u64 mcg_cap = vcpu->arch.mcg_cap;
1673 unsigned bank_num = mcg_cap & 0xff;
1676 case MSR_IA32_MCG_STATUS:
1677 vcpu->arch.mcg_status = data;
1679 case MSR_IA32_MCG_CTL:
1680 if (!(mcg_cap & MCG_CTL_P))
1682 if (data != 0 && data != ~(u64)0)
1684 vcpu->arch.mcg_ctl = data;
1687 if (msr >= MSR_IA32_MC0_CTL &&
1688 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1689 u32 offset = msr - MSR_IA32_MC0_CTL;
1690 /* only 0 or all 1s can be written to IA32_MCi_CTL
1691 * some Linux kernels though clear bit 10 in bank 4 to
1692 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1693 * this to avoid an uncatched #GP in the guest
1695 if ((offset & 0x3) == 0 &&
1696 data != 0 && (data | (1 << 10)) != ~(u64)0)
1698 vcpu->arch.mce_banks[offset] = data;
1706 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1708 struct kvm *kvm = vcpu->kvm;
1709 int lm = is_long_mode(vcpu);
1710 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1711 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1712 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1713 : kvm->arch.xen_hvm_config.blob_size_32;
1714 u32 page_num = data & ~PAGE_MASK;
1715 u64 page_addr = data & PAGE_MASK;
1720 if (page_num >= blob_size)
1723 page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1728 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1737 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1739 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1742 static bool kvm_hv_msr_partition_wide(u32 msr)
1746 case HV_X64_MSR_GUEST_OS_ID:
1747 case HV_X64_MSR_HYPERCALL:
1755 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1757 struct kvm *kvm = vcpu->kvm;
1760 case HV_X64_MSR_GUEST_OS_ID:
1761 kvm->arch.hv_guest_os_id = data;
1762 /* setting guest os id to zero disables hypercall page */
1763 if (!kvm->arch.hv_guest_os_id)
1764 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1766 case HV_X64_MSR_HYPERCALL: {
1771 /* if guest os id is not set hypercall should remain disabled */
1772 if (!kvm->arch.hv_guest_os_id)
1774 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1775 kvm->arch.hv_hypercall = data;
1778 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1779 addr = gfn_to_hva(kvm, gfn);
1780 if (kvm_is_error_hva(addr))
1782 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1783 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1784 if (__copy_to_user((void __user *)addr, instructions, 4))
1786 kvm->arch.hv_hypercall = data;
1790 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1791 "data 0x%llx\n", msr, data);
1797 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1800 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1803 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1804 vcpu->arch.hv_vapic = data;
1807 addr = gfn_to_hva(vcpu->kvm, data >>
1808 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1809 if (kvm_is_error_hva(addr))
1811 if (__clear_user((void __user *)addr, PAGE_SIZE))
1813 vcpu->arch.hv_vapic = data;
1816 case HV_X64_MSR_EOI:
1817 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1818 case HV_X64_MSR_ICR:
1819 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1820 case HV_X64_MSR_TPR:
1821 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1823 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1824 "data 0x%llx\n", msr, data);
1831 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1833 gpa_t gpa = data & ~0x3f;
1835 /* Bits 2:5 are reserved, Should be zero */
1839 vcpu->arch.apf.msr_val = data;
1841 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1842 kvm_clear_async_pf_completion_queue(vcpu);
1843 kvm_async_pf_hash_reset(vcpu);
1847 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1850 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1851 kvm_async_pf_wakeup_all(vcpu);
1855 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1857 vcpu->arch.pv_time_enabled = false;
1860 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1864 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1867 delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1868 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1869 vcpu->arch.st.accum_steal = delta;
1872 static void record_steal_time(struct kvm_vcpu *vcpu)
1874 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1877 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1878 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1881 vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1882 vcpu->arch.st.steal.version += 2;
1883 vcpu->arch.st.accum_steal = 0;
1885 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1886 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1889 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1892 u32 msr = msr_info->index;
1893 u64 data = msr_info->data;
1896 case MSR_AMD64_NB_CFG:
1897 case MSR_IA32_UCODE_REV:
1898 case MSR_IA32_UCODE_WRITE:
1899 case MSR_VM_HSAVE_PA:
1900 case MSR_AMD64_PATCH_LOADER:
1901 case MSR_AMD64_BU_CFG2:
1905 return set_efer(vcpu, data);
1907 data &= ~(u64)0x40; /* ignore flush filter disable */
1908 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1909 data &= ~(u64)0x8; /* ignore TLB cache disable */
1911 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1916 case MSR_FAM10H_MMIO_CONF_BASE:
1918 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1923 case MSR_IA32_DEBUGCTLMSR:
1925 /* We support the non-activated case already */
1927 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1928 /* Values other than LBR and BTF are vendor-specific,
1929 thus reserved and should throw a #GP */
1932 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1935 case 0x200 ... 0x2ff:
1936 return set_msr_mtrr(vcpu, msr, data);
1937 case MSR_IA32_APICBASE:
1938 kvm_set_apic_base(vcpu, data);
1940 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1941 return kvm_x2apic_msr_write(vcpu, msr, data);
1942 case MSR_IA32_TSCDEADLINE:
1943 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1945 case MSR_IA32_TSC_ADJUST:
1946 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1947 if (!msr_info->host_initiated) {
1948 u64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1949 kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
1951 vcpu->arch.ia32_tsc_adjust_msr = data;
1954 case MSR_IA32_MISC_ENABLE:
1955 vcpu->arch.ia32_misc_enable_msr = data;
1957 case MSR_KVM_WALL_CLOCK_NEW:
1958 case MSR_KVM_WALL_CLOCK:
1959 vcpu->kvm->arch.wall_clock = data;
1960 kvm_write_wall_clock(vcpu->kvm, data);
1962 case MSR_KVM_SYSTEM_TIME_NEW:
1963 case MSR_KVM_SYSTEM_TIME: {
1965 kvmclock_reset(vcpu);
1967 vcpu->arch.time = data;
1968 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1970 /* we verify if the enable bit is set... */
1974 gpa_offset = data & ~(PAGE_MASK | 1);
1976 /* Check that the address is 32-byte aligned. */
1977 if (gpa_offset & (sizeof(struct pvclock_vcpu_time_info) - 1))
1980 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
1981 &vcpu->arch.pv_time, data & ~1ULL))
1982 vcpu->arch.pv_time_enabled = false;
1984 vcpu->arch.pv_time_enabled = true;
1988 case MSR_KVM_ASYNC_PF_EN:
1989 if (kvm_pv_enable_async_pf(vcpu, data))
1992 case MSR_KVM_STEAL_TIME:
1994 if (unlikely(!sched_info_on()))
1997 if (data & KVM_STEAL_RESERVED_MASK)
2000 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2001 data & KVM_STEAL_VALID_BITS))
2004 vcpu->arch.st.msr_val = data;
2006 if (!(data & KVM_MSR_ENABLED))
2009 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2012 accumulate_steal_time(vcpu);
2015 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2018 case MSR_KVM_PV_EOI_EN:
2019 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2023 case MSR_IA32_MCG_CTL:
2024 case MSR_IA32_MCG_STATUS:
2025 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2026 return set_msr_mce(vcpu, msr, data);
2028 /* Performance counters are not protected by a CPUID bit,
2029 * so we should check all of them in the generic path for the sake of
2030 * cross vendor migration.
2031 * Writing a zero into the event select MSRs disables them,
2032 * which we perfectly emulate ;-). Any other value should be at least
2033 * reported, some guests depend on them.
2035 case MSR_K7_EVNTSEL0:
2036 case MSR_K7_EVNTSEL1:
2037 case MSR_K7_EVNTSEL2:
2038 case MSR_K7_EVNTSEL3:
2040 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2041 "0x%x data 0x%llx\n", msr, data);
2043 /* at least RHEL 4 unconditionally writes to the perfctr registers,
2044 * so we ignore writes to make it happy.
2046 case MSR_K7_PERFCTR0:
2047 case MSR_K7_PERFCTR1:
2048 case MSR_K7_PERFCTR2:
2049 case MSR_K7_PERFCTR3:
2050 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
2051 "0x%x data 0x%llx\n", msr, data);
2053 case MSR_P6_PERFCTR0:
2054 case MSR_P6_PERFCTR1:
2056 case MSR_P6_EVNTSEL0:
2057 case MSR_P6_EVNTSEL1:
2058 if (kvm_pmu_msr(vcpu, msr))
2059 return kvm_pmu_set_msr(vcpu, msr_info);
2061 if (pr || data != 0)
2062 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2063 "0x%x data 0x%llx\n", msr, data);
2065 case MSR_K7_CLK_CTL:
2067 * Ignore all writes to this no longer documented MSR.
2068 * Writes are only relevant for old K7 processors,
2069 * all pre-dating SVM, but a recommended workaround from
2070 * AMD for these chips. It is possible to specify the
2071 * affected processor models on the command line, hence
2072 * the need to ignore the workaround.
2075 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2076 if (kvm_hv_msr_partition_wide(msr)) {
2078 mutex_lock(&vcpu->kvm->lock);
2079 r = set_msr_hyperv_pw(vcpu, msr, data);
2080 mutex_unlock(&vcpu->kvm->lock);
2083 return set_msr_hyperv(vcpu, msr, data);
2085 case MSR_IA32_BBL_CR_CTL3:
2086 /* Drop writes to this legacy MSR -- see rdmsr
2087 * counterpart for further detail.
2089 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2091 case MSR_AMD64_OSVW_ID_LENGTH:
2092 if (!guest_cpuid_has_osvw(vcpu))
2094 vcpu->arch.osvw.length = data;
2096 case MSR_AMD64_OSVW_STATUS:
2097 if (!guest_cpuid_has_osvw(vcpu))
2099 vcpu->arch.osvw.status = data;
2102 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2103 return xen_hvm_config(vcpu, data);
2104 if (kvm_pmu_msr(vcpu, msr))
2105 return kvm_pmu_set_msr(vcpu, msr_info);
2107 vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2111 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2118 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2122 * Reads an msr value (of 'msr_index') into 'pdata'.
2123 * Returns 0 on success, non-0 otherwise.
2124 * Assumes vcpu_load() was already called.
2126 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2128 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
2131 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2133 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
2135 if (!msr_mtrr_valid(msr))
2138 if (msr == MSR_MTRRdefType)
2139 *pdata = vcpu->arch.mtrr_state.def_type +
2140 (vcpu->arch.mtrr_state.enabled << 10);
2141 else if (msr == MSR_MTRRfix64K_00000)
2143 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
2144 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
2145 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
2146 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
2147 else if (msr == MSR_IA32_CR_PAT)
2148 *pdata = vcpu->arch.pat;
2149 else { /* Variable MTRRs */
2150 int idx, is_mtrr_mask;
2153 idx = (msr - 0x200) / 2;
2154 is_mtrr_mask = msr - 0x200 - 2 * idx;
2157 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
2160 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
2167 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2170 u64 mcg_cap = vcpu->arch.mcg_cap;
2171 unsigned bank_num = mcg_cap & 0xff;
2174 case MSR_IA32_P5_MC_ADDR:
2175 case MSR_IA32_P5_MC_TYPE:
2178 case MSR_IA32_MCG_CAP:
2179 data = vcpu->arch.mcg_cap;
2181 case MSR_IA32_MCG_CTL:
2182 if (!(mcg_cap & MCG_CTL_P))
2184 data = vcpu->arch.mcg_ctl;
2186 case MSR_IA32_MCG_STATUS:
2187 data = vcpu->arch.mcg_status;
2190 if (msr >= MSR_IA32_MC0_CTL &&
2191 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
2192 u32 offset = msr - MSR_IA32_MC0_CTL;
2193 data = vcpu->arch.mce_banks[offset];
2202 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2205 struct kvm *kvm = vcpu->kvm;
2208 case HV_X64_MSR_GUEST_OS_ID:
2209 data = kvm->arch.hv_guest_os_id;
2211 case HV_X64_MSR_HYPERCALL:
2212 data = kvm->arch.hv_hypercall;
2215 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2223 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2228 case HV_X64_MSR_VP_INDEX: {
2231 kvm_for_each_vcpu(r, v, vcpu->kvm)
2236 case HV_X64_MSR_EOI:
2237 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
2238 case HV_X64_MSR_ICR:
2239 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
2240 case HV_X64_MSR_TPR:
2241 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
2242 case HV_X64_MSR_APIC_ASSIST_PAGE:
2243 data = vcpu->arch.hv_vapic;
2246 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
2253 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2258 case MSR_IA32_PLATFORM_ID:
2259 case MSR_IA32_EBL_CR_POWERON:
2260 case MSR_IA32_DEBUGCTLMSR:
2261 case MSR_IA32_LASTBRANCHFROMIP:
2262 case MSR_IA32_LASTBRANCHTOIP:
2263 case MSR_IA32_LASTINTFROMIP:
2264 case MSR_IA32_LASTINTTOIP:
2267 case MSR_VM_HSAVE_PA:
2268 case MSR_K7_EVNTSEL0:
2269 case MSR_K7_PERFCTR0:
2270 case MSR_K8_INT_PENDING_MSG:
2271 case MSR_AMD64_NB_CFG:
2272 case MSR_FAM10H_MMIO_CONF_BASE:
2273 case MSR_AMD64_BU_CFG2:
2276 case MSR_P6_PERFCTR0:
2277 case MSR_P6_PERFCTR1:
2278 case MSR_P6_EVNTSEL0:
2279 case MSR_P6_EVNTSEL1:
2280 if (kvm_pmu_msr(vcpu, msr))
2281 return kvm_pmu_get_msr(vcpu, msr, pdata);
2284 case MSR_IA32_UCODE_REV:
2285 data = 0x100000000ULL;
2288 data = 0x500 | KVM_NR_VAR_MTRR;
2290 case 0x200 ... 0x2ff:
2291 return get_msr_mtrr(vcpu, msr, pdata);
2292 case 0xcd: /* fsb frequency */
2296 * MSR_EBC_FREQUENCY_ID
2297 * Conservative value valid for even the basic CPU models.
2298 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2299 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2300 * and 266MHz for model 3, or 4. Set Core Clock
2301 * Frequency to System Bus Frequency Ratio to 1 (bits
2302 * 31:24) even though these are only valid for CPU
2303 * models > 2, however guests may end up dividing or
2304 * multiplying by zero otherwise.
2306 case MSR_EBC_FREQUENCY_ID:
2309 case MSR_IA32_APICBASE:
2310 data = kvm_get_apic_base(vcpu);
2312 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2313 return kvm_x2apic_msr_read(vcpu, msr, pdata);
2315 case MSR_IA32_TSCDEADLINE:
2316 data = kvm_get_lapic_tscdeadline_msr(vcpu);
2318 case MSR_IA32_TSC_ADJUST:
2319 data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2321 case MSR_IA32_MISC_ENABLE:
2322 data = vcpu->arch.ia32_misc_enable_msr;
2324 case MSR_IA32_PERF_STATUS:
2325 /* TSC increment by tick */
2327 /* CPU multiplier */
2328 data |= (((uint64_t)4ULL) << 40);
2331 data = vcpu->arch.efer;
2333 case MSR_KVM_WALL_CLOCK:
2334 case MSR_KVM_WALL_CLOCK_NEW:
2335 data = vcpu->kvm->arch.wall_clock;
2337 case MSR_KVM_SYSTEM_TIME:
2338 case MSR_KVM_SYSTEM_TIME_NEW:
2339 data = vcpu->arch.time;
2341 case MSR_KVM_ASYNC_PF_EN:
2342 data = vcpu->arch.apf.msr_val;
2344 case MSR_KVM_STEAL_TIME:
2345 data = vcpu->arch.st.msr_val;
2347 case MSR_KVM_PV_EOI_EN:
2348 data = vcpu->arch.pv_eoi.msr_val;
2350 case MSR_IA32_P5_MC_ADDR:
2351 case MSR_IA32_P5_MC_TYPE:
2352 case MSR_IA32_MCG_CAP:
2353 case MSR_IA32_MCG_CTL:
2354 case MSR_IA32_MCG_STATUS:
2355 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2356 return get_msr_mce(vcpu, msr, pdata);
2357 case MSR_K7_CLK_CTL:
2359 * Provide expected ramp-up count for K7. All other
2360 * are set to zero, indicating minimum divisors for
2363 * This prevents guest kernels on AMD host with CPU
2364 * type 6, model 8 and higher from exploding due to
2365 * the rdmsr failing.
2369 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2370 if (kvm_hv_msr_partition_wide(msr)) {
2372 mutex_lock(&vcpu->kvm->lock);
2373 r = get_msr_hyperv_pw(vcpu, msr, pdata);
2374 mutex_unlock(&vcpu->kvm->lock);
2377 return get_msr_hyperv(vcpu, msr, pdata);
2379 case MSR_IA32_BBL_CR_CTL3:
2380 /* This legacy MSR exists but isn't fully documented in current
2381 * silicon. It is however accessed by winxp in very narrow
2382 * scenarios where it sets bit #19, itself documented as
2383 * a "reserved" bit. Best effort attempt to source coherent
2384 * read data here should the balance of the register be
2385 * interpreted by the guest:
2387 * L2 cache control register 3: 64GB range, 256KB size,
2388 * enabled, latency 0x1, configured
2392 case MSR_AMD64_OSVW_ID_LENGTH:
2393 if (!guest_cpuid_has_osvw(vcpu))
2395 data = vcpu->arch.osvw.length;
2397 case MSR_AMD64_OSVW_STATUS:
2398 if (!guest_cpuid_has_osvw(vcpu))
2400 data = vcpu->arch.osvw.status;
2403 if (kvm_pmu_msr(vcpu, msr))
2404 return kvm_pmu_get_msr(vcpu, msr, pdata);
2406 vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2409 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2417 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2420 * Read or write a bunch of msrs. All parameters are kernel addresses.
2422 * @return number of msrs set successfully.
2424 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2425 struct kvm_msr_entry *entries,
2426 int (*do_msr)(struct kvm_vcpu *vcpu,
2427 unsigned index, u64 *data))
2431 idx = srcu_read_lock(&vcpu->kvm->srcu);
2432 for (i = 0; i < msrs->nmsrs; ++i)
2433 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2435 srcu_read_unlock(&vcpu->kvm->srcu, idx);
2441 * Read or write a bunch of msrs. Parameters are user addresses.
2443 * @return number of msrs set successfully.
2445 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2446 int (*do_msr)(struct kvm_vcpu *vcpu,
2447 unsigned index, u64 *data),
2450 struct kvm_msrs msrs;
2451 struct kvm_msr_entry *entries;
2456 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2460 if (msrs.nmsrs >= MAX_IO_MSRS)
2463 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2464 entries = memdup_user(user_msrs->entries, size);
2465 if (IS_ERR(entries)) {
2466 r = PTR_ERR(entries);
2470 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2475 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2486 int kvm_dev_ioctl_check_extension(long ext)
2491 case KVM_CAP_IRQCHIP:
2493 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2494 case KVM_CAP_SET_TSS_ADDR:
2495 case KVM_CAP_EXT_CPUID:
2496 case KVM_CAP_CLOCKSOURCE:
2498 case KVM_CAP_NOP_IO_DELAY:
2499 case KVM_CAP_MP_STATE:
2500 case KVM_CAP_SYNC_MMU:
2501 case KVM_CAP_USER_NMI:
2502 case KVM_CAP_REINJECT_CONTROL:
2503 case KVM_CAP_IRQ_INJECT_STATUS:
2505 case KVM_CAP_IOEVENTFD:
2507 case KVM_CAP_PIT_STATE2:
2508 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2509 case KVM_CAP_XEN_HVM:
2510 case KVM_CAP_ADJUST_CLOCK:
2511 case KVM_CAP_VCPU_EVENTS:
2512 case KVM_CAP_HYPERV:
2513 case KVM_CAP_HYPERV_VAPIC:
2514 case KVM_CAP_HYPERV_SPIN:
2515 case KVM_CAP_PCI_SEGMENT:
2516 case KVM_CAP_DEBUGREGS:
2517 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2519 case KVM_CAP_ASYNC_PF:
2520 case KVM_CAP_GET_TSC_KHZ:
2521 case KVM_CAP_KVMCLOCK_CTRL:
2522 case KVM_CAP_READONLY_MEM:
2523 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2524 case KVM_CAP_ASSIGN_DEV_IRQ:
2525 case KVM_CAP_PCI_2_3:
2529 case KVM_CAP_COALESCED_MMIO:
2530 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2533 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2535 case KVM_CAP_NR_VCPUS:
2536 r = KVM_SOFT_MAX_VCPUS;
2538 case KVM_CAP_MAX_VCPUS:
2541 case KVM_CAP_NR_MEMSLOTS:
2542 r = KVM_USER_MEM_SLOTS;
2544 case KVM_CAP_PV_MMU: /* obsolete */
2548 r = iommu_present(&pci_bus_type);
2551 r = KVM_MAX_MCE_BANKS;
2556 case KVM_CAP_TSC_CONTROL:
2557 r = kvm_has_tsc_control;
2559 case KVM_CAP_TSC_DEADLINE_TIMER:
2560 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2570 long kvm_arch_dev_ioctl(struct file *filp,
2571 unsigned int ioctl, unsigned long arg)
2573 void __user *argp = (void __user *)arg;
2577 case KVM_GET_MSR_INDEX_LIST: {
2578 struct kvm_msr_list __user *user_msr_list = argp;
2579 struct kvm_msr_list msr_list;
2583 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2586 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2587 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2590 if (n < msr_list.nmsrs)
2593 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2594 num_msrs_to_save * sizeof(u32)))
2596 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2598 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2603 case KVM_GET_SUPPORTED_CPUID: {
2604 struct kvm_cpuid2 __user *cpuid_arg = argp;
2605 struct kvm_cpuid2 cpuid;
2608 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2610 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2611 cpuid_arg->entries);
2616 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2621 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2624 mce_cap = KVM_MCE_CAP_SUPPORTED;
2626 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2638 static void wbinvd_ipi(void *garbage)
2643 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2645 return vcpu->kvm->arch.iommu_domain &&
2646 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2649 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2651 /* Address WBINVD may be executed by guest */
2652 if (need_emulate_wbinvd(vcpu)) {
2653 if (kvm_x86_ops->has_wbinvd_exit())
2654 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2655 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2656 smp_call_function_single(vcpu->cpu,
2657 wbinvd_ipi, NULL, 1);
2660 kvm_x86_ops->vcpu_load(vcpu, cpu);
2662 /* Apply any externally detected TSC adjustments (due to suspend) */
2663 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2664 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2665 vcpu->arch.tsc_offset_adjustment = 0;
2666 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2669 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2670 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2671 native_read_tsc() - vcpu->arch.last_host_tsc;
2673 mark_tsc_unstable("KVM discovered backwards TSC");
2674 if (check_tsc_unstable()) {
2675 u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2676 vcpu->arch.last_guest_tsc);
2677 kvm_x86_ops->write_tsc_offset(vcpu, offset);
2678 vcpu->arch.tsc_catchup = 1;
2681 * On a host with synchronized TSC, there is no need to update
2682 * kvmclock on vcpu->cpu migration
2684 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2685 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2686 if (vcpu->cpu != cpu)
2687 kvm_migrate_timers(vcpu);
2691 accumulate_steal_time(vcpu);
2692 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2695 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2697 kvm_x86_ops->vcpu_put(vcpu);
2698 kvm_put_guest_fpu(vcpu);
2699 vcpu->arch.last_host_tsc = native_read_tsc();
2702 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2703 struct kvm_lapic_state *s)
2705 kvm_x86_ops->sync_pir_to_irr(vcpu);
2706 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2711 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2712 struct kvm_lapic_state *s)
2714 kvm_apic_post_state_restore(vcpu, s);
2715 update_cr8_intercept(vcpu);
2720 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2721 struct kvm_interrupt *irq)
2723 if (irq->irq >= KVM_NR_INTERRUPTS)
2725 if (irqchip_in_kernel(vcpu->kvm))
2728 kvm_queue_interrupt(vcpu, irq->irq, false);
2729 kvm_make_request(KVM_REQ_EVENT, vcpu);
2734 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2736 kvm_inject_nmi(vcpu);
2741 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2742 struct kvm_tpr_access_ctl *tac)
2746 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2750 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2754 unsigned bank_num = mcg_cap & 0xff, bank;
2757 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2759 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2762 vcpu->arch.mcg_cap = mcg_cap;
2763 /* Init IA32_MCG_CTL to all 1s */
2764 if (mcg_cap & MCG_CTL_P)
2765 vcpu->arch.mcg_ctl = ~(u64)0;
2766 /* Init IA32_MCi_CTL to all 1s */
2767 for (bank = 0; bank < bank_num; bank++)
2768 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2773 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2774 struct kvm_x86_mce *mce)
2776 u64 mcg_cap = vcpu->arch.mcg_cap;
2777 unsigned bank_num = mcg_cap & 0xff;
2778 u64 *banks = vcpu->arch.mce_banks;
2780 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2783 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2784 * reporting is disabled
2786 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2787 vcpu->arch.mcg_ctl != ~(u64)0)
2789 banks += 4 * mce->bank;
2791 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2792 * reporting is disabled for the bank
2794 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2796 if (mce->status & MCI_STATUS_UC) {
2797 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2798 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2799 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2802 if (banks[1] & MCI_STATUS_VAL)
2803 mce->status |= MCI_STATUS_OVER;
2804 banks[2] = mce->addr;
2805 banks[3] = mce->misc;
2806 vcpu->arch.mcg_status = mce->mcg_status;
2807 banks[1] = mce->status;
2808 kvm_queue_exception(vcpu, MC_VECTOR);
2809 } else if (!(banks[1] & MCI_STATUS_VAL)
2810 || !(banks[1] & MCI_STATUS_UC)) {
2811 if (banks[1] & MCI_STATUS_VAL)
2812 mce->status |= MCI_STATUS_OVER;
2813 banks[2] = mce->addr;
2814 banks[3] = mce->misc;
2815 banks[1] = mce->status;
2817 banks[1] |= MCI_STATUS_OVER;
2821 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2822 struct kvm_vcpu_events *events)
2825 events->exception.injected =
2826 vcpu->arch.exception.pending &&
2827 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2828 events->exception.nr = vcpu->arch.exception.nr;
2829 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2830 events->exception.pad = 0;
2831 events->exception.error_code = vcpu->arch.exception.error_code;
2833 events->interrupt.injected =
2834 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2835 events->interrupt.nr = vcpu->arch.interrupt.nr;
2836 events->interrupt.soft = 0;
2837 events->interrupt.shadow =
2838 kvm_x86_ops->get_interrupt_shadow(vcpu,
2839 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2841 events->nmi.injected = vcpu->arch.nmi_injected;
2842 events->nmi.pending = vcpu->arch.nmi_pending != 0;
2843 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2844 events->nmi.pad = 0;
2846 events->sipi_vector = 0; /* never valid when reporting to user space */
2848 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2849 | KVM_VCPUEVENT_VALID_SHADOW);
2850 memset(&events->reserved, 0, sizeof(events->reserved));
2853 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2854 struct kvm_vcpu_events *events)
2856 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2857 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2858 | KVM_VCPUEVENT_VALID_SHADOW))
2862 vcpu->arch.exception.pending = events->exception.injected;
2863 vcpu->arch.exception.nr = events->exception.nr;
2864 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2865 vcpu->arch.exception.error_code = events->exception.error_code;
2867 vcpu->arch.interrupt.pending = events->interrupt.injected;
2868 vcpu->arch.interrupt.nr = events->interrupt.nr;
2869 vcpu->arch.interrupt.soft = events->interrupt.soft;
2870 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2871 kvm_x86_ops->set_interrupt_shadow(vcpu,
2872 events->interrupt.shadow);
2874 vcpu->arch.nmi_injected = events->nmi.injected;
2875 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2876 vcpu->arch.nmi_pending = events->nmi.pending;
2877 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2879 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2880 kvm_vcpu_has_lapic(vcpu))
2881 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2883 kvm_make_request(KVM_REQ_EVENT, vcpu);
2888 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2889 struct kvm_debugregs *dbgregs)
2891 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2892 dbgregs->dr6 = vcpu->arch.dr6;
2893 dbgregs->dr7 = vcpu->arch.dr7;
2895 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2898 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2899 struct kvm_debugregs *dbgregs)
2904 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2905 vcpu->arch.dr6 = dbgregs->dr6;
2906 vcpu->arch.dr7 = dbgregs->dr7;
2911 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2912 struct kvm_xsave *guest_xsave)
2915 memcpy(guest_xsave->region,
2916 &vcpu->arch.guest_fpu.state->xsave,
2919 memcpy(guest_xsave->region,
2920 &vcpu->arch.guest_fpu.state->fxsave,
2921 sizeof(struct i387_fxsave_struct));
2922 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2927 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2928 struct kvm_xsave *guest_xsave)
2931 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2934 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2935 guest_xsave->region, xstate_size);
2937 if (xstate_bv & ~XSTATE_FPSSE)
2939 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2940 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2945 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2946 struct kvm_xcrs *guest_xcrs)
2948 if (!cpu_has_xsave) {
2949 guest_xcrs->nr_xcrs = 0;
2953 guest_xcrs->nr_xcrs = 1;
2954 guest_xcrs->flags = 0;
2955 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2956 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2959 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2960 struct kvm_xcrs *guest_xcrs)
2967 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2970 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2971 /* Only support XCR0 currently */
2972 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2973 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2974 guest_xcrs->xcrs[0].value);
2983 * kvm_set_guest_paused() indicates to the guest kernel that it has been
2984 * stopped by the hypervisor. This function will be called from the host only.
2985 * EINVAL is returned when the host attempts to set the flag for a guest that
2986 * does not support pv clocks.
2988 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
2990 if (!vcpu->arch.pv_time_enabled)
2992 vcpu->arch.pvclock_set_guest_stopped_request = true;
2993 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2997 long kvm_arch_vcpu_ioctl(struct file *filp,
2998 unsigned int ioctl, unsigned long arg)
3000 struct kvm_vcpu *vcpu = filp->private_data;
3001 void __user *argp = (void __user *)arg;
3004 struct kvm_lapic_state *lapic;
3005 struct kvm_xsave *xsave;
3006 struct kvm_xcrs *xcrs;
3012 case KVM_GET_LAPIC: {
3014 if (!vcpu->arch.apic)
3016 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3021 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3025 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3030 case KVM_SET_LAPIC: {
3032 if (!vcpu->arch.apic)
3034 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3035 if (IS_ERR(u.lapic))
3036 return PTR_ERR(u.lapic);
3038 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3041 case KVM_INTERRUPT: {
3042 struct kvm_interrupt irq;
3045 if (copy_from_user(&irq, argp, sizeof irq))
3047 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3051 r = kvm_vcpu_ioctl_nmi(vcpu);
3054 case KVM_SET_CPUID: {
3055 struct kvm_cpuid __user *cpuid_arg = argp;
3056 struct kvm_cpuid cpuid;
3059 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3061 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3064 case KVM_SET_CPUID2: {
3065 struct kvm_cpuid2 __user *cpuid_arg = argp;
3066 struct kvm_cpuid2 cpuid;
3069 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3071 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3072 cpuid_arg->entries);
3075 case KVM_GET_CPUID2: {
3076 struct kvm_cpuid2 __user *cpuid_arg = argp;
3077 struct kvm_cpuid2 cpuid;
3080 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3082 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3083 cpuid_arg->entries);
3087 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3093 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3096 r = msr_io(vcpu, argp, do_set_msr, 0);
3098 case KVM_TPR_ACCESS_REPORTING: {
3099 struct kvm_tpr_access_ctl tac;
3102 if (copy_from_user(&tac, argp, sizeof tac))
3104 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3108 if (copy_to_user(argp, &tac, sizeof tac))
3113 case KVM_SET_VAPIC_ADDR: {
3114 struct kvm_vapic_addr va;
3117 if (!irqchip_in_kernel(vcpu->kvm))
3120 if (copy_from_user(&va, argp, sizeof va))
3123 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3126 case KVM_X86_SETUP_MCE: {
3130 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3132 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3135 case KVM_X86_SET_MCE: {
3136 struct kvm_x86_mce mce;
3139 if (copy_from_user(&mce, argp, sizeof mce))
3141 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3144 case KVM_GET_VCPU_EVENTS: {
3145 struct kvm_vcpu_events events;
3147 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3150 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3155 case KVM_SET_VCPU_EVENTS: {
3156 struct kvm_vcpu_events events;
3159 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3162 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3165 case KVM_GET_DEBUGREGS: {
3166 struct kvm_debugregs dbgregs;
3168 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3171 if (copy_to_user(argp, &dbgregs,
3172 sizeof(struct kvm_debugregs)))
3177 case KVM_SET_DEBUGREGS: {
3178 struct kvm_debugregs dbgregs;
3181 if (copy_from_user(&dbgregs, argp,
3182 sizeof(struct kvm_debugregs)))
3185 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3188 case KVM_GET_XSAVE: {
3189 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3194 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3197 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3202 case KVM_SET_XSAVE: {
3203 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3204 if (IS_ERR(u.xsave))
3205 return PTR_ERR(u.xsave);
3207 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3210 case KVM_GET_XCRS: {
3211 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3216 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3219 if (copy_to_user(argp, u.xcrs,
3220 sizeof(struct kvm_xcrs)))
3225 case KVM_SET_XCRS: {
3226 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3228 return PTR_ERR(u.xcrs);
3230 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3233 case KVM_SET_TSC_KHZ: {
3237 user_tsc_khz = (u32)arg;
3239 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3242 if (user_tsc_khz == 0)
3243 user_tsc_khz = tsc_khz;
3245 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3250 case KVM_GET_TSC_KHZ: {
3251 r = vcpu->arch.virtual_tsc_khz;
3254 case KVM_KVMCLOCK_CTRL: {
3255 r = kvm_set_guest_paused(vcpu);
3266 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3268 return VM_FAULT_SIGBUS;
3271 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3275 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3277 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3281 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3284 kvm->arch.ept_identity_map_addr = ident_addr;
3288 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3289 u32 kvm_nr_mmu_pages)
3291 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3294 mutex_lock(&kvm->slots_lock);
3296 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3297 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3299 mutex_unlock(&kvm->slots_lock);
3303 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3305 return kvm->arch.n_max_mmu_pages;
3308 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3313 switch (chip->chip_id) {
3314 case KVM_IRQCHIP_PIC_MASTER:
3315 memcpy(&chip->chip.pic,
3316 &pic_irqchip(kvm)->pics[0],
3317 sizeof(struct kvm_pic_state));
3319 case KVM_IRQCHIP_PIC_SLAVE:
3320 memcpy(&chip->chip.pic,
3321 &pic_irqchip(kvm)->pics[1],
3322 sizeof(struct kvm_pic_state));
3324 case KVM_IRQCHIP_IOAPIC:
3325 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3334 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3339 switch (chip->chip_id) {
3340 case KVM_IRQCHIP_PIC_MASTER:
3341 spin_lock(&pic_irqchip(kvm)->lock);
3342 memcpy(&pic_irqchip(kvm)->pics[0],
3344 sizeof(struct kvm_pic_state));
3345 spin_unlock(&pic_irqchip(kvm)->lock);
3347 case KVM_IRQCHIP_PIC_SLAVE:
3348 spin_lock(&pic_irqchip(kvm)->lock);
3349 memcpy(&pic_irqchip(kvm)->pics[1],
3351 sizeof(struct kvm_pic_state));
3352 spin_unlock(&pic_irqchip(kvm)->lock);
3354 case KVM_IRQCHIP_IOAPIC:
3355 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3361 kvm_pic_update_irq(pic_irqchip(kvm));
3365 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3369 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3370 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3371 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3375 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3379 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3380 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3381 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3382 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3386 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3390 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3391 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3392 sizeof(ps->channels));
3393 ps->flags = kvm->arch.vpit->pit_state.flags;
3394 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3395 memset(&ps->reserved, 0, sizeof(ps->reserved));
3399 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3401 int r = 0, start = 0;
3402 u32 prev_legacy, cur_legacy;
3403 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3404 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3405 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3406 if (!prev_legacy && cur_legacy)
3408 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3409 sizeof(kvm->arch.vpit->pit_state.channels));
3410 kvm->arch.vpit->pit_state.flags = ps->flags;
3411 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3412 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3416 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3417 struct kvm_reinject_control *control)
3419 if (!kvm->arch.vpit)
3421 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3422 kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3423 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3428 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3429 * @kvm: kvm instance
3430 * @log: slot id and address to which we copy the log
3432 * We need to keep it in mind that VCPU threads can write to the bitmap
3433 * concurrently. So, to avoid losing data, we keep the following order for
3436 * 1. Take a snapshot of the bit and clear it if needed.
3437 * 2. Write protect the corresponding page.
3438 * 3. Flush TLB's if needed.
3439 * 4. Copy the snapshot to the userspace.
3441 * Between 2 and 3, the guest may write to the page using the remaining TLB
3442 * entry. This is not a problem because the page will be reported dirty at
3443 * step 4 using the snapshot taken before and step 3 ensures that successive
3444 * writes will be logged for the next call.
3446 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3449 struct kvm_memory_slot *memslot;
3451 unsigned long *dirty_bitmap;
3452 unsigned long *dirty_bitmap_buffer;
3453 bool is_dirty = false;
3455 mutex_lock(&kvm->slots_lock);
3458 if (log->slot >= KVM_USER_MEM_SLOTS)
3461 memslot = id_to_memslot(kvm->memslots, log->slot);
3463 dirty_bitmap = memslot->dirty_bitmap;
3468 n = kvm_dirty_bitmap_bytes(memslot);
3470 dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3471 memset(dirty_bitmap_buffer, 0, n);
3473 spin_lock(&kvm->mmu_lock);
3475 for (i = 0; i < n / sizeof(long); i++) {
3479 if (!dirty_bitmap[i])
3484 mask = xchg(&dirty_bitmap[i], 0);
3485 dirty_bitmap_buffer[i] = mask;
3487 offset = i * BITS_PER_LONG;
3488 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3491 kvm_flush_remote_tlbs(kvm);
3493 spin_unlock(&kvm->mmu_lock);
3496 if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3501 mutex_unlock(&kvm->slots_lock);
3505 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3508 if (!irqchip_in_kernel(kvm))
3511 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3512 irq_event->irq, irq_event->level,
3517 long kvm_arch_vm_ioctl(struct file *filp,
3518 unsigned int ioctl, unsigned long arg)
3520 struct kvm *kvm = filp->private_data;
3521 void __user *argp = (void __user *)arg;
3524 * This union makes it completely explicit to gcc-3.x
3525 * that these two variables' stack usage should be
3526 * combined, not added together.
3529 struct kvm_pit_state ps;
3530 struct kvm_pit_state2 ps2;
3531 struct kvm_pit_config pit_config;
3535 case KVM_SET_TSS_ADDR:
3536 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3538 case KVM_SET_IDENTITY_MAP_ADDR: {
3542 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3544 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3547 case KVM_SET_NR_MMU_PAGES:
3548 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3550 case KVM_GET_NR_MMU_PAGES:
3551 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3553 case KVM_CREATE_IRQCHIP: {
3554 struct kvm_pic *vpic;
3556 mutex_lock(&kvm->lock);
3559 goto create_irqchip_unlock;
3561 if (atomic_read(&kvm->online_vcpus))
3562 goto create_irqchip_unlock;
3564 vpic = kvm_create_pic(kvm);
3566 r = kvm_ioapic_init(kvm);
3568 mutex_lock(&kvm->slots_lock);
3569 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3571 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3573 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3575 mutex_unlock(&kvm->slots_lock);
3577 goto create_irqchip_unlock;
3580 goto create_irqchip_unlock;
3582 kvm->arch.vpic = vpic;
3584 r = kvm_setup_default_irq_routing(kvm);
3586 mutex_lock(&kvm->slots_lock);
3587 mutex_lock(&kvm->irq_lock);
3588 kvm_ioapic_destroy(kvm);
3589 kvm_destroy_pic(kvm);
3590 mutex_unlock(&kvm->irq_lock);
3591 mutex_unlock(&kvm->slots_lock);
3593 create_irqchip_unlock:
3594 mutex_unlock(&kvm->lock);
3597 case KVM_CREATE_PIT:
3598 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3600 case KVM_CREATE_PIT2:
3602 if (copy_from_user(&u.pit_config, argp,
3603 sizeof(struct kvm_pit_config)))
3606 mutex_lock(&kvm->slots_lock);
3609 goto create_pit_unlock;
3611 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3615 mutex_unlock(&kvm->slots_lock);
3617 case KVM_GET_IRQCHIP: {
3618 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3619 struct kvm_irqchip *chip;
3621 chip = memdup_user(argp, sizeof(*chip));
3628 if (!irqchip_in_kernel(kvm))
3629 goto get_irqchip_out;
3630 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3632 goto get_irqchip_out;
3634 if (copy_to_user(argp, chip, sizeof *chip))
3635 goto get_irqchip_out;
3641 case KVM_SET_IRQCHIP: {
3642 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3643 struct kvm_irqchip *chip;
3645 chip = memdup_user(argp, sizeof(*chip));
3652 if (!irqchip_in_kernel(kvm))
3653 goto set_irqchip_out;
3654 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3656 goto set_irqchip_out;
3664 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3667 if (!kvm->arch.vpit)
3669 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3673 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3680 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3683 if (!kvm->arch.vpit)
3685 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3688 case KVM_GET_PIT2: {
3690 if (!kvm->arch.vpit)
3692 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3696 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3701 case KVM_SET_PIT2: {
3703 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3706 if (!kvm->arch.vpit)
3708 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3711 case KVM_REINJECT_CONTROL: {
3712 struct kvm_reinject_control control;
3714 if (copy_from_user(&control, argp, sizeof(control)))
3716 r = kvm_vm_ioctl_reinject(kvm, &control);
3719 case KVM_XEN_HVM_CONFIG: {
3721 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3722 sizeof(struct kvm_xen_hvm_config)))
3725 if (kvm->arch.xen_hvm_config.flags)
3730 case KVM_SET_CLOCK: {
3731 struct kvm_clock_data user_ns;
3736 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3744 local_irq_disable();
3745 now_ns = get_kernel_ns();
3746 delta = user_ns.clock - now_ns;
3748 kvm->arch.kvmclock_offset = delta;
3751 case KVM_GET_CLOCK: {
3752 struct kvm_clock_data user_ns;
3755 local_irq_disable();
3756 now_ns = get_kernel_ns();
3757 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3760 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3763 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3776 static void kvm_init_msr_list(void)
3781 /* skip the first msrs in the list. KVM-specific */
3782 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3783 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3786 msrs_to_save[j] = msrs_to_save[i];
3789 num_msrs_to_save = j;
3792 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3800 if (!(vcpu->arch.apic &&
3801 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3802 && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3813 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3820 if (!(vcpu->arch.apic &&
3821 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3822 && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3824 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3834 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3835 struct kvm_segment *var, int seg)
3837 kvm_x86_ops->set_segment(vcpu, var, seg);
3840 void kvm_get_segment(struct kvm_vcpu *vcpu,
3841 struct kvm_segment *var, int seg)
3843 kvm_x86_ops->get_segment(vcpu, var, seg);
3846 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3849 struct x86_exception exception;
3851 BUG_ON(!mmu_is_nested(vcpu));
3853 /* NPT walks are always user-walks */
3854 access |= PFERR_USER_MASK;
3855 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3860 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3861 struct x86_exception *exception)
3863 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3864 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3867 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3868 struct x86_exception *exception)
3870 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3871 access |= PFERR_FETCH_MASK;
3872 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3875 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3876 struct x86_exception *exception)
3878 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3879 access |= PFERR_WRITE_MASK;
3880 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3883 /* uses this to access any guest's mapped memory without checking CPL */
3884 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3885 struct x86_exception *exception)
3887 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3890 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3891 struct kvm_vcpu *vcpu, u32 access,
3892 struct x86_exception *exception)
3895 int r = X86EMUL_CONTINUE;
3898 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3900 unsigned offset = addr & (PAGE_SIZE-1);
3901 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3904 if (gpa == UNMAPPED_GVA)
3905 return X86EMUL_PROPAGATE_FAULT;
3906 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3908 r = X86EMUL_IO_NEEDED;
3920 /* used for instruction fetching */
3921 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3922 gva_t addr, void *val, unsigned int bytes,
3923 struct x86_exception *exception)
3925 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3926 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3928 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3929 access | PFERR_FETCH_MASK,
3933 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3934 gva_t addr, void *val, unsigned int bytes,
3935 struct x86_exception *exception)
3937 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3938 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3940 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3943 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3945 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3946 gva_t addr, void *val, unsigned int bytes,
3947 struct x86_exception *exception)
3949 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3950 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3953 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3954 gva_t addr, void *val,
3956 struct x86_exception *exception)
3958 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3960 int r = X86EMUL_CONTINUE;
3963 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3966 unsigned offset = addr & (PAGE_SIZE-1);
3967 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3970 if (gpa == UNMAPPED_GVA)
3971 return X86EMUL_PROPAGATE_FAULT;
3972 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3974 r = X86EMUL_IO_NEEDED;
3985 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3987 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3988 gpa_t *gpa, struct x86_exception *exception,
3991 u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
3992 | (write ? PFERR_WRITE_MASK : 0);
3994 if (vcpu_match_mmio_gva(vcpu, gva)
3995 && !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access)) {
3996 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3997 (gva & (PAGE_SIZE - 1));
3998 trace_vcpu_match_mmio(gva, *gpa, write, false);
4002 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4004 if (*gpa == UNMAPPED_GVA)
4007 /* For APIC access vmexit */
4008 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4011 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4012 trace_vcpu_match_mmio(gva, *gpa, write, true);
4019 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4020 const void *val, int bytes)
4024 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4027 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4031 struct read_write_emulator_ops {
4032 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4034 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4035 void *val, int bytes);
4036 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4037 int bytes, void *val);
4038 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4039 void *val, int bytes);
4043 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4045 if (vcpu->mmio_read_completed) {
4046 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4047 vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4048 vcpu->mmio_read_completed = 0;
4055 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4056 void *val, int bytes)
4058 return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4061 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4062 void *val, int bytes)
4064 return emulator_write_phys(vcpu, gpa, val, bytes);
4067 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4069 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4070 return vcpu_mmio_write(vcpu, gpa, bytes, val);
4073 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4074 void *val, int bytes)
4076 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4077 return X86EMUL_IO_NEEDED;
4080 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4081 void *val, int bytes)
4083 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4085 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4086 return X86EMUL_CONTINUE;
4089 static const struct read_write_emulator_ops read_emultor = {
4090 .read_write_prepare = read_prepare,
4091 .read_write_emulate = read_emulate,
4092 .read_write_mmio = vcpu_mmio_read,
4093 .read_write_exit_mmio = read_exit_mmio,
4096 static const struct read_write_emulator_ops write_emultor = {
4097 .read_write_emulate = write_emulate,
4098 .read_write_mmio = write_mmio,
4099 .read_write_exit_mmio = write_exit_mmio,
4103 static int emulator_read_write_onepage(unsigned long addr, void *val,
4105 struct x86_exception *exception,
4106 struct kvm_vcpu *vcpu,
4107 const struct read_write_emulator_ops *ops)
4111 bool write = ops->write;
4112 struct kvm_mmio_fragment *frag;
4114 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4117 return X86EMUL_PROPAGATE_FAULT;
4119 /* For APIC access vmexit */
4123 if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4124 return X86EMUL_CONTINUE;
4128 * Is this MMIO handled locally?
4130 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4131 if (handled == bytes)
4132 return X86EMUL_CONTINUE;
4138 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4139 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4143 return X86EMUL_CONTINUE;
4146 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4147 void *val, unsigned int bytes,
4148 struct x86_exception *exception,
4149 const struct read_write_emulator_ops *ops)
4151 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4155 if (ops->read_write_prepare &&
4156 ops->read_write_prepare(vcpu, val, bytes))
4157 return X86EMUL_CONTINUE;
4159 vcpu->mmio_nr_fragments = 0;
4161 /* Crossing a page boundary? */
4162 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4165 now = -addr & ~PAGE_MASK;
4166 rc = emulator_read_write_onepage(addr, val, now, exception,
4169 if (rc != X86EMUL_CONTINUE)
4176 rc = emulator_read_write_onepage(addr, val, bytes, exception,
4178 if (rc != X86EMUL_CONTINUE)
4181 if (!vcpu->mmio_nr_fragments)
4184 gpa = vcpu->mmio_fragments[0].gpa;
4186 vcpu->mmio_needed = 1;
4187 vcpu->mmio_cur_fragment = 0;
4189 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4190 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4191 vcpu->run->exit_reason = KVM_EXIT_MMIO;
4192 vcpu->run->mmio.phys_addr = gpa;
4194 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4197 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4201 struct x86_exception *exception)
4203 return emulator_read_write(ctxt, addr, val, bytes,
4204 exception, &read_emultor);
4207 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4211 struct x86_exception *exception)
4213 return emulator_read_write(ctxt, addr, (void *)val, bytes,
4214 exception, &write_emultor);
4217 #define CMPXCHG_TYPE(t, ptr, old, new) \
4218 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4220 #ifdef CONFIG_X86_64
4221 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4223 # define CMPXCHG64(ptr, old, new) \
4224 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4227 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4232 struct x86_exception *exception)
4234 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4240 /* guests cmpxchg8b have to be emulated atomically */
4241 if (bytes > 8 || (bytes & (bytes - 1)))
4244 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4246 if (gpa == UNMAPPED_GVA ||
4247 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4250 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4253 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4254 if (is_error_page(page))
4257 kaddr = kmap_atomic(page);
4258 kaddr += offset_in_page(gpa);
4261 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4264 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4267 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4270 exchanged = CMPXCHG64(kaddr, old, new);
4275 kunmap_atomic(kaddr);
4276 kvm_release_page_dirty(page);
4279 return X86EMUL_CMPXCHG_FAILED;
4281 kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4283 return X86EMUL_CONTINUE;
4286 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4288 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4291 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4293 /* TODO: String I/O for in kernel device */
4296 if (vcpu->arch.pio.in)
4297 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4298 vcpu->arch.pio.size, pd);
4300 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4301 vcpu->arch.pio.port, vcpu->arch.pio.size,
4306 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4307 unsigned short port, void *val,
4308 unsigned int count, bool in)
4310 trace_kvm_pio(!in, port, size, count);
4312 vcpu->arch.pio.port = port;
4313 vcpu->arch.pio.in = in;
4314 vcpu->arch.pio.count = count;
4315 vcpu->arch.pio.size = size;
4317 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4318 vcpu->arch.pio.count = 0;
4322 vcpu->run->exit_reason = KVM_EXIT_IO;
4323 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4324 vcpu->run->io.size = size;
4325 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4326 vcpu->run->io.count = count;
4327 vcpu->run->io.port = port;
4332 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4333 int size, unsigned short port, void *val,
4336 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4339 if (vcpu->arch.pio.count)
4342 ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4345 memcpy(val, vcpu->arch.pio_data, size * count);
4346 vcpu->arch.pio.count = 0;
4353 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4354 int size, unsigned short port,
4355 const void *val, unsigned int count)
4357 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4359 memcpy(vcpu->arch.pio_data, val, size * count);
4360 return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4363 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4365 return kvm_x86_ops->get_segment_base(vcpu, seg);
4368 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4370 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4373 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4375 if (!need_emulate_wbinvd(vcpu))
4376 return X86EMUL_CONTINUE;
4378 if (kvm_x86_ops->has_wbinvd_exit()) {
4379 int cpu = get_cpu();
4381 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4382 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4383 wbinvd_ipi, NULL, 1);
4385 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4388 return X86EMUL_CONTINUE;
4390 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4392 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4394 kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4397 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4399 return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4402 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4405 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4408 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4410 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4413 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4415 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4416 unsigned long value;
4420 value = kvm_read_cr0(vcpu);
4423 value = vcpu->arch.cr2;
4426 value = kvm_read_cr3(vcpu);
4429 value = kvm_read_cr4(vcpu);
4432 value = kvm_get_cr8(vcpu);
4435 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4442 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4444 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4449 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4452 vcpu->arch.cr2 = val;
4455 res = kvm_set_cr3(vcpu, val);
4458 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4461 res = kvm_set_cr8(vcpu, val);
4464 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4471 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4473 kvm_set_rflags(emul_to_vcpu(ctxt), val);
4476 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4478 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4481 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4483 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4486 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4488 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4491 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4493 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4496 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4498 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4501 static unsigned long emulator_get_cached_segment_base(
4502 struct x86_emulate_ctxt *ctxt, int seg)
4504 return get_segment_base(emul_to_vcpu(ctxt), seg);
4507 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4508 struct desc_struct *desc, u32 *base3,
4511 struct kvm_segment var;
4513 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4514 *selector = var.selector;
4517 memset(desc, 0, sizeof(*desc));
4523 set_desc_limit(desc, var.limit);
4524 set_desc_base(desc, (unsigned long)var.base);
4525 #ifdef CONFIG_X86_64
4527 *base3 = var.base >> 32;
4529 desc->type = var.type;
4531 desc->dpl = var.dpl;
4532 desc->p = var.present;
4533 desc->avl = var.avl;
4541 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4542 struct desc_struct *desc, u32 base3,
4545 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4546 struct kvm_segment var;
4548 var.selector = selector;
4549 var.base = get_desc_base(desc);
4550 #ifdef CONFIG_X86_64
4551 var.base |= ((u64)base3) << 32;
4553 var.limit = get_desc_limit(desc);
4555 var.limit = (var.limit << 12) | 0xfff;
4556 var.type = desc->type;
4557 var.present = desc->p;
4558 var.dpl = desc->dpl;
4563 var.avl = desc->avl;
4564 var.present = desc->p;
4565 var.unusable = !var.present;
4568 kvm_set_segment(vcpu, &var, seg);
4572 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4573 u32 msr_index, u64 *pdata)
4575 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4578 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4579 u32 msr_index, u64 data)
4581 struct msr_data msr;
4584 msr.index = msr_index;
4585 msr.host_initiated = false;
4586 return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4589 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4590 u32 pmc, u64 *pdata)
4592 return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4595 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4597 emul_to_vcpu(ctxt)->arch.halt_request = 1;
4600 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4603 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4605 * CR0.TS may reference the host fpu state, not the guest fpu state,
4606 * so it may be clear at this point.
4611 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4616 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4617 struct x86_instruction_info *info,
4618 enum x86_intercept_stage stage)
4620 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4623 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4624 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4626 kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4629 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4631 return kvm_register_read(emul_to_vcpu(ctxt), reg);
4634 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4636 kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4639 static const struct x86_emulate_ops emulate_ops = {
4640 .read_gpr = emulator_read_gpr,
4641 .write_gpr = emulator_write_gpr,
4642 .read_std = kvm_read_guest_virt_system,
4643 .write_std = kvm_write_guest_virt_system,
4644 .fetch = kvm_fetch_guest_virt,
4645 .read_emulated = emulator_read_emulated,
4646 .write_emulated = emulator_write_emulated,
4647 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4648 .invlpg = emulator_invlpg,
4649 .pio_in_emulated = emulator_pio_in_emulated,
4650 .pio_out_emulated = emulator_pio_out_emulated,
4651 .get_segment = emulator_get_segment,
4652 .set_segment = emulator_set_segment,
4653 .get_cached_segment_base = emulator_get_cached_segment_base,
4654 .get_gdt = emulator_get_gdt,
4655 .get_idt = emulator_get_idt,
4656 .set_gdt = emulator_set_gdt,
4657 .set_idt = emulator_set_idt,
4658 .get_cr = emulator_get_cr,
4659 .set_cr = emulator_set_cr,
4660 .set_rflags = emulator_set_rflags,
4661 .cpl = emulator_get_cpl,
4662 .get_dr = emulator_get_dr,
4663 .set_dr = emulator_set_dr,
4664 .set_msr = emulator_set_msr,
4665 .get_msr = emulator_get_msr,
4666 .read_pmc = emulator_read_pmc,
4667 .halt = emulator_halt,
4668 .wbinvd = emulator_wbinvd,
4669 .fix_hypercall = emulator_fix_hypercall,
4670 .get_fpu = emulator_get_fpu,
4671 .put_fpu = emulator_put_fpu,
4672 .intercept = emulator_intercept,
4673 .get_cpuid = emulator_get_cpuid,
4676 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4678 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4680 * an sti; sti; sequence only disable interrupts for the first
4681 * instruction. So, if the last instruction, be it emulated or
4682 * not, left the system with the INT_STI flag enabled, it
4683 * means that the last instruction is an sti. We should not
4684 * leave the flag on in this case. The same goes for mov ss
4686 if (!(int_shadow & mask))
4687 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4690 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4692 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4693 if (ctxt->exception.vector == PF_VECTOR)
4694 kvm_propagate_fault(vcpu, &ctxt->exception);
4695 else if (ctxt->exception.error_code_valid)
4696 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4697 ctxt->exception.error_code);
4699 kvm_queue_exception(vcpu, ctxt->exception.vector);
4702 static void init_decode_cache(struct x86_emulate_ctxt *ctxt)
4704 memset(&ctxt->twobyte, 0,
4705 (void *)&ctxt->_regs - (void *)&ctxt->twobyte);
4707 ctxt->fetch.start = 0;
4708 ctxt->fetch.end = 0;
4709 ctxt->io_read.pos = 0;
4710 ctxt->io_read.end = 0;
4711 ctxt->mem_read.pos = 0;
4712 ctxt->mem_read.end = 0;
4715 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4717 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4720 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4722 ctxt->eflags = kvm_get_rflags(vcpu);
4723 ctxt->eip = kvm_rip_read(vcpu);
4724 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4725 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
4726 cs_l ? X86EMUL_MODE_PROT64 :
4727 cs_db ? X86EMUL_MODE_PROT32 :
4728 X86EMUL_MODE_PROT16;
4729 ctxt->guest_mode = is_guest_mode(vcpu);
4731 init_decode_cache(ctxt);
4732 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4735 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4737 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4740 init_emulate_ctxt(vcpu);
4744 ctxt->_eip = ctxt->eip + inc_eip;
4745 ret = emulate_int_real(ctxt, irq);
4747 if (ret != X86EMUL_CONTINUE)
4748 return EMULATE_FAIL;
4750 ctxt->eip = ctxt->_eip;
4751 kvm_rip_write(vcpu, ctxt->eip);
4752 kvm_set_rflags(vcpu, ctxt->eflags);
4754 if (irq == NMI_VECTOR)
4755 vcpu->arch.nmi_pending = 0;
4757 vcpu->arch.interrupt.pending = false;
4759 return EMULATE_DONE;
4761 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4763 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4765 int r = EMULATE_DONE;
4767 ++vcpu->stat.insn_emulation_fail;
4768 trace_kvm_emulate_insn_failed(vcpu);
4769 if (!is_guest_mode(vcpu)) {
4770 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4771 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4772 vcpu->run->internal.ndata = 0;
4775 kvm_queue_exception(vcpu, UD_VECTOR);
4780 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4781 bool write_fault_to_shadow_pgtable,
4787 if (emulation_type & EMULTYPE_NO_REEXECUTE)
4790 if (!vcpu->arch.mmu.direct_map) {
4792 * Write permission should be allowed since only
4793 * write access need to be emulated.
4795 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4798 * If the mapping is invalid in guest, let cpu retry
4799 * it to generate fault.
4801 if (gpa == UNMAPPED_GVA)
4806 * Do not retry the unhandleable instruction if it faults on the
4807 * readonly host memory, otherwise it will goto a infinite loop:
4808 * retry instruction -> write #PF -> emulation fail -> retry
4809 * instruction -> ...
4811 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4814 * If the instruction failed on the error pfn, it can not be fixed,
4815 * report the error to userspace.
4817 if (is_error_noslot_pfn(pfn))
4820 kvm_release_pfn_clean(pfn);
4822 /* The instructions are well-emulated on direct mmu. */
4823 if (vcpu->arch.mmu.direct_map) {
4824 unsigned int indirect_shadow_pages;
4826 spin_lock(&vcpu->kvm->mmu_lock);
4827 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
4828 spin_unlock(&vcpu->kvm->mmu_lock);
4830 if (indirect_shadow_pages)
4831 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4837 * if emulation was due to access to shadowed page table
4838 * and it failed try to unshadow page and re-enter the
4839 * guest to let CPU execute the instruction.
4841 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4844 * If the access faults on its page table, it can not
4845 * be fixed by unprotecting shadow page and it should
4846 * be reported to userspace.
4848 return !write_fault_to_shadow_pgtable;
4851 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4852 unsigned long cr2, int emulation_type)
4854 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4855 unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4857 last_retry_eip = vcpu->arch.last_retry_eip;
4858 last_retry_addr = vcpu->arch.last_retry_addr;
4861 * If the emulation is caused by #PF and it is non-page_table
4862 * writing instruction, it means the VM-EXIT is caused by shadow
4863 * page protected, we can zap the shadow page and retry this
4864 * instruction directly.
4866 * Note: if the guest uses a non-page-table modifying instruction
4867 * on the PDE that points to the instruction, then we will unmap
4868 * the instruction and go to an infinite loop. So, we cache the
4869 * last retried eip and the last fault address, if we meet the eip
4870 * and the address again, we can break out of the potential infinite
4873 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4875 if (!(emulation_type & EMULTYPE_RETRY))
4878 if (x86_page_table_writing_insn(ctxt))
4881 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4884 vcpu->arch.last_retry_eip = ctxt->eip;
4885 vcpu->arch.last_retry_addr = cr2;
4887 if (!vcpu->arch.mmu.direct_map)
4888 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4890 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
4895 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
4896 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
4898 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4905 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4906 bool writeback = true;
4907 bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
4910 * Clear write_fault_to_shadow_pgtable here to ensure it is
4913 vcpu->arch.write_fault_to_shadow_pgtable = false;
4914 kvm_clear_exception_queue(vcpu);
4916 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4917 init_emulate_ctxt(vcpu);
4918 ctxt->interruptibility = 0;
4919 ctxt->have_exception = false;
4920 ctxt->perm_ok = false;
4922 ctxt->only_vendor_specific_insn
4923 = emulation_type & EMULTYPE_TRAP_UD;
4925 r = x86_decode_insn(ctxt, insn, insn_len);
4927 trace_kvm_emulate_insn_start(vcpu);
4928 ++vcpu->stat.insn_emulation;
4929 if (r != EMULATION_OK) {
4930 if (emulation_type & EMULTYPE_TRAP_UD)
4931 return EMULATE_FAIL;
4932 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
4934 return EMULATE_DONE;
4935 if (emulation_type & EMULTYPE_SKIP)
4936 return EMULATE_FAIL;
4937 return handle_emulation_failure(vcpu);
4941 if (emulation_type & EMULTYPE_SKIP) {
4942 kvm_rip_write(vcpu, ctxt->_eip);
4943 return EMULATE_DONE;
4946 if (retry_instruction(ctxt, cr2, emulation_type))
4947 return EMULATE_DONE;
4949 /* this is needed for vmware backdoor interface to work since it
4950 changes registers values during IO operation */
4951 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4952 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4953 emulator_invalidate_register_cache(ctxt);
4957 r = x86_emulate_insn(ctxt);
4959 if (r == EMULATION_INTERCEPTED)
4960 return EMULATE_DONE;
4962 if (r == EMULATION_FAILED) {
4963 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
4965 return EMULATE_DONE;
4967 return handle_emulation_failure(vcpu);
4970 if (ctxt->have_exception) {
4971 inject_emulated_exception(vcpu);
4973 } else if (vcpu->arch.pio.count) {
4974 if (!vcpu->arch.pio.in)
4975 vcpu->arch.pio.count = 0;
4978 vcpu->arch.complete_userspace_io = complete_emulated_pio;
4980 r = EMULATE_DO_MMIO;
4981 } else if (vcpu->mmio_needed) {
4982 if (!vcpu->mmio_is_write)
4984 r = EMULATE_DO_MMIO;
4985 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
4986 } else if (r == EMULATION_RESTART)
4992 toggle_interruptibility(vcpu, ctxt->interruptibility);
4993 kvm_set_rflags(vcpu, ctxt->eflags);
4994 kvm_make_request(KVM_REQ_EVENT, vcpu);
4995 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4996 kvm_rip_write(vcpu, ctxt->eip);
4998 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5002 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5004 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5006 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5007 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5008 size, port, &val, 1);
5009 /* do not return to emulator after return from userspace */
5010 vcpu->arch.pio.count = 0;
5013 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5015 static void tsc_bad(void *info)
5017 __this_cpu_write(cpu_tsc_khz, 0);
5020 static void tsc_khz_changed(void *data)
5022 struct cpufreq_freqs *freq = data;
5023 unsigned long khz = 0;
5027 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5028 khz = cpufreq_quick_get(raw_smp_processor_id());
5031 __this_cpu_write(cpu_tsc_khz, khz);
5034 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5037 struct cpufreq_freqs *freq = data;
5039 struct kvm_vcpu *vcpu;
5040 int i, send_ipi = 0;
5043 * We allow guests to temporarily run on slowing clocks,
5044 * provided we notify them after, or to run on accelerating
5045 * clocks, provided we notify them before. Thus time never
5048 * However, we have a problem. We can't atomically update
5049 * the frequency of a given CPU from this function; it is
5050 * merely a notifier, which can be called from any CPU.
5051 * Changing the TSC frequency at arbitrary points in time
5052 * requires a recomputation of local variables related to
5053 * the TSC for each VCPU. We must flag these local variables
5054 * to be updated and be sure the update takes place with the
5055 * new frequency before any guests proceed.
5057 * Unfortunately, the combination of hotplug CPU and frequency
5058 * change creates an intractable locking scenario; the order
5059 * of when these callouts happen is undefined with respect to
5060 * CPU hotplug, and they can race with each other. As such,
5061 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5062 * undefined; you can actually have a CPU frequency change take
5063 * place in between the computation of X and the setting of the
5064 * variable. To protect against this problem, all updates of
5065 * the per_cpu tsc_khz variable are done in an interrupt
5066 * protected IPI, and all callers wishing to update the value
5067 * must wait for a synchronous IPI to complete (which is trivial
5068 * if the caller is on the CPU already). This establishes the
5069 * necessary total order on variable updates.
5071 * Note that because a guest time update may take place
5072 * anytime after the setting of the VCPU's request bit, the
5073 * correct TSC value must be set before the request. However,
5074 * to ensure the update actually makes it to any guest which
5075 * starts running in hardware virtualization between the set
5076 * and the acquisition of the spinlock, we must also ping the
5077 * CPU after setting the request bit.
5081 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5083 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5086 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5088 raw_spin_lock(&kvm_lock);
5089 list_for_each_entry(kvm, &vm_list, vm_list) {
5090 kvm_for_each_vcpu(i, vcpu, kvm) {
5091 if (vcpu->cpu != freq->cpu)
5093 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5094 if (vcpu->cpu != smp_processor_id())
5098 raw_spin_unlock(&kvm_lock);
5100 if (freq->old < freq->new && send_ipi) {
5102 * We upscale the frequency. Must make the guest
5103 * doesn't see old kvmclock values while running with
5104 * the new frequency, otherwise we risk the guest sees
5105 * time go backwards.
5107 * In case we update the frequency for another cpu
5108 * (which might be in guest context) send an interrupt
5109 * to kick the cpu out of guest context. Next time
5110 * guest context is entered kvmclock will be updated,
5111 * so the guest will not see stale values.
5113 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5118 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5119 .notifier_call = kvmclock_cpufreq_notifier
5122 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5123 unsigned long action, void *hcpu)
5125 unsigned int cpu = (unsigned long)hcpu;
5129 case CPU_DOWN_FAILED:
5130 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5132 case CPU_DOWN_PREPARE:
5133 smp_call_function_single(cpu, tsc_bad, NULL, 1);
5139 static struct notifier_block kvmclock_cpu_notifier_block = {
5140 .notifier_call = kvmclock_cpu_notifier,
5141 .priority = -INT_MAX
5144 static void kvm_timer_init(void)
5148 max_tsc_khz = tsc_khz;
5149 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5150 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5151 #ifdef CONFIG_CPU_FREQ
5152 struct cpufreq_policy policy;
5153 memset(&policy, 0, sizeof(policy));
5155 cpufreq_get_policy(&policy, cpu);
5156 if (policy.cpuinfo.max_freq)
5157 max_tsc_khz = policy.cpuinfo.max_freq;
5160 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5161 CPUFREQ_TRANSITION_NOTIFIER);
5163 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5164 for_each_online_cpu(cpu)
5165 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5168 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5170 int kvm_is_in_guest(void)
5172 return __this_cpu_read(current_vcpu) != NULL;
5175 static int kvm_is_user_mode(void)
5179 if (__this_cpu_read(current_vcpu))
5180 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5182 return user_mode != 0;
5185 static unsigned long kvm_get_guest_ip(void)
5187 unsigned long ip = 0;
5189 if (__this_cpu_read(current_vcpu))
5190 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5195 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5196 .is_in_guest = kvm_is_in_guest,
5197 .is_user_mode = kvm_is_user_mode,
5198 .get_guest_ip = kvm_get_guest_ip,
5201 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5203 __this_cpu_write(current_vcpu, vcpu);
5205 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5207 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5209 __this_cpu_write(current_vcpu, NULL);
5211 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5213 static void kvm_set_mmio_spte_mask(void)
5216 int maxphyaddr = boot_cpu_data.x86_phys_bits;
5219 * Set the reserved bits and the present bit of an paging-structure
5220 * entry to generate page fault with PFER.RSV = 1.
5222 mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5225 #ifdef CONFIG_X86_64
5227 * If reserved bit is not supported, clear the present bit to disable
5230 if (maxphyaddr == 52)
5234 kvm_mmu_set_mmio_spte_mask(mask);
5237 #ifdef CONFIG_X86_64
5238 static void pvclock_gtod_update_fn(struct work_struct *work)
5242 struct kvm_vcpu *vcpu;
5245 raw_spin_lock(&kvm_lock);
5246 list_for_each_entry(kvm, &vm_list, vm_list)
5247 kvm_for_each_vcpu(i, vcpu, kvm)
5248 set_bit(KVM_REQ_MASTERCLOCK_UPDATE, &vcpu->requests);
5249 atomic_set(&kvm_guest_has_master_clock, 0);
5250 raw_spin_unlock(&kvm_lock);
5253 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5256 * Notification about pvclock gtod data update.
5258 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5261 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5262 struct timekeeper *tk = priv;
5264 update_pvclock_gtod(tk);
5266 /* disable master clock if host does not trust, or does not
5267 * use, TSC clocksource
5269 if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5270 atomic_read(&kvm_guest_has_master_clock) != 0)
5271 queue_work(system_long_wq, &pvclock_gtod_work);
5276 static struct notifier_block pvclock_gtod_notifier = {
5277 .notifier_call = pvclock_gtod_notify,
5281 int kvm_arch_init(void *opaque)
5284 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5287 printk(KERN_ERR "kvm: already loaded the other module\n");
5292 if (!ops->cpu_has_kvm_support()) {
5293 printk(KERN_ERR "kvm: no hardware support\n");
5297 if (ops->disabled_by_bios()) {
5298 printk(KERN_ERR "kvm: disabled by bios\n");
5304 shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5306 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5310 r = kvm_mmu_module_init();
5312 goto out_free_percpu;
5314 kvm_set_mmio_spte_mask();
5315 kvm_init_msr_list();
5318 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5319 PT_DIRTY_MASK, PT64_NX_MASK, 0);
5323 perf_register_guest_info_callbacks(&kvm_guest_cbs);
5326 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5329 #ifdef CONFIG_X86_64
5330 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5336 free_percpu(shared_msrs);
5341 void kvm_arch_exit(void)
5343 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5345 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5346 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5347 CPUFREQ_TRANSITION_NOTIFIER);
5348 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5349 #ifdef CONFIG_X86_64
5350 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5353 kvm_mmu_module_exit();
5354 free_percpu(shared_msrs);
5357 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5359 ++vcpu->stat.halt_exits;
5360 if (irqchip_in_kernel(vcpu->kvm)) {
5361 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5364 vcpu->run->exit_reason = KVM_EXIT_HLT;
5368 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5370 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5372 u64 param, ingpa, outgpa, ret;
5373 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5374 bool fast, longmode;
5378 * hypercall generates UD from non zero cpl and real mode
5381 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5382 kvm_queue_exception(vcpu, UD_VECTOR);
5386 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5387 longmode = is_long_mode(vcpu) && cs_l == 1;
5390 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5391 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5392 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5393 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5394 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5395 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5397 #ifdef CONFIG_X86_64
5399 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5400 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5401 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5405 code = param & 0xffff;
5406 fast = (param >> 16) & 0x1;
5407 rep_cnt = (param >> 32) & 0xfff;
5408 rep_idx = (param >> 48) & 0xfff;
5410 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5413 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5414 kvm_vcpu_on_spin(vcpu);
5417 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5421 ret = res | (((u64)rep_done & 0xfff) << 32);
5423 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5425 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5426 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5432 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5434 unsigned long nr, a0, a1, a2, a3, ret;
5437 if (kvm_hv_hypercall_enabled(vcpu->kvm))
5438 return kvm_hv_hypercall(vcpu);
5440 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5441 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5442 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5443 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5444 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5446 trace_kvm_hypercall(nr, a0, a1, a2, a3);
5448 if (!is_long_mode(vcpu)) {
5456 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5462 case KVM_HC_VAPIC_POLL_IRQ:
5470 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5471 ++vcpu->stat.hypercalls;
5474 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5476 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5478 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5479 char instruction[3];
5480 unsigned long rip = kvm_rip_read(vcpu);
5483 * Blow out the MMU to ensure that no other VCPU has an active mapping
5484 * to ensure that the updated hypercall appears atomically across all
5487 kvm_mmu_zap_all(vcpu->kvm);
5489 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5491 return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5495 * Check if userspace requested an interrupt window, and that the
5496 * interrupt window is open.
5498 * No need to exit to userspace if we already have an interrupt queued.
5500 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5502 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5503 vcpu->run->request_interrupt_window &&
5504 kvm_arch_interrupt_allowed(vcpu));
5507 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5509 struct kvm_run *kvm_run = vcpu->run;
5511 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5512 kvm_run->cr8 = kvm_get_cr8(vcpu);
5513 kvm_run->apic_base = kvm_get_apic_base(vcpu);
5514 if (irqchip_in_kernel(vcpu->kvm))
5515 kvm_run->ready_for_interrupt_injection = 1;
5517 kvm_run->ready_for_interrupt_injection =
5518 kvm_arch_interrupt_allowed(vcpu) &&
5519 !kvm_cpu_has_interrupt(vcpu) &&
5520 !kvm_event_needs_reinjection(vcpu);
5523 static int vapic_enter(struct kvm_vcpu *vcpu)
5525 struct kvm_lapic *apic = vcpu->arch.apic;
5528 if (!apic || !apic->vapic_addr)
5531 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5532 if (is_error_page(page))
5535 vcpu->arch.apic->vapic_page = page;
5539 static void vapic_exit(struct kvm_vcpu *vcpu)
5541 struct kvm_lapic *apic = vcpu->arch.apic;
5544 if (!apic || !apic->vapic_addr)
5547 idx = srcu_read_lock(&vcpu->kvm->srcu);
5548 kvm_release_page_dirty(apic->vapic_page);
5549 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5550 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5553 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5557 if (!kvm_x86_ops->update_cr8_intercept)
5560 if (!vcpu->arch.apic)
5563 if (!vcpu->arch.apic->vapic_addr)
5564 max_irr = kvm_lapic_find_highest_irr(vcpu);
5571 tpr = kvm_lapic_get_cr8(vcpu);
5573 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5576 static void inject_pending_event(struct kvm_vcpu *vcpu)
5578 /* try to reinject previous events if any */
5579 if (vcpu->arch.exception.pending) {
5580 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5581 vcpu->arch.exception.has_error_code,
5582 vcpu->arch.exception.error_code);
5583 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5584 vcpu->arch.exception.has_error_code,
5585 vcpu->arch.exception.error_code,
5586 vcpu->arch.exception.reinject);
5590 if (vcpu->arch.nmi_injected) {
5591 kvm_x86_ops->set_nmi(vcpu);
5595 if (vcpu->arch.interrupt.pending) {
5596 kvm_x86_ops->set_irq(vcpu);
5600 /* try to inject new event if pending */
5601 if (vcpu->arch.nmi_pending) {
5602 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5603 --vcpu->arch.nmi_pending;
5604 vcpu->arch.nmi_injected = true;
5605 kvm_x86_ops->set_nmi(vcpu);
5607 } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5608 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5609 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5611 kvm_x86_ops->set_irq(vcpu);
5616 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5618 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5619 !vcpu->guest_xcr0_loaded) {
5620 /* kvm_set_xcr() also depends on this */
5621 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5622 vcpu->guest_xcr0_loaded = 1;
5626 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5628 if (vcpu->guest_xcr0_loaded) {
5629 if (vcpu->arch.xcr0 != host_xcr0)
5630 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5631 vcpu->guest_xcr0_loaded = 0;
5635 static void process_nmi(struct kvm_vcpu *vcpu)
5640 * x86 is limited to one NMI running, and one NMI pending after it.
5641 * If an NMI is already in progress, limit further NMIs to just one.
5642 * Otherwise, allow two (and we'll inject the first one immediately).
5644 if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5647 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5648 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5649 kvm_make_request(KVM_REQ_EVENT, vcpu);
5652 static void kvm_gen_update_masterclock(struct kvm *kvm)
5654 #ifdef CONFIG_X86_64
5656 struct kvm_vcpu *vcpu;
5657 struct kvm_arch *ka = &kvm->arch;
5659 spin_lock(&ka->pvclock_gtod_sync_lock);
5660 kvm_make_mclock_inprogress_request(kvm);
5661 /* no guest entries from this point */
5662 pvclock_update_vm_gtod_copy(kvm);
5664 kvm_for_each_vcpu(i, vcpu, kvm)
5665 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
5667 /* guest entries allowed */
5668 kvm_for_each_vcpu(i, vcpu, kvm)
5669 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
5671 spin_unlock(&ka->pvclock_gtod_sync_lock);
5675 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
5677 u64 eoi_exit_bitmap[4];
5680 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
5683 memset(eoi_exit_bitmap, 0, 32);
5686 kvm_ioapic_scan_entry(vcpu, eoi_exit_bitmap, tmr);
5687 kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
5688 kvm_apic_update_tmr(vcpu, tmr);
5691 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5694 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5695 vcpu->run->request_interrupt_window;
5696 bool req_immediate_exit = false;
5698 if (vcpu->requests) {
5699 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5700 kvm_mmu_unload(vcpu);
5701 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5702 __kvm_migrate_timers(vcpu);
5703 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
5704 kvm_gen_update_masterclock(vcpu->kvm);
5705 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5706 r = kvm_guest_time_update(vcpu);
5710 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5711 kvm_mmu_sync_roots(vcpu);
5712 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5713 kvm_x86_ops->tlb_flush(vcpu);
5714 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5715 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5719 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5720 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5724 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5725 vcpu->fpu_active = 0;
5726 kvm_x86_ops->fpu_deactivate(vcpu);
5728 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5729 /* Page is swapped out. Do synthetic halt */
5730 vcpu->arch.apf.halted = true;
5734 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5735 record_steal_time(vcpu);
5736 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5738 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5739 kvm_handle_pmu_event(vcpu);
5740 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5741 kvm_deliver_pmi(vcpu);
5742 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
5743 vcpu_scan_ioapic(vcpu);
5746 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5747 kvm_apic_accept_events(vcpu);
5748 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
5753 inject_pending_event(vcpu);
5755 /* enable NMI/IRQ window open exits if needed */
5756 if (vcpu->arch.nmi_pending)
5757 kvm_x86_ops->enable_nmi_window(vcpu);
5758 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
5759 req_immediate_exit =
5760 kvm_x86_ops->enable_irq_window(vcpu) != 0;
5762 if (kvm_lapic_enabled(vcpu)) {
5764 * Update architecture specific hints for APIC
5765 * virtual interrupt delivery.
5767 if (kvm_x86_ops->hwapic_irr_update)
5768 kvm_x86_ops->hwapic_irr_update(vcpu,
5769 kvm_lapic_find_highest_irr(vcpu));
5770 update_cr8_intercept(vcpu);
5771 kvm_lapic_sync_to_vapic(vcpu);
5775 r = kvm_mmu_reload(vcpu);
5777 goto cancel_injection;
5782 kvm_x86_ops->prepare_guest_switch(vcpu);
5783 if (vcpu->fpu_active)
5784 kvm_load_guest_fpu(vcpu);
5785 kvm_load_guest_xcr0(vcpu);
5787 vcpu->mode = IN_GUEST_MODE;
5789 /* We should set ->mode before check ->requests,
5790 * see the comment in make_all_cpus_request.
5794 local_irq_disable();
5796 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5797 || need_resched() || signal_pending(current)) {
5798 vcpu->mode = OUTSIDE_GUEST_MODE;
5803 goto cancel_injection;
5806 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5808 if (req_immediate_exit)
5809 smp_send_reschedule(vcpu->cpu);
5813 if (unlikely(vcpu->arch.switch_db_regs)) {
5815 set_debugreg(vcpu->arch.eff_db[0], 0);
5816 set_debugreg(vcpu->arch.eff_db[1], 1);
5817 set_debugreg(vcpu->arch.eff_db[2], 2);
5818 set_debugreg(vcpu->arch.eff_db[3], 3);
5821 trace_kvm_entry(vcpu->vcpu_id);
5822 kvm_x86_ops->run(vcpu);
5825 * If the guest has used debug registers, at least dr7
5826 * will be disabled while returning to the host.
5827 * If we don't have active breakpoints in the host, we don't
5828 * care about the messed up debug address registers. But if
5829 * we have some of them active, restore the old state.
5831 if (hw_breakpoint_active())
5832 hw_breakpoint_restore();
5834 vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
5837 vcpu->mode = OUTSIDE_GUEST_MODE;
5840 /* Interrupt is enabled by handle_external_intr() */
5841 kvm_x86_ops->handle_external_intr(vcpu);
5846 * We must have an instruction between local_irq_enable() and
5847 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5848 * the interrupt shadow. The stat.exits increment will do nicely.
5849 * But we need to prevent reordering, hence this barrier():
5857 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5860 * Profile KVM exit RIPs:
5862 if (unlikely(prof_on == KVM_PROFILING)) {
5863 unsigned long rip = kvm_rip_read(vcpu);
5864 profile_hit(KVM_PROFILING, (void *)rip);
5867 if (unlikely(vcpu->arch.tsc_always_catchup))
5868 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5870 if (vcpu->arch.apic_attention)
5871 kvm_lapic_sync_from_vapic(vcpu);
5873 r = kvm_x86_ops->handle_exit(vcpu);
5877 kvm_x86_ops->cancel_injection(vcpu);
5878 if (unlikely(vcpu->arch.apic_attention))
5879 kvm_lapic_sync_from_vapic(vcpu);
5885 static int __vcpu_run(struct kvm_vcpu *vcpu)
5888 struct kvm *kvm = vcpu->kvm;
5890 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5891 r = vapic_enter(vcpu);
5893 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5899 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5900 !vcpu->arch.apf.halted)
5901 r = vcpu_enter_guest(vcpu);
5903 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5904 kvm_vcpu_block(vcpu);
5905 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5906 if (kvm_check_request(KVM_REQ_UNHALT, vcpu)) {
5907 kvm_apic_accept_events(vcpu);
5908 switch(vcpu->arch.mp_state) {
5909 case KVM_MP_STATE_HALTED:
5910 vcpu->arch.mp_state =
5911 KVM_MP_STATE_RUNNABLE;
5912 case KVM_MP_STATE_RUNNABLE:
5913 vcpu->arch.apf.halted = false;
5915 case KVM_MP_STATE_INIT_RECEIVED:
5927 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5928 if (kvm_cpu_has_pending_timer(vcpu))
5929 kvm_inject_pending_timer_irqs(vcpu);
5931 if (dm_request_for_irq_injection(vcpu)) {
5933 vcpu->run->exit_reason = KVM_EXIT_INTR;
5934 ++vcpu->stat.request_irq_exits;
5937 kvm_check_async_pf_completion(vcpu);
5939 if (signal_pending(current)) {
5941 vcpu->run->exit_reason = KVM_EXIT_INTR;
5942 ++vcpu->stat.signal_exits;
5944 if (need_resched()) {
5945 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5947 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5951 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5958 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
5961 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5962 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5963 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5964 if (r != EMULATE_DONE)
5969 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
5971 BUG_ON(!vcpu->arch.pio.count);
5973 return complete_emulated_io(vcpu);
5977 * Implements the following, as a state machine:
5981 * for each mmio piece in the fragment
5989 * for each mmio piece in the fragment
5994 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
5996 struct kvm_run *run = vcpu->run;
5997 struct kvm_mmio_fragment *frag;
6000 BUG_ON(!vcpu->mmio_needed);
6002 /* Complete previous fragment */
6003 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6004 len = min(8u, frag->len);
6005 if (!vcpu->mmio_is_write)
6006 memcpy(frag->data, run->mmio.data, len);
6008 if (frag->len <= 8) {
6009 /* Switch to the next fragment. */
6011 vcpu->mmio_cur_fragment++;
6013 /* Go forward to the next mmio piece. */
6019 if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
6020 vcpu->mmio_needed = 0;
6021 if (vcpu->mmio_is_write)
6023 vcpu->mmio_read_completed = 1;
6024 return complete_emulated_io(vcpu);
6027 run->exit_reason = KVM_EXIT_MMIO;
6028 run->mmio.phys_addr = frag->gpa;
6029 if (vcpu->mmio_is_write)
6030 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6031 run->mmio.len = min(8u, frag->len);
6032 run->mmio.is_write = vcpu->mmio_is_write;
6033 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6038 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6043 if (!tsk_used_math(current) && init_fpu(current))
6046 if (vcpu->sigset_active)
6047 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6049 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6050 kvm_vcpu_block(vcpu);
6051 kvm_apic_accept_events(vcpu);
6052 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6057 /* re-sync apic's tpr */
6058 if (!irqchip_in_kernel(vcpu->kvm)) {
6059 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6065 if (unlikely(vcpu->arch.complete_userspace_io)) {
6066 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6067 vcpu->arch.complete_userspace_io = NULL;
6072 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6074 r = __vcpu_run(vcpu);
6077 post_kvm_run_save(vcpu);
6078 if (vcpu->sigset_active)
6079 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6084 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6086 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6088 * We are here if userspace calls get_regs() in the middle of
6089 * instruction emulation. Registers state needs to be copied
6090 * back from emulation context to vcpu. Userspace shouldn't do
6091 * that usually, but some bad designed PV devices (vmware
6092 * backdoor interface) need this to work
6094 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6095 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6097 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6098 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6099 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6100 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6101 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6102 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6103 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6104 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6105 #ifdef CONFIG_X86_64
6106 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6107 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6108 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6109 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6110 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6111 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6112 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6113 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6116 regs->rip = kvm_rip_read(vcpu);
6117 regs->rflags = kvm_get_rflags(vcpu);
6122 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6124 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6125 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6127 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6128 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6129 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6130 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6131 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6132 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6133 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6134 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6135 #ifdef CONFIG_X86_64
6136 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6137 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6138 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6139 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6140 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6141 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6142 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6143 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6146 kvm_rip_write(vcpu, regs->rip);
6147 kvm_set_rflags(vcpu, regs->rflags);
6149 vcpu->arch.exception.pending = false;
6151 kvm_make_request(KVM_REQ_EVENT, vcpu);
6156 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6158 struct kvm_segment cs;
6160 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6164 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6166 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6167 struct kvm_sregs *sregs)
6171 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6172 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6173 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6174 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6175 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6176 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6178 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6179 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6181 kvm_x86_ops->get_idt(vcpu, &dt);
6182 sregs->idt.limit = dt.size;
6183 sregs->idt.base = dt.address;
6184 kvm_x86_ops->get_gdt(vcpu, &dt);
6185 sregs->gdt.limit = dt.size;
6186 sregs->gdt.base = dt.address;
6188 sregs->cr0 = kvm_read_cr0(vcpu);
6189 sregs->cr2 = vcpu->arch.cr2;
6190 sregs->cr3 = kvm_read_cr3(vcpu);
6191 sregs->cr4 = kvm_read_cr4(vcpu);
6192 sregs->cr8 = kvm_get_cr8(vcpu);
6193 sregs->efer = vcpu->arch.efer;
6194 sregs->apic_base = kvm_get_apic_base(vcpu);
6196 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6198 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6199 set_bit(vcpu->arch.interrupt.nr,
6200 (unsigned long *)sregs->interrupt_bitmap);
6205 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6206 struct kvm_mp_state *mp_state)
6208 kvm_apic_accept_events(vcpu);
6209 mp_state->mp_state = vcpu->arch.mp_state;
6213 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6214 struct kvm_mp_state *mp_state)
6216 if (!kvm_vcpu_has_lapic(vcpu) &&
6217 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6220 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6221 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6222 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6224 vcpu->arch.mp_state = mp_state->mp_state;
6225 kvm_make_request(KVM_REQ_EVENT, vcpu);
6229 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6230 int reason, bool has_error_code, u32 error_code)
6232 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6235 init_emulate_ctxt(vcpu);
6237 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6238 has_error_code, error_code);
6241 return EMULATE_FAIL;
6243 kvm_rip_write(vcpu, ctxt->eip);
6244 kvm_set_rflags(vcpu, ctxt->eflags);
6245 kvm_make_request(KVM_REQ_EVENT, vcpu);
6246 return EMULATE_DONE;
6248 EXPORT_SYMBOL_GPL(kvm_task_switch);
6250 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6251 struct kvm_sregs *sregs)
6253 int mmu_reset_needed = 0;
6254 int pending_vec, max_bits, idx;
6257 if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6260 dt.size = sregs->idt.limit;
6261 dt.address = sregs->idt.base;
6262 kvm_x86_ops->set_idt(vcpu, &dt);
6263 dt.size = sregs->gdt.limit;
6264 dt.address = sregs->gdt.base;
6265 kvm_x86_ops->set_gdt(vcpu, &dt);
6267 vcpu->arch.cr2 = sregs->cr2;
6268 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6269 vcpu->arch.cr3 = sregs->cr3;
6270 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6272 kvm_set_cr8(vcpu, sregs->cr8);
6274 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6275 kvm_x86_ops->set_efer(vcpu, sregs->efer);
6276 kvm_set_apic_base(vcpu, sregs->apic_base);
6278 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6279 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6280 vcpu->arch.cr0 = sregs->cr0;
6282 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6283 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6284 if (sregs->cr4 & X86_CR4_OSXSAVE)
6285 kvm_update_cpuid(vcpu);
6287 idx = srcu_read_lock(&vcpu->kvm->srcu);
6288 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6289 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6290 mmu_reset_needed = 1;
6292 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6294 if (mmu_reset_needed)
6295 kvm_mmu_reset_context(vcpu);
6297 max_bits = KVM_NR_INTERRUPTS;
6298 pending_vec = find_first_bit(
6299 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6300 if (pending_vec < max_bits) {
6301 kvm_queue_interrupt(vcpu, pending_vec, false);
6302 pr_debug("Set back pending irq %d\n", pending_vec);
6305 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6306 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6307 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6308 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6309 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6310 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6312 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6313 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6315 update_cr8_intercept(vcpu);
6317 /* Older userspace won't unhalt the vcpu on reset. */
6318 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6319 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6321 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6323 kvm_make_request(KVM_REQ_EVENT, vcpu);
6328 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6329 struct kvm_guest_debug *dbg)
6331 unsigned long rflags;
6334 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6336 if (vcpu->arch.exception.pending)
6338 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6339 kvm_queue_exception(vcpu, DB_VECTOR);
6341 kvm_queue_exception(vcpu, BP_VECTOR);
6345 * Read rflags as long as potentially injected trace flags are still
6348 rflags = kvm_get_rflags(vcpu);
6350 vcpu->guest_debug = dbg->control;
6351 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6352 vcpu->guest_debug = 0;
6354 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6355 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6356 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6357 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6359 for (i = 0; i < KVM_NR_DB_REGS; i++)
6360 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6362 kvm_update_dr7(vcpu);
6364 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6365 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6366 get_segment_base(vcpu, VCPU_SREG_CS);
6369 * Trigger an rflags update that will inject or remove the trace
6372 kvm_set_rflags(vcpu, rflags);
6374 kvm_x86_ops->update_db_bp_intercept(vcpu);
6384 * Translate a guest virtual address to a guest physical address.
6386 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6387 struct kvm_translation *tr)
6389 unsigned long vaddr = tr->linear_address;
6393 idx = srcu_read_lock(&vcpu->kvm->srcu);
6394 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6395 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6396 tr->physical_address = gpa;
6397 tr->valid = gpa != UNMAPPED_GVA;
6404 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6406 struct i387_fxsave_struct *fxsave =
6407 &vcpu->arch.guest_fpu.state->fxsave;
6409 memcpy(fpu->fpr, fxsave->st_space, 128);
6410 fpu->fcw = fxsave->cwd;
6411 fpu->fsw = fxsave->swd;
6412 fpu->ftwx = fxsave->twd;
6413 fpu->last_opcode = fxsave->fop;
6414 fpu->last_ip = fxsave->rip;
6415 fpu->last_dp = fxsave->rdp;
6416 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6421 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6423 struct i387_fxsave_struct *fxsave =
6424 &vcpu->arch.guest_fpu.state->fxsave;
6426 memcpy(fxsave->st_space, fpu->fpr, 128);
6427 fxsave->cwd = fpu->fcw;
6428 fxsave->swd = fpu->fsw;
6429 fxsave->twd = fpu->ftwx;
6430 fxsave->fop = fpu->last_opcode;
6431 fxsave->rip = fpu->last_ip;
6432 fxsave->rdp = fpu->last_dp;
6433 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6438 int fx_init(struct kvm_vcpu *vcpu)
6442 err = fpu_alloc(&vcpu->arch.guest_fpu);
6446 fpu_finit(&vcpu->arch.guest_fpu);
6449 * Ensure guest xcr0 is valid for loading
6451 vcpu->arch.xcr0 = XSTATE_FP;
6453 vcpu->arch.cr0 |= X86_CR0_ET;
6457 EXPORT_SYMBOL_GPL(fx_init);
6459 static void fx_free(struct kvm_vcpu *vcpu)
6461 fpu_free(&vcpu->arch.guest_fpu);
6464 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6466 if (vcpu->guest_fpu_loaded)
6470 * Restore all possible states in the guest,
6471 * and assume host would use all available bits.
6472 * Guest xcr0 would be loaded later.
6474 kvm_put_guest_xcr0(vcpu);
6475 vcpu->guest_fpu_loaded = 1;
6476 __kernel_fpu_begin();
6477 fpu_restore_checking(&vcpu->arch.guest_fpu);
6481 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6483 kvm_put_guest_xcr0(vcpu);
6485 if (!vcpu->guest_fpu_loaded)
6488 vcpu->guest_fpu_loaded = 0;
6489 fpu_save_init(&vcpu->arch.guest_fpu);
6491 ++vcpu->stat.fpu_reload;
6492 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6496 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6498 kvmclock_reset(vcpu);
6500 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6502 kvm_x86_ops->vcpu_free(vcpu);
6505 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6508 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6509 printk_once(KERN_WARNING
6510 "kvm: SMP vm created on host with unstable TSC; "
6511 "guest TSC will not be reliable\n");
6512 return kvm_x86_ops->vcpu_create(kvm, id);
6515 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6519 vcpu->arch.mtrr_state.have_fixed = 1;
6520 r = vcpu_load(vcpu);
6523 kvm_vcpu_reset(vcpu);
6524 r = kvm_mmu_setup(vcpu);
6530 int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
6533 struct msr_data msr;
6535 r = vcpu_load(vcpu);
6539 msr.index = MSR_IA32_TSC;
6540 msr.host_initiated = true;
6541 kvm_write_tsc(vcpu, &msr);
6547 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6550 vcpu->arch.apf.msr_val = 0;
6552 r = vcpu_load(vcpu);
6554 kvm_mmu_unload(vcpu);
6558 kvm_x86_ops->vcpu_free(vcpu);
6561 void kvm_vcpu_reset(struct kvm_vcpu *vcpu)
6563 atomic_set(&vcpu->arch.nmi_queued, 0);
6564 vcpu->arch.nmi_pending = 0;
6565 vcpu->arch.nmi_injected = false;
6567 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6568 vcpu->arch.dr6 = DR6_FIXED_1;
6569 vcpu->arch.dr7 = DR7_FIXED_1;
6570 kvm_update_dr7(vcpu);
6572 kvm_make_request(KVM_REQ_EVENT, vcpu);
6573 vcpu->arch.apf.msr_val = 0;
6574 vcpu->arch.st.msr_val = 0;
6576 kvmclock_reset(vcpu);
6578 kvm_clear_async_pf_completion_queue(vcpu);
6579 kvm_async_pf_hash_reset(vcpu);
6580 vcpu->arch.apf.halted = false;
6582 kvm_pmu_reset(vcpu);
6584 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
6585 vcpu->arch.regs_avail = ~0;
6586 vcpu->arch.regs_dirty = ~0;
6588 kvm_x86_ops->vcpu_reset(vcpu);
6591 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector)
6593 struct kvm_segment cs;
6595 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6596 cs.selector = vector << 8;
6597 cs.base = vector << 12;
6598 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6599 kvm_rip_write(vcpu, 0);
6602 int kvm_arch_hardware_enable(void *garbage)
6605 struct kvm_vcpu *vcpu;
6610 bool stable, backwards_tsc = false;
6612 kvm_shared_msr_cpu_online();
6613 ret = kvm_x86_ops->hardware_enable(garbage);
6617 local_tsc = native_read_tsc();
6618 stable = !check_tsc_unstable();
6619 list_for_each_entry(kvm, &vm_list, vm_list) {
6620 kvm_for_each_vcpu(i, vcpu, kvm) {
6621 if (!stable && vcpu->cpu == smp_processor_id())
6622 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6623 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6624 backwards_tsc = true;
6625 if (vcpu->arch.last_host_tsc > max_tsc)
6626 max_tsc = vcpu->arch.last_host_tsc;
6632 * Sometimes, even reliable TSCs go backwards. This happens on
6633 * platforms that reset TSC during suspend or hibernate actions, but
6634 * maintain synchronization. We must compensate. Fortunately, we can
6635 * detect that condition here, which happens early in CPU bringup,
6636 * before any KVM threads can be running. Unfortunately, we can't
6637 * bring the TSCs fully up to date with real time, as we aren't yet far
6638 * enough into CPU bringup that we know how much real time has actually
6639 * elapsed; our helper function, get_kernel_ns() will be using boot
6640 * variables that haven't been updated yet.
6642 * So we simply find the maximum observed TSC above, then record the
6643 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
6644 * the adjustment will be applied. Note that we accumulate
6645 * adjustments, in case multiple suspend cycles happen before some VCPU
6646 * gets a chance to run again. In the event that no KVM threads get a
6647 * chance to run, we will miss the entire elapsed period, as we'll have
6648 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6649 * loose cycle time. This isn't too big a deal, since the loss will be
6650 * uniform across all VCPUs (not to mention the scenario is extremely
6651 * unlikely). It is possible that a second hibernate recovery happens
6652 * much faster than a first, causing the observed TSC here to be
6653 * smaller; this would require additional padding adjustment, which is
6654 * why we set last_host_tsc to the local tsc observed here.
6656 * N.B. - this code below runs only on platforms with reliable TSC,
6657 * as that is the only way backwards_tsc is set above. Also note
6658 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6659 * have the same delta_cyc adjustment applied if backwards_tsc
6660 * is detected. Note further, this adjustment is only done once,
6661 * as we reset last_host_tsc on all VCPUs to stop this from being
6662 * called multiple times (one for each physical CPU bringup).
6664 * Platforms with unreliable TSCs don't have to deal with this, they
6665 * will be compensated by the logic in vcpu_load, which sets the TSC to
6666 * catchup mode. This will catchup all VCPUs to real time, but cannot
6667 * guarantee that they stay in perfect synchronization.
6669 if (backwards_tsc) {
6670 u64 delta_cyc = max_tsc - local_tsc;
6671 list_for_each_entry(kvm, &vm_list, vm_list) {
6672 kvm_for_each_vcpu(i, vcpu, kvm) {
6673 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6674 vcpu->arch.last_host_tsc = local_tsc;
6675 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
6680 * We have to disable TSC offset matching.. if you were
6681 * booting a VM while issuing an S4 host suspend....
6682 * you may have some problem. Solving this issue is
6683 * left as an exercise to the reader.
6685 kvm->arch.last_tsc_nsec = 0;
6686 kvm->arch.last_tsc_write = 0;
6693 void kvm_arch_hardware_disable(void *garbage)
6695 kvm_x86_ops->hardware_disable(garbage);
6696 drop_user_return_notifiers(garbage);
6699 int kvm_arch_hardware_setup(void)
6701 return kvm_x86_ops->hardware_setup();
6704 void kvm_arch_hardware_unsetup(void)
6706 kvm_x86_ops->hardware_unsetup();
6709 void kvm_arch_check_processor_compat(void *rtn)
6711 kvm_x86_ops->check_processor_compatibility(rtn);
6714 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6716 return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6719 struct static_key kvm_no_apic_vcpu __read_mostly;
6721 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6727 BUG_ON(vcpu->kvm == NULL);
6730 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6731 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6732 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6734 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6736 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6741 vcpu->arch.pio_data = page_address(page);
6743 kvm_set_tsc_khz(vcpu, max_tsc_khz);
6745 r = kvm_mmu_create(vcpu);
6747 goto fail_free_pio_data;
6749 if (irqchip_in_kernel(kvm)) {
6750 r = kvm_create_lapic(vcpu);
6752 goto fail_mmu_destroy;
6754 static_key_slow_inc(&kvm_no_apic_vcpu);
6756 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6758 if (!vcpu->arch.mce_banks) {
6760 goto fail_free_lapic;
6762 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6764 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
6766 goto fail_free_mce_banks;
6771 goto fail_free_wbinvd_dirty_mask;
6773 vcpu->arch.ia32_tsc_adjust_msr = 0x0;
6774 vcpu->arch.pv_time_enabled = false;
6775 kvm_async_pf_hash_reset(vcpu);
6779 fail_free_wbinvd_dirty_mask:
6780 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6781 fail_free_mce_banks:
6782 kfree(vcpu->arch.mce_banks);
6784 kvm_free_lapic(vcpu);
6786 kvm_mmu_destroy(vcpu);
6788 free_page((unsigned long)vcpu->arch.pio_data);
6793 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6797 kvm_pmu_destroy(vcpu);
6798 kfree(vcpu->arch.mce_banks);
6799 kvm_free_lapic(vcpu);
6800 idx = srcu_read_lock(&vcpu->kvm->srcu);
6801 kvm_mmu_destroy(vcpu);
6802 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6803 free_page((unsigned long)vcpu->arch.pio_data);
6804 if (!irqchip_in_kernel(vcpu->kvm))
6805 static_key_slow_dec(&kvm_no_apic_vcpu);
6808 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6813 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6814 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6816 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6817 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6818 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
6819 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
6820 &kvm->arch.irq_sources_bitmap);
6822 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6823 mutex_init(&kvm->arch.apic_map_lock);
6824 spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
6826 pvclock_update_vm_gtod_copy(kvm);
6831 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6834 r = vcpu_load(vcpu);
6836 kvm_mmu_unload(vcpu);
6840 static void kvm_free_vcpus(struct kvm *kvm)
6843 struct kvm_vcpu *vcpu;
6846 * Unpin any mmu pages first.
6848 kvm_for_each_vcpu(i, vcpu, kvm) {
6849 kvm_clear_async_pf_completion_queue(vcpu);
6850 kvm_unload_vcpu_mmu(vcpu);
6852 kvm_for_each_vcpu(i, vcpu, kvm)
6853 kvm_arch_vcpu_free(vcpu);
6855 mutex_lock(&kvm->lock);
6856 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6857 kvm->vcpus[i] = NULL;
6859 atomic_set(&kvm->online_vcpus, 0);
6860 mutex_unlock(&kvm->lock);
6863 void kvm_arch_sync_events(struct kvm *kvm)
6865 kvm_free_all_assigned_devices(kvm);
6869 void kvm_arch_destroy_vm(struct kvm *kvm)
6871 if (current->mm == kvm->mm) {
6873 * Free memory regions allocated on behalf of userspace,
6874 * unless the the memory map has changed due to process exit
6877 struct kvm_userspace_memory_region mem;
6878 memset(&mem, 0, sizeof(mem));
6879 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
6880 kvm_set_memory_region(kvm, &mem);
6882 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
6883 kvm_set_memory_region(kvm, &mem);
6885 mem.slot = TSS_PRIVATE_MEMSLOT;
6886 kvm_set_memory_region(kvm, &mem);
6888 kvm_iommu_unmap_guest(kvm);
6889 kfree(kvm->arch.vpic);
6890 kfree(kvm->arch.vioapic);
6891 kvm_free_vcpus(kvm);
6892 if (kvm->arch.apic_access_page)
6893 put_page(kvm->arch.apic_access_page);
6894 if (kvm->arch.ept_identity_pagetable)
6895 put_page(kvm->arch.ept_identity_pagetable);
6896 kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
6899 void kvm_arch_free_memslot(struct kvm_memory_slot *free,
6900 struct kvm_memory_slot *dont)
6904 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6905 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
6906 kvm_kvfree(free->arch.rmap[i]);
6907 free->arch.rmap[i] = NULL;
6912 if (!dont || free->arch.lpage_info[i - 1] !=
6913 dont->arch.lpage_info[i - 1]) {
6914 kvm_kvfree(free->arch.lpage_info[i - 1]);
6915 free->arch.lpage_info[i - 1] = NULL;
6920 int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
6924 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6929 lpages = gfn_to_index(slot->base_gfn + npages - 1,
6930 slot->base_gfn, level) + 1;
6932 slot->arch.rmap[i] =
6933 kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
6934 if (!slot->arch.rmap[i])
6939 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
6940 sizeof(*slot->arch.lpage_info[i - 1]));
6941 if (!slot->arch.lpage_info[i - 1])
6944 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
6945 slot->arch.lpage_info[i - 1][0].write_count = 1;
6946 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
6947 slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
6948 ugfn = slot->userspace_addr >> PAGE_SHIFT;
6950 * If the gfn and userspace address are not aligned wrt each
6951 * other, or if explicitly asked to, disable large page
6952 * support for this slot
6954 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
6955 !kvm_largepages_enabled()) {
6958 for (j = 0; j < lpages; ++j)
6959 slot->arch.lpage_info[i - 1][j].write_count = 1;
6966 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
6967 kvm_kvfree(slot->arch.rmap[i]);
6968 slot->arch.rmap[i] = NULL;
6972 kvm_kvfree(slot->arch.lpage_info[i - 1]);
6973 slot->arch.lpage_info[i - 1] = NULL;
6978 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6979 struct kvm_memory_slot *memslot,
6980 struct kvm_userspace_memory_region *mem,
6981 enum kvm_mr_change change)
6984 * Only private memory slots need to be mapped here since
6985 * KVM_SET_MEMORY_REGION ioctl is no longer supported.
6987 if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
6988 unsigned long userspace_addr;
6991 * MAP_SHARED to prevent internal slot pages from being moved
6994 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
6995 PROT_READ | PROT_WRITE,
6996 MAP_SHARED | MAP_ANONYMOUS, 0);
6998 if (IS_ERR((void *)userspace_addr))
6999 return PTR_ERR((void *)userspace_addr);
7001 memslot->userspace_addr = userspace_addr;
7007 void kvm_arch_commit_memory_region(struct kvm *kvm,
7008 struct kvm_userspace_memory_region *mem,
7009 const struct kvm_memory_slot *old,
7010 enum kvm_mr_change change)
7013 int nr_mmu_pages = 0;
7015 if ((mem->slot >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_DELETE)) {
7018 ret = vm_munmap(old->userspace_addr,
7019 old->npages * PAGE_SIZE);
7022 "kvm_vm_ioctl_set_memory_region: "
7023 "failed to munmap memory\n");
7026 if (!kvm->arch.n_requested_mmu_pages)
7027 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7030 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7032 * Write protect all pages for dirty logging.
7033 * Existing largepage mappings are destroyed here and new ones will
7034 * not be created until the end of the logging.
7036 if ((change != KVM_MR_DELETE) && (mem->flags & KVM_MEM_LOG_DIRTY_PAGES))
7037 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
7039 * If memory slot is created, or moved, we need to clear all
7042 if ((change == KVM_MR_CREATE) || (change == KVM_MR_MOVE)) {
7043 kvm_mmu_zap_mmio_sptes(kvm);
7044 kvm_reload_remote_mmus(kvm);
7048 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7050 kvm_mmu_zap_all(kvm);
7051 kvm_reload_remote_mmus(kvm);
7054 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7055 struct kvm_memory_slot *slot)
7057 kvm_arch_flush_shadow_all(kvm);
7060 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7062 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7063 !vcpu->arch.apf.halted)
7064 || !list_empty_careful(&vcpu->async_pf.done)
7065 || kvm_apic_has_events(vcpu)
7066 || atomic_read(&vcpu->arch.nmi_queued) ||
7067 (kvm_arch_interrupt_allowed(vcpu) &&
7068 kvm_cpu_has_interrupt(vcpu));
7071 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7073 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7076 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7078 return kvm_x86_ops->interrupt_allowed(vcpu);
7081 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7083 unsigned long current_rip = kvm_rip_read(vcpu) +
7084 get_segment_base(vcpu, VCPU_SREG_CS);
7086 return current_rip == linear_rip;
7088 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7090 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7092 unsigned long rflags;
7094 rflags = kvm_x86_ops->get_rflags(vcpu);
7095 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7096 rflags &= ~X86_EFLAGS_TF;
7099 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7101 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7103 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7104 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7105 rflags |= X86_EFLAGS_TF;
7106 kvm_x86_ops->set_rflags(vcpu, rflags);
7107 kvm_make_request(KVM_REQ_EVENT, vcpu);
7109 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7111 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7115 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7116 is_error_page(work->page))
7119 r = kvm_mmu_reload(vcpu);
7123 if (!vcpu->arch.mmu.direct_map &&
7124 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7127 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7130 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7132 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7135 static inline u32 kvm_async_pf_next_probe(u32 key)
7137 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7140 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7142 u32 key = kvm_async_pf_hash_fn(gfn);
7144 while (vcpu->arch.apf.gfns[key] != ~0)
7145 key = kvm_async_pf_next_probe(key);
7147 vcpu->arch.apf.gfns[key] = gfn;
7150 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7153 u32 key = kvm_async_pf_hash_fn(gfn);
7155 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7156 (vcpu->arch.apf.gfns[key] != gfn &&
7157 vcpu->arch.apf.gfns[key] != ~0); i++)
7158 key = kvm_async_pf_next_probe(key);
7163 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7165 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7168 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7172 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7174 vcpu->arch.apf.gfns[i] = ~0;
7176 j = kvm_async_pf_next_probe(j);
7177 if (vcpu->arch.apf.gfns[j] == ~0)
7179 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7181 * k lies cyclically in ]i,j]
7183 * |....j i.k.| or |.k..j i...|
7185 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7186 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7191 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7194 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7198 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7199 struct kvm_async_pf *work)
7201 struct x86_exception fault;
7203 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7204 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7206 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7207 (vcpu->arch.apf.send_user_only &&
7208 kvm_x86_ops->get_cpl(vcpu) == 0))
7209 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7210 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7211 fault.vector = PF_VECTOR;
7212 fault.error_code_valid = true;
7213 fault.error_code = 0;
7214 fault.nested_page_fault = false;
7215 fault.address = work->arch.token;
7216 kvm_inject_page_fault(vcpu, &fault);
7220 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7221 struct kvm_async_pf *work)
7223 struct x86_exception fault;
7225 trace_kvm_async_pf_ready(work->arch.token, work->gva);
7226 if (is_error_page(work->page))
7227 work->arch.token = ~0; /* broadcast wakeup */
7229 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7231 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7232 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7233 fault.vector = PF_VECTOR;
7234 fault.error_code_valid = true;
7235 fault.error_code = 0;
7236 fault.nested_page_fault = false;
7237 fault.address = work->arch.token;
7238 kvm_inject_page_fault(vcpu, &fault);
7240 vcpu->arch.apf.halted = false;
7241 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7244 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7246 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7249 return !kvm_event_needs_reinjection(vcpu) &&
7250 kvm_x86_ops->interrupt_allowed(vcpu);
7253 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
7254 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
7255 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
7256 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
7257 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
7258 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
7259 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
7260 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
7261 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
7262 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
7263 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
7264 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);