2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/intel-iommu.h>
39 #include <asm/uaccess.h>
44 #define MAX_IO_MSRS 256
45 #define CR0_RESERVED_BITS \
46 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
47 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
48 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
49 #define CR4_RESERVED_BITS \
50 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
51 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
52 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
53 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
55 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
57 * - enable syscall per default because its emulated by KVM
58 * - enable LME and LMA per default on 64 bit KVM
61 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
66 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
67 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
69 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
70 struct kvm_cpuid_entry2 __user *entries);
72 struct kvm_x86_ops *kvm_x86_ops;
73 EXPORT_SYMBOL_GPL(kvm_x86_ops);
75 struct kvm_stats_debugfs_item debugfs_entries[] = {
76 { "pf_fixed", VCPU_STAT(pf_fixed) },
77 { "pf_guest", VCPU_STAT(pf_guest) },
78 { "tlb_flush", VCPU_STAT(tlb_flush) },
79 { "invlpg", VCPU_STAT(invlpg) },
80 { "exits", VCPU_STAT(exits) },
81 { "io_exits", VCPU_STAT(io_exits) },
82 { "mmio_exits", VCPU_STAT(mmio_exits) },
83 { "signal_exits", VCPU_STAT(signal_exits) },
84 { "irq_window", VCPU_STAT(irq_window_exits) },
85 { "nmi_window", VCPU_STAT(nmi_window_exits) },
86 { "halt_exits", VCPU_STAT(halt_exits) },
87 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
88 { "hypercalls", VCPU_STAT(hypercalls) },
89 { "request_irq", VCPU_STAT(request_irq_exits) },
90 { "request_nmi", VCPU_STAT(request_nmi_exits) },
91 { "irq_exits", VCPU_STAT(irq_exits) },
92 { "host_state_reload", VCPU_STAT(host_state_reload) },
93 { "efer_reload", VCPU_STAT(efer_reload) },
94 { "fpu_reload", VCPU_STAT(fpu_reload) },
95 { "insn_emulation", VCPU_STAT(insn_emulation) },
96 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
97 { "irq_injections", VCPU_STAT(irq_injections) },
98 { "nmi_injections", VCPU_STAT(nmi_injections) },
99 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
100 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
101 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
102 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
103 { "mmu_flooded", VM_STAT(mmu_flooded) },
104 { "mmu_recycled", VM_STAT(mmu_recycled) },
105 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
106 { "mmu_unsync", VM_STAT(mmu_unsync) },
107 { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
108 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
109 { "largepages", VM_STAT(lpages) },
113 unsigned long segment_base(u16 selector)
115 struct descriptor_table gdt;
116 struct desc_struct *d;
117 unsigned long table_base;
123 asm("sgdt %0" : "=m"(gdt));
124 table_base = gdt.base;
126 if (selector & 4) { /* from ldt */
129 asm("sldt %0" : "=g"(ldt_selector));
130 table_base = segment_base(ldt_selector);
132 d = (struct desc_struct *)(table_base + (selector & ~7));
133 v = d->base0 | ((unsigned long)d->base1 << 16) |
134 ((unsigned long)d->base2 << 24);
136 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
137 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
141 EXPORT_SYMBOL_GPL(segment_base);
143 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
145 if (irqchip_in_kernel(vcpu->kvm))
146 return vcpu->arch.apic_base;
148 return vcpu->arch.apic_base;
150 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
152 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
154 /* TODO: reserve bits check */
155 if (irqchip_in_kernel(vcpu->kvm))
156 kvm_lapic_set_base(vcpu, data);
158 vcpu->arch.apic_base = data;
160 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
162 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
164 WARN_ON(vcpu->arch.exception.pending);
165 vcpu->arch.exception.pending = true;
166 vcpu->arch.exception.has_error_code = false;
167 vcpu->arch.exception.nr = nr;
169 EXPORT_SYMBOL_GPL(kvm_queue_exception);
171 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
174 ++vcpu->stat.pf_guest;
175 if (vcpu->arch.exception.pending) {
176 if (vcpu->arch.exception.nr == PF_VECTOR) {
177 printk(KERN_DEBUG "kvm: inject_page_fault:"
178 " double fault 0x%lx\n", addr);
179 vcpu->arch.exception.nr = DF_VECTOR;
180 vcpu->arch.exception.error_code = 0;
181 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
182 /* triple fault -> shutdown */
183 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
187 vcpu->arch.cr2 = addr;
188 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
191 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
193 vcpu->arch.nmi_pending = 1;
195 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
197 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
199 WARN_ON(vcpu->arch.exception.pending);
200 vcpu->arch.exception.pending = true;
201 vcpu->arch.exception.has_error_code = true;
202 vcpu->arch.exception.nr = nr;
203 vcpu->arch.exception.error_code = error_code;
205 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
207 static void __queue_exception(struct kvm_vcpu *vcpu)
209 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
210 vcpu->arch.exception.has_error_code,
211 vcpu->arch.exception.error_code);
215 * Load the pae pdptrs. Return true is they are all valid.
217 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
219 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
220 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
223 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
225 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
226 offset * sizeof(u64), sizeof(pdpte));
231 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
232 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
239 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
244 EXPORT_SYMBOL_GPL(load_pdptrs);
246 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
248 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
252 if (is_long_mode(vcpu) || !is_pae(vcpu))
255 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
258 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
264 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
266 if (cr0 & CR0_RESERVED_BITS) {
267 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
268 cr0, vcpu->arch.cr0);
269 kvm_inject_gp(vcpu, 0);
273 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
274 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
275 kvm_inject_gp(vcpu, 0);
279 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
280 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
281 "and a clear PE flag\n");
282 kvm_inject_gp(vcpu, 0);
286 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
288 if ((vcpu->arch.shadow_efer & EFER_LME)) {
292 printk(KERN_DEBUG "set_cr0: #GP, start paging "
293 "in long mode while PAE is disabled\n");
294 kvm_inject_gp(vcpu, 0);
297 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
299 printk(KERN_DEBUG "set_cr0: #GP, start paging "
300 "in long mode while CS.L == 1\n");
301 kvm_inject_gp(vcpu, 0);
307 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
308 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
310 kvm_inject_gp(vcpu, 0);
316 kvm_x86_ops->set_cr0(vcpu, cr0);
317 vcpu->arch.cr0 = cr0;
319 kvm_mmu_sync_global(vcpu);
320 kvm_mmu_reset_context(vcpu);
323 EXPORT_SYMBOL_GPL(kvm_set_cr0);
325 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
327 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
328 KVMTRACE_1D(LMSW, vcpu,
329 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
332 EXPORT_SYMBOL_GPL(kvm_lmsw);
334 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
336 if (cr4 & CR4_RESERVED_BITS) {
337 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
338 kvm_inject_gp(vcpu, 0);
342 if (is_long_mode(vcpu)) {
343 if (!(cr4 & X86_CR4_PAE)) {
344 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
346 kvm_inject_gp(vcpu, 0);
349 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
350 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
351 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
352 kvm_inject_gp(vcpu, 0);
356 if (cr4 & X86_CR4_VMXE) {
357 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
358 kvm_inject_gp(vcpu, 0);
361 kvm_x86_ops->set_cr4(vcpu, cr4);
362 vcpu->arch.cr4 = cr4;
363 kvm_mmu_sync_global(vcpu);
364 kvm_mmu_reset_context(vcpu);
366 EXPORT_SYMBOL_GPL(kvm_set_cr4);
368 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
370 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
371 kvm_mmu_sync_roots(vcpu);
372 kvm_mmu_flush_tlb(vcpu);
376 if (is_long_mode(vcpu)) {
377 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
378 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
379 kvm_inject_gp(vcpu, 0);
384 if (cr3 & CR3_PAE_RESERVED_BITS) {
386 "set_cr3: #GP, reserved bits\n");
387 kvm_inject_gp(vcpu, 0);
390 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
391 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
393 kvm_inject_gp(vcpu, 0);
398 * We don't check reserved bits in nonpae mode, because
399 * this isn't enforced, and VMware depends on this.
404 * Does the new cr3 value map to physical memory? (Note, we
405 * catch an invalid cr3 even in real-mode, because it would
406 * cause trouble later on when we turn on paging anyway.)
408 * A real CPU would silently accept an invalid cr3 and would
409 * attempt to use it - with largely undefined (and often hard
410 * to debug) behavior on the guest side.
412 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
413 kvm_inject_gp(vcpu, 0);
415 vcpu->arch.cr3 = cr3;
416 vcpu->arch.mmu.new_cr3(vcpu);
419 EXPORT_SYMBOL_GPL(kvm_set_cr3);
421 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
423 if (cr8 & CR8_RESERVED_BITS) {
424 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
425 kvm_inject_gp(vcpu, 0);
428 if (irqchip_in_kernel(vcpu->kvm))
429 kvm_lapic_set_tpr(vcpu, cr8);
431 vcpu->arch.cr8 = cr8;
433 EXPORT_SYMBOL_GPL(kvm_set_cr8);
435 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
437 if (irqchip_in_kernel(vcpu->kvm))
438 return kvm_lapic_get_cr8(vcpu);
440 return vcpu->arch.cr8;
442 EXPORT_SYMBOL_GPL(kvm_get_cr8);
445 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
446 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
448 * This list is modified at module load time to reflect the
449 * capabilities of the host cpu.
451 static u32 msrs_to_save[] = {
452 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
455 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
457 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
458 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT
461 static unsigned num_msrs_to_save;
463 static u32 emulated_msrs[] = {
464 MSR_IA32_MISC_ENABLE,
467 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
469 if (efer & efer_reserved_bits) {
470 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
472 kvm_inject_gp(vcpu, 0);
477 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
478 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
479 kvm_inject_gp(vcpu, 0);
483 kvm_x86_ops->set_efer(vcpu, efer);
486 efer |= vcpu->arch.shadow_efer & EFER_LMA;
488 vcpu->arch.shadow_efer = efer;
491 void kvm_enable_efer_bits(u64 mask)
493 efer_reserved_bits &= ~mask;
495 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
499 * Writes msr value into into the appropriate "register".
500 * Returns 0 on success, non-0 otherwise.
501 * Assumes vcpu_load() was already called.
503 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
505 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
509 * Adapt set_msr() to msr_io()'s calling convention
511 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
513 return kvm_set_msr(vcpu, index, *data);
516 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
519 struct pvclock_wall_clock wc;
520 struct timespec now, sys, boot;
527 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
530 * The guest calculates current wall clock time by adding
531 * system time (updated by kvm_write_guest_time below) to the
532 * wall clock specified here. guest system time equals host
533 * system time for us, thus we must fill in host boot time here.
535 now = current_kernel_time();
537 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
539 wc.sec = boot.tv_sec;
540 wc.nsec = boot.tv_nsec;
541 wc.version = version;
543 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
546 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
549 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
551 uint32_t quotient, remainder;
553 /* Don't try to replace with do_div(), this one calculates
554 * "(dividend << 32) / divisor" */
556 : "=a" (quotient), "=d" (remainder)
557 : "0" (0), "1" (dividend), "r" (divisor) );
561 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
563 uint64_t nsecs = 1000000000LL;
568 tps64 = tsc_khz * 1000LL;
569 while (tps64 > nsecs*2) {
574 tps32 = (uint32_t)tps64;
575 while (tps32 <= (uint32_t)nsecs) {
580 hv_clock->tsc_shift = shift;
581 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
583 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
584 __func__, tsc_khz, hv_clock->tsc_shift,
585 hv_clock->tsc_to_system_mul);
588 static void kvm_write_guest_time(struct kvm_vcpu *v)
592 struct kvm_vcpu_arch *vcpu = &v->arch;
595 if ((!vcpu->time_page))
598 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
599 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
600 vcpu->hv_clock_tsc_khz = tsc_khz;
603 /* Keep irq disabled to prevent changes to the clock */
604 local_irq_save(flags);
605 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
606 &vcpu->hv_clock.tsc_timestamp);
608 local_irq_restore(flags);
610 /* With all the info we got, fill in the values */
612 vcpu->hv_clock.system_time = ts.tv_nsec +
613 (NSEC_PER_SEC * (u64)ts.tv_sec);
615 * The interface expects us to write an even number signaling that the
616 * update is finished. Since the guest won't see the intermediate
617 * state, we just increase by 2 at the end.
619 vcpu->hv_clock.version += 2;
621 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
623 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
624 sizeof(vcpu->hv_clock));
626 kunmap_atomic(shared_kaddr, KM_USER0);
628 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
631 static bool msr_mtrr_valid(unsigned msr)
634 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
635 case MSR_MTRRfix64K_00000:
636 case MSR_MTRRfix16K_80000:
637 case MSR_MTRRfix16K_A0000:
638 case MSR_MTRRfix4K_C0000:
639 case MSR_MTRRfix4K_C8000:
640 case MSR_MTRRfix4K_D0000:
641 case MSR_MTRRfix4K_D8000:
642 case MSR_MTRRfix4K_E0000:
643 case MSR_MTRRfix4K_E8000:
644 case MSR_MTRRfix4K_F0000:
645 case MSR_MTRRfix4K_F8000:
646 case MSR_MTRRdefType:
647 case MSR_IA32_CR_PAT:
655 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
657 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
659 if (!msr_mtrr_valid(msr))
662 if (msr == MSR_MTRRdefType) {
663 vcpu->arch.mtrr_state.def_type = data;
664 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
665 } else if (msr == MSR_MTRRfix64K_00000)
667 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
668 p[1 + msr - MSR_MTRRfix16K_80000] = data;
669 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
670 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
671 else if (msr == MSR_IA32_CR_PAT)
672 vcpu->arch.pat = data;
673 else { /* Variable MTRRs */
674 int idx, is_mtrr_mask;
677 idx = (msr - 0x200) / 2;
678 is_mtrr_mask = msr - 0x200 - 2 * idx;
681 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
684 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
688 kvm_mmu_reset_context(vcpu);
692 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
696 set_efer(vcpu, data);
698 case MSR_IA32_MC0_STATUS:
699 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
702 case MSR_IA32_MCG_STATUS:
703 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
706 case MSR_IA32_MCG_CTL:
707 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
710 case MSR_IA32_DEBUGCTLMSR:
712 /* We support the non-activated case already */
714 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
715 /* Values other than LBR and BTF are vendor-specific,
716 thus reserved and should throw a #GP */
719 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
722 case MSR_IA32_UCODE_REV:
723 case MSR_IA32_UCODE_WRITE:
725 case 0x200 ... 0x2ff:
726 return set_msr_mtrr(vcpu, msr, data);
727 case MSR_IA32_APICBASE:
728 kvm_set_apic_base(vcpu, data);
730 case MSR_IA32_MISC_ENABLE:
731 vcpu->arch.ia32_misc_enable_msr = data;
733 case MSR_KVM_WALL_CLOCK:
734 vcpu->kvm->arch.wall_clock = data;
735 kvm_write_wall_clock(vcpu->kvm, data);
737 case MSR_KVM_SYSTEM_TIME: {
738 if (vcpu->arch.time_page) {
739 kvm_release_page_dirty(vcpu->arch.time_page);
740 vcpu->arch.time_page = NULL;
743 vcpu->arch.time = data;
745 /* we verify if the enable bit is set... */
749 /* ...but clean it before doing the actual write */
750 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
752 vcpu->arch.time_page =
753 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
755 if (is_error_page(vcpu->arch.time_page)) {
756 kvm_release_page_clean(vcpu->arch.time_page);
757 vcpu->arch.time_page = NULL;
760 kvm_write_guest_time(vcpu);
764 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
769 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
773 * Reads an msr value (of 'msr_index') into 'pdata'.
774 * Returns 0 on success, non-0 otherwise.
775 * Assumes vcpu_load() was already called.
777 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
779 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
782 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
784 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
786 if (!msr_mtrr_valid(msr))
789 if (msr == MSR_MTRRdefType)
790 *pdata = vcpu->arch.mtrr_state.def_type +
791 (vcpu->arch.mtrr_state.enabled << 10);
792 else if (msr == MSR_MTRRfix64K_00000)
794 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
795 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
796 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
797 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
798 else if (msr == MSR_IA32_CR_PAT)
799 *pdata = vcpu->arch.pat;
800 else { /* Variable MTRRs */
801 int idx, is_mtrr_mask;
804 idx = (msr - 0x200) / 2;
805 is_mtrr_mask = msr - 0x200 - 2 * idx;
808 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
811 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
818 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
823 case 0xc0010010: /* SYSCFG */
824 case 0xc0010015: /* HWCR */
825 case MSR_IA32_PLATFORM_ID:
826 case MSR_IA32_P5_MC_ADDR:
827 case MSR_IA32_P5_MC_TYPE:
828 case MSR_IA32_MC0_CTL:
829 case MSR_IA32_MCG_STATUS:
830 case MSR_IA32_MCG_CAP:
831 case MSR_IA32_MCG_CTL:
832 case MSR_IA32_MC0_MISC:
833 case MSR_IA32_MC0_MISC+4:
834 case MSR_IA32_MC0_MISC+8:
835 case MSR_IA32_MC0_MISC+12:
836 case MSR_IA32_MC0_MISC+16:
837 case MSR_IA32_MC0_MISC+20:
838 case MSR_IA32_UCODE_REV:
839 case MSR_IA32_EBL_CR_POWERON:
840 case MSR_IA32_DEBUGCTLMSR:
841 case MSR_IA32_LASTBRANCHFROMIP:
842 case MSR_IA32_LASTBRANCHTOIP:
843 case MSR_IA32_LASTINTFROMIP:
844 case MSR_IA32_LASTINTTOIP:
848 data = 0x500 | KVM_NR_VAR_MTRR;
850 case 0x200 ... 0x2ff:
851 return get_msr_mtrr(vcpu, msr, pdata);
852 case 0xcd: /* fsb frequency */
855 case MSR_IA32_APICBASE:
856 data = kvm_get_apic_base(vcpu);
858 case MSR_IA32_MISC_ENABLE:
859 data = vcpu->arch.ia32_misc_enable_msr;
861 case MSR_IA32_PERF_STATUS:
862 /* TSC increment by tick */
865 data |= (((uint64_t)4ULL) << 40);
868 data = vcpu->arch.shadow_efer;
870 case MSR_KVM_WALL_CLOCK:
871 data = vcpu->kvm->arch.wall_clock;
873 case MSR_KVM_SYSTEM_TIME:
874 data = vcpu->arch.time;
877 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
883 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
886 * Read or write a bunch of msrs. All parameters are kernel addresses.
888 * @return number of msrs set successfully.
890 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
891 struct kvm_msr_entry *entries,
892 int (*do_msr)(struct kvm_vcpu *vcpu,
893 unsigned index, u64 *data))
899 down_read(&vcpu->kvm->slots_lock);
900 for (i = 0; i < msrs->nmsrs; ++i)
901 if (do_msr(vcpu, entries[i].index, &entries[i].data))
903 up_read(&vcpu->kvm->slots_lock);
911 * Read or write a bunch of msrs. Parameters are user addresses.
913 * @return number of msrs set successfully.
915 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
916 int (*do_msr)(struct kvm_vcpu *vcpu,
917 unsigned index, u64 *data),
920 struct kvm_msrs msrs;
921 struct kvm_msr_entry *entries;
926 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
930 if (msrs.nmsrs >= MAX_IO_MSRS)
934 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
935 entries = vmalloc(size);
940 if (copy_from_user(entries, user_msrs->entries, size))
943 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
948 if (writeback && copy_to_user(user_msrs->entries, entries, size))
959 int kvm_dev_ioctl_check_extension(long ext)
964 case KVM_CAP_IRQCHIP:
966 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
967 case KVM_CAP_USER_MEMORY:
968 case KVM_CAP_SET_TSS_ADDR:
969 case KVM_CAP_EXT_CPUID:
970 case KVM_CAP_CLOCKSOURCE:
972 case KVM_CAP_NOP_IO_DELAY:
973 case KVM_CAP_MP_STATE:
974 case KVM_CAP_SYNC_MMU:
977 case KVM_CAP_COALESCED_MMIO:
978 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
981 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
983 case KVM_CAP_NR_VCPUS:
986 case KVM_CAP_NR_MEMSLOTS:
987 r = KVM_MEMORY_SLOTS;
993 r = intel_iommu_found();
1003 long kvm_arch_dev_ioctl(struct file *filp,
1004 unsigned int ioctl, unsigned long arg)
1006 void __user *argp = (void __user *)arg;
1010 case KVM_GET_MSR_INDEX_LIST: {
1011 struct kvm_msr_list __user *user_msr_list = argp;
1012 struct kvm_msr_list msr_list;
1016 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1019 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1020 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1023 if (n < num_msrs_to_save)
1026 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1027 num_msrs_to_save * sizeof(u32)))
1029 if (copy_to_user(user_msr_list->indices
1030 + num_msrs_to_save * sizeof(u32),
1032 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1037 case KVM_GET_SUPPORTED_CPUID: {
1038 struct kvm_cpuid2 __user *cpuid_arg = argp;
1039 struct kvm_cpuid2 cpuid;
1042 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1044 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1045 cpuid_arg->entries);
1050 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1062 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1064 kvm_x86_ops->vcpu_load(vcpu, cpu);
1065 kvm_write_guest_time(vcpu);
1068 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1070 kvm_x86_ops->vcpu_put(vcpu);
1071 kvm_put_guest_fpu(vcpu);
1074 static int is_efer_nx(void)
1078 rdmsrl(MSR_EFER, efer);
1079 return efer & EFER_NX;
1082 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1085 struct kvm_cpuid_entry2 *e, *entry;
1088 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1089 e = &vcpu->arch.cpuid_entries[i];
1090 if (e->function == 0x80000001) {
1095 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1096 entry->edx &= ~(1 << 20);
1097 printk(KERN_INFO "kvm: guest NX capability removed\n");
1101 /* when an old userspace process fills a new kernel module */
1102 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1103 struct kvm_cpuid *cpuid,
1104 struct kvm_cpuid_entry __user *entries)
1107 struct kvm_cpuid_entry *cpuid_entries;
1110 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1113 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1117 if (copy_from_user(cpuid_entries, entries,
1118 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1120 for (i = 0; i < cpuid->nent; i++) {
1121 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1122 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1123 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1124 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1125 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1126 vcpu->arch.cpuid_entries[i].index = 0;
1127 vcpu->arch.cpuid_entries[i].flags = 0;
1128 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1129 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1130 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1132 vcpu->arch.cpuid_nent = cpuid->nent;
1133 cpuid_fix_nx_cap(vcpu);
1137 vfree(cpuid_entries);
1142 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1143 struct kvm_cpuid2 *cpuid,
1144 struct kvm_cpuid_entry2 __user *entries)
1149 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1152 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1153 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1155 vcpu->arch.cpuid_nent = cpuid->nent;
1162 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1163 struct kvm_cpuid2 *cpuid,
1164 struct kvm_cpuid_entry2 __user *entries)
1169 if (cpuid->nent < vcpu->arch.cpuid_nent)
1172 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1173 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1178 cpuid->nent = vcpu->arch.cpuid_nent;
1182 static inline u32 bit(int bitno)
1184 return 1 << (bitno & 31);
1187 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1190 entry->function = function;
1191 entry->index = index;
1192 cpuid_count(entry->function, entry->index,
1193 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1197 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1198 u32 index, int *nent, int maxnent)
1200 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1201 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1202 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1203 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1204 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1205 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1206 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1207 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1208 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1209 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1210 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1211 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1212 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1213 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1214 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1215 bit(X86_FEATURE_PGE) |
1216 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1217 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1218 bit(X86_FEATURE_SYSCALL) |
1219 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1220 #ifdef CONFIG_X86_64
1221 bit(X86_FEATURE_LM) |
1223 bit(X86_FEATURE_MMXEXT) |
1224 bit(X86_FEATURE_3DNOWEXT) |
1225 bit(X86_FEATURE_3DNOW);
1226 const u32 kvm_supported_word3_x86_features =
1227 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1228 const u32 kvm_supported_word6_x86_features =
1229 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
1231 /* all func 2 cpuid_count() should be called on the same cpu */
1233 do_cpuid_1_ent(entry, function, index);
1238 entry->eax = min(entry->eax, (u32)0xb);
1241 entry->edx &= kvm_supported_word0_x86_features;
1242 entry->ecx &= kvm_supported_word3_x86_features;
1244 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1245 * may return different values. This forces us to get_cpu() before
1246 * issuing the first command, and also to emulate this annoying behavior
1247 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1249 int t, times = entry->eax & 0xff;
1251 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1252 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1253 for (t = 1; t < times && *nent < maxnent; ++t) {
1254 do_cpuid_1_ent(&entry[t], function, 0);
1255 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1260 /* function 4 and 0xb have additional index. */
1264 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1265 /* read more entries until cache_type is zero */
1266 for (i = 1; *nent < maxnent; ++i) {
1267 cache_type = entry[i - 1].eax & 0x1f;
1270 do_cpuid_1_ent(&entry[i], function, i);
1272 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1280 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1281 /* read more entries until level_type is zero */
1282 for (i = 1; *nent < maxnent; ++i) {
1283 level_type = entry[i - 1].ecx & 0xff00;
1286 do_cpuid_1_ent(&entry[i], function, i);
1288 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1294 entry->eax = min(entry->eax, 0x8000001a);
1297 entry->edx &= kvm_supported_word1_x86_features;
1298 entry->ecx &= kvm_supported_word6_x86_features;
1304 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1305 struct kvm_cpuid_entry2 __user *entries)
1307 struct kvm_cpuid_entry2 *cpuid_entries;
1308 int limit, nent = 0, r = -E2BIG;
1311 if (cpuid->nent < 1)
1314 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1318 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1319 limit = cpuid_entries[0].eax;
1320 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1321 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1322 &nent, cpuid->nent);
1324 if (nent >= cpuid->nent)
1327 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1328 limit = cpuid_entries[nent - 1].eax;
1329 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1330 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1331 &nent, cpuid->nent);
1333 if (copy_to_user(entries, cpuid_entries,
1334 nent * sizeof(struct kvm_cpuid_entry2)))
1340 vfree(cpuid_entries);
1345 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1346 struct kvm_lapic_state *s)
1349 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1355 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1356 struct kvm_lapic_state *s)
1359 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1360 kvm_apic_post_state_restore(vcpu);
1366 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1367 struct kvm_interrupt *irq)
1369 if (irq->irq < 0 || irq->irq >= 256)
1371 if (irqchip_in_kernel(vcpu->kvm))
1375 set_bit(irq->irq, vcpu->arch.irq_pending);
1376 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1383 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1386 kvm_inject_nmi(vcpu);
1392 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1393 struct kvm_tpr_access_ctl *tac)
1397 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1401 long kvm_arch_vcpu_ioctl(struct file *filp,
1402 unsigned int ioctl, unsigned long arg)
1404 struct kvm_vcpu *vcpu = filp->private_data;
1405 void __user *argp = (void __user *)arg;
1407 struct kvm_lapic_state *lapic = NULL;
1410 case KVM_GET_LAPIC: {
1411 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1416 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1420 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1425 case KVM_SET_LAPIC: {
1426 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1431 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1433 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1439 case KVM_INTERRUPT: {
1440 struct kvm_interrupt irq;
1443 if (copy_from_user(&irq, argp, sizeof irq))
1445 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1452 r = kvm_vcpu_ioctl_nmi(vcpu);
1458 case KVM_SET_CPUID: {
1459 struct kvm_cpuid __user *cpuid_arg = argp;
1460 struct kvm_cpuid cpuid;
1463 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1465 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1470 case KVM_SET_CPUID2: {
1471 struct kvm_cpuid2 __user *cpuid_arg = argp;
1472 struct kvm_cpuid2 cpuid;
1475 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1477 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1478 cpuid_arg->entries);
1483 case KVM_GET_CPUID2: {
1484 struct kvm_cpuid2 __user *cpuid_arg = argp;
1485 struct kvm_cpuid2 cpuid;
1488 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1490 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1491 cpuid_arg->entries);
1495 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1501 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1504 r = msr_io(vcpu, argp, do_set_msr, 0);
1506 case KVM_TPR_ACCESS_REPORTING: {
1507 struct kvm_tpr_access_ctl tac;
1510 if (copy_from_user(&tac, argp, sizeof tac))
1512 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1516 if (copy_to_user(argp, &tac, sizeof tac))
1521 case KVM_SET_VAPIC_ADDR: {
1522 struct kvm_vapic_addr va;
1525 if (!irqchip_in_kernel(vcpu->kvm))
1528 if (copy_from_user(&va, argp, sizeof va))
1531 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1543 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1547 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1549 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1553 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1554 u32 kvm_nr_mmu_pages)
1556 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1559 down_write(&kvm->slots_lock);
1561 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1562 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1564 up_write(&kvm->slots_lock);
1568 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1570 return kvm->arch.n_alloc_mmu_pages;
1573 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1576 struct kvm_mem_alias *alias;
1578 for (i = 0; i < kvm->arch.naliases; ++i) {
1579 alias = &kvm->arch.aliases[i];
1580 if (gfn >= alias->base_gfn
1581 && gfn < alias->base_gfn + alias->npages)
1582 return alias->target_gfn + gfn - alias->base_gfn;
1588 * Set a new alias region. Aliases map a portion of physical memory into
1589 * another portion. This is useful for memory windows, for example the PC
1592 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1593 struct kvm_memory_alias *alias)
1596 struct kvm_mem_alias *p;
1599 /* General sanity checks */
1600 if (alias->memory_size & (PAGE_SIZE - 1))
1602 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1604 if (alias->slot >= KVM_ALIAS_SLOTS)
1606 if (alias->guest_phys_addr + alias->memory_size
1607 < alias->guest_phys_addr)
1609 if (alias->target_phys_addr + alias->memory_size
1610 < alias->target_phys_addr)
1613 down_write(&kvm->slots_lock);
1614 spin_lock(&kvm->mmu_lock);
1616 p = &kvm->arch.aliases[alias->slot];
1617 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1618 p->npages = alias->memory_size >> PAGE_SHIFT;
1619 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1621 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1622 if (kvm->arch.aliases[n - 1].npages)
1624 kvm->arch.naliases = n;
1626 spin_unlock(&kvm->mmu_lock);
1627 kvm_mmu_zap_all(kvm);
1629 up_write(&kvm->slots_lock);
1637 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1642 switch (chip->chip_id) {
1643 case KVM_IRQCHIP_PIC_MASTER:
1644 memcpy(&chip->chip.pic,
1645 &pic_irqchip(kvm)->pics[0],
1646 sizeof(struct kvm_pic_state));
1648 case KVM_IRQCHIP_PIC_SLAVE:
1649 memcpy(&chip->chip.pic,
1650 &pic_irqchip(kvm)->pics[1],
1651 sizeof(struct kvm_pic_state));
1653 case KVM_IRQCHIP_IOAPIC:
1654 memcpy(&chip->chip.ioapic,
1655 ioapic_irqchip(kvm),
1656 sizeof(struct kvm_ioapic_state));
1665 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1670 switch (chip->chip_id) {
1671 case KVM_IRQCHIP_PIC_MASTER:
1672 memcpy(&pic_irqchip(kvm)->pics[0],
1674 sizeof(struct kvm_pic_state));
1676 case KVM_IRQCHIP_PIC_SLAVE:
1677 memcpy(&pic_irqchip(kvm)->pics[1],
1679 sizeof(struct kvm_pic_state));
1681 case KVM_IRQCHIP_IOAPIC:
1682 memcpy(ioapic_irqchip(kvm),
1684 sizeof(struct kvm_ioapic_state));
1690 kvm_pic_update_irq(pic_irqchip(kvm));
1694 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1698 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1702 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1706 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1707 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1712 * Get (and clear) the dirty memory log for a memory slot.
1714 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1715 struct kvm_dirty_log *log)
1719 struct kvm_memory_slot *memslot;
1722 down_write(&kvm->slots_lock);
1724 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1728 /* If nothing is dirty, don't bother messing with page tables. */
1730 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1731 kvm_flush_remote_tlbs(kvm);
1732 memslot = &kvm->memslots[log->slot];
1733 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1734 memset(memslot->dirty_bitmap, 0, n);
1738 up_write(&kvm->slots_lock);
1742 long kvm_arch_vm_ioctl(struct file *filp,
1743 unsigned int ioctl, unsigned long arg)
1745 struct kvm *kvm = filp->private_data;
1746 void __user *argp = (void __user *)arg;
1749 * This union makes it completely explicit to gcc-3.x
1750 * that these two variables' stack usage should be
1751 * combined, not added together.
1754 struct kvm_pit_state ps;
1755 struct kvm_memory_alias alias;
1759 case KVM_SET_TSS_ADDR:
1760 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1764 case KVM_SET_MEMORY_REGION: {
1765 struct kvm_memory_region kvm_mem;
1766 struct kvm_userspace_memory_region kvm_userspace_mem;
1769 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1771 kvm_userspace_mem.slot = kvm_mem.slot;
1772 kvm_userspace_mem.flags = kvm_mem.flags;
1773 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1774 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1775 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1780 case KVM_SET_NR_MMU_PAGES:
1781 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1785 case KVM_GET_NR_MMU_PAGES:
1786 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1788 case KVM_SET_MEMORY_ALIAS:
1790 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1792 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1796 case KVM_CREATE_IRQCHIP:
1798 kvm->arch.vpic = kvm_create_pic(kvm);
1799 if (kvm->arch.vpic) {
1800 r = kvm_ioapic_init(kvm);
1802 kfree(kvm->arch.vpic);
1803 kvm->arch.vpic = NULL;
1809 case KVM_CREATE_PIT:
1811 kvm->arch.vpit = kvm_create_pit(kvm);
1815 case KVM_IRQ_LINE: {
1816 struct kvm_irq_level irq_event;
1819 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1821 if (irqchip_in_kernel(kvm)) {
1822 mutex_lock(&kvm->lock);
1823 kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1824 irq_event.irq, irq_event.level);
1825 mutex_unlock(&kvm->lock);
1830 case KVM_GET_IRQCHIP: {
1831 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1832 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1838 if (copy_from_user(chip, argp, sizeof *chip))
1839 goto get_irqchip_out;
1841 if (!irqchip_in_kernel(kvm))
1842 goto get_irqchip_out;
1843 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1845 goto get_irqchip_out;
1847 if (copy_to_user(argp, chip, sizeof *chip))
1848 goto get_irqchip_out;
1856 case KVM_SET_IRQCHIP: {
1857 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1858 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1864 if (copy_from_user(chip, argp, sizeof *chip))
1865 goto set_irqchip_out;
1867 if (!irqchip_in_kernel(kvm))
1868 goto set_irqchip_out;
1869 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1871 goto set_irqchip_out;
1881 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1884 if (!kvm->arch.vpit)
1886 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1890 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1897 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1900 if (!kvm->arch.vpit)
1902 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1915 static void kvm_init_msr_list(void)
1920 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1921 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1924 msrs_to_save[j] = msrs_to_save[i];
1927 num_msrs_to_save = j;
1931 * Only apic need an MMIO device hook, so shortcut now..
1933 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1934 gpa_t addr, int len,
1937 struct kvm_io_device *dev;
1939 if (vcpu->arch.apic) {
1940 dev = &vcpu->arch.apic->dev;
1941 if (dev->in_range(dev, addr, len, is_write))
1948 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1949 gpa_t addr, int len,
1952 struct kvm_io_device *dev;
1954 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
1956 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
1961 int emulator_read_std(unsigned long addr,
1964 struct kvm_vcpu *vcpu)
1967 int r = X86EMUL_CONTINUE;
1970 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1971 unsigned offset = addr & (PAGE_SIZE-1);
1972 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1975 if (gpa == UNMAPPED_GVA) {
1976 r = X86EMUL_PROPAGATE_FAULT;
1979 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
1981 r = X86EMUL_UNHANDLEABLE;
1992 EXPORT_SYMBOL_GPL(emulator_read_std);
1994 static int emulator_read_emulated(unsigned long addr,
1997 struct kvm_vcpu *vcpu)
1999 struct kvm_io_device *mmio_dev;
2002 if (vcpu->mmio_read_completed) {
2003 memcpy(val, vcpu->mmio_data, bytes);
2004 vcpu->mmio_read_completed = 0;
2005 return X86EMUL_CONTINUE;
2008 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2010 /* For APIC access vmexit */
2011 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2014 if (emulator_read_std(addr, val, bytes, vcpu)
2015 == X86EMUL_CONTINUE)
2016 return X86EMUL_CONTINUE;
2017 if (gpa == UNMAPPED_GVA)
2018 return X86EMUL_PROPAGATE_FAULT;
2022 * Is this MMIO handled locally?
2024 mutex_lock(&vcpu->kvm->lock);
2025 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2027 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2028 mutex_unlock(&vcpu->kvm->lock);
2029 return X86EMUL_CONTINUE;
2031 mutex_unlock(&vcpu->kvm->lock);
2033 vcpu->mmio_needed = 1;
2034 vcpu->mmio_phys_addr = gpa;
2035 vcpu->mmio_size = bytes;
2036 vcpu->mmio_is_write = 0;
2038 return X86EMUL_UNHANDLEABLE;
2041 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2042 const void *val, int bytes)
2046 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2049 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
2053 static int emulator_write_emulated_onepage(unsigned long addr,
2056 struct kvm_vcpu *vcpu)
2058 struct kvm_io_device *mmio_dev;
2061 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2063 if (gpa == UNMAPPED_GVA) {
2064 kvm_inject_page_fault(vcpu, addr, 2);
2065 return X86EMUL_PROPAGATE_FAULT;
2068 /* For APIC access vmexit */
2069 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2072 if (emulator_write_phys(vcpu, gpa, val, bytes))
2073 return X86EMUL_CONTINUE;
2077 * Is this MMIO handled locally?
2079 mutex_lock(&vcpu->kvm->lock);
2080 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2082 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2083 mutex_unlock(&vcpu->kvm->lock);
2084 return X86EMUL_CONTINUE;
2086 mutex_unlock(&vcpu->kvm->lock);
2088 vcpu->mmio_needed = 1;
2089 vcpu->mmio_phys_addr = gpa;
2090 vcpu->mmio_size = bytes;
2091 vcpu->mmio_is_write = 1;
2092 memcpy(vcpu->mmio_data, val, bytes);
2094 return X86EMUL_CONTINUE;
2097 int emulator_write_emulated(unsigned long addr,
2100 struct kvm_vcpu *vcpu)
2102 /* Crossing a page boundary? */
2103 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2106 now = -addr & ~PAGE_MASK;
2107 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2108 if (rc != X86EMUL_CONTINUE)
2114 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2116 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2118 static int emulator_cmpxchg_emulated(unsigned long addr,
2122 struct kvm_vcpu *vcpu)
2124 static int reported;
2128 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2130 #ifndef CONFIG_X86_64
2131 /* guests cmpxchg8b have to be emulated atomically */
2138 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2140 if (gpa == UNMAPPED_GVA ||
2141 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2144 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2149 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2151 kaddr = kmap_atomic(page, KM_USER0);
2152 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2153 kunmap_atomic(kaddr, KM_USER0);
2154 kvm_release_page_dirty(page);
2159 return emulator_write_emulated(addr, new, bytes, vcpu);
2162 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2164 return kvm_x86_ops->get_segment_base(vcpu, seg);
2167 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2169 kvm_mmu_invlpg(vcpu, address);
2170 return X86EMUL_CONTINUE;
2173 int emulate_clts(struct kvm_vcpu *vcpu)
2175 KVMTRACE_0D(CLTS, vcpu, handler);
2176 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2177 return X86EMUL_CONTINUE;
2180 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2182 struct kvm_vcpu *vcpu = ctxt->vcpu;
2186 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2187 return X86EMUL_CONTINUE;
2189 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2190 return X86EMUL_UNHANDLEABLE;
2194 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2196 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2199 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2201 /* FIXME: better handling */
2202 return X86EMUL_UNHANDLEABLE;
2204 return X86EMUL_CONTINUE;
2207 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2210 unsigned long rip = kvm_rip_read(vcpu);
2211 unsigned long rip_linear;
2213 if (!printk_ratelimit())
2216 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2218 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
2220 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2221 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2223 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2225 static struct x86_emulate_ops emulate_ops = {
2226 .read_std = emulator_read_std,
2227 .read_emulated = emulator_read_emulated,
2228 .write_emulated = emulator_write_emulated,
2229 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2232 static void cache_all_regs(struct kvm_vcpu *vcpu)
2234 kvm_register_read(vcpu, VCPU_REGS_RAX);
2235 kvm_register_read(vcpu, VCPU_REGS_RSP);
2236 kvm_register_read(vcpu, VCPU_REGS_RIP);
2237 vcpu->arch.regs_dirty = ~0;
2240 int emulate_instruction(struct kvm_vcpu *vcpu,
2241 struct kvm_run *run,
2247 struct decode_cache *c;
2249 kvm_clear_exception_queue(vcpu);
2250 vcpu->arch.mmio_fault_cr2 = cr2;
2252 * TODO: fix x86_emulate.c to use guest_read/write_register
2253 * instead of direct ->regs accesses, can save hundred cycles
2254 * on Intel for instructions that don't read/change RSP, for
2257 cache_all_regs(vcpu);
2259 vcpu->mmio_is_write = 0;
2260 vcpu->arch.pio.string = 0;
2262 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2264 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2266 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2267 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2268 vcpu->arch.emulate_ctxt.mode =
2269 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2270 ? X86EMUL_MODE_REAL : cs_l
2271 ? X86EMUL_MODE_PROT64 : cs_db
2272 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2274 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2276 /* Reject the instructions other than VMCALL/VMMCALL when
2277 * try to emulate invalid opcode */
2278 c = &vcpu->arch.emulate_ctxt.decode;
2279 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2280 (!(c->twobyte && c->b == 0x01 &&
2281 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2282 c->modrm_mod == 3 && c->modrm_rm == 1)))
2283 return EMULATE_FAIL;
2285 ++vcpu->stat.insn_emulation;
2287 ++vcpu->stat.insn_emulation_fail;
2288 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2289 return EMULATE_DONE;
2290 return EMULATE_FAIL;
2294 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2296 if (vcpu->arch.pio.string)
2297 return EMULATE_DO_MMIO;
2299 if ((r || vcpu->mmio_is_write) && run) {
2300 run->exit_reason = KVM_EXIT_MMIO;
2301 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2302 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2303 run->mmio.len = vcpu->mmio_size;
2304 run->mmio.is_write = vcpu->mmio_is_write;
2308 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2309 return EMULATE_DONE;
2310 if (!vcpu->mmio_needed) {
2311 kvm_report_emulation_failure(vcpu, "mmio");
2312 return EMULATE_FAIL;
2314 return EMULATE_DO_MMIO;
2317 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2319 if (vcpu->mmio_is_write) {
2320 vcpu->mmio_needed = 0;
2321 return EMULATE_DO_MMIO;
2324 return EMULATE_DONE;
2326 EXPORT_SYMBOL_GPL(emulate_instruction);
2328 static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
2332 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
2333 if (vcpu->arch.pio.guest_pages[i]) {
2334 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
2335 vcpu->arch.pio.guest_pages[i] = NULL;
2339 static int pio_copy_data(struct kvm_vcpu *vcpu)
2341 void *p = vcpu->arch.pio_data;
2344 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
2346 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
2349 free_pio_guest_pages(vcpu);
2352 q += vcpu->arch.pio.guest_page_offset;
2353 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2354 if (vcpu->arch.pio.in)
2355 memcpy(q, p, bytes);
2357 memcpy(p, q, bytes);
2358 q -= vcpu->arch.pio.guest_page_offset;
2360 free_pio_guest_pages(vcpu);
2364 int complete_pio(struct kvm_vcpu *vcpu)
2366 struct kvm_pio_request *io = &vcpu->arch.pio;
2373 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2374 memcpy(&val, vcpu->arch.pio_data, io->size);
2375 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2379 r = pio_copy_data(vcpu);
2386 delta *= io->cur_count;
2388 * The size of the register should really depend on
2389 * current address size.
2391 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2393 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2399 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2401 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2403 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2405 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2409 io->count -= io->cur_count;
2415 static void kernel_pio(struct kvm_io_device *pio_dev,
2416 struct kvm_vcpu *vcpu,
2419 /* TODO: String I/O for in kernel device */
2421 mutex_lock(&vcpu->kvm->lock);
2422 if (vcpu->arch.pio.in)
2423 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2424 vcpu->arch.pio.size,
2427 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2428 vcpu->arch.pio.size,
2430 mutex_unlock(&vcpu->kvm->lock);
2433 static void pio_string_write(struct kvm_io_device *pio_dev,
2434 struct kvm_vcpu *vcpu)
2436 struct kvm_pio_request *io = &vcpu->arch.pio;
2437 void *pd = vcpu->arch.pio_data;
2440 mutex_lock(&vcpu->kvm->lock);
2441 for (i = 0; i < io->cur_count; i++) {
2442 kvm_iodevice_write(pio_dev, io->port,
2447 mutex_unlock(&vcpu->kvm->lock);
2450 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2451 gpa_t addr, int len,
2454 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2457 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2458 int size, unsigned port)
2460 struct kvm_io_device *pio_dev;
2463 vcpu->run->exit_reason = KVM_EXIT_IO;
2464 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2465 vcpu->run->io.size = vcpu->arch.pio.size = size;
2466 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2467 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2468 vcpu->run->io.port = vcpu->arch.pio.port = port;
2469 vcpu->arch.pio.in = in;
2470 vcpu->arch.pio.string = 0;
2471 vcpu->arch.pio.down = 0;
2472 vcpu->arch.pio.guest_page_offset = 0;
2473 vcpu->arch.pio.rep = 0;
2475 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2476 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2479 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2482 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2483 memcpy(vcpu->arch.pio_data, &val, 4);
2485 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2487 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2493 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2495 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2496 int size, unsigned long count, int down,
2497 gva_t address, int rep, unsigned port)
2499 unsigned now, in_page;
2503 struct kvm_io_device *pio_dev;
2505 vcpu->run->exit_reason = KVM_EXIT_IO;
2506 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2507 vcpu->run->io.size = vcpu->arch.pio.size = size;
2508 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2509 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2510 vcpu->run->io.port = vcpu->arch.pio.port = port;
2511 vcpu->arch.pio.in = in;
2512 vcpu->arch.pio.string = 1;
2513 vcpu->arch.pio.down = down;
2514 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2515 vcpu->arch.pio.rep = rep;
2517 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2518 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2521 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2525 kvm_x86_ops->skip_emulated_instruction(vcpu);
2530 in_page = PAGE_SIZE - offset_in_page(address);
2532 in_page = offset_in_page(address) + size;
2533 now = min(count, (unsigned long)in_page / size);
2536 * String I/O straddles page boundary. Pin two guest pages
2537 * so that we satisfy atomicity constraints. Do just one
2538 * transaction to avoid complexity.
2545 * String I/O in reverse. Yuck. Kill the guest, fix later.
2547 pr_unimpl(vcpu, "guest string pio down\n");
2548 kvm_inject_gp(vcpu, 0);
2551 vcpu->run->io.count = now;
2552 vcpu->arch.pio.cur_count = now;
2554 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2555 kvm_x86_ops->skip_emulated_instruction(vcpu);
2557 for (i = 0; i < nr_pages; ++i) {
2558 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
2559 vcpu->arch.pio.guest_pages[i] = page;
2561 kvm_inject_gp(vcpu, 0);
2562 free_pio_guest_pages(vcpu);
2567 pio_dev = vcpu_find_pio_dev(vcpu, port,
2568 vcpu->arch.pio.cur_count,
2569 !vcpu->arch.pio.in);
2570 if (!vcpu->arch.pio.in) {
2571 /* string PIO write */
2572 ret = pio_copy_data(vcpu);
2573 if (ret >= 0 && pio_dev) {
2574 pio_string_write(pio_dev, vcpu);
2576 if (vcpu->arch.pio.count == 0)
2580 pr_unimpl(vcpu, "no string pio read support yet, "
2581 "port %x size %d count %ld\n",
2586 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2588 int kvm_arch_init(void *opaque)
2591 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2594 printk(KERN_ERR "kvm: already loaded the other module\n");
2599 if (!ops->cpu_has_kvm_support()) {
2600 printk(KERN_ERR "kvm: no hardware support\n");
2604 if (ops->disabled_by_bios()) {
2605 printk(KERN_ERR "kvm: disabled by bios\n");
2610 r = kvm_mmu_module_init();
2614 kvm_init_msr_list();
2617 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2618 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2619 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2620 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2627 void kvm_arch_exit(void)
2630 kvm_mmu_module_exit();
2633 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2635 ++vcpu->stat.halt_exits;
2636 KVMTRACE_0D(HLT, vcpu, handler);
2637 if (irqchip_in_kernel(vcpu->kvm)) {
2638 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2641 vcpu->run->exit_reason = KVM_EXIT_HLT;
2645 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2647 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2650 if (is_long_mode(vcpu))
2653 return a0 | ((gpa_t)a1 << 32);
2656 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2658 unsigned long nr, a0, a1, a2, a3, ret;
2661 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2662 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2663 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2664 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2665 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2667 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2669 if (!is_long_mode(vcpu)) {
2678 case KVM_HC_VAPIC_POLL_IRQ:
2682 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2688 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2689 ++vcpu->stat.hypercalls;
2692 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2694 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2696 char instruction[3];
2698 unsigned long rip = kvm_rip_read(vcpu);
2702 * Blow out the MMU to ensure that no other VCPU has an active mapping
2703 * to ensure that the updated hypercall appears atomically across all
2706 kvm_mmu_zap_all(vcpu->kvm);
2708 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2709 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2710 != X86EMUL_CONTINUE)
2716 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2718 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2721 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2723 struct descriptor_table dt = { limit, base };
2725 kvm_x86_ops->set_gdt(vcpu, &dt);
2728 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2730 struct descriptor_table dt = { limit, base };
2732 kvm_x86_ops->set_idt(vcpu, &dt);
2735 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2736 unsigned long *rflags)
2738 kvm_lmsw(vcpu, msw);
2739 *rflags = kvm_x86_ops->get_rflags(vcpu);
2742 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2744 unsigned long value;
2746 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2749 value = vcpu->arch.cr0;
2752 value = vcpu->arch.cr2;
2755 value = vcpu->arch.cr3;
2758 value = vcpu->arch.cr4;
2761 value = kvm_get_cr8(vcpu);
2764 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2767 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2768 (u32)((u64)value >> 32), handler);
2773 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2774 unsigned long *rflags)
2776 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2777 (u32)((u64)val >> 32), handler);
2781 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2782 *rflags = kvm_x86_ops->get_rflags(vcpu);
2785 vcpu->arch.cr2 = val;
2788 kvm_set_cr3(vcpu, val);
2791 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2794 kvm_set_cr8(vcpu, val & 0xfUL);
2797 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2801 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2803 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2804 int j, nent = vcpu->arch.cpuid_nent;
2806 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2807 /* when no next entry is found, the current entry[i] is reselected */
2808 for (j = i + 1; ; j = (j + 1) % nent) {
2809 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2810 if (ej->function == e->function) {
2811 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2815 return 0; /* silence gcc, even though control never reaches here */
2818 /* find an entry with matching function, matching index (if needed), and that
2819 * should be read next (if it's stateful) */
2820 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2821 u32 function, u32 index)
2823 if (e->function != function)
2825 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2827 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2828 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2833 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2836 u32 function, index;
2837 struct kvm_cpuid_entry2 *e, *best;
2839 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
2840 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
2841 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
2842 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
2843 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
2844 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
2846 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2847 e = &vcpu->arch.cpuid_entries[i];
2848 if (is_matching_cpuid_entry(e, function, index)) {
2849 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
2850 move_to_next_stateful_cpuid_entry(vcpu, i);
2855 * Both basic or both extended?
2857 if (((e->function ^ function) & 0x80000000) == 0)
2858 if (!best || e->function > best->function)
2862 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
2863 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
2864 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
2865 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
2867 kvm_x86_ops->skip_emulated_instruction(vcpu);
2868 KVMTRACE_5D(CPUID, vcpu, function,
2869 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
2870 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
2871 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
2872 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
2874 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
2877 * Check if userspace requested an interrupt window, and that the
2878 * interrupt window is open.
2880 * No need to exit to userspace if we already have an interrupt queued.
2882 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2883 struct kvm_run *kvm_run)
2885 return (!vcpu->arch.irq_summary &&
2886 kvm_run->request_interrupt_window &&
2887 vcpu->arch.interrupt_window_open &&
2888 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
2892 * Check if userspace requested a NMI window, and that the NMI window
2895 * No need to exit to userspace if we already have a NMI queued.
2897 static int dm_request_for_nmi_injection(struct kvm_vcpu *vcpu,
2898 struct kvm_run *kvm_run)
2900 return (!vcpu->arch.nmi_pending &&
2901 kvm_run->request_nmi_window &&
2902 vcpu->arch.nmi_window_open);
2905 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2906 struct kvm_run *kvm_run)
2908 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2909 kvm_run->cr8 = kvm_get_cr8(vcpu);
2910 kvm_run->apic_base = kvm_get_apic_base(vcpu);
2911 if (irqchip_in_kernel(vcpu->kvm)) {
2912 kvm_run->ready_for_interrupt_injection = 1;
2913 kvm_run->ready_for_nmi_injection = 1;
2915 kvm_run->ready_for_interrupt_injection =
2916 (vcpu->arch.interrupt_window_open &&
2917 vcpu->arch.irq_summary == 0);
2918 kvm_run->ready_for_nmi_injection =
2919 (vcpu->arch.nmi_window_open &&
2920 vcpu->arch.nmi_pending == 0);
2924 static void vapic_enter(struct kvm_vcpu *vcpu)
2926 struct kvm_lapic *apic = vcpu->arch.apic;
2929 if (!apic || !apic->vapic_addr)
2932 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2934 vcpu->arch.apic->vapic_page = page;
2937 static void vapic_exit(struct kvm_vcpu *vcpu)
2939 struct kvm_lapic *apic = vcpu->arch.apic;
2941 if (!apic || !apic->vapic_addr)
2944 down_read(&vcpu->kvm->slots_lock);
2945 kvm_release_page_dirty(apic->vapic_page);
2946 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2947 up_read(&vcpu->kvm->slots_lock);
2950 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2955 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
2956 kvm_mmu_unload(vcpu);
2958 r = kvm_mmu_reload(vcpu);
2962 if (vcpu->requests) {
2963 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2964 __kvm_migrate_timers(vcpu);
2965 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
2966 kvm_mmu_sync_roots(vcpu);
2967 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2968 kvm_x86_ops->tlb_flush(vcpu);
2969 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
2971 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
2975 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
2976 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
2982 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
2983 kvm_inject_pending_timer_irqs(vcpu);
2987 kvm_x86_ops->prepare_guest_switch(vcpu);
2988 kvm_load_guest_fpu(vcpu);
2990 local_irq_disable();
2992 if (vcpu->requests || need_resched() || signal_pending(current)) {
2999 if (vcpu->guest_debug.enabled)
3000 kvm_x86_ops->guest_debug_pre(vcpu);
3002 vcpu->guest_mode = 1;
3004 * Make sure that guest_mode assignment won't happen after
3005 * testing the pending IRQ vector bitmap.
3009 if (vcpu->arch.exception.pending)
3010 __queue_exception(vcpu);
3011 else if (irqchip_in_kernel(vcpu->kvm))
3012 kvm_x86_ops->inject_pending_irq(vcpu);
3014 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3016 kvm_lapic_sync_to_vapic(vcpu);
3018 up_read(&vcpu->kvm->slots_lock);
3023 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3024 kvm_x86_ops->run(vcpu, kvm_run);
3026 vcpu->guest_mode = 0;
3032 * We must have an instruction between local_irq_enable() and
3033 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3034 * the interrupt shadow. The stat.exits increment will do nicely.
3035 * But we need to prevent reordering, hence this barrier():
3043 down_read(&vcpu->kvm->slots_lock);
3046 * Profile KVM exit RIPs:
3048 if (unlikely(prof_on == KVM_PROFILING)) {
3049 unsigned long rip = kvm_rip_read(vcpu);
3050 profile_hit(KVM_PROFILING, (void *)rip);
3053 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3054 vcpu->arch.exception.pending = false;
3056 kvm_lapic_sync_from_vapic(vcpu);
3058 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3063 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3067 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3068 pr_debug("vcpu %d received sipi with vector # %x\n",
3069 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3070 kvm_lapic_reset(vcpu);
3071 r = kvm_arch_vcpu_reset(vcpu);
3074 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3077 down_read(&vcpu->kvm->slots_lock);
3082 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3083 r = vcpu_enter_guest(vcpu, kvm_run);
3085 up_read(&vcpu->kvm->slots_lock);
3086 kvm_vcpu_block(vcpu);
3087 down_read(&vcpu->kvm->slots_lock);
3088 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3089 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
3090 vcpu->arch.mp_state =
3091 KVM_MP_STATE_RUNNABLE;
3092 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
3097 if (dm_request_for_nmi_injection(vcpu, kvm_run)) {
3099 kvm_run->exit_reason = KVM_EXIT_NMI;
3100 ++vcpu->stat.request_nmi_exits;
3102 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3104 kvm_run->exit_reason = KVM_EXIT_INTR;
3105 ++vcpu->stat.request_irq_exits;
3107 if (signal_pending(current)) {
3109 kvm_run->exit_reason = KVM_EXIT_INTR;
3110 ++vcpu->stat.signal_exits;
3112 if (need_resched()) {
3113 up_read(&vcpu->kvm->slots_lock);
3115 down_read(&vcpu->kvm->slots_lock);
3120 up_read(&vcpu->kvm->slots_lock);
3121 post_kvm_run_save(vcpu, kvm_run);
3128 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3135 if (vcpu->sigset_active)
3136 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3138 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3139 kvm_vcpu_block(vcpu);
3140 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3145 /* re-sync apic's tpr */
3146 if (!irqchip_in_kernel(vcpu->kvm))
3147 kvm_set_cr8(vcpu, kvm_run->cr8);
3149 if (vcpu->arch.pio.cur_count) {
3150 r = complete_pio(vcpu);
3154 #if CONFIG_HAS_IOMEM
3155 if (vcpu->mmio_needed) {
3156 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3157 vcpu->mmio_read_completed = 1;
3158 vcpu->mmio_needed = 0;
3160 down_read(&vcpu->kvm->slots_lock);
3161 r = emulate_instruction(vcpu, kvm_run,
3162 vcpu->arch.mmio_fault_cr2, 0,
3163 EMULTYPE_NO_DECODE);
3164 up_read(&vcpu->kvm->slots_lock);
3165 if (r == EMULATE_DO_MMIO) {
3167 * Read-modify-write. Back to userspace.
3174 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3175 kvm_register_write(vcpu, VCPU_REGS_RAX,
3176 kvm_run->hypercall.ret);
3178 r = __vcpu_run(vcpu, kvm_run);
3181 if (vcpu->sigset_active)
3182 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3188 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3192 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3193 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3194 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3195 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3196 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3197 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3198 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3199 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3200 #ifdef CONFIG_X86_64
3201 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3202 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3203 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3204 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3205 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3206 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3207 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3208 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3211 regs->rip = kvm_rip_read(vcpu);
3212 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3215 * Don't leak debug flags in case they were set for guest debugging
3217 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
3218 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3225 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3229 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3230 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3231 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3232 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3233 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3234 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3235 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3236 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3237 #ifdef CONFIG_X86_64
3238 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3239 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3240 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3241 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3242 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3243 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3244 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3245 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3249 kvm_rip_write(vcpu, regs->rip);
3250 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3253 vcpu->arch.exception.pending = false;
3260 void kvm_get_segment(struct kvm_vcpu *vcpu,
3261 struct kvm_segment *var, int seg)
3263 kvm_x86_ops->get_segment(vcpu, var, seg);
3266 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3268 struct kvm_segment cs;
3270 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3274 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3276 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3277 struct kvm_sregs *sregs)
3279 struct descriptor_table dt;
3284 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3285 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3286 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3287 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3288 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3289 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3291 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3292 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3294 kvm_x86_ops->get_idt(vcpu, &dt);
3295 sregs->idt.limit = dt.limit;
3296 sregs->idt.base = dt.base;
3297 kvm_x86_ops->get_gdt(vcpu, &dt);
3298 sregs->gdt.limit = dt.limit;
3299 sregs->gdt.base = dt.base;
3301 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3302 sregs->cr0 = vcpu->arch.cr0;
3303 sregs->cr2 = vcpu->arch.cr2;
3304 sregs->cr3 = vcpu->arch.cr3;
3305 sregs->cr4 = vcpu->arch.cr4;
3306 sregs->cr8 = kvm_get_cr8(vcpu);
3307 sregs->efer = vcpu->arch.shadow_efer;
3308 sregs->apic_base = kvm_get_apic_base(vcpu);
3310 if (irqchip_in_kernel(vcpu->kvm)) {
3311 memset(sregs->interrupt_bitmap, 0,
3312 sizeof sregs->interrupt_bitmap);
3313 pending_vec = kvm_x86_ops->get_irq(vcpu);
3314 if (pending_vec >= 0)
3315 set_bit(pending_vec,
3316 (unsigned long *)sregs->interrupt_bitmap);
3318 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3319 sizeof sregs->interrupt_bitmap);
3326 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3327 struct kvm_mp_state *mp_state)
3330 mp_state->mp_state = vcpu->arch.mp_state;
3335 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3336 struct kvm_mp_state *mp_state)
3339 vcpu->arch.mp_state = mp_state->mp_state;
3344 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3345 struct kvm_segment *var, int seg)
3347 kvm_x86_ops->set_segment(vcpu, var, seg);
3350 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3351 struct kvm_segment *kvm_desct)
3353 kvm_desct->base = seg_desc->base0;
3354 kvm_desct->base |= seg_desc->base1 << 16;
3355 kvm_desct->base |= seg_desc->base2 << 24;
3356 kvm_desct->limit = seg_desc->limit0;
3357 kvm_desct->limit |= seg_desc->limit << 16;
3359 kvm_desct->limit <<= 12;
3360 kvm_desct->limit |= 0xfff;
3362 kvm_desct->selector = selector;
3363 kvm_desct->type = seg_desc->type;
3364 kvm_desct->present = seg_desc->p;
3365 kvm_desct->dpl = seg_desc->dpl;
3366 kvm_desct->db = seg_desc->d;
3367 kvm_desct->s = seg_desc->s;
3368 kvm_desct->l = seg_desc->l;
3369 kvm_desct->g = seg_desc->g;
3370 kvm_desct->avl = seg_desc->avl;
3372 kvm_desct->unusable = 1;
3374 kvm_desct->unusable = 0;
3375 kvm_desct->padding = 0;
3378 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3380 struct descriptor_table *dtable)
3382 if (selector & 1 << 2) {
3383 struct kvm_segment kvm_seg;
3385 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3387 if (kvm_seg.unusable)
3390 dtable->limit = kvm_seg.limit;
3391 dtable->base = kvm_seg.base;
3394 kvm_x86_ops->get_gdt(vcpu, dtable);
3397 /* allowed just for 8 bytes segments */
3398 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3399 struct desc_struct *seg_desc)
3402 struct descriptor_table dtable;
3403 u16 index = selector >> 3;
3405 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3407 if (dtable.limit < index * 8 + 7) {
3408 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3411 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3413 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3416 /* allowed just for 8 bytes segments */
3417 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3418 struct desc_struct *seg_desc)
3421 struct descriptor_table dtable;
3422 u16 index = selector >> 3;
3424 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3426 if (dtable.limit < index * 8 + 7)
3428 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3430 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3433 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3434 struct desc_struct *seg_desc)
3438 base_addr = seg_desc->base0;
3439 base_addr |= (seg_desc->base1 << 16);
3440 base_addr |= (seg_desc->base2 << 24);
3442 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3445 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3447 struct kvm_segment kvm_seg;
3449 kvm_get_segment(vcpu, &kvm_seg, seg);
3450 return kvm_seg.selector;
3453 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3455 struct kvm_segment *kvm_seg)
3457 struct desc_struct seg_desc;
3459 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3461 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3465 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3467 struct kvm_segment segvar = {
3468 .base = selector << 4,
3470 .selector = selector,
3481 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3485 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3486 int type_bits, int seg)
3488 struct kvm_segment kvm_seg;
3490 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3491 return kvm_load_realmode_segment(vcpu, selector, seg);
3492 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3494 kvm_seg.type |= type_bits;
3496 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3497 seg != VCPU_SREG_LDTR)
3499 kvm_seg.unusable = 1;
3501 kvm_set_segment(vcpu, &kvm_seg, seg);
3505 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3506 struct tss_segment_32 *tss)
3508 tss->cr3 = vcpu->arch.cr3;
3509 tss->eip = kvm_rip_read(vcpu);
3510 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3511 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3512 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3513 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3514 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3515 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3516 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3517 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3518 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3519 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3520 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3521 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3522 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3523 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3524 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3525 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3526 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3529 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3530 struct tss_segment_32 *tss)
3532 kvm_set_cr3(vcpu, tss->cr3);
3534 kvm_rip_write(vcpu, tss->eip);
3535 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3537 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3538 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3539 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3540 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3541 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3542 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3543 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3544 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3546 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3549 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3552 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3555 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3558 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3561 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3564 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3569 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3570 struct tss_segment_16 *tss)
3572 tss->ip = kvm_rip_read(vcpu);
3573 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3574 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3575 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3576 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3577 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3578 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3579 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3580 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3581 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3583 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3584 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3585 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3586 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3587 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3588 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3591 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3592 struct tss_segment_16 *tss)
3594 kvm_rip_write(vcpu, tss->ip);
3595 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3596 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3597 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3598 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3599 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3600 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3601 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3602 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3603 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3605 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3608 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3611 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3614 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3617 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3622 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3624 struct desc_struct *nseg_desc)
3626 struct tss_segment_16 tss_segment_16;
3629 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3630 sizeof tss_segment_16))
3633 save_state_to_tss16(vcpu, &tss_segment_16);
3635 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3636 sizeof tss_segment_16))
3639 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3640 &tss_segment_16, sizeof tss_segment_16))
3643 if (load_state_from_tss16(vcpu, &tss_segment_16))
3651 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3653 struct desc_struct *nseg_desc)
3655 struct tss_segment_32 tss_segment_32;
3658 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3659 sizeof tss_segment_32))
3662 save_state_to_tss32(vcpu, &tss_segment_32);
3664 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3665 sizeof tss_segment_32))
3668 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3669 &tss_segment_32, sizeof tss_segment_32))
3672 if (load_state_from_tss32(vcpu, &tss_segment_32))
3680 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3682 struct kvm_segment tr_seg;
3683 struct desc_struct cseg_desc;
3684 struct desc_struct nseg_desc;
3686 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3687 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3689 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3691 /* FIXME: Handle errors. Failure to read either TSS or their
3692 * descriptors should generate a pagefault.
3694 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3697 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3700 if (reason != TASK_SWITCH_IRET) {
3703 cpl = kvm_x86_ops->get_cpl(vcpu);
3704 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3705 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3710 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3711 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3715 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3716 cseg_desc.type &= ~(1 << 1); //clear the B flag
3717 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3720 if (reason == TASK_SWITCH_IRET) {
3721 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3722 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3725 kvm_x86_ops->skip_emulated_instruction(vcpu);
3727 if (nseg_desc.type & 8)
3728 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3731 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3734 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3735 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3736 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3739 if (reason != TASK_SWITCH_IRET) {
3740 nseg_desc.type |= (1 << 1);
3741 save_guest_segment_descriptor(vcpu, tss_selector,
3745 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3746 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3748 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3752 EXPORT_SYMBOL_GPL(kvm_task_switch);
3754 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3755 struct kvm_sregs *sregs)
3757 int mmu_reset_needed = 0;
3758 int i, pending_vec, max_bits;
3759 struct descriptor_table dt;
3763 dt.limit = sregs->idt.limit;
3764 dt.base = sregs->idt.base;
3765 kvm_x86_ops->set_idt(vcpu, &dt);
3766 dt.limit = sregs->gdt.limit;
3767 dt.base = sregs->gdt.base;
3768 kvm_x86_ops->set_gdt(vcpu, &dt);
3770 vcpu->arch.cr2 = sregs->cr2;
3771 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3772 vcpu->arch.cr3 = sregs->cr3;
3774 kvm_set_cr8(vcpu, sregs->cr8);
3776 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3777 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3778 kvm_set_apic_base(vcpu, sregs->apic_base);
3780 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3782 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3783 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3784 vcpu->arch.cr0 = sregs->cr0;
3786 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3787 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3788 if (!is_long_mode(vcpu) && is_pae(vcpu))
3789 load_pdptrs(vcpu, vcpu->arch.cr3);
3791 if (mmu_reset_needed)
3792 kvm_mmu_reset_context(vcpu);
3794 if (!irqchip_in_kernel(vcpu->kvm)) {
3795 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3796 sizeof vcpu->arch.irq_pending);
3797 vcpu->arch.irq_summary = 0;
3798 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3799 if (vcpu->arch.irq_pending[i])
3800 __set_bit(i, &vcpu->arch.irq_summary);
3802 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3803 pending_vec = find_first_bit(
3804 (const unsigned long *)sregs->interrupt_bitmap,
3806 /* Only pending external irq is handled here */
3807 if (pending_vec < max_bits) {
3808 kvm_x86_ops->set_irq(vcpu, pending_vec);
3809 pr_debug("Set back pending irq %d\n",
3812 kvm_pic_clear_isr_ack(vcpu->kvm);
3815 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3816 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3817 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3818 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3819 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3820 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3822 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3823 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3825 /* Older userspace won't unhalt the vcpu on reset. */
3826 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
3827 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
3828 !(vcpu->arch.cr0 & X86_CR0_PE))
3829 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3836 int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
3837 struct kvm_debug_guest *dbg)
3843 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3851 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
3852 * we have asm/x86/processor.h
3863 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
3864 #ifdef CONFIG_X86_64
3865 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
3867 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
3872 * Translate a guest virtual address to a guest physical address.
3874 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
3875 struct kvm_translation *tr)
3877 unsigned long vaddr = tr->linear_address;
3881 down_read(&vcpu->kvm->slots_lock);
3882 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
3883 up_read(&vcpu->kvm->slots_lock);
3884 tr->physical_address = gpa;
3885 tr->valid = gpa != UNMAPPED_GVA;
3893 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3895 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3899 memcpy(fpu->fpr, fxsave->st_space, 128);
3900 fpu->fcw = fxsave->cwd;
3901 fpu->fsw = fxsave->swd;
3902 fpu->ftwx = fxsave->twd;
3903 fpu->last_opcode = fxsave->fop;
3904 fpu->last_ip = fxsave->rip;
3905 fpu->last_dp = fxsave->rdp;
3906 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
3913 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3915 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3919 memcpy(fxsave->st_space, fpu->fpr, 128);
3920 fxsave->cwd = fpu->fcw;
3921 fxsave->swd = fpu->fsw;
3922 fxsave->twd = fpu->ftwx;
3923 fxsave->fop = fpu->last_opcode;
3924 fxsave->rip = fpu->last_ip;
3925 fxsave->rdp = fpu->last_dp;
3926 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
3933 void fx_init(struct kvm_vcpu *vcpu)
3935 unsigned after_mxcsr_mask;
3938 * Touch the fpu the first time in non atomic context as if
3939 * this is the first fpu instruction the exception handler
3940 * will fire before the instruction returns and it'll have to
3941 * allocate ram with GFP_KERNEL.
3944 kvm_fx_save(&vcpu->arch.host_fx_image);
3946 /* Initialize guest FPU by resetting ours and saving into guest's */
3948 kvm_fx_save(&vcpu->arch.host_fx_image);
3950 kvm_fx_save(&vcpu->arch.guest_fx_image);
3951 kvm_fx_restore(&vcpu->arch.host_fx_image);
3954 vcpu->arch.cr0 |= X86_CR0_ET;
3955 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
3956 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
3957 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
3958 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
3960 EXPORT_SYMBOL_GPL(fx_init);
3962 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
3964 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
3967 vcpu->guest_fpu_loaded = 1;
3968 kvm_fx_save(&vcpu->arch.host_fx_image);
3969 kvm_fx_restore(&vcpu->arch.guest_fx_image);
3971 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
3973 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
3975 if (!vcpu->guest_fpu_loaded)
3978 vcpu->guest_fpu_loaded = 0;
3979 kvm_fx_save(&vcpu->arch.guest_fx_image);
3980 kvm_fx_restore(&vcpu->arch.host_fx_image);
3981 ++vcpu->stat.fpu_reload;
3983 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
3985 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
3987 kvm_x86_ops->vcpu_free(vcpu);
3990 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
3993 return kvm_x86_ops->vcpu_create(kvm, id);
3996 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4000 /* We do fxsave: this must be aligned. */
4001 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4003 vcpu->arch.mtrr_state.have_fixed = 1;
4005 r = kvm_arch_vcpu_reset(vcpu);
4007 r = kvm_mmu_setup(vcpu);
4014 kvm_x86_ops->vcpu_free(vcpu);
4018 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4021 kvm_mmu_unload(vcpu);
4024 kvm_x86_ops->vcpu_free(vcpu);
4027 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4029 vcpu->arch.nmi_pending = false;
4030 vcpu->arch.nmi_injected = false;
4032 return kvm_x86_ops->vcpu_reset(vcpu);
4035 void kvm_arch_hardware_enable(void *garbage)
4037 kvm_x86_ops->hardware_enable(garbage);
4040 void kvm_arch_hardware_disable(void *garbage)
4042 kvm_x86_ops->hardware_disable(garbage);
4045 int kvm_arch_hardware_setup(void)
4047 return kvm_x86_ops->hardware_setup();
4050 void kvm_arch_hardware_unsetup(void)
4052 kvm_x86_ops->hardware_unsetup();
4055 void kvm_arch_check_processor_compat(void *rtn)
4057 kvm_x86_ops->check_processor_compatibility(rtn);
4060 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4066 BUG_ON(vcpu->kvm == NULL);
4069 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4070 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4071 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4073 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4075 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4080 vcpu->arch.pio_data = page_address(page);
4082 r = kvm_mmu_create(vcpu);
4084 goto fail_free_pio_data;
4086 if (irqchip_in_kernel(kvm)) {
4087 r = kvm_create_lapic(vcpu);
4089 goto fail_mmu_destroy;
4095 kvm_mmu_destroy(vcpu);
4097 free_page((unsigned long)vcpu->arch.pio_data);
4102 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4104 kvm_free_lapic(vcpu);
4105 down_read(&vcpu->kvm->slots_lock);
4106 kvm_mmu_destroy(vcpu);
4107 up_read(&vcpu->kvm->slots_lock);
4108 free_page((unsigned long)vcpu->arch.pio_data);
4111 struct kvm *kvm_arch_create_vm(void)
4113 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4116 return ERR_PTR(-ENOMEM);
4118 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4119 INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
4120 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4122 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4123 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4128 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4131 kvm_mmu_unload(vcpu);
4135 static void kvm_free_vcpus(struct kvm *kvm)
4140 * Unpin any mmu pages first.
4142 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4144 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4145 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4146 if (kvm->vcpus[i]) {
4147 kvm_arch_vcpu_free(kvm->vcpus[i]);
4148 kvm->vcpus[i] = NULL;
4154 void kvm_arch_destroy_vm(struct kvm *kvm)
4156 kvm_free_all_assigned_devices(kvm);
4157 kvm_iommu_unmap_guest(kvm);
4159 kfree(kvm->arch.vpic);
4160 kfree(kvm->arch.vioapic);
4161 kvm_free_vcpus(kvm);
4162 kvm_free_physmem(kvm);
4163 if (kvm->arch.apic_access_page)
4164 put_page(kvm->arch.apic_access_page);
4165 if (kvm->arch.ept_identity_pagetable)
4166 put_page(kvm->arch.ept_identity_pagetable);
4170 int kvm_arch_set_memory_region(struct kvm *kvm,
4171 struct kvm_userspace_memory_region *mem,
4172 struct kvm_memory_slot old,
4175 int npages = mem->memory_size >> PAGE_SHIFT;
4176 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4178 /*To keep backward compatibility with older userspace,
4179 *x86 needs to hanlde !user_alloc case.
4182 if (npages && !old.rmap) {
4183 unsigned long userspace_addr;
4185 down_write(¤t->mm->mmap_sem);
4186 userspace_addr = do_mmap(NULL, 0,
4188 PROT_READ | PROT_WRITE,
4189 MAP_PRIVATE | MAP_ANONYMOUS,
4191 up_write(¤t->mm->mmap_sem);
4193 if (IS_ERR((void *)userspace_addr))
4194 return PTR_ERR((void *)userspace_addr);
4196 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4197 spin_lock(&kvm->mmu_lock);
4198 memslot->userspace_addr = userspace_addr;
4199 spin_unlock(&kvm->mmu_lock);
4201 if (!old.user_alloc && old.rmap) {
4204 down_write(¤t->mm->mmap_sem);
4205 ret = do_munmap(current->mm, old.userspace_addr,
4206 old.npages * PAGE_SIZE);
4207 up_write(¤t->mm->mmap_sem);
4210 "kvm_vm_ioctl_set_memory_region: "
4211 "failed to munmap memory\n");
4216 if (!kvm->arch.n_requested_mmu_pages) {
4217 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4218 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4221 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4222 kvm_flush_remote_tlbs(kvm);
4227 void kvm_arch_flush_shadow(struct kvm *kvm)
4229 kvm_mmu_zap_all(kvm);
4232 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4234 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4235 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4236 || vcpu->arch.nmi_pending;
4239 static void vcpu_kick_intr(void *info)
4242 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4243 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4247 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4249 int ipi_pcpu = vcpu->cpu;
4250 int cpu = get_cpu();
4252 if (waitqueue_active(&vcpu->wq)) {
4253 wake_up_interruptible(&vcpu->wq);
4254 ++vcpu->stat.halt_wakeup;
4257 * We may be called synchronously with irqs disabled in guest mode,
4258 * So need not to call smp_call_function_single() in that case.
4260 if (vcpu->guest_mode && vcpu->cpu != cpu)
4261 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);