arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57
  58 #include <trace/events/kvm.h>
  59
  60 #include <asm/debugreg.h>
  61 #include <asm/msr.h>
  62 #include <asm/desc.h>
  63 #include <asm/mce.h>
  64 #include <linux/kernel_stat.h>
  65 #include <asm/fpu/internal.h> /* Ugh! */
  66 #include <asm/pvclock.h>
  67 #include <asm/div64.h>
  68 #include <asm/irq_remapping.h>
  69
  70 #define CREATE_TRACE_POINTS
  71 #include "trace.h"
  72
  73 #define MAX_IO_MSRS 256
  74 #define KVM_MAX_MCE_BANKS 32
  75 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  77
  78 #define emul_to_vcpu(ctxt) \
  79         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  80
  81 /* EFER defaults:
  82  * - enable syscall per default because its emulated by KVM
  83  * - enable LME and LMA per default on 64 bit KVM
  84  */
  85 #ifdef CONFIG_X86_64
  86 static
  87 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  88 #else
  89 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  90 #endif
  91
  92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  94
  95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  96                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
  97
  98 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  99 static void process_nmi(struct kvm_vcpu *vcpu);
 100 static void enter_smm(struct kvm_vcpu *vcpu);
 101 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 102
 103 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 104 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 105
 106 static bool __read_mostly ignore_msrs = 0;
 107 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 108
 109 unsigned int min_timer_period_us = 500;
 110 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 111
 112 static bool __read_mostly kvmclock_periodic_sync = true;
 113 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 114
 115 bool __read_mostly kvm_has_tsc_control;
 116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 117 u32  __read_mostly kvm_max_guest_tsc_khz;
 118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 119 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 121 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 123 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 125
 126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 127 static u32 __read_mostly tsc_tolerance_ppm = 250;
 128 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 129
 130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 131 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 132 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 133
 134 static bool __read_mostly vector_hashing = true;
 135 module_param(vector_hashing, bool, S_IRUGO);
 136
 137 #define KVM_NR_SHARED_MSRS 16
 138
 139 struct kvm_shared_msrs_global {
 140         int nr;
 141         u32 msrs[KVM_NR_SHARED_MSRS];
 142 };
 143
 144 struct kvm_shared_msrs {
 145         struct user_return_notifier urn;
 146         bool registered;
 147         struct kvm_shared_msr_values {
 148                 u64 host;
 149                 u64 curr;
 150         } values[KVM_NR_SHARED_MSRS];
 151 };
 152
 153 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 154 static struct kvm_shared_msrs __percpu *shared_msrs;
 155
 156 struct kvm_stats_debugfs_item debugfs_entries[] = {
 157         { "pf_fixed", VCPU_STAT(pf_fixed) },
 158         { "pf_guest", VCPU_STAT(pf_guest) },
 159         { "tlb_flush", VCPU_STAT(tlb_flush) },
 160         { "invlpg", VCPU_STAT(invlpg) },
 161         { "exits", VCPU_STAT(exits) },
 162         { "io_exits", VCPU_STAT(io_exits) },
 163         { "mmio_exits", VCPU_STAT(mmio_exits) },
 164         { "signal_exits", VCPU_STAT(signal_exits) },
 165         { "irq_window", VCPU_STAT(irq_window_exits) },
 166         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 167         { "halt_exits", VCPU_STAT(halt_exits) },
 168         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 169         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 170         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 171         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 172         { "hypercalls", VCPU_STAT(hypercalls) },
 173         { "request_irq", VCPU_STAT(request_irq_exits) },
 174         { "irq_exits", VCPU_STAT(irq_exits) },
 175         { "host_state_reload", VCPU_STAT(host_state_reload) },
 176         { "efer_reload", VCPU_STAT(efer_reload) },
 177         { "fpu_reload", VCPU_STAT(fpu_reload) },
 178         { "insn_emulation", VCPU_STAT(insn_emulation) },
 179         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 180         { "irq_injections", VCPU_STAT(irq_injections) },
 181         { "nmi_injections", VCPU_STAT(nmi_injections) },
 182         { "req_event", VCPU_STAT(req_event) },
 183         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 184         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 185         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 186         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 187         { "mmu_flooded", VM_STAT(mmu_flooded) },
 188         { "mmu_recycled", VM_STAT(mmu_recycled) },
 189         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 190         { "mmu_unsync", VM_STAT(mmu_unsync) },
 191         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 192         { "largepages", VM_STAT(lpages) },
 193         { "max_mmu_page_hash_collisions",
 194                 VM_STAT(max_mmu_page_hash_collisions) },
 195         { NULL }
 196 };
 197
 198 u64 __read_mostly host_xcr0;
 199
 200 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 201
 202 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 203 {
 204         int i;
 205         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 206                 vcpu->arch.apf.gfns[i] = ~0;
 207 }
 208
 209 static void kvm_on_user_return(struct user_return_notifier *urn)
 210 {
 211         unsigned slot;
 212         struct kvm_shared_msrs *locals
 213                 = container_of(urn, struct kvm_shared_msrs, urn);
 214         struct kvm_shared_msr_values *values;
 215         unsigned long flags;
 216
 217         /*
 218          * Disabling irqs at this point since the following code could be
 219          * interrupted and executed through kvm_arch_hardware_disable()
 220          */
 221         local_irq_save(flags);
 222         if (locals->registered) {
 223                 locals->registered = false;
 224                 user_return_notifier_unregister(urn);
 225         }
 226         local_irq_restore(flags);
 227         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 228                 values = &locals->values[slot];
 229                 if (values->host != values->curr) {
 230                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 231                         values->curr = values->host;
 232                 }
 233         }
 234 }
 235
 236 static void shared_msr_update(unsigned slot, u32 msr)
 237 {
 238         u64 value;
 239         unsigned int cpu = smp_processor_id();
 240         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 241
 242         /* only read, and nobody should modify it at this time,
 243          * so don't need lock */
 244         if (slot >= shared_msrs_global.nr) {
 245                 printk(KERN_ERR "kvm: invalid MSR slot!");
 246                 return;
 247         }
 248         rdmsrl_safe(msr, &value);
 249         smsr->values[slot].host = value;
 250         smsr->values[slot].curr = value;
 251 }
 252
 253 void kvm_define_shared_msr(unsigned slot, u32 msr)
 254 {
 255         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 256         shared_msrs_global.msrs[slot] = msr;
 257         if (slot >= shared_msrs_global.nr)
 258                 shared_msrs_global.nr = slot + 1;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 261
 262 static void kvm_shared_msr_cpu_online(void)
 263 {
 264         unsigned i;
 265
 266         for (i = 0; i < shared_msrs_global.nr; ++i)
 267                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 268 }
 269
 270 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 271 {
 272         unsigned int cpu = smp_processor_id();
 273         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 274         int err;
 275
 276         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 277                 return 0;
 278         smsr->values[slot].curr = value;
 279         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 280         if (err)
 281                 return 1;
 282
 283         if (!smsr->registered) {
 284                 smsr->urn.on_user_return = kvm_on_user_return;
 285                 user_return_notifier_register(&smsr->urn);
 286                 smsr->registered = true;
 287         }
 288         return 0;
 289 }
 290 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 291
 292 static void drop_user_return_notifiers(void)
 293 {
 294         unsigned int cpu = smp_processor_id();
 295         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 296
 297         if (smsr->registered)
 298                 kvm_on_user_return(&smsr->urn);
 299 }
 300
 301 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 302 {
 303         return vcpu->arch.apic_base;
 304 }
 305 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 306
 307 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 308 {
 309         u64 old_state = vcpu->arch.apic_base &
 310                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 311         u64 new_state = msr_info->data &
 312                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 313         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 314                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 315
 316         if (!msr_info->host_initiated &&
 317             ((msr_info->data & reserved_bits) != 0 ||
 318              new_state == X2APIC_ENABLE ||
 319              (new_state == MSR_IA32_APICBASE_ENABLE &&
 320               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 321              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 322               old_state == 0)))
 323                 return 1;
 324
 325         kvm_lapic_set_base(vcpu, msr_info->data);
 326         return 0;
 327 }
 328 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 329
 330 asmlinkage __visible void kvm_spurious_fault(void)
 331 {
 332         /* Fault while not rebooting.  We want the trace. */
 333         BUG();
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 336
 337 #define EXCPT_BENIGN            0
 338 #define EXCPT_CONTRIBUTORY      1
 339 #define EXCPT_PF                2
 340
 341 static int exception_class(int vector)
 342 {
 343         switch (vector) {
 344         case PF_VECTOR:
 345                 return EXCPT_PF;
 346         case DE_VECTOR:
 347         case TS_VECTOR:
 348         case NP_VECTOR:
 349         case SS_VECTOR:
 350         case GP_VECTOR:
 351                 return EXCPT_CONTRIBUTORY;
 352         default:
 353                 break;
 354         }
 355         return EXCPT_BENIGN;
 356 }
 357
 358 #define EXCPT_FAULT             0
 359 #define EXCPT_TRAP              1
 360 #define EXCPT_ABORT             2
 361 #define EXCPT_INTERRUPT         3
 362
 363 static int exception_type(int vector)
 364 {
 365         unsigned int mask;
 366
 367         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 368                 return EXCPT_INTERRUPT;
 369
 370         mask = 1 << vector;
 371
 372         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 373         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 374                 return EXCPT_TRAP;
 375
 376         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 377                 return EXCPT_ABORT;
 378
 379         /* Reserved exceptions will result in fault */
 380         return EXCPT_FAULT;
 381 }
 382
 383 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 384                 unsigned nr, bool has_error, u32 error_code,
 385                 bool reinject)
 386 {
 387         u32 prev_nr;
 388         int class1, class2;
 389
 390         kvm_make_request(KVM_REQ_EVENT, vcpu);
 391
 392         if (!vcpu->arch.exception.pending) {
 393         queue:
 394                 if (has_error && !is_protmode(vcpu))
 395                         has_error = false;
 396                 vcpu->arch.exception.pending = true;
 397                 vcpu->arch.exception.has_error_code = has_error;
 398                 vcpu->arch.exception.nr = nr;
 399                 vcpu->arch.exception.error_code = error_code;
 400                 vcpu->arch.exception.reinject = reinject;
 401                 return;
 402         }
 403
 404         /* to check exception */
 405         prev_nr = vcpu->arch.exception.nr;
 406         if (prev_nr == DF_VECTOR) {
 407                 /* triple fault -> shutdown */
 408                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 409                 return;
 410         }
 411         class1 = exception_class(prev_nr);
 412         class2 = exception_class(nr);
 413         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 414                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 415                 /* generate double fault per SDM Table 5-5 */
 416                 vcpu->arch.exception.pending = true;
 417                 vcpu->arch.exception.has_error_code = true;
 418                 vcpu->arch.exception.nr = DF_VECTOR;
 419                 vcpu->arch.exception.error_code = 0;
 420         } else
 421                 /* replace previous exception with a new one in a hope
 422                    that instruction re-execution will regenerate lost
 423                    exception */
 424                 goto queue;
 425 }
 426
 427 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 428 {
 429         kvm_multiple_exception(vcpu, nr, false, 0, false);
 430 }
 431 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 432
 433 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 434 {
 435         kvm_multiple_exception(vcpu, nr, false, 0, true);
 436 }
 437 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 438
 439 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 440 {
 441         if (err)
 442                 kvm_inject_gp(vcpu, 0);
 443         else
 444                 return kvm_skip_emulated_instruction(vcpu);
 445
 446         return 1;
 447 }
 448 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 449
 450 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 451 {
 452         ++vcpu->stat.pf_guest;
 453         vcpu->arch.exception.nested_apf =
 454                 is_guest_mode(vcpu) && fault->async_page_fault;
 455         if (vcpu->arch.exception.nested_apf)
 456                 vcpu->arch.apf.nested_apf_token = fault->address;
 457         else
 458                 vcpu->arch.cr2 = fault->address;
 459         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 460 }
 461 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 462
 463 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 464 {
 465         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 466                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 467         else
 468                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 469
 470         return fault->nested_page_fault;
 471 }
 472
 473 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 474 {
 475         atomic_inc(&vcpu->arch.nmi_queued);
 476         kvm_make_request(KVM_REQ_NMI, vcpu);
 477 }
 478 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 479
 480 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 481 {
 482         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 483 }
 484 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 485
 486 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 487 {
 488         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 489 }
 490 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 491
 492 /*
 493  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 494  * a #GP and return false.
 495  */
 496 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 497 {
 498         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 499                 return true;
 500         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 501         return false;
 502 }
 503 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 504
 505 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 506 {
 507         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 508                 return true;
 509
 510         kvm_queue_exception(vcpu, UD_VECTOR);
 511         return false;
 512 }
 513 EXPORT_SYMBOL_GPL(kvm_require_dr);
 514
 515 /*
 516  * This function will be used to read from the physical memory of the currently
 517  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 518  * can read from guest physical or from the guest's guest physical memory.
 519  */
 520 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 521                             gfn_t ngfn, void *data, int offset, int len,
 522                             u32 access)
 523 {
 524         struct x86_exception exception;
 525         gfn_t real_gfn;
 526         gpa_t ngpa;
 527
 528         ngpa     = gfn_to_gpa(ngfn);
 529         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 530         if (real_gfn == UNMAPPED_GVA)
 531                 return -EFAULT;
 532
 533         real_gfn = gpa_to_gfn(real_gfn);
 534
 535         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 536 }
 537 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 538
 539 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 540                                void *data, int offset, int len, u32 access)
 541 {
 542         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 543                                        data, offset, len, access);
 544 }
 545
 546 /*
 547  * Load the pae pdptrs.  Return true is they are all valid.
 548  */
 549 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 550 {
 551         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 552         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 553         int i;
 554         int ret;
 555         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 556
 557         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 558                                       offset * sizeof(u64), sizeof(pdpte),
 559                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 560         if (ret < 0) {
 561                 ret = 0;
 562                 goto out;
 563         }
 564         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 565                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 566                     (pdpte[i] &
 567                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 568                         ret = 0;
 569                         goto out;
 570                 }
 571         }
 572         ret = 1;
 573
 574         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 575         __set_bit(VCPU_EXREG_PDPTR,
 576                   (unsigned long *)&vcpu->arch.regs_avail);
 577         __set_bit(VCPU_EXREG_PDPTR,
 578                   (unsigned long *)&vcpu->arch.regs_dirty);
 579 out:
 580
 581         return ret;
 582 }
 583 EXPORT_SYMBOL_GPL(load_pdptrs);
 584
 585 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 586 {
 587         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 588         bool changed = true;
 589         int offset;
 590         gfn_t gfn;
 591         int r;
 592
 593         if (is_long_mode(vcpu) || !is_pae(vcpu))
 594                 return false;
 595
 596         if (!test_bit(VCPU_EXREG_PDPTR,
 597                       (unsigned long *)&vcpu->arch.regs_avail))
 598                 return true;
 599
 600         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 601         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 602         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 603                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 604         if (r < 0)
 605                 goto out;
 606         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 607 out:
 608
 609         return changed;
 610 }
 611 EXPORT_SYMBOL_GPL(pdptrs_changed);
 612
 613 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 614 {
 615         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 616         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 617
 618         cr0 |= X86_CR0_ET;
 619
 620 #ifdef CONFIG_X86_64
 621         if (cr0 & 0xffffffff00000000UL)
 622                 return 1;
 623 #endif
 624
 625         cr0 &= ~CR0_RESERVED_BITS;
 626
 627         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 628                 return 1;
 629
 630         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 631                 return 1;
 632
 633         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 634 #ifdef CONFIG_X86_64
 635                 if ((vcpu->arch.efer & EFER_LME)) {
 636                         int cs_db, cs_l;
 637
 638                         if (!is_pae(vcpu))
 639                                 return 1;
 640                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 641                         if (cs_l)
 642                                 return 1;
 643                 } else
 644 #endif
 645                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 646                                                  kvm_read_cr3(vcpu)))
 647                         return 1;
 648         }
 649
 650         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 651                 return 1;
 652
 653         kvm_x86_ops->set_cr0(vcpu, cr0);
 654
 655         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 656                 kvm_clear_async_pf_completion_queue(vcpu);
 657                 kvm_async_pf_hash_reset(vcpu);
 658         }
 659
 660         if ((cr0 ^ old_cr0) & update_bits)
 661                 kvm_mmu_reset_context(vcpu);
 662
 663         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 664             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 665             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 666                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 667
 668         return 0;
 669 }
 670 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 671
 672 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 673 {
 674         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 675 }
 676 EXPORT_SYMBOL_GPL(kvm_lmsw);
 677
 678 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 679 {
 680         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 681                         !vcpu->guest_xcr0_loaded) {
 682                 /* kvm_set_xcr() also depends on this */
 683                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 684                 vcpu->guest_xcr0_loaded = 1;
 685         }
 686 }
 687
 688 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 689 {
 690         if (vcpu->guest_xcr0_loaded) {
 691                 if (vcpu->arch.xcr0 != host_xcr0)
 692                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 693                 vcpu->guest_xcr0_loaded = 0;
 694         }
 695 }
 696
 697 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 698 {
 699         u64 xcr0 = xcr;
 700         u64 old_xcr0 = vcpu->arch.xcr0;
 701         u64 valid_bits;
 702
 703         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 704         if (index != XCR_XFEATURE_ENABLED_MASK)
 705                 return 1;
 706         if (!(xcr0 & XFEATURE_MASK_FP))
 707                 return 1;
 708         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 709                 return 1;
 710
 711         /*
 712          * Do not allow the guest to set bits that we do not support
 713          * saving.  However, xcr0 bit 0 is always set, even if the
 714          * emulated CPU does not support XSAVE (see fx_init).
 715          */
 716         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 717         if (xcr0 & ~valid_bits)
 718                 return 1;
 719
 720         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 721             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 722                 return 1;
 723
 724         if (xcr0 & XFEATURE_MASK_AVX512) {
 725                 if (!(xcr0 & XFEATURE_MASK_YMM))
 726                         return 1;
 727                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 728                         return 1;
 729         }
 730         vcpu->arch.xcr0 = xcr0;
 731
 732         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 733                 kvm_update_cpuid(vcpu);
 734         return 0;
 735 }
 736
 737 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 738 {
 739         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 740             __kvm_set_xcr(vcpu, index, xcr)) {
 741                 kvm_inject_gp(vcpu, 0);
 742                 return 1;
 743         }
 744         return 0;
 745 }
 746 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 747
 748 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 749 {
 750         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 751         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 752                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 753
 754         if (cr4 & CR4_RESERVED_BITS)
 755                 return 1;
 756
 757         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 758                 return 1;
 759
 760         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 761                 return 1;
 762
 763         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 764                 return 1;
 765
 766         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 767                 return 1;
 768
 769         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 770                 return 1;
 771
 772         if (is_long_mode(vcpu)) {
 773                 if (!(cr4 & X86_CR4_PAE))
 774                         return 1;
 775         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 776                    && ((cr4 ^ old_cr4) & pdptr_bits)
 777                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 778                                    kvm_read_cr3(vcpu)))
 779                 return 1;
 780
 781         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 782                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 783                         return 1;
 784
 785                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 786                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 787                         return 1;
 788         }
 789
 790         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 791                 return 1;
 792
 793         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 794             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 795                 kvm_mmu_reset_context(vcpu);
 796
 797         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 798                 kvm_update_cpuid(vcpu);
 799
 800         return 0;
 801 }
 802 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 803
 804 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 805 {
 806 #ifdef CONFIG_X86_64
 807         cr3 &= ~CR3_PCID_INVD;
 808 #endif
 809
 810         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 811                 kvm_mmu_sync_roots(vcpu);
 812                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 813                 return 0;
 814         }
 815
 816         if (is_long_mode(vcpu)) {
 817                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 818                         return 1;
 819         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 820                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 821                 return 1;
 822
 823         vcpu->arch.cr3 = cr3;
 824         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 825         kvm_mmu_new_cr3(vcpu);
 826         return 0;
 827 }
 828 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 829
 830 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 831 {
 832         if (cr8 & CR8_RESERVED_BITS)
 833                 return 1;
 834         if (lapic_in_kernel(vcpu))
 835                 kvm_lapic_set_tpr(vcpu, cr8);
 836         else
 837                 vcpu->arch.cr8 = cr8;
 838         return 0;
 839 }
 840 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 841
 842 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 843 {
 844         if (lapic_in_kernel(vcpu))
 845                 return kvm_lapic_get_cr8(vcpu);
 846         else
 847                 return vcpu->arch.cr8;
 848 }
 849 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 850
 851 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 852 {
 853         int i;
 854
 855         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 856                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 857                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 858                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 859         }
 860 }
 861
 862 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 863 {
 864         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 865                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 866 }
 867
 868 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 869 {
 870         unsigned long dr7;
 871
 872         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 873                 dr7 = vcpu->arch.guest_debug_dr7;
 874         else
 875                 dr7 = vcpu->arch.dr7;
 876         kvm_x86_ops->set_dr7(vcpu, dr7);
 877         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 878         if (dr7 & DR7_BP_EN_MASK)
 879                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 880 }
 881
 882 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 883 {
 884         u64 fixed = DR6_FIXED_1;
 885
 886         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 887                 fixed |= DR6_RTM;
 888         return fixed;
 889 }
 890
 891 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 892 {
 893         switch (dr) {
 894         case 0 ... 3:
 895                 vcpu->arch.db[dr] = val;
 896                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 897                         vcpu->arch.eff_db[dr] = val;
 898                 break;
 899         case 4:
 900                 /* fall through */
 901         case 6:
 902                 if (val & 0xffffffff00000000ULL)
 903                         return -1; /* #GP */
 904                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 905                 kvm_update_dr6(vcpu);
 906                 break;
 907         case 5:
 908                 /* fall through */
 909         default: /* 7 */
 910                 if (val & 0xffffffff00000000ULL)
 911                         return -1; /* #GP */
 912                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 913                 kvm_update_dr7(vcpu);
 914                 break;
 915         }
 916
 917         return 0;
 918 }
 919
 920 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 921 {
 922         if (__kvm_set_dr(vcpu, dr, val)) {
 923                 kvm_inject_gp(vcpu, 0);
 924                 return 1;
 925         }
 926         return 0;
 927 }
 928 EXPORT_SYMBOL_GPL(kvm_set_dr);
 929
 930 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 931 {
 932         switch (dr) {
 933         case 0 ... 3:
 934                 *val = vcpu->arch.db[dr];
 935                 break;
 936         case 4:
 937                 /* fall through */
 938         case 6:
 939                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 940                         *val = vcpu->arch.dr6;
 941                 else
 942                         *val = kvm_x86_ops->get_dr6(vcpu);
 943                 break;
 944         case 5:
 945                 /* fall through */
 946         default: /* 7 */
 947                 *val = vcpu->arch.dr7;
 948                 break;
 949         }
 950         return 0;
 951 }
 952 EXPORT_SYMBOL_GPL(kvm_get_dr);
 953
 954 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 955 {
 956         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 957         u64 data;
 958         int err;
 959
 960         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 961         if (err)
 962                 return err;
 963         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 964         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 965         return err;
 966 }
 967 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 968
 969 /*
 970  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 971  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 972  *
 973  * This list is modified at module load time to reflect the
 974  * capabilities of the host cpu. This capabilities test skips MSRs that are
 975  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 976  * may depend on host virtualization features rather than host cpu features.
 977  */
 978
 979 static u32 msrs_to_save[] = {
 980         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 981         MSR_STAR,
 982 #ifdef CONFIG_X86_64
 983         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 984 #endif
 985         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 986         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
 987 };
 988
 989 static unsigned num_msrs_to_save;
 990
 991 static u32 emulated_msrs[] = {
 992         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 993         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 994         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 995         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 996         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
 997         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 998         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 999         HV_X64_MSR_RESET,
1000         HV_X64_MSR_VP_INDEX,
1001         HV_X64_MSR_VP_RUNTIME,
1002         HV_X64_MSR_SCONTROL,
1003         HV_X64_MSR_STIMER0_CONFIG,
1004         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1005         MSR_KVM_PV_EOI_EN,
1006
1007         MSR_IA32_TSC_ADJUST,
1008         MSR_IA32_TSCDEADLINE,
1009         MSR_IA32_MISC_ENABLE,
1010         MSR_IA32_MCG_STATUS,
1011         MSR_IA32_MCG_CTL,
1012         MSR_IA32_MCG_EXT_CTL,
1013         MSR_IA32_SMBASE,
1014         MSR_PLATFORM_INFO,
1015         MSR_MISC_FEATURES_ENABLES,
1016 };
1017
1018 static unsigned num_emulated_msrs;
1019
1020 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1021 {
1022         if (efer & efer_reserved_bits)
1023                 return false;
1024
1025         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1026                         return false;
1027
1028         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1029                         return false;
1030
1031         return true;
1032 }
1033 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1034
1035 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1036 {
1037         u64 old_efer = vcpu->arch.efer;
1038
1039         if (!kvm_valid_efer(vcpu, efer))
1040                 return 1;
1041
1042         if (is_paging(vcpu)
1043             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1044                 return 1;
1045
1046         efer &= ~EFER_LMA;
1047         efer |= vcpu->arch.efer & EFER_LMA;
1048
1049         kvm_x86_ops->set_efer(vcpu, efer);
1050
1051         /* Update reserved bits */
1052         if ((efer ^ old_efer) & EFER_NX)
1053                 kvm_mmu_reset_context(vcpu);
1054
1055         return 0;
1056 }
1057
1058 void kvm_enable_efer_bits(u64 mask)
1059 {
1060        efer_reserved_bits &= ~mask;
1061 }
1062 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1063
1064 /*
1065  * Writes msr value into into the appropriate "register".
1066  * Returns 0 on success, non-0 otherwise.
1067  * Assumes vcpu_load() was already called.
1068  */
1069 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1070 {
1071         switch (msr->index) {
1072         case MSR_FS_BASE:
1073         case MSR_GS_BASE:
1074         case MSR_KERNEL_GS_BASE:
1075         case MSR_CSTAR:
1076         case MSR_LSTAR:
1077                 if (is_noncanonical_address(msr->data))
1078                         return 1;
1079                 break;
1080         case MSR_IA32_SYSENTER_EIP:
1081         case MSR_IA32_SYSENTER_ESP:
1082                 /*
1083                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1084                  * non-canonical address is written on Intel but not on
1085                  * AMD (which ignores the top 32-bits, because it does
1086                  * not implement 64-bit SYSENTER).
1087                  *
1088                  * 64-bit code should hence be able to write a non-canonical
1089                  * value on AMD.  Making the address canonical ensures that
1090                  * vmentry does not fail on Intel after writing a non-canonical
1091                  * value, and that something deterministic happens if the guest
1092                  * invokes 64-bit SYSENTER.
1093                  */
1094                 msr->data = get_canonical(msr->data);
1095         }
1096         return kvm_x86_ops->set_msr(vcpu, msr);
1097 }
1098 EXPORT_SYMBOL_GPL(kvm_set_msr);
1099
1100 /*
1101  * Adapt set_msr() to msr_io()'s calling convention
1102  */
1103 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1104 {
1105         struct msr_data msr;
1106         int r;
1107
1108         msr.index = index;
1109         msr.host_initiated = true;
1110         r = kvm_get_msr(vcpu, &msr);
1111         if (r)
1112                 return r;
1113
1114         *data = msr.data;
1115         return 0;
1116 }
1117
1118 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1119 {
1120         struct msr_data msr;
1121
1122         msr.data = *data;
1123         msr.index = index;
1124         msr.host_initiated = true;
1125         return kvm_set_msr(vcpu, &msr);
1126 }
1127
1128 #ifdef CONFIG_X86_64
1129 struct pvclock_gtod_data {
1130         seqcount_t      seq;
1131
1132         struct { /* extract of a clocksource struct */
1133                 int vclock_mode;
1134                 u64     cycle_last;
1135                 u64     mask;
1136                 u32     mult;
1137                 u32     shift;
1138         } clock;
1139
1140         u64             boot_ns;
1141         u64             nsec_base;
1142         u64             wall_time_sec;
1143 };
1144
1145 static struct pvclock_gtod_data pvclock_gtod_data;
1146
1147 static void update_pvclock_gtod(struct timekeeper *tk)
1148 {
1149         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1150         u64 boot_ns;
1151
1152         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1153
1154         write_seqcount_begin(&vdata->seq);
1155
1156         /* copy pvclock gtod data */
1157         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1158         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1159         vdata->clock.mask               = tk->tkr_mono.mask;
1160         vdata->clock.mult               = tk->tkr_mono.mult;
1161         vdata->clock.shift              = tk->tkr_mono.shift;
1162
1163         vdata->boot_ns                  = boot_ns;
1164         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1165
1166         vdata->wall_time_sec            = tk->xtime_sec;
1167
1168         write_seqcount_end(&vdata->seq);
1169 }
1170 #endif
1171
1172 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1173 {
1174         /*
1175          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1176          * vcpu_enter_guest.  This function is only called from
1177          * the physical CPU that is running vcpu.
1178          */
1179         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1180 }
1181
1182 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1183 {
1184         int version;
1185         int r;
1186         struct pvclock_wall_clock wc;
1187         struct timespec64 boot;
1188
1189         if (!wall_clock)
1190                 return;
1191
1192         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1193         if (r)
1194                 return;
1195
1196         if (version & 1)
1197                 ++version;  /* first time write, random junk */
1198
1199         ++version;
1200
1201         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1202                 return;
1203
1204         /*
1205          * The guest calculates current wall clock time by adding
1206          * system time (updated by kvm_guest_time_update below) to the
1207          * wall clock specified here.  guest system time equals host
1208          * system time for us, thus we must fill in host boot time here.
1209          */
1210         getboottime64(&boot);
1211
1212         if (kvm->arch.kvmclock_offset) {
1213                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1214                 boot = timespec64_sub(boot, ts);
1215         }
1216         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1217         wc.nsec = boot.tv_nsec;
1218         wc.version = version;
1219
1220         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1221
1222         version++;
1223         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1224 }
1225
1226 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1227 {
1228         do_shl32_div32(dividend, divisor);
1229         return dividend;
1230 }
1231
1232 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1233                                s8 *pshift, u32 *pmultiplier)
1234 {
1235         uint64_t scaled64;
1236         int32_t  shift = 0;
1237         uint64_t tps64;
1238         uint32_t tps32;
1239
1240         tps64 = base_hz;
1241         scaled64 = scaled_hz;
1242         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1243                 tps64 >>= 1;
1244                 shift--;
1245         }
1246
1247         tps32 = (uint32_t)tps64;
1248         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1249                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1250                         scaled64 >>= 1;
1251                 else
1252                         tps32 <<= 1;
1253                 shift++;
1254         }
1255
1256         *pshift = shift;
1257         *pmultiplier = div_frac(scaled64, tps32);
1258
1259         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1260                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1261 }
1262
1263 #ifdef CONFIG_X86_64
1264 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1265 #endif
1266
1267 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1268 static unsigned long max_tsc_khz;
1269
1270 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1271 {
1272         u64 v = (u64)khz * (1000000 + ppm);
1273         do_div(v, 1000000);
1274         return v;
1275 }
1276
1277 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1278 {
1279         u64 ratio;
1280
1281         /* Guest TSC same frequency as host TSC? */
1282         if (!scale) {
1283                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1284                 return 0;
1285         }
1286
1287         /* TSC scaling supported? */
1288         if (!kvm_has_tsc_control) {
1289                 if (user_tsc_khz > tsc_khz) {
1290                         vcpu->arch.tsc_catchup = 1;
1291                         vcpu->arch.tsc_always_catchup = 1;
1292                         return 0;
1293                 } else {
1294                         WARN(1, "user requested TSC rate below hardware speed\n");
1295                         return -1;
1296                 }
1297         }
1298
1299         /* TSC scaling required  - calculate ratio */
1300         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1301                                 user_tsc_khz, tsc_khz);
1302
1303         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1304                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1305                           user_tsc_khz);
1306                 return -1;
1307         }
1308
1309         vcpu->arch.tsc_scaling_ratio = ratio;
1310         return 0;
1311 }
1312
1313 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1314 {
1315         u32 thresh_lo, thresh_hi;
1316         int use_scaling = 0;
1317
1318         /* tsc_khz can be zero if TSC calibration fails */
1319         if (user_tsc_khz == 0) {
1320                 /* set tsc_scaling_ratio to a safe value */
1321                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1322                 return -1;
1323         }
1324
1325         /* Compute a scale to convert nanoseconds in TSC cycles */
1326         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1327                            &vcpu->arch.virtual_tsc_shift,
1328                            &vcpu->arch.virtual_tsc_mult);
1329         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1330
1331         /*
1332          * Compute the variation in TSC rate which is acceptable
1333          * within the range of tolerance and decide if the
1334          * rate being applied is within that bounds of the hardware
1335          * rate.  If so, no scaling or compensation need be done.
1336          */
1337         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1338         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1339         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1340                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1341                 use_scaling = 1;
1342         }
1343         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1344 }
1345
1346 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1347 {
1348         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1349                                       vcpu->arch.virtual_tsc_mult,
1350                                       vcpu->arch.virtual_tsc_shift);
1351         tsc += vcpu->arch.this_tsc_write;
1352         return tsc;
1353 }
1354
1355 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1356 {
1357 #ifdef CONFIG_X86_64
1358         bool vcpus_matched;
1359         struct kvm_arch *ka = &vcpu->kvm->arch;
1360         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1361
1362         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1363                          atomic_read(&vcpu->kvm->online_vcpus));
1364
1365         /*
1366          * Once the masterclock is enabled, always perform request in
1367          * order to update it.
1368          *
1369          * In order to enable masterclock, the host clocksource must be TSC
1370          * and the vcpus need to have matched TSCs.  When that happens,
1371          * perform request to enable masterclock.
1372          */
1373         if (ka->use_master_clock ||
1374             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1375                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1376
1377         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1378                             atomic_read(&vcpu->kvm->online_vcpus),
1379                             ka->use_master_clock, gtod->clock.vclock_mode);
1380 #endif
1381 }
1382
1383 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1384 {
1385         u64 curr_offset = vcpu->arch.tsc_offset;
1386         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1387 }
1388
1389 /*
1390  * Multiply tsc by a fixed point number represented by ratio.
1391  *
1392  * The most significant 64-N bits (mult) of ratio represent the
1393  * integral part of the fixed point number; the remaining N bits
1394  * (frac) represent the fractional part, ie. ratio represents a fixed
1395  * point number (mult + frac * 2^(-N)).
1396  *
1397  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1398  */
1399 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1400 {
1401         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1402 }
1403
1404 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1405 {
1406         u64 _tsc = tsc;
1407         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1408
1409         if (ratio != kvm_default_tsc_scaling_ratio)
1410                 _tsc = __scale_tsc(ratio, tsc);
1411
1412         return _tsc;
1413 }
1414 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1415
1416 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1417 {
1418         u64 tsc;
1419
1420         tsc = kvm_scale_tsc(vcpu, rdtsc());
1421
1422         return target_tsc - tsc;
1423 }
1424
1425 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1426 {
1427         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1428 }
1429 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1430
1431 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1432 {
1433         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1434         vcpu->arch.tsc_offset = offset;
1435 }
1436
1437 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1438 {
1439         struct kvm *kvm = vcpu->kvm;
1440         u64 offset, ns, elapsed;
1441         unsigned long flags;
1442         bool matched;
1443         bool already_matched;
1444         u64 data = msr->data;
1445         bool synchronizing = false;
1446
1447         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1448         offset = kvm_compute_tsc_offset(vcpu, data);
1449         ns = ktime_get_boot_ns();
1450         elapsed = ns - kvm->arch.last_tsc_nsec;
1451
1452         if (vcpu->arch.virtual_tsc_khz) {
1453                 if (data == 0 && msr->host_initiated) {
1454                         /*
1455                          * detection of vcpu initialization -- need to sync
1456                          * with other vCPUs. This particularly helps to keep
1457                          * kvm_clock stable after CPU hotplug
1458                          */
1459                         synchronizing = true;
1460                 } else {
1461                         u64 tsc_exp = kvm->arch.last_tsc_write +
1462                                                 nsec_to_cycles(vcpu, elapsed);
1463                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1464                         /*
1465                          * Special case: TSC write with a small delta (1 second)
1466                          * of virtual cycle time against real time is
1467                          * interpreted as an attempt to synchronize the CPU.
1468                          */
1469                         synchronizing = data < tsc_exp + tsc_hz &&
1470                                         data + tsc_hz > tsc_exp;
1471                 }
1472         }
1473
1474         /*
1475          * For a reliable TSC, we can match TSC offsets, and for an unstable
1476          * TSC, we add elapsed time in this computation.  We could let the
1477          * compensation code attempt to catch up if we fall behind, but
1478          * it's better to try to match offsets from the beginning.
1479          */
1480         if (synchronizing &&
1481             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1482                 if (!check_tsc_unstable()) {
1483                         offset = kvm->arch.cur_tsc_offset;
1484                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1485                 } else {
1486                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1487                         data += delta;
1488                         offset = kvm_compute_tsc_offset(vcpu, data);
1489                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1490                 }
1491                 matched = true;
1492                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1493         } else {
1494                 /*
1495                  * We split periods of matched TSC writes into generations.
1496                  * For each generation, we track the original measured
1497                  * nanosecond time, offset, and write, so if TSCs are in
1498                  * sync, we can match exact offset, and if not, we can match
1499                  * exact software computation in compute_guest_tsc()
1500                  *
1501                  * These values are tracked in kvm->arch.cur_xxx variables.
1502                  */
1503                 kvm->arch.cur_tsc_generation++;
1504                 kvm->arch.cur_tsc_nsec = ns;
1505                 kvm->arch.cur_tsc_write = data;
1506                 kvm->arch.cur_tsc_offset = offset;
1507                 matched = false;
1508                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1509                          kvm->arch.cur_tsc_generation, data);
1510         }
1511
1512         /*
1513          * We also track th most recent recorded KHZ, write and time to
1514          * allow the matching interval to be extended at each write.
1515          */
1516         kvm->arch.last_tsc_nsec = ns;
1517         kvm->arch.last_tsc_write = data;
1518         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1519
1520         vcpu->arch.last_guest_tsc = data;
1521
1522         /* Keep track of which generation this VCPU has synchronized to */
1523         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1524         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1525         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1526
1527         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1528                 update_ia32_tsc_adjust_msr(vcpu, offset);
1529
1530         kvm_vcpu_write_tsc_offset(vcpu, offset);
1531         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1532
1533         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1534         if (!matched) {
1535                 kvm->arch.nr_vcpus_matched_tsc = 0;
1536         } else if (!already_matched) {
1537                 kvm->arch.nr_vcpus_matched_tsc++;
1538         }
1539
1540         kvm_track_tsc_matching(vcpu);
1541         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1542 }
1543
1544 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1545
1546 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1547                                            s64 adjustment)
1548 {
1549         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1550 }
1551
1552 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1553 {
1554         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1555                 WARN_ON(adjustment < 0);
1556         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1557         adjust_tsc_offset_guest(vcpu, adjustment);
1558 }
1559
1560 #ifdef CONFIG_X86_64
1561
1562 static u64 read_tsc(void)
1563 {
1564         u64 ret = (u64)rdtsc_ordered();
1565         u64 last = pvclock_gtod_data.clock.cycle_last;
1566
1567         if (likely(ret >= last))
1568                 return ret;
1569
1570         /*
1571          * GCC likes to generate cmov here, but this branch is extremely
1572          * predictable (it's just a function of time and the likely is
1573          * very likely) and there's a data dependence, so force GCC
1574          * to generate a branch instead.  I don't barrier() because
1575          * we don't actually need a barrier, and if this function
1576          * ever gets inlined it will generate worse code.
1577          */
1578         asm volatile ("");
1579         return last;
1580 }
1581
1582 static inline u64 vgettsc(u64 *cycle_now)
1583 {
1584         long v;
1585         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1586
1587         *cycle_now = read_tsc();
1588
1589         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1590         return v * gtod->clock.mult;
1591 }
1592
1593 static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1594 {
1595         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1596         unsigned long seq;
1597         int mode;
1598         u64 ns;
1599
1600         do {
1601                 seq = read_seqcount_begin(&gtod->seq);
1602                 mode = gtod->clock.vclock_mode;
1603                 ns = gtod->nsec_base;
1604                 ns += vgettsc(cycle_now);
1605                 ns >>= gtod->clock.shift;
1606                 ns += gtod->boot_ns;
1607         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1608         *t = ns;
1609
1610         return mode;
1611 }
1612
1613 static int do_realtime(struct timespec *ts, u64 *cycle_now)
1614 {
1615         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1616         unsigned long seq;
1617         int mode;
1618         u64 ns;
1619
1620         do {
1621                 seq = read_seqcount_begin(&gtod->seq);
1622                 mode = gtod->clock.vclock_mode;
1623                 ts->tv_sec = gtod->wall_time_sec;
1624                 ns = gtod->nsec_base;
1625                 ns += vgettsc(cycle_now);
1626                 ns >>= gtod->clock.shift;
1627         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1628
1629         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1630         ts->tv_nsec = ns;
1631
1632         return mode;
1633 }
1634
1635 /* returns true if host is using tsc clocksource */
1636 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1637 {
1638         /* checked again under seqlock below */
1639         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1640                 return false;
1641
1642         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1643 }
1644
1645 /* returns true if host is using tsc clocksource */
1646 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1647                                            u64 *cycle_now)
1648 {
1649         /* checked again under seqlock below */
1650         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1651                 return false;
1652
1653         return do_realtime(ts, cycle_now) == VCLOCK_TSC;
1654 }
1655 #endif
1656
1657 /*
1658  *
1659  * Assuming a stable TSC across physical CPUS, and a stable TSC
1660  * across virtual CPUs, the following condition is possible.
1661  * Each numbered line represents an event visible to both
1662  * CPUs at the next numbered event.
1663  *
1664  * "timespecX" represents host monotonic time. "tscX" represents
1665  * RDTSC value.
1666  *
1667  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1668  *
1669  * 1.  read timespec0,tsc0
1670  * 2.                                   | timespec1 = timespec0 + N
1671  *                                      | tsc1 = tsc0 + M
1672  * 3. transition to guest               | transition to guest
1673  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1674  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1675  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1676  *
1677  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1678  *
1679  *      - ret0 < ret1
1680  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1681  *              ...
1682  *      - 0 < N - M => M < N
1683  *
1684  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1685  * always the case (the difference between two distinct xtime instances
1686  * might be smaller then the difference between corresponding TSC reads,
1687  * when updating guest vcpus pvclock areas).
1688  *
1689  * To avoid that problem, do not allow visibility of distinct
1690  * system_timestamp/tsc_timestamp values simultaneously: use a master
1691  * copy of host monotonic time values. Update that master copy
1692  * in lockstep.
1693  *
1694  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1695  *
1696  */
1697
1698 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1699 {
1700 #ifdef CONFIG_X86_64
1701         struct kvm_arch *ka = &kvm->arch;
1702         int vclock_mode;
1703         bool host_tsc_clocksource, vcpus_matched;
1704
1705         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1706                         atomic_read(&kvm->online_vcpus));
1707
1708         /*
1709          * If the host uses TSC clock, then passthrough TSC as stable
1710          * to the guest.
1711          */
1712         host_tsc_clocksource = kvm_get_time_and_clockread(
1713                                         &ka->master_kernel_ns,
1714                                         &ka->master_cycle_now);
1715
1716         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1717                                 && !ka->backwards_tsc_observed
1718                                 && !ka->boot_vcpu_runs_old_kvmclock;
1719
1720         if (ka->use_master_clock)
1721                 atomic_set(&kvm_guest_has_master_clock, 1);
1722
1723         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1724         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1725                                         vcpus_matched);
1726 #endif
1727 }
1728
1729 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1730 {
1731         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1732 }
1733
1734 static void kvm_gen_update_masterclock(struct kvm *kvm)
1735 {
1736 #ifdef CONFIG_X86_64
1737         int i;
1738         struct kvm_vcpu *vcpu;
1739         struct kvm_arch *ka = &kvm->arch;
1740
1741         spin_lock(&ka->pvclock_gtod_sync_lock);
1742         kvm_make_mclock_inprogress_request(kvm);
1743         /* no guest entries from this point */
1744         pvclock_update_vm_gtod_copy(kvm);
1745
1746         kvm_for_each_vcpu(i, vcpu, kvm)
1747                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1748
1749         /* guest entries allowed */
1750         kvm_for_each_vcpu(i, vcpu, kvm)
1751                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1752
1753         spin_unlock(&ka->pvclock_gtod_sync_lock);
1754 #endif
1755 }
1756
1757 u64 get_kvmclock_ns(struct kvm *kvm)
1758 {
1759         struct kvm_arch *ka = &kvm->arch;
1760         struct pvclock_vcpu_time_info hv_clock;
1761         u64 ret;
1762
1763         spin_lock(&ka->pvclock_gtod_sync_lock);
1764         if (!ka->use_master_clock) {
1765                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1766                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1767         }
1768
1769         hv_clock.tsc_timestamp = ka->master_cycle_now;
1770         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1771         spin_unlock(&ka->pvclock_gtod_sync_lock);
1772
1773         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1774         get_cpu();
1775
1776         kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1777                            &hv_clock.tsc_shift,
1778                            &hv_clock.tsc_to_system_mul);
1779         ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1780
1781         put_cpu();
1782
1783         return ret;
1784 }
1785
1786 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1787 {
1788         struct kvm_vcpu_arch *vcpu = &v->arch;
1789         struct pvclock_vcpu_time_info guest_hv_clock;
1790
1791         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1792                 &guest_hv_clock, sizeof(guest_hv_clock))))
1793                 return;
1794
1795         /* This VCPU is paused, but it's legal for a guest to read another
1796          * VCPU's kvmclock, so we really have to follow the specification where
1797          * it says that version is odd if data is being modified, and even after
1798          * it is consistent.
1799          *
1800          * Version field updates must be kept separate.  This is because
1801          * kvm_write_guest_cached might use a "rep movs" instruction, and
1802          * writes within a string instruction are weakly ordered.  So there
1803          * are three writes overall.
1804          *
1805          * As a small optimization, only write the version field in the first
1806          * and third write.  The vcpu->pv_time cache is still valid, because the
1807          * version field is the first in the struct.
1808          */
1809         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1810
1811         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1812         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1813                                 &vcpu->hv_clock,
1814                                 sizeof(vcpu->hv_clock.version));
1815
1816         smp_wmb();
1817
1818         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1819         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1820
1821         if (vcpu->pvclock_set_guest_stopped_request) {
1822                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1823                 vcpu->pvclock_set_guest_stopped_request = false;
1824         }
1825
1826         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1827
1828         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1829                                 &vcpu->hv_clock,
1830                                 sizeof(vcpu->hv_clock));
1831
1832         smp_wmb();
1833
1834         vcpu->hv_clock.version++;
1835         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1836                                 &vcpu->hv_clock,
1837                                 sizeof(vcpu->hv_clock.version));
1838 }
1839
1840 static int kvm_guest_time_update(struct kvm_vcpu *v)
1841 {
1842         unsigned long flags, tgt_tsc_khz;
1843         struct kvm_vcpu_arch *vcpu = &v->arch;
1844         struct kvm_arch *ka = &v->kvm->arch;
1845         s64 kernel_ns;
1846         u64 tsc_timestamp, host_tsc;
1847         u8 pvclock_flags;
1848         bool use_master_clock;
1849
1850         kernel_ns = 0;
1851         host_tsc = 0;
1852
1853         /*
1854          * If the host uses TSC clock, then passthrough TSC as stable
1855          * to the guest.
1856          */
1857         spin_lock(&ka->pvclock_gtod_sync_lock);
1858         use_master_clock = ka->use_master_clock;
1859         if (use_master_clock) {
1860                 host_tsc = ka->master_cycle_now;
1861                 kernel_ns = ka->master_kernel_ns;
1862         }
1863         spin_unlock(&ka->pvclock_gtod_sync_lock);
1864
1865         /* Keep irq disabled to prevent changes to the clock */
1866         local_irq_save(flags);
1867         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1868         if (unlikely(tgt_tsc_khz == 0)) {
1869                 local_irq_restore(flags);
1870                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1871                 return 1;
1872         }
1873         if (!use_master_clock) {
1874                 host_tsc = rdtsc();
1875                 kernel_ns = ktime_get_boot_ns();
1876         }
1877
1878         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1879
1880         /*
1881          * We may have to catch up the TSC to match elapsed wall clock
1882          * time for two reasons, even if kvmclock is used.
1883          *   1) CPU could have been running below the maximum TSC rate
1884          *   2) Broken TSC compensation resets the base at each VCPU
1885          *      entry to avoid unknown leaps of TSC even when running
1886          *      again on the same CPU.  This may cause apparent elapsed
1887          *      time to disappear, and the guest to stand still or run
1888          *      very slowly.
1889          */
1890         if (vcpu->tsc_catchup) {
1891                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1892                 if (tsc > tsc_timestamp) {
1893                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1894                         tsc_timestamp = tsc;
1895                 }
1896         }
1897
1898         local_irq_restore(flags);
1899
1900         /* With all the info we got, fill in the values */
1901
1902         if (kvm_has_tsc_control)
1903                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
1904
1905         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1906                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1907                                    &vcpu->hv_clock.tsc_shift,
1908                                    &vcpu->hv_clock.tsc_to_system_mul);
1909                 vcpu->hw_tsc_khz = tgt_tsc_khz;
1910         }
1911
1912         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1913         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1914         vcpu->last_guest_tsc = tsc_timestamp;
1915
1916         /* If the host uses TSC clocksource, then it is stable */
1917         pvclock_flags = 0;
1918         if (use_master_clock)
1919                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1920
1921         vcpu->hv_clock.flags = pvclock_flags;
1922
1923         if (vcpu->pv_time_enabled)
1924                 kvm_setup_pvclock_page(v);
1925         if (v == kvm_get_vcpu(v->kvm, 0))
1926                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1927         return 0;
1928 }
1929
1930 /*
1931  * kvmclock updates which are isolated to a given vcpu, such as
1932  * vcpu->cpu migration, should not allow system_timestamp from
1933  * the rest of the vcpus to remain static. Otherwise ntp frequency
1934  * correction applies to one vcpu's system_timestamp but not
1935  * the others.
1936  *
1937  * So in those cases, request a kvmclock update for all vcpus.
1938  * We need to rate-limit these requests though, as they can
1939  * considerably slow guests that have a large number of vcpus.
1940  * The time for a remote vcpu to update its kvmclock is bound
1941  * by the delay we use to rate-limit the updates.
1942  */
1943
1944 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1945
1946 static void kvmclock_update_fn(struct work_struct *work)
1947 {
1948         int i;
1949         struct delayed_work *dwork = to_delayed_work(work);
1950         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1951                                            kvmclock_update_work);
1952         struct kvm *kvm = container_of(ka, struct kvm, arch);
1953         struct kvm_vcpu *vcpu;
1954
1955         kvm_for_each_vcpu(i, vcpu, kvm) {
1956                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1957                 kvm_vcpu_kick(vcpu);
1958         }
1959 }
1960
1961 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1962 {
1963         struct kvm *kvm = v->kvm;
1964
1965         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1966         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1967                                         KVMCLOCK_UPDATE_DELAY);
1968 }
1969
1970 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1971
1972 static void kvmclock_sync_fn(struct work_struct *work)
1973 {
1974         struct delayed_work *dwork = to_delayed_work(work);
1975         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1976                                            kvmclock_sync_work);
1977         struct kvm *kvm = container_of(ka, struct kvm, arch);
1978
1979         if (!kvmclock_periodic_sync)
1980                 return;
1981
1982         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1983         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1984                                         KVMCLOCK_SYNC_PERIOD);
1985 }
1986
1987 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1988 {
1989         u64 mcg_cap = vcpu->arch.mcg_cap;
1990         unsigned bank_num = mcg_cap & 0xff;
1991
1992         switch (msr) {
1993         case MSR_IA32_MCG_STATUS:
1994                 vcpu->arch.mcg_status = data;
1995                 break;
1996         case MSR_IA32_MCG_CTL:
1997                 if (!(mcg_cap & MCG_CTL_P))
1998                         return 1;
1999                 if (data != 0 && data != ~(u64)0)
2000                         return -1;
2001                 vcpu->arch.mcg_ctl = data;
2002                 break;
2003         default:
2004                 if (msr >= MSR_IA32_MC0_CTL &&
2005                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2006                         u32 offset = msr - MSR_IA32_MC0_CTL;
2007                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2008                          * some Linux kernels though clear bit 10 in bank 4 to
2009                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2010                          * this to avoid an uncatched #GP in the guest
2011                          */
2012                         if ((offset & 0x3) == 0 &&
2013                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2014                                 return -1;
2015                         vcpu->arch.mce_banks[offset] = data;
2016                         break;
2017                 }
2018                 return 1;
2019         }
2020         return 0;
2021 }
2022
2023 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2024 {
2025         struct kvm *kvm = vcpu->kvm;
2026         int lm = is_long_mode(vcpu);
2027         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2028                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2029         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2030                 : kvm->arch.xen_hvm_config.blob_size_32;
2031         u32 page_num = data & ~PAGE_MASK;
2032         u64 page_addr = data & PAGE_MASK;
2033         u8 *page;
2034         int r;
2035
2036         r = -E2BIG;
2037         if (page_num >= blob_size)
2038                 goto out;
2039         r = -ENOMEM;
2040         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2041         if (IS_ERR(page)) {
2042                 r = PTR_ERR(page);
2043                 goto out;
2044         }
2045         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2046                 goto out_free;
2047         r = 0;
2048 out_free:
2049         kfree(page);
2050 out:
2051         return r;
2052 }
2053
2054 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2055 {
2056         gpa_t gpa = data & ~0x3f;
2057
2058         /* Bits 3:5 are reserved, Should be zero */
2059         if (data & 0x38)
2060                 return 1;
2061
2062         vcpu->arch.apf.msr_val = data;
2063
2064         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2065                 kvm_clear_async_pf_completion_queue(vcpu);
2066                 kvm_async_pf_hash_reset(vcpu);
2067                 return 0;
2068         }
2069
2070         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2071                                         sizeof(u32)))
2072                 return 1;
2073
2074         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2075         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2076         kvm_async_pf_wakeup_all(vcpu);
2077         return 0;
2078 }
2079
2080 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2081 {
2082         vcpu->arch.pv_time_enabled = false;
2083 }
2084
2085 static void record_steal_time(struct kvm_vcpu *vcpu)
2086 {
2087         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2088                 return;
2089
2090         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2091                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2092                 return;
2093
2094         vcpu->arch.st.steal.preempted = 0;
2095
2096         if (vcpu->arch.st.steal.version & 1)
2097                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2098
2099         vcpu->arch.st.steal.version += 1;
2100
2101         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2102                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2103
2104         smp_wmb();
2105
2106         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2107                 vcpu->arch.st.last_steal;
2108         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2109
2110         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2111                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2112
2113         smp_wmb();
2114
2115         vcpu->arch.st.steal.version += 1;
2116
2117         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2118                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2119 }
2120
2121 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2122 {
2123         bool pr = false;
2124         u32 msr = msr_info->index;
2125         u64 data = msr_info->data;
2126
2127         switch (msr) {
2128         case MSR_AMD64_NB_CFG:
2129         case MSR_IA32_UCODE_REV:
2130         case MSR_IA32_UCODE_WRITE:
2131         case MSR_VM_HSAVE_PA:
2132         case MSR_AMD64_PATCH_LOADER:
2133         case MSR_AMD64_BU_CFG2:
2134         case MSR_AMD64_DC_CFG:
2135                 break;
2136
2137         case MSR_EFER:
2138                 return set_efer(vcpu, data);
2139         case MSR_K7_HWCR:
2140                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2141                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2142                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2143                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2144                 if (data != 0) {
2145                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2146                                     data);
2147                         return 1;
2148                 }
2149                 break;
2150         case MSR_FAM10H_MMIO_CONF_BASE:
2151                 if (data != 0) {
2152                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2153                                     "0x%llx\n", data);
2154                         return 1;
2155                 }
2156                 break;
2157         case MSR_IA32_DEBUGCTLMSR:
2158                 if (!data) {
2159                         /* We support the non-activated case already */
2160                         break;
2161                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2162                         /* Values other than LBR and BTF are vendor-specific,
2163                            thus reserved and should throw a #GP */
2164                         return 1;
2165                 }
2166                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2167                             __func__, data);
2168                 break;
2169         case 0x200 ... 0x2ff:
2170                 return kvm_mtrr_set_msr(vcpu, msr, data);
2171         case MSR_IA32_APICBASE:
2172                 return kvm_set_apic_base(vcpu, msr_info);
2173         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2174                 return kvm_x2apic_msr_write(vcpu, msr, data);
2175         case MSR_IA32_TSCDEADLINE:
2176                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2177                 break;
2178         case MSR_IA32_TSC_ADJUST:
2179                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2180                         if (!msr_info->host_initiated) {
2181                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2182                                 adjust_tsc_offset_guest(vcpu, adj);
2183                         }
2184                         vcpu->arch.ia32_tsc_adjust_msr = data;
2185                 }
2186                 break;
2187         case MSR_IA32_MISC_ENABLE:
2188                 vcpu->arch.ia32_misc_enable_msr = data;
2189                 break;
2190         case MSR_IA32_SMBASE:
2191                 if (!msr_info->host_initiated)
2192                         return 1;
2193                 vcpu->arch.smbase = data;
2194                 break;
2195         case MSR_KVM_WALL_CLOCK_NEW:
2196         case MSR_KVM_WALL_CLOCK:
2197                 vcpu->kvm->arch.wall_clock = data;
2198                 kvm_write_wall_clock(vcpu->kvm, data);
2199                 break;
2200         case MSR_KVM_SYSTEM_TIME_NEW:
2201         case MSR_KVM_SYSTEM_TIME: {
2202                 struct kvm_arch *ka = &vcpu->kvm->arch;
2203
2204                 kvmclock_reset(vcpu);
2205
2206                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2207                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2208
2209                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2210                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2211
2212                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2213                 }
2214
2215                 vcpu->arch.time = data;
2216                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2217
2218                 /* we verify if the enable bit is set... */
2219                 if (!(data & 1))
2220                         break;
2221
2222                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2223                      &vcpu->arch.pv_time, data & ~1ULL,
2224                      sizeof(struct pvclock_vcpu_time_info)))
2225                         vcpu->arch.pv_time_enabled = false;
2226                 else
2227                         vcpu->arch.pv_time_enabled = true;
2228
2229                 break;
2230         }
2231         case MSR_KVM_ASYNC_PF_EN:
2232                 if (kvm_pv_enable_async_pf(vcpu, data))
2233                         return 1;
2234                 break;
2235         case MSR_KVM_STEAL_TIME:
2236
2237                 if (unlikely(!sched_info_on()))
2238                         return 1;
2239
2240                 if (data & KVM_STEAL_RESERVED_MASK)
2241                         return 1;
2242
2243                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2244                                                 data & KVM_STEAL_VALID_BITS,
2245                                                 sizeof(struct kvm_steal_time)))
2246                         return 1;
2247
2248                 vcpu->arch.st.msr_val = data;
2249
2250                 if (!(data & KVM_MSR_ENABLED))
2251                         break;
2252
2253                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2254
2255                 break;
2256         case MSR_KVM_PV_EOI_EN:
2257                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2258                         return 1;
2259                 break;
2260
2261         case MSR_IA32_MCG_CTL:
2262         case MSR_IA32_MCG_STATUS:
2263         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2264                 return set_msr_mce(vcpu, msr, data);
2265
2266         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2267         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2268                 pr = true; /* fall through */
2269         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2270         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2271                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2272                         return kvm_pmu_set_msr(vcpu, msr_info);
2273
2274                 if (pr || data != 0)
2275                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2276                                     "0x%x data 0x%llx\n", msr, data);
2277                 break;
2278         case MSR_K7_CLK_CTL:
2279                 /*
2280                  * Ignore all writes to this no longer documented MSR.
2281                  * Writes are only relevant for old K7 processors,
2282                  * all pre-dating SVM, but a recommended workaround from
2283                  * AMD for these chips. It is possible to specify the
2284                  * affected processor models on the command line, hence
2285                  * the need to ignore the workaround.
2286                  */
2287                 break;
2288         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2289         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2290         case HV_X64_MSR_CRASH_CTL:
2291         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2292                 return kvm_hv_set_msr_common(vcpu, msr, data,
2293                                              msr_info->host_initiated);
2294         case MSR_IA32_BBL_CR_CTL3:
2295                 /* Drop writes to this legacy MSR -- see rdmsr
2296                  * counterpart for further detail.
2297                  */
2298                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2299                 break;
2300         case MSR_AMD64_OSVW_ID_LENGTH:
2301                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2302                         return 1;
2303                 vcpu->arch.osvw.length = data;
2304                 break;
2305         case MSR_AMD64_OSVW_STATUS:
2306                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2307                         return 1;
2308                 vcpu->arch.osvw.status = data;
2309                 break;
2310         case MSR_PLATFORM_INFO:
2311                 if (!msr_info->host_initiated ||
2312                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2313                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2314                      cpuid_fault_enabled(vcpu)))
2315                         return 1;
2316                 vcpu->arch.msr_platform_info = data;
2317                 break;
2318         case MSR_MISC_FEATURES_ENABLES:
2319                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2320                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2321                      !supports_cpuid_fault(vcpu)))
2322                         return 1;
2323                 vcpu->arch.msr_misc_features_enables = data;
2324                 break;
2325         default:
2326                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2327                         return xen_hvm_config(vcpu, data);
2328                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2329                         return kvm_pmu_set_msr(vcpu, msr_info);
2330                 if (!ignore_msrs) {
2331                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2332                                     msr, data);
2333                         return 1;
2334                 } else {
2335                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2336                                     msr, data);
2337                         break;
2338                 }
2339         }
2340         return 0;
2341 }
2342 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2343
2344
2345 /*
2346  * Reads an msr value (of 'msr_index') into 'pdata'.
2347  * Returns 0 on success, non-0 otherwise.
2348  * Assumes vcpu_load() was already called.
2349  */
2350 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2351 {
2352         return kvm_x86_ops->get_msr(vcpu, msr);
2353 }
2354 EXPORT_SYMBOL_GPL(kvm_get_msr);
2355
2356 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2357 {
2358         u64 data;
2359         u64 mcg_cap = vcpu->arch.mcg_cap;
2360         unsigned bank_num = mcg_cap & 0xff;
2361
2362         switch (msr) {
2363         case MSR_IA32_P5_MC_ADDR:
2364         case MSR_IA32_P5_MC_TYPE:
2365                 data = 0;
2366                 break;
2367         case MSR_IA32_MCG_CAP:
2368                 data = vcpu->arch.mcg_cap;
2369                 break;
2370         case MSR_IA32_MCG_CTL:
2371                 if (!(mcg_cap & MCG_CTL_P))
2372                         return 1;
2373                 data = vcpu->arch.mcg_ctl;
2374                 break;
2375         case MSR_IA32_MCG_STATUS:
2376                 data = vcpu->arch.mcg_status;
2377                 break;
2378         default:
2379                 if (msr >= MSR_IA32_MC0_CTL &&
2380                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2381                         u32 offset = msr - MSR_IA32_MC0_CTL;
2382                         data = vcpu->arch.mce_banks[offset];
2383                         break;
2384                 }
2385                 return 1;
2386         }
2387         *pdata = data;
2388         return 0;
2389 }
2390
2391 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2392 {
2393         switch (msr_info->index) {
2394         case MSR_IA32_PLATFORM_ID:
2395         case MSR_IA32_EBL_CR_POWERON:
2396         case MSR_IA32_DEBUGCTLMSR:
2397         case MSR_IA32_LASTBRANCHFROMIP:
2398         case MSR_IA32_LASTBRANCHTOIP:
2399         case MSR_IA32_LASTINTFROMIP:
2400         case MSR_IA32_LASTINTTOIP:
2401         case MSR_K8_SYSCFG:
2402         case MSR_K8_TSEG_ADDR:
2403         case MSR_K8_TSEG_MASK:
2404         case MSR_K7_HWCR:
2405         case MSR_VM_HSAVE_PA:
2406         case MSR_K8_INT_PENDING_MSG:
2407         case MSR_AMD64_NB_CFG:
2408         case MSR_FAM10H_MMIO_CONF_BASE:
2409         case MSR_AMD64_BU_CFG2:
2410         case MSR_IA32_PERF_CTL:
2411         case MSR_AMD64_DC_CFG:
2412                 msr_info->data = 0;
2413                 break;
2414         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2415         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2416         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2417         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2418                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2419                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2420                 msr_info->data = 0;
2421                 break;
2422         case MSR_IA32_UCODE_REV:
2423                 msr_info->data = 0x100000000ULL;
2424                 break;
2425         case MSR_MTRRcap:
2426         case 0x200 ... 0x2ff:
2427                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2428         case 0xcd: /* fsb frequency */
2429                 msr_info->data = 3;
2430                 break;
2431                 /*
2432                  * MSR_EBC_FREQUENCY_ID
2433                  * Conservative value valid for even the basic CPU models.
2434                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2435                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2436                  * and 266MHz for model 3, or 4. Set Core Clock
2437                  * Frequency to System Bus Frequency Ratio to 1 (bits
2438                  * 31:24) even though these are only valid for CPU
2439                  * models > 2, however guests may end up dividing or
2440                  * multiplying by zero otherwise.
2441                  */
2442         case MSR_EBC_FREQUENCY_ID:
2443                 msr_info->data = 1 << 24;
2444                 break;
2445         case MSR_IA32_APICBASE:
2446                 msr_info->data = kvm_get_apic_base(vcpu);
2447                 break;
2448         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2449                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2450                 break;
2451         case MSR_IA32_TSCDEADLINE:
2452                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2453                 break;
2454         case MSR_IA32_TSC_ADJUST:
2455                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2456                 break;
2457         case MSR_IA32_MISC_ENABLE:
2458                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2459                 break;
2460         case MSR_IA32_SMBASE:
2461                 if (!msr_info->host_initiated)
2462                         return 1;
2463                 msr_info->data = vcpu->arch.smbase;
2464                 break;
2465         case MSR_IA32_PERF_STATUS:
2466                 /* TSC increment by tick */
2467                 msr_info->data = 1000ULL;
2468                 /* CPU multiplier */
2469                 msr_info->data |= (((uint64_t)4ULL) << 40);
2470                 break;
2471         case MSR_EFER:
2472                 msr_info->data = vcpu->arch.efer;
2473                 break;
2474         case MSR_KVM_WALL_CLOCK:
2475         case MSR_KVM_WALL_CLOCK_NEW:
2476                 msr_info->data = vcpu->kvm->arch.wall_clock;
2477                 break;
2478         case MSR_KVM_SYSTEM_TIME:
2479         case MSR_KVM_SYSTEM_TIME_NEW:
2480                 msr_info->data = vcpu->arch.time;
2481                 break;
2482         case MSR_KVM_ASYNC_PF_EN:
2483                 msr_info->data = vcpu->arch.apf.msr_val;
2484                 break;
2485         case MSR_KVM_STEAL_TIME:
2486                 msr_info->data = vcpu->arch.st.msr_val;
2487                 break;
2488         case MSR_KVM_PV_EOI_EN:
2489                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2490                 break;
2491         case MSR_IA32_P5_MC_ADDR:
2492         case MSR_IA32_P5_MC_TYPE:
2493         case MSR_IA32_MCG_CAP:
2494         case MSR_IA32_MCG_CTL:
2495         case MSR_IA32_MCG_STATUS:
2496         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2497                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2498         case MSR_K7_CLK_CTL:
2499                 /*
2500                  * Provide expected ramp-up count for K7. All other
2501                  * are set to zero, indicating minimum divisors for
2502                  * every field.
2503                  *
2504                  * This prevents guest kernels on AMD host with CPU
2505                  * type 6, model 8 and higher from exploding due to
2506                  * the rdmsr failing.
2507                  */
2508                 msr_info->data = 0x20000000;
2509                 break;
2510         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2511         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2512         case HV_X64_MSR_CRASH_CTL:
2513         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2514                 return kvm_hv_get_msr_common(vcpu,
2515                                              msr_info->index, &msr_info->data);
2516                 break;
2517         case MSR_IA32_BBL_CR_CTL3:
2518                 /* This legacy MSR exists but isn't fully documented in current
2519                  * silicon.  It is however accessed by winxp in very narrow
2520                  * scenarios where it sets bit #19, itself documented as
2521                  * a "reserved" bit.  Best effort attempt to source coherent
2522                  * read data here should the balance of the register be
2523                  * interpreted by the guest:
2524                  *
2525                  * L2 cache control register 3: 64GB range, 256KB size,
2526                  * enabled, latency 0x1, configured
2527                  */
2528                 msr_info->data = 0xbe702111;
2529                 break;
2530         case MSR_AMD64_OSVW_ID_LENGTH:
2531                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2532                         return 1;
2533                 msr_info->data = vcpu->arch.osvw.length;
2534                 break;
2535         case MSR_AMD64_OSVW_STATUS:
2536                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2537                         return 1;
2538                 msr_info->data = vcpu->arch.osvw.status;
2539                 break;
2540         case MSR_PLATFORM_INFO:
2541                 msr_info->data = vcpu->arch.msr_platform_info;
2542                 break;
2543         case MSR_MISC_FEATURES_ENABLES:
2544                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2545                 break;
2546         default:
2547                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2548                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2549                 if (!ignore_msrs) {
2550                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2551                                                msr_info->index);
2552                         return 1;
2553                 } else {
2554                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2555                         msr_info->data = 0;
2556                 }
2557                 break;
2558         }
2559         return 0;
2560 }
2561 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2562
2563 /*
2564  * Read or write a bunch of msrs. All parameters are kernel addresses.
2565  *
2566  * @return number of msrs set successfully.
2567  */
2568 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2569                     struct kvm_msr_entry *entries,
2570                     int (*do_msr)(struct kvm_vcpu *vcpu,
2571                                   unsigned index, u64 *data))
2572 {
2573         int i, idx;
2574
2575         idx = srcu_read_lock(&vcpu->kvm->srcu);
2576         for (i = 0; i < msrs->nmsrs; ++i)
2577                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2578                         break;
2579         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2580
2581         return i;
2582 }
2583
2584 /*
2585  * Read or write a bunch of msrs. Parameters are user addresses.
2586  *
2587  * @return number of msrs set successfully.
2588  */
2589 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2590                   int (*do_msr)(struct kvm_vcpu *vcpu,
2591                                 unsigned index, u64 *data),
2592                   int writeback)
2593 {
2594         struct kvm_msrs msrs;
2595         struct kvm_msr_entry *entries;
2596         int r, n;
2597         unsigned size;
2598
2599         r = -EFAULT;
2600         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2601                 goto out;
2602
2603         r = -E2BIG;
2604         if (msrs.nmsrs >= MAX_IO_MSRS)
2605                 goto out;
2606
2607         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2608         entries = memdup_user(user_msrs->entries, size);
2609         if (IS_ERR(entries)) {
2610                 r = PTR_ERR(entries);
2611                 goto out;
2612         }
2613
2614         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2615         if (r < 0)
2616                 goto out_free;
2617
2618         r = -EFAULT;
2619         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2620                 goto out_free;
2621
2622         r = n;
2623
2624 out_free:
2625         kfree(entries);
2626 out:
2627         return r;
2628 }
2629
2630 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2631 {
2632         int r;
2633
2634         switch (ext) {
2635         case KVM_CAP_IRQCHIP:
2636         case KVM_CAP_HLT:
2637         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2638         case KVM_CAP_SET_TSS_ADDR:
2639         case KVM_CAP_EXT_CPUID:
2640         case KVM_CAP_EXT_EMUL_CPUID:
2641         case KVM_CAP_CLOCKSOURCE:
2642         case KVM_CAP_PIT:
2643         case KVM_CAP_NOP_IO_DELAY:
2644         case KVM_CAP_MP_STATE:
2645         case KVM_CAP_SYNC_MMU:
2646         case KVM_CAP_USER_NMI:
2647         case KVM_CAP_REINJECT_CONTROL:
2648         case KVM_CAP_IRQ_INJECT_STATUS:
2649         case KVM_CAP_IOEVENTFD:
2650         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2651         case KVM_CAP_PIT2:
2652         case KVM_CAP_PIT_STATE2:
2653         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2654         case KVM_CAP_XEN_HVM:
2655         case KVM_CAP_VCPU_EVENTS:
2656         case KVM_CAP_HYPERV:
2657         case KVM_CAP_HYPERV_VAPIC:
2658         case KVM_CAP_HYPERV_SPIN:
2659         case KVM_CAP_HYPERV_SYNIC:
2660         case KVM_CAP_HYPERV_SYNIC2:
2661         case KVM_CAP_HYPERV_VP_INDEX:
2662         case KVM_CAP_PCI_SEGMENT:
2663         case KVM_CAP_DEBUGREGS:
2664         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2665         case KVM_CAP_XSAVE:
2666         case KVM_CAP_ASYNC_PF:
2667         case KVM_CAP_GET_TSC_KHZ:
2668         case KVM_CAP_KVMCLOCK_CTRL:
2669         case KVM_CAP_READONLY_MEM:
2670         case KVM_CAP_HYPERV_TIME:
2671         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2672         case KVM_CAP_TSC_DEADLINE_TIMER:
2673         case KVM_CAP_ENABLE_CAP_VM:
2674         case KVM_CAP_DISABLE_QUIRKS:
2675         case KVM_CAP_SET_BOOT_CPU_ID:
2676         case KVM_CAP_SPLIT_IRQCHIP:
2677         case KVM_CAP_IMMEDIATE_EXIT:
2678                 r = 1;
2679                 break;
2680         case KVM_CAP_ADJUST_CLOCK:
2681                 r = KVM_CLOCK_TSC_STABLE;
2682                 break;
2683         case KVM_CAP_X86_GUEST_MWAIT:
2684                 r = kvm_mwait_in_guest();
2685                 break;
2686         case KVM_CAP_X86_SMM:
2687                 /* SMBASE is usually relocated above 1M on modern chipsets,
2688                  * and SMM handlers might indeed rely on 4G segment limits,
2689                  * so do not report SMM to be available if real mode is
2690                  * emulated via vm86 mode.  Still, do not go to great lengths
2691                  * to avoid userspace's usage of the feature, because it is a
2692                  * fringe case that is not enabled except via specific settings
2693                  * of the module parameters.
2694                  */
2695                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2696                 break;
2697         case KVM_CAP_VAPIC:
2698                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2699                 break;
2700         case KVM_CAP_NR_VCPUS:
2701                 r = KVM_SOFT_MAX_VCPUS;
2702                 break;
2703         case KVM_CAP_MAX_VCPUS:
2704                 r = KVM_MAX_VCPUS;
2705                 break;
2706         case KVM_CAP_NR_MEMSLOTS:
2707                 r = KVM_USER_MEM_SLOTS;
2708                 break;
2709         case KVM_CAP_PV_MMU:    /* obsolete */
2710                 r = 0;
2711                 break;
2712         case KVM_CAP_MCE:
2713                 r = KVM_MAX_MCE_BANKS;
2714                 break;
2715         case KVM_CAP_XCRS:
2716                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2717                 break;
2718         case KVM_CAP_TSC_CONTROL:
2719                 r = kvm_has_tsc_control;
2720                 break;
2721         case KVM_CAP_X2APIC_API:
2722                 r = KVM_X2APIC_API_VALID_FLAGS;
2723                 break;
2724         default:
2725                 r = 0;
2726                 break;
2727         }
2728         return r;
2729
2730 }
2731
2732 long kvm_arch_dev_ioctl(struct file *filp,
2733                         unsigned int ioctl, unsigned long arg)
2734 {
2735         void __user *argp = (void __user *)arg;
2736         long r;
2737
2738         switch (ioctl) {
2739         case KVM_GET_MSR_INDEX_LIST: {
2740                 struct kvm_msr_list __user *user_msr_list = argp;
2741                 struct kvm_msr_list msr_list;
2742                 unsigned n;
2743
2744                 r = -EFAULT;
2745                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2746                         goto out;
2747                 n = msr_list.nmsrs;
2748                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2749                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2750                         goto out;
2751                 r = -E2BIG;
2752                 if (n < msr_list.nmsrs)
2753                         goto out;
2754                 r = -EFAULT;
2755                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2756                                  num_msrs_to_save * sizeof(u32)))
2757                         goto out;
2758                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2759                                  &emulated_msrs,
2760                                  num_emulated_msrs * sizeof(u32)))
2761                         goto out;
2762                 r = 0;
2763                 break;
2764         }
2765         case KVM_GET_SUPPORTED_CPUID:
2766         case KVM_GET_EMULATED_CPUID: {
2767                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2768                 struct kvm_cpuid2 cpuid;
2769
2770                 r = -EFAULT;
2771                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2772                         goto out;
2773
2774                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2775                                             ioctl);
2776                 if (r)
2777                         goto out;
2778
2779                 r = -EFAULT;
2780                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2781                         goto out;
2782                 r = 0;
2783                 break;
2784         }
2785         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2786                 r = -EFAULT;
2787                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2788                                  sizeof(kvm_mce_cap_supported)))
2789                         goto out;
2790                 r = 0;
2791                 break;
2792         }
2793         default:
2794                 r = -EINVAL;
2795         }
2796 out:
2797         return r;
2798 }
2799
2800 static void wbinvd_ipi(void *garbage)
2801 {
2802         wbinvd();
2803 }
2804
2805 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2806 {
2807         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2808 }
2809
2810 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2811 {
2812         /* Address WBINVD may be executed by guest */
2813         if (need_emulate_wbinvd(vcpu)) {
2814                 if (kvm_x86_ops->has_wbinvd_exit())
2815                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2816                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2817                         smp_call_function_single(vcpu->cpu,
2818                                         wbinvd_ipi, NULL, 1);
2819         }
2820
2821         kvm_x86_ops->vcpu_load(vcpu, cpu);
2822
2823         /* Apply any externally detected TSC adjustments (due to suspend) */
2824         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2825                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2826                 vcpu->arch.tsc_offset_adjustment = 0;
2827                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2828         }
2829
2830         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2831                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2832                                 rdtsc() - vcpu->arch.last_host_tsc;
2833                 if (tsc_delta < 0)
2834                         mark_tsc_unstable("KVM discovered backwards TSC");
2835
2836                 if (check_tsc_unstable()) {
2837                         u64 offset = kvm_compute_tsc_offset(vcpu,
2838                                                 vcpu->arch.last_guest_tsc);
2839                         kvm_vcpu_write_tsc_offset(vcpu, offset);
2840                         vcpu->arch.tsc_catchup = 1;
2841                 }
2842
2843                 if (kvm_lapic_hv_timer_in_use(vcpu))
2844                         kvm_lapic_restart_hv_timer(vcpu);
2845
2846                 /*
2847                  * On a host with synchronized TSC, there is no need to update
2848                  * kvmclock on vcpu->cpu migration
2849                  */
2850                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2851                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2852                 if (vcpu->cpu != cpu)
2853                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
2854                 vcpu->cpu = cpu;
2855         }
2856
2857         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2858 }
2859
2860 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
2861 {
2862         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2863                 return;
2864
2865         vcpu->arch.st.steal.preempted = 1;
2866
2867         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2868                         &vcpu->arch.st.steal.preempted,
2869                         offsetof(struct kvm_steal_time, preempted),
2870                         sizeof(vcpu->arch.st.steal.preempted));
2871 }
2872
2873 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2874 {
2875         int idx;
2876
2877         if (vcpu->preempted)
2878                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
2879
2880         /*
2881          * Disable page faults because we're in atomic context here.
2882          * kvm_write_guest_offset_cached() would call might_fault()
2883          * that relies on pagefault_disable() to tell if there's a
2884          * bug. NOTE: the write to guest memory may not go through if
2885          * during postcopy live migration or if there's heavy guest
2886          * paging.
2887          */
2888         pagefault_disable();
2889         /*
2890          * kvm_memslots() will be called by
2891          * kvm_write_guest_offset_cached() so take the srcu lock.
2892          */
2893         idx = srcu_read_lock(&vcpu->kvm->srcu);
2894         kvm_steal_time_set_preempted(vcpu);
2895         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2896         pagefault_enable();
2897         kvm_x86_ops->vcpu_put(vcpu);
2898         kvm_put_guest_fpu(vcpu);
2899         vcpu->arch.last_host_tsc = rdtsc();
2900 }
2901
2902 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2903                                     struct kvm_lapic_state *s)
2904 {
2905         if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2906                 kvm_x86_ops->sync_pir_to_irr(vcpu);
2907
2908         return kvm_apic_get_state(vcpu, s);
2909 }
2910
2911 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2912                                     struct kvm_lapic_state *s)
2913 {
2914         int r;
2915
2916         r = kvm_apic_set_state(vcpu, s);
2917         if (r)
2918                 return r;
2919         update_cr8_intercept(vcpu);
2920
2921         return 0;
2922 }
2923
2924 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2925 {
2926         return (!lapic_in_kernel(vcpu) ||
2927                 kvm_apic_accept_pic_intr(vcpu));
2928 }
2929
2930 /*
2931  * if userspace requested an interrupt window, check that the
2932  * interrupt window is open.
2933  *
2934  * No need to exit to userspace if we already have an interrupt queued.
2935  */
2936 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2937 {
2938         return kvm_arch_interrupt_allowed(vcpu) &&
2939                 !kvm_cpu_has_interrupt(vcpu) &&
2940                 !kvm_event_needs_reinjection(vcpu) &&
2941                 kvm_cpu_accept_dm_intr(vcpu);
2942 }
2943
2944 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2945                                     struct kvm_interrupt *irq)
2946 {
2947         if (irq->irq >= KVM_NR_INTERRUPTS)
2948                 return -EINVAL;
2949
2950         if (!irqchip_in_kernel(vcpu->kvm)) {
2951                 kvm_queue_interrupt(vcpu, irq->irq, false);
2952                 kvm_make_request(KVM_REQ_EVENT, vcpu);
2953                 return 0;
2954         }
2955
2956         /*
2957          * With in-kernel LAPIC, we only use this to inject EXTINT, so
2958          * fail for in-kernel 8259.
2959          */
2960         if (pic_in_kernel(vcpu->kvm))
2961                 return -ENXIO;
2962
2963         if (vcpu->arch.pending_external_vector != -1)
2964                 return -EEXIST;
2965
2966         vcpu->arch.pending_external_vector = irq->irq;
2967         kvm_make_request(KVM_REQ_EVENT, vcpu);
2968         return 0;
2969 }
2970
2971 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2972 {
2973         kvm_inject_nmi(vcpu);
2974
2975         return 0;
2976 }
2977
2978 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2979 {
2980         kvm_make_request(KVM_REQ_SMI, vcpu);
2981
2982         return 0;
2983 }
2984
2985 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2986                                            struct kvm_tpr_access_ctl *tac)
2987 {
2988         if (tac->flags)
2989                 return -EINVAL;
2990         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2991         return 0;
2992 }
2993
2994 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2995                                         u64 mcg_cap)
2996 {
2997         int r;
2998         unsigned bank_num = mcg_cap & 0xff, bank;
2999
3000         r = -EINVAL;
3001         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3002                 goto out;
3003         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3004                 goto out;
3005         r = 0;
3006         vcpu->arch.mcg_cap = mcg_cap;
3007         /* Init IA32_MCG_CTL to all 1s */
3008         if (mcg_cap & MCG_CTL_P)
3009                 vcpu->arch.mcg_ctl = ~(u64)0;
3010         /* Init IA32_MCi_CTL to all 1s */
3011         for (bank = 0; bank < bank_num; bank++)
3012                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3013
3014         if (kvm_x86_ops->setup_mce)
3015                 kvm_x86_ops->setup_mce(vcpu);
3016 out:
3017         return r;
3018 }
3019
3020 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3021                                       struct kvm_x86_mce *mce)
3022 {
3023         u64 mcg_cap = vcpu->arch.mcg_cap;
3024         unsigned bank_num = mcg_cap & 0xff;
3025         u64 *banks = vcpu->arch.mce_banks;
3026
3027         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3028                 return -EINVAL;
3029         /*
3030          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3031          * reporting is disabled
3032          */
3033         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3034             vcpu->arch.mcg_ctl != ~(u64)0)
3035                 return 0;
3036         banks += 4 * mce->bank;
3037         /*
3038          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3039          * reporting is disabled for the bank
3040          */
3041         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3042                 return 0;
3043         if (mce->status & MCI_STATUS_UC) {
3044                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3045                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3046                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3047                         return 0;
3048                 }
3049                 if (banks[1] & MCI_STATUS_VAL)
3050                         mce->status |= MCI_STATUS_OVER;
3051                 banks[2] = mce->addr;
3052                 banks[3] = mce->misc;
3053                 vcpu->arch.mcg_status = mce->mcg_status;
3054                 banks[1] = mce->status;
3055                 kvm_queue_exception(vcpu, MC_VECTOR);
3056         } else if (!(banks[1] & MCI_STATUS_VAL)
3057                    || !(banks[1] & MCI_STATUS_UC)) {
3058                 if (banks[1] & MCI_STATUS_VAL)
3059                         mce->status |= MCI_STATUS_OVER;
3060                 banks[2] = mce->addr;
3061                 banks[3] = mce->misc;
3062                 banks[1] = mce->status;
3063         } else
3064                 banks[1] |= MCI_STATUS_OVER;
3065         return 0;
3066 }
3067
3068 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3069                                                struct kvm_vcpu_events *events)
3070 {
3071         process_nmi(vcpu);
3072         events->exception.injected =
3073                 vcpu->arch.exception.pending &&
3074                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3075         events->exception.nr = vcpu->arch.exception.nr;
3076         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3077         events->exception.pad = 0;
3078         events->exception.error_code = vcpu->arch.exception.error_code;
3079
3080         events->interrupt.injected =
3081                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3082         events->interrupt.nr = vcpu->arch.interrupt.nr;
3083         events->interrupt.soft = 0;
3084         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3085
3086         events->nmi.injected = vcpu->arch.nmi_injected;
3087         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3088         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3089         events->nmi.pad = 0;
3090
3091         events->sipi_vector = 0; /* never valid when reporting to user space */
3092
3093         events->smi.smm = is_smm(vcpu);
3094         events->smi.pending = vcpu->arch.smi_pending;
3095         events->smi.smm_inside_nmi =
3096                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3097         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3098
3099         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3100                          | KVM_VCPUEVENT_VALID_SHADOW
3101                          | KVM_VCPUEVENT_VALID_SMM);
3102         memset(&events->reserved, 0, sizeof(events->reserved));
3103 }
3104
3105 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3106
3107 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3108                                               struct kvm_vcpu_events *events)
3109 {
3110         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3111                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3112                               | KVM_VCPUEVENT_VALID_SHADOW
3113                               | KVM_VCPUEVENT_VALID_SMM))
3114                 return -EINVAL;
3115
3116         if (events->exception.injected &&
3117             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3118              is_guest_mode(vcpu)))
3119                 return -EINVAL;
3120
3121         /* INITs are latched while in SMM */
3122         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3123             (events->smi.smm || events->smi.pending) &&
3124             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3125                 return -EINVAL;
3126
3127         process_nmi(vcpu);
3128         vcpu->arch.exception.pending = events->exception.injected;
3129         vcpu->arch.exception.nr = events->exception.nr;
3130         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3131         vcpu->arch.exception.error_code = events->exception.error_code;
3132
3133         vcpu->arch.interrupt.pending = events->interrupt.injected;
3134         vcpu->arch.interrupt.nr = events->interrupt.nr;
3135         vcpu->arch.interrupt.soft = events->interrupt.soft;
3136         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3137                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3138                                                   events->interrupt.shadow);
3139
3140         vcpu->arch.nmi_injected = events->nmi.injected;
3141         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3142                 vcpu->arch.nmi_pending = events->nmi.pending;
3143         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3144
3145         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3146             lapic_in_kernel(vcpu))
3147                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3148
3149         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3150                 u32 hflags = vcpu->arch.hflags;
3151                 if (events->smi.smm)
3152                         hflags |= HF_SMM_MASK;
3153                 else
3154                         hflags &= ~HF_SMM_MASK;
3155                 kvm_set_hflags(vcpu, hflags);
3156
3157                 vcpu->arch.smi_pending = events->smi.pending;
3158
3159                 if (events->smi.smm) {
3160                         if (events->smi.smm_inside_nmi)
3161                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3162                         else
3163                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3164                         if (lapic_in_kernel(vcpu)) {
3165                                 if (events->smi.latched_init)
3166                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3167                                 else
3168                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3169                         }
3170                 }
3171         }
3172
3173         kvm_make_request(KVM_REQ_EVENT, vcpu);
3174
3175         return 0;
3176 }
3177
3178 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3179                                              struct kvm_debugregs *dbgregs)
3180 {
3181         unsigned long val;
3182
3183         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3184         kvm_get_dr(vcpu, 6, &val);
3185         dbgregs->dr6 = val;
3186         dbgregs->dr7 = vcpu->arch.dr7;
3187         dbgregs->flags = 0;
3188         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3189 }
3190
3191 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3192                                             struct kvm_debugregs *dbgregs)
3193 {
3194         if (dbgregs->flags)
3195                 return -EINVAL;
3196
3197         if (dbgregs->dr6 & ~0xffffffffull)
3198                 return -EINVAL;
3199         if (dbgregs->dr7 & ~0xffffffffull)
3200                 return -EINVAL;
3201
3202         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3203         kvm_update_dr0123(vcpu);
3204         vcpu->arch.dr6 = dbgregs->dr6;
3205         kvm_update_dr6(vcpu);
3206         vcpu->arch.dr7 = dbgregs->dr7;
3207         kvm_update_dr7(vcpu);
3208
3209         return 0;
3210 }
3211
3212 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3213
3214 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3215 {
3216         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3217         u64 xstate_bv = xsave->header.xfeatures;
3218         u64 valid;
3219
3220         /*
3221          * Copy legacy XSAVE area, to avoid complications with CPUID
3222          * leaves 0 and 1 in the loop below.
3223          */
3224         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3225
3226         /* Set XSTATE_BV */
3227         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3228         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3229
3230         /*
3231          * Copy each region from the possibly compacted offset to the
3232          * non-compacted offset.
3233          */
3234         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3235         while (valid) {
3236                 u64 feature = valid & -valid;
3237                 int index = fls64(feature) - 1;
3238                 void *src = get_xsave_addr(xsave, feature);
3239
3240                 if (src) {
3241                         u32 size, offset, ecx, edx;
3242                         cpuid_count(XSTATE_CPUID, index,
3243                                     &size, &offset, &ecx, &edx);
3244                         memcpy(dest + offset, src, size);
3245                 }
3246
3247                 valid -= feature;
3248         }
3249 }
3250
3251 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3252 {
3253         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3254         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3255         u64 valid;
3256
3257         /*
3258          * Copy legacy XSAVE area, to avoid complications with CPUID
3259          * leaves 0 and 1 in the loop below.
3260          */
3261         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3262
3263         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3264         xsave->header.xfeatures = xstate_bv;
3265         if (boot_cpu_has(X86_FEATURE_XSAVES))
3266                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3267
3268         /*
3269          * Copy each region from the non-compacted offset to the
3270          * possibly compacted offset.
3271          */
3272         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3273         while (valid) {
3274                 u64 feature = valid & -valid;
3275                 int index = fls64(feature) - 1;
3276                 void *dest = get_xsave_addr(xsave, feature);
3277
3278                 if (dest) {
3279                         u32 size, offset, ecx, edx;
3280                         cpuid_count(XSTATE_CPUID, index,
3281                                     &size, &offset, &ecx, &edx);
3282                         memcpy(dest, src + offset, size);
3283                 }
3284
3285                 valid -= feature;
3286         }
3287 }
3288
3289 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3290                                          struct kvm_xsave *guest_xsave)
3291 {
3292         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3293                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3294                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3295         } else {
3296                 memcpy(guest_xsave->region,
3297                         &vcpu->arch.guest_fpu.state.fxsave,
3298                         sizeof(struct fxregs_state));
3299                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3300                         XFEATURE_MASK_FPSSE;
3301         }
3302 }
3303
3304 #define XSAVE_MXCSR_OFFSET 24
3305
3306 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3307                                         struct kvm_xsave *guest_xsave)
3308 {
3309         u64 xstate_bv =
3310                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3311         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3312
3313         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3314                 /*
3315                  * Here we allow setting states that are not present in
3316                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3317                  * with old userspace.
3318                  */
3319                 if (xstate_bv & ~kvm_supported_xcr0() ||
3320                         mxcsr & ~mxcsr_feature_mask)
3321                         return -EINVAL;
3322                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3323         } else {
3324                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3325                         mxcsr & ~mxcsr_feature_mask)
3326                         return -EINVAL;
3327                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3328                         guest_xsave->region, sizeof(struct fxregs_state));
3329         }
3330         return 0;
3331 }
3332
3333 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3334                                         struct kvm_xcrs *guest_xcrs)
3335 {
3336         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3337                 guest_xcrs->nr_xcrs = 0;
3338                 return;
3339         }
3340
3341         guest_xcrs->nr_xcrs = 1;
3342         guest_xcrs->flags = 0;
3343         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3344         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3345 }
3346
3347 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3348                                        struct kvm_xcrs *guest_xcrs)
3349 {
3350         int i, r = 0;
3351
3352         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3353                 return -EINVAL;
3354
3355         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3356                 return -EINVAL;
3357
3358         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3359                 /* Only support XCR0 currently */
3360                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3361                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3362                                 guest_xcrs->xcrs[i].value);
3363                         break;
3364                 }
3365         if (r)
3366                 r = -EINVAL;
3367         return r;
3368 }
3369
3370 /*
3371  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3372  * stopped by the hypervisor.  This function will be called from the host only.
3373  * EINVAL is returned when the host attempts to set the flag for a guest that
3374  * does not support pv clocks.
3375  */
3376 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3377 {
3378         if (!vcpu->arch.pv_time_enabled)
3379                 return -EINVAL;
3380         vcpu->arch.pvclock_set_guest_stopped_request = true;
3381         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3382         return 0;
3383 }
3384
3385 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3386                                      struct kvm_enable_cap *cap)
3387 {
3388         if (cap->flags)
3389                 return -EINVAL;
3390
3391         switch (cap->cap) {
3392         case KVM_CAP_HYPERV_SYNIC2:
3393                 if (cap->args[0])
3394                         return -EINVAL;
3395         case KVM_CAP_HYPERV_SYNIC:
3396                 if (!irqchip_in_kernel(vcpu->kvm))
3397                         return -EINVAL;
3398                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3399                                              KVM_CAP_HYPERV_SYNIC2);
3400         default:
3401                 return -EINVAL;
3402         }
3403 }
3404
3405 long kvm_arch_vcpu_ioctl(struct file *filp,
3406                          unsigned int ioctl, unsigned long arg)
3407 {
3408         struct kvm_vcpu *vcpu = filp->private_data;
3409         void __user *argp = (void __user *)arg;
3410         int r;
3411         union {
3412                 struct kvm_lapic_state *lapic;
3413                 struct kvm_xsave *xsave;
3414                 struct kvm_xcrs *xcrs;
3415                 void *buffer;
3416         } u;
3417
3418         u.buffer = NULL;
3419         switch (ioctl) {
3420         case KVM_GET_LAPIC: {
3421                 r = -EINVAL;
3422                 if (!lapic_in_kernel(vcpu))
3423                         goto out;
3424                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3425
3426                 r = -ENOMEM;
3427                 if (!u.lapic)
3428                         goto out;
3429                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3430                 if (r)
3431                         goto out;
3432                 r = -EFAULT;
3433                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3434                         goto out;
3435                 r = 0;
3436                 break;
3437         }
3438         case KVM_SET_LAPIC: {
3439                 r = -EINVAL;
3440                 if (!lapic_in_kernel(vcpu))
3441                         goto out;
3442                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3443                 if (IS_ERR(u.lapic))
3444                         return PTR_ERR(u.lapic);
3445
3446                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3447                 break;
3448         }
3449         case KVM_INTERRUPT: {
3450                 struct kvm_interrupt irq;
3451
3452                 r = -EFAULT;
3453                 if (copy_from_user(&irq, argp, sizeof irq))
3454                         goto out;
3455                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3456                 break;
3457         }
3458         case KVM_NMI: {
3459                 r = kvm_vcpu_ioctl_nmi(vcpu);
3460                 break;
3461         }
3462         case KVM_SMI: {
3463                 r = kvm_vcpu_ioctl_smi(vcpu);
3464                 break;
3465         }
3466         case KVM_SET_CPUID: {
3467                 struct kvm_cpuid __user *cpuid_arg = argp;
3468                 struct kvm_cpuid cpuid;
3469
3470                 r = -EFAULT;
3471                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3472                         goto out;
3473                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3474                 break;
3475         }
3476         case KVM_SET_CPUID2: {
3477                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3478                 struct kvm_cpuid2 cpuid;
3479
3480                 r = -EFAULT;
3481                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3482                         goto out;
3483                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3484                                               cpuid_arg->entries);
3485                 break;
3486         }
3487         case KVM_GET_CPUID2: {
3488                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3489                 struct kvm_cpuid2 cpuid;
3490
3491                 r = -EFAULT;
3492                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3493                         goto out;
3494                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3495                                               cpuid_arg->entries);
3496                 if (r)
3497                         goto out;
3498                 r = -EFAULT;
3499                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3500                         goto out;
3501                 r = 0;
3502                 break;
3503         }
3504         case KVM_GET_MSRS:
3505                 r = msr_io(vcpu, argp, do_get_msr, 1);
3506                 break;
3507         case KVM_SET_MSRS:
3508                 r = msr_io(vcpu, argp, do_set_msr, 0);
3509                 break;
3510         case KVM_TPR_ACCESS_REPORTING: {
3511                 struct kvm_tpr_access_ctl tac;
3512
3513                 r = -EFAULT;
3514                 if (copy_from_user(&tac, argp, sizeof tac))
3515                         goto out;
3516                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3517                 if (r)
3518                         goto out;
3519                 r = -EFAULT;
3520                 if (copy_to_user(argp, &tac, sizeof tac))
3521                         goto out;
3522                 r = 0;
3523                 break;
3524         };
3525         case KVM_SET_VAPIC_ADDR: {
3526                 struct kvm_vapic_addr va;
3527                 int idx;
3528
3529                 r = -EINVAL;
3530                 if (!lapic_in_kernel(vcpu))
3531                         goto out;
3532                 r = -EFAULT;
3533                 if (copy_from_user(&va, argp, sizeof va))
3534                         goto out;
3535                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3536                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3537                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3538                 break;
3539         }
3540         case KVM_X86_SETUP_MCE: {
3541                 u64 mcg_cap;
3542
3543                 r = -EFAULT;
3544                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3545                         goto out;
3546                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3547                 break;
3548         }
3549         case KVM_X86_SET_MCE: {
3550                 struct kvm_x86_mce mce;
3551
3552                 r = -EFAULT;
3553                 if (copy_from_user(&mce, argp, sizeof mce))
3554                         goto out;
3555                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3556                 break;
3557         }
3558         case KVM_GET_VCPU_EVENTS: {
3559                 struct kvm_vcpu_events events;
3560
3561                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3562
3563                 r = -EFAULT;
3564                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3565                         break;
3566                 r = 0;
3567                 break;
3568         }
3569         case KVM_SET_VCPU_EVENTS: {
3570                 struct kvm_vcpu_events events;
3571
3572                 r = -EFAULT;
3573                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3574                         break;
3575
3576                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3577                 break;
3578         }
3579         case KVM_GET_DEBUGREGS: {
3580                 struct kvm_debugregs dbgregs;
3581
3582                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3583
3584                 r = -EFAULT;
3585                 if (copy_to_user(argp, &dbgregs,
3586                                  sizeof(struct kvm_debugregs)))
3587                         break;
3588                 r = 0;
3589                 break;
3590         }
3591         case KVM_SET_DEBUGREGS: {
3592                 struct kvm_debugregs dbgregs;
3593
3594                 r = -EFAULT;
3595                 if (copy_from_user(&dbgregs, argp,
3596                                    sizeof(struct kvm_debugregs)))
3597                         break;
3598
3599                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3600                 break;
3601         }
3602         case KVM_GET_XSAVE: {
3603                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3604                 r = -ENOMEM;
3605                 if (!u.xsave)
3606                         break;
3607
3608                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3609
3610                 r = -EFAULT;
3611                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3612                         break;
3613                 r = 0;
3614                 break;
3615         }
3616         case KVM_SET_XSAVE: {
3617                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3618                 if (IS_ERR(u.xsave))
3619                         return PTR_ERR(u.xsave);
3620
3621                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3622                 break;
3623         }
3624         case KVM_GET_XCRS: {
3625                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3626                 r = -ENOMEM;
3627                 if (!u.xcrs)
3628                         break;
3629
3630                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3631
3632                 r = -EFAULT;
3633                 if (copy_to_user(argp, u.xcrs,
3634                                  sizeof(struct kvm_xcrs)))
3635                         break;
3636                 r = 0;
3637                 break;
3638         }
3639         case KVM_SET_XCRS: {
3640                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3641                 if (IS_ERR(u.xcrs))
3642                         return PTR_ERR(u.xcrs);
3643
3644                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3645                 break;
3646         }
3647         case KVM_SET_TSC_KHZ: {
3648                 u32 user_tsc_khz;
3649
3650                 r = -EINVAL;
3651                 user_tsc_khz = (u32)arg;
3652
3653                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3654                         goto out;
3655
3656                 if (user_tsc_khz == 0)
3657                         user_tsc_khz = tsc_khz;
3658
3659                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3660                         r = 0;
3661
3662                 goto out;
3663         }
3664         case KVM_GET_TSC_KHZ: {
3665                 r = vcpu->arch.virtual_tsc_khz;
3666                 goto out;
3667         }
3668         case KVM_KVMCLOCK_CTRL: {
3669                 r = kvm_set_guest_paused(vcpu);
3670                 goto out;
3671         }
3672         case KVM_ENABLE_CAP: {
3673                 struct kvm_enable_cap cap;
3674
3675                 r = -EFAULT;
3676                 if (copy_from_user(&cap, argp, sizeof(cap)))
3677                         goto out;
3678                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3679                 break;
3680         }
3681         default:
3682                 r = -EINVAL;
3683         }
3684 out:
3685         kfree(u.buffer);
3686         return r;
3687 }
3688
3689 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3690 {
3691         return VM_FAULT_SIGBUS;
3692 }
3693
3694 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3695 {
3696         int ret;
3697
3698         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3699                 return -EINVAL;
3700         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3701         return ret;
3702 }
3703
3704 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3705                                               u64 ident_addr)
3706 {
3707         kvm->arch.ept_identity_map_addr = ident_addr;
3708         return 0;
3709 }
3710
3711 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3712                                           u32 kvm_nr_mmu_pages)
3713 {
3714         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3715                 return -EINVAL;
3716
3717         mutex_lock(&kvm->slots_lock);
3718
3719         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3720         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3721
3722         mutex_unlock(&kvm->slots_lock);
3723         return 0;
3724 }
3725
3726 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3727 {
3728         return kvm->arch.n_max_mmu_pages;
3729 }
3730
3731 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3732 {
3733         struct kvm_pic *pic = kvm->arch.vpic;
3734         int r;
3735
3736         r = 0;
3737         switch (chip->chip_id) {
3738         case KVM_IRQCHIP_PIC_MASTER:
3739                 memcpy(&chip->chip.pic, &pic->pics[0],
3740                         sizeof(struct kvm_pic_state));
3741                 break;
3742         case KVM_IRQCHIP_PIC_SLAVE:
3743                 memcpy(&chip->chip.pic, &pic->pics[1],
3744                         sizeof(struct kvm_pic_state));
3745                 break;
3746         case KVM_IRQCHIP_IOAPIC:
3747                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
3748                 break;
3749         default:
3750                 r = -EINVAL;
3751                 break;
3752         }
3753         return r;
3754 }
3755
3756 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3757 {
3758         struct kvm_pic *pic = kvm->arch.vpic;
3759         int r;
3760
3761         r = 0;
3762         switch (chip->chip_id) {
3763         case KVM_IRQCHIP_PIC_MASTER:
3764                 spin_lock(&pic->lock);
3765                 memcpy(&pic->pics[0], &chip->chip.pic,
3766                         sizeof(struct kvm_pic_state));
3767                 spin_unlock(&pic->lock);
3768                 break;
3769         case KVM_IRQCHIP_PIC_SLAVE:
3770                 spin_lock(&pic->lock);
3771                 memcpy(&pic->pics[1], &chip->chip.pic,
3772                         sizeof(struct kvm_pic_state));
3773                 spin_unlock(&pic->lock);
3774                 break;
3775         case KVM_IRQCHIP_IOAPIC:
3776                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
3777                 break;
3778         default:
3779                 r = -EINVAL;
3780                 break;
3781         }
3782         kvm_pic_update_irq(pic);
3783         return r;
3784 }
3785
3786 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3787 {
3788         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
3789
3790         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
3791
3792         mutex_lock(&kps->lock);
3793         memcpy(ps, &kps->channels, sizeof(*ps));
3794         mutex_unlock(&kps->lock);
3795         return 0;
3796 }
3797
3798 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3799 {
3800         int i;
3801         struct kvm_pit *pit = kvm->arch.vpit;
3802
3803         mutex_lock(&pit->pit_state.lock);
3804         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3805         for (i = 0; i < 3; i++)
3806                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
3807         mutex_unlock(&pit->pit_state.lock);
3808         return 0;
3809 }
3810
3811 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3812 {
3813         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3814         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3815                 sizeof(ps->channels));
3816         ps->flags = kvm->arch.vpit->pit_state.flags;
3817         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3818         memset(&ps->reserved, 0, sizeof(ps->reserved));
3819         return 0;
3820 }
3821
3822 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3823 {
3824         int start = 0;
3825         int i;
3826         u32 prev_legacy, cur_legacy;
3827         struct kvm_pit *pit = kvm->arch.vpit;
3828
3829         mutex_lock(&pit->pit_state.lock);
3830         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3831         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3832         if (!prev_legacy && cur_legacy)
3833                 start = 1;
3834         memcpy(&pit->pit_state.channels, &ps->channels,
3835                sizeof(pit->pit_state.channels));
3836         pit->pit_state.flags = ps->flags;
3837         for (i = 0; i < 3; i++)
3838                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3839                                    start && i == 0);
3840         mutex_unlock(&pit->pit_state.lock);
3841         return 0;
3842 }
3843
3844 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3845                                  struct kvm_reinject_control *control)
3846 {
3847         struct kvm_pit *pit = kvm->arch.vpit;
3848
3849         if (!pit)
3850                 return -ENXIO;
3851
3852         /* pit->pit_state.lock was overloaded to prevent userspace from getting
3853          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3854          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
3855          */
3856         mutex_lock(&pit->pit_state.lock);
3857         kvm_pit_set_reinject(pit, control->pit_reinject);
3858         mutex_unlock(&pit->pit_state.lock);
3859
3860         return 0;
3861 }
3862
3863 /**
3864  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3865  * @kvm: kvm instance
3866  * @log: slot id and address to which we copy the log
3867  *
3868  * Steps 1-4 below provide general overview of dirty page logging. See
3869  * kvm_get_dirty_log_protect() function description for additional details.
3870  *
3871  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3872  * always flush the TLB (step 4) even if previous step failed  and the dirty
3873  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3874  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3875  * writes will be marked dirty for next log read.
3876  *
3877  *   1. Take a snapshot of the bit and clear it if needed.
3878  *   2. Write protect the corresponding page.
3879  *   3. Copy the snapshot to the userspace.
3880  *   4. Flush TLB's if needed.
3881  */
3882 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3883 {
3884         bool is_dirty = false;
3885         int r;
3886
3887         mutex_lock(&kvm->slots_lock);
3888
3889         /*
3890          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3891          */
3892         if (kvm_x86_ops->flush_log_dirty)
3893                 kvm_x86_ops->flush_log_dirty(kvm);
3894
3895         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3896
3897         /*
3898          * All the TLBs can be flushed out of mmu lock, see the comments in
3899          * kvm_mmu_slot_remove_write_access().
3900          */
3901         lockdep_assert_held(&kvm->slots_lock);
3902         if (is_dirty)
3903                 kvm_flush_remote_tlbs(kvm);
3904
3905         mutex_unlock(&kvm->slots_lock);
3906         return r;
3907 }
3908
3909 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3910                         bool line_status)
3911 {
3912         if (!irqchip_in_kernel(kvm))
3913                 return -ENXIO;
3914
3915         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3916                                         irq_event->irq, irq_event->level,
3917                                         line_status);
3918         return 0;
3919 }
3920
3921 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3922                                    struct kvm_enable_cap *cap)
3923 {
3924         int r;
3925
3926         if (cap->flags)
3927                 return -EINVAL;
3928
3929         switch (cap->cap) {
3930         case KVM_CAP_DISABLE_QUIRKS:
3931                 kvm->arch.disabled_quirks = cap->args[0];
3932                 r = 0;
3933                 break;
3934         case KVM_CAP_SPLIT_IRQCHIP: {
3935                 mutex_lock(&kvm->lock);
3936                 r = -EINVAL;
3937                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
3938                         goto split_irqchip_unlock;
3939                 r = -EEXIST;
3940                 if (irqchip_in_kernel(kvm))
3941                         goto split_irqchip_unlock;
3942                 if (kvm->created_vcpus)
3943                         goto split_irqchip_unlock;
3944                 r = kvm_setup_empty_irq_routing(kvm);
3945                 if (r)
3946                         goto split_irqchip_unlock;
3947                 /* Pairs with irqchip_in_kernel. */
3948                 smp_wmb();
3949                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
3950                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3951                 r = 0;
3952 split_irqchip_unlock:
3953                 mutex_unlock(&kvm->lock);
3954                 break;
3955         }
3956         case KVM_CAP_X2APIC_API:
3957                 r = -EINVAL;
3958                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
3959                         break;
3960
3961                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
3962                         kvm->arch.x2apic_format = true;
3963                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
3964                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
3965
3966                 r = 0;
3967                 break;
3968         default:
3969                 r = -EINVAL;
3970                 break;
3971         }
3972         return r;
3973 }
3974
3975 long kvm_arch_vm_ioctl(struct file *filp,
3976                        unsigned int ioctl, unsigned long arg)
3977 {
3978         struct kvm *kvm = filp->private_data;
3979         void __user *argp = (void __user *)arg;
3980         int r = -ENOTTY;
3981         /*
3982          * This union makes it completely explicit to gcc-3.x
3983          * that these two variables' stack usage should be
3984          * combined, not added together.
3985          */
3986         union {
3987                 struct kvm_pit_state ps;
3988                 struct kvm_pit_state2 ps2;
3989                 struct kvm_pit_config pit_config;
3990         } u;
3991
3992         switch (ioctl) {
3993         case KVM_SET_TSS_ADDR:
3994                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3995                 break;
3996         case KVM_SET_IDENTITY_MAP_ADDR: {
3997                 u64 ident_addr;
3998
3999                 r = -EFAULT;
4000                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4001                         goto out;
4002                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4003                 break;
4004         }
4005         case KVM_SET_NR_MMU_PAGES:
4006                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4007                 break;
4008         case KVM_GET_NR_MMU_PAGES:
4009                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4010                 break;
4011         case KVM_CREATE_IRQCHIP: {
4012                 mutex_lock(&kvm->lock);
4013
4014                 r = -EEXIST;
4015                 if (irqchip_in_kernel(kvm))
4016                         goto create_irqchip_unlock;
4017
4018                 r = -EINVAL;
4019                 if (kvm->created_vcpus)
4020                         goto create_irqchip_unlock;
4021
4022                 r = kvm_pic_init(kvm);
4023                 if (r)
4024                         goto create_irqchip_unlock;
4025
4026                 r = kvm_ioapic_init(kvm);
4027                 if (r) {
4028                         kvm_pic_destroy(kvm);
4029                         goto create_irqchip_unlock;
4030                 }
4031
4032                 r = kvm_setup_default_irq_routing(kvm);
4033                 if (r) {
4034                         kvm_ioapic_destroy(kvm);
4035                         kvm_pic_destroy(kvm);
4036                         goto create_irqchip_unlock;
4037                 }
4038                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4039                 smp_wmb();
4040                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4041         create_irqchip_unlock:
4042                 mutex_unlock(&kvm->lock);
4043                 break;
4044         }
4045         case KVM_CREATE_PIT:
4046                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4047                 goto create_pit;
4048         case KVM_CREATE_PIT2:
4049                 r = -EFAULT;
4050                 if (copy_from_user(&u.pit_config, argp,
4051                                    sizeof(struct kvm_pit_config)))
4052                         goto out;
4053         create_pit:
4054                 mutex_lock(&kvm->lock);
4055                 r = -EEXIST;
4056                 if (kvm->arch.vpit)
4057                         goto create_pit_unlock;
4058                 r = -ENOMEM;
4059                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4060                 if (kvm->arch.vpit)
4061                         r = 0;
4062         create_pit_unlock:
4063                 mutex_unlock(&kvm->lock);
4064                 break;
4065         case KVM_GET_IRQCHIP: {
4066                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4067                 struct kvm_irqchip *chip;
4068
4069                 chip = memdup_user(argp, sizeof(*chip));
4070                 if (IS_ERR(chip)) {
4071                         r = PTR_ERR(chip);
4072                         goto out;
4073                 }
4074
4075                 r = -ENXIO;
4076                 if (!irqchip_kernel(kvm))
4077                         goto get_irqchip_out;
4078                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4079                 if (r)
4080                         goto get_irqchip_out;
4081                 r = -EFAULT;
4082                 if (copy_to_user(argp, chip, sizeof *chip))
4083                         goto get_irqchip_out;
4084                 r = 0;
4085         get_irqchip_out:
4086                 kfree(chip);
4087                 break;
4088         }
4089         case KVM_SET_IRQCHIP: {
4090                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4091                 struct kvm_irqchip *chip;
4092
4093                 chip = memdup_user(argp, sizeof(*chip));
4094                 if (IS_ERR(chip)) {
4095                         r = PTR_ERR(chip);
4096                         goto out;
4097                 }
4098
4099                 r = -ENXIO;
4100                 if (!irqchip_kernel(kvm))
4101                         goto set_irqchip_out;
4102                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4103                 if (r)
4104                         goto set_irqchip_out;
4105                 r = 0;
4106         set_irqchip_out:
4107                 kfree(chip);
4108                 break;
4109         }
4110         case KVM_GET_PIT: {
4111                 r = -EFAULT;
4112                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4113                         goto out;
4114                 r = -ENXIO;
4115                 if (!kvm->arch.vpit)
4116                         goto out;
4117                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4118                 if (r)
4119                         goto out;
4120                 r = -EFAULT;
4121                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4122                         goto out;
4123                 r = 0;
4124                 break;
4125         }
4126         case KVM_SET_PIT: {
4127                 r = -EFAULT;
4128                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4129                         goto out;
4130                 r = -ENXIO;
4131                 if (!kvm->arch.vpit)
4132                         goto out;
4133                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4134                 break;
4135         }
4136         case KVM_GET_PIT2: {
4137                 r = -ENXIO;
4138                 if (!kvm->arch.vpit)
4139                         goto out;
4140                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4141                 if (r)
4142                         goto out;
4143                 r = -EFAULT;
4144                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4145                         goto out;
4146                 r = 0;
4147                 break;
4148         }
4149         case KVM_SET_PIT2: {
4150                 r = -EFAULT;
4151                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4152                         goto out;
4153                 r = -ENXIO;
4154                 if (!kvm->arch.vpit)
4155                         goto out;
4156                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4157                 break;
4158         }
4159         case KVM_REINJECT_CONTROL: {
4160                 struct kvm_reinject_control control;
4161                 r =  -EFAULT;
4162                 if (copy_from_user(&control, argp, sizeof(control)))
4163                         goto out;
4164                 r = kvm_vm_ioctl_reinject(kvm, &control);
4165                 break;
4166         }
4167         case KVM_SET_BOOT_CPU_ID:
4168                 r = 0;
4169                 mutex_lock(&kvm->lock);
4170                 if (kvm->created_vcpus)
4171                         r = -EBUSY;
4172                 else
4173                         kvm->arch.bsp_vcpu_id = arg;
4174                 mutex_unlock(&kvm->lock);
4175                 break;
4176         case KVM_XEN_HVM_CONFIG: {
4177                 r = -EFAULT;
4178                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
4179                                    sizeof(struct kvm_xen_hvm_config)))
4180                         goto out;
4181                 r = -EINVAL;
4182                 if (kvm->arch.xen_hvm_config.flags)
4183                         goto out;
4184                 r = 0;
4185                 break;
4186         }
4187         case KVM_SET_CLOCK: {
4188                 struct kvm_clock_data user_ns;
4189                 u64 now_ns;
4190
4191                 r = -EFAULT;
4192                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4193                         goto out;
4194
4195                 r = -EINVAL;
4196                 if (user_ns.flags)
4197                         goto out;
4198
4199                 r = 0;
4200                 /*
4201                  * TODO: userspace has to take care of races with VCPU_RUN, so
4202                  * kvm_gen_update_masterclock() can be cut down to locked
4203                  * pvclock_update_vm_gtod_copy().
4204                  */
4205                 kvm_gen_update_masterclock(kvm);
4206                 now_ns = get_kvmclock_ns(kvm);
4207                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4208                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4209                 break;
4210         }
4211         case KVM_GET_CLOCK: {
4212                 struct kvm_clock_data user_ns;
4213                 u64 now_ns;
4214
4215                 now_ns = get_kvmclock_ns(kvm);
4216                 user_ns.clock = now_ns;
4217                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4218                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4219
4220                 r = -EFAULT;
4221                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4222                         goto out;
4223                 r = 0;
4224                 break;
4225         }
4226         case KVM_ENABLE_CAP: {
4227                 struct kvm_enable_cap cap;
4228
4229                 r = -EFAULT;
4230                 if (copy_from_user(&cap, argp, sizeof(cap)))
4231                         goto out;
4232                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4233                 break;
4234         }
4235         default:
4236                 r = -ENOTTY;
4237         }
4238 out:
4239         return r;
4240 }
4241
4242 static void kvm_init_msr_list(void)
4243 {
4244         u32 dummy[2];
4245         unsigned i, j;
4246
4247         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4248                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4249                         continue;
4250
4251                 /*
4252                  * Even MSRs that are valid in the host may not be exposed
4253                  * to the guests in some cases.
4254                  */
4255                 switch (msrs_to_save[i]) {
4256                 case MSR_IA32_BNDCFGS:
4257                         if (!kvm_x86_ops->mpx_supported())
4258                                 continue;
4259                         break;
4260                 case MSR_TSC_AUX:
4261                         if (!kvm_x86_ops->rdtscp_supported())
4262                                 continue;
4263                         break;
4264                 default:
4265                         break;
4266                 }
4267
4268                 if (j < i)
4269                         msrs_to_save[j] = msrs_to_save[i];
4270                 j++;
4271         }
4272         num_msrs_to_save = j;
4273
4274         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4275                 switch (emulated_msrs[i]) {
4276                 case MSR_IA32_SMBASE:
4277                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4278                                 continue;
4279                         break;
4280                 default:
4281                         break;
4282                 }
4283
4284                 if (j < i)
4285                         emulated_msrs[j] = emulated_msrs[i];
4286                 j++;
4287         }
4288         num_emulated_msrs = j;
4289 }
4290
4291 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4292                            const void *v)
4293 {
4294         int handled = 0;
4295         int n;
4296
4297         do {
4298                 n = min(len, 8);
4299                 if (!(lapic_in_kernel(vcpu) &&
4300                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4301                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4302                         break;
4303                 handled += n;
4304                 addr += n;
4305                 len -= n;
4306                 v += n;
4307         } while (len);
4308
4309         return handled;
4310 }
4311
4312 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4313 {
4314         int handled = 0;
4315         int n;
4316
4317         do {
4318                 n = min(len, 8);
4319                 if (!(lapic_in_kernel(vcpu) &&
4320                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4321                                          addr, n, v))
4322                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4323                         break;
4324                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
4325                 handled += n;
4326                 addr += n;
4327                 len -= n;
4328                 v += n;
4329         } while (len);
4330
4331         return handled;
4332 }
4333
4334 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4335                         struct kvm_segment *var, int seg)
4336 {
4337         kvm_x86_ops->set_segment(vcpu, var, seg);
4338 }
4339
4340 void kvm_get_segment(struct kvm_vcpu *vcpu,
4341                      struct kvm_segment *var, int seg)
4342 {
4343         kvm_x86_ops->get_segment(vcpu, var, seg);
4344 }
4345
4346 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4347                            struct x86_exception *exception)
4348 {
4349         gpa_t t_gpa;
4350
4351         BUG_ON(!mmu_is_nested(vcpu));
4352
4353         /* NPT walks are always user-walks */
4354         access |= PFERR_USER_MASK;
4355         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4356
4357         return t_gpa;
4358 }
4359
4360 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4361                               struct x86_exception *exception)
4362 {
4363         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4364         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4365 }
4366
4367  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4368                                 struct x86_exception *exception)
4369 {
4370         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4371         access |= PFERR_FETCH_MASK;
4372         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4373 }
4374
4375 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4376                                struct x86_exception *exception)
4377 {
4378         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4379         access |= PFERR_WRITE_MASK;
4380         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4381 }
4382
4383 /* uses this to access any guest's mapped memory without checking CPL */
4384 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4385                                 struct x86_exception *exception)
4386 {
4387         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4388 }
4389
4390 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4391                                       struct kvm_vcpu *vcpu, u32 access,
4392                                       struct x86_exception *exception)
4393 {
4394         void *data = val;
4395         int r = X86EMUL_CONTINUE;
4396
4397         while (bytes) {
4398                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4399                                                             exception);
4400                 unsigned offset = addr & (PAGE_SIZE-1);
4401                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4402                 int ret;
4403
4404                 if (gpa == UNMAPPED_GVA)
4405                         return X86EMUL_PROPAGATE_FAULT;
4406                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4407                                                offset, toread);
4408                 if (ret < 0) {
4409                         r = X86EMUL_IO_NEEDED;
4410                         goto out;
4411                 }
4412
4413                 bytes -= toread;
4414                 data += toread;
4415                 addr += toread;
4416         }
4417 out:
4418         return r;
4419 }
4420
4421 /* used for instruction fetching */
4422 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4423                                 gva_t addr, void *val, unsigned int bytes,
4424                                 struct x86_exception *exception)
4425 {
4426         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4427         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4428         unsigned offset;
4429         int ret;
4430
4431         /* Inline kvm_read_guest_virt_helper for speed.  */
4432         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4433                                                     exception);
4434         if (unlikely(gpa == UNMAPPED_GVA))
4435                 return X86EMUL_PROPAGATE_FAULT;
4436
4437         offset = addr & (PAGE_SIZE-1);
4438         if (WARN_ON(offset + bytes > PAGE_SIZE))
4439                 bytes = (unsigned)PAGE_SIZE - offset;
4440         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4441                                        offset, bytes);
4442         if (unlikely(ret < 0))
4443                 return X86EMUL_IO_NEEDED;
4444
4445         return X86EMUL_CONTINUE;
4446 }
4447
4448 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4449                                gva_t addr, void *val, unsigned int bytes,
4450                                struct x86_exception *exception)
4451 {
4452         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4453         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4454
4455         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4456                                           exception);
4457 }
4458 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4459
4460 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4461                                       gva_t addr, void *val, unsigned int bytes,
4462                                       struct x86_exception *exception)
4463 {
4464         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4465         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4466 }
4467
4468 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4469                 unsigned long addr, void *val, unsigned int bytes)
4470 {
4471         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4472         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4473
4474         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4475 }
4476
4477 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4478                                        gva_t addr, void *val,
4479                                        unsigned int bytes,
4480                                        struct x86_exception *exception)
4481 {
4482         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4483         void *data = val;
4484         int r = X86EMUL_CONTINUE;
4485
4486         while (bytes) {
4487                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4488                                                              PFERR_WRITE_MASK,
4489                                                              exception);
4490                 unsigned offset = addr & (PAGE_SIZE-1);
4491                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4492                 int ret;
4493
4494                 if (gpa == UNMAPPED_GVA)
4495                         return X86EMUL_PROPAGATE_FAULT;
4496                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4497                 if (ret < 0) {
4498                         r = X86EMUL_IO_NEEDED;
4499                         goto out;
4500                 }
4501
4502                 bytes -= towrite;
4503                 data += towrite;
4504                 addr += towrite;
4505         }
4506 out:
4507         return r;
4508 }
4509 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4510
4511 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4512                             gpa_t gpa, bool write)
4513 {
4514         /* For APIC access vmexit */
4515         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4516                 return 1;
4517
4518         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4519                 trace_vcpu_match_mmio(gva, gpa, write, true);
4520                 return 1;
4521         }
4522
4523         return 0;
4524 }
4525
4526 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4527                                 gpa_t *gpa, struct x86_exception *exception,
4528                                 bool write)
4529 {
4530         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4531                 | (write ? PFERR_WRITE_MASK : 0);
4532
4533         /*
4534          * currently PKRU is only applied to ept enabled guest so
4535          * there is no pkey in EPT page table for L1 guest or EPT
4536          * shadow page table for L2 guest.
4537          */
4538         if (vcpu_match_mmio_gva(vcpu, gva)
4539             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4540                                  vcpu->arch.access, 0, access)) {
4541                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4542                                         (gva & (PAGE_SIZE - 1));
4543                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4544                 return 1;
4545         }
4546
4547         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4548
4549         if (*gpa == UNMAPPED_GVA)
4550                 return -1;
4551
4552         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4553 }
4554
4555 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4556                         const void *val, int bytes)
4557 {
4558         int ret;
4559
4560         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4561         if (ret < 0)
4562                 return 0;
4563         kvm_page_track_write(vcpu, gpa, val, bytes);
4564         return 1;
4565 }
4566
4567 struct read_write_emulator_ops {
4568         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4569                                   int bytes);
4570         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4571                                   void *val, int bytes);
4572         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4573                                int bytes, void *val);
4574         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4575                                     void *val, int bytes);
4576         bool write;
4577 };
4578
4579 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4580 {
4581         if (vcpu->mmio_read_completed) {
4582                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4583                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4584                 vcpu->mmio_read_completed = 0;
4585                 return 1;
4586         }
4587
4588         return 0;
4589 }
4590
4591 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4592                         void *val, int bytes)
4593 {
4594         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4595 }
4596
4597 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4598                          void *val, int bytes)
4599 {
4600         return emulator_write_phys(vcpu, gpa, val, bytes);
4601 }
4602
4603 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4604 {
4605         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4606         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4607 }
4608
4609 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4610                           void *val, int bytes)
4611 {
4612         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4613         return X86EMUL_IO_NEEDED;
4614 }
4615
4616 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4617                            void *val, int bytes)
4618 {
4619         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4620
4621         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4622         return X86EMUL_CONTINUE;
4623 }
4624
4625 static const struct read_write_emulator_ops read_emultor = {
4626         .read_write_prepare = read_prepare,
4627         .read_write_emulate = read_emulate,
4628         .read_write_mmio = vcpu_mmio_read,
4629         .read_write_exit_mmio = read_exit_mmio,
4630 };
4631
4632 static const struct read_write_emulator_ops write_emultor = {
4633         .read_write_emulate = write_emulate,
4634         .read_write_mmio = write_mmio,
4635         .read_write_exit_mmio = write_exit_mmio,
4636         .write = true,
4637 };
4638
4639 static int emulator_read_write_onepage(unsigned long addr, void *val,
4640                                        unsigned int bytes,
4641                                        struct x86_exception *exception,
4642                                        struct kvm_vcpu *vcpu,
4643                                        const struct read_write_emulator_ops *ops)
4644 {
4645         gpa_t gpa;
4646         int handled, ret;
4647         bool write = ops->write;
4648         struct kvm_mmio_fragment *frag;
4649         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4650
4651         /*
4652          * If the exit was due to a NPF we may already have a GPA.
4653          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4654          * Note, this cannot be used on string operations since string
4655          * operation using rep will only have the initial GPA from the NPF
4656          * occurred.
4657          */
4658         if (vcpu->arch.gpa_available &&
4659             emulator_can_use_gpa(ctxt) &&
4660             vcpu_is_mmio_gpa(vcpu, addr, exception->address, write) &&
4661             (addr & ~PAGE_MASK) == (exception->address & ~PAGE_MASK)) {
4662                 gpa = exception->address;
4663                 goto mmio;
4664         }
4665
4666         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4667
4668         if (ret < 0)
4669                 return X86EMUL_PROPAGATE_FAULT;
4670
4671         /* For APIC access vmexit */
4672         if (ret)
4673                 goto mmio;
4674
4675         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4676                 return X86EMUL_CONTINUE;
4677
4678 mmio:
4679         /*
4680          * Is this MMIO handled locally?
4681          */
4682         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4683         if (handled == bytes)
4684                 return X86EMUL_CONTINUE;
4685
4686         gpa += handled;
4687         bytes -= handled;
4688         val += handled;
4689
4690         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4691         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4692         frag->gpa = gpa;
4693         frag->data = val;
4694         frag->len = bytes;
4695         return X86EMUL_CONTINUE;
4696 }
4697
4698 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4699                         unsigned long addr,
4700                         void *val, unsigned int bytes,
4701                         struct x86_exception *exception,
4702                         const struct read_write_emulator_ops *ops)
4703 {
4704         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4705         gpa_t gpa;
4706         int rc;
4707
4708         if (ops->read_write_prepare &&
4709                   ops->read_write_prepare(vcpu, val, bytes))
4710                 return X86EMUL_CONTINUE;
4711
4712         vcpu->mmio_nr_fragments = 0;
4713
4714         /* Crossing a page boundary? */
4715         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4716                 int now;
4717
4718                 now = -addr & ~PAGE_MASK;
4719                 rc = emulator_read_write_onepage(addr, val, now, exception,
4720                                                  vcpu, ops);
4721
4722                 if (rc != X86EMUL_CONTINUE)
4723                         return rc;
4724                 addr += now;
4725                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4726                         addr = (u32)addr;
4727                 val += now;
4728                 bytes -= now;
4729         }
4730
4731         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4732                                          vcpu, ops);
4733         if (rc != X86EMUL_CONTINUE)
4734                 return rc;
4735
4736         if (!vcpu->mmio_nr_fragments)
4737                 return rc;
4738
4739         gpa = vcpu->mmio_fragments[0].gpa;
4740
4741         vcpu->mmio_needed = 1;
4742         vcpu->mmio_cur_fragment = 0;
4743
4744         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4745         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4746         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4747         vcpu->run->mmio.phys_addr = gpa;
4748
4749         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4750 }
4751
4752 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4753                                   unsigned long addr,
4754                                   void *val,
4755                                   unsigned int bytes,
4756                                   struct x86_exception *exception)
4757 {
4758         return emulator_read_write(ctxt, addr, val, bytes,
4759                                    exception, &read_emultor);
4760 }
4761
4762 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4763                             unsigned long addr,
4764                             const void *val,
4765                             unsigned int bytes,
4766                             struct x86_exception *exception)
4767 {
4768         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4769                                    exception, &write_emultor);
4770 }
4771
4772 #define CMPXCHG_TYPE(t, ptr, old, new) \
4773         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4774
4775 #ifdef CONFIG_X86_64
4776 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4777 #else
4778 #  define CMPXCHG64(ptr, old, new) \
4779         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4780 #endif
4781
4782 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4783                                      unsigned long addr,
4784                                      const void *old,
4785                                      const void *new,
4786                                      unsigned int bytes,
4787                                      struct x86_exception *exception)
4788 {
4789         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4790         gpa_t gpa;
4791         struct page *page;
4792         char *kaddr;
4793         bool exchanged;
4794
4795         /* guests cmpxchg8b have to be emulated atomically */
4796         if (bytes > 8 || (bytes & (bytes - 1)))
4797                 goto emul_write;
4798
4799         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4800
4801         if (gpa == UNMAPPED_GVA ||
4802             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4803                 goto emul_write;
4804
4805         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4806                 goto emul_write;
4807
4808         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4809         if (is_error_page(page))
4810                 goto emul_write;
4811
4812         kaddr = kmap_atomic(page);
4813         kaddr += offset_in_page(gpa);
4814         switch (bytes) {
4815         case 1:
4816                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4817                 break;
4818         case 2:
4819                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4820                 break;
4821         case 4:
4822                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4823                 break;
4824         case 8:
4825                 exchanged = CMPXCHG64(kaddr, old, new);
4826                 break;
4827         default:
4828                 BUG();
4829         }
4830         kunmap_atomic(kaddr);
4831         kvm_release_page_dirty(page);
4832
4833         if (!exchanged)
4834                 return X86EMUL_CMPXCHG_FAILED;
4835
4836         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4837         kvm_page_track_write(vcpu, gpa, new, bytes);
4838
4839         return X86EMUL_CONTINUE;
4840
4841 emul_write:
4842         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4843
4844         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4845 }
4846
4847 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4848 {
4849         int r = 0, i;
4850
4851         for (i = 0; i < vcpu->arch.pio.count; i++) {
4852                 if (vcpu->arch.pio.in)
4853                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4854                                             vcpu->arch.pio.size, pd);
4855                 else
4856                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4857                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
4858                                              pd);
4859                 if (r)
4860                         break;
4861                 pd += vcpu->arch.pio.size;
4862         }
4863         return r;
4864 }
4865
4866 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4867                                unsigned short port, void *val,
4868                                unsigned int count, bool in)
4869 {
4870         vcpu->arch.pio.port = port;
4871         vcpu->arch.pio.in = in;
4872         vcpu->arch.pio.count  = count;
4873         vcpu->arch.pio.size = size;
4874
4875         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4876                 vcpu->arch.pio.count = 0;
4877                 return 1;
4878         }
4879
4880         vcpu->run->exit_reason = KVM_EXIT_IO;
4881         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4882         vcpu->run->io.size = size;
4883         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4884         vcpu->run->io.count = count;
4885         vcpu->run->io.port = port;
4886
4887         return 0;
4888 }
4889
4890 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4891                                     int size, unsigned short port, void *val,
4892                                     unsigned int count)
4893 {
4894         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4895         int ret;
4896
4897         if (vcpu->arch.pio.count)
4898                 goto data_avail;
4899
4900         memset(vcpu->arch.pio_data, 0, size * count);
4901
4902         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4903         if (ret) {
4904 data_avail:
4905                 memcpy(val, vcpu->arch.pio_data, size * count);
4906                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4907                 vcpu->arch.pio.count = 0;
4908                 return 1;
4909         }
4910
4911         return 0;
4912 }
4913
4914 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4915                                      int size, unsigned short port,
4916                                      const void *val, unsigned int count)
4917 {
4918         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4919
4920         memcpy(vcpu->arch.pio_data, val, size * count);
4921         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4922         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4923 }
4924
4925 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4926 {
4927         return kvm_x86_ops->get_segment_base(vcpu, seg);
4928 }
4929
4930 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4931 {
4932         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4933 }
4934
4935 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4936 {
4937         if (!need_emulate_wbinvd(vcpu))
4938                 return X86EMUL_CONTINUE;
4939
4940         if (kvm_x86_ops->has_wbinvd_exit()) {
4941                 int cpu = get_cpu();
4942
4943                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4944                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4945                                 wbinvd_ipi, NULL, 1);
4946                 put_cpu();
4947                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4948         } else
4949                 wbinvd();
4950         return X86EMUL_CONTINUE;
4951 }
4952
4953 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4954 {
4955         kvm_emulate_wbinvd_noskip(vcpu);
4956         return kvm_skip_emulated_instruction(vcpu);
4957 }
4958 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4959
4960
4961
4962 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4963 {
4964         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4965 }
4966
4967 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4968                            unsigned long *dest)
4969 {
4970         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4971 }
4972
4973 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4974                            unsigned long value)
4975 {
4976
4977         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4978 }
4979
4980 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4981 {
4982         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4983 }
4984
4985 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4986 {
4987         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4988         unsigned long value;
4989
4990         switch (cr) {
4991         case 0:
4992                 value = kvm_read_cr0(vcpu);
4993                 break;
4994         case 2:
4995                 value = vcpu->arch.cr2;
4996                 break;
4997         case 3:
4998                 value = kvm_read_cr3(vcpu);
4999                 break;
5000         case 4:
5001                 value = kvm_read_cr4(vcpu);
5002                 break;
5003         case 8:
5004                 value = kvm_get_cr8(vcpu);
5005                 break;
5006         default:
5007                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5008                 return 0;
5009         }
5010
5011         return value;
5012 }
5013
5014 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5015 {
5016         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5017         int res = 0;
5018
5019         switch (cr) {
5020         case 0:
5021                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5022                 break;
5023         case 2:
5024                 vcpu->arch.cr2 = val;
5025                 break;
5026         case 3:
5027                 res = kvm_set_cr3(vcpu, val);
5028                 break;
5029         case 4:
5030                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5031                 break;
5032         case 8:
5033                 res = kvm_set_cr8(vcpu, val);
5034                 break;
5035         default:
5036                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5037                 res = -1;
5038         }
5039
5040         return res;
5041 }
5042
5043 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5044 {
5045         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5046 }
5047
5048 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5049 {
5050         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5051 }
5052
5053 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5054 {
5055         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5056 }
5057
5058 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5059 {
5060         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5061 }
5062
5063 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5064 {
5065         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5066 }
5067
5068 static unsigned long emulator_get_cached_segment_base(
5069         struct x86_emulate_ctxt *ctxt, int seg)
5070 {
5071         return get_segment_base(emul_to_vcpu(ctxt), seg);
5072 }
5073
5074 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5075                                  struct desc_struct *desc, u32 *base3,
5076                                  int seg)
5077 {
5078         struct kvm_segment var;
5079
5080         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5081         *selector = var.selector;
5082
5083         if (var.unusable) {
5084                 memset(desc, 0, sizeof(*desc));
5085                 if (base3)
5086                         *base3 = 0;
5087                 return false;
5088         }
5089
5090         if (var.g)
5091                 var.limit >>= 12;
5092         set_desc_limit(desc, var.limit);
5093         set_desc_base(desc, (unsigned long)var.base);
5094 #ifdef CONFIG_X86_64
5095         if (base3)
5096                 *base3 = var.base >> 32;
5097 #endif
5098         desc->type = var.type;
5099         desc->s = var.s;
5100         desc->dpl = var.dpl;
5101         desc->p = var.present;
5102         desc->avl = var.avl;
5103         desc->l = var.l;
5104         desc->d = var.db;
5105         desc->g = var.g;
5106
5107         return true;
5108 }
5109
5110 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5111                                  struct desc_struct *desc, u32 base3,
5112                                  int seg)
5113 {
5114         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5115         struct kvm_segment var;
5116
5117         var.selector = selector;
5118         var.base = get_desc_base(desc);
5119 #ifdef CONFIG_X86_64
5120         var.base |= ((u64)base3) << 32;
5121 #endif
5122         var.limit = get_desc_limit(desc);
5123         if (desc->g)
5124                 var.limit = (var.limit << 12) | 0xfff;
5125         var.type = desc->type;
5126         var.dpl = desc->dpl;
5127         var.db = desc->d;
5128         var.s = desc->s;
5129         var.l = desc->l;
5130         var.g = desc->g;
5131         var.avl = desc->avl;
5132         var.present = desc->p;
5133         var.unusable = !var.present;
5134         var.padding = 0;
5135
5136         kvm_set_segment(vcpu, &var, seg);
5137         return;
5138 }
5139
5140 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5141                             u32 msr_index, u64 *pdata)
5142 {
5143         struct msr_data msr;
5144         int r;
5145
5146         msr.index = msr_index;
5147         msr.host_initiated = false;
5148         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5149         if (r)
5150                 return r;
5151
5152         *pdata = msr.data;
5153         return 0;
5154 }
5155
5156 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5157                             u32 msr_index, u64 data)
5158 {
5159         struct msr_data msr;
5160
5161         msr.data = data;
5162         msr.index = msr_index;
5163         msr.host_initiated = false;
5164         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5165 }
5166
5167 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5168 {
5169         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5170
5171         return vcpu->arch.smbase;
5172 }
5173
5174 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5175 {
5176         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5177
5178         vcpu->arch.smbase = smbase;
5179 }
5180
5181 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5182                               u32 pmc)
5183 {
5184         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5185 }
5186
5187 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5188                              u32 pmc, u64 *pdata)
5189 {
5190         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5191 }
5192
5193 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5194 {
5195         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5196 }
5197
5198 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
5199 {
5200         preempt_disable();
5201         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5202 }
5203
5204 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
5205 {
5206         preempt_enable();
5207 }
5208
5209 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5210                               struct x86_instruction_info *info,
5211                               enum x86_intercept_stage stage)
5212 {
5213         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5214 }
5215
5216 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5217                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
5218 {
5219         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5220 }
5221
5222 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5223 {
5224         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5225 }
5226
5227 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5228 {
5229         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5230 }
5231
5232 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5233 {
5234         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5235 }
5236
5237 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5238 {
5239         return emul_to_vcpu(ctxt)->arch.hflags;
5240 }
5241
5242 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5243 {
5244         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5245 }
5246
5247 static const struct x86_emulate_ops emulate_ops = {
5248         .read_gpr            = emulator_read_gpr,
5249         .write_gpr           = emulator_write_gpr,
5250         .read_std            = kvm_read_guest_virt_system,
5251         .write_std           = kvm_write_guest_virt_system,
5252         .read_phys           = kvm_read_guest_phys_system,
5253         .fetch               = kvm_fetch_guest_virt,
5254         .read_emulated       = emulator_read_emulated,
5255         .write_emulated      = emulator_write_emulated,
5256         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5257         .invlpg              = emulator_invlpg,
5258         .pio_in_emulated     = emulator_pio_in_emulated,
5259         .pio_out_emulated    = emulator_pio_out_emulated,
5260         .get_segment         = emulator_get_segment,
5261         .set_segment         = emulator_set_segment,
5262         .get_cached_segment_base = emulator_get_cached_segment_base,
5263         .get_gdt             = emulator_get_gdt,
5264         .get_idt             = emulator_get_idt,
5265         .set_gdt             = emulator_set_gdt,
5266         .set_idt             = emulator_set_idt,
5267         .get_cr              = emulator_get_cr,
5268         .set_cr              = emulator_set_cr,
5269         .cpl                 = emulator_get_cpl,
5270         .get_dr              = emulator_get_dr,
5271         .set_dr              = emulator_set_dr,
5272         .get_smbase          = emulator_get_smbase,
5273         .set_smbase          = emulator_set_smbase,
5274         .set_msr             = emulator_set_msr,
5275         .get_msr             = emulator_get_msr,
5276         .check_pmc           = emulator_check_pmc,
5277         .read_pmc            = emulator_read_pmc,
5278         .halt                = emulator_halt,
5279         .wbinvd              = emulator_wbinvd,
5280         .fix_hypercall       = emulator_fix_hypercall,
5281         .get_fpu             = emulator_get_fpu,
5282         .put_fpu             = emulator_put_fpu,
5283         .intercept           = emulator_intercept,
5284         .get_cpuid           = emulator_get_cpuid,
5285         .set_nmi_mask        = emulator_set_nmi_mask,
5286         .get_hflags          = emulator_get_hflags,
5287         .set_hflags          = emulator_set_hflags,
5288 };
5289
5290 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5291 {
5292         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5293         /*
5294          * an sti; sti; sequence only disable interrupts for the first
5295          * instruction. So, if the last instruction, be it emulated or
5296          * not, left the system with the INT_STI flag enabled, it
5297          * means that the last instruction is an sti. We should not
5298          * leave the flag on in this case. The same goes for mov ss
5299          */
5300         if (int_shadow & mask)
5301                 mask = 0;
5302         if (unlikely(int_shadow || mask)) {
5303                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5304                 if (!mask)
5305                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5306         }
5307 }
5308
5309 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5310 {
5311         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5312         if (ctxt->exception.vector == PF_VECTOR)
5313                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5314
5315         if (ctxt->exception.error_code_valid)
5316                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5317                                       ctxt->exception.error_code);
5318         else
5319                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5320         return false;
5321 }
5322
5323 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5324 {
5325         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5326         int cs_db, cs_l;
5327
5328         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5329
5330         ctxt->eflags = kvm_get_rflags(vcpu);
5331         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5332
5333         ctxt->eip = kvm_rip_read(vcpu);
5334         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5335                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5336                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5337                      cs_db                              ? X86EMUL_MODE_PROT32 :
5338                                                           X86EMUL_MODE_PROT16;
5339         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5340         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5341         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5342
5343         init_decode_cache(ctxt);
5344         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5345 }
5346
5347 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5348 {
5349         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5350         int ret;
5351
5352         init_emulate_ctxt(vcpu);
5353
5354         ctxt->op_bytes = 2;
5355         ctxt->ad_bytes = 2;
5356         ctxt->_eip = ctxt->eip + inc_eip;
5357         ret = emulate_int_real(ctxt, irq);
5358
5359         if (ret != X86EMUL_CONTINUE)
5360                 return EMULATE_FAIL;
5361
5362         ctxt->eip = ctxt->_eip;
5363         kvm_rip_write(vcpu, ctxt->eip);
5364         kvm_set_rflags(vcpu, ctxt->eflags);
5365
5366         if (irq == NMI_VECTOR)
5367                 vcpu->arch.nmi_pending = 0;
5368         else
5369                 vcpu->arch.interrupt.pending = false;
5370
5371         return EMULATE_DONE;
5372 }
5373 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5374
5375 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
5376 {
5377         int r = EMULATE_DONE;
5378
5379         ++vcpu->stat.insn_emulation_fail;
5380         trace_kvm_emulate_insn_failed(vcpu);
5381         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5382                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5383                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5384                 vcpu->run->internal.ndata = 0;
5385                 r = EMULATE_FAIL;
5386         }
5387         kvm_queue_exception(vcpu, UD_VECTOR);
5388
5389         return r;
5390 }
5391
5392 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5393                                   bool write_fault_to_shadow_pgtable,
5394                                   int emulation_type)
5395 {
5396         gpa_t gpa = cr2;
5397         kvm_pfn_t pfn;
5398
5399         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5400                 return false;
5401
5402         if (!vcpu->arch.mmu.direct_map) {
5403                 /*
5404                  * Write permission should be allowed since only
5405                  * write access need to be emulated.
5406                  */
5407                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5408
5409                 /*
5410                  * If the mapping is invalid in guest, let cpu retry
5411                  * it to generate fault.
5412                  */
5413                 if (gpa == UNMAPPED_GVA)
5414                         return true;
5415         }
5416
5417         /*
5418          * Do not retry the unhandleable instruction if it faults on the
5419          * readonly host memory, otherwise it will goto a infinite loop:
5420          * retry instruction -> write #PF -> emulation fail -> retry
5421          * instruction -> ...
5422          */
5423         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5424
5425         /*
5426          * If the instruction failed on the error pfn, it can not be fixed,
5427          * report the error to userspace.
5428          */
5429         if (is_error_noslot_pfn(pfn))
5430                 return false;
5431
5432         kvm_release_pfn_clean(pfn);
5433
5434         /* The instructions are well-emulated on direct mmu. */
5435         if (vcpu->arch.mmu.direct_map) {
5436                 unsigned int indirect_shadow_pages;
5437
5438                 spin_lock(&vcpu->kvm->mmu_lock);
5439                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5440                 spin_unlock(&vcpu->kvm->mmu_lock);
5441
5442                 if (indirect_shadow_pages)
5443                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5444
5445                 return true;
5446         }
5447
5448         /*
5449          * if emulation was due to access to shadowed page table
5450          * and it failed try to unshadow page and re-enter the
5451          * guest to let CPU execute the instruction.
5452          */
5453         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5454
5455         /*
5456          * If the access faults on its page table, it can not
5457          * be fixed by unprotecting shadow page and it should
5458          * be reported to userspace.
5459          */
5460         return !write_fault_to_shadow_pgtable;
5461 }
5462
5463 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5464                               unsigned long cr2,  int emulation_type)
5465 {
5466         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5467         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5468
5469         last_retry_eip = vcpu->arch.last_retry_eip;
5470         last_retry_addr = vcpu->arch.last_retry_addr;
5471
5472         /*
5473          * If the emulation is caused by #PF and it is non-page_table
5474          * writing instruction, it means the VM-EXIT is caused by shadow
5475          * page protected, we can zap the shadow page and retry this
5476          * instruction directly.
5477          *
5478          * Note: if the guest uses a non-page-table modifying instruction
5479          * on the PDE that points to the instruction, then we will unmap
5480          * the instruction and go to an infinite loop. So, we cache the
5481          * last retried eip and the last fault address, if we meet the eip
5482          * and the address again, we can break out of the potential infinite
5483          * loop.
5484          */
5485         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5486
5487         if (!(emulation_type & EMULTYPE_RETRY))
5488                 return false;
5489
5490         if (x86_page_table_writing_insn(ctxt))
5491                 return false;
5492
5493         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5494                 return false;
5495
5496         vcpu->arch.last_retry_eip = ctxt->eip;
5497         vcpu->arch.last_retry_addr = cr2;
5498
5499         if (!vcpu->arch.mmu.direct_map)
5500                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5501
5502         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5503
5504         return true;
5505 }
5506
5507 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5508 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5509
5510 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5511 {
5512         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5513                 /* This is a good place to trace that we are exiting SMM.  */
5514                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5515
5516                 /* Process a latched INIT or SMI, if any.  */
5517                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5518         }
5519
5520         kvm_mmu_reset_context(vcpu);
5521 }
5522
5523 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5524 {
5525         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5526
5527         vcpu->arch.hflags = emul_flags;
5528
5529         if (changed & HF_SMM_MASK)
5530                 kvm_smm_changed(vcpu);
5531 }
5532
5533 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5534                                 unsigned long *db)
5535 {
5536         u32 dr6 = 0;
5537         int i;
5538         u32 enable, rwlen;
5539
5540         enable = dr7;
5541         rwlen = dr7 >> 16;
5542         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5543                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5544                         dr6 |= (1 << i);
5545         return dr6;
5546 }
5547
5548 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5549 {
5550         struct kvm_run *kvm_run = vcpu->run;
5551
5552         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5553                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5554                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5555                 kvm_run->debug.arch.exception = DB_VECTOR;
5556                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5557                 *r = EMULATE_USER_EXIT;
5558         } else {
5559                 /*
5560                  * "Certain debug exceptions may clear bit 0-3.  The
5561                  * remaining contents of the DR6 register are never
5562                  * cleared by the processor".
5563                  */
5564                 vcpu->arch.dr6 &= ~15;
5565                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5566                 kvm_queue_exception(vcpu, DB_VECTOR);
5567         }
5568 }
5569
5570 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5571 {
5572         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5573         int r = EMULATE_DONE;
5574
5575         kvm_x86_ops->skip_emulated_instruction(vcpu);
5576
5577         /*
5578          * rflags is the old, "raw" value of the flags.  The new value has
5579          * not been saved yet.
5580          *
5581          * This is correct even for TF set by the guest, because "the
5582          * processor will not generate this exception after the instruction
5583          * that sets the TF flag".
5584          */
5585         if (unlikely(rflags & X86_EFLAGS_TF))
5586                 kvm_vcpu_do_singlestep(vcpu, &r);
5587         return r == EMULATE_DONE;
5588 }
5589 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5590
5591 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5592 {
5593         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5594             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5595                 struct kvm_run *kvm_run = vcpu->run;
5596                 unsigned long eip = kvm_get_linear_rip(vcpu);
5597                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5598                                            vcpu->arch.guest_debug_dr7,
5599                                            vcpu->arch.eff_db);
5600
5601                 if (dr6 != 0) {
5602                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5603                         kvm_run->debug.arch.pc = eip;
5604                         kvm_run->debug.arch.exception = DB_VECTOR;
5605                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5606                         *r = EMULATE_USER_EXIT;
5607                         return true;
5608                 }
5609         }
5610
5611         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5612             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5613                 unsigned long eip = kvm_get_linear_rip(vcpu);
5614                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5615                                            vcpu->arch.dr7,
5616                                            vcpu->arch.db);
5617
5618                 if (dr6 != 0) {
5619                         vcpu->arch.dr6 &= ~15;
5620                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5621                         kvm_queue_exception(vcpu, DB_VECTOR);
5622                         *r = EMULATE_DONE;
5623                         return true;
5624                 }
5625         }
5626
5627         return false;
5628 }
5629
5630 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5631                             unsigned long cr2,
5632                             int emulation_type,
5633                             void *insn,
5634                             int insn_len)
5635 {
5636         int r;
5637         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5638         bool writeback = true;
5639         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5640
5641         /*
5642          * Clear write_fault_to_shadow_pgtable here to ensure it is
5643          * never reused.
5644          */
5645         vcpu->arch.write_fault_to_shadow_pgtable = false;
5646         kvm_clear_exception_queue(vcpu);
5647
5648         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5649                 init_emulate_ctxt(vcpu);
5650
5651                 /*
5652                  * We will reenter on the same instruction since
5653                  * we do not set complete_userspace_io.  This does not
5654                  * handle watchpoints yet, those would be handled in
5655                  * the emulate_ops.
5656                  */
5657                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5658                         return r;
5659
5660                 ctxt->interruptibility = 0;
5661                 ctxt->have_exception = false;
5662                 ctxt->exception.vector = -1;
5663                 ctxt->perm_ok = false;
5664
5665                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5666
5667                 r = x86_decode_insn(ctxt, insn, insn_len);
5668
5669                 trace_kvm_emulate_insn_start(vcpu);
5670                 ++vcpu->stat.insn_emulation;
5671                 if (r != EMULATION_OK)  {
5672                         if (emulation_type & EMULTYPE_TRAP_UD)
5673                                 return EMULATE_FAIL;
5674                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5675                                                 emulation_type))
5676                                 return EMULATE_DONE;
5677                         if (emulation_type & EMULTYPE_SKIP)
5678                                 return EMULATE_FAIL;
5679                         return handle_emulation_failure(vcpu);
5680                 }
5681         }
5682
5683         if (emulation_type & EMULTYPE_SKIP) {
5684                 kvm_rip_write(vcpu, ctxt->_eip);
5685                 if (ctxt->eflags & X86_EFLAGS_RF)
5686                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5687                 return EMULATE_DONE;
5688         }
5689
5690         if (retry_instruction(ctxt, cr2, emulation_type))
5691                 return EMULATE_DONE;
5692
5693         /* this is needed for vmware backdoor interface to work since it
5694            changes registers values  during IO operation */
5695         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5696                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5697                 emulator_invalidate_register_cache(ctxt);
5698         }
5699
5700 restart:
5701         /* Save the faulting GPA (cr2) in the address field */
5702         ctxt->exception.address = cr2;
5703
5704         r = x86_emulate_insn(ctxt);
5705
5706         if (r == EMULATION_INTERCEPTED)
5707                 return EMULATE_DONE;
5708
5709         if (r == EMULATION_FAILED) {
5710                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5711                                         emulation_type))
5712                         return EMULATE_DONE;
5713
5714                 return handle_emulation_failure(vcpu);
5715         }
5716
5717         if (ctxt->have_exception) {
5718                 r = EMULATE_DONE;
5719                 if (inject_emulated_exception(vcpu))
5720                         return r;
5721         } else if (vcpu->arch.pio.count) {
5722                 if (!vcpu->arch.pio.in) {
5723                         /* FIXME: return into emulator if single-stepping.  */
5724                         vcpu->arch.pio.count = 0;
5725                 } else {
5726                         writeback = false;
5727                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5728                 }
5729                 r = EMULATE_USER_EXIT;
5730         } else if (vcpu->mmio_needed) {
5731                 if (!vcpu->mmio_is_write)
5732                         writeback = false;
5733                 r = EMULATE_USER_EXIT;
5734                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5735         } else if (r == EMULATION_RESTART)
5736                 goto restart;
5737         else
5738                 r = EMULATE_DONE;
5739
5740         if (writeback) {
5741                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5742                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5743                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5744                 kvm_rip_write(vcpu, ctxt->eip);
5745                 if (r == EMULATE_DONE &&
5746                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
5747                         kvm_vcpu_do_singlestep(vcpu, &r);
5748                 if (!ctxt->have_exception ||
5749                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5750                         __kvm_set_rflags(vcpu, ctxt->eflags);
5751
5752                 /*
5753                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5754                  * do nothing, and it will be requested again as soon as
5755                  * the shadow expires.  But we still need to check here,
5756                  * because POPF has no interrupt shadow.
5757                  */
5758                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5759                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5760         } else
5761                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5762
5763         return r;
5764 }
5765 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5766
5767 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5768 {
5769         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5770         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5771                                             size, port, &val, 1);
5772         /* do not return to emulator after return from userspace */
5773         vcpu->arch.pio.count = 0;
5774         return ret;
5775 }
5776 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5777
5778 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
5779 {
5780         unsigned long val;
5781
5782         /* We should only ever be called with arch.pio.count equal to 1 */
5783         BUG_ON(vcpu->arch.pio.count != 1);
5784
5785         /* For size less than 4 we merge, else we zero extend */
5786         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
5787                                         : 0;
5788
5789         /*
5790          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5791          * the copy and tracing
5792          */
5793         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
5794                                  vcpu->arch.pio.port, &val, 1);
5795         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5796
5797         return 1;
5798 }
5799
5800 int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
5801 {
5802         unsigned long val;
5803         int ret;
5804
5805         /* For size less than 4 we merge, else we zero extend */
5806         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
5807
5808         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
5809                                        &val, 1);
5810         if (ret) {
5811                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
5812                 return ret;
5813         }
5814
5815         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
5816
5817         return 0;
5818 }
5819 EXPORT_SYMBOL_GPL(kvm_fast_pio_in);
5820
5821 static int kvmclock_cpu_down_prep(unsigned int cpu)
5822 {
5823         __this_cpu_write(cpu_tsc_khz, 0);
5824         return 0;
5825 }
5826
5827 static void tsc_khz_changed(void *data)
5828 {
5829         struct cpufreq_freqs *freq = data;
5830         unsigned long khz = 0;
5831
5832         if (data)
5833                 khz = freq->new;
5834         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5835                 khz = cpufreq_quick_get(raw_smp_processor_id());
5836         if (!khz)
5837                 khz = tsc_khz;
5838         __this_cpu_write(cpu_tsc_khz, khz);
5839 }
5840
5841 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5842                                      void *data)
5843 {
5844         struct cpufreq_freqs *freq = data;
5845         struct kvm *kvm;
5846         struct kvm_vcpu *vcpu;
5847         int i, send_ipi = 0;
5848
5849         /*
5850          * We allow guests to temporarily run on slowing clocks,
5851          * provided we notify them after, or to run on accelerating
5852          * clocks, provided we notify them before.  Thus time never
5853          * goes backwards.
5854          *
5855          * However, we have a problem.  We can't atomically update
5856          * the frequency of a given CPU from this function; it is
5857          * merely a notifier, which can be called from any CPU.
5858          * Changing the TSC frequency at arbitrary points in time
5859          * requires a recomputation of local variables related to
5860          * the TSC for each VCPU.  We must flag these local variables
5861          * to be updated and be sure the update takes place with the
5862          * new frequency before any guests proceed.
5863          *
5864          * Unfortunately, the combination of hotplug CPU and frequency
5865          * change creates an intractable locking scenario; the order
5866          * of when these callouts happen is undefined with respect to
5867          * CPU hotplug, and they can race with each other.  As such,
5868          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5869          * undefined; you can actually have a CPU frequency change take
5870          * place in between the computation of X and the setting of the
5871          * variable.  To protect against this problem, all updates of
5872          * the per_cpu tsc_khz variable are done in an interrupt
5873          * protected IPI, and all callers wishing to update the value
5874          * must wait for a synchronous IPI to complete (which is trivial
5875          * if the caller is on the CPU already).  This establishes the
5876          * necessary total order on variable updates.
5877          *
5878          * Note that because a guest time update may take place
5879          * anytime after the setting of the VCPU's request bit, the
5880          * correct TSC value must be set before the request.  However,
5881          * to ensure the update actually makes it to any guest which
5882          * starts running in hardware virtualization between the set
5883          * and the acquisition of the spinlock, we must also ping the
5884          * CPU after setting the request bit.
5885          *
5886          */
5887
5888         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5889                 return 0;
5890         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5891                 return 0;
5892
5893         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5894
5895         spin_lock(&kvm_lock);
5896         list_for_each_entry(kvm, &vm_list, vm_list) {
5897                 kvm_for_each_vcpu(i, vcpu, kvm) {
5898                         if (vcpu->cpu != freq->cpu)
5899                                 continue;
5900                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5901                         if (vcpu->cpu != smp_processor_id())
5902                                 send_ipi = 1;
5903                 }
5904         }
5905         spin_unlock(&kvm_lock);
5906
5907         if (freq->old < freq->new && send_ipi) {
5908                 /*
5909                  * We upscale the frequency.  Must make the guest
5910                  * doesn't see old kvmclock values while running with
5911                  * the new frequency, otherwise we risk the guest sees
5912                  * time go backwards.
5913                  *
5914                  * In case we update the frequency for another cpu
5915                  * (which might be in guest context) send an interrupt
5916                  * to kick the cpu out of guest context.  Next time
5917                  * guest context is entered kvmclock will be updated,
5918                  * so the guest will not see stale values.
5919                  */
5920                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5921         }
5922         return 0;
5923 }
5924
5925 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5926         .notifier_call  = kvmclock_cpufreq_notifier
5927 };
5928
5929 static int kvmclock_cpu_online(unsigned int cpu)
5930 {
5931         tsc_khz_changed(NULL);
5932         return 0;
5933 }
5934
5935 static void kvm_timer_init(void)
5936 {
5937         max_tsc_khz = tsc_khz;
5938
5939         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5940 #ifdef CONFIG_CPU_FREQ
5941                 struct cpufreq_policy policy;
5942                 int cpu;
5943
5944                 memset(&policy, 0, sizeof(policy));
5945                 cpu = get_cpu();
5946                 cpufreq_get_policy(&policy, cpu);
5947                 if (policy.cpuinfo.max_freq)
5948                         max_tsc_khz = policy.cpuinfo.max_freq;
5949                 put_cpu();
5950 #endif
5951                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5952                                           CPUFREQ_TRANSITION_NOTIFIER);
5953         }
5954         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5955
5956         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
5957                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
5958 }
5959
5960 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5961
5962 int kvm_is_in_guest(void)
5963 {
5964         return __this_cpu_read(current_vcpu) != NULL;
5965 }
5966
5967 static int kvm_is_user_mode(void)
5968 {
5969         int user_mode = 3;
5970
5971         if (__this_cpu_read(current_vcpu))
5972                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5973
5974         return user_mode != 0;
5975 }
5976
5977 static unsigned long kvm_get_guest_ip(void)
5978 {
5979         unsigned long ip = 0;
5980
5981         if (__this_cpu_read(current_vcpu))
5982                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5983
5984         return ip;
5985 }
5986
5987 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5988         .is_in_guest            = kvm_is_in_guest,
5989         .is_user_mode           = kvm_is_user_mode,
5990         .get_guest_ip           = kvm_get_guest_ip,
5991 };
5992
5993 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5994 {
5995         __this_cpu_write(current_vcpu, vcpu);
5996 }
5997 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5998
5999 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
6000 {
6001         __this_cpu_write(current_vcpu, NULL);
6002 }
6003 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
6004
6005 static void kvm_set_mmio_spte_mask(void)
6006 {
6007         u64 mask;
6008         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6009
6010         /*
6011          * Set the reserved bits and the present bit of an paging-structure
6012          * entry to generate page fault with PFER.RSV = 1.
6013          */
6014          /* Mask the reserved physical address bits. */
6015         mask = rsvd_bits(maxphyaddr, 51);
6016
6017         /* Set the present bit. */
6018         mask |= 1ull;
6019
6020 #ifdef CONFIG_X86_64
6021         /*
6022          * If reserved bit is not supported, clear the present bit to disable
6023          * mmio page fault.
6024          */
6025         if (maxphyaddr == 52)
6026                 mask &= ~1ull;
6027 #endif
6028
6029         kvm_mmu_set_mmio_spte_mask(mask, mask);
6030 }
6031
6032 #ifdef CONFIG_X86_64
6033 static void pvclock_gtod_update_fn(struct work_struct *work)
6034 {
6035         struct kvm *kvm;
6036
6037         struct kvm_vcpu *vcpu;
6038         int i;
6039
6040         spin_lock(&kvm_lock);
6041         list_for_each_entry(kvm, &vm_list, vm_list)
6042                 kvm_for_each_vcpu(i, vcpu, kvm)
6043                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6044         atomic_set(&kvm_guest_has_master_clock, 0);
6045         spin_unlock(&kvm_lock);
6046 }
6047
6048 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6049
6050 /*
6051  * Notification about pvclock gtod data update.
6052  */
6053 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6054                                void *priv)
6055 {
6056         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6057         struct timekeeper *tk = priv;
6058
6059         update_pvclock_gtod(tk);
6060
6061         /* disable master clock if host does not trust, or does not
6062          * use, TSC clocksource
6063          */
6064         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
6065             atomic_read(&kvm_guest_has_master_clock) != 0)
6066                 queue_work(system_long_wq, &pvclock_gtod_work);
6067
6068         return 0;
6069 }
6070
6071 static struct notifier_block pvclock_gtod_notifier = {
6072         .notifier_call = pvclock_gtod_notify,
6073 };
6074 #endif
6075
6076 int kvm_arch_init(void *opaque)
6077 {
6078         int r;
6079         struct kvm_x86_ops *ops = opaque;
6080
6081         if (kvm_x86_ops) {
6082                 printk(KERN_ERR "kvm: already loaded the other module\n");
6083                 r = -EEXIST;
6084                 goto out;
6085         }
6086
6087         if (!ops->cpu_has_kvm_support()) {
6088                 printk(KERN_ERR "kvm: no hardware support\n");
6089                 r = -EOPNOTSUPP;
6090                 goto out;
6091         }
6092         if (ops->disabled_by_bios()) {
6093                 printk(KERN_ERR "kvm: disabled by bios\n");
6094                 r = -EOPNOTSUPP;
6095                 goto out;
6096         }
6097
6098         r = -ENOMEM;
6099         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6100         if (!shared_msrs) {
6101                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6102                 goto out;
6103         }
6104
6105         r = kvm_mmu_module_init();
6106         if (r)
6107                 goto out_free_percpu;
6108
6109         kvm_set_mmio_spte_mask();
6110
6111         kvm_x86_ops = ops;
6112
6113         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6114                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6115                         PT_PRESENT_MASK, 0);
6116         kvm_timer_init();
6117
6118         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6119
6120         if (boot_cpu_has(X86_FEATURE_XSAVE))
6121                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6122
6123         kvm_lapic_init();
6124 #ifdef CONFIG_X86_64
6125         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6126 #endif
6127
6128         return 0;
6129
6130 out_free_percpu:
6131         free_percpu(shared_msrs);
6132 out:
6133         return r;
6134 }
6135
6136 void kvm_arch_exit(void)
6137 {
6138         kvm_lapic_exit();
6139         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6140
6141         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6142                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6143                                             CPUFREQ_TRANSITION_NOTIFIER);
6144         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6145 #ifdef CONFIG_X86_64
6146         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6147 #endif
6148         kvm_x86_ops = NULL;
6149         kvm_mmu_module_exit();
6150         free_percpu(shared_msrs);
6151 }
6152
6153 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6154 {
6155         ++vcpu->stat.halt_exits;
6156         if (lapic_in_kernel(vcpu)) {
6157                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6158                 return 1;
6159         } else {
6160                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6161                 return 0;
6162         }
6163 }
6164 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6165
6166 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6167 {
6168         int ret = kvm_skip_emulated_instruction(vcpu);
6169         /*
6170          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6171          * KVM_EXIT_DEBUG here.
6172          */
6173         return kvm_vcpu_halt(vcpu) && ret;
6174 }
6175 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6176
6177 #ifdef CONFIG_X86_64
6178 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6179                                 unsigned long clock_type)
6180 {
6181         struct kvm_clock_pairing clock_pairing;
6182         struct timespec ts;
6183         u64 cycle;
6184         int ret;
6185
6186         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6187                 return -KVM_EOPNOTSUPP;
6188
6189         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6190                 return -KVM_EOPNOTSUPP;
6191
6192         clock_pairing.sec = ts.tv_sec;
6193         clock_pairing.nsec = ts.tv_nsec;
6194         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6195         clock_pairing.flags = 0;
6196
6197         ret = 0;
6198         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6199                             sizeof(struct kvm_clock_pairing)))
6200                 ret = -KVM_EFAULT;
6201
6202         return ret;
6203 }
6204 #endif
6205
6206 /*
6207  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6208  *
6209  * @apicid - apicid of vcpu to be kicked.
6210  */
6211 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6212 {
6213         struct kvm_lapic_irq lapic_irq;
6214
6215         lapic_irq.shorthand = 0;
6216         lapic_irq.dest_mode = 0;
6217         lapic_irq.level = 0;
6218         lapic_irq.dest_id = apicid;
6219         lapic_irq.msi_redir_hint = false;
6220
6221         lapic_irq.delivery_mode = APIC_DM_REMRD;
6222         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6223 }
6224
6225 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6226 {
6227         vcpu->arch.apicv_active = false;
6228         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6229 }
6230
6231 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6232 {
6233         unsigned long nr, a0, a1, a2, a3, ret;
6234         int op_64_bit, r;
6235
6236         r = kvm_skip_emulated_instruction(vcpu);
6237
6238         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6239                 return kvm_hv_hypercall(vcpu);
6240
6241         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6242         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6243         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6244         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6245         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6246
6247         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6248
6249         op_64_bit = is_64_bit_mode(vcpu);
6250         if (!op_64_bit) {
6251                 nr &= 0xFFFFFFFF;
6252                 a0 &= 0xFFFFFFFF;
6253                 a1 &= 0xFFFFFFFF;
6254                 a2 &= 0xFFFFFFFF;
6255                 a3 &= 0xFFFFFFFF;
6256         }
6257
6258         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6259                 ret = -KVM_EPERM;
6260                 goto out;
6261         }
6262
6263         switch (nr) {
6264         case KVM_HC_VAPIC_POLL_IRQ:
6265                 ret = 0;
6266                 break;
6267         case KVM_HC_KICK_CPU:
6268                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6269                 ret = 0;
6270                 break;
6271 #ifdef CONFIG_X86_64
6272         case KVM_HC_CLOCK_PAIRING:
6273                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6274                 break;
6275 #endif
6276         default:
6277                 ret = -KVM_ENOSYS;
6278                 break;
6279         }
6280 out:
6281         if (!op_64_bit)
6282                 ret = (u32)ret;
6283         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6284         ++vcpu->stat.hypercalls;
6285         return r;
6286 }
6287 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6288
6289 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6290 {
6291         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6292         char instruction[3];
6293         unsigned long rip = kvm_rip_read(vcpu);
6294
6295         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6296
6297         return emulator_write_emulated(ctxt, rip, instruction, 3,
6298                 &ctxt->exception);
6299 }
6300
6301 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6302 {
6303         return vcpu->run->request_interrupt_window &&
6304                 likely(!pic_in_kernel(vcpu->kvm));
6305 }
6306
6307 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6308 {
6309         struct kvm_run *kvm_run = vcpu->run;
6310
6311         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6312         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6313         kvm_run->cr8 = kvm_get_cr8(vcpu);
6314         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6315         kvm_run->ready_for_interrupt_injection =
6316                 pic_in_kernel(vcpu->kvm) ||
6317                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6318 }
6319
6320 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6321 {
6322         int max_irr, tpr;
6323
6324         if (!kvm_x86_ops->update_cr8_intercept)
6325                 return;
6326
6327         if (!lapic_in_kernel(vcpu))
6328                 return;
6329
6330         if (vcpu->arch.apicv_active)
6331                 return;
6332
6333         if (!vcpu->arch.apic->vapic_addr)
6334                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6335         else
6336                 max_irr = -1;
6337
6338         if (max_irr != -1)
6339                 max_irr >>= 4;
6340
6341         tpr = kvm_lapic_get_cr8(vcpu);
6342
6343         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6344 }
6345
6346 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6347 {
6348         int r;
6349
6350         /* try to reinject previous events if any */
6351         if (vcpu->arch.exception.pending) {
6352                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6353                                         vcpu->arch.exception.has_error_code,
6354                                         vcpu->arch.exception.error_code);
6355
6356                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6357                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6358                                              X86_EFLAGS_RF);
6359
6360                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6361                     (vcpu->arch.dr7 & DR7_GD)) {
6362                         vcpu->arch.dr7 &= ~DR7_GD;
6363                         kvm_update_dr7(vcpu);
6364                 }
6365
6366                 kvm_x86_ops->queue_exception(vcpu);
6367                 return 0;
6368         }
6369
6370         if (vcpu->arch.nmi_injected) {
6371                 kvm_x86_ops->set_nmi(vcpu);
6372                 return 0;
6373         }
6374
6375         if (vcpu->arch.interrupt.pending) {
6376                 kvm_x86_ops->set_irq(vcpu);
6377                 return 0;
6378         }
6379
6380         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6381                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6382                 if (r != 0)
6383                         return r;
6384         }
6385
6386         /* try to inject new event if pending */
6387         if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
6388                 vcpu->arch.smi_pending = false;
6389                 enter_smm(vcpu);
6390         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6391                 --vcpu->arch.nmi_pending;
6392                 vcpu->arch.nmi_injected = true;
6393                 kvm_x86_ops->set_nmi(vcpu);
6394         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6395                 /*
6396                  * Because interrupts can be injected asynchronously, we are
6397                  * calling check_nested_events again here to avoid a race condition.
6398                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6399                  * proposal and current concerns.  Perhaps we should be setting
6400                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6401                  */
6402                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6403                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6404                         if (r != 0)
6405                                 return r;
6406                 }
6407                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6408                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6409                                             false);
6410                         kvm_x86_ops->set_irq(vcpu);
6411                 }
6412         }
6413
6414         return 0;
6415 }
6416
6417 static void process_nmi(struct kvm_vcpu *vcpu)
6418 {
6419         unsigned limit = 2;
6420
6421         /*
6422          * x86 is limited to one NMI running, and one NMI pending after it.
6423          * If an NMI is already in progress, limit further NMIs to just one.
6424          * Otherwise, allow two (and we'll inject the first one immediately).
6425          */
6426         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6427                 limit = 1;
6428
6429         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6430         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6431         kvm_make_request(KVM_REQ_EVENT, vcpu);
6432 }
6433
6434 #define put_smstate(type, buf, offset, val)                       \
6435         *(type *)((buf) + (offset) - 0x7e00) = val
6436
6437 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6438 {
6439         u32 flags = 0;
6440         flags |= seg->g       << 23;
6441         flags |= seg->db      << 22;
6442         flags |= seg->l       << 21;
6443         flags |= seg->avl     << 20;
6444         flags |= seg->present << 15;
6445         flags |= seg->dpl     << 13;
6446         flags |= seg->s       << 12;
6447         flags |= seg->type    << 8;
6448         return flags;
6449 }
6450
6451 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6452 {
6453         struct kvm_segment seg;
6454         int offset;
6455
6456         kvm_get_segment(vcpu, &seg, n);
6457         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6458
6459         if (n < 3)
6460                 offset = 0x7f84 + n * 12;
6461         else
6462                 offset = 0x7f2c + (n - 3) * 12;
6463
6464         put_smstate(u32, buf, offset + 8, seg.base);
6465         put_smstate(u32, buf, offset + 4, seg.limit);
6466         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6467 }
6468
6469 #ifdef CONFIG_X86_64
6470 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6471 {
6472         struct kvm_segment seg;
6473         int offset;
6474         u16 flags;
6475
6476         kvm_get_segment(vcpu, &seg, n);
6477         offset = 0x7e00 + n * 16;
6478
6479         flags = enter_smm_get_segment_flags(&seg) >> 8;
6480         put_smstate(u16, buf, offset, seg.selector);
6481         put_smstate(u16, buf, offset + 2, flags);
6482         put_smstate(u32, buf, offset + 4, seg.limit);
6483         put_smstate(u64, buf, offset + 8, seg.base);
6484 }
6485 #endif
6486
6487 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6488 {
6489         struct desc_ptr dt;
6490         struct kvm_segment seg;
6491         unsigned long val;
6492         int i;
6493
6494         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6495         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6496         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6497         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6498
6499         for (i = 0; i < 8; i++)
6500                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6501
6502         kvm_get_dr(vcpu, 6, &val);
6503         put_smstate(u32, buf, 0x7fcc, (u32)val);
6504         kvm_get_dr(vcpu, 7, &val);
6505         put_smstate(u32, buf, 0x7fc8, (u32)val);
6506
6507         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6508         put_smstate(u32, buf, 0x7fc4, seg.selector);
6509         put_smstate(u32, buf, 0x7f64, seg.base);
6510         put_smstate(u32, buf, 0x7f60, seg.limit);
6511         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6512
6513         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6514         put_smstate(u32, buf, 0x7fc0, seg.selector);
6515         put_smstate(u32, buf, 0x7f80, seg.base);
6516         put_smstate(u32, buf, 0x7f7c, seg.limit);
6517         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6518
6519         kvm_x86_ops->get_gdt(vcpu, &dt);
6520         put_smstate(u32, buf, 0x7f74, dt.address);
6521         put_smstate(u32, buf, 0x7f70, dt.size);
6522
6523         kvm_x86_ops->get_idt(vcpu, &dt);
6524         put_smstate(u32, buf, 0x7f58, dt.address);
6525         put_smstate(u32, buf, 0x7f54, dt.size);
6526
6527         for (i = 0; i < 6; i++)
6528                 enter_smm_save_seg_32(vcpu, buf, i);
6529
6530         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6531
6532         /* revision id */
6533         put_smstate(u32, buf, 0x7efc, 0x00020000);
6534         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6535 }
6536
6537 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6538 {
6539 #ifdef CONFIG_X86_64
6540         struct desc_ptr dt;
6541         struct kvm_segment seg;
6542         unsigned long val;
6543         int i;
6544
6545         for (i = 0; i < 16; i++)
6546                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6547
6548         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6549         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6550
6551         kvm_get_dr(vcpu, 6, &val);
6552         put_smstate(u64, buf, 0x7f68, val);
6553         kvm_get_dr(vcpu, 7, &val);
6554         put_smstate(u64, buf, 0x7f60, val);
6555
6556         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6557         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6558         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6559
6560         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6561
6562         /* revision id */
6563         put_smstate(u32, buf, 0x7efc, 0x00020064);
6564
6565         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6566
6567         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6568         put_smstate(u16, buf, 0x7e90, seg.selector);
6569         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6570         put_smstate(u32, buf, 0x7e94, seg.limit);
6571         put_smstate(u64, buf, 0x7e98, seg.base);
6572
6573         kvm_x86_ops->get_idt(vcpu, &dt);
6574         put_smstate(u32, buf, 0x7e84, dt.size);
6575         put_smstate(u64, buf, 0x7e88, dt.address);
6576
6577         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6578         put_smstate(u16, buf, 0x7e70, seg.selector);
6579         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6580         put_smstate(u32, buf, 0x7e74, seg.limit);
6581         put_smstate(u64, buf, 0x7e78, seg.base);
6582
6583         kvm_x86_ops->get_gdt(vcpu, &dt);
6584         put_smstate(u32, buf, 0x7e64, dt.size);
6585         put_smstate(u64, buf, 0x7e68, dt.address);
6586
6587         for (i = 0; i < 6; i++)
6588                 enter_smm_save_seg_64(vcpu, buf, i);
6589 #else
6590         WARN_ON_ONCE(1);
6591 #endif
6592 }
6593
6594 static void enter_smm(struct kvm_vcpu *vcpu)
6595 {
6596         struct kvm_segment cs, ds;
6597         struct desc_ptr dt;
6598         char buf[512];
6599         u32 cr0;
6600
6601         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6602         vcpu->arch.hflags |= HF_SMM_MASK;
6603         memset(buf, 0, 512);
6604         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6605                 enter_smm_save_state_64(vcpu, buf);
6606         else
6607                 enter_smm_save_state_32(vcpu, buf);
6608
6609         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6610
6611         if (kvm_x86_ops->get_nmi_mask(vcpu))
6612                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6613         else
6614                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6615
6616         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6617         kvm_rip_write(vcpu, 0x8000);
6618
6619         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6620         kvm_x86_ops->set_cr0(vcpu, cr0);
6621         vcpu->arch.cr0 = cr0;
6622
6623         kvm_x86_ops->set_cr4(vcpu, 0);
6624
6625         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6626         dt.address = dt.size = 0;
6627         kvm_x86_ops->set_idt(vcpu, &dt);
6628
6629         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6630
6631         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6632         cs.base = vcpu->arch.smbase;
6633
6634         ds.selector = 0;
6635         ds.base = 0;
6636
6637         cs.limit    = ds.limit = 0xffffffff;
6638         cs.type     = ds.type = 0x3;
6639         cs.dpl      = ds.dpl = 0;
6640         cs.db       = ds.db = 0;
6641         cs.s        = ds.s = 1;
6642         cs.l        = ds.l = 0;
6643         cs.g        = ds.g = 1;
6644         cs.avl      = ds.avl = 0;
6645         cs.present  = ds.present = 1;
6646         cs.unusable = ds.unusable = 0;
6647         cs.padding  = ds.padding = 0;
6648
6649         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6650         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6651         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6652         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6653         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6654         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6655
6656         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
6657                 kvm_x86_ops->set_efer(vcpu, 0);
6658
6659         kvm_update_cpuid(vcpu);
6660         kvm_mmu_reset_context(vcpu);
6661 }
6662
6663 static void process_smi(struct kvm_vcpu *vcpu)
6664 {
6665         vcpu->arch.smi_pending = true;
6666         kvm_make_request(KVM_REQ_EVENT, vcpu);
6667 }
6668
6669 void kvm_make_scan_ioapic_request(struct kvm *kvm)
6670 {
6671         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
6672 }
6673
6674 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6675 {
6676         u64 eoi_exit_bitmap[4];
6677
6678         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6679                 return;
6680
6681         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6682
6683         if (irqchip_split(vcpu->kvm))
6684                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6685         else {
6686                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6687                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6688                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6689         }
6690         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
6691                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
6692         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6693 }
6694
6695 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6696 {
6697         ++vcpu->stat.tlb_flush;
6698         kvm_x86_ops->tlb_flush(vcpu);
6699 }
6700
6701 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6702 {
6703         struct page *page = NULL;
6704
6705         if (!lapic_in_kernel(vcpu))
6706                 return;
6707
6708         if (!kvm_x86_ops->set_apic_access_page_addr)
6709                 return;
6710
6711         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6712         if (is_error_page(page))
6713                 return;
6714         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6715
6716         /*
6717          * Do not pin apic access page in memory, the MMU notifier
6718          * will call us again if it is migrated or swapped out.
6719          */
6720         put_page(page);
6721 }
6722 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6723
6724 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6725                                            unsigned long address)
6726 {
6727         /*
6728          * The physical address of apic access page is stored in the VMCS.
6729          * Update it when it becomes invalid.
6730          */
6731         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6732                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6733 }
6734
6735 /*
6736  * Returns 1 to let vcpu_run() continue the guest execution loop without
6737  * exiting to the userspace.  Otherwise, the value will be returned to the
6738  * userspace.
6739  */
6740 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6741 {
6742         int r;
6743         bool req_int_win =
6744                 dm_request_for_irq_injection(vcpu) &&
6745                 kvm_cpu_accept_dm_intr(vcpu);
6746
6747         bool req_immediate_exit = false;
6748
6749         if (kvm_request_pending(vcpu)) {
6750                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6751                         kvm_mmu_unload(vcpu);
6752                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6753                         __kvm_migrate_timers(vcpu);
6754                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6755                         kvm_gen_update_masterclock(vcpu->kvm);
6756                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6757                         kvm_gen_kvmclock_update(vcpu);
6758                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6759                         r = kvm_guest_time_update(vcpu);
6760                         if (unlikely(r))
6761                                 goto out;
6762                 }
6763                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6764                         kvm_mmu_sync_roots(vcpu);
6765                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6766                         kvm_vcpu_flush_tlb(vcpu);
6767                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6768                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6769                         r = 0;
6770                         goto out;
6771                 }
6772                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6773                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6774                         r = 0;
6775                         goto out;
6776                 }
6777                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6778                         /* Page is swapped out. Do synthetic halt */
6779                         vcpu->arch.apf.halted = true;
6780                         r = 1;
6781                         goto out;
6782                 }
6783                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6784                         record_steal_time(vcpu);
6785                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6786                         process_smi(vcpu);
6787                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6788                         process_nmi(vcpu);
6789                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6790                         kvm_pmu_handle_event(vcpu);
6791                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6792                         kvm_pmu_deliver_pmi(vcpu);
6793                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
6794                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
6795                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
6796                                      vcpu->arch.ioapic_handled_vectors)) {
6797                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
6798                                 vcpu->run->eoi.vector =
6799                                                 vcpu->arch.pending_ioapic_eoi;
6800                                 r = 0;
6801                                 goto out;
6802                         }
6803                 }
6804                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6805                         vcpu_scan_ioapic(vcpu);
6806                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6807                         kvm_vcpu_reload_apic_access_page(vcpu);
6808                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6809                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6810                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6811                         r = 0;
6812                         goto out;
6813                 }
6814                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
6815                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6816                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
6817                         r = 0;
6818                         goto out;
6819                 }
6820                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
6821                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
6822                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
6823                         r = 0;
6824                         goto out;
6825                 }
6826
6827                 /*
6828                  * KVM_REQ_HV_STIMER has to be processed after
6829                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6830                  * depend on the guest clock being up-to-date
6831                  */
6832                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
6833                         kvm_hv_process_stimers(vcpu);
6834         }
6835
6836         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6837                 ++vcpu->stat.req_event;
6838                 kvm_apic_accept_events(vcpu);
6839                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6840                         r = 1;
6841                         goto out;
6842                 }
6843
6844                 if (inject_pending_event(vcpu, req_int_win) != 0)
6845                         req_immediate_exit = true;
6846                 else {
6847                         /* Enable NMI/IRQ window open exits if needed.
6848                          *
6849                          * SMIs have two cases: 1) they can be nested, and
6850                          * then there is nothing to do here because RSM will
6851                          * cause a vmexit anyway; 2) or the SMI can be pending
6852                          * because inject_pending_event has completed the
6853                          * injection of an IRQ or NMI from the previous vmexit,
6854                          * and then we request an immediate exit to inject the SMI.
6855                          */
6856                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
6857                                 req_immediate_exit = true;
6858                         if (vcpu->arch.nmi_pending)
6859                                 kvm_x86_ops->enable_nmi_window(vcpu);
6860                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6861                                 kvm_x86_ops->enable_irq_window(vcpu);
6862                 }
6863
6864                 if (kvm_lapic_enabled(vcpu)) {
6865                         update_cr8_intercept(vcpu);
6866                         kvm_lapic_sync_to_vapic(vcpu);
6867                 }
6868         }
6869
6870         r = kvm_mmu_reload(vcpu);
6871         if (unlikely(r)) {
6872                 goto cancel_injection;
6873         }
6874
6875         preempt_disable();
6876
6877         kvm_x86_ops->prepare_guest_switch(vcpu);
6878         kvm_load_guest_fpu(vcpu);
6879
6880         /*
6881          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
6882          * IPI are then delayed after guest entry, which ensures that they
6883          * result in virtual interrupt delivery.
6884          */
6885         local_irq_disable();
6886         vcpu->mode = IN_GUEST_MODE;
6887
6888         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6889
6890         /*
6891          * 1) We should set ->mode before checking ->requests.  Please see
6892          * the comment in kvm_vcpu_exiting_guest_mode().
6893          *
6894          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
6895          * pairs with the memory barrier implicit in pi_test_and_set_on
6896          * (see vmx_deliver_posted_interrupt).
6897          *
6898          * 3) This also orders the write to mode from any reads to the page
6899          * tables done while the VCPU is running.  Please see the comment
6900          * in kvm_flush_remote_tlbs.
6901          */
6902         smp_mb__after_srcu_read_unlock();
6903
6904         /*
6905          * This handles the case where a posted interrupt was
6906          * notified with kvm_vcpu_kick.
6907          */
6908         if (kvm_lapic_enabled(vcpu)) {
6909                 if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6910                         kvm_x86_ops->sync_pir_to_irr(vcpu);
6911         }
6912
6913         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
6914             || need_resched() || signal_pending(current)) {
6915                 vcpu->mode = OUTSIDE_GUEST_MODE;
6916                 smp_wmb();
6917                 local_irq_enable();
6918                 preempt_enable();
6919                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6920                 r = 1;
6921                 goto cancel_injection;
6922         }
6923
6924         kvm_load_guest_xcr0(vcpu);
6925
6926         if (req_immediate_exit) {
6927                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6928                 smp_send_reschedule(vcpu->cpu);
6929         }
6930
6931         trace_kvm_entry(vcpu->vcpu_id);
6932         wait_lapic_expire(vcpu);
6933         guest_enter_irqoff();
6934
6935         if (unlikely(vcpu->arch.switch_db_regs)) {
6936                 set_debugreg(0, 7);
6937                 set_debugreg(vcpu->arch.eff_db[0], 0);
6938                 set_debugreg(vcpu->arch.eff_db[1], 1);
6939                 set_debugreg(vcpu->arch.eff_db[2], 2);
6940                 set_debugreg(vcpu->arch.eff_db[3], 3);
6941                 set_debugreg(vcpu->arch.dr6, 6);
6942                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6943         }
6944
6945         kvm_x86_ops->run(vcpu);
6946
6947         /*
6948          * Do this here before restoring debug registers on the host.  And
6949          * since we do this before handling the vmexit, a DR access vmexit
6950          * can (a) read the correct value of the debug registers, (b) set
6951          * KVM_DEBUGREG_WONT_EXIT again.
6952          */
6953         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6954                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6955                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6956                 kvm_update_dr0123(vcpu);
6957                 kvm_update_dr6(vcpu);
6958                 kvm_update_dr7(vcpu);
6959                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6960         }
6961
6962         /*
6963          * If the guest has used debug registers, at least dr7
6964          * will be disabled while returning to the host.
6965          * If we don't have active breakpoints in the host, we don't
6966          * care about the messed up debug address registers. But if
6967          * we have some of them active, restore the old state.
6968          */
6969         if (hw_breakpoint_active())
6970                 hw_breakpoint_restore();
6971
6972         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6973
6974         vcpu->mode = OUTSIDE_GUEST_MODE;
6975         smp_wmb();
6976
6977         kvm_put_guest_xcr0(vcpu);
6978
6979         kvm_x86_ops->handle_external_intr(vcpu);
6980
6981         ++vcpu->stat.exits;
6982
6983         guest_exit_irqoff();
6984
6985         local_irq_enable();
6986         preempt_enable();
6987
6988         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6989
6990         /*
6991          * Profile KVM exit RIPs:
6992          */
6993         if (unlikely(prof_on == KVM_PROFILING)) {
6994                 unsigned long rip = kvm_rip_read(vcpu);
6995                 profile_hit(KVM_PROFILING, (void *)rip);
6996         }
6997
6998         if (unlikely(vcpu->arch.tsc_always_catchup))
6999                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7000
7001         if (vcpu->arch.apic_attention)
7002                 kvm_lapic_sync_from_vapic(vcpu);
7003
7004         r = kvm_x86_ops->handle_exit(vcpu);
7005         return r;
7006
7007 cancel_injection:
7008         kvm_x86_ops->cancel_injection(vcpu);
7009         if (unlikely(vcpu->arch.apic_attention))
7010                 kvm_lapic_sync_from_vapic(vcpu);
7011 out:
7012         return r;
7013 }
7014
7015 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7016 {
7017         if (!kvm_arch_vcpu_runnable(vcpu) &&
7018             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7019                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7020                 kvm_vcpu_block(vcpu);
7021                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7022
7023                 if (kvm_x86_ops->post_block)
7024                         kvm_x86_ops->post_block(vcpu);
7025
7026                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7027                         return 1;
7028         }
7029
7030         kvm_apic_accept_events(vcpu);
7031         switch(vcpu->arch.mp_state) {
7032         case KVM_MP_STATE_HALTED:
7033                 vcpu->arch.pv.pv_unhalted = false;
7034                 vcpu->arch.mp_state =
7035                         KVM_MP_STATE_RUNNABLE;
7036         case KVM_MP_STATE_RUNNABLE:
7037                 vcpu->arch.apf.halted = false;
7038                 break;
7039         case KVM_MP_STATE_INIT_RECEIVED:
7040                 break;
7041         default:
7042                 return -EINTR;
7043                 break;
7044         }
7045         return 1;
7046 }
7047
7048 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7049 {
7050         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7051                 kvm_x86_ops->check_nested_events(vcpu, false);
7052
7053         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7054                 !vcpu->arch.apf.halted);
7055 }
7056
7057 static int vcpu_run(struct kvm_vcpu *vcpu)
7058 {
7059         int r;
7060         struct kvm *kvm = vcpu->kvm;
7061
7062         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7063
7064         for (;;) {
7065                 if (kvm_vcpu_running(vcpu)) {
7066                         r = vcpu_enter_guest(vcpu);
7067                 } else {
7068                         r = vcpu_block(kvm, vcpu);
7069                 }
7070
7071                 if (r <= 0)
7072                         break;
7073
7074                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7075                 if (kvm_cpu_has_pending_timer(vcpu))
7076                         kvm_inject_pending_timer_irqs(vcpu);
7077
7078                 if (dm_request_for_irq_injection(vcpu) &&
7079                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7080                         r = 0;
7081                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7082                         ++vcpu->stat.request_irq_exits;
7083                         break;
7084                 }
7085
7086                 kvm_check_async_pf_completion(vcpu);
7087
7088                 if (signal_pending(current)) {
7089                         r = -EINTR;
7090                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7091                         ++vcpu->stat.signal_exits;
7092                         break;
7093                 }
7094                 if (need_resched()) {
7095                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7096                         cond_resched();
7097                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7098                 }
7099         }
7100
7101         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7102
7103         return r;
7104 }
7105
7106 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7107 {
7108         int r;
7109         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7110         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7111         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7112         if (r != EMULATE_DONE)
7113                 return 0;
7114         return 1;
7115 }
7116
7117 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7118 {
7119         BUG_ON(!vcpu->arch.pio.count);
7120
7121         return complete_emulated_io(vcpu);
7122 }
7123
7124 /*
7125  * Implements the following, as a state machine:
7126  *
7127  * read:
7128  *   for each fragment
7129  *     for each mmio piece in the fragment
7130  *       write gpa, len
7131  *       exit
7132  *       copy data
7133  *   execute insn
7134  *
7135  * write:
7136  *   for each fragment
7137  *     for each mmio piece in the fragment
7138  *       write gpa, len
7139  *       copy data
7140  *       exit
7141  */
7142 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7143 {
7144         struct kvm_run *run = vcpu->run;
7145         struct kvm_mmio_fragment *frag;
7146         unsigned len;
7147
7148         BUG_ON(!vcpu->mmio_needed);
7149
7150         /* Complete previous fragment */
7151         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7152         len = min(8u, frag->len);
7153         if (!vcpu->mmio_is_write)
7154                 memcpy(frag->data, run->mmio.data, len);
7155
7156         if (frag->len <= 8) {
7157                 /* Switch to the next fragment. */
7158                 frag++;
7159                 vcpu->mmio_cur_fragment++;
7160         } else {
7161                 /* Go forward to the next mmio piece. */
7162                 frag->data += len;
7163                 frag->gpa += len;
7164                 frag->len -= len;
7165         }
7166
7167         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7168                 vcpu->mmio_needed = 0;
7169
7170                 /* FIXME: return into emulator if single-stepping.  */
7171                 if (vcpu->mmio_is_write)
7172                         return 1;
7173                 vcpu->mmio_read_completed = 1;
7174                 return complete_emulated_io(vcpu);
7175         }
7176
7177         run->exit_reason = KVM_EXIT_MMIO;
7178         run->mmio.phys_addr = frag->gpa;
7179         if (vcpu->mmio_is_write)
7180                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7181         run->mmio.len = min(8u, frag->len);
7182         run->mmio.is_write = vcpu->mmio_is_write;
7183         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7184         return 0;
7185 }
7186
7187
7188 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7189 {
7190         struct fpu *fpu = &current->thread.fpu;
7191         int r;
7192         sigset_t sigsaved;
7193
7194         fpu__activate_curr(fpu);
7195
7196         if (vcpu->sigset_active)
7197                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
7198
7199         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7200                 kvm_vcpu_block(vcpu);
7201                 kvm_apic_accept_events(vcpu);
7202                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7203                 r = -EAGAIN;
7204                 goto out;
7205         }
7206
7207         /* re-sync apic's tpr */
7208         if (!lapic_in_kernel(vcpu)) {
7209                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7210                         r = -EINVAL;
7211                         goto out;
7212                 }
7213         }
7214
7215         if (unlikely(vcpu->arch.complete_userspace_io)) {
7216                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7217                 vcpu->arch.complete_userspace_io = NULL;
7218                 r = cui(vcpu);
7219                 if (r <= 0)
7220                         goto out;
7221         } else
7222                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7223
7224         if (kvm_run->immediate_exit)
7225                 r = -EINTR;
7226         else
7227                 r = vcpu_run(vcpu);
7228
7229 out:
7230         post_kvm_run_save(vcpu);
7231         if (vcpu->sigset_active)
7232                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
7233
7234         return r;
7235 }
7236
7237 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7238 {
7239         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7240                 /*
7241                  * We are here if userspace calls get_regs() in the middle of
7242                  * instruction emulation. Registers state needs to be copied
7243                  * back from emulation context to vcpu. Userspace shouldn't do
7244                  * that usually, but some bad designed PV devices (vmware
7245                  * backdoor interface) need this to work
7246                  */
7247                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7248                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7249         }
7250         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7251         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7252         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7253         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7254         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7255         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7256         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7257         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7258 #ifdef CONFIG_X86_64
7259         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7260         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7261         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7262         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7263         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7264         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7265         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7266         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7267 #endif
7268
7269         regs->rip = kvm_rip_read(vcpu);
7270         regs->rflags = kvm_get_rflags(vcpu);
7271
7272         return 0;
7273 }
7274
7275 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7276 {
7277         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7278         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7279
7280         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7281         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7282         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7283         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7284         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7285         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7286         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7287         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7288 #ifdef CONFIG_X86_64
7289         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7290         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7291         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7292         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7293         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7294         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7295         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7296         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7297 #endif
7298
7299         kvm_rip_write(vcpu, regs->rip);
7300         kvm_set_rflags(vcpu, regs->rflags);
7301
7302         vcpu->arch.exception.pending = false;
7303
7304         kvm_make_request(KVM_REQ_EVENT, vcpu);
7305
7306         return 0;
7307 }
7308
7309 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7310 {
7311         struct kvm_segment cs;
7312
7313         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7314         *db = cs.db;
7315         *l = cs.l;
7316 }
7317 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7318
7319 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7320                                   struct kvm_sregs *sregs)
7321 {
7322         struct desc_ptr dt;
7323
7324         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7325         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7326         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7327         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7328         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7329         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7330
7331         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7332         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7333
7334         kvm_x86_ops->get_idt(vcpu, &dt);
7335         sregs->idt.limit = dt.size;
7336         sregs->idt.base = dt.address;
7337         kvm_x86_ops->get_gdt(vcpu, &dt);
7338         sregs->gdt.limit = dt.size;
7339         sregs->gdt.base = dt.address;
7340
7341         sregs->cr0 = kvm_read_cr0(vcpu);
7342         sregs->cr2 = vcpu->arch.cr2;
7343         sregs->cr3 = kvm_read_cr3(vcpu);
7344         sregs->cr4 = kvm_read_cr4(vcpu);
7345         sregs->cr8 = kvm_get_cr8(vcpu);
7346         sregs->efer = vcpu->arch.efer;
7347         sregs->apic_base = kvm_get_apic_base(vcpu);
7348
7349         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7350
7351         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7352                 set_bit(vcpu->arch.interrupt.nr,
7353                         (unsigned long *)sregs->interrupt_bitmap);
7354
7355         return 0;
7356 }
7357
7358 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7359                                     struct kvm_mp_state *mp_state)
7360 {
7361         kvm_apic_accept_events(vcpu);
7362         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7363                                         vcpu->arch.pv.pv_unhalted)
7364                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7365         else
7366                 mp_state->mp_state = vcpu->arch.mp_state;
7367
7368         return 0;
7369 }
7370
7371 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7372                                     struct kvm_mp_state *mp_state)
7373 {
7374         if (!lapic_in_kernel(vcpu) &&
7375             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7376                 return -EINVAL;
7377
7378         /* INITs are latched while in SMM */
7379         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7380             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7381              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7382                 return -EINVAL;
7383
7384         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7385                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7386                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7387         } else
7388                 vcpu->arch.mp_state = mp_state->mp_state;
7389         kvm_make_request(KVM_REQ_EVENT, vcpu);
7390         return 0;
7391 }
7392
7393 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7394                     int reason, bool has_error_code, u32 error_code)
7395 {
7396         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7397         int ret;
7398
7399         init_emulate_ctxt(vcpu);
7400
7401         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7402                                    has_error_code, error_code);
7403
7404         if (ret)
7405                 return EMULATE_FAIL;
7406
7407         kvm_rip_write(vcpu, ctxt->eip);
7408         kvm_set_rflags(vcpu, ctxt->eflags);
7409         kvm_make_request(KVM_REQ_EVENT, vcpu);
7410         return EMULATE_DONE;
7411 }
7412 EXPORT_SYMBOL_GPL(kvm_task_switch);
7413
7414 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
7415                                   struct kvm_sregs *sregs)
7416 {
7417         struct msr_data apic_base_msr;
7418         int mmu_reset_needed = 0;
7419         int pending_vec, max_bits, idx;
7420         struct desc_ptr dt;
7421
7422         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7423                         (sregs->cr4 & X86_CR4_OSXSAVE))
7424                 return -EINVAL;
7425
7426         dt.size = sregs->idt.limit;
7427         dt.address = sregs->idt.base;
7428         kvm_x86_ops->set_idt(vcpu, &dt);
7429         dt.size = sregs->gdt.limit;
7430         dt.address = sregs->gdt.base;
7431         kvm_x86_ops->set_gdt(vcpu, &dt);
7432
7433         vcpu->arch.cr2 = sregs->cr2;
7434         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7435         vcpu->arch.cr3 = sregs->cr3;
7436         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7437
7438         kvm_set_cr8(vcpu, sregs->cr8);
7439
7440         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7441         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7442         apic_base_msr.data = sregs->apic_base;
7443         apic_base_msr.host_initiated = true;
7444         kvm_set_apic_base(vcpu, &apic_base_msr);
7445
7446         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7447         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7448         vcpu->arch.cr0 = sregs->cr0;
7449
7450         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7451         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7452         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7453                 kvm_update_cpuid(vcpu);
7454
7455         idx = srcu_read_lock(&vcpu->kvm->srcu);
7456         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7457                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7458                 mmu_reset_needed = 1;
7459         }
7460         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7461
7462         if (mmu_reset_needed)
7463                 kvm_mmu_reset_context(vcpu);
7464
7465         max_bits = KVM_NR_INTERRUPTS;
7466         pending_vec = find_first_bit(
7467                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7468         if (pending_vec < max_bits) {
7469                 kvm_queue_interrupt(vcpu, pending_vec, false);
7470                 pr_debug("Set back pending irq %d\n", pending_vec);
7471         }
7472
7473         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7474         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7475         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7476         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7477         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7478         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7479
7480         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7481         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7482
7483         update_cr8_intercept(vcpu);
7484
7485         /* Older userspace won't unhalt the vcpu on reset. */
7486         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7487             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7488             !is_protmode(vcpu))
7489                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7490
7491         kvm_make_request(KVM_REQ_EVENT, vcpu);
7492
7493         return 0;
7494 }
7495
7496 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
7497                                         struct kvm_guest_debug *dbg)
7498 {
7499         unsigned long rflags;
7500         int i, r;
7501
7502         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
7503                 r = -EBUSY;
7504                 if (vcpu->arch.exception.pending)
7505                         goto out;
7506                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
7507                         kvm_queue_exception(vcpu, DB_VECTOR);
7508                 else
7509                         kvm_queue_exception(vcpu, BP_VECTOR);
7510         }
7511
7512         /*
7513          * Read rflags as long as potentially injected trace flags are still
7514          * filtered out.
7515          */
7516         rflags = kvm_get_rflags(vcpu);
7517
7518         vcpu->guest_debug = dbg->control;
7519         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
7520                 vcpu->guest_debug = 0;
7521
7522         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7523                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
7524                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7525                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7526         } else {
7527                 for (i = 0; i < KVM_NR_DB_REGS; i++)
7528                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
7529         }
7530         kvm_update_dr7(vcpu);
7531
7532         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7533                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
7534                         get_segment_base(vcpu, VCPU_SREG_CS);
7535
7536         /*
7537          * Trigger an rflags update that will inject or remove the trace
7538          * flags.
7539          */
7540         kvm_set_rflags(vcpu, rflags);
7541
7542         kvm_x86_ops->update_bp_intercept(vcpu);
7543
7544         r = 0;
7545
7546 out:
7547
7548         return r;
7549 }
7550
7551 /*
7552  * Translate a guest virtual address to a guest physical address.
7553  */
7554 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
7555                                     struct kvm_translation *tr)
7556 {
7557         unsigned long vaddr = tr->linear_address;
7558         gpa_t gpa;
7559         int idx;
7560
7561         idx = srcu_read_lock(&vcpu->kvm->srcu);
7562         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7563         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7564         tr->physical_address = gpa;
7565         tr->valid = gpa != UNMAPPED_GVA;
7566         tr->writeable = 1;
7567         tr->usermode = 0;
7568
7569         return 0;
7570 }
7571
7572 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7573 {
7574         struct fxregs_state *fxsave =
7575                         &vcpu->arch.guest_fpu.state.fxsave;
7576
7577         memcpy(fpu->fpr, fxsave->st_space, 128);
7578         fpu->fcw = fxsave->cwd;
7579         fpu->fsw = fxsave->swd;
7580         fpu->ftwx = fxsave->twd;
7581         fpu->last_opcode = fxsave->fop;
7582         fpu->last_ip = fxsave->rip;
7583         fpu->last_dp = fxsave->rdp;
7584         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
7585
7586         return 0;
7587 }
7588
7589 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
7590 {
7591         struct fxregs_state *fxsave =
7592                         &vcpu->arch.guest_fpu.state.fxsave;
7593
7594         memcpy(fxsave->st_space, fpu->fpr, 128);
7595         fxsave->cwd = fpu->fcw;
7596         fxsave->swd = fpu->fsw;
7597         fxsave->twd = fpu->ftwx;
7598         fxsave->fop = fpu->last_opcode;
7599         fxsave->rip = fpu->last_ip;
7600         fxsave->rdp = fpu->last_dp;
7601         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7602
7603         return 0;
7604 }
7605
7606 static void fx_init(struct kvm_vcpu *vcpu)
7607 {
7608         fpstate_init(&vcpu->arch.guest_fpu.state);
7609         if (boot_cpu_has(X86_FEATURE_XSAVES))
7610                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7611                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7612
7613         /*
7614          * Ensure guest xcr0 is valid for loading
7615          */
7616         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7617
7618         vcpu->arch.cr0 |= X86_CR0_ET;
7619 }
7620
7621 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7622 {
7623         if (vcpu->guest_fpu_loaded)
7624                 return;
7625
7626         /*
7627          * Restore all possible states in the guest,
7628          * and assume host would use all available bits.
7629          * Guest xcr0 would be loaded later.
7630          */
7631         vcpu->guest_fpu_loaded = 1;
7632         __kernel_fpu_begin();
7633         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7634         trace_kvm_fpu(1);
7635 }
7636
7637 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7638 {
7639         if (!vcpu->guest_fpu_loaded)
7640                 return;
7641
7642         vcpu->guest_fpu_loaded = 0;
7643         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7644         __kernel_fpu_end();
7645         ++vcpu->stat.fpu_reload;
7646         trace_kvm_fpu(0);
7647 }
7648
7649 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7650 {
7651         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
7652
7653         kvmclock_reset(vcpu);
7654
7655         kvm_x86_ops->vcpu_free(vcpu);
7656         free_cpumask_var(wbinvd_dirty_mask);
7657 }
7658
7659 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7660                                                 unsigned int id)
7661 {
7662         struct kvm_vcpu *vcpu;
7663
7664         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7665                 printk_once(KERN_WARNING
7666                 "kvm: SMP vm created on host with unstable TSC; "
7667                 "guest TSC will not be reliable\n");
7668
7669         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7670
7671         return vcpu;
7672 }
7673
7674 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7675 {
7676         int r;
7677
7678         kvm_vcpu_mtrr_init(vcpu);
7679         r = vcpu_load(vcpu);
7680         if (r)
7681                 return r;
7682         kvm_vcpu_reset(vcpu, false);
7683         kvm_mmu_setup(vcpu);
7684         vcpu_put(vcpu);
7685         return r;
7686 }
7687
7688 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7689 {
7690         struct msr_data msr;
7691         struct kvm *kvm = vcpu->kvm;
7692
7693         kvm_hv_vcpu_postcreate(vcpu);
7694
7695         if (vcpu_load(vcpu))
7696                 return;
7697         msr.data = 0x0;
7698         msr.index = MSR_IA32_TSC;
7699         msr.host_initiated = true;
7700         kvm_write_tsc(vcpu, &msr);
7701         vcpu_put(vcpu);
7702
7703         if (!kvmclock_periodic_sync)
7704                 return;
7705
7706         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7707                                         KVMCLOCK_SYNC_PERIOD);
7708 }
7709
7710 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7711 {
7712         int r;
7713         vcpu->arch.apf.msr_val = 0;
7714
7715         r = vcpu_load(vcpu);
7716         BUG_ON(r);
7717         kvm_mmu_unload(vcpu);
7718         vcpu_put(vcpu);
7719
7720         kvm_x86_ops->vcpu_free(vcpu);
7721 }
7722
7723 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7724 {
7725         vcpu->arch.hflags = 0;
7726
7727         vcpu->arch.smi_pending = 0;
7728         atomic_set(&vcpu->arch.nmi_queued, 0);
7729         vcpu->arch.nmi_pending = 0;
7730         vcpu->arch.nmi_injected = false;
7731         kvm_clear_interrupt_queue(vcpu);
7732         kvm_clear_exception_queue(vcpu);
7733
7734         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7735         kvm_update_dr0123(vcpu);
7736         vcpu->arch.dr6 = DR6_INIT;
7737         kvm_update_dr6(vcpu);
7738         vcpu->arch.dr7 = DR7_FIXED_1;
7739         kvm_update_dr7(vcpu);
7740
7741         vcpu->arch.cr2 = 0;
7742
7743         kvm_make_request(KVM_REQ_EVENT, vcpu);
7744         vcpu->arch.apf.msr_val = 0;
7745         vcpu->arch.st.msr_val = 0;
7746
7747         kvmclock_reset(vcpu);
7748
7749         kvm_clear_async_pf_completion_queue(vcpu);
7750         kvm_async_pf_hash_reset(vcpu);
7751         vcpu->arch.apf.halted = false;
7752
7753         if (!init_event) {
7754                 kvm_pmu_reset(vcpu);
7755                 vcpu->arch.smbase = 0x30000;
7756
7757                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
7758                 vcpu->arch.msr_misc_features_enables = 0;
7759         }
7760
7761         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7762         vcpu->arch.regs_avail = ~0;
7763         vcpu->arch.regs_dirty = ~0;
7764
7765         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7766 }
7767
7768 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7769 {
7770         struct kvm_segment cs;
7771
7772         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7773         cs.selector = vector << 8;
7774         cs.base = vector << 12;
7775         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7776         kvm_rip_write(vcpu, 0);
7777 }
7778
7779 int kvm_arch_hardware_enable(void)
7780 {
7781         struct kvm *kvm;
7782         struct kvm_vcpu *vcpu;
7783         int i;
7784         int ret;
7785         u64 local_tsc;
7786         u64 max_tsc = 0;
7787         bool stable, backwards_tsc = false;
7788
7789         kvm_shared_msr_cpu_online();
7790         ret = kvm_x86_ops->hardware_enable();
7791         if (ret != 0)
7792                 return ret;
7793
7794         local_tsc = rdtsc();
7795         stable = !check_tsc_unstable();
7796         list_for_each_entry(kvm, &vm_list, vm_list) {
7797                 kvm_for_each_vcpu(i, vcpu, kvm) {
7798                         if (!stable && vcpu->cpu == smp_processor_id())
7799                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7800                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7801                                 backwards_tsc = true;
7802                                 if (vcpu->arch.last_host_tsc > max_tsc)
7803                                         max_tsc = vcpu->arch.last_host_tsc;
7804                         }
7805                 }
7806         }
7807
7808         /*
7809          * Sometimes, even reliable TSCs go backwards.  This happens on
7810          * platforms that reset TSC during suspend or hibernate actions, but
7811          * maintain synchronization.  We must compensate.  Fortunately, we can
7812          * detect that condition here, which happens early in CPU bringup,
7813          * before any KVM threads can be running.  Unfortunately, we can't
7814          * bring the TSCs fully up to date with real time, as we aren't yet far
7815          * enough into CPU bringup that we know how much real time has actually
7816          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7817          * variables that haven't been updated yet.
7818          *
7819          * So we simply find the maximum observed TSC above, then record the
7820          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7821          * the adjustment will be applied.  Note that we accumulate
7822          * adjustments, in case multiple suspend cycles happen before some VCPU
7823          * gets a chance to run again.  In the event that no KVM threads get a
7824          * chance to run, we will miss the entire elapsed period, as we'll have
7825          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7826          * loose cycle time.  This isn't too big a deal, since the loss will be
7827          * uniform across all VCPUs (not to mention the scenario is extremely
7828          * unlikely). It is possible that a second hibernate recovery happens
7829          * much faster than a first, causing the observed TSC here to be
7830          * smaller; this would require additional padding adjustment, which is
7831          * why we set last_host_tsc to the local tsc observed here.
7832          *
7833          * N.B. - this code below runs only on platforms with reliable TSC,
7834          * as that is the only way backwards_tsc is set above.  Also note
7835          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7836          * have the same delta_cyc adjustment applied if backwards_tsc
7837          * is detected.  Note further, this adjustment is only done once,
7838          * as we reset last_host_tsc on all VCPUs to stop this from being
7839          * called multiple times (one for each physical CPU bringup).
7840          *
7841          * Platforms with unreliable TSCs don't have to deal with this, they
7842          * will be compensated by the logic in vcpu_load, which sets the TSC to
7843          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7844          * guarantee that they stay in perfect synchronization.
7845          */
7846         if (backwards_tsc) {
7847                 u64 delta_cyc = max_tsc - local_tsc;
7848                 list_for_each_entry(kvm, &vm_list, vm_list) {
7849                         kvm->arch.backwards_tsc_observed = true;
7850                         kvm_for_each_vcpu(i, vcpu, kvm) {
7851                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7852                                 vcpu->arch.last_host_tsc = local_tsc;
7853                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7854                         }
7855
7856                         /*
7857                          * We have to disable TSC offset matching.. if you were
7858                          * booting a VM while issuing an S4 host suspend....
7859                          * you may have some problem.  Solving this issue is
7860                          * left as an exercise to the reader.
7861                          */
7862                         kvm->arch.last_tsc_nsec = 0;
7863                         kvm->arch.last_tsc_write = 0;
7864                 }
7865
7866         }
7867         return 0;
7868 }
7869
7870 void kvm_arch_hardware_disable(void)
7871 {
7872         kvm_x86_ops->hardware_disable();
7873         drop_user_return_notifiers();
7874 }
7875
7876 int kvm_arch_hardware_setup(void)
7877 {
7878         int r;
7879
7880         r = kvm_x86_ops->hardware_setup();
7881         if (r != 0)
7882                 return r;
7883
7884         if (kvm_has_tsc_control) {
7885                 /*
7886                  * Make sure the user can only configure tsc_khz values that
7887                  * fit into a signed integer.
7888                  * A min value is not calculated needed because it will always
7889                  * be 1 on all machines.
7890                  */
7891                 u64 max = min(0x7fffffffULL,
7892                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
7893                 kvm_max_guest_tsc_khz = max;
7894
7895                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7896         }
7897
7898         kvm_init_msr_list();
7899         return 0;
7900 }
7901
7902 void kvm_arch_hardware_unsetup(void)
7903 {
7904         kvm_x86_ops->hardware_unsetup();
7905 }
7906
7907 void kvm_arch_check_processor_compat(void *rtn)
7908 {
7909         kvm_x86_ops->check_processor_compatibility(rtn);
7910 }
7911
7912 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7913 {
7914         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7915 }
7916 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7917
7918 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7919 {
7920         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7921 }
7922
7923 struct static_key kvm_no_apic_vcpu __read_mostly;
7924 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7925
7926 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7927 {
7928         struct page *page;
7929         struct kvm *kvm;
7930         int r;
7931
7932         BUG_ON(vcpu->kvm == NULL);
7933         kvm = vcpu->kvm;
7934
7935         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7936         vcpu->arch.pv.pv_unhalted = false;
7937         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7938         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7939                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7940         else
7941                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7942
7943         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7944         if (!page) {
7945                 r = -ENOMEM;
7946                 goto fail;
7947         }
7948         vcpu->arch.pio_data = page_address(page);
7949
7950         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7951
7952         r = kvm_mmu_create(vcpu);
7953         if (r < 0)
7954                 goto fail_free_pio_data;
7955
7956         if (irqchip_in_kernel(kvm)) {
7957                 r = kvm_create_lapic(vcpu);
7958                 if (r < 0)
7959                         goto fail_mmu_destroy;
7960         } else
7961                 static_key_slow_inc(&kvm_no_apic_vcpu);
7962
7963         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7964                                        GFP_KERNEL);
7965         if (!vcpu->arch.mce_banks) {
7966                 r = -ENOMEM;
7967                 goto fail_free_lapic;
7968         }
7969         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7970
7971         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7972                 r = -ENOMEM;
7973                 goto fail_free_mce_banks;
7974         }
7975
7976         fx_init(vcpu);
7977
7978         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7979         vcpu->arch.pv_time_enabled = false;
7980
7981         vcpu->arch.guest_supported_xcr0 = 0;
7982         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7983
7984         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7985
7986         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7987
7988         kvm_async_pf_hash_reset(vcpu);
7989         kvm_pmu_init(vcpu);
7990
7991         vcpu->arch.pending_external_vector = -1;
7992         vcpu->arch.preempted_in_kernel = false;
7993
7994         kvm_hv_vcpu_init(vcpu);
7995
7996         return 0;
7997
7998 fail_free_mce_banks:
7999         kfree(vcpu->arch.mce_banks);
8000 fail_free_lapic:
8001         kvm_free_lapic(vcpu);
8002 fail_mmu_destroy:
8003         kvm_mmu_destroy(vcpu);
8004 fail_free_pio_data:
8005         free_page((unsigned long)vcpu->arch.pio_data);
8006 fail:
8007         return r;
8008 }
8009
8010 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8011 {
8012         int idx;
8013
8014         kvm_hv_vcpu_uninit(vcpu);
8015         kvm_pmu_destroy(vcpu);
8016         kfree(vcpu->arch.mce_banks);
8017         kvm_free_lapic(vcpu);
8018         idx = srcu_read_lock(&vcpu->kvm->srcu);
8019         kvm_mmu_destroy(vcpu);
8020         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8021         free_page((unsigned long)vcpu->arch.pio_data);
8022         if (!lapic_in_kernel(vcpu))
8023                 static_key_slow_dec(&kvm_no_apic_vcpu);
8024 }
8025
8026 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8027 {
8028         kvm_x86_ops->sched_in(vcpu, cpu);
8029 }
8030
8031 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8032 {
8033         if (type)
8034                 return -EINVAL;
8035
8036         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8037         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8038         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8039         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8040         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8041
8042         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8043         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8044         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8045         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8046                 &kvm->arch.irq_sources_bitmap);
8047
8048         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8049         mutex_init(&kvm->arch.apic_map_lock);
8050         mutex_init(&kvm->arch.hyperv.hv_lock);
8051         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8052
8053         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8054         pvclock_update_vm_gtod_copy(kvm);
8055
8056         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8057         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8058
8059         kvm_page_track_init(kvm);
8060         kvm_mmu_init_vm(kvm);
8061
8062         if (kvm_x86_ops->vm_init)
8063                 return kvm_x86_ops->vm_init(kvm);
8064
8065         return 0;
8066 }
8067
8068 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8069 {
8070         int r;
8071         r = vcpu_load(vcpu);
8072         BUG_ON(r);
8073         kvm_mmu_unload(vcpu);
8074         vcpu_put(vcpu);
8075 }
8076
8077 static void kvm_free_vcpus(struct kvm *kvm)
8078 {
8079         unsigned int i;
8080         struct kvm_vcpu *vcpu;
8081
8082         /*
8083          * Unpin any mmu pages first.
8084          */
8085         kvm_for_each_vcpu(i, vcpu, kvm) {
8086                 kvm_clear_async_pf_completion_queue(vcpu);
8087                 kvm_unload_vcpu_mmu(vcpu);
8088         }
8089         kvm_for_each_vcpu(i, vcpu, kvm)
8090                 kvm_arch_vcpu_free(vcpu);
8091
8092         mutex_lock(&kvm->lock);
8093         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8094                 kvm->vcpus[i] = NULL;
8095
8096         atomic_set(&kvm->online_vcpus, 0);
8097         mutex_unlock(&kvm->lock);
8098 }
8099
8100 void kvm_arch_sync_events(struct kvm *kvm)
8101 {
8102         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8103         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8104         kvm_free_pit(kvm);
8105 }
8106
8107 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8108 {
8109         int i, r;
8110         unsigned long hva;
8111         struct kvm_memslots *slots = kvm_memslots(kvm);
8112         struct kvm_memory_slot *slot, old;
8113
8114         /* Called with kvm->slots_lock held.  */
8115         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8116                 return -EINVAL;
8117
8118         slot = id_to_memslot(slots, id);
8119         if (size) {
8120                 if (slot->npages)
8121                         return -EEXIST;
8122
8123                 /*
8124                  * MAP_SHARED to prevent internal slot pages from being moved
8125                  * by fork()/COW.
8126                  */
8127                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8128                               MAP_SHARED | MAP_ANONYMOUS, 0);
8129                 if (IS_ERR((void *)hva))
8130                         return PTR_ERR((void *)hva);
8131         } else {
8132                 if (!slot->npages)
8133                         return 0;
8134
8135                 hva = 0;
8136         }
8137
8138         old = *slot;
8139         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8140                 struct kvm_userspace_memory_region m;
8141
8142                 m.slot = id | (i << 16);
8143                 m.flags = 0;
8144                 m.guest_phys_addr = gpa;
8145                 m.userspace_addr = hva;
8146                 m.memory_size = size;
8147                 r = __kvm_set_memory_region(kvm, &m);
8148                 if (r < 0)
8149                         return r;
8150         }
8151
8152         if (!size) {
8153                 r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8154                 WARN_ON(r < 0);
8155         }
8156
8157         return 0;
8158 }
8159 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8160
8161 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8162 {
8163         int r;
8164
8165         mutex_lock(&kvm->slots_lock);
8166         r = __x86_set_memory_region(kvm, id, gpa, size);
8167         mutex_unlock(&kvm->slots_lock);
8168
8169         return r;
8170 }
8171 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8172
8173 void kvm_arch_destroy_vm(struct kvm *kvm)
8174 {
8175         if (current->mm == kvm->mm) {
8176                 /*
8177                  * Free memory regions allocated on behalf of userspace,
8178                  * unless the the memory map has changed due to process exit
8179                  * or fd copying.
8180                  */
8181                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8182                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8183                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8184         }
8185         if (kvm_x86_ops->vm_destroy)
8186                 kvm_x86_ops->vm_destroy(kvm);
8187         kvm_pic_destroy(kvm);
8188         kvm_ioapic_destroy(kvm);
8189         kvm_free_vcpus(kvm);
8190         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8191         kvm_mmu_uninit_vm(kvm);
8192         kvm_page_track_cleanup(kvm);
8193 }
8194
8195 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8196                            struct kvm_memory_slot *dont)
8197 {
8198         int i;
8199
8200         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8201                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8202                         kvfree(free->arch.rmap[i]);
8203                         free->arch.rmap[i] = NULL;
8204                 }
8205                 if (i == 0)
8206                         continue;
8207
8208                 if (!dont || free->arch.lpage_info[i - 1] !=
8209                              dont->arch.lpage_info[i - 1]) {
8210                         kvfree(free->arch.lpage_info[i - 1]);
8211                         free->arch.lpage_info[i - 1] = NULL;
8212                 }
8213         }
8214
8215         kvm_page_track_free_memslot(free, dont);
8216 }
8217
8218 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8219                             unsigned long npages)
8220 {
8221         int i;
8222
8223         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8224                 struct kvm_lpage_info *linfo;
8225                 unsigned long ugfn;
8226                 int lpages;
8227                 int level = i + 1;
8228
8229                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8230                                       slot->base_gfn, level) + 1;
8231
8232                 slot->arch.rmap[i] =
8233                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8234                 if (!slot->arch.rmap[i])
8235                         goto out_free;
8236                 if (i == 0)
8237                         continue;
8238
8239                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8240                 if (!linfo)
8241                         goto out_free;
8242
8243                 slot->arch.lpage_info[i - 1] = linfo;
8244
8245                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8246                         linfo[0].disallow_lpage = 1;
8247                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8248                         linfo[lpages - 1].disallow_lpage = 1;
8249                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8250                 /*
8251                  * If the gfn and userspace address are not aligned wrt each
8252                  * other, or if explicitly asked to, disable large page
8253                  * support for this slot
8254                  */
8255                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8256                     !kvm_largepages_enabled()) {
8257                         unsigned long j;
8258
8259                         for (j = 0; j < lpages; ++j)
8260                                 linfo[j].disallow_lpage = 1;
8261                 }
8262         }
8263
8264         if (kvm_page_track_create_memslot(slot, npages))
8265                 goto out_free;
8266
8267         return 0;
8268
8269 out_free:
8270         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8271                 kvfree(slot->arch.rmap[i]);
8272                 slot->arch.rmap[i] = NULL;
8273                 if (i == 0)
8274                         continue;
8275
8276                 kvfree(slot->arch.lpage_info[i - 1]);
8277                 slot->arch.lpage_info[i - 1] = NULL;
8278         }
8279         return -ENOMEM;
8280 }
8281
8282 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8283 {
8284         /*
8285          * memslots->generation has been incremented.
8286          * mmio generation may have reached its maximum value.
8287          */
8288         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8289 }
8290
8291 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8292                                 struct kvm_memory_slot *memslot,
8293                                 const struct kvm_userspace_memory_region *mem,
8294                                 enum kvm_mr_change change)
8295 {
8296         return 0;
8297 }
8298
8299 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8300                                      struct kvm_memory_slot *new)
8301 {
8302         /* Still write protect RO slot */
8303         if (new->flags & KVM_MEM_READONLY) {
8304                 kvm_mmu_slot_remove_write_access(kvm, new);
8305                 return;
8306         }
8307
8308         /*
8309          * Call kvm_x86_ops dirty logging hooks when they are valid.
8310          *
8311          * kvm_x86_ops->slot_disable_log_dirty is called when:
8312          *
8313          *  - KVM_MR_CREATE with dirty logging is disabled
8314          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8315          *
8316          * The reason is, in case of PML, we need to set D-bit for any slots
8317          * with dirty logging disabled in order to eliminate unnecessary GPA
8318          * logging in PML buffer (and potential PML buffer full VMEXT). This
8319          * guarantees leaving PML enabled during guest's lifetime won't have
8320          * any additonal overhead from PML when guest is running with dirty
8321          * logging disabled for memory slots.
8322          *
8323          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8324          * to dirty logging mode.
8325          *
8326          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8327          *
8328          * In case of write protect:
8329          *
8330          * Write protect all pages for dirty logging.
8331          *
8332          * All the sptes including the large sptes which point to this
8333          * slot are set to readonly. We can not create any new large
8334          * spte on this slot until the end of the logging.
8335          *
8336          * See the comments in fast_page_fault().
8337          */
8338         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8339                 if (kvm_x86_ops->slot_enable_log_dirty)
8340                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8341                 else
8342                         kvm_mmu_slot_remove_write_access(kvm, new);
8343         } else {
8344                 if (kvm_x86_ops->slot_disable_log_dirty)
8345                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8346         }
8347 }
8348
8349 void kvm_arch_commit_memory_region(struct kvm *kvm,
8350                                 const struct kvm_userspace_memory_region *mem,
8351                                 const struct kvm_memory_slot *old,
8352                                 const struct kvm_memory_slot *new,
8353                                 enum kvm_mr_change change)
8354 {
8355         int nr_mmu_pages = 0;
8356
8357         if (!kvm->arch.n_requested_mmu_pages)
8358                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8359
8360         if (nr_mmu_pages)
8361                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8362
8363         /*
8364          * Dirty logging tracks sptes in 4k granularity, meaning that large
8365          * sptes have to be split.  If live migration is successful, the guest
8366          * in the source machine will be destroyed and large sptes will be
8367          * created in the destination. However, if the guest continues to run
8368          * in the source machine (for example if live migration fails), small
8369          * sptes will remain around and cause bad performance.
8370          *
8371          * Scan sptes if dirty logging has been stopped, dropping those
8372          * which can be collapsed into a single large-page spte.  Later
8373          * page faults will create the large-page sptes.
8374          */
8375         if ((change != KVM_MR_DELETE) &&
8376                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8377                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8378                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8379
8380         /*
8381          * Set up write protection and/or dirty logging for the new slot.
8382          *
8383          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8384          * been zapped so no dirty logging staff is needed for old slot. For
8385          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8386          * new and it's also covered when dealing with the new slot.
8387          *
8388          * FIXME: const-ify all uses of struct kvm_memory_slot.
8389          */
8390         if (change != KVM_MR_DELETE)
8391                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8392 }
8393
8394 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8395 {
8396         kvm_mmu_invalidate_zap_all_pages(kvm);
8397 }
8398
8399 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8400                                    struct kvm_memory_slot *slot)
8401 {
8402         kvm_page_track_flush_slot(kvm, slot);
8403 }
8404
8405 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8406 {
8407         if (!list_empty_careful(&vcpu->async_pf.done))
8408                 return true;
8409
8410         if (kvm_apic_has_events(vcpu))
8411                 return true;
8412
8413         if (vcpu->arch.pv.pv_unhalted)
8414                 return true;
8415
8416         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
8417             (vcpu->arch.nmi_pending &&
8418              kvm_x86_ops->nmi_allowed(vcpu)))
8419                 return true;
8420
8421         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
8422             (vcpu->arch.smi_pending && !is_smm(vcpu)))
8423                 return true;
8424
8425         if (kvm_arch_interrupt_allowed(vcpu) &&
8426             kvm_cpu_has_interrupt(vcpu))
8427                 return true;
8428
8429         if (kvm_hv_has_stimer_pending(vcpu))
8430                 return true;
8431
8432         return false;
8433 }
8434
8435 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
8436 {
8437         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8438 }
8439
8440 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
8441 {
8442         return vcpu->arch.preempted_in_kernel;
8443 }
8444
8445 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8446 {
8447         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8448 }
8449
8450 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
8451 {
8452         return kvm_x86_ops->interrupt_allowed(vcpu);
8453 }
8454
8455 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
8456 {
8457         if (is_64_bit_mode(vcpu))
8458                 return kvm_rip_read(vcpu);
8459         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
8460                      kvm_rip_read(vcpu));
8461 }
8462 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
8463
8464 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
8465 {
8466         return kvm_get_linear_rip(vcpu) == linear_rip;
8467 }
8468 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
8469
8470 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
8471 {
8472         unsigned long rflags;
8473
8474         rflags = kvm_x86_ops->get_rflags(vcpu);
8475         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8476                 rflags &= ~X86_EFLAGS_TF;
8477         return rflags;
8478 }
8479 EXPORT_SYMBOL_GPL(kvm_get_rflags);
8480
8481 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8482 {
8483         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
8484             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8485                 rflags |= X86_EFLAGS_TF;
8486         kvm_x86_ops->set_rflags(vcpu, rflags);
8487 }
8488
8489 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8490 {
8491         __kvm_set_rflags(vcpu, rflags);
8492         kvm_make_request(KVM_REQ_EVENT, vcpu);
8493 }
8494 EXPORT_SYMBOL_GPL(kvm_set_rflags);
8495
8496 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
8497 {
8498         int r;
8499
8500         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8501               work->wakeup_all)
8502                 return;
8503
8504         r = kvm_mmu_reload(vcpu);
8505         if (unlikely(r))
8506                 return;
8507
8508         if (!vcpu->arch.mmu.direct_map &&
8509               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
8510                 return;
8511
8512         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
8513 }
8514
8515 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
8516 {
8517         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
8518 }
8519
8520 static inline u32 kvm_async_pf_next_probe(u32 key)
8521 {
8522         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
8523 }
8524
8525 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8526 {
8527         u32 key = kvm_async_pf_hash_fn(gfn);
8528
8529         while (vcpu->arch.apf.gfns[key] != ~0)
8530                 key = kvm_async_pf_next_probe(key);
8531
8532         vcpu->arch.apf.gfns[key] = gfn;
8533 }
8534
8535 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
8536 {
8537         int i;
8538         u32 key = kvm_async_pf_hash_fn(gfn);
8539
8540         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
8541                      (vcpu->arch.apf.gfns[key] != gfn &&
8542                       vcpu->arch.apf.gfns[key] != ~0); i++)
8543                 key = kvm_async_pf_next_probe(key);
8544
8545         return key;
8546 }
8547
8548 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8549 {
8550         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
8551 }
8552
8553 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
8554 {
8555         u32 i, j, k;
8556
8557         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
8558         while (true) {
8559                 vcpu->arch.apf.gfns[i] = ~0;
8560                 do {
8561                         j = kvm_async_pf_next_probe(j);
8562                         if (vcpu->arch.apf.gfns[j] == ~0)
8563                                 return;
8564                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
8565                         /*
8566                          * k lies cyclically in ]i,j]
8567                          * |    i.k.j |
8568                          * |....j i.k.| or  |.k..j i...|
8569                          */
8570                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
8571                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
8572                 i = j;
8573         }
8574 }
8575
8576 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
8577 {
8578
8579         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
8580                                       sizeof(val));
8581 }
8582
8583 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
8584                                      struct kvm_async_pf *work)
8585 {
8586         struct x86_exception fault;
8587
8588         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
8589         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
8590
8591         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
8592             (vcpu->arch.apf.send_user_only &&
8593              kvm_x86_ops->get_cpl(vcpu) == 0))
8594                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
8595         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
8596                 fault.vector = PF_VECTOR;
8597                 fault.error_code_valid = true;
8598                 fault.error_code = 0;
8599                 fault.nested_page_fault = false;
8600                 fault.address = work->arch.token;
8601                 fault.async_page_fault = true;
8602                 kvm_inject_page_fault(vcpu, &fault);
8603         }
8604 }
8605
8606 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
8607                                  struct kvm_async_pf *work)
8608 {
8609         struct x86_exception fault;
8610
8611         if (work->wakeup_all)
8612                 work->arch.token = ~0; /* broadcast wakeup */
8613         else
8614                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
8615         trace_kvm_async_pf_ready(work->arch.token, work->gva);
8616
8617         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
8618             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
8619                 fault.vector = PF_VECTOR;
8620                 fault.error_code_valid = true;
8621                 fault.error_code = 0;
8622                 fault.nested_page_fault = false;
8623                 fault.address = work->arch.token;
8624                 fault.async_page_fault = true;
8625                 kvm_inject_page_fault(vcpu, &fault);
8626         }
8627         vcpu->arch.apf.halted = false;
8628         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8629 }
8630
8631 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
8632 {
8633         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
8634                 return true;
8635         else
8636                 return kvm_can_do_async_pf(vcpu);
8637 }
8638
8639 void kvm_arch_start_assignment(struct kvm *kvm)
8640 {
8641         atomic_inc(&kvm->arch.assigned_device_count);
8642 }
8643 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
8644
8645 void kvm_arch_end_assignment(struct kvm *kvm)
8646 {
8647         atomic_dec(&kvm->arch.assigned_device_count);
8648 }
8649 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8650
8651 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8652 {
8653         return atomic_read(&kvm->arch.assigned_device_count);
8654 }
8655 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8656
8657 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8658 {
8659         atomic_inc(&kvm->arch.noncoherent_dma_count);
8660 }
8661 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8662
8663 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8664 {
8665         atomic_dec(&kvm->arch.noncoherent_dma_count);
8666 }
8667 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8668
8669 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8670 {
8671         return atomic_read(&kvm->arch.noncoherent_dma_count);
8672 }
8673 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8674
8675 bool kvm_arch_has_irq_bypass(void)
8676 {
8677         return kvm_x86_ops->update_pi_irte != NULL;
8678 }
8679
8680 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
8681                                       struct irq_bypass_producer *prod)
8682 {
8683         struct kvm_kernel_irqfd *irqfd =
8684                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8685
8686         irqfd->producer = prod;
8687
8688         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
8689                                            prod->irq, irqfd->gsi, 1);
8690 }
8691
8692 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
8693                                       struct irq_bypass_producer *prod)
8694 {
8695         int ret;
8696         struct kvm_kernel_irqfd *irqfd =
8697                 container_of(cons, struct kvm_kernel_irqfd, consumer);
8698
8699         WARN_ON(irqfd->producer != prod);
8700         irqfd->producer = NULL;
8701
8702         /*
8703          * When producer of consumer is unregistered, we change back to
8704          * remapped mode, so we can re-use the current implementation
8705          * when the irq is masked/disabled or the consumer side (KVM
8706          * int this case doesn't want to receive the interrupts.
8707         */
8708         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
8709         if (ret)
8710                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
8711                        " fails: %d\n", irqfd->consumer.token, ret);
8712 }
8713
8714 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
8715                                    uint32_t guest_irq, bool set)
8716 {
8717         if (!kvm_x86_ops->update_pi_irte)
8718                 return -EINVAL;
8719
8720         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
8721 }
8722
8723 bool kvm_vector_hashing_enabled(void)
8724 {
8725         return vector_hashing;
8726 }
8727 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
8728
8729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8730 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
8731 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8732 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8733 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8734 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8735 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8736 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8737 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8738 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8739 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8740 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8741 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8742 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8743 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8744 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
8745 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
8746 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
8747 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);