arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/sched/isolation.h>
  58 #include <linux/mem_encrypt.h>
  59 #include <linux/entry-kvm.h>
  60
  61 #include <trace/events/kvm.h>
  62
  63 #include <asm/debugreg.h>
  64 #include <asm/msr.h>
  65 #include <asm/desc.h>
  66 #include <asm/mce.h>
  67 #include <linux/kernel_stat.h>
  68 #include <asm/fpu/internal.h> /* Ugh! */
  69 #include <asm/pvclock.h>
  70 #include <asm/div64.h>
  71 #include <asm/irq_remapping.h>
  72 #include <asm/mshyperv.h>
  73 #include <asm/hypervisor.h>
  74 #include <asm/tlbflush.h>
  75 #include <asm/intel_pt.h>
  76 #include <asm/emulate_prefix.h>
  77 #include <clocksource/hyperv_timer.h>
  78
  79 #define CREATE_TRACE_POINTS
  80 #include "trace.h"
  81
  82 #define MAX_IO_MSRS 256
  83 #define KVM_MAX_MCE_BANKS 32
  84 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  85 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  86
  87 #define emul_to_vcpu(ctxt) \
  88         ((struct kvm_vcpu *)(ctxt)->vcpu)
  89
  90 /* EFER defaults:
  91  * - enable syscall per default because its emulated by KVM
  92  * - enable LME and LMA per default on 64 bit KVM
  93  */
  94 #ifdef CONFIG_X86_64
  95 static
  96 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  97 #else
  98 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  99 #endif
 100
 101 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 102
 103 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 104                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 105
 106 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 107 static void process_nmi(struct kvm_vcpu *vcpu);
 108 static void enter_smm(struct kvm_vcpu *vcpu);
 109 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 110 static void store_regs(struct kvm_vcpu *vcpu);
 111 static int sync_regs(struct kvm_vcpu *vcpu);
 112
 113 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 114 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 115
 116 static bool __read_mostly ignore_msrs = 0;
 117 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 118
 119 static bool __read_mostly report_ignored_msrs = true;
 120 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 121
 122 unsigned int min_timer_period_us = 200;
 123 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 124
 125 static bool __read_mostly kvmclock_periodic_sync = true;
 126 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 127
 128 bool __read_mostly kvm_has_tsc_control;
 129 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 130 u32  __read_mostly kvm_max_guest_tsc_khz;
 131 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 132 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 133 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 134 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 135 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 136 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 137 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 138
 139 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 140 static u32 __read_mostly tsc_tolerance_ppm = 250;
 141 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 142
 143 /*
 144  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 145  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 146  * advancement entirely.  Any other value is used as-is and disables adaptive
 147  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 148  */
 149 static int __read_mostly lapic_timer_advance_ns = -1;
 150 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 151
 152 static bool __read_mostly vector_hashing = true;
 153 module_param(vector_hashing, bool, S_IRUGO);
 154
 155 bool __read_mostly enable_vmware_backdoor = false;
 156 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 157 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 158
 159 static bool __read_mostly force_emulation_prefix = false;
 160 module_param(force_emulation_prefix, bool, S_IRUGO);
 161
 162 int __read_mostly pi_inject_timer = -1;
 163 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * Restoring the host value for MSRs that are only consumed when running in
 167  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 168  * returns to userspace, i.e. the kernel can run with the guest's value.
 169  */
 170 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 171
 172 struct kvm_user_return_msrs_global {
 173         int nr;
 174         u32 msrs[KVM_MAX_NR_USER_RETURN_MSRS];
 175 };
 176
 177 struct kvm_user_return_msrs {
 178         struct user_return_notifier urn;
 179         bool registered;
 180         struct kvm_user_return_msr_values {
 181                 u64 host;
 182                 u64 curr;
 183         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 184 };
 185
 186 static struct kvm_user_return_msrs_global __read_mostly user_return_msrs_global;
 187 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 188
 189 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 190                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 191                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 192                                 | XFEATURE_MASK_PKRU)
 193
 194 u64 __read_mostly host_efer;
 195 EXPORT_SYMBOL_GPL(host_efer);
 196
 197 bool __read_mostly allow_smaller_maxphyaddr;
 198 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 199
 200 static u64 __read_mostly host_xss;
 201 u64 __read_mostly supported_xss;
 202 EXPORT_SYMBOL_GPL(supported_xss);
 203
 204 struct kvm_stats_debugfs_item debugfs_entries[] = {
 205         VCPU_STAT("pf_fixed", pf_fixed),
 206         VCPU_STAT("pf_guest", pf_guest),
 207         VCPU_STAT("tlb_flush", tlb_flush),
 208         VCPU_STAT("invlpg", invlpg),
 209         VCPU_STAT("exits", exits),
 210         VCPU_STAT("io_exits", io_exits),
 211         VCPU_STAT("mmio_exits", mmio_exits),
 212         VCPU_STAT("signal_exits", signal_exits),
 213         VCPU_STAT("irq_window", irq_window_exits),
 214         VCPU_STAT("nmi_window", nmi_window_exits),
 215         VCPU_STAT("halt_exits", halt_exits),
 216         VCPU_STAT("halt_successful_poll", halt_successful_poll),
 217         VCPU_STAT("halt_attempted_poll", halt_attempted_poll),
 218         VCPU_STAT("halt_poll_invalid", halt_poll_invalid),
 219         VCPU_STAT("halt_wakeup", halt_wakeup),
 220         VCPU_STAT("hypercalls", hypercalls),
 221         VCPU_STAT("request_irq", request_irq_exits),
 222         VCPU_STAT("irq_exits", irq_exits),
 223         VCPU_STAT("host_state_reload", host_state_reload),
 224         VCPU_STAT("fpu_reload", fpu_reload),
 225         VCPU_STAT("insn_emulation", insn_emulation),
 226         VCPU_STAT("insn_emulation_fail", insn_emulation_fail),
 227         VCPU_STAT("irq_injections", irq_injections),
 228         VCPU_STAT("nmi_injections", nmi_injections),
 229         VCPU_STAT("req_event", req_event),
 230         VCPU_STAT("l1d_flush", l1d_flush),
 231         VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns),
 232         VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns),
 233         VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped),
 234         VM_STAT("mmu_pte_write", mmu_pte_write),
 235         VM_STAT("mmu_pte_updated", mmu_pte_updated),
 236         VM_STAT("mmu_pde_zapped", mmu_pde_zapped),
 237         VM_STAT("mmu_flooded", mmu_flooded),
 238         VM_STAT("mmu_recycled", mmu_recycled),
 239         VM_STAT("mmu_cache_miss", mmu_cache_miss),
 240         VM_STAT("mmu_unsync", mmu_unsync),
 241         VM_STAT("remote_tlb_flush", remote_tlb_flush),
 242         VM_STAT("largepages", lpages, .mode = 0444),
 243         VM_STAT("nx_largepages_splitted", nx_lpage_splits, .mode = 0444),
 244         VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions),
 245         { NULL }
 246 };
 247
 248 u64 __read_mostly host_xcr0;
 249 u64 __read_mostly supported_xcr0;
 250 EXPORT_SYMBOL_GPL(supported_xcr0);
 251
 252 static struct kmem_cache *x86_fpu_cache;
 253
 254 static struct kmem_cache *x86_emulator_cache;
 255
 256 /*
 257  * When called, it means the previous get/set msr reached an invalid msr.
 258  * Return 0 if we want to ignore/silent this failed msr access, or 1 if we want
 259  * to fail the caller.
 260  */
 261 static int kvm_msr_ignored_check(struct kvm_vcpu *vcpu, u32 msr,
 262                                  u64 data, bool write)
 263 {
 264         const char *op = write ? "wrmsr" : "rdmsr";
 265
 266         if (ignore_msrs) {
 267                 if (report_ignored_msrs)
 268                         vcpu_unimpl(vcpu, "ignored %s: 0x%x data 0x%llx\n",
 269                                     op, msr, data);
 270                 /* Mask the error */
 271                 return 0;
 272         } else {
 273                 vcpu_debug_ratelimited(vcpu, "unhandled %s: 0x%x data 0x%llx\n",
 274                                        op, msr, data);
 275                 return -ENOENT;
 276         }
 277 }
 278
 279 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 280 {
 281         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 282         unsigned int size = sizeof(struct x86_emulate_ctxt);
 283
 284         return kmem_cache_create_usercopy("x86_emulator", size,
 285                                           __alignof__(struct x86_emulate_ctxt),
 286                                           SLAB_ACCOUNT, useroffset,
 287                                           size - useroffset, NULL);
 288 }
 289
 290 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 291
 292 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 293 {
 294         int i;
 295         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 296                 vcpu->arch.apf.gfns[i] = ~0;
 297 }
 298
 299 static void kvm_on_user_return(struct user_return_notifier *urn)
 300 {
 301         unsigned slot;
 302         struct kvm_user_return_msrs *msrs
 303                 = container_of(urn, struct kvm_user_return_msrs, urn);
 304         struct kvm_user_return_msr_values *values;
 305         unsigned long flags;
 306
 307         /*
 308          * Disabling irqs at this point since the following code could be
 309          * interrupted and executed through kvm_arch_hardware_disable()
 310          */
 311         local_irq_save(flags);
 312         if (msrs->registered) {
 313                 msrs->registered = false;
 314                 user_return_notifier_unregister(urn);
 315         }
 316         local_irq_restore(flags);
 317         for (slot = 0; slot < user_return_msrs_global.nr; ++slot) {
 318                 values = &msrs->values[slot];
 319                 if (values->host != values->curr) {
 320                         wrmsrl(user_return_msrs_global.msrs[slot], values->host);
 321                         values->curr = values->host;
 322                 }
 323         }
 324 }
 325
 326 void kvm_define_user_return_msr(unsigned slot, u32 msr)
 327 {
 328         BUG_ON(slot >= KVM_MAX_NR_USER_RETURN_MSRS);
 329         user_return_msrs_global.msrs[slot] = msr;
 330         if (slot >= user_return_msrs_global.nr)
 331                 user_return_msrs_global.nr = slot + 1;
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_define_user_return_msr);
 334
 335 static void kvm_user_return_msr_cpu_online(void)
 336 {
 337         unsigned int cpu = smp_processor_id();
 338         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 339         u64 value;
 340         int i;
 341
 342         for (i = 0; i < user_return_msrs_global.nr; ++i) {
 343                 rdmsrl_safe(user_return_msrs_global.msrs[i], &value);
 344                 msrs->values[i].host = value;
 345                 msrs->values[i].curr = value;
 346         }
 347 }
 348
 349 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 350 {
 351         unsigned int cpu = smp_processor_id();
 352         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 353         int err;
 354
 355         value = (value & mask) | (msrs->values[slot].host & ~mask);
 356         if (value == msrs->values[slot].curr)
 357                 return 0;
 358         err = wrmsrl_safe(user_return_msrs_global.msrs[slot], value);
 359         if (err)
 360                 return 1;
 361
 362         msrs->values[slot].curr = value;
 363         if (!msrs->registered) {
 364                 msrs->urn.on_user_return = kvm_on_user_return;
 365                 user_return_notifier_register(&msrs->urn);
 366                 msrs->registered = true;
 367         }
 368         return 0;
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 371
 372 static void drop_user_return_notifiers(void)
 373 {
 374         unsigned int cpu = smp_processor_id();
 375         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 376
 377         if (msrs->registered)
 378                 kvm_on_user_return(&msrs->urn);
 379 }
 380
 381 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 382 {
 383         return vcpu->arch.apic_base;
 384 }
 385 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 386
 387 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 388 {
 389         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 392
 393 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 394 {
 395         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 396         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 397         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 398                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 399
 400         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 401                 return 1;
 402         if (!msr_info->host_initiated) {
 403                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 404                         return 1;
 405                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 406                         return 1;
 407         }
 408
 409         kvm_lapic_set_base(vcpu, msr_info->data);
 410         kvm_recalculate_apic_map(vcpu->kvm);
 411         return 0;
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 414
 415 asmlinkage __visible noinstr void kvm_spurious_fault(void)
 416 {
 417         /* Fault while not rebooting.  We want the trace. */
 418         BUG_ON(!kvm_rebooting);
 419 }
 420 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 421
 422 #define EXCPT_BENIGN            0
 423 #define EXCPT_CONTRIBUTORY      1
 424 #define EXCPT_PF                2
 425
 426 static int exception_class(int vector)
 427 {
 428         switch (vector) {
 429         case PF_VECTOR:
 430                 return EXCPT_PF;
 431         case DE_VECTOR:
 432         case TS_VECTOR:
 433         case NP_VECTOR:
 434         case SS_VECTOR:
 435         case GP_VECTOR:
 436                 return EXCPT_CONTRIBUTORY;
 437         default:
 438                 break;
 439         }
 440         return EXCPT_BENIGN;
 441 }
 442
 443 #define EXCPT_FAULT             0
 444 #define EXCPT_TRAP              1
 445 #define EXCPT_ABORT             2
 446 #define EXCPT_INTERRUPT         3
 447
 448 static int exception_type(int vector)
 449 {
 450         unsigned int mask;
 451
 452         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 453                 return EXCPT_INTERRUPT;
 454
 455         mask = 1 << vector;
 456
 457         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 458         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 459                 return EXCPT_TRAP;
 460
 461         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 462                 return EXCPT_ABORT;
 463
 464         /* Reserved exceptions will result in fault */
 465         return EXCPT_FAULT;
 466 }
 467
 468 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 469 {
 470         unsigned nr = vcpu->arch.exception.nr;
 471         bool has_payload = vcpu->arch.exception.has_payload;
 472         unsigned long payload = vcpu->arch.exception.payload;
 473
 474         if (!has_payload)
 475                 return;
 476
 477         switch (nr) {
 478         case DB_VECTOR:
 479                 /*
 480                  * "Certain debug exceptions may clear bit 0-3.  The
 481                  * remaining contents of the DR6 register are never
 482                  * cleared by the processor".
 483                  */
 484                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 485                 /*
 486                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 487                  */
 488                 vcpu->arch.dr6 |= DR6_RTM;
 489                 vcpu->arch.dr6 |= payload;
 490                 /*
 491                  * Bit 16 should be set in the payload whenever the #DB
 492                  * exception should clear DR6.RTM. This makes the payload
 493                  * compatible with the pending debug exceptions under VMX.
 494                  * Though not currently documented in the SDM, this also
 495                  * makes the payload compatible with the exit qualification
 496                  * for #DB exceptions under VMX.
 497                  */
 498                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 499
 500                 /*
 501                  * The #DB payload is defined as compatible with the 'pending
 502                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 503                  * defined in the 'pending debug exceptions' field (enabled
 504                  * breakpoint), it is reserved and must be zero in DR6.
 505                  */
 506                 vcpu->arch.dr6 &= ~BIT(12);
 507                 break;
 508         case PF_VECTOR:
 509                 vcpu->arch.cr2 = payload;
 510                 break;
 511         }
 512
 513         vcpu->arch.exception.has_payload = false;
 514         vcpu->arch.exception.payload = 0;
 515 }
 516 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 517
 518 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 519                 unsigned nr, bool has_error, u32 error_code,
 520                 bool has_payload, unsigned long payload, bool reinject)
 521 {
 522         u32 prev_nr;
 523         int class1, class2;
 524
 525         kvm_make_request(KVM_REQ_EVENT, vcpu);
 526
 527         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 528         queue:
 529                 if (has_error && !is_protmode(vcpu))
 530                         has_error = false;
 531                 if (reinject) {
 532                         /*
 533                          * On vmentry, vcpu->arch.exception.pending is only
 534                          * true if an event injection was blocked by
 535                          * nested_run_pending.  In that case, however,
 536                          * vcpu_enter_guest requests an immediate exit,
 537                          * and the guest shouldn't proceed far enough to
 538                          * need reinjection.
 539                          */
 540                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 541                         vcpu->arch.exception.injected = true;
 542                         if (WARN_ON_ONCE(has_payload)) {
 543                                 /*
 544                                  * A reinjected event has already
 545                                  * delivered its payload.
 546                                  */
 547                                 has_payload = false;
 548                                 payload = 0;
 549                         }
 550                 } else {
 551                         vcpu->arch.exception.pending = true;
 552                         vcpu->arch.exception.injected = false;
 553                 }
 554                 vcpu->arch.exception.has_error_code = has_error;
 555                 vcpu->arch.exception.nr = nr;
 556                 vcpu->arch.exception.error_code = error_code;
 557                 vcpu->arch.exception.has_payload = has_payload;
 558                 vcpu->arch.exception.payload = payload;
 559                 if (!is_guest_mode(vcpu))
 560                         kvm_deliver_exception_payload(vcpu);
 561                 return;
 562         }
 563
 564         /* to check exception */
 565         prev_nr = vcpu->arch.exception.nr;
 566         if (prev_nr == DF_VECTOR) {
 567                 /* triple fault -> shutdown */
 568                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 569                 return;
 570         }
 571         class1 = exception_class(prev_nr);
 572         class2 = exception_class(nr);
 573         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 574                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 575                 /*
 576                  * Generate double fault per SDM Table 5-5.  Set
 577                  * exception.pending = true so that the double fault
 578                  * can trigger a nested vmexit.
 579                  */
 580                 vcpu->arch.exception.pending = true;
 581                 vcpu->arch.exception.injected = false;
 582                 vcpu->arch.exception.has_error_code = true;
 583                 vcpu->arch.exception.nr = DF_VECTOR;
 584                 vcpu->arch.exception.error_code = 0;
 585                 vcpu->arch.exception.has_payload = false;
 586                 vcpu->arch.exception.payload = 0;
 587         } else
 588                 /* replace previous exception with a new one in a hope
 589                    that instruction re-execution will regenerate lost
 590                    exception */
 591                 goto queue;
 592 }
 593
 594 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 595 {
 596         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 597 }
 598 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 599
 600 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 601 {
 602         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 603 }
 604 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 605
 606 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 607                            unsigned long payload)
 608 {
 609         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 610 }
 611 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 612
 613 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 614                                     u32 error_code, unsigned long payload)
 615 {
 616         kvm_multiple_exception(vcpu, nr, true, error_code,
 617                                true, payload, false);
 618 }
 619
 620 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 621 {
 622         if (err)
 623                 kvm_inject_gp(vcpu, 0);
 624         else
 625                 return kvm_skip_emulated_instruction(vcpu);
 626
 627         return 1;
 628 }
 629 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 630
 631 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 632 {
 633         ++vcpu->stat.pf_guest;
 634         vcpu->arch.exception.nested_apf =
 635                 is_guest_mode(vcpu) && fault->async_page_fault;
 636         if (vcpu->arch.exception.nested_apf) {
 637                 vcpu->arch.apf.nested_apf_token = fault->address;
 638                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 639         } else {
 640                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 641                                         fault->address);
 642         }
 643 }
 644 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 645
 646 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 647                                     struct x86_exception *fault)
 648 {
 649         struct kvm_mmu *fault_mmu;
 650         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 651
 652         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 653                                                vcpu->arch.walk_mmu;
 654
 655         /*
 656          * Invalidate the TLB entry for the faulting address, if it exists,
 657          * else the access will fault indefinitely (and to emulate hardware).
 658          */
 659         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 660             !(fault->error_code & PFERR_RSVD_MASK))
 661                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 662                                        fault_mmu->root_hpa);
 663
 664         fault_mmu->inject_page_fault(vcpu, fault);
 665         return fault->nested_page_fault;
 666 }
 667 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 668
 669 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 670 {
 671         atomic_inc(&vcpu->arch.nmi_queued);
 672         kvm_make_request(KVM_REQ_NMI, vcpu);
 673 }
 674 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 675
 676 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 677 {
 678         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 679 }
 680 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 681
 682 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 683 {
 684         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 687
 688 /*
 689  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 690  * a #GP and return false.
 691  */
 692 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 693 {
 694         if (kvm_x86_ops.get_cpl(vcpu) <= required_cpl)
 695                 return true;
 696         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 697         return false;
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 700
 701 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 702 {
 703         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 704                 return true;
 705
 706         kvm_queue_exception(vcpu, UD_VECTOR);
 707         return false;
 708 }
 709 EXPORT_SYMBOL_GPL(kvm_require_dr);
 710
 711 /*
 712  * This function will be used to read from the physical memory of the currently
 713  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 714  * can read from guest physical or from the guest's guest physical memory.
 715  */
 716 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 717                             gfn_t ngfn, void *data, int offset, int len,
 718                             u32 access)
 719 {
 720         struct x86_exception exception;
 721         gfn_t real_gfn;
 722         gpa_t ngpa;
 723
 724         ngpa     = gfn_to_gpa(ngfn);
 725         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 726         if (real_gfn == UNMAPPED_GVA)
 727                 return -EFAULT;
 728
 729         real_gfn = gpa_to_gfn(real_gfn);
 730
 731         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 732 }
 733 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 734
 735 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 736                                void *data, int offset, int len, u32 access)
 737 {
 738         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 739                                        data, offset, len, access);
 740 }
 741
 742 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 743 {
 744         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 745                rsvd_bits(1, 2);
 746 }
 747
 748 /*
 749  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 750  */
 751 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 752 {
 753         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 754         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 755         int i;
 756         int ret;
 757         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 758
 759         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 760                                       offset * sizeof(u64), sizeof(pdpte),
 761                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 762         if (ret < 0) {
 763                 ret = 0;
 764                 goto out;
 765         }
 766         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 767                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 768                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 769                         ret = 0;
 770                         goto out;
 771                 }
 772         }
 773         ret = 1;
 774
 775         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 776         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 777
 778 out:
 779
 780         return ret;
 781 }
 782 EXPORT_SYMBOL_GPL(load_pdptrs);
 783
 784 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 785 {
 786         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 787         int offset;
 788         gfn_t gfn;
 789         int r;
 790
 791         if (!is_pae_paging(vcpu))
 792                 return false;
 793
 794         if (!kvm_register_is_available(vcpu, VCPU_EXREG_PDPTR))
 795                 return true;
 796
 797         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 798         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 799         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 800                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 801         if (r < 0)
 802                 return true;
 803
 804         return memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 805 }
 806 EXPORT_SYMBOL_GPL(pdptrs_changed);
 807
 808 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 809 {
 810         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 811         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 812         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 813
 814         cr0 |= X86_CR0_ET;
 815
 816 #ifdef CONFIG_X86_64
 817         if (cr0 & 0xffffffff00000000UL)
 818                 return 1;
 819 #endif
 820
 821         cr0 &= ~CR0_RESERVED_BITS;
 822
 823         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 824                 return 1;
 825
 826         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 827                 return 1;
 828
 829 #ifdef CONFIG_X86_64
 830         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 831             (cr0 & X86_CR0_PG)) {
 832                 int cs_db, cs_l;
 833
 834                 if (!is_pae(vcpu))
 835                         return 1;
 836                 kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 837                 if (cs_l)
 838                         return 1;
 839         }
 840 #endif
 841         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 842             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 843             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 844                 return 1;
 845
 846         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 847                 return 1;
 848
 849         kvm_x86_ops.set_cr0(vcpu, cr0);
 850
 851         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 852                 kvm_clear_async_pf_completion_queue(vcpu);
 853                 kvm_async_pf_hash_reset(vcpu);
 854         }
 855
 856         if ((cr0 ^ old_cr0) & update_bits)
 857                 kvm_mmu_reset_context(vcpu);
 858
 859         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 860             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 861             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 862                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 863
 864         return 0;
 865 }
 866 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 867
 868 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 869 {
 870         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 871 }
 872 EXPORT_SYMBOL_GPL(kvm_lmsw);
 873
 874 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 875 {
 876         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 877
 878                 if (vcpu->arch.xcr0 != host_xcr0)
 879                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 880
 881                 if (vcpu->arch.xsaves_enabled &&
 882                     vcpu->arch.ia32_xss != host_xss)
 883                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 884         }
 885
 886         if (static_cpu_has(X86_FEATURE_PKU) &&
 887             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 888              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 889             vcpu->arch.pkru != vcpu->arch.host_pkru)
 890                 __write_pkru(vcpu->arch.pkru);
 891 }
 892 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 893
 894 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 895 {
 896         if (static_cpu_has(X86_FEATURE_PKU) &&
 897             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 898              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 899                 vcpu->arch.pkru = rdpkru();
 900                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 901                         __write_pkru(vcpu->arch.host_pkru);
 902         }
 903
 904         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 905
 906                 if (vcpu->arch.xcr0 != host_xcr0)
 907                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 908
 909                 if (vcpu->arch.xsaves_enabled &&
 910                     vcpu->arch.ia32_xss != host_xss)
 911                         wrmsrl(MSR_IA32_XSS, host_xss);
 912         }
 913
 914 }
 915 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 916
 917 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 918 {
 919         u64 xcr0 = xcr;
 920         u64 old_xcr0 = vcpu->arch.xcr0;
 921         u64 valid_bits;
 922
 923         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 924         if (index != XCR_XFEATURE_ENABLED_MASK)
 925                 return 1;
 926         if (!(xcr0 & XFEATURE_MASK_FP))
 927                 return 1;
 928         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 929                 return 1;
 930
 931         /*
 932          * Do not allow the guest to set bits that we do not support
 933          * saving.  However, xcr0 bit 0 is always set, even if the
 934          * emulated CPU does not support XSAVE (see fx_init).
 935          */
 936         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 937         if (xcr0 & ~valid_bits)
 938                 return 1;
 939
 940         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 941             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 942                 return 1;
 943
 944         if (xcr0 & XFEATURE_MASK_AVX512) {
 945                 if (!(xcr0 & XFEATURE_MASK_YMM))
 946                         return 1;
 947                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 948                         return 1;
 949         }
 950         vcpu->arch.xcr0 = xcr0;
 951
 952         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 953                 kvm_update_cpuid_runtime(vcpu);
 954         return 0;
 955 }
 956
 957 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 958 {
 959         if (kvm_x86_ops.get_cpl(vcpu) != 0 ||
 960             __kvm_set_xcr(vcpu, index, xcr)) {
 961                 kvm_inject_gp(vcpu, 0);
 962                 return 1;
 963         }
 964         return 0;
 965 }
 966 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 967
 968 int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 969 {
 970         if (cr4 & cr4_reserved_bits)
 971                 return -EINVAL;
 972
 973         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
 974                 return -EINVAL;
 975
 976         return 0;
 977 }
 978 EXPORT_SYMBOL_GPL(kvm_valid_cr4);
 979
 980 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 981 {
 982         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 983         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 984                                    X86_CR4_SMEP;
 985
 986         if (kvm_valid_cr4(vcpu, cr4))
 987                 return 1;
 988
 989         if (is_long_mode(vcpu)) {
 990                 if (!(cr4 & X86_CR4_PAE))
 991                         return 1;
 992                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
 993                         return 1;
 994         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 995                    && ((cr4 ^ old_cr4) & pdptr_bits)
 996                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 997                                    kvm_read_cr3(vcpu)))
 998                 return 1;
 999
1000         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1001                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1002                         return 1;
1003
1004                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1005                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1006                         return 1;
1007         }
1008
1009         if (kvm_x86_ops.set_cr4(vcpu, cr4))
1010                 return 1;
1011
1012         if (((cr4 ^ old_cr4) & pdptr_bits) ||
1013             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1014                 kvm_mmu_reset_context(vcpu);
1015
1016         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
1017                 kvm_update_cpuid_runtime(vcpu);
1018
1019         return 0;
1020 }
1021 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1022
1023 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1024 {
1025         bool skip_tlb_flush = false;
1026 #ifdef CONFIG_X86_64
1027         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1028
1029         if (pcid_enabled) {
1030                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1031                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1032         }
1033 #endif
1034
1035         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
1036                 if (!skip_tlb_flush) {
1037                         kvm_mmu_sync_roots(vcpu);
1038                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1039                 }
1040                 return 0;
1041         }
1042
1043         if (is_long_mode(vcpu) &&
1044             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
1045                 return 1;
1046         else if (is_pae_paging(vcpu) &&
1047                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1048                 return 1;
1049
1050         kvm_mmu_new_pgd(vcpu, cr3, skip_tlb_flush, skip_tlb_flush);
1051         vcpu->arch.cr3 = cr3;
1052         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1053
1054         return 0;
1055 }
1056 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1057
1058 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1059 {
1060         if (cr8 & CR8_RESERVED_BITS)
1061                 return 1;
1062         if (lapic_in_kernel(vcpu))
1063                 kvm_lapic_set_tpr(vcpu, cr8);
1064         else
1065                 vcpu->arch.cr8 = cr8;
1066         return 0;
1067 }
1068 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1069
1070 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1071 {
1072         if (lapic_in_kernel(vcpu))
1073                 return kvm_lapic_get_cr8(vcpu);
1074         else
1075                 return vcpu->arch.cr8;
1076 }
1077 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1078
1079 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1080 {
1081         int i;
1082
1083         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1084                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1085                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1086                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1087         }
1088 }
1089
1090 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1091 {
1092         unsigned long dr7;
1093
1094         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1095                 dr7 = vcpu->arch.guest_debug_dr7;
1096         else
1097                 dr7 = vcpu->arch.dr7;
1098         kvm_x86_ops.set_dr7(vcpu, dr7);
1099         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1100         if (dr7 & DR7_BP_EN_MASK)
1101                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1102 }
1103 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1104
1105 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1106 {
1107         u64 fixed = DR6_FIXED_1;
1108
1109         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1110                 fixed |= DR6_RTM;
1111         return fixed;
1112 }
1113
1114 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1115 {
1116         size_t size = ARRAY_SIZE(vcpu->arch.db);
1117
1118         switch (dr) {
1119         case 0 ... 3:
1120                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1121                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1122                         vcpu->arch.eff_db[dr] = val;
1123                 break;
1124         case 4:
1125         case 6:
1126                 if (!kvm_dr6_valid(val))
1127                         return -1; /* #GP */
1128                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1129                 break;
1130         case 5:
1131         default: /* 7 */
1132                 if (!kvm_dr7_valid(val))
1133                         return -1; /* #GP */
1134                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1135                 kvm_update_dr7(vcpu);
1136                 break;
1137         }
1138
1139         return 0;
1140 }
1141
1142 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1143 {
1144         if (__kvm_set_dr(vcpu, dr, val)) {
1145                 kvm_inject_gp(vcpu, 0);
1146                 return 1;
1147         }
1148         return 0;
1149 }
1150 EXPORT_SYMBOL_GPL(kvm_set_dr);
1151
1152 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1153 {
1154         size_t size = ARRAY_SIZE(vcpu->arch.db);
1155
1156         switch (dr) {
1157         case 0 ... 3:
1158                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1159                 break;
1160         case 4:
1161         case 6:
1162                 *val = vcpu->arch.dr6;
1163                 break;
1164         case 5:
1165         default: /* 7 */
1166                 *val = vcpu->arch.dr7;
1167                 break;
1168         }
1169         return 0;
1170 }
1171 EXPORT_SYMBOL_GPL(kvm_get_dr);
1172
1173 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1174 {
1175         u32 ecx = kvm_rcx_read(vcpu);
1176         u64 data;
1177         int err;
1178
1179         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1180         if (err)
1181                 return err;
1182         kvm_rax_write(vcpu, (u32)data);
1183         kvm_rdx_write(vcpu, data >> 32);
1184         return err;
1185 }
1186 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1187
1188 /*
1189  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1190  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1191  *
1192  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1193  * extract the supported MSRs from the related const lists.
1194  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1195  * capabilities of the host cpu. This capabilities test skips MSRs that are
1196  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1197  * may depend on host virtualization features rather than host cpu features.
1198  */
1199
1200 static const u32 msrs_to_save_all[] = {
1201         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1202         MSR_STAR,
1203 #ifdef CONFIG_X86_64
1204         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1205 #endif
1206         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1207         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1208         MSR_IA32_SPEC_CTRL,
1209         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1210         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1211         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1212         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1213         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1214         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1215         MSR_IA32_UMWAIT_CONTROL,
1216
1217         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1218         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1219         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1220         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1221         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1222         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1223         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1224         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1225         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1226         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1227         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1228         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1229         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1230         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1231         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1232         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1233         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1234         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1235         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1236         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1237         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1238         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1239 };
1240
1241 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1242 static unsigned num_msrs_to_save;
1243
1244 static const u32 emulated_msrs_all[] = {
1245         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1246         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1247         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1248         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1249         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1250         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1251         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1252         HV_X64_MSR_RESET,
1253         HV_X64_MSR_VP_INDEX,
1254         HV_X64_MSR_VP_RUNTIME,
1255         HV_X64_MSR_SCONTROL,
1256         HV_X64_MSR_STIMER0_CONFIG,
1257         HV_X64_MSR_VP_ASSIST_PAGE,
1258         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1259         HV_X64_MSR_TSC_EMULATION_STATUS,
1260         HV_X64_MSR_SYNDBG_OPTIONS,
1261         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1262         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1263         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1264
1265         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1266         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1267
1268         MSR_IA32_TSC_ADJUST,
1269         MSR_IA32_TSCDEADLINE,
1270         MSR_IA32_ARCH_CAPABILITIES,
1271         MSR_IA32_PERF_CAPABILITIES,
1272         MSR_IA32_MISC_ENABLE,
1273         MSR_IA32_MCG_STATUS,
1274         MSR_IA32_MCG_CTL,
1275         MSR_IA32_MCG_EXT_CTL,
1276         MSR_IA32_SMBASE,
1277         MSR_SMI_COUNT,
1278         MSR_PLATFORM_INFO,
1279         MSR_MISC_FEATURES_ENABLES,
1280         MSR_AMD64_VIRT_SPEC_CTRL,
1281         MSR_IA32_POWER_CTL,
1282         MSR_IA32_UCODE_REV,
1283
1284         /*
1285          * The following list leaves out MSRs whose values are determined
1286          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1287          * We always support the "true" VMX control MSRs, even if the host
1288          * processor does not, so I am putting these registers here rather
1289          * than in msrs_to_save_all.
1290          */
1291         MSR_IA32_VMX_BASIC,
1292         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1293         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1294         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1295         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1296         MSR_IA32_VMX_MISC,
1297         MSR_IA32_VMX_CR0_FIXED0,
1298         MSR_IA32_VMX_CR4_FIXED0,
1299         MSR_IA32_VMX_VMCS_ENUM,
1300         MSR_IA32_VMX_PROCBASED_CTLS2,
1301         MSR_IA32_VMX_EPT_VPID_CAP,
1302         MSR_IA32_VMX_VMFUNC,
1303
1304         MSR_K7_HWCR,
1305         MSR_KVM_POLL_CONTROL,
1306 };
1307
1308 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1309 static unsigned num_emulated_msrs;
1310
1311 /*
1312  * List of msr numbers which are used to expose MSR-based features that
1313  * can be used by a hypervisor to validate requested CPU features.
1314  */
1315 static const u32 msr_based_features_all[] = {
1316         MSR_IA32_VMX_BASIC,
1317         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1318         MSR_IA32_VMX_PINBASED_CTLS,
1319         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1320         MSR_IA32_VMX_PROCBASED_CTLS,
1321         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1322         MSR_IA32_VMX_EXIT_CTLS,
1323         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1324         MSR_IA32_VMX_ENTRY_CTLS,
1325         MSR_IA32_VMX_MISC,
1326         MSR_IA32_VMX_CR0_FIXED0,
1327         MSR_IA32_VMX_CR0_FIXED1,
1328         MSR_IA32_VMX_CR4_FIXED0,
1329         MSR_IA32_VMX_CR4_FIXED1,
1330         MSR_IA32_VMX_VMCS_ENUM,
1331         MSR_IA32_VMX_PROCBASED_CTLS2,
1332         MSR_IA32_VMX_EPT_VPID_CAP,
1333         MSR_IA32_VMX_VMFUNC,
1334
1335         MSR_F10H_DECFG,
1336         MSR_IA32_UCODE_REV,
1337         MSR_IA32_ARCH_CAPABILITIES,
1338         MSR_IA32_PERF_CAPABILITIES,
1339 };
1340
1341 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1342 static unsigned int num_msr_based_features;
1343
1344 static u64 kvm_get_arch_capabilities(void)
1345 {
1346         u64 data = 0;
1347
1348         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1349                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1350
1351         /*
1352          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1353          * the nested hypervisor runs with NX huge pages.  If it is not,
1354          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1355          * L1 guests, so it need not worry about its own (L2) guests.
1356          */
1357         data |= ARCH_CAP_PSCHANGE_MC_NO;
1358
1359         /*
1360          * If we're doing cache flushes (either "always" or "cond")
1361          * we will do one whenever the guest does a vmlaunch/vmresume.
1362          * If an outer hypervisor is doing the cache flush for us
1363          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1364          * capability to the guest too, and if EPT is disabled we're not
1365          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1366          * require a nested hypervisor to do a flush of its own.
1367          */
1368         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1369                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1370
1371         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1372                 data |= ARCH_CAP_RDCL_NO;
1373         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1374                 data |= ARCH_CAP_SSB_NO;
1375         if (!boot_cpu_has_bug(X86_BUG_MDS))
1376                 data |= ARCH_CAP_MDS_NO;
1377
1378         /*
1379          * On TAA affected systems:
1380          *      - nothing to do if TSX is disabled on the host.
1381          *      - we emulate TSX_CTRL if present on the host.
1382          *        This lets the guest use VERW to clear CPU buffers.
1383          */
1384         if (!boot_cpu_has(X86_FEATURE_RTM))
1385                 data &= ~(ARCH_CAP_TAA_NO | ARCH_CAP_TSX_CTRL_MSR);
1386         else if (!boot_cpu_has_bug(X86_BUG_TAA))
1387                 data |= ARCH_CAP_TAA_NO;
1388
1389         return data;
1390 }
1391
1392 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1393 {
1394         switch (msr->index) {
1395         case MSR_IA32_ARCH_CAPABILITIES:
1396                 msr->data = kvm_get_arch_capabilities();
1397                 break;
1398         case MSR_IA32_UCODE_REV:
1399                 rdmsrl_safe(msr->index, &msr->data);
1400                 break;
1401         default:
1402                 return kvm_x86_ops.get_msr_feature(msr);
1403         }
1404         return 0;
1405 }
1406
1407 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1408 {
1409         struct kvm_msr_entry msr;
1410         int r;
1411
1412         msr.index = index;
1413         r = kvm_get_msr_feature(&msr);
1414
1415         if (r == KVM_MSR_RET_INVALID) {
1416                 /* Unconditionally clear the output for simplicity */
1417                 *data = 0;
1418                 r = kvm_msr_ignored_check(vcpu, index, 0, false);
1419         }
1420
1421         if (r)
1422                 return r;
1423
1424         *data = msr.data;
1425
1426         return 0;
1427 }
1428
1429 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1430 {
1431         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1432                 return false;
1433
1434         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1435                 return false;
1436
1437         if (efer & (EFER_LME | EFER_LMA) &&
1438             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1439                 return false;
1440
1441         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1442                 return false;
1443
1444         return true;
1445
1446 }
1447 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1448 {
1449         if (efer & efer_reserved_bits)
1450                 return false;
1451
1452         return __kvm_valid_efer(vcpu, efer);
1453 }
1454 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1455
1456 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1457 {
1458         u64 old_efer = vcpu->arch.efer;
1459         u64 efer = msr_info->data;
1460
1461         if (efer & efer_reserved_bits)
1462                 return 1;
1463
1464         if (!msr_info->host_initiated) {
1465                 if (!__kvm_valid_efer(vcpu, efer))
1466                         return 1;
1467
1468                 if (is_paging(vcpu) &&
1469                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1470                         return 1;
1471         }
1472
1473         efer &= ~EFER_LMA;
1474         efer |= vcpu->arch.efer & EFER_LMA;
1475
1476         kvm_x86_ops.set_efer(vcpu, efer);
1477
1478         /* Update reserved bits */
1479         if ((efer ^ old_efer) & EFER_NX)
1480                 kvm_mmu_reset_context(vcpu);
1481
1482         return 0;
1483 }
1484
1485 void kvm_enable_efer_bits(u64 mask)
1486 {
1487        efer_reserved_bits &= ~mask;
1488 }
1489 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1490
1491 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1492 {
1493         struct kvm *kvm = vcpu->kvm;
1494         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
1495         u32 count = kvm->arch.msr_filter.count;
1496         u32 i;
1497         bool r = kvm->arch.msr_filter.default_allow;
1498         int idx;
1499
1500         /* MSR filtering not set up or x2APIC enabled, allow everything */
1501         if (!count || (index >= 0x800 && index <= 0x8ff))
1502                 return true;
1503
1504         /* Prevent collision with set_msr_filter */
1505         idx = srcu_read_lock(&kvm->srcu);
1506
1507         for (i = 0; i < count; i++) {
1508                 u32 start = ranges[i].base;
1509                 u32 end = start + ranges[i].nmsrs;
1510                 u32 flags = ranges[i].flags;
1511                 unsigned long *bitmap = ranges[i].bitmap;
1512
1513                 if ((index >= start) && (index < end) && (flags & type)) {
1514                         r = !!test_bit(index - start, bitmap);
1515                         break;
1516                 }
1517         }
1518
1519         srcu_read_unlock(&kvm->srcu, idx);
1520
1521         return r;
1522 }
1523 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1524
1525 /*
1526  * Write @data into the MSR specified by @index.  Select MSR specific fault
1527  * checks are bypassed if @host_initiated is %true.
1528  * Returns 0 on success, non-0 otherwise.
1529  * Assumes vcpu_load() was already called.
1530  */
1531 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1532                          bool host_initiated)
1533 {
1534         struct msr_data msr;
1535
1536         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1537                 return -EPERM;
1538
1539         switch (index) {
1540         case MSR_FS_BASE:
1541         case MSR_GS_BASE:
1542         case MSR_KERNEL_GS_BASE:
1543         case MSR_CSTAR:
1544         case MSR_LSTAR:
1545                 if (is_noncanonical_address(data, vcpu))
1546                         return 1;
1547                 break;
1548         case MSR_IA32_SYSENTER_EIP:
1549         case MSR_IA32_SYSENTER_ESP:
1550                 /*
1551                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1552                  * non-canonical address is written on Intel but not on
1553                  * AMD (which ignores the top 32-bits, because it does
1554                  * not implement 64-bit SYSENTER).
1555                  *
1556                  * 64-bit code should hence be able to write a non-canonical
1557                  * value on AMD.  Making the address canonical ensures that
1558                  * vmentry does not fail on Intel after writing a non-canonical
1559                  * value, and that something deterministic happens if the guest
1560                  * invokes 64-bit SYSENTER.
1561                  */
1562                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1563         }
1564
1565         msr.data = data;
1566         msr.index = index;
1567         msr.host_initiated = host_initiated;
1568
1569         return kvm_x86_ops.set_msr(vcpu, &msr);
1570 }
1571
1572 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1573                                      u32 index, u64 data, bool host_initiated)
1574 {
1575         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1576
1577         if (ret == KVM_MSR_RET_INVALID)
1578                 ret = kvm_msr_ignored_check(vcpu, index, data, true);
1579
1580         return ret;
1581 }
1582
1583 /*
1584  * Read the MSR specified by @index into @data.  Select MSR specific fault
1585  * checks are bypassed if @host_initiated is %true.
1586  * Returns 0 on success, non-0 otherwise.
1587  * Assumes vcpu_load() was already called.
1588  */
1589 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1590                   bool host_initiated)
1591 {
1592         struct msr_data msr;
1593         int ret;
1594
1595         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1596                 return -EPERM;
1597
1598         msr.index = index;
1599         msr.host_initiated = host_initiated;
1600
1601         ret = kvm_x86_ops.get_msr(vcpu, &msr);
1602         if (!ret)
1603                 *data = msr.data;
1604         return ret;
1605 }
1606
1607 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1608                                      u32 index, u64 *data, bool host_initiated)
1609 {
1610         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1611
1612         if (ret == KVM_MSR_RET_INVALID) {
1613                 /* Unconditionally clear *data for simplicity */
1614                 *data = 0;
1615                 ret = kvm_msr_ignored_check(vcpu, index, 0, false);
1616         }
1617
1618         return ret;
1619 }
1620
1621 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1622 {
1623         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1624 }
1625 EXPORT_SYMBOL_GPL(kvm_get_msr);
1626
1627 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1628 {
1629         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1630 }
1631 EXPORT_SYMBOL_GPL(kvm_set_msr);
1632
1633 static int complete_emulated_msr(struct kvm_vcpu *vcpu, bool is_read)
1634 {
1635         if (vcpu->run->msr.error) {
1636                 kvm_inject_gp(vcpu, 0);
1637                 return 1;
1638         } else if (is_read) {
1639                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1640                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1641         }
1642
1643         return kvm_skip_emulated_instruction(vcpu);
1644 }
1645
1646 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1647 {
1648         return complete_emulated_msr(vcpu, true);
1649 }
1650
1651 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1652 {
1653         return complete_emulated_msr(vcpu, false);
1654 }
1655
1656 static u64 kvm_msr_reason(int r)
1657 {
1658         switch (r) {
1659         case -ENOENT:
1660                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1661         case -EPERM:
1662                 return KVM_MSR_EXIT_REASON_FILTER;
1663         default:
1664                 return KVM_MSR_EXIT_REASON_INVAL;
1665         }
1666 }
1667
1668 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1669                               u32 exit_reason, u64 data,
1670                               int (*completion)(struct kvm_vcpu *vcpu),
1671                               int r)
1672 {
1673         u64 msr_reason = kvm_msr_reason(r);
1674
1675         /* Check if the user wanted to know about this MSR fault */
1676         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1677                 return 0;
1678
1679         vcpu->run->exit_reason = exit_reason;
1680         vcpu->run->msr.error = 0;
1681         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1682         vcpu->run->msr.reason = msr_reason;
1683         vcpu->run->msr.index = index;
1684         vcpu->run->msr.data = data;
1685         vcpu->arch.complete_userspace_io = completion;
1686
1687         return 1;
1688 }
1689
1690 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1691 {
1692         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1693                                    complete_emulated_rdmsr, r);
1694 }
1695
1696 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1697 {
1698         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1699                                    complete_emulated_wrmsr, r);
1700 }
1701
1702 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1703 {
1704         u32 ecx = kvm_rcx_read(vcpu);
1705         u64 data;
1706         int r;
1707
1708         r = kvm_get_msr(vcpu, ecx, &data);
1709
1710         /* MSR read failed? See if we should ask user space */
1711         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1712                 /* Bounce to user space */
1713                 return 0;
1714         }
1715
1716         /* MSR read failed? Inject a #GP */
1717         if (r) {
1718                 trace_kvm_msr_read_ex(ecx);
1719                 kvm_inject_gp(vcpu, 0);
1720                 return 1;
1721         }
1722
1723         trace_kvm_msr_read(ecx, data);
1724
1725         kvm_rax_write(vcpu, data & -1u);
1726         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1727         return kvm_skip_emulated_instruction(vcpu);
1728 }
1729 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1730
1731 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1732 {
1733         u32 ecx = kvm_rcx_read(vcpu);
1734         u64 data = kvm_read_edx_eax(vcpu);
1735         int r;
1736
1737         r = kvm_set_msr(vcpu, ecx, data);
1738
1739         /* MSR write failed? See if we should ask user space */
1740         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r)) {
1741                 /* Bounce to user space */
1742                 return 0;
1743         }
1744
1745         /* MSR write failed? Inject a #GP */
1746         if (r) {
1747                 trace_kvm_msr_write_ex(ecx, data);
1748                 kvm_inject_gp(vcpu, 0);
1749                 return 1;
1750         }
1751
1752         trace_kvm_msr_write(ecx, data);
1753         return kvm_skip_emulated_instruction(vcpu);
1754 }
1755 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1756
1757 bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1758 {
1759         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1760                 xfer_to_guest_mode_work_pending();
1761 }
1762 EXPORT_SYMBOL_GPL(kvm_vcpu_exit_request);
1763
1764 /*
1765  * The fast path for frequent and performance sensitive wrmsr emulation,
1766  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1767  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1768  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1769  * other cases which must be called after interrupts are enabled on the host.
1770  */
1771 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1772 {
1773         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1774                 return 1;
1775
1776         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1777                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1778                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1779                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1780
1781                 data &= ~(1 << 12);
1782                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1783                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1784                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1785                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1786                 return 0;
1787         }
1788
1789         return 1;
1790 }
1791
1792 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
1793 {
1794         if (!kvm_can_use_hv_timer(vcpu))
1795                 return 1;
1796
1797         kvm_set_lapic_tscdeadline_msr(vcpu, data);
1798         return 0;
1799 }
1800
1801 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
1802 {
1803         u32 msr = kvm_rcx_read(vcpu);
1804         u64 data;
1805         fastpath_t ret = EXIT_FASTPATH_NONE;
1806
1807         switch (msr) {
1808         case APIC_BASE_MSR + (APIC_ICR >> 4):
1809                 data = kvm_read_edx_eax(vcpu);
1810                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
1811                         kvm_skip_emulated_instruction(vcpu);
1812                         ret = EXIT_FASTPATH_EXIT_HANDLED;
1813                 }
1814                 break;
1815         case MSR_IA32_TSCDEADLINE:
1816                 data = kvm_read_edx_eax(vcpu);
1817                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
1818                         kvm_skip_emulated_instruction(vcpu);
1819                         ret = EXIT_FASTPATH_REENTER_GUEST;
1820                 }
1821                 break;
1822         default:
1823                 break;
1824         }
1825
1826         if (ret != EXIT_FASTPATH_NONE)
1827                 trace_kvm_msr_write(msr, data);
1828
1829         return ret;
1830 }
1831 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
1832
1833 /*
1834  * Adapt set_msr() to msr_io()'s calling convention
1835  */
1836 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1837 {
1838         return kvm_get_msr_ignored_check(vcpu, index, data, true);
1839 }
1840
1841 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1842 {
1843         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
1844 }
1845
1846 #ifdef CONFIG_X86_64
1847 struct pvclock_clock {
1848         int vclock_mode;
1849         u64 cycle_last;
1850         u64 mask;
1851         u32 mult;
1852         u32 shift;
1853         u64 base_cycles;
1854         u64 offset;
1855 };
1856
1857 struct pvclock_gtod_data {
1858         seqcount_t      seq;
1859
1860         struct pvclock_clock clock; /* extract of a clocksource struct */
1861         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
1862
1863         ktime_t         offs_boot;
1864         u64             wall_time_sec;
1865 };
1866
1867 static struct pvclock_gtod_data pvclock_gtod_data;
1868
1869 static void update_pvclock_gtod(struct timekeeper *tk)
1870 {
1871         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1872
1873         write_seqcount_begin(&vdata->seq);
1874
1875         /* copy pvclock gtod data */
1876         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
1877         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1878         vdata->clock.mask               = tk->tkr_mono.mask;
1879         vdata->clock.mult               = tk->tkr_mono.mult;
1880         vdata->clock.shift              = tk->tkr_mono.shift;
1881         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
1882         vdata->clock.offset             = tk->tkr_mono.base;
1883
1884         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
1885         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
1886         vdata->raw_clock.mask           = tk->tkr_raw.mask;
1887         vdata->raw_clock.mult           = tk->tkr_raw.mult;
1888         vdata->raw_clock.shift          = tk->tkr_raw.shift;
1889         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
1890         vdata->raw_clock.offset         = tk->tkr_raw.base;
1891
1892         vdata->wall_time_sec            = tk->xtime_sec;
1893
1894         vdata->offs_boot                = tk->offs_boot;
1895
1896         write_seqcount_end(&vdata->seq);
1897 }
1898
1899 static s64 get_kvmclock_base_ns(void)
1900 {
1901         /* Count up from boot time, but with the frequency of the raw clock.  */
1902         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
1903 }
1904 #else
1905 static s64 get_kvmclock_base_ns(void)
1906 {
1907         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
1908         return ktime_get_boottime_ns();
1909 }
1910 #endif
1911
1912 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1913 {
1914         int version;
1915         int r;
1916         struct pvclock_wall_clock wc;
1917         u64 wall_nsec;
1918
1919         kvm->arch.wall_clock = wall_clock;
1920
1921         if (!wall_clock)
1922                 return;
1923
1924         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1925         if (r)
1926                 return;
1927
1928         if (version & 1)
1929                 ++version;  /* first time write, random junk */
1930
1931         ++version;
1932
1933         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1934                 return;
1935
1936         /*
1937          * The guest calculates current wall clock time by adding
1938          * system time (updated by kvm_guest_time_update below) to the
1939          * wall clock specified here.  We do the reverse here.
1940          */
1941         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
1942
1943         wc.nsec = do_div(wall_nsec, 1000000000);
1944         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
1945         wc.version = version;
1946
1947         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1948
1949         version++;
1950         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1951 }
1952
1953 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
1954                                   bool old_msr, bool host_initiated)
1955 {
1956         struct kvm_arch *ka = &vcpu->kvm->arch;
1957
1958         if (vcpu->vcpu_id == 0 && !host_initiated) {
1959                 if (ka->boot_vcpu_runs_old_kvmclock && old_msr)
1960                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1961
1962                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
1963         }
1964
1965         vcpu->arch.time = system_time;
1966         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
1967
1968         /* we verify if the enable bit is set... */
1969         vcpu->arch.pv_time_enabled = false;
1970         if (!(system_time & 1))
1971                 return;
1972
1973         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
1974                                        &vcpu->arch.pv_time, system_time & ~1ULL,
1975                                        sizeof(struct pvclock_vcpu_time_info)))
1976                 vcpu->arch.pv_time_enabled = true;
1977
1978         return;
1979 }
1980
1981 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1982 {
1983         do_shl32_div32(dividend, divisor);
1984         return dividend;
1985 }
1986
1987 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1988                                s8 *pshift, u32 *pmultiplier)
1989 {
1990         uint64_t scaled64;
1991         int32_t  shift = 0;
1992         uint64_t tps64;
1993         uint32_t tps32;
1994
1995         tps64 = base_hz;
1996         scaled64 = scaled_hz;
1997         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1998                 tps64 >>= 1;
1999                 shift--;
2000         }
2001
2002         tps32 = (uint32_t)tps64;
2003         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2004                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2005                         scaled64 >>= 1;
2006                 else
2007                         tps32 <<= 1;
2008                 shift++;
2009         }
2010
2011         *pshift = shift;
2012         *pmultiplier = div_frac(scaled64, tps32);
2013 }
2014
2015 #ifdef CONFIG_X86_64
2016 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2017 #endif
2018
2019 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2020 static unsigned long max_tsc_khz;
2021
2022 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2023 {
2024         u64 v = (u64)khz * (1000000 + ppm);
2025         do_div(v, 1000000);
2026         return v;
2027 }
2028
2029 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2030 {
2031         u64 ratio;
2032
2033         /* Guest TSC same frequency as host TSC? */
2034         if (!scale) {
2035                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2036                 return 0;
2037         }
2038
2039         /* TSC scaling supported? */
2040         if (!kvm_has_tsc_control) {
2041                 if (user_tsc_khz > tsc_khz) {
2042                         vcpu->arch.tsc_catchup = 1;
2043                         vcpu->arch.tsc_always_catchup = 1;
2044                         return 0;
2045                 } else {
2046                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2047                         return -1;
2048                 }
2049         }
2050
2051         /* TSC scaling required  - calculate ratio */
2052         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2053                                 user_tsc_khz, tsc_khz);
2054
2055         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2056                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2057                                     user_tsc_khz);
2058                 return -1;
2059         }
2060
2061         vcpu->arch.tsc_scaling_ratio = ratio;
2062         return 0;
2063 }
2064
2065 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2066 {
2067         u32 thresh_lo, thresh_hi;
2068         int use_scaling = 0;
2069
2070         /* tsc_khz can be zero if TSC calibration fails */
2071         if (user_tsc_khz == 0) {
2072                 /* set tsc_scaling_ratio to a safe value */
2073                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
2074                 return -1;
2075         }
2076
2077         /* Compute a scale to convert nanoseconds in TSC cycles */
2078         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2079                            &vcpu->arch.virtual_tsc_shift,
2080                            &vcpu->arch.virtual_tsc_mult);
2081         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2082
2083         /*
2084          * Compute the variation in TSC rate which is acceptable
2085          * within the range of tolerance and decide if the
2086          * rate being applied is within that bounds of the hardware
2087          * rate.  If so, no scaling or compensation need be done.
2088          */
2089         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2090         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2091         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2092                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2093                 use_scaling = 1;
2094         }
2095         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2096 }
2097
2098 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2099 {
2100         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2101                                       vcpu->arch.virtual_tsc_mult,
2102                                       vcpu->arch.virtual_tsc_shift);
2103         tsc += vcpu->arch.this_tsc_write;
2104         return tsc;
2105 }
2106
2107 static inline int gtod_is_based_on_tsc(int mode)
2108 {
2109         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2110 }
2111
2112 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2113 {
2114 #ifdef CONFIG_X86_64
2115         bool vcpus_matched;
2116         struct kvm_arch *ka = &vcpu->kvm->arch;
2117         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2118
2119         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2120                          atomic_read(&vcpu->kvm->online_vcpus));
2121
2122         /*
2123          * Once the masterclock is enabled, always perform request in
2124          * order to update it.
2125          *
2126          * In order to enable masterclock, the host clocksource must be TSC
2127          * and the vcpus need to have matched TSCs.  When that happens,
2128          * perform request to enable masterclock.
2129          */
2130         if (ka->use_master_clock ||
2131             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2132                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2133
2134         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2135                             atomic_read(&vcpu->kvm->online_vcpus),
2136                             ka->use_master_clock, gtod->clock.vclock_mode);
2137 #endif
2138 }
2139
2140 /*
2141  * Multiply tsc by a fixed point number represented by ratio.
2142  *
2143  * The most significant 64-N bits (mult) of ratio represent the
2144  * integral part of the fixed point number; the remaining N bits
2145  * (frac) represent the fractional part, ie. ratio represents a fixed
2146  * point number (mult + frac * 2^(-N)).
2147  *
2148  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2149  */
2150 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2151 {
2152         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2153 }
2154
2155 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
2156 {
2157         u64 _tsc = tsc;
2158         u64 ratio = vcpu->arch.tsc_scaling_ratio;
2159
2160         if (ratio != kvm_default_tsc_scaling_ratio)
2161                 _tsc = __scale_tsc(ratio, tsc);
2162
2163         return _tsc;
2164 }
2165 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2166
2167 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2168 {
2169         u64 tsc;
2170
2171         tsc = kvm_scale_tsc(vcpu, rdtsc());
2172
2173         return target_tsc - tsc;
2174 }
2175
2176 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2177 {
2178         return vcpu->arch.l1_tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
2179 }
2180 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2181
2182 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
2183 {
2184         vcpu->arch.l1_tsc_offset = offset;
2185         vcpu->arch.tsc_offset = kvm_x86_ops.write_l1_tsc_offset(vcpu, offset);
2186 }
2187
2188 static inline bool kvm_check_tsc_unstable(void)
2189 {
2190 #ifdef CONFIG_X86_64
2191         /*
2192          * TSC is marked unstable when we're running on Hyper-V,
2193          * 'TSC page' clocksource is good.
2194          */
2195         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2196                 return false;
2197 #endif
2198         return check_tsc_unstable();
2199 }
2200
2201 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2202 {
2203         struct kvm *kvm = vcpu->kvm;
2204         u64 offset, ns, elapsed;
2205         unsigned long flags;
2206         bool matched;
2207         bool already_matched;
2208         bool synchronizing = false;
2209
2210         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2211         offset = kvm_compute_tsc_offset(vcpu, data);
2212         ns = get_kvmclock_base_ns();
2213         elapsed = ns - kvm->arch.last_tsc_nsec;
2214
2215         if (vcpu->arch.virtual_tsc_khz) {
2216                 if (data == 0) {
2217                         /*
2218                          * detection of vcpu initialization -- need to sync
2219                          * with other vCPUs. This particularly helps to keep
2220                          * kvm_clock stable after CPU hotplug
2221                          */
2222                         synchronizing = true;
2223                 } else {
2224                         u64 tsc_exp = kvm->arch.last_tsc_write +
2225                                                 nsec_to_cycles(vcpu, elapsed);
2226                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2227                         /*
2228                          * Special case: TSC write with a small delta (1 second)
2229                          * of virtual cycle time against real time is
2230                          * interpreted as an attempt to synchronize the CPU.
2231                          */
2232                         synchronizing = data < tsc_exp + tsc_hz &&
2233                                         data + tsc_hz > tsc_exp;
2234                 }
2235         }
2236
2237         /*
2238          * For a reliable TSC, we can match TSC offsets, and for an unstable
2239          * TSC, we add elapsed time in this computation.  We could let the
2240          * compensation code attempt to catch up if we fall behind, but
2241          * it's better to try to match offsets from the beginning.
2242          */
2243         if (synchronizing &&
2244             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2245                 if (!kvm_check_tsc_unstable()) {
2246                         offset = kvm->arch.cur_tsc_offset;
2247                 } else {
2248                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2249                         data += delta;
2250                         offset = kvm_compute_tsc_offset(vcpu, data);
2251                 }
2252                 matched = true;
2253                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
2254         } else {
2255                 /*
2256                  * We split periods of matched TSC writes into generations.
2257                  * For each generation, we track the original measured
2258                  * nanosecond time, offset, and write, so if TSCs are in
2259                  * sync, we can match exact offset, and if not, we can match
2260                  * exact software computation in compute_guest_tsc()
2261                  *
2262                  * These values are tracked in kvm->arch.cur_xxx variables.
2263                  */
2264                 kvm->arch.cur_tsc_generation++;
2265                 kvm->arch.cur_tsc_nsec = ns;
2266                 kvm->arch.cur_tsc_write = data;
2267                 kvm->arch.cur_tsc_offset = offset;
2268                 matched = false;
2269         }
2270
2271         /*
2272          * We also track th most recent recorded KHZ, write and time to
2273          * allow the matching interval to be extended at each write.
2274          */
2275         kvm->arch.last_tsc_nsec = ns;
2276         kvm->arch.last_tsc_write = data;
2277         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2278
2279         vcpu->arch.last_guest_tsc = data;
2280
2281         /* Keep track of which generation this VCPU has synchronized to */
2282         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2283         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2284         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2285
2286         kvm_vcpu_write_tsc_offset(vcpu, offset);
2287         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2288
2289         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
2290         if (!matched) {
2291                 kvm->arch.nr_vcpus_matched_tsc = 0;
2292         } else if (!already_matched) {
2293                 kvm->arch.nr_vcpus_matched_tsc++;
2294         }
2295
2296         kvm_track_tsc_matching(vcpu);
2297         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
2298 }
2299
2300 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2301                                            s64 adjustment)
2302 {
2303         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2304         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2305 }
2306
2307 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2308 {
2309         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2310                 WARN_ON(adjustment < 0);
2311         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
2312         adjust_tsc_offset_guest(vcpu, adjustment);
2313 }
2314
2315 #ifdef CONFIG_X86_64
2316
2317 static u64 read_tsc(void)
2318 {
2319         u64 ret = (u64)rdtsc_ordered();
2320         u64 last = pvclock_gtod_data.clock.cycle_last;
2321
2322         if (likely(ret >= last))
2323                 return ret;
2324
2325         /*
2326          * GCC likes to generate cmov here, but this branch is extremely
2327          * predictable (it's just a function of time and the likely is
2328          * very likely) and there's a data dependence, so force GCC
2329          * to generate a branch instead.  I don't barrier() because
2330          * we don't actually need a barrier, and if this function
2331          * ever gets inlined it will generate worse code.
2332          */
2333         asm volatile ("");
2334         return last;
2335 }
2336
2337 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2338                           int *mode)
2339 {
2340         long v;
2341         u64 tsc_pg_val;
2342
2343         switch (clock->vclock_mode) {
2344         case VDSO_CLOCKMODE_HVCLOCK:
2345                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2346                                                   tsc_timestamp);
2347                 if (tsc_pg_val != U64_MAX) {
2348                         /* TSC page valid */
2349                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2350                         v = (tsc_pg_val - clock->cycle_last) &
2351                                 clock->mask;
2352                 } else {
2353                         /* TSC page invalid */
2354                         *mode = VDSO_CLOCKMODE_NONE;
2355                 }
2356                 break;
2357         case VDSO_CLOCKMODE_TSC:
2358                 *mode = VDSO_CLOCKMODE_TSC;
2359                 *tsc_timestamp = read_tsc();
2360                 v = (*tsc_timestamp - clock->cycle_last) &
2361                         clock->mask;
2362                 break;
2363         default:
2364                 *mode = VDSO_CLOCKMODE_NONE;
2365         }
2366
2367         if (*mode == VDSO_CLOCKMODE_NONE)
2368                 *tsc_timestamp = v = 0;
2369
2370         return v * clock->mult;
2371 }
2372
2373 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2374 {
2375         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2376         unsigned long seq;
2377         int mode;
2378         u64 ns;
2379
2380         do {
2381                 seq = read_seqcount_begin(&gtod->seq);
2382                 ns = gtod->raw_clock.base_cycles;
2383                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2384                 ns >>= gtod->raw_clock.shift;
2385                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2386         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2387         *t = ns;
2388
2389         return mode;
2390 }
2391
2392 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2393 {
2394         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2395         unsigned long seq;
2396         int mode;
2397         u64 ns;
2398
2399         do {
2400                 seq = read_seqcount_begin(&gtod->seq);
2401                 ts->tv_sec = gtod->wall_time_sec;
2402                 ns = gtod->clock.base_cycles;
2403                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2404                 ns >>= gtod->clock.shift;
2405         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2406
2407         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2408         ts->tv_nsec = ns;
2409
2410         return mode;
2411 }
2412
2413 /* returns true if host is using TSC based clocksource */
2414 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2415 {
2416         /* checked again under seqlock below */
2417         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2418                 return false;
2419
2420         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2421                                                       tsc_timestamp));
2422 }
2423
2424 /* returns true if host is using TSC based clocksource */
2425 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2426                                            u64 *tsc_timestamp)
2427 {
2428         /* checked again under seqlock below */
2429         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2430                 return false;
2431
2432         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2433 }
2434 #endif
2435
2436 /*
2437  *
2438  * Assuming a stable TSC across physical CPUS, and a stable TSC
2439  * across virtual CPUs, the following condition is possible.
2440  * Each numbered line represents an event visible to both
2441  * CPUs at the next numbered event.
2442  *
2443  * "timespecX" represents host monotonic time. "tscX" represents
2444  * RDTSC value.
2445  *
2446  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2447  *
2448  * 1.  read timespec0,tsc0
2449  * 2.                                   | timespec1 = timespec0 + N
2450  *                                      | tsc1 = tsc0 + M
2451  * 3. transition to guest               | transition to guest
2452  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2453  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2454  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2455  *
2456  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2457  *
2458  *      - ret0 < ret1
2459  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2460  *              ...
2461  *      - 0 < N - M => M < N
2462  *
2463  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2464  * always the case (the difference between two distinct xtime instances
2465  * might be smaller then the difference between corresponding TSC reads,
2466  * when updating guest vcpus pvclock areas).
2467  *
2468  * To avoid that problem, do not allow visibility of distinct
2469  * system_timestamp/tsc_timestamp values simultaneously: use a master
2470  * copy of host monotonic time values. Update that master copy
2471  * in lockstep.
2472  *
2473  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2474  *
2475  */
2476
2477 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2478 {
2479 #ifdef CONFIG_X86_64
2480         struct kvm_arch *ka = &kvm->arch;
2481         int vclock_mode;
2482         bool host_tsc_clocksource, vcpus_matched;
2483
2484         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2485                         atomic_read(&kvm->online_vcpus));
2486
2487         /*
2488          * If the host uses TSC clock, then passthrough TSC as stable
2489          * to the guest.
2490          */
2491         host_tsc_clocksource = kvm_get_time_and_clockread(
2492                                         &ka->master_kernel_ns,
2493                                         &ka->master_cycle_now);
2494
2495         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2496                                 && !ka->backwards_tsc_observed
2497                                 && !ka->boot_vcpu_runs_old_kvmclock;
2498
2499         if (ka->use_master_clock)
2500                 atomic_set(&kvm_guest_has_master_clock, 1);
2501
2502         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2503         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2504                                         vcpus_matched);
2505 #endif
2506 }
2507
2508 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2509 {
2510         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2511 }
2512
2513 static void kvm_gen_update_masterclock(struct kvm *kvm)
2514 {
2515 #ifdef CONFIG_X86_64
2516         int i;
2517         struct kvm_vcpu *vcpu;
2518         struct kvm_arch *ka = &kvm->arch;
2519
2520         spin_lock(&ka->pvclock_gtod_sync_lock);
2521         kvm_make_mclock_inprogress_request(kvm);
2522         /* no guest entries from this point */
2523         pvclock_update_vm_gtod_copy(kvm);
2524
2525         kvm_for_each_vcpu(i, vcpu, kvm)
2526                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2527
2528         /* guest entries allowed */
2529         kvm_for_each_vcpu(i, vcpu, kvm)
2530                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2531
2532         spin_unlock(&ka->pvclock_gtod_sync_lock);
2533 #endif
2534 }
2535
2536 u64 get_kvmclock_ns(struct kvm *kvm)
2537 {
2538         struct kvm_arch *ka = &kvm->arch;
2539         struct pvclock_vcpu_time_info hv_clock;
2540         u64 ret;
2541
2542         spin_lock(&ka->pvclock_gtod_sync_lock);
2543         if (!ka->use_master_clock) {
2544                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2545                 return get_kvmclock_base_ns() + ka->kvmclock_offset;
2546         }
2547
2548         hv_clock.tsc_timestamp = ka->master_cycle_now;
2549         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2550         spin_unlock(&ka->pvclock_gtod_sync_lock);
2551
2552         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2553         get_cpu();
2554
2555         if (__this_cpu_read(cpu_tsc_khz)) {
2556                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2557                                    &hv_clock.tsc_shift,
2558                                    &hv_clock.tsc_to_system_mul);
2559                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2560         } else
2561                 ret = get_kvmclock_base_ns() + ka->kvmclock_offset;
2562
2563         put_cpu();
2564
2565         return ret;
2566 }
2567
2568 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2569 {
2570         struct kvm_vcpu_arch *vcpu = &v->arch;
2571         struct pvclock_vcpu_time_info guest_hv_clock;
2572
2573         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2574                 &guest_hv_clock, sizeof(guest_hv_clock))))
2575                 return;
2576
2577         /* This VCPU is paused, but it's legal for a guest to read another
2578          * VCPU's kvmclock, so we really have to follow the specification where
2579          * it says that version is odd if data is being modified, and even after
2580          * it is consistent.
2581          *
2582          * Version field updates must be kept separate.  This is because
2583          * kvm_write_guest_cached might use a "rep movs" instruction, and
2584          * writes within a string instruction are weakly ordered.  So there
2585          * are three writes overall.
2586          *
2587          * As a small optimization, only write the version field in the first
2588          * and third write.  The vcpu->pv_time cache is still valid, because the
2589          * version field is the first in the struct.
2590          */
2591         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2592
2593         if (guest_hv_clock.version & 1)
2594                 ++guest_hv_clock.version;  /* first time write, random junk */
2595
2596         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2597         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2598                                 &vcpu->hv_clock,
2599                                 sizeof(vcpu->hv_clock.version));
2600
2601         smp_wmb();
2602
2603         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2604         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2605
2606         if (vcpu->pvclock_set_guest_stopped_request) {
2607                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2608                 vcpu->pvclock_set_guest_stopped_request = false;
2609         }
2610
2611         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2612
2613         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2614                                 &vcpu->hv_clock,
2615                                 sizeof(vcpu->hv_clock));
2616
2617         smp_wmb();
2618
2619         vcpu->hv_clock.version++;
2620         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2621                                 &vcpu->hv_clock,
2622                                 sizeof(vcpu->hv_clock.version));
2623 }
2624
2625 static int kvm_guest_time_update(struct kvm_vcpu *v)
2626 {
2627         unsigned long flags, tgt_tsc_khz;
2628         struct kvm_vcpu_arch *vcpu = &v->arch;
2629         struct kvm_arch *ka = &v->kvm->arch;
2630         s64 kernel_ns;
2631         u64 tsc_timestamp, host_tsc;
2632         u8 pvclock_flags;
2633         bool use_master_clock;
2634
2635         kernel_ns = 0;
2636         host_tsc = 0;
2637
2638         /*
2639          * If the host uses TSC clock, then passthrough TSC as stable
2640          * to the guest.
2641          */
2642         spin_lock(&ka->pvclock_gtod_sync_lock);
2643         use_master_clock = ka->use_master_clock;
2644         if (use_master_clock) {
2645                 host_tsc = ka->master_cycle_now;
2646                 kernel_ns = ka->master_kernel_ns;
2647         }
2648         spin_unlock(&ka->pvclock_gtod_sync_lock);
2649
2650         /* Keep irq disabled to prevent changes to the clock */
2651         local_irq_save(flags);
2652         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2653         if (unlikely(tgt_tsc_khz == 0)) {
2654                 local_irq_restore(flags);
2655                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2656                 return 1;
2657         }
2658         if (!use_master_clock) {
2659                 host_tsc = rdtsc();
2660                 kernel_ns = get_kvmclock_base_ns();
2661         }
2662
2663         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2664
2665         /*
2666          * We may have to catch up the TSC to match elapsed wall clock
2667          * time for two reasons, even if kvmclock is used.
2668          *   1) CPU could have been running below the maximum TSC rate
2669          *   2) Broken TSC compensation resets the base at each VCPU
2670          *      entry to avoid unknown leaps of TSC even when running
2671          *      again on the same CPU.  This may cause apparent elapsed
2672          *      time to disappear, and the guest to stand still or run
2673          *      very slowly.
2674          */
2675         if (vcpu->tsc_catchup) {
2676                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2677                 if (tsc > tsc_timestamp) {
2678                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2679                         tsc_timestamp = tsc;
2680                 }
2681         }
2682
2683         local_irq_restore(flags);
2684
2685         /* With all the info we got, fill in the values */
2686
2687         if (kvm_has_tsc_control)
2688                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2689
2690         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2691                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2692                                    &vcpu->hv_clock.tsc_shift,
2693                                    &vcpu->hv_clock.tsc_to_system_mul);
2694                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2695         }
2696
2697         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2698         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2699         vcpu->last_guest_tsc = tsc_timestamp;
2700
2701         /* If the host uses TSC clocksource, then it is stable */
2702         pvclock_flags = 0;
2703         if (use_master_clock)
2704                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2705
2706         vcpu->hv_clock.flags = pvclock_flags;
2707
2708         if (vcpu->pv_time_enabled)
2709                 kvm_setup_pvclock_page(v);
2710         if (v == kvm_get_vcpu(v->kvm, 0))
2711                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2712         return 0;
2713 }
2714
2715 /*
2716  * kvmclock updates which are isolated to a given vcpu, such as
2717  * vcpu->cpu migration, should not allow system_timestamp from
2718  * the rest of the vcpus to remain static. Otherwise ntp frequency
2719  * correction applies to one vcpu's system_timestamp but not
2720  * the others.
2721  *
2722  * So in those cases, request a kvmclock update for all vcpus.
2723  * We need to rate-limit these requests though, as they can
2724  * considerably slow guests that have a large number of vcpus.
2725  * The time for a remote vcpu to update its kvmclock is bound
2726  * by the delay we use to rate-limit the updates.
2727  */
2728
2729 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2730
2731 static void kvmclock_update_fn(struct work_struct *work)
2732 {
2733         int i;
2734         struct delayed_work *dwork = to_delayed_work(work);
2735         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2736                                            kvmclock_update_work);
2737         struct kvm *kvm = container_of(ka, struct kvm, arch);
2738         struct kvm_vcpu *vcpu;
2739
2740         kvm_for_each_vcpu(i, vcpu, kvm) {
2741                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2742                 kvm_vcpu_kick(vcpu);
2743         }
2744 }
2745
2746 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2747 {
2748         struct kvm *kvm = v->kvm;
2749
2750         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2751         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2752                                         KVMCLOCK_UPDATE_DELAY);
2753 }
2754
2755 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2756
2757 static void kvmclock_sync_fn(struct work_struct *work)
2758 {
2759         struct delayed_work *dwork = to_delayed_work(work);
2760         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2761                                            kvmclock_sync_work);
2762         struct kvm *kvm = container_of(ka, struct kvm, arch);
2763
2764         if (!kvmclock_periodic_sync)
2765                 return;
2766
2767         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2768         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2769                                         KVMCLOCK_SYNC_PERIOD);
2770 }
2771
2772 /*
2773  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2774  */
2775 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2776 {
2777         /* McStatusWrEn enabled? */
2778         if (guest_cpuid_is_amd_or_hygon(vcpu))
2779                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2780
2781         return false;
2782 }
2783
2784 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2785 {
2786         u64 mcg_cap = vcpu->arch.mcg_cap;
2787         unsigned bank_num = mcg_cap & 0xff;
2788         u32 msr = msr_info->index;
2789         u64 data = msr_info->data;
2790
2791         switch (msr) {
2792         case MSR_IA32_MCG_STATUS:
2793                 vcpu->arch.mcg_status = data;
2794                 break;
2795         case MSR_IA32_MCG_CTL:
2796                 if (!(mcg_cap & MCG_CTL_P) &&
2797                     (data || !msr_info->host_initiated))
2798                         return 1;
2799                 if (data != 0 && data != ~(u64)0)
2800                         return 1;
2801                 vcpu->arch.mcg_ctl = data;
2802                 break;
2803         default:
2804                 if (msr >= MSR_IA32_MC0_CTL &&
2805                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2806                         u32 offset = array_index_nospec(
2807                                 msr - MSR_IA32_MC0_CTL,
2808                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
2809
2810                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2811                          * some Linux kernels though clear bit 10 in bank 4 to
2812                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2813                          * this to avoid an uncatched #GP in the guest
2814                          */
2815                         if ((offset & 0x3) == 0 &&
2816                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2817                                 return -1;
2818
2819                         /* MCi_STATUS */
2820                         if (!msr_info->host_initiated &&
2821                             (offset & 0x3) == 1 && data != 0) {
2822                                 if (!can_set_mci_status(vcpu))
2823                                         return -1;
2824                         }
2825
2826                         vcpu->arch.mce_banks[offset] = data;
2827                         break;
2828                 }
2829                 return 1;
2830         }
2831         return 0;
2832 }
2833
2834 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2835 {
2836         struct kvm *kvm = vcpu->kvm;
2837         int lm = is_long_mode(vcpu);
2838         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2839                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2840         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2841                 : kvm->arch.xen_hvm_config.blob_size_32;
2842         u32 page_num = data & ~PAGE_MASK;
2843         u64 page_addr = data & PAGE_MASK;
2844         u8 *page;
2845
2846         if (page_num >= blob_size)
2847                 return 1;
2848
2849         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2850         if (IS_ERR(page))
2851                 return PTR_ERR(page);
2852
2853         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE)) {
2854                 kfree(page);
2855                 return 1;
2856         }
2857         return 0;
2858 }
2859
2860 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
2861 {
2862         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
2863
2864         return (vcpu->arch.apf.msr_en_val & mask) == mask;
2865 }
2866
2867 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2868 {
2869         gpa_t gpa = data & ~0x3f;
2870
2871         /* Bits 4:5 are reserved, Should be zero */
2872         if (data & 0x30)
2873                 return 1;
2874
2875         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
2876             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
2877                 return 1;
2878
2879         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
2880             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
2881                 return 1;
2882
2883         if (!lapic_in_kernel(vcpu))
2884                 return data ? 1 : 0;
2885
2886         vcpu->arch.apf.msr_en_val = data;
2887
2888         if (!kvm_pv_async_pf_enabled(vcpu)) {
2889                 kvm_clear_async_pf_completion_queue(vcpu);
2890                 kvm_async_pf_hash_reset(vcpu);
2891                 return 0;
2892         }
2893
2894         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2895                                         sizeof(u64)))
2896                 return 1;
2897
2898         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2899         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2900
2901         kvm_async_pf_wakeup_all(vcpu);
2902
2903         return 0;
2904 }
2905
2906 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
2907 {
2908         /* Bits 8-63 are reserved */
2909         if (data >> 8)
2910                 return 1;
2911
2912         if (!lapic_in_kernel(vcpu))
2913                 return 1;
2914
2915         vcpu->arch.apf.msr_int_val = data;
2916
2917         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
2918
2919         return 0;
2920 }
2921
2922 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2923 {
2924         vcpu->arch.pv_time_enabled = false;
2925         vcpu->arch.time = 0;
2926 }
2927
2928 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
2929 {
2930         ++vcpu->stat.tlb_flush;
2931         kvm_x86_ops.tlb_flush_all(vcpu);
2932 }
2933
2934 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
2935 {
2936         ++vcpu->stat.tlb_flush;
2937         kvm_x86_ops.tlb_flush_guest(vcpu);
2938 }
2939
2940 static void record_steal_time(struct kvm_vcpu *vcpu)
2941 {
2942         struct kvm_host_map map;
2943         struct kvm_steal_time *st;
2944
2945         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2946                 return;
2947
2948         /* -EAGAIN is returned in atomic context so we can just return. */
2949         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT,
2950                         &map, &vcpu->arch.st.cache, false))
2951                 return;
2952
2953         st = map.hva +
2954                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
2955
2956         /*
2957          * Doing a TLB flush here, on the guest's behalf, can avoid
2958          * expensive IPIs.
2959          */
2960         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
2961                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2962                                        st->preempted & KVM_VCPU_FLUSH_TLB);
2963                 if (xchg(&st->preempted, 0) & KVM_VCPU_FLUSH_TLB)
2964                         kvm_vcpu_flush_tlb_guest(vcpu);
2965         }
2966
2967         vcpu->arch.st.preempted = 0;
2968
2969         if (st->version & 1)
2970                 st->version += 1;  /* first time write, random junk */
2971
2972         st->version += 1;
2973
2974         smp_wmb();
2975
2976         st->steal += current->sched_info.run_delay -
2977                 vcpu->arch.st.last_steal;
2978         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2979
2980         smp_wmb();
2981
2982         st->version += 1;
2983
2984         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, false);
2985 }
2986
2987 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2988 {
2989         bool pr = false;
2990         u32 msr = msr_info->index;
2991         u64 data = msr_info->data;
2992
2993         switch (msr) {
2994         case MSR_AMD64_NB_CFG:
2995         case MSR_IA32_UCODE_WRITE:
2996         case MSR_VM_HSAVE_PA:
2997         case MSR_AMD64_PATCH_LOADER:
2998         case MSR_AMD64_BU_CFG2:
2999         case MSR_AMD64_DC_CFG:
3000         case MSR_F15H_EX_CFG:
3001                 break;
3002
3003         case MSR_IA32_UCODE_REV:
3004                 if (msr_info->host_initiated)
3005                         vcpu->arch.microcode_version = data;
3006                 break;
3007         case MSR_IA32_ARCH_CAPABILITIES:
3008                 if (!msr_info->host_initiated)
3009                         return 1;
3010                 vcpu->arch.arch_capabilities = data;
3011                 break;
3012         case MSR_IA32_PERF_CAPABILITIES: {
3013                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3014
3015                 if (!msr_info->host_initiated)
3016                         return 1;
3017                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3018                         return 1;
3019                 if (data & ~msr_ent.data)
3020                         return 1;
3021
3022                 vcpu->arch.perf_capabilities = data;
3023
3024                 return 0;
3025                 }
3026         case MSR_EFER:
3027                 return set_efer(vcpu, msr_info);
3028         case MSR_K7_HWCR:
3029                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3030                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3031                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3032
3033                 /* Handle McStatusWrEn */
3034                 if (data == BIT_ULL(18)) {
3035                         vcpu->arch.msr_hwcr = data;
3036                 } else if (data != 0) {
3037                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3038                                     data);
3039                         return 1;
3040                 }
3041                 break;
3042         case MSR_FAM10H_MMIO_CONF_BASE:
3043                 if (data != 0) {
3044                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3045                                     "0x%llx\n", data);
3046                         return 1;
3047                 }
3048                 break;
3049         case MSR_IA32_DEBUGCTLMSR:
3050                 if (!data) {
3051                         /* We support the non-activated case already */
3052                         break;
3053                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
3054                         /* Values other than LBR and BTF are vendor-specific,
3055                            thus reserved and should throw a #GP */
3056                         return 1;
3057                 }
3058                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
3059                             __func__, data);
3060                 break;
3061         case 0x200 ... 0x2ff:
3062                 return kvm_mtrr_set_msr(vcpu, msr, data);
3063         case MSR_IA32_APICBASE:
3064                 return kvm_set_apic_base(vcpu, msr_info);
3065         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3066                 return kvm_x2apic_msr_write(vcpu, msr, data);
3067         case MSR_IA32_TSCDEADLINE:
3068                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3069                 break;
3070         case MSR_IA32_TSC_ADJUST:
3071                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3072                         if (!msr_info->host_initiated) {
3073                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3074                                 adjust_tsc_offset_guest(vcpu, adj);
3075                         }
3076                         vcpu->arch.ia32_tsc_adjust_msr = data;
3077                 }
3078                 break;
3079         case MSR_IA32_MISC_ENABLE:
3080                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3081                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3082                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3083                                 return 1;
3084                         vcpu->arch.ia32_misc_enable_msr = data;
3085                         kvm_update_cpuid_runtime(vcpu);
3086                 } else {
3087                         vcpu->arch.ia32_misc_enable_msr = data;
3088                 }
3089                 break;
3090         case MSR_IA32_SMBASE:
3091                 if (!msr_info->host_initiated)
3092                         return 1;
3093                 vcpu->arch.smbase = data;
3094                 break;
3095         case MSR_IA32_POWER_CTL:
3096                 vcpu->arch.msr_ia32_power_ctl = data;
3097                 break;
3098         case MSR_IA32_TSC:
3099                 if (msr_info->host_initiated) {
3100                         kvm_synchronize_tsc(vcpu, data);
3101                 } else {
3102                         u64 adj = kvm_compute_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3103                         adjust_tsc_offset_guest(vcpu, adj);
3104                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3105                 }
3106                 break;
3107         case MSR_IA32_XSS:
3108                 if (!msr_info->host_initiated &&
3109                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3110                         return 1;
3111                 /*
3112                  * KVM supports exposing PT to the guest, but does not support
3113                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3114                  * XSAVES/XRSTORS to save/restore PT MSRs.
3115                  */
3116                 if (data & ~supported_xss)
3117                         return 1;
3118                 vcpu->arch.ia32_xss = data;
3119                 break;
3120         case MSR_SMI_COUNT:
3121                 if (!msr_info->host_initiated)
3122                         return 1;
3123                 vcpu->arch.smi_count = data;
3124                 break;
3125         case MSR_KVM_WALL_CLOCK_NEW:
3126                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3127                         return 1;
3128
3129                 kvm_write_wall_clock(vcpu->kvm, data);
3130                 break;
3131         case MSR_KVM_WALL_CLOCK:
3132                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3133                         return 1;
3134
3135                 kvm_write_wall_clock(vcpu->kvm, data);
3136                 break;
3137         case MSR_KVM_SYSTEM_TIME_NEW:
3138                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3139                         return 1;
3140
3141                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3142                 break;
3143         case MSR_KVM_SYSTEM_TIME:
3144                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3145                         return 1;
3146
3147                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3148                 break;
3149         case MSR_KVM_ASYNC_PF_EN:
3150                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3151                         return 1;
3152
3153                 if (kvm_pv_enable_async_pf(vcpu, data))
3154                         return 1;
3155                 break;
3156         case MSR_KVM_ASYNC_PF_INT:
3157                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3158                         return 1;
3159
3160                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3161                         return 1;
3162                 break;
3163         case MSR_KVM_ASYNC_PF_ACK:
3164                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3165                         return 1;
3166                 if (data & 0x1) {
3167                         vcpu->arch.apf.pageready_pending = false;
3168                         kvm_check_async_pf_completion(vcpu);
3169                 }
3170                 break;
3171         case MSR_KVM_STEAL_TIME:
3172                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3173                         return 1;
3174
3175                 if (unlikely(!sched_info_on()))
3176                         return 1;
3177
3178                 if (data & KVM_STEAL_RESERVED_MASK)
3179                         return 1;
3180
3181                 vcpu->arch.st.msr_val = data;
3182
3183                 if (!(data & KVM_MSR_ENABLED))
3184                         break;
3185
3186                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3187
3188                 break;
3189         case MSR_KVM_PV_EOI_EN:
3190                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3191                         return 1;
3192
3193                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3194                         return 1;
3195                 break;
3196
3197         case MSR_KVM_POLL_CONTROL:
3198                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3199                         return 1;
3200
3201                 /* only enable bit supported */
3202                 if (data & (-1ULL << 1))
3203                         return 1;
3204
3205                 vcpu->arch.msr_kvm_poll_control = data;
3206                 break;
3207
3208         case MSR_IA32_MCG_CTL:
3209         case MSR_IA32_MCG_STATUS:
3210         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3211                 return set_msr_mce(vcpu, msr_info);
3212
3213         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3214         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3215                 pr = true;
3216                 fallthrough;
3217         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3218         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3219                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3220                         return kvm_pmu_set_msr(vcpu, msr_info);
3221
3222                 if (pr || data != 0)
3223                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3224                                     "0x%x data 0x%llx\n", msr, data);
3225                 break;
3226         case MSR_K7_CLK_CTL:
3227                 /*
3228                  * Ignore all writes to this no longer documented MSR.
3229                  * Writes are only relevant for old K7 processors,
3230                  * all pre-dating SVM, but a recommended workaround from
3231                  * AMD for these chips. It is possible to specify the
3232                  * affected processor models on the command line, hence
3233                  * the need to ignore the workaround.
3234                  */
3235                 break;
3236         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3237         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3238         case HV_X64_MSR_SYNDBG_OPTIONS:
3239         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3240         case HV_X64_MSR_CRASH_CTL:
3241         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3242         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3243         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3244         case HV_X64_MSR_TSC_EMULATION_STATUS:
3245                 return kvm_hv_set_msr_common(vcpu, msr, data,
3246                                              msr_info->host_initiated);
3247         case MSR_IA32_BBL_CR_CTL3:
3248                 /* Drop writes to this legacy MSR -- see rdmsr
3249                  * counterpart for further detail.
3250                  */
3251                 if (report_ignored_msrs)
3252                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3253                                 msr, data);
3254                 break;
3255         case MSR_AMD64_OSVW_ID_LENGTH:
3256                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3257                         return 1;
3258                 vcpu->arch.osvw.length = data;
3259                 break;
3260         case MSR_AMD64_OSVW_STATUS:
3261                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3262                         return 1;
3263                 vcpu->arch.osvw.status = data;
3264                 break;
3265         case MSR_PLATFORM_INFO:
3266                 if (!msr_info->host_initiated ||
3267                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3268                      cpuid_fault_enabled(vcpu)))
3269                         return 1;
3270                 vcpu->arch.msr_platform_info = data;
3271                 break;
3272         case MSR_MISC_FEATURES_ENABLES:
3273                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3274                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3275                      !supports_cpuid_fault(vcpu)))
3276                         return 1;
3277                 vcpu->arch.msr_misc_features_enables = data;
3278                 break;
3279         default:
3280                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
3281                         return xen_hvm_config(vcpu, data);
3282                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3283                         return kvm_pmu_set_msr(vcpu, msr_info);
3284                 return KVM_MSR_RET_INVALID;
3285         }
3286         return 0;
3287 }
3288 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3289
3290 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3291 {
3292         u64 data;
3293         u64 mcg_cap = vcpu->arch.mcg_cap;
3294         unsigned bank_num = mcg_cap & 0xff;
3295
3296         switch (msr) {
3297         case MSR_IA32_P5_MC_ADDR:
3298         case MSR_IA32_P5_MC_TYPE:
3299                 data = 0;
3300                 break;
3301         case MSR_IA32_MCG_CAP:
3302                 data = vcpu->arch.mcg_cap;
3303                 break;
3304         case MSR_IA32_MCG_CTL:
3305                 if (!(mcg_cap & MCG_CTL_P) && !host)
3306                         return 1;
3307                 data = vcpu->arch.mcg_ctl;
3308                 break;
3309         case MSR_IA32_MCG_STATUS:
3310                 data = vcpu->arch.mcg_status;
3311                 break;
3312         default:
3313                 if (msr >= MSR_IA32_MC0_CTL &&
3314                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3315                         u32 offset = array_index_nospec(
3316                                 msr - MSR_IA32_MC0_CTL,
3317                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3318
3319                         data = vcpu->arch.mce_banks[offset];
3320                         break;
3321                 }
3322                 return 1;
3323         }
3324         *pdata = data;
3325         return 0;
3326 }
3327
3328 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3329 {
3330         switch (msr_info->index) {
3331         case MSR_IA32_PLATFORM_ID:
3332         case MSR_IA32_EBL_CR_POWERON:
3333         case MSR_IA32_DEBUGCTLMSR:
3334         case MSR_IA32_LASTBRANCHFROMIP:
3335         case MSR_IA32_LASTBRANCHTOIP:
3336         case MSR_IA32_LASTINTFROMIP:
3337         case MSR_IA32_LASTINTTOIP:
3338         case MSR_K8_SYSCFG:
3339         case MSR_K8_TSEG_ADDR:
3340         case MSR_K8_TSEG_MASK:
3341         case MSR_VM_HSAVE_PA:
3342         case MSR_K8_INT_PENDING_MSG:
3343         case MSR_AMD64_NB_CFG:
3344         case MSR_FAM10H_MMIO_CONF_BASE:
3345         case MSR_AMD64_BU_CFG2:
3346         case MSR_IA32_PERF_CTL:
3347         case MSR_AMD64_DC_CFG:
3348         case MSR_F15H_EX_CFG:
3349         /*
3350          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3351          * limit) MSRs. Just return 0, as we do not want to expose the host
3352          * data here. Do not conditionalize this on CPUID, as KVM does not do
3353          * so for existing CPU-specific MSRs.
3354          */
3355         case MSR_RAPL_POWER_UNIT:
3356         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3357         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3358         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3359         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3360                 msr_info->data = 0;
3361                 break;
3362         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3363         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3364         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3365         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3366         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3367                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3368                         return kvm_pmu_get_msr(vcpu, msr_info);
3369                 msr_info->data = 0;
3370                 break;
3371         case MSR_IA32_UCODE_REV:
3372                 msr_info->data = vcpu->arch.microcode_version;
3373                 break;
3374         case MSR_IA32_ARCH_CAPABILITIES:
3375                 if (!msr_info->host_initiated &&
3376                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3377                         return 1;
3378                 msr_info->data = vcpu->arch.arch_capabilities;
3379                 break;
3380         case MSR_IA32_PERF_CAPABILITIES:
3381                 if (!msr_info->host_initiated &&
3382                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3383                         return 1;
3384                 msr_info->data = vcpu->arch.perf_capabilities;
3385                 break;
3386         case MSR_IA32_POWER_CTL:
3387                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3388                 break;
3389         case MSR_IA32_TSC: {
3390                 /*
3391                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3392                  * even when not intercepted. AMD manual doesn't explicitly
3393                  * state this but appears to behave the same.
3394                  *
3395                  * Unconditionally return L1's TSC offset on userspace reads
3396                  * so that userspace reads and writes always operate on L1's
3397                  * offset, e.g. to ensure deterministic behavior for migration.
3398                  */
3399                 u64 tsc_offset = msr_info->host_initiated ? vcpu->arch.l1_tsc_offset :
3400                                                             vcpu->arch.tsc_offset;
3401
3402                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + tsc_offset;
3403                 break;
3404         }
3405         case MSR_MTRRcap:
3406         case 0x200 ... 0x2ff:
3407                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3408         case 0xcd: /* fsb frequency */
3409                 msr_info->data = 3;
3410                 break;
3411                 /*
3412                  * MSR_EBC_FREQUENCY_ID
3413                  * Conservative value valid for even the basic CPU models.
3414                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3415                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3416                  * and 266MHz for model 3, or 4. Set Core Clock
3417                  * Frequency to System Bus Frequency Ratio to 1 (bits
3418                  * 31:24) even though these are only valid for CPU
3419                  * models > 2, however guests may end up dividing or
3420                  * multiplying by zero otherwise.
3421                  */
3422         case MSR_EBC_FREQUENCY_ID:
3423                 msr_info->data = 1 << 24;
3424                 break;
3425         case MSR_IA32_APICBASE:
3426                 msr_info->data = kvm_get_apic_base(vcpu);
3427                 break;
3428         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3429                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3430         case MSR_IA32_TSCDEADLINE:
3431                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3432                 break;
3433         case MSR_IA32_TSC_ADJUST:
3434                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3435                 break;
3436         case MSR_IA32_MISC_ENABLE:
3437                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3438                 break;
3439         case MSR_IA32_SMBASE:
3440                 if (!msr_info->host_initiated)
3441                         return 1;
3442                 msr_info->data = vcpu->arch.smbase;
3443                 break;
3444         case MSR_SMI_COUNT:
3445                 msr_info->data = vcpu->arch.smi_count;
3446                 break;
3447         case MSR_IA32_PERF_STATUS:
3448                 /* TSC increment by tick */
3449                 msr_info->data = 1000ULL;
3450                 /* CPU multiplier */
3451                 msr_info->data |= (((uint64_t)4ULL) << 40);
3452                 break;
3453         case MSR_EFER:
3454                 msr_info->data = vcpu->arch.efer;
3455                 break;
3456         case MSR_KVM_WALL_CLOCK:
3457         case MSR_KVM_WALL_CLOCK_NEW:
3458                 msr_info->data = vcpu->kvm->arch.wall_clock;
3459                 break;
3460         case MSR_KVM_SYSTEM_TIME:
3461         case MSR_KVM_SYSTEM_TIME_NEW:
3462                 msr_info->data = vcpu->arch.time;
3463                 break;
3464         case MSR_KVM_ASYNC_PF_EN:
3465                 msr_info->data = vcpu->arch.apf.msr_en_val;
3466                 break;
3467         case MSR_KVM_ASYNC_PF_INT:
3468                 msr_info->data = vcpu->arch.apf.msr_int_val;
3469                 break;
3470         case MSR_KVM_ASYNC_PF_ACK:
3471                 msr_info->data = 0;
3472                 break;
3473         case MSR_KVM_STEAL_TIME:
3474                 msr_info->data = vcpu->arch.st.msr_val;
3475                 break;
3476         case MSR_KVM_PV_EOI_EN:
3477                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3478                 break;
3479         case MSR_KVM_POLL_CONTROL:
3480                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3481                 break;
3482         case MSR_IA32_P5_MC_ADDR:
3483         case MSR_IA32_P5_MC_TYPE:
3484         case MSR_IA32_MCG_CAP:
3485         case MSR_IA32_MCG_CTL:
3486         case MSR_IA32_MCG_STATUS:
3487         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3488                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3489                                    msr_info->host_initiated);
3490         case MSR_IA32_XSS:
3491                 if (!msr_info->host_initiated &&
3492                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3493                         return 1;
3494                 msr_info->data = vcpu->arch.ia32_xss;
3495                 break;
3496         case MSR_K7_CLK_CTL:
3497                 /*
3498                  * Provide expected ramp-up count for K7. All other
3499                  * are set to zero, indicating minimum divisors for
3500                  * every field.
3501                  *
3502                  * This prevents guest kernels on AMD host with CPU
3503                  * type 6, model 8 and higher from exploding due to
3504                  * the rdmsr failing.
3505                  */
3506                 msr_info->data = 0x20000000;
3507                 break;
3508         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3509         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3510         case HV_X64_MSR_SYNDBG_OPTIONS:
3511         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3512         case HV_X64_MSR_CRASH_CTL:
3513         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3514         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3515         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3516         case HV_X64_MSR_TSC_EMULATION_STATUS:
3517                 return kvm_hv_get_msr_common(vcpu,
3518                                              msr_info->index, &msr_info->data,
3519                                              msr_info->host_initiated);
3520         case MSR_IA32_BBL_CR_CTL3:
3521                 /* This legacy MSR exists but isn't fully documented in current
3522                  * silicon.  It is however accessed by winxp in very narrow
3523                  * scenarios where it sets bit #19, itself documented as
3524                  * a "reserved" bit.  Best effort attempt to source coherent
3525                  * read data here should the balance of the register be
3526                  * interpreted by the guest:
3527                  *
3528                  * L2 cache control register 3: 64GB range, 256KB size,
3529                  * enabled, latency 0x1, configured
3530                  */
3531                 msr_info->data = 0xbe702111;
3532                 break;
3533         case MSR_AMD64_OSVW_ID_LENGTH:
3534                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3535                         return 1;
3536                 msr_info->data = vcpu->arch.osvw.length;
3537                 break;
3538         case MSR_AMD64_OSVW_STATUS:
3539                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3540                         return 1;
3541                 msr_info->data = vcpu->arch.osvw.status;
3542                 break;
3543         case MSR_PLATFORM_INFO:
3544                 if (!msr_info->host_initiated &&
3545                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3546                         return 1;
3547                 msr_info->data = vcpu->arch.msr_platform_info;
3548                 break;
3549         case MSR_MISC_FEATURES_ENABLES:
3550                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3551                 break;
3552         case MSR_K7_HWCR:
3553                 msr_info->data = vcpu->arch.msr_hwcr;
3554                 break;
3555         default:
3556                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3557                         return kvm_pmu_get_msr(vcpu, msr_info);
3558                 return KVM_MSR_RET_INVALID;
3559         }
3560         return 0;
3561 }
3562 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3563
3564 /*
3565  * Read or write a bunch of msrs. All parameters are kernel addresses.
3566  *
3567  * @return number of msrs set successfully.
3568  */
3569 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3570                     struct kvm_msr_entry *entries,
3571                     int (*do_msr)(struct kvm_vcpu *vcpu,
3572                                   unsigned index, u64 *data))
3573 {
3574         int i;
3575
3576         for (i = 0; i < msrs->nmsrs; ++i)
3577                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3578                         break;
3579
3580         return i;
3581 }
3582
3583 /*
3584  * Read or write a bunch of msrs. Parameters are user addresses.
3585  *
3586  * @return number of msrs set successfully.
3587  */
3588 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3589                   int (*do_msr)(struct kvm_vcpu *vcpu,
3590                                 unsigned index, u64 *data),
3591                   int writeback)
3592 {
3593         struct kvm_msrs msrs;
3594         struct kvm_msr_entry *entries;
3595         int r, n;
3596         unsigned size;
3597
3598         r = -EFAULT;
3599         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3600                 goto out;
3601
3602         r = -E2BIG;
3603         if (msrs.nmsrs >= MAX_IO_MSRS)
3604                 goto out;
3605
3606         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3607         entries = memdup_user(user_msrs->entries, size);
3608         if (IS_ERR(entries)) {
3609                 r = PTR_ERR(entries);
3610                 goto out;
3611         }
3612
3613         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3614         if (r < 0)
3615                 goto out_free;
3616
3617         r = -EFAULT;
3618         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3619                 goto out_free;
3620
3621         r = n;
3622
3623 out_free:
3624         kfree(entries);
3625 out:
3626         return r;
3627 }
3628
3629 static inline bool kvm_can_mwait_in_guest(void)
3630 {
3631         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3632                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3633                 boot_cpu_has(X86_FEATURE_ARAT);
3634 }
3635
3636 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3637 {
3638         int r = 0;
3639
3640         switch (ext) {
3641         case KVM_CAP_IRQCHIP:
3642         case KVM_CAP_HLT:
3643         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3644         case KVM_CAP_SET_TSS_ADDR:
3645         case KVM_CAP_EXT_CPUID:
3646         case KVM_CAP_EXT_EMUL_CPUID:
3647         case KVM_CAP_CLOCKSOURCE:
3648         case KVM_CAP_PIT:
3649         case KVM_CAP_NOP_IO_DELAY:
3650         case KVM_CAP_MP_STATE:
3651         case KVM_CAP_SYNC_MMU:
3652         case KVM_CAP_USER_NMI:
3653         case KVM_CAP_REINJECT_CONTROL:
3654         case KVM_CAP_IRQ_INJECT_STATUS:
3655         case KVM_CAP_IOEVENTFD:
3656         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3657         case KVM_CAP_PIT2:
3658         case KVM_CAP_PIT_STATE2:
3659         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3660         case KVM_CAP_XEN_HVM:
3661         case KVM_CAP_VCPU_EVENTS:
3662         case KVM_CAP_HYPERV:
3663         case KVM_CAP_HYPERV_VAPIC:
3664         case KVM_CAP_HYPERV_SPIN:
3665         case KVM_CAP_HYPERV_SYNIC:
3666         case KVM_CAP_HYPERV_SYNIC2:
3667         case KVM_CAP_HYPERV_VP_INDEX:
3668         case KVM_CAP_HYPERV_EVENTFD:
3669         case KVM_CAP_HYPERV_TLBFLUSH:
3670         case KVM_CAP_HYPERV_SEND_IPI:
3671         case KVM_CAP_HYPERV_CPUID:
3672         case KVM_CAP_PCI_SEGMENT:
3673         case KVM_CAP_DEBUGREGS:
3674         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3675         case KVM_CAP_XSAVE:
3676         case KVM_CAP_ASYNC_PF:
3677         case KVM_CAP_ASYNC_PF_INT:
3678         case KVM_CAP_GET_TSC_KHZ:
3679         case KVM_CAP_KVMCLOCK_CTRL:
3680         case KVM_CAP_READONLY_MEM:
3681         case KVM_CAP_HYPERV_TIME:
3682         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3683         case KVM_CAP_TSC_DEADLINE_TIMER:
3684         case KVM_CAP_DISABLE_QUIRKS:
3685         case KVM_CAP_SET_BOOT_CPU_ID:
3686         case KVM_CAP_SPLIT_IRQCHIP:
3687         case KVM_CAP_IMMEDIATE_EXIT:
3688         case KVM_CAP_PMU_EVENT_FILTER:
3689         case KVM_CAP_GET_MSR_FEATURES:
3690         case KVM_CAP_MSR_PLATFORM_INFO:
3691         case KVM_CAP_EXCEPTION_PAYLOAD:
3692         case KVM_CAP_SET_GUEST_DEBUG:
3693         case KVM_CAP_LAST_CPU:
3694         case KVM_CAP_X86_USER_SPACE_MSR:
3695         case KVM_CAP_X86_MSR_FILTER:
3696         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
3697                 r = 1;
3698                 break;
3699         case KVM_CAP_SYNC_REGS:
3700                 r = KVM_SYNC_X86_VALID_FIELDS;
3701                 break;
3702         case KVM_CAP_ADJUST_CLOCK:
3703                 r = KVM_CLOCK_TSC_STABLE;
3704                 break;
3705         case KVM_CAP_X86_DISABLE_EXITS:
3706                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3707                       KVM_X86_DISABLE_EXITS_CSTATE;
3708                 if(kvm_can_mwait_in_guest())
3709                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3710                 break;
3711         case KVM_CAP_X86_SMM:
3712                 /* SMBASE is usually relocated above 1M on modern chipsets,
3713                  * and SMM handlers might indeed rely on 4G segment limits,
3714                  * so do not report SMM to be available if real mode is
3715                  * emulated via vm86 mode.  Still, do not go to great lengths
3716                  * to avoid userspace's usage of the feature, because it is a
3717                  * fringe case that is not enabled except via specific settings
3718                  * of the module parameters.
3719                  */
3720                 r = kvm_x86_ops.has_emulated_msr(MSR_IA32_SMBASE);
3721                 break;
3722         case KVM_CAP_VAPIC:
3723                 r = !kvm_x86_ops.cpu_has_accelerated_tpr();
3724                 break;
3725         case KVM_CAP_NR_VCPUS:
3726                 r = KVM_SOFT_MAX_VCPUS;
3727                 break;
3728         case KVM_CAP_MAX_VCPUS:
3729                 r = KVM_MAX_VCPUS;
3730                 break;
3731         case KVM_CAP_MAX_VCPU_ID:
3732                 r = KVM_MAX_VCPU_ID;
3733                 break;
3734         case KVM_CAP_PV_MMU:    /* obsolete */
3735                 r = 0;
3736                 break;
3737         case KVM_CAP_MCE:
3738                 r = KVM_MAX_MCE_BANKS;
3739                 break;
3740         case KVM_CAP_XCRS:
3741                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3742                 break;
3743         case KVM_CAP_TSC_CONTROL:
3744                 r = kvm_has_tsc_control;
3745                 break;
3746         case KVM_CAP_X2APIC_API:
3747                 r = KVM_X2APIC_API_VALID_FLAGS;
3748                 break;
3749         case KVM_CAP_NESTED_STATE:
3750                 r = kvm_x86_ops.nested_ops->get_state ?
3751                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
3752                 break;
3753         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3754                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
3755                 break;
3756         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3757                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
3758                 break;
3759         case KVM_CAP_SMALLER_MAXPHYADDR:
3760                 r = (int) allow_smaller_maxphyaddr;
3761                 break;
3762         case KVM_CAP_STEAL_TIME:
3763                 r = sched_info_on();
3764                 break;
3765         default:
3766                 break;
3767         }
3768         return r;
3769
3770 }
3771
3772 long kvm_arch_dev_ioctl(struct file *filp,
3773                         unsigned int ioctl, unsigned long arg)
3774 {
3775         void __user *argp = (void __user *)arg;
3776         long r;
3777
3778         switch (ioctl) {
3779         case KVM_GET_MSR_INDEX_LIST: {
3780                 struct kvm_msr_list __user *user_msr_list = argp;
3781                 struct kvm_msr_list msr_list;
3782                 unsigned n;
3783
3784                 r = -EFAULT;
3785                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3786                         goto out;
3787                 n = msr_list.nmsrs;
3788                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3789                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3790                         goto out;
3791                 r = -E2BIG;
3792                 if (n < msr_list.nmsrs)
3793                         goto out;
3794                 r = -EFAULT;
3795                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3796                                  num_msrs_to_save * sizeof(u32)))
3797                         goto out;
3798                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3799                                  &emulated_msrs,
3800                                  num_emulated_msrs * sizeof(u32)))
3801                         goto out;
3802                 r = 0;
3803                 break;
3804         }
3805         case KVM_GET_SUPPORTED_CPUID:
3806         case KVM_GET_EMULATED_CPUID: {
3807                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3808                 struct kvm_cpuid2 cpuid;
3809
3810                 r = -EFAULT;
3811                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3812                         goto out;
3813
3814                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3815                                             ioctl);
3816                 if (r)
3817                         goto out;
3818
3819                 r = -EFAULT;
3820                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3821                         goto out;
3822                 r = 0;
3823                 break;
3824         }
3825         case KVM_X86_GET_MCE_CAP_SUPPORTED:
3826                 r = -EFAULT;
3827                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3828                                  sizeof(kvm_mce_cap_supported)))
3829                         goto out;
3830                 r = 0;
3831                 break;
3832         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3833                 struct kvm_msr_list __user *user_msr_list = argp;
3834                 struct kvm_msr_list msr_list;
3835                 unsigned int n;
3836
3837                 r = -EFAULT;
3838                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3839                         goto out;
3840                 n = msr_list.nmsrs;
3841                 msr_list.nmsrs = num_msr_based_features;
3842                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3843                         goto out;
3844                 r = -E2BIG;
3845                 if (n < msr_list.nmsrs)
3846                         goto out;
3847                 r = -EFAULT;
3848                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3849                                  num_msr_based_features * sizeof(u32)))
3850                         goto out;
3851                 r = 0;
3852                 break;
3853         }
3854         case KVM_GET_MSRS:
3855                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3856                 break;
3857         default:
3858                 r = -EINVAL;
3859                 break;
3860         }
3861 out:
3862         return r;
3863 }
3864
3865 static void wbinvd_ipi(void *garbage)
3866 {
3867         wbinvd();
3868 }
3869
3870 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3871 {
3872         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3873 }
3874
3875 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3876 {
3877         /* Address WBINVD may be executed by guest */
3878         if (need_emulate_wbinvd(vcpu)) {
3879                 if (kvm_x86_ops.has_wbinvd_exit())
3880                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3881                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3882                         smp_call_function_single(vcpu->cpu,
3883                                         wbinvd_ipi, NULL, 1);
3884         }
3885
3886         kvm_x86_ops.vcpu_load(vcpu, cpu);
3887
3888         /* Save host pkru register if supported */
3889         vcpu->arch.host_pkru = read_pkru();
3890
3891         /* Apply any externally detected TSC adjustments (due to suspend) */
3892         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3893                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3894                 vcpu->arch.tsc_offset_adjustment = 0;
3895                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3896         }
3897
3898         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3899                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3900                                 rdtsc() - vcpu->arch.last_host_tsc;
3901                 if (tsc_delta < 0)
3902                         mark_tsc_unstable("KVM discovered backwards TSC");
3903
3904                 if (kvm_check_tsc_unstable()) {
3905                         u64 offset = kvm_compute_tsc_offset(vcpu,
3906                                                 vcpu->arch.last_guest_tsc);
3907                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3908                         vcpu->arch.tsc_catchup = 1;
3909                 }
3910
3911                 if (kvm_lapic_hv_timer_in_use(vcpu))
3912                         kvm_lapic_restart_hv_timer(vcpu);
3913
3914                 /*
3915                  * On a host with synchronized TSC, there is no need to update
3916                  * kvmclock on vcpu->cpu migration
3917                  */
3918                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3919                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3920                 if (vcpu->cpu != cpu)
3921                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3922                 vcpu->cpu = cpu;
3923         }
3924
3925         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3926 }
3927
3928 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3929 {
3930         struct kvm_host_map map;
3931         struct kvm_steal_time *st;
3932
3933         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3934                 return;
3935
3936         if (vcpu->arch.st.preempted)
3937                 return;
3938
3939         if (kvm_map_gfn(vcpu, vcpu->arch.st.msr_val >> PAGE_SHIFT, &map,
3940                         &vcpu->arch.st.cache, true))
3941                 return;
3942
3943         st = map.hva +
3944                 offset_in_page(vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS);
3945
3946         st->preempted = vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
3947
3948         kvm_unmap_gfn(vcpu, &map, &vcpu->arch.st.cache, true, true);
3949 }
3950
3951 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3952 {
3953         int idx;
3954
3955         if (vcpu->preempted)
3956                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops.get_cpl(vcpu);
3957
3958         /*
3959          * Disable page faults because we're in atomic context here.
3960          * kvm_write_guest_offset_cached() would call might_fault()
3961          * that relies on pagefault_disable() to tell if there's a
3962          * bug. NOTE: the write to guest memory may not go through if
3963          * during postcopy live migration or if there's heavy guest
3964          * paging.
3965          */
3966         pagefault_disable();
3967         /*
3968          * kvm_memslots() will be called by
3969          * kvm_write_guest_offset_cached() so take the srcu lock.
3970          */
3971         idx = srcu_read_lock(&vcpu->kvm->srcu);
3972         kvm_steal_time_set_preempted(vcpu);
3973         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3974         pagefault_enable();
3975         kvm_x86_ops.vcpu_put(vcpu);
3976         vcpu->arch.last_host_tsc = rdtsc();
3977         /*
3978          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3979          * on every vmexit, but if not, we might have a stale dr6 from the
3980          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3981          */
3982         set_debugreg(0, 6);
3983 }
3984
3985 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3986                                     struct kvm_lapic_state *s)
3987 {
3988         if (vcpu->arch.apicv_active)
3989                 kvm_x86_ops.sync_pir_to_irr(vcpu);
3990
3991         return kvm_apic_get_state(vcpu, s);
3992 }
3993
3994 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3995                                     struct kvm_lapic_state *s)
3996 {
3997         int r;
3998
3999         r = kvm_apic_set_state(vcpu, s);
4000         if (r)
4001                 return r;
4002         update_cr8_intercept(vcpu);
4003
4004         return 0;
4005 }
4006
4007 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4008 {
4009         return (!lapic_in_kernel(vcpu) ||
4010                 kvm_apic_accept_pic_intr(vcpu));
4011 }
4012
4013 /*
4014  * if userspace requested an interrupt window, check that the
4015  * interrupt window is open.
4016  *
4017  * No need to exit to userspace if we already have an interrupt queued.
4018  */
4019 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4020 {
4021         return kvm_arch_interrupt_allowed(vcpu) &&
4022                 !kvm_cpu_has_interrupt(vcpu) &&
4023                 !kvm_event_needs_reinjection(vcpu) &&
4024                 kvm_cpu_accept_dm_intr(vcpu);
4025 }
4026
4027 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4028                                     struct kvm_interrupt *irq)
4029 {
4030         if (irq->irq >= KVM_NR_INTERRUPTS)
4031                 return -EINVAL;
4032
4033         if (!irqchip_in_kernel(vcpu->kvm)) {
4034                 kvm_queue_interrupt(vcpu, irq->irq, false);
4035                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4036                 return 0;
4037         }
4038
4039         /*
4040          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4041          * fail for in-kernel 8259.
4042          */
4043         if (pic_in_kernel(vcpu->kvm))
4044                 return -ENXIO;
4045
4046         if (vcpu->arch.pending_external_vector != -1)
4047                 return -EEXIST;
4048
4049         vcpu->arch.pending_external_vector = irq->irq;
4050         kvm_make_request(KVM_REQ_EVENT, vcpu);
4051         return 0;
4052 }
4053
4054 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4055 {
4056         kvm_inject_nmi(vcpu);
4057
4058         return 0;
4059 }
4060
4061 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4062 {
4063         kvm_make_request(KVM_REQ_SMI, vcpu);
4064
4065         return 0;
4066 }
4067
4068 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4069                                            struct kvm_tpr_access_ctl *tac)
4070 {
4071         if (tac->flags)
4072                 return -EINVAL;
4073         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4074         return 0;
4075 }
4076
4077 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4078                                         u64 mcg_cap)
4079 {
4080         int r;
4081         unsigned bank_num = mcg_cap & 0xff, bank;
4082
4083         r = -EINVAL;
4084         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4085                 goto out;
4086         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4087                 goto out;
4088         r = 0;
4089         vcpu->arch.mcg_cap = mcg_cap;
4090         /* Init IA32_MCG_CTL to all 1s */
4091         if (mcg_cap & MCG_CTL_P)
4092                 vcpu->arch.mcg_ctl = ~(u64)0;
4093         /* Init IA32_MCi_CTL to all 1s */
4094         for (bank = 0; bank < bank_num; bank++)
4095                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4096
4097         kvm_x86_ops.setup_mce(vcpu);
4098 out:
4099         return r;
4100 }
4101
4102 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4103                                       struct kvm_x86_mce *mce)
4104 {
4105         u64 mcg_cap = vcpu->arch.mcg_cap;
4106         unsigned bank_num = mcg_cap & 0xff;
4107         u64 *banks = vcpu->arch.mce_banks;
4108
4109         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4110                 return -EINVAL;
4111         /*
4112          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4113          * reporting is disabled
4114          */
4115         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4116             vcpu->arch.mcg_ctl != ~(u64)0)
4117                 return 0;
4118         banks += 4 * mce->bank;
4119         /*
4120          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4121          * reporting is disabled for the bank
4122          */
4123         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4124                 return 0;
4125         if (mce->status & MCI_STATUS_UC) {
4126                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4127                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4128                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4129                         return 0;
4130                 }
4131                 if (banks[1] & MCI_STATUS_VAL)
4132                         mce->status |= MCI_STATUS_OVER;
4133                 banks[2] = mce->addr;
4134                 banks[3] = mce->misc;
4135                 vcpu->arch.mcg_status = mce->mcg_status;
4136                 banks[1] = mce->status;
4137                 kvm_queue_exception(vcpu, MC_VECTOR);
4138         } else if (!(banks[1] & MCI_STATUS_VAL)
4139                    || !(banks[1] & MCI_STATUS_UC)) {
4140                 if (banks[1] & MCI_STATUS_VAL)
4141                         mce->status |= MCI_STATUS_OVER;
4142                 banks[2] = mce->addr;
4143                 banks[3] = mce->misc;
4144                 banks[1] = mce->status;
4145         } else
4146                 banks[1] |= MCI_STATUS_OVER;
4147         return 0;
4148 }
4149
4150 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4151                                                struct kvm_vcpu_events *events)
4152 {
4153         process_nmi(vcpu);
4154
4155         /*
4156          * In guest mode, payload delivery should be deferred,
4157          * so that the L1 hypervisor can intercept #PF before
4158          * CR2 is modified (or intercept #DB before DR6 is
4159          * modified under nVMX). Unless the per-VM capability,
4160          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4161          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4162          * opportunistically defer the exception payload, deliver it if the
4163          * capability hasn't been requested before processing a
4164          * KVM_GET_VCPU_EVENTS.
4165          */
4166         if (!vcpu->kvm->arch.exception_payload_enabled &&
4167             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4168                 kvm_deliver_exception_payload(vcpu);
4169
4170         /*
4171          * The API doesn't provide the instruction length for software
4172          * exceptions, so don't report them. As long as the guest RIP
4173          * isn't advanced, we should expect to encounter the exception
4174          * again.
4175          */
4176         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4177                 events->exception.injected = 0;
4178                 events->exception.pending = 0;
4179         } else {
4180                 events->exception.injected = vcpu->arch.exception.injected;
4181                 events->exception.pending = vcpu->arch.exception.pending;
4182                 /*
4183                  * For ABI compatibility, deliberately conflate
4184                  * pending and injected exceptions when
4185                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4186                  */
4187                 if (!vcpu->kvm->arch.exception_payload_enabled)
4188                         events->exception.injected |=
4189                                 vcpu->arch.exception.pending;
4190         }
4191         events->exception.nr = vcpu->arch.exception.nr;
4192         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4193         events->exception.error_code = vcpu->arch.exception.error_code;
4194         events->exception_has_payload = vcpu->arch.exception.has_payload;
4195         events->exception_payload = vcpu->arch.exception.payload;
4196
4197         events->interrupt.injected =
4198                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4199         events->interrupt.nr = vcpu->arch.interrupt.nr;
4200         events->interrupt.soft = 0;
4201         events->interrupt.shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
4202
4203         events->nmi.injected = vcpu->arch.nmi_injected;
4204         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4205         events->nmi.masked = kvm_x86_ops.get_nmi_mask(vcpu);
4206         events->nmi.pad = 0;
4207
4208         events->sipi_vector = 0; /* never valid when reporting to user space */
4209
4210         events->smi.smm = is_smm(vcpu);
4211         events->smi.pending = vcpu->arch.smi_pending;
4212         events->smi.smm_inside_nmi =
4213                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4214         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4215
4216         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4217                          | KVM_VCPUEVENT_VALID_SHADOW
4218                          | KVM_VCPUEVENT_VALID_SMM);
4219         if (vcpu->kvm->arch.exception_payload_enabled)
4220                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4221
4222         memset(&events->reserved, 0, sizeof(events->reserved));
4223 }
4224
4225 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
4226
4227 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4228                                               struct kvm_vcpu_events *events)
4229 {
4230         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4231                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4232                               | KVM_VCPUEVENT_VALID_SHADOW
4233                               | KVM_VCPUEVENT_VALID_SMM
4234                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4235                 return -EINVAL;
4236
4237         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4238                 if (!vcpu->kvm->arch.exception_payload_enabled)
4239                         return -EINVAL;
4240                 if (events->exception.pending)
4241                         events->exception.injected = 0;
4242                 else
4243                         events->exception_has_payload = 0;
4244         } else {
4245                 events->exception.pending = 0;
4246                 events->exception_has_payload = 0;
4247         }
4248
4249         if ((events->exception.injected || events->exception.pending) &&
4250             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4251                 return -EINVAL;
4252
4253         /* INITs are latched while in SMM */
4254         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4255             (events->smi.smm || events->smi.pending) &&
4256             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4257                 return -EINVAL;
4258
4259         process_nmi(vcpu);
4260         vcpu->arch.exception.injected = events->exception.injected;
4261         vcpu->arch.exception.pending = events->exception.pending;
4262         vcpu->arch.exception.nr = events->exception.nr;
4263         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4264         vcpu->arch.exception.error_code = events->exception.error_code;
4265         vcpu->arch.exception.has_payload = events->exception_has_payload;
4266         vcpu->arch.exception.payload = events->exception_payload;
4267
4268         vcpu->arch.interrupt.injected = events->interrupt.injected;
4269         vcpu->arch.interrupt.nr = events->interrupt.nr;
4270         vcpu->arch.interrupt.soft = events->interrupt.soft;
4271         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4272                 kvm_x86_ops.set_interrupt_shadow(vcpu,
4273                                                   events->interrupt.shadow);
4274
4275         vcpu->arch.nmi_injected = events->nmi.injected;
4276         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4277                 vcpu->arch.nmi_pending = events->nmi.pending;
4278         kvm_x86_ops.set_nmi_mask(vcpu, events->nmi.masked);
4279
4280         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4281             lapic_in_kernel(vcpu))
4282                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4283
4284         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4285                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4286                         if (events->smi.smm)
4287                                 vcpu->arch.hflags |= HF_SMM_MASK;
4288                         else
4289                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
4290                         kvm_smm_changed(vcpu);
4291                 }
4292
4293                 vcpu->arch.smi_pending = events->smi.pending;
4294
4295                 if (events->smi.smm) {
4296                         if (events->smi.smm_inside_nmi)
4297                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4298                         else
4299                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4300                 }
4301
4302                 if (lapic_in_kernel(vcpu)) {
4303                         if (events->smi.latched_init)
4304                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4305                         else
4306                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4307                 }
4308         }
4309
4310         kvm_make_request(KVM_REQ_EVENT, vcpu);
4311
4312         return 0;
4313 }
4314
4315 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4316                                              struct kvm_debugregs *dbgregs)
4317 {
4318         unsigned long val;
4319
4320         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4321         kvm_get_dr(vcpu, 6, &val);
4322         dbgregs->dr6 = val;
4323         dbgregs->dr7 = vcpu->arch.dr7;
4324         dbgregs->flags = 0;
4325         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4326 }
4327
4328 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4329                                             struct kvm_debugregs *dbgregs)
4330 {
4331         if (dbgregs->flags)
4332                 return -EINVAL;
4333
4334         if (dbgregs->dr6 & ~0xffffffffull)
4335                 return -EINVAL;
4336         if (dbgregs->dr7 & ~0xffffffffull)
4337                 return -EINVAL;
4338
4339         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4340         kvm_update_dr0123(vcpu);
4341         vcpu->arch.dr6 = dbgregs->dr6;
4342         vcpu->arch.dr7 = dbgregs->dr7;
4343         kvm_update_dr7(vcpu);
4344
4345         return 0;
4346 }
4347
4348 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4349
4350 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4351 {
4352         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4353         u64 xstate_bv = xsave->header.xfeatures;
4354         u64 valid;
4355
4356         /*
4357          * Copy legacy XSAVE area, to avoid complications with CPUID
4358          * leaves 0 and 1 in the loop below.
4359          */
4360         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4361
4362         /* Set XSTATE_BV */
4363         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4364         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4365
4366         /*
4367          * Copy each region from the possibly compacted offset to the
4368          * non-compacted offset.
4369          */
4370         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4371         while (valid) {
4372                 u64 xfeature_mask = valid & -valid;
4373                 int xfeature_nr = fls64(xfeature_mask) - 1;
4374                 void *src = get_xsave_addr(xsave, xfeature_nr);
4375
4376                 if (src) {
4377                         u32 size, offset, ecx, edx;
4378                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4379                                     &size, &offset, &ecx, &edx);
4380                         if (xfeature_nr == XFEATURE_PKRU)
4381                                 memcpy(dest + offset, &vcpu->arch.pkru,
4382                                        sizeof(vcpu->arch.pkru));
4383                         else
4384                                 memcpy(dest + offset, src, size);
4385
4386                 }
4387
4388                 valid -= xfeature_mask;
4389         }
4390 }
4391
4392 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4393 {
4394         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4395         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4396         u64 valid;
4397
4398         /*
4399          * Copy legacy XSAVE area, to avoid complications with CPUID
4400          * leaves 0 and 1 in the loop below.
4401          */
4402         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4403
4404         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4405         xsave->header.xfeatures = xstate_bv;
4406         if (boot_cpu_has(X86_FEATURE_XSAVES))
4407                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4408
4409         /*
4410          * Copy each region from the non-compacted offset to the
4411          * possibly compacted offset.
4412          */
4413         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4414         while (valid) {
4415                 u64 xfeature_mask = valid & -valid;
4416                 int xfeature_nr = fls64(xfeature_mask) - 1;
4417                 void *dest = get_xsave_addr(xsave, xfeature_nr);
4418
4419                 if (dest) {
4420                         u32 size, offset, ecx, edx;
4421                         cpuid_count(XSTATE_CPUID, xfeature_nr,
4422                                     &size, &offset, &ecx, &edx);
4423                         if (xfeature_nr == XFEATURE_PKRU)
4424                                 memcpy(&vcpu->arch.pkru, src + offset,
4425                                        sizeof(vcpu->arch.pkru));
4426                         else
4427                                 memcpy(dest, src + offset, size);
4428                 }
4429
4430                 valid -= xfeature_mask;
4431         }
4432 }
4433
4434 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4435                                          struct kvm_xsave *guest_xsave)
4436 {
4437         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4438                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4439                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4440         } else {
4441                 memcpy(guest_xsave->region,
4442                         &vcpu->arch.guest_fpu->state.fxsave,
4443                         sizeof(struct fxregs_state));
4444                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4445                         XFEATURE_MASK_FPSSE;
4446         }
4447 }
4448
4449 #define XSAVE_MXCSR_OFFSET 24
4450
4451 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4452                                         struct kvm_xsave *guest_xsave)
4453 {
4454         u64 xstate_bv =
4455                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4456         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4457
4458         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4459                 /*
4460                  * Here we allow setting states that are not present in
4461                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4462                  * with old userspace.
4463                  */
4464                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4465                         return -EINVAL;
4466                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4467         } else {
4468                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4469                         mxcsr & ~mxcsr_feature_mask)
4470                         return -EINVAL;
4471                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4472                         guest_xsave->region, sizeof(struct fxregs_state));
4473         }
4474         return 0;
4475 }
4476
4477 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4478                                         struct kvm_xcrs *guest_xcrs)
4479 {
4480         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4481                 guest_xcrs->nr_xcrs = 0;
4482                 return;
4483         }
4484
4485         guest_xcrs->nr_xcrs = 1;
4486         guest_xcrs->flags = 0;
4487         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4488         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4489 }
4490
4491 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4492                                        struct kvm_xcrs *guest_xcrs)
4493 {
4494         int i, r = 0;
4495
4496         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4497                 return -EINVAL;
4498
4499         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4500                 return -EINVAL;
4501
4502         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4503                 /* Only support XCR0 currently */
4504                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4505                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4506                                 guest_xcrs->xcrs[i].value);
4507                         break;
4508                 }
4509         if (r)
4510                 r = -EINVAL;
4511         return r;
4512 }
4513
4514 /*
4515  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4516  * stopped by the hypervisor.  This function will be called from the host only.
4517  * EINVAL is returned when the host attempts to set the flag for a guest that
4518  * does not support pv clocks.
4519  */
4520 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4521 {
4522         if (!vcpu->arch.pv_time_enabled)
4523                 return -EINVAL;
4524         vcpu->arch.pvclock_set_guest_stopped_request = true;
4525         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4526         return 0;
4527 }
4528
4529 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4530                                      struct kvm_enable_cap *cap)
4531 {
4532         int r;
4533         uint16_t vmcs_version;
4534         void __user *user_ptr;
4535
4536         if (cap->flags)
4537                 return -EINVAL;
4538
4539         switch (cap->cap) {
4540         case KVM_CAP_HYPERV_SYNIC2:
4541                 if (cap->args[0])
4542                         return -EINVAL;
4543                 fallthrough;
4544
4545         case KVM_CAP_HYPERV_SYNIC:
4546                 if (!irqchip_in_kernel(vcpu->kvm))
4547                         return -EINVAL;
4548                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4549                                              KVM_CAP_HYPERV_SYNIC2);
4550         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4551                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
4552                         return -ENOTTY;
4553                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
4554                 if (!r) {
4555                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4556                         if (copy_to_user(user_ptr, &vmcs_version,
4557                                          sizeof(vmcs_version)))
4558                                 r = -EFAULT;
4559                 }
4560                 return r;
4561         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4562                 if (!kvm_x86_ops.enable_direct_tlbflush)
4563                         return -ENOTTY;
4564
4565                 return kvm_x86_ops.enable_direct_tlbflush(vcpu);
4566
4567         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4568                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
4569
4570                 return 0;
4571
4572         default:
4573                 return -EINVAL;
4574         }
4575 }
4576
4577 long kvm_arch_vcpu_ioctl(struct file *filp,
4578                          unsigned int ioctl, unsigned long arg)
4579 {
4580         struct kvm_vcpu *vcpu = filp->private_data;
4581         void __user *argp = (void __user *)arg;
4582         int r;
4583         union {
4584                 struct kvm_lapic_state *lapic;
4585                 struct kvm_xsave *xsave;
4586                 struct kvm_xcrs *xcrs;
4587                 void *buffer;
4588         } u;
4589
4590         vcpu_load(vcpu);
4591
4592         u.buffer = NULL;
4593         switch (ioctl) {
4594         case KVM_GET_LAPIC: {
4595                 r = -EINVAL;
4596                 if (!lapic_in_kernel(vcpu))
4597                         goto out;
4598                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4599                                 GFP_KERNEL_ACCOUNT);
4600
4601                 r = -ENOMEM;
4602                 if (!u.lapic)
4603                         goto out;
4604                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4605                 if (r)
4606                         goto out;
4607                 r = -EFAULT;
4608                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4609                         goto out;
4610                 r = 0;
4611                 break;
4612         }
4613         case KVM_SET_LAPIC: {
4614                 r = -EINVAL;
4615                 if (!lapic_in_kernel(vcpu))
4616                         goto out;
4617                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4618                 if (IS_ERR(u.lapic)) {
4619                         r = PTR_ERR(u.lapic);
4620                         goto out_nofree;
4621                 }
4622
4623                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4624                 break;
4625         }
4626         case KVM_INTERRUPT: {
4627                 struct kvm_interrupt irq;
4628
4629                 r = -EFAULT;
4630                 if (copy_from_user(&irq, argp, sizeof(irq)))
4631                         goto out;
4632                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4633                 break;
4634         }
4635         case KVM_NMI: {
4636                 r = kvm_vcpu_ioctl_nmi(vcpu);
4637                 break;
4638         }
4639         case KVM_SMI: {
4640                 r = kvm_vcpu_ioctl_smi(vcpu);
4641                 break;
4642         }
4643         case KVM_SET_CPUID: {
4644                 struct kvm_cpuid __user *cpuid_arg = argp;
4645                 struct kvm_cpuid cpuid;
4646
4647                 r = -EFAULT;
4648                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4649                         goto out;
4650                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4651                 break;
4652         }
4653         case KVM_SET_CPUID2: {
4654                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4655                 struct kvm_cpuid2 cpuid;
4656
4657                 r = -EFAULT;
4658                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4659                         goto out;
4660                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4661                                               cpuid_arg->entries);
4662                 break;
4663         }
4664         case KVM_GET_CPUID2: {
4665                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4666                 struct kvm_cpuid2 cpuid;
4667
4668                 r = -EFAULT;
4669                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4670                         goto out;
4671                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4672                                               cpuid_arg->entries);
4673                 if (r)
4674                         goto out;
4675                 r = -EFAULT;
4676                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4677                         goto out;
4678                 r = 0;
4679                 break;
4680         }
4681         case KVM_GET_MSRS: {
4682                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4683                 r = msr_io(vcpu, argp, do_get_msr, 1);
4684                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4685                 break;
4686         }
4687         case KVM_SET_MSRS: {
4688                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4689                 r = msr_io(vcpu, argp, do_set_msr, 0);
4690                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4691                 break;
4692         }
4693         case KVM_TPR_ACCESS_REPORTING: {
4694                 struct kvm_tpr_access_ctl tac;
4695
4696                 r = -EFAULT;
4697                 if (copy_from_user(&tac, argp, sizeof(tac)))
4698                         goto out;
4699                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4700                 if (r)
4701                         goto out;
4702                 r = -EFAULT;
4703                 if (copy_to_user(argp, &tac, sizeof(tac)))
4704                         goto out;
4705                 r = 0;
4706                 break;
4707         };
4708         case KVM_SET_VAPIC_ADDR: {
4709                 struct kvm_vapic_addr va;
4710                 int idx;
4711
4712                 r = -EINVAL;
4713                 if (!lapic_in_kernel(vcpu))
4714                         goto out;
4715                 r = -EFAULT;
4716                 if (copy_from_user(&va, argp, sizeof(va)))
4717                         goto out;
4718                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4719                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4720                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4721                 break;
4722         }
4723         case KVM_X86_SETUP_MCE: {
4724                 u64 mcg_cap;
4725
4726                 r = -EFAULT;
4727                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4728                         goto out;
4729                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4730                 break;
4731         }
4732         case KVM_X86_SET_MCE: {
4733                 struct kvm_x86_mce mce;
4734
4735                 r = -EFAULT;
4736                 if (copy_from_user(&mce, argp, sizeof(mce)))
4737                         goto out;
4738                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4739                 break;
4740         }
4741         case KVM_GET_VCPU_EVENTS: {
4742                 struct kvm_vcpu_events events;
4743
4744                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4745
4746                 r = -EFAULT;
4747                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4748                         break;
4749                 r = 0;
4750                 break;
4751         }
4752         case KVM_SET_VCPU_EVENTS: {
4753                 struct kvm_vcpu_events events;
4754
4755                 r = -EFAULT;
4756                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4757                         break;
4758
4759                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4760                 break;
4761         }
4762         case KVM_GET_DEBUGREGS: {
4763                 struct kvm_debugregs dbgregs;
4764
4765                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4766
4767                 r = -EFAULT;
4768                 if (copy_to_user(argp, &dbgregs,
4769                                  sizeof(struct kvm_debugregs)))
4770                         break;
4771                 r = 0;
4772                 break;
4773         }
4774         case KVM_SET_DEBUGREGS: {
4775                 struct kvm_debugregs dbgregs;
4776
4777                 r = -EFAULT;
4778                 if (copy_from_user(&dbgregs, argp,
4779                                    sizeof(struct kvm_debugregs)))
4780                         break;
4781
4782                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4783                 break;
4784         }
4785         case KVM_GET_XSAVE: {
4786                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4787                 r = -ENOMEM;
4788                 if (!u.xsave)
4789                         break;
4790
4791                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4792
4793                 r = -EFAULT;
4794                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4795                         break;
4796                 r = 0;
4797                 break;
4798         }
4799         case KVM_SET_XSAVE: {
4800                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4801                 if (IS_ERR(u.xsave)) {
4802                         r = PTR_ERR(u.xsave);
4803                         goto out_nofree;
4804                 }
4805
4806                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4807                 break;
4808         }
4809         case KVM_GET_XCRS: {
4810                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4811                 r = -ENOMEM;
4812                 if (!u.xcrs)
4813                         break;
4814
4815                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4816
4817                 r = -EFAULT;
4818                 if (copy_to_user(argp, u.xcrs,
4819                                  sizeof(struct kvm_xcrs)))
4820                         break;
4821                 r = 0;
4822                 break;
4823         }
4824         case KVM_SET_XCRS: {
4825                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4826                 if (IS_ERR(u.xcrs)) {
4827                         r = PTR_ERR(u.xcrs);
4828                         goto out_nofree;
4829                 }
4830
4831                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4832                 break;
4833         }
4834         case KVM_SET_TSC_KHZ: {
4835                 u32 user_tsc_khz;
4836
4837                 r = -EINVAL;
4838                 user_tsc_khz = (u32)arg;
4839
4840                 if (kvm_has_tsc_control &&
4841                     user_tsc_khz >= kvm_max_guest_tsc_khz)
4842                         goto out;
4843
4844                 if (user_tsc_khz == 0)
4845                         user_tsc_khz = tsc_khz;
4846
4847                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4848                         r = 0;
4849
4850                 goto out;
4851         }
4852         case KVM_GET_TSC_KHZ: {
4853                 r = vcpu->arch.virtual_tsc_khz;
4854                 goto out;
4855         }
4856         case KVM_KVMCLOCK_CTRL: {
4857                 r = kvm_set_guest_paused(vcpu);
4858                 goto out;
4859         }
4860         case KVM_ENABLE_CAP: {
4861                 struct kvm_enable_cap cap;
4862
4863                 r = -EFAULT;
4864                 if (copy_from_user(&cap, argp, sizeof(cap)))
4865                         goto out;
4866                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4867                 break;
4868         }
4869         case KVM_GET_NESTED_STATE: {
4870                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4871                 u32 user_data_size;
4872
4873                 r = -EINVAL;
4874                 if (!kvm_x86_ops.nested_ops->get_state)
4875                         break;
4876
4877                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4878                 r = -EFAULT;
4879                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4880                         break;
4881
4882                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
4883                                                      user_data_size);
4884                 if (r < 0)
4885                         break;
4886
4887                 if (r > user_data_size) {
4888                         if (put_user(r, &user_kvm_nested_state->size))
4889                                 r = -EFAULT;
4890                         else
4891                                 r = -E2BIG;
4892                         break;
4893                 }
4894
4895                 r = 0;
4896                 break;
4897         }
4898         case KVM_SET_NESTED_STATE: {
4899                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4900                 struct kvm_nested_state kvm_state;
4901                 int idx;
4902
4903                 r = -EINVAL;
4904                 if (!kvm_x86_ops.nested_ops->set_state)
4905                         break;
4906
4907                 r = -EFAULT;
4908                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4909                         break;
4910
4911                 r = -EINVAL;
4912                 if (kvm_state.size < sizeof(kvm_state))
4913                         break;
4914
4915                 if (kvm_state.flags &
4916                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4917                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
4918                       | KVM_STATE_NESTED_GIF_SET))
4919                         break;
4920
4921                 /* nested_run_pending implies guest_mode.  */
4922                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4923                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4924                         break;
4925
4926                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4927                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
4928                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4929                 break;
4930         }
4931         case KVM_GET_SUPPORTED_HV_CPUID: {
4932                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4933                 struct kvm_cpuid2 cpuid;
4934
4935                 r = -EFAULT;
4936                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4937                         goto out;
4938
4939                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4940                                                 cpuid_arg->entries);
4941                 if (r)
4942                         goto out;
4943
4944                 r = -EFAULT;
4945                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4946                         goto out;
4947                 r = 0;
4948                 break;
4949         }
4950         default:
4951                 r = -EINVAL;
4952         }
4953 out:
4954         kfree(u.buffer);
4955 out_nofree:
4956         vcpu_put(vcpu);
4957         return r;
4958 }
4959
4960 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4961 {
4962         return VM_FAULT_SIGBUS;
4963 }
4964
4965 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4966 {
4967         int ret;
4968
4969         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4970                 return -EINVAL;
4971         ret = kvm_x86_ops.set_tss_addr(kvm, addr);
4972         return ret;
4973 }
4974
4975 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4976                                               u64 ident_addr)
4977 {
4978         return kvm_x86_ops.set_identity_map_addr(kvm, ident_addr);
4979 }
4980
4981 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4982                                          unsigned long kvm_nr_mmu_pages)
4983 {
4984         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4985                 return -EINVAL;
4986
4987         mutex_lock(&kvm->slots_lock);
4988
4989         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4990         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4991
4992         mutex_unlock(&kvm->slots_lock);
4993         return 0;
4994 }
4995
4996 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4997 {
4998         return kvm->arch.n_max_mmu_pages;
4999 }
5000
5001 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5002 {
5003         struct kvm_pic *pic = kvm->arch.vpic;
5004         int r;
5005
5006         r = 0;
5007         switch (chip->chip_id) {
5008         case KVM_IRQCHIP_PIC_MASTER:
5009                 memcpy(&chip->chip.pic, &pic->pics[0],
5010                         sizeof(struct kvm_pic_state));
5011                 break;
5012         case KVM_IRQCHIP_PIC_SLAVE:
5013                 memcpy(&chip->chip.pic, &pic->pics[1],
5014                         sizeof(struct kvm_pic_state));
5015                 break;
5016         case KVM_IRQCHIP_IOAPIC:
5017                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5018                 break;
5019         default:
5020                 r = -EINVAL;
5021                 break;
5022         }
5023         return r;
5024 }
5025
5026 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5027 {
5028         struct kvm_pic *pic = kvm->arch.vpic;
5029         int r;
5030
5031         r = 0;
5032         switch (chip->chip_id) {
5033         case KVM_IRQCHIP_PIC_MASTER:
5034                 spin_lock(&pic->lock);
5035                 memcpy(&pic->pics[0], &chip->chip.pic,
5036                         sizeof(struct kvm_pic_state));
5037                 spin_unlock(&pic->lock);
5038                 break;
5039         case KVM_IRQCHIP_PIC_SLAVE:
5040                 spin_lock(&pic->lock);
5041                 memcpy(&pic->pics[1], &chip->chip.pic,
5042                         sizeof(struct kvm_pic_state));
5043                 spin_unlock(&pic->lock);
5044                 break;
5045         case KVM_IRQCHIP_IOAPIC:
5046                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5047                 break;
5048         default:
5049                 r = -EINVAL;
5050                 break;
5051         }
5052         kvm_pic_update_irq(pic);
5053         return r;
5054 }
5055
5056 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5057 {
5058         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5059
5060         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5061
5062         mutex_lock(&kps->lock);
5063         memcpy(ps, &kps->channels, sizeof(*ps));
5064         mutex_unlock(&kps->lock);
5065         return 0;
5066 }
5067
5068 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5069 {
5070         int i;
5071         struct kvm_pit *pit = kvm->arch.vpit;
5072
5073         mutex_lock(&pit->pit_state.lock);
5074         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5075         for (i = 0; i < 3; i++)
5076                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5077         mutex_unlock(&pit->pit_state.lock);
5078         return 0;
5079 }
5080
5081 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5082 {
5083         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5084         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5085                 sizeof(ps->channels));
5086         ps->flags = kvm->arch.vpit->pit_state.flags;
5087         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5088         memset(&ps->reserved, 0, sizeof(ps->reserved));
5089         return 0;
5090 }
5091
5092 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5093 {
5094         int start = 0;
5095         int i;
5096         u32 prev_legacy, cur_legacy;
5097         struct kvm_pit *pit = kvm->arch.vpit;
5098
5099         mutex_lock(&pit->pit_state.lock);
5100         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5101         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5102         if (!prev_legacy && cur_legacy)
5103                 start = 1;
5104         memcpy(&pit->pit_state.channels, &ps->channels,
5105                sizeof(pit->pit_state.channels));
5106         pit->pit_state.flags = ps->flags;
5107         for (i = 0; i < 3; i++)
5108                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5109                                    start && i == 0);
5110         mutex_unlock(&pit->pit_state.lock);
5111         return 0;
5112 }
5113
5114 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5115                                  struct kvm_reinject_control *control)
5116 {
5117         struct kvm_pit *pit = kvm->arch.vpit;
5118
5119         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5120          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5121          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5122          */
5123         mutex_lock(&pit->pit_state.lock);
5124         kvm_pit_set_reinject(pit, control->pit_reinject);
5125         mutex_unlock(&pit->pit_state.lock);
5126
5127         return 0;
5128 }
5129
5130 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5131 {
5132         /*
5133          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
5134          */
5135         if (kvm_x86_ops.flush_log_dirty)
5136                 kvm_x86_ops.flush_log_dirty(kvm);
5137 }
5138
5139 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5140                         bool line_status)
5141 {
5142         if (!irqchip_in_kernel(kvm))
5143                 return -ENXIO;
5144
5145         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5146                                         irq_event->irq, irq_event->level,
5147                                         line_status);
5148         return 0;
5149 }
5150
5151 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5152                             struct kvm_enable_cap *cap)
5153 {
5154         int r;
5155
5156         if (cap->flags)
5157                 return -EINVAL;
5158
5159         switch (cap->cap) {
5160         case KVM_CAP_DISABLE_QUIRKS:
5161                 kvm->arch.disabled_quirks = cap->args[0];
5162                 r = 0;
5163                 break;
5164         case KVM_CAP_SPLIT_IRQCHIP: {
5165                 mutex_lock(&kvm->lock);
5166                 r = -EINVAL;
5167                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5168                         goto split_irqchip_unlock;
5169                 r = -EEXIST;
5170                 if (irqchip_in_kernel(kvm))
5171                         goto split_irqchip_unlock;
5172                 if (kvm->created_vcpus)
5173                         goto split_irqchip_unlock;
5174                 r = kvm_setup_empty_irq_routing(kvm);
5175                 if (r)
5176                         goto split_irqchip_unlock;
5177                 /* Pairs with irqchip_in_kernel. */
5178                 smp_wmb();
5179                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5180                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5181                 r = 0;
5182 split_irqchip_unlock:
5183                 mutex_unlock(&kvm->lock);
5184                 break;
5185         }
5186         case KVM_CAP_X2APIC_API:
5187                 r = -EINVAL;
5188                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5189                         break;
5190
5191                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5192                         kvm->arch.x2apic_format = true;
5193                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5194                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5195
5196                 r = 0;
5197                 break;
5198         case KVM_CAP_X86_DISABLE_EXITS:
5199                 r = -EINVAL;
5200                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5201                         break;
5202
5203                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5204                         kvm_can_mwait_in_guest())
5205                         kvm->arch.mwait_in_guest = true;
5206                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5207                         kvm->arch.hlt_in_guest = true;
5208                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5209                         kvm->arch.pause_in_guest = true;
5210                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5211                         kvm->arch.cstate_in_guest = true;
5212                 r = 0;
5213                 break;
5214         case KVM_CAP_MSR_PLATFORM_INFO:
5215                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5216                 r = 0;
5217                 break;
5218         case KVM_CAP_EXCEPTION_PAYLOAD:
5219                 kvm->arch.exception_payload_enabled = cap->args[0];
5220                 r = 0;
5221                 break;
5222         case KVM_CAP_X86_USER_SPACE_MSR:
5223                 kvm->arch.user_space_msr_mask = cap->args[0];
5224                 r = 0;
5225                 break;
5226         default:
5227                 r = -EINVAL;
5228                 break;
5229         }
5230         return r;
5231 }
5232
5233 static void kvm_clear_msr_filter(struct kvm *kvm)
5234 {
5235         u32 i;
5236         u32 count = kvm->arch.msr_filter.count;
5237         struct msr_bitmap_range ranges[16];
5238
5239         mutex_lock(&kvm->lock);
5240         kvm->arch.msr_filter.count = 0;
5241         memcpy(ranges, kvm->arch.msr_filter.ranges, count * sizeof(ranges[0]));
5242         mutex_unlock(&kvm->lock);
5243         synchronize_srcu(&kvm->srcu);
5244
5245         for (i = 0; i < count; i++)
5246                 kfree(ranges[i].bitmap);
5247 }
5248
5249 static int kvm_add_msr_filter(struct kvm *kvm, struct kvm_msr_filter_range *user_range)
5250 {
5251         struct msr_bitmap_range *ranges = kvm->arch.msr_filter.ranges;
5252         struct msr_bitmap_range range;
5253         unsigned long *bitmap = NULL;
5254         size_t bitmap_size;
5255         int r;
5256
5257         if (!user_range->nmsrs)
5258                 return 0;
5259
5260         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5261         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5262                 return -EINVAL;
5263
5264         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5265         if (IS_ERR(bitmap))
5266                 return PTR_ERR(bitmap);
5267
5268         range = (struct msr_bitmap_range) {
5269                 .flags = user_range->flags,
5270                 .base = user_range->base,
5271                 .nmsrs = user_range->nmsrs,
5272                 .bitmap = bitmap,
5273         };
5274
5275         if (range.flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE)) {
5276                 r = -EINVAL;
5277                 goto err;
5278         }
5279
5280         if (!range.flags) {
5281                 r = -EINVAL;
5282                 goto err;
5283         }
5284
5285         /* Everything ok, add this range identifier to our global pool */
5286         ranges[kvm->arch.msr_filter.count] = range;
5287         /* Make sure we filled the array before we tell anyone to walk it */
5288         smp_wmb();
5289         kvm->arch.msr_filter.count++;
5290
5291         return 0;
5292 err:
5293         kfree(bitmap);
5294         return r;
5295 }
5296
5297 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5298 {
5299         struct kvm_msr_filter __user *user_msr_filter = argp;
5300         struct kvm_msr_filter filter;
5301         bool default_allow;
5302         int r = 0;
5303         bool empty = true;
5304         u32 i;
5305
5306         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5307                 return -EFAULT;
5308
5309         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5310                 empty &= !filter.ranges[i].nmsrs;
5311
5312         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5313         if (empty && !default_allow)
5314                 return -EINVAL;
5315
5316         kvm_clear_msr_filter(kvm);
5317
5318         kvm->arch.msr_filter.default_allow = default_allow;
5319
5320         /*
5321          * Protect from concurrent calls to this function that could trigger
5322          * a TOCTOU violation on kvm->arch.msr_filter.count.
5323          */
5324         mutex_lock(&kvm->lock);
5325         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
5326                 r = kvm_add_msr_filter(kvm, &filter.ranges[i]);
5327                 if (r)
5328                         break;
5329         }
5330
5331         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
5332         mutex_unlock(&kvm->lock);
5333
5334         return r;
5335 }
5336
5337 long kvm_arch_vm_ioctl(struct file *filp,
5338                        unsigned int ioctl, unsigned long arg)
5339 {
5340         struct kvm *kvm = filp->private_data;
5341         void __user *argp = (void __user *)arg;
5342         int r = -ENOTTY;
5343         /*
5344          * This union makes it completely explicit to gcc-3.x
5345          * that these two variables' stack usage should be
5346          * combined, not added together.
5347          */
5348         union {
5349                 struct kvm_pit_state ps;
5350                 struct kvm_pit_state2 ps2;
5351                 struct kvm_pit_config pit_config;
5352         } u;
5353
5354         switch (ioctl) {
5355         case KVM_SET_TSS_ADDR:
5356                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
5357                 break;
5358         case KVM_SET_IDENTITY_MAP_ADDR: {
5359                 u64 ident_addr;
5360
5361                 mutex_lock(&kvm->lock);
5362                 r = -EINVAL;
5363                 if (kvm->created_vcpus)
5364                         goto set_identity_unlock;
5365                 r = -EFAULT;
5366                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
5367                         goto set_identity_unlock;
5368                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
5369 set_identity_unlock:
5370                 mutex_unlock(&kvm->lock);
5371                 break;
5372         }
5373         case KVM_SET_NR_MMU_PAGES:
5374                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
5375                 break;
5376         case KVM_GET_NR_MMU_PAGES:
5377                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
5378                 break;
5379         case KVM_CREATE_IRQCHIP: {
5380                 mutex_lock(&kvm->lock);
5381
5382                 r = -EEXIST;
5383                 if (irqchip_in_kernel(kvm))
5384                         goto create_irqchip_unlock;
5385
5386                 r = -EINVAL;
5387                 if (kvm->created_vcpus)
5388                         goto create_irqchip_unlock;
5389
5390                 r = kvm_pic_init(kvm);
5391                 if (r)
5392                         goto create_irqchip_unlock;
5393
5394                 r = kvm_ioapic_init(kvm);
5395                 if (r) {
5396                         kvm_pic_destroy(kvm);
5397                         goto create_irqchip_unlock;
5398                 }
5399
5400                 r = kvm_setup_default_irq_routing(kvm);
5401                 if (r) {
5402                         kvm_ioapic_destroy(kvm);
5403                         kvm_pic_destroy(kvm);
5404                         goto create_irqchip_unlock;
5405                 }
5406                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5407                 smp_wmb();
5408                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
5409         create_irqchip_unlock:
5410                 mutex_unlock(&kvm->lock);
5411                 break;
5412         }
5413         case KVM_CREATE_PIT:
5414                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
5415                 goto create_pit;
5416         case KVM_CREATE_PIT2:
5417                 r = -EFAULT;
5418                 if (copy_from_user(&u.pit_config, argp,
5419                                    sizeof(struct kvm_pit_config)))
5420                         goto out;
5421         create_pit:
5422                 mutex_lock(&kvm->lock);
5423                 r = -EEXIST;
5424                 if (kvm->arch.vpit)
5425                         goto create_pit_unlock;
5426                 r = -ENOMEM;
5427                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
5428                 if (kvm->arch.vpit)
5429                         r = 0;
5430         create_pit_unlock:
5431                 mutex_unlock(&kvm->lock);
5432                 break;
5433         case KVM_GET_IRQCHIP: {
5434                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5435                 struct kvm_irqchip *chip;
5436
5437                 chip = memdup_user(argp, sizeof(*chip));
5438                 if (IS_ERR(chip)) {
5439                         r = PTR_ERR(chip);
5440                         goto out;
5441                 }
5442
5443                 r = -ENXIO;
5444                 if (!irqchip_kernel(kvm))
5445                         goto get_irqchip_out;
5446                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
5447                 if (r)
5448                         goto get_irqchip_out;
5449                 r = -EFAULT;
5450                 if (copy_to_user(argp, chip, sizeof(*chip)))
5451                         goto get_irqchip_out;
5452                 r = 0;
5453         get_irqchip_out:
5454                 kfree(chip);
5455                 break;
5456         }
5457         case KVM_SET_IRQCHIP: {
5458                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5459                 struct kvm_irqchip *chip;
5460
5461                 chip = memdup_user(argp, sizeof(*chip));
5462                 if (IS_ERR(chip)) {
5463                         r = PTR_ERR(chip);
5464                         goto out;
5465                 }
5466
5467                 r = -ENXIO;
5468                 if (!irqchip_kernel(kvm))
5469                         goto set_irqchip_out;
5470                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
5471         set_irqchip_out:
5472                 kfree(chip);
5473                 break;
5474         }
5475         case KVM_GET_PIT: {
5476                 r = -EFAULT;
5477                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
5478                         goto out;
5479                 r = -ENXIO;
5480                 if (!kvm->arch.vpit)
5481                         goto out;
5482                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
5483                 if (r)
5484                         goto out;
5485                 r = -EFAULT;
5486                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
5487                         goto out;
5488                 r = 0;
5489                 break;
5490         }
5491         case KVM_SET_PIT: {
5492                 r = -EFAULT;
5493                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
5494                         goto out;
5495                 mutex_lock(&kvm->lock);
5496                 r = -ENXIO;
5497                 if (!kvm->arch.vpit)
5498                         goto set_pit_out;
5499                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
5500 set_pit_out:
5501                 mutex_unlock(&kvm->lock);
5502                 break;
5503         }
5504         case KVM_GET_PIT2: {
5505                 r = -ENXIO;
5506                 if (!kvm->arch.vpit)
5507                         goto out;
5508                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
5509                 if (r)
5510                         goto out;
5511                 r = -EFAULT;
5512                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
5513                         goto out;
5514                 r = 0;
5515                 break;
5516         }
5517         case KVM_SET_PIT2: {
5518                 r = -EFAULT;
5519                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
5520                         goto out;
5521                 mutex_lock(&kvm->lock);
5522                 r = -ENXIO;
5523                 if (!kvm->arch.vpit)
5524                         goto set_pit2_out;
5525                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
5526 set_pit2_out:
5527                 mutex_unlock(&kvm->lock);
5528                 break;
5529         }
5530         case KVM_REINJECT_CONTROL: {
5531                 struct kvm_reinject_control control;
5532                 r =  -EFAULT;
5533                 if (copy_from_user(&control, argp, sizeof(control)))
5534                         goto out;
5535                 r = -ENXIO;
5536                 if (!kvm->arch.vpit)
5537                         goto out;
5538                 r = kvm_vm_ioctl_reinject(kvm, &control);
5539                 break;
5540         }
5541         case KVM_SET_BOOT_CPU_ID:
5542                 r = 0;
5543                 mutex_lock(&kvm->lock);
5544                 if (kvm->created_vcpus)
5545                         r = -EBUSY;
5546                 else
5547                         kvm->arch.bsp_vcpu_id = arg;
5548                 mutex_unlock(&kvm->lock);
5549                 break;
5550         case KVM_XEN_HVM_CONFIG: {
5551                 struct kvm_xen_hvm_config xhc;
5552                 r = -EFAULT;
5553                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5554                         goto out;
5555                 r = -EINVAL;
5556                 if (xhc.flags)
5557                         goto out;
5558                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5559                 r = 0;
5560                 break;
5561         }
5562         case KVM_SET_CLOCK: {
5563                 struct kvm_clock_data user_ns;
5564                 u64 now_ns;
5565
5566                 r = -EFAULT;
5567                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5568                         goto out;
5569
5570                 r = -EINVAL;
5571                 if (user_ns.flags)
5572                         goto out;
5573
5574                 r = 0;
5575                 /*
5576                  * TODO: userspace has to take care of races with VCPU_RUN, so
5577                  * kvm_gen_update_masterclock() can be cut down to locked
5578                  * pvclock_update_vm_gtod_copy().
5579                  */
5580                 kvm_gen_update_masterclock(kvm);
5581                 now_ns = get_kvmclock_ns(kvm);
5582                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5583                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5584                 break;
5585         }
5586         case KVM_GET_CLOCK: {
5587                 struct kvm_clock_data user_ns;
5588                 u64 now_ns;
5589
5590                 now_ns = get_kvmclock_ns(kvm);
5591                 user_ns.clock = now_ns;
5592                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5593                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5594
5595                 r = -EFAULT;
5596                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5597                         goto out;
5598                 r = 0;
5599                 break;
5600         }
5601         case KVM_MEMORY_ENCRYPT_OP: {
5602                 r = -ENOTTY;
5603                 if (kvm_x86_ops.mem_enc_op)
5604                         r = kvm_x86_ops.mem_enc_op(kvm, argp);
5605                 break;
5606         }
5607         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5608                 struct kvm_enc_region region;
5609
5610                 r = -EFAULT;
5611                 if (copy_from_user(&region, argp, sizeof(region)))
5612                         goto out;
5613
5614                 r = -ENOTTY;
5615                 if (kvm_x86_ops.mem_enc_reg_region)
5616                         r = kvm_x86_ops.mem_enc_reg_region(kvm, &region);
5617                 break;
5618         }
5619         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5620                 struct kvm_enc_region region;
5621
5622                 r = -EFAULT;
5623                 if (copy_from_user(&region, argp, sizeof(region)))
5624                         goto out;
5625
5626                 r = -ENOTTY;
5627                 if (kvm_x86_ops.mem_enc_unreg_region)
5628                         r = kvm_x86_ops.mem_enc_unreg_region(kvm, &region);
5629                 break;
5630         }
5631         case KVM_HYPERV_EVENTFD: {
5632                 struct kvm_hyperv_eventfd hvevfd;
5633
5634                 r = -EFAULT;
5635                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5636                         goto out;
5637                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5638                 break;
5639         }
5640         case KVM_SET_PMU_EVENT_FILTER:
5641                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5642                 break;
5643         case KVM_X86_SET_MSR_FILTER:
5644                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
5645                 break;
5646         default:
5647                 r = -ENOTTY;
5648         }
5649 out:
5650         return r;
5651 }
5652
5653 static void kvm_init_msr_list(void)
5654 {
5655         struct x86_pmu_capability x86_pmu;
5656         u32 dummy[2];
5657         unsigned i;
5658
5659         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5660                          "Please update the fixed PMCs in msrs_to_saved_all[]");
5661
5662         perf_get_x86_pmu_capability(&x86_pmu);
5663
5664         num_msrs_to_save = 0;
5665         num_emulated_msrs = 0;
5666         num_msr_based_features = 0;
5667
5668         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
5669                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
5670                         continue;
5671
5672                 /*
5673                  * Even MSRs that are valid in the host may not be exposed
5674                  * to the guests in some cases.
5675                  */
5676                 switch (msrs_to_save_all[i]) {
5677                 case MSR_IA32_BNDCFGS:
5678                         if (!kvm_mpx_supported())
5679                                 continue;
5680                         break;
5681                 case MSR_TSC_AUX:
5682                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
5683                                 continue;
5684                         break;
5685                 case MSR_IA32_UMWAIT_CONTROL:
5686                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
5687                                 continue;
5688                         break;
5689                 case MSR_IA32_RTIT_CTL:
5690                 case MSR_IA32_RTIT_STATUS:
5691                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
5692                                 continue;
5693                         break;
5694                 case MSR_IA32_RTIT_CR3_MATCH:
5695                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5696                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5697                                 continue;
5698                         break;
5699                 case MSR_IA32_RTIT_OUTPUT_BASE:
5700                 case MSR_IA32_RTIT_OUTPUT_MASK:
5701                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5702                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5703                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5704                                 continue;
5705                         break;
5706                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
5707                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
5708                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
5709                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5710                                 continue;
5711                         break;
5712                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5713                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5714                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5715                                 continue;
5716                         break;
5717                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5718                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5719                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5720                                 continue;
5721                         break;
5722                 default:
5723                         break;
5724                 }
5725
5726                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
5727         }
5728
5729         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
5730                 if (!kvm_x86_ops.has_emulated_msr(emulated_msrs_all[i]))
5731                         continue;
5732
5733                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
5734         }
5735
5736         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
5737                 struct kvm_msr_entry msr;
5738
5739                 msr.index = msr_based_features_all[i];
5740                 if (kvm_get_msr_feature(&msr))
5741                         continue;
5742
5743                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
5744         }
5745 }
5746
5747 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5748                            const void *v)
5749 {
5750         int handled = 0;
5751         int n;
5752
5753         do {
5754                 n = min(len, 8);
5755                 if (!(lapic_in_kernel(vcpu) &&
5756                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5757                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5758                         break;
5759                 handled += n;
5760                 addr += n;
5761                 len -= n;
5762                 v += n;
5763         } while (len);
5764
5765         return handled;
5766 }
5767
5768 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5769 {
5770         int handled = 0;
5771         int n;
5772
5773         do {
5774                 n = min(len, 8);
5775                 if (!(lapic_in_kernel(vcpu) &&
5776                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5777                                          addr, n, v))
5778                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5779                         break;
5780                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5781                 handled += n;
5782                 addr += n;
5783                 len -= n;
5784                 v += n;
5785         } while (len);
5786
5787         return handled;
5788 }
5789
5790 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5791                         struct kvm_segment *var, int seg)
5792 {
5793         kvm_x86_ops.set_segment(vcpu, var, seg);
5794 }
5795
5796 void kvm_get_segment(struct kvm_vcpu *vcpu,
5797                      struct kvm_segment *var, int seg)
5798 {
5799         kvm_x86_ops.get_segment(vcpu, var, seg);
5800 }
5801
5802 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5803                            struct x86_exception *exception)
5804 {
5805         gpa_t t_gpa;
5806
5807         BUG_ON(!mmu_is_nested(vcpu));
5808
5809         /* NPT walks are always user-walks */
5810         access |= PFERR_USER_MASK;
5811         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5812
5813         return t_gpa;
5814 }
5815
5816 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5817                               struct x86_exception *exception)
5818 {
5819         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5820         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5821 }
5822
5823  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5824                                 struct x86_exception *exception)
5825 {
5826         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5827         access |= PFERR_FETCH_MASK;
5828         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5829 }
5830
5831 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5832                                struct x86_exception *exception)
5833 {
5834         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5835         access |= PFERR_WRITE_MASK;
5836         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5837 }
5838
5839 /* uses this to access any guest's mapped memory without checking CPL */
5840 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5841                                 struct x86_exception *exception)
5842 {
5843         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5844 }
5845
5846 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5847                                       struct kvm_vcpu *vcpu, u32 access,
5848                                       struct x86_exception *exception)
5849 {
5850         void *data = val;
5851         int r = X86EMUL_CONTINUE;
5852
5853         while (bytes) {
5854                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5855                                                             exception);
5856                 unsigned offset = addr & (PAGE_SIZE-1);
5857                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5858                 int ret;
5859
5860                 if (gpa == UNMAPPED_GVA)
5861                         return X86EMUL_PROPAGATE_FAULT;
5862                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5863                                                offset, toread);
5864                 if (ret < 0) {
5865                         r = X86EMUL_IO_NEEDED;
5866                         goto out;
5867                 }
5868
5869                 bytes -= toread;
5870                 data += toread;
5871                 addr += toread;
5872         }
5873 out:
5874         return r;
5875 }
5876
5877 /* used for instruction fetching */
5878 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5879                                 gva_t addr, void *val, unsigned int bytes,
5880                                 struct x86_exception *exception)
5881 {
5882         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5883         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5884         unsigned offset;
5885         int ret;
5886
5887         /* Inline kvm_read_guest_virt_helper for speed.  */
5888         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5889                                                     exception);
5890         if (unlikely(gpa == UNMAPPED_GVA))
5891                 return X86EMUL_PROPAGATE_FAULT;
5892
5893         offset = addr & (PAGE_SIZE-1);
5894         if (WARN_ON(offset + bytes > PAGE_SIZE))
5895                 bytes = (unsigned)PAGE_SIZE - offset;
5896         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5897                                        offset, bytes);
5898         if (unlikely(ret < 0))
5899                 return X86EMUL_IO_NEEDED;
5900
5901         return X86EMUL_CONTINUE;
5902 }
5903
5904 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5905                                gva_t addr, void *val, unsigned int bytes,
5906                                struct x86_exception *exception)
5907 {
5908         u32 access = (kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5909
5910         /*
5911          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5912          * is returned, but our callers are not ready for that and they blindly
5913          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5914          * uninitialized kernel stack memory into cr2 and error code.
5915          */
5916         memset(exception, 0, sizeof(*exception));
5917         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5918                                           exception);
5919 }
5920 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5921
5922 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5923                              gva_t addr, void *val, unsigned int bytes,
5924                              struct x86_exception *exception, bool system)
5925 {
5926         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5927         u32 access = 0;
5928
5929         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
5930                 access |= PFERR_USER_MASK;
5931
5932         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5933 }
5934
5935 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5936                 unsigned long addr, void *val, unsigned int bytes)
5937 {
5938         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5939         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5940
5941         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5942 }
5943
5944 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5945                                       struct kvm_vcpu *vcpu, u32 access,
5946                                       struct x86_exception *exception)
5947 {
5948         void *data = val;
5949         int r = X86EMUL_CONTINUE;
5950
5951         while (bytes) {
5952                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5953                                                              access,
5954                                                              exception);
5955                 unsigned offset = addr & (PAGE_SIZE-1);
5956                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5957                 int ret;
5958
5959                 if (gpa == UNMAPPED_GVA)
5960                         return X86EMUL_PROPAGATE_FAULT;
5961                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5962                 if (ret < 0) {
5963                         r = X86EMUL_IO_NEEDED;
5964                         goto out;
5965                 }
5966
5967                 bytes -= towrite;
5968                 data += towrite;
5969                 addr += towrite;
5970         }
5971 out:
5972         return r;
5973 }
5974
5975 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5976                               unsigned int bytes, struct x86_exception *exception,
5977                               bool system)
5978 {
5979         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5980         u32 access = PFERR_WRITE_MASK;
5981
5982         if (!system && kvm_x86_ops.get_cpl(vcpu) == 3)
5983                 access |= PFERR_USER_MASK;
5984
5985         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5986                                            access, exception);
5987 }
5988
5989 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5990                                 unsigned int bytes, struct x86_exception *exception)
5991 {
5992         /* kvm_write_guest_virt_system can pull in tons of pages. */
5993         vcpu->arch.l1tf_flush_l1d = true;
5994
5995         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5996                                            PFERR_WRITE_MASK, exception);
5997 }
5998 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5999
6000 int handle_ud(struct kvm_vcpu *vcpu)
6001 {
6002         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6003         int emul_type = EMULTYPE_TRAP_UD;
6004         char sig[5]; /* ud2; .ascii "kvm" */
6005         struct x86_exception e;
6006
6007         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, NULL, 0)))
6008                 return 1;
6009
6010         if (force_emulation_prefix &&
6011             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6012                                 sig, sizeof(sig), &e) == 0 &&
6013             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6014                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6015                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6016         }
6017
6018         return kvm_emulate_instruction(vcpu, emul_type);
6019 }
6020 EXPORT_SYMBOL_GPL(handle_ud);
6021
6022 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6023                             gpa_t gpa, bool write)
6024 {
6025         /* For APIC access vmexit */
6026         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6027                 return 1;
6028
6029         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6030                 trace_vcpu_match_mmio(gva, gpa, write, true);
6031                 return 1;
6032         }
6033
6034         return 0;
6035 }
6036
6037 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6038                                 gpa_t *gpa, struct x86_exception *exception,
6039                                 bool write)
6040 {
6041         u32 access = ((kvm_x86_ops.get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
6042                 | (write ? PFERR_WRITE_MASK : 0);
6043
6044         /*
6045          * currently PKRU is only applied to ept enabled guest so
6046          * there is no pkey in EPT page table for L1 guest or EPT
6047          * shadow page table for L2 guest.
6048          */
6049         if (vcpu_match_mmio_gva(vcpu, gva)
6050             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
6051                                  vcpu->arch.mmio_access, 0, access)) {
6052                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6053                                         (gva & (PAGE_SIZE - 1));
6054                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6055                 return 1;
6056         }
6057
6058         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6059
6060         if (*gpa == UNMAPPED_GVA)
6061                 return -1;
6062
6063         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6064 }
6065
6066 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6067                         const void *val, int bytes)
6068 {
6069         int ret;
6070
6071         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6072         if (ret < 0)
6073                 return 0;
6074         kvm_page_track_write(vcpu, gpa, val, bytes);
6075         return 1;
6076 }
6077
6078 struct read_write_emulator_ops {
6079         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6080                                   int bytes);
6081         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6082                                   void *val, int bytes);
6083         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6084                                int bytes, void *val);
6085         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6086                                     void *val, int bytes);
6087         bool write;
6088 };
6089
6090 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6091 {
6092         if (vcpu->mmio_read_completed) {
6093                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6094                                vcpu->mmio_fragments[0].gpa, val);
6095                 vcpu->mmio_read_completed = 0;
6096                 return 1;
6097         }
6098
6099         return 0;
6100 }
6101
6102 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6103                         void *val, int bytes)
6104 {
6105         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6106 }
6107
6108 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6109                          void *val, int bytes)
6110 {
6111         return emulator_write_phys(vcpu, gpa, val, bytes);
6112 }
6113
6114 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6115 {
6116         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6117         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6118 }
6119
6120 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6121                           void *val, int bytes)
6122 {
6123         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6124         return X86EMUL_IO_NEEDED;
6125 }
6126
6127 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6128                            void *val, int bytes)
6129 {
6130         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6131
6132         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6133         return X86EMUL_CONTINUE;
6134 }
6135
6136 static const struct read_write_emulator_ops read_emultor = {
6137         .read_write_prepare = read_prepare,
6138         .read_write_emulate = read_emulate,
6139         .read_write_mmio = vcpu_mmio_read,
6140         .read_write_exit_mmio = read_exit_mmio,
6141 };
6142
6143 static const struct read_write_emulator_ops write_emultor = {
6144         .read_write_emulate = write_emulate,
6145         .read_write_mmio = write_mmio,
6146         .read_write_exit_mmio = write_exit_mmio,
6147         .write = true,
6148 };
6149
6150 static int emulator_read_write_onepage(unsigned long addr, void *val,
6151                                        unsigned int bytes,
6152                                        struct x86_exception *exception,
6153                                        struct kvm_vcpu *vcpu,
6154                                        const struct read_write_emulator_ops *ops)
6155 {
6156         gpa_t gpa;
6157         int handled, ret;
6158         bool write = ops->write;
6159         struct kvm_mmio_fragment *frag;
6160         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6161
6162         /*
6163          * If the exit was due to a NPF we may already have a GPA.
6164          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6165          * Note, this cannot be used on string operations since string
6166          * operation using rep will only have the initial GPA from the NPF
6167          * occurred.
6168          */
6169         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6170             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6171                 gpa = ctxt->gpa_val;
6172                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6173         } else {
6174                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6175                 if (ret < 0)
6176                         return X86EMUL_PROPAGATE_FAULT;
6177         }
6178
6179         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6180                 return X86EMUL_CONTINUE;
6181
6182         /*
6183          * Is this MMIO handled locally?
6184          */
6185         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6186         if (handled == bytes)
6187                 return X86EMUL_CONTINUE;
6188
6189         gpa += handled;
6190         bytes -= handled;
6191         val += handled;
6192
6193         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6194         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6195         frag->gpa = gpa;
6196         frag->data = val;
6197         frag->len = bytes;
6198         return X86EMUL_CONTINUE;
6199 }
6200
6201 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6202                         unsigned long addr,
6203                         void *val, unsigned int bytes,
6204                         struct x86_exception *exception,
6205                         const struct read_write_emulator_ops *ops)
6206 {
6207         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6208         gpa_t gpa;
6209         int rc;
6210
6211         if (ops->read_write_prepare &&
6212                   ops->read_write_prepare(vcpu, val, bytes))
6213                 return X86EMUL_CONTINUE;
6214
6215         vcpu->mmio_nr_fragments = 0;
6216
6217         /* Crossing a page boundary? */
6218         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6219                 int now;
6220
6221                 now = -addr & ~PAGE_MASK;
6222                 rc = emulator_read_write_onepage(addr, val, now, exception,
6223                                                  vcpu, ops);
6224
6225                 if (rc != X86EMUL_CONTINUE)
6226                         return rc;
6227                 addr += now;
6228                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6229                         addr = (u32)addr;
6230                 val += now;
6231                 bytes -= now;
6232         }
6233
6234         rc = emulator_read_write_onepage(addr, val, bytes, exception,
6235                                          vcpu, ops);
6236         if (rc != X86EMUL_CONTINUE)
6237                 return rc;
6238
6239         if (!vcpu->mmio_nr_fragments)
6240                 return rc;
6241
6242         gpa = vcpu->mmio_fragments[0].gpa;
6243
6244         vcpu->mmio_needed = 1;
6245         vcpu->mmio_cur_fragment = 0;
6246
6247         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
6248         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
6249         vcpu->run->exit_reason = KVM_EXIT_MMIO;
6250         vcpu->run->mmio.phys_addr = gpa;
6251
6252         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
6253 }
6254
6255 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
6256                                   unsigned long addr,
6257                                   void *val,
6258                                   unsigned int bytes,
6259                                   struct x86_exception *exception)
6260 {
6261         return emulator_read_write(ctxt, addr, val, bytes,
6262                                    exception, &read_emultor);
6263 }
6264
6265 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
6266                             unsigned long addr,
6267                             const void *val,
6268                             unsigned int bytes,
6269                             struct x86_exception *exception)
6270 {
6271         return emulator_read_write(ctxt, addr, (void *)val, bytes,
6272                                    exception, &write_emultor);
6273 }
6274
6275 #define CMPXCHG_TYPE(t, ptr, old, new) \
6276         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6277
6278 #ifdef CONFIG_X86_64
6279 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6280 #else
6281 #  define CMPXCHG64(ptr, old, new) \
6282         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6283 #endif
6284
6285 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
6286                                      unsigned long addr,
6287                                      const void *old,
6288                                      const void *new,
6289                                      unsigned int bytes,
6290                                      struct x86_exception *exception)
6291 {
6292         struct kvm_host_map map;
6293         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6294         u64 page_line_mask;
6295         gpa_t gpa;
6296         char *kaddr;
6297         bool exchanged;
6298
6299         /* guests cmpxchg8b have to be emulated atomically */
6300         if (bytes > 8 || (bytes & (bytes - 1)))
6301                 goto emul_write;
6302
6303         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
6304
6305         if (gpa == UNMAPPED_GVA ||
6306             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6307                 goto emul_write;
6308
6309         /*
6310          * Emulate the atomic as a straight write to avoid #AC if SLD is
6311          * enabled in the host and the access splits a cache line.
6312          */
6313         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
6314                 page_line_mask = ~(cache_line_size() - 1);
6315         else
6316                 page_line_mask = PAGE_MASK;
6317
6318         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
6319                 goto emul_write;
6320
6321         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
6322                 goto emul_write;
6323
6324         kaddr = map.hva + offset_in_page(gpa);
6325
6326         switch (bytes) {
6327         case 1:
6328                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
6329                 break;
6330         case 2:
6331                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
6332                 break;
6333         case 4:
6334                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
6335                 break;
6336         case 8:
6337                 exchanged = CMPXCHG64(kaddr, old, new);
6338                 break;
6339         default:
6340                 BUG();
6341         }
6342
6343         kvm_vcpu_unmap(vcpu, &map, true);
6344
6345         if (!exchanged)
6346                 return X86EMUL_CMPXCHG_FAILED;
6347
6348         kvm_page_track_write(vcpu, gpa, new, bytes);
6349
6350         return X86EMUL_CONTINUE;
6351
6352 emul_write:
6353         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
6354
6355         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
6356 }
6357
6358 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
6359 {
6360         int r = 0, i;
6361
6362         for (i = 0; i < vcpu->arch.pio.count; i++) {
6363                 if (vcpu->arch.pio.in)
6364                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
6365                                             vcpu->arch.pio.size, pd);
6366                 else
6367                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
6368                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
6369                                              pd);
6370                 if (r)
6371                         break;
6372                 pd += vcpu->arch.pio.size;
6373         }
6374         return r;
6375 }
6376
6377 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
6378                                unsigned short port, void *val,
6379                                unsigned int count, bool in)
6380 {
6381         vcpu->arch.pio.port = port;
6382         vcpu->arch.pio.in = in;
6383         vcpu->arch.pio.count  = count;
6384         vcpu->arch.pio.size = size;
6385
6386         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
6387                 vcpu->arch.pio.count = 0;
6388                 return 1;
6389         }
6390
6391         vcpu->run->exit_reason = KVM_EXIT_IO;
6392         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
6393         vcpu->run->io.size = size;
6394         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
6395         vcpu->run->io.count = count;
6396         vcpu->run->io.port = port;
6397
6398         return 0;
6399 }
6400
6401 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
6402                            unsigned short port, void *val, unsigned int count)
6403 {
6404         int ret;
6405
6406         if (vcpu->arch.pio.count)
6407                 goto data_avail;
6408
6409         memset(vcpu->arch.pio_data, 0, size * count);
6410
6411         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
6412         if (ret) {
6413 data_avail:
6414                 memcpy(val, vcpu->arch.pio_data, size * count);
6415                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
6416                 vcpu->arch.pio.count = 0;
6417                 return 1;
6418         }
6419
6420         return 0;
6421 }
6422
6423 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
6424                                     int size, unsigned short port, void *val,
6425                                     unsigned int count)
6426 {
6427         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
6428
6429 }
6430
6431 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
6432                             unsigned short port, const void *val,
6433                             unsigned int count)
6434 {
6435         memcpy(vcpu->arch.pio_data, val, size * count);
6436         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
6437         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
6438 }
6439
6440 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
6441                                      int size, unsigned short port,
6442                                      const void *val, unsigned int count)
6443 {
6444         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
6445 }
6446
6447 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
6448 {
6449         return kvm_x86_ops.get_segment_base(vcpu, seg);
6450 }
6451
6452 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
6453 {
6454         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
6455 }
6456
6457 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
6458 {
6459         if (!need_emulate_wbinvd(vcpu))
6460                 return X86EMUL_CONTINUE;
6461
6462         if (kvm_x86_ops.has_wbinvd_exit()) {
6463                 int cpu = get_cpu();
6464
6465                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
6466                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
6467                                 wbinvd_ipi, NULL, 1);
6468                 put_cpu();
6469                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
6470         } else
6471                 wbinvd();
6472         return X86EMUL_CONTINUE;
6473 }
6474
6475 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
6476 {
6477         kvm_emulate_wbinvd_noskip(vcpu);
6478         return kvm_skip_emulated_instruction(vcpu);
6479 }
6480 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
6481
6482
6483
6484 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
6485 {
6486         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
6487 }
6488
6489 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
6490                            unsigned long *dest)
6491 {
6492         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
6493 }
6494
6495 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
6496                            unsigned long value)
6497 {
6498
6499         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
6500 }
6501
6502 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
6503 {
6504         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
6505 }
6506
6507 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
6508 {
6509         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6510         unsigned long value;
6511
6512         switch (cr) {
6513         case 0:
6514                 value = kvm_read_cr0(vcpu);
6515                 break;
6516         case 2:
6517                 value = vcpu->arch.cr2;
6518                 break;
6519         case 3:
6520                 value = kvm_read_cr3(vcpu);
6521                 break;
6522         case 4:
6523                 value = kvm_read_cr4(vcpu);
6524                 break;
6525         case 8:
6526                 value = kvm_get_cr8(vcpu);
6527                 break;
6528         default:
6529                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6530                 return 0;
6531         }
6532
6533         return value;
6534 }
6535
6536 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
6537 {
6538         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6539         int res = 0;
6540
6541         switch (cr) {
6542         case 0:
6543                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
6544                 break;
6545         case 2:
6546                 vcpu->arch.cr2 = val;
6547                 break;
6548         case 3:
6549                 res = kvm_set_cr3(vcpu, val);
6550                 break;
6551         case 4:
6552                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6553                 break;
6554         case 8:
6555                 res = kvm_set_cr8(vcpu, val);
6556                 break;
6557         default:
6558                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6559                 res = -1;
6560         }
6561
6562         return res;
6563 }
6564
6565 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6566 {
6567         return kvm_x86_ops.get_cpl(emul_to_vcpu(ctxt));
6568 }
6569
6570 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6571 {
6572         kvm_x86_ops.get_gdt(emul_to_vcpu(ctxt), dt);
6573 }
6574
6575 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6576 {
6577         kvm_x86_ops.get_idt(emul_to_vcpu(ctxt), dt);
6578 }
6579
6580 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6581 {
6582         kvm_x86_ops.set_gdt(emul_to_vcpu(ctxt), dt);
6583 }
6584
6585 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6586 {
6587         kvm_x86_ops.set_idt(emul_to_vcpu(ctxt), dt);
6588 }
6589
6590 static unsigned long emulator_get_cached_segment_base(
6591         struct x86_emulate_ctxt *ctxt, int seg)
6592 {
6593         return get_segment_base(emul_to_vcpu(ctxt), seg);
6594 }
6595
6596 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6597                                  struct desc_struct *desc, u32 *base3,
6598                                  int seg)
6599 {
6600         struct kvm_segment var;
6601
6602         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6603         *selector = var.selector;
6604
6605         if (var.unusable) {
6606                 memset(desc, 0, sizeof(*desc));
6607                 if (base3)
6608                         *base3 = 0;
6609                 return false;
6610         }
6611
6612         if (var.g)
6613                 var.limit >>= 12;
6614         set_desc_limit(desc, var.limit);
6615         set_desc_base(desc, (unsigned long)var.base);
6616 #ifdef CONFIG_X86_64
6617         if (base3)
6618                 *base3 = var.base >> 32;
6619 #endif
6620         desc->type = var.type;
6621         desc->s = var.s;
6622         desc->dpl = var.dpl;
6623         desc->p = var.present;
6624         desc->avl = var.avl;
6625         desc->l = var.l;
6626         desc->d = var.db;
6627         desc->g = var.g;
6628
6629         return true;
6630 }
6631
6632 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6633                                  struct desc_struct *desc, u32 base3,
6634                                  int seg)
6635 {
6636         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6637         struct kvm_segment var;
6638
6639         var.selector = selector;
6640         var.base = get_desc_base(desc);
6641 #ifdef CONFIG_X86_64
6642         var.base |= ((u64)base3) << 32;
6643 #endif
6644         var.limit = get_desc_limit(desc);
6645         if (desc->g)
6646                 var.limit = (var.limit << 12) | 0xfff;
6647         var.type = desc->type;
6648         var.dpl = desc->dpl;
6649         var.db = desc->d;
6650         var.s = desc->s;
6651         var.l = desc->l;
6652         var.g = desc->g;
6653         var.avl = desc->avl;
6654         var.present = desc->p;
6655         var.unusable = !var.present;
6656         var.padding = 0;
6657
6658         kvm_set_segment(vcpu, &var, seg);
6659         return;
6660 }
6661
6662 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6663                             u32 msr_index, u64 *pdata)
6664 {
6665         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6666         int r;
6667
6668         r = kvm_get_msr(vcpu, msr_index, pdata);
6669
6670         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
6671                 /* Bounce to user space */
6672                 return X86EMUL_IO_NEEDED;
6673         }
6674
6675         return r;
6676 }
6677
6678 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6679                             u32 msr_index, u64 data)
6680 {
6681         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6682         int r;
6683
6684         r = kvm_set_msr(vcpu, msr_index, data);
6685
6686         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
6687                 /* Bounce to user space */
6688                 return X86EMUL_IO_NEEDED;
6689         }
6690
6691         return r;
6692 }
6693
6694 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6695 {
6696         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6697
6698         return vcpu->arch.smbase;
6699 }
6700
6701 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6702 {
6703         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6704
6705         vcpu->arch.smbase = smbase;
6706 }
6707
6708 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6709                               u32 pmc)
6710 {
6711         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
6712 }
6713
6714 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6715                              u32 pmc, u64 *pdata)
6716 {
6717         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6718 }
6719
6720 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6721 {
6722         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6723 }
6724
6725 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6726                               struct x86_instruction_info *info,
6727                               enum x86_intercept_stage stage)
6728 {
6729         return kvm_x86_ops.check_intercept(emul_to_vcpu(ctxt), info, stage,
6730                                             &ctxt->exception);
6731 }
6732
6733 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6734                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
6735                               bool exact_only)
6736 {
6737         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
6738 }
6739
6740 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
6741 {
6742         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
6743 }
6744
6745 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
6746 {
6747         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
6748 }
6749
6750 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
6751 {
6752         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
6753 }
6754
6755 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6756 {
6757         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6758 }
6759
6760 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6761 {
6762         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6763 }
6764
6765 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6766 {
6767         kvm_x86_ops.set_nmi_mask(emul_to_vcpu(ctxt), masked);
6768 }
6769
6770 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6771 {
6772         return emul_to_vcpu(ctxt)->arch.hflags;
6773 }
6774
6775 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6776 {
6777         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6778 }
6779
6780 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6781                                   const char *smstate)
6782 {
6783         return kvm_x86_ops.pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6784 }
6785
6786 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6787 {
6788         kvm_smm_changed(emul_to_vcpu(ctxt));
6789 }
6790
6791 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6792 {
6793         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6794 }
6795
6796 static const struct x86_emulate_ops emulate_ops = {
6797         .read_gpr            = emulator_read_gpr,
6798         .write_gpr           = emulator_write_gpr,
6799         .read_std            = emulator_read_std,
6800         .write_std           = emulator_write_std,
6801         .read_phys           = kvm_read_guest_phys_system,
6802         .fetch               = kvm_fetch_guest_virt,
6803         .read_emulated       = emulator_read_emulated,
6804         .write_emulated      = emulator_write_emulated,
6805         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6806         .invlpg              = emulator_invlpg,
6807         .pio_in_emulated     = emulator_pio_in_emulated,
6808         .pio_out_emulated    = emulator_pio_out_emulated,
6809         .get_segment         = emulator_get_segment,
6810         .set_segment         = emulator_set_segment,
6811         .get_cached_segment_base = emulator_get_cached_segment_base,
6812         .get_gdt             = emulator_get_gdt,
6813         .get_idt             = emulator_get_idt,
6814         .set_gdt             = emulator_set_gdt,
6815         .set_idt             = emulator_set_idt,
6816         .get_cr              = emulator_get_cr,
6817         .set_cr              = emulator_set_cr,
6818         .cpl                 = emulator_get_cpl,
6819         .get_dr              = emulator_get_dr,
6820         .set_dr              = emulator_set_dr,
6821         .get_smbase          = emulator_get_smbase,
6822         .set_smbase          = emulator_set_smbase,
6823         .set_msr             = emulator_set_msr,
6824         .get_msr             = emulator_get_msr,
6825         .check_pmc           = emulator_check_pmc,
6826         .read_pmc            = emulator_read_pmc,
6827         .halt                = emulator_halt,
6828         .wbinvd              = emulator_wbinvd,
6829         .fix_hypercall       = emulator_fix_hypercall,
6830         .intercept           = emulator_intercept,
6831         .get_cpuid           = emulator_get_cpuid,
6832         .guest_has_long_mode = emulator_guest_has_long_mode,
6833         .guest_has_movbe     = emulator_guest_has_movbe,
6834         .guest_has_fxsr      = emulator_guest_has_fxsr,
6835         .set_nmi_mask        = emulator_set_nmi_mask,
6836         .get_hflags          = emulator_get_hflags,
6837         .set_hflags          = emulator_set_hflags,
6838         .pre_leave_smm       = emulator_pre_leave_smm,
6839         .post_leave_smm      = emulator_post_leave_smm,
6840         .set_xcr             = emulator_set_xcr,
6841 };
6842
6843 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6844 {
6845         u32 int_shadow = kvm_x86_ops.get_interrupt_shadow(vcpu);
6846         /*
6847          * an sti; sti; sequence only disable interrupts for the first
6848          * instruction. So, if the last instruction, be it emulated or
6849          * not, left the system with the INT_STI flag enabled, it
6850          * means that the last instruction is an sti. We should not
6851          * leave the flag on in this case. The same goes for mov ss
6852          */
6853         if (int_shadow & mask)
6854                 mask = 0;
6855         if (unlikely(int_shadow || mask)) {
6856                 kvm_x86_ops.set_interrupt_shadow(vcpu, mask);
6857                 if (!mask)
6858                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6859         }
6860 }
6861
6862 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6863 {
6864         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6865         if (ctxt->exception.vector == PF_VECTOR)
6866                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
6867
6868         if (ctxt->exception.error_code_valid)
6869                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6870                                       ctxt->exception.error_code);
6871         else
6872                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6873         return false;
6874 }
6875
6876 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
6877 {
6878         struct x86_emulate_ctxt *ctxt;
6879
6880         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
6881         if (!ctxt) {
6882                 pr_err("kvm: failed to allocate vcpu's emulator\n");
6883                 return NULL;
6884         }
6885
6886         ctxt->vcpu = vcpu;
6887         ctxt->ops = &emulate_ops;
6888         vcpu->arch.emulate_ctxt = ctxt;
6889
6890         return ctxt;
6891 }
6892
6893 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6894 {
6895         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6896         int cs_db, cs_l;
6897
6898         kvm_x86_ops.get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6899
6900         ctxt->gpa_available = false;
6901         ctxt->eflags = kvm_get_rflags(vcpu);
6902         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6903
6904         ctxt->eip = kvm_rip_read(vcpu);
6905         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6906                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6907                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6908                      cs_db                              ? X86EMUL_MODE_PROT32 :
6909                                                           X86EMUL_MODE_PROT16;
6910         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6911         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6912         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6913
6914         init_decode_cache(ctxt);
6915         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6916 }
6917
6918 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6919 {
6920         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6921         int ret;
6922
6923         init_emulate_ctxt(vcpu);
6924
6925         ctxt->op_bytes = 2;
6926         ctxt->ad_bytes = 2;
6927         ctxt->_eip = ctxt->eip + inc_eip;
6928         ret = emulate_int_real(ctxt, irq);
6929
6930         if (ret != X86EMUL_CONTINUE) {
6931                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6932         } else {
6933                 ctxt->eip = ctxt->_eip;
6934                 kvm_rip_write(vcpu, ctxt->eip);
6935                 kvm_set_rflags(vcpu, ctxt->eflags);
6936         }
6937 }
6938 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6939
6940 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6941 {
6942         ++vcpu->stat.insn_emulation_fail;
6943         trace_kvm_emulate_insn_failed(vcpu);
6944
6945         if (emulation_type & EMULTYPE_VMWARE_GP) {
6946                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6947                 return 1;
6948         }
6949
6950         if (emulation_type & EMULTYPE_SKIP) {
6951                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6952                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6953                 vcpu->run->internal.ndata = 0;
6954                 return 0;
6955         }
6956
6957         kvm_queue_exception(vcpu, UD_VECTOR);
6958
6959         if (!is_guest_mode(vcpu) && kvm_x86_ops.get_cpl(vcpu) == 0) {
6960                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6961                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6962                 vcpu->run->internal.ndata = 0;
6963                 return 0;
6964         }
6965
6966         return 1;
6967 }
6968
6969 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
6970                                   bool write_fault_to_shadow_pgtable,
6971                                   int emulation_type)
6972 {
6973         gpa_t gpa = cr2_or_gpa;
6974         kvm_pfn_t pfn;
6975
6976         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
6977                 return false;
6978
6979         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
6980             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
6981                 return false;
6982
6983         if (!vcpu->arch.mmu->direct_map) {
6984                 /*
6985                  * Write permission should be allowed since only
6986                  * write access need to be emulated.
6987                  */
6988                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
6989
6990                 /*
6991                  * If the mapping is invalid in guest, let cpu retry
6992                  * it to generate fault.
6993                  */
6994                 if (gpa == UNMAPPED_GVA)
6995                         return true;
6996         }
6997
6998         /*
6999          * Do not retry the unhandleable instruction if it faults on the
7000          * readonly host memory, otherwise it will goto a infinite loop:
7001          * retry instruction -> write #PF -> emulation fail -> retry
7002          * instruction -> ...
7003          */
7004         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7005
7006         /*
7007          * If the instruction failed on the error pfn, it can not be fixed,
7008          * report the error to userspace.
7009          */
7010         if (is_error_noslot_pfn(pfn))
7011                 return false;
7012
7013         kvm_release_pfn_clean(pfn);
7014
7015         /* The instructions are well-emulated on direct mmu. */
7016         if (vcpu->arch.mmu->direct_map) {
7017                 unsigned int indirect_shadow_pages;
7018
7019                 spin_lock(&vcpu->kvm->mmu_lock);
7020                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7021                 spin_unlock(&vcpu->kvm->mmu_lock);
7022
7023                 if (indirect_shadow_pages)
7024                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7025
7026                 return true;
7027         }
7028
7029         /*
7030          * if emulation was due to access to shadowed page table
7031          * and it failed try to unshadow page and re-enter the
7032          * guest to let CPU execute the instruction.
7033          */
7034         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7035
7036         /*
7037          * If the access faults on its page table, it can not
7038          * be fixed by unprotecting shadow page and it should
7039          * be reported to userspace.
7040          */
7041         return !write_fault_to_shadow_pgtable;
7042 }
7043
7044 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7045                               gpa_t cr2_or_gpa,  int emulation_type)
7046 {
7047         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7048         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7049
7050         last_retry_eip = vcpu->arch.last_retry_eip;
7051         last_retry_addr = vcpu->arch.last_retry_addr;
7052
7053         /*
7054          * If the emulation is caused by #PF and it is non-page_table
7055          * writing instruction, it means the VM-EXIT is caused by shadow
7056          * page protected, we can zap the shadow page and retry this
7057          * instruction directly.
7058          *
7059          * Note: if the guest uses a non-page-table modifying instruction
7060          * on the PDE that points to the instruction, then we will unmap
7061          * the instruction and go to an infinite loop. So, we cache the
7062          * last retried eip and the last fault address, if we meet the eip
7063          * and the address again, we can break out of the potential infinite
7064          * loop.
7065          */
7066         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7067
7068         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7069                 return false;
7070
7071         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7072             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7073                 return false;
7074
7075         if (x86_page_table_writing_insn(ctxt))
7076                 return false;
7077
7078         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7079                 return false;
7080
7081         vcpu->arch.last_retry_eip = ctxt->eip;
7082         vcpu->arch.last_retry_addr = cr2_or_gpa;
7083
7084         if (!vcpu->arch.mmu->direct_map)
7085                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7086
7087         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7088
7089         return true;
7090 }
7091
7092 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7093 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7094
7095 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
7096 {
7097         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
7098                 /* This is a good place to trace that we are exiting SMM.  */
7099                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
7100
7101                 /* Process a latched INIT or SMI, if any.  */
7102                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7103         }
7104
7105         kvm_mmu_reset_context(vcpu);
7106 }
7107
7108 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7109                                 unsigned long *db)
7110 {
7111         u32 dr6 = 0;
7112         int i;
7113         u32 enable, rwlen;
7114
7115         enable = dr7;
7116         rwlen = dr7 >> 16;
7117         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7118                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7119                         dr6 |= (1 << i);
7120         return dr6;
7121 }
7122
7123 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7124 {
7125         struct kvm_run *kvm_run = vcpu->run;
7126
7127         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7128                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
7129                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7130                 kvm_run->debug.arch.exception = DB_VECTOR;
7131                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7132                 return 0;
7133         }
7134         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7135         return 1;
7136 }
7137
7138 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7139 {
7140         unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7141         int r;
7142
7143         r = kvm_x86_ops.skip_emulated_instruction(vcpu);
7144         if (unlikely(!r))
7145                 return 0;
7146
7147         /*
7148          * rflags is the old, "raw" value of the flags.  The new value has
7149          * not been saved yet.
7150          *
7151          * This is correct even for TF set by the guest, because "the
7152          * processor will not generate this exception after the instruction
7153          * that sets the TF flag".
7154          */
7155         if (unlikely(rflags & X86_EFLAGS_TF))
7156                 r = kvm_vcpu_do_singlestep(vcpu);
7157         return r;
7158 }
7159 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
7160
7161 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
7162 {
7163         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
7164             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
7165                 struct kvm_run *kvm_run = vcpu->run;
7166                 unsigned long eip = kvm_get_linear_rip(vcpu);
7167                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7168                                            vcpu->arch.guest_debug_dr7,
7169                                            vcpu->arch.eff_db);
7170
7171                 if (dr6 != 0) {
7172                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
7173                         kvm_run->debug.arch.pc = eip;
7174                         kvm_run->debug.arch.exception = DB_VECTOR;
7175                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
7176                         *r = 0;
7177                         return true;
7178                 }
7179         }
7180
7181         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
7182             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
7183                 unsigned long eip = kvm_get_linear_rip(vcpu);
7184                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
7185                                            vcpu->arch.dr7,
7186                                            vcpu->arch.db);
7187
7188                 if (dr6 != 0) {
7189                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
7190                         *r = 1;
7191                         return true;
7192                 }
7193         }
7194
7195         return false;
7196 }
7197
7198 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
7199 {
7200         switch (ctxt->opcode_len) {
7201         case 1:
7202                 switch (ctxt->b) {
7203                 case 0xe4:      /* IN */
7204                 case 0xe5:
7205                 case 0xec:
7206                 case 0xed:
7207                 case 0xe6:      /* OUT */
7208                 case 0xe7:
7209                 case 0xee:
7210                 case 0xef:
7211                 case 0x6c:      /* INS */
7212                 case 0x6d:
7213                 case 0x6e:      /* OUTS */
7214                 case 0x6f:
7215                         return true;
7216                 }
7217                 break;
7218         case 2:
7219                 switch (ctxt->b) {
7220                 case 0x33:      /* RDPMC */
7221                         return true;
7222                 }
7223                 break;
7224         }
7225
7226         return false;
7227 }
7228
7229 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7230                             int emulation_type, void *insn, int insn_len)
7231 {
7232         int r;
7233         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7234         bool writeback = true;
7235         bool write_fault_to_spt;
7236
7237         if (unlikely(!kvm_x86_ops.can_emulate_instruction(vcpu, insn, insn_len)))
7238                 return 1;
7239
7240         vcpu->arch.l1tf_flush_l1d = true;
7241
7242         /*
7243          * Clear write_fault_to_shadow_pgtable here to ensure it is
7244          * never reused.
7245          */
7246         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
7247         vcpu->arch.write_fault_to_shadow_pgtable = false;
7248         kvm_clear_exception_queue(vcpu);
7249
7250         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
7251                 init_emulate_ctxt(vcpu);
7252
7253                 /*
7254                  * We will reenter on the same instruction since
7255                  * we do not set complete_userspace_io.  This does not
7256                  * handle watchpoints yet, those would be handled in
7257                  * the emulate_ops.
7258                  */
7259                 if (!(emulation_type & EMULTYPE_SKIP) &&
7260                     kvm_vcpu_check_breakpoint(vcpu, &r))
7261                         return r;
7262
7263                 ctxt->interruptibility = 0;
7264                 ctxt->have_exception = false;
7265                 ctxt->exception.vector = -1;
7266                 ctxt->perm_ok = false;
7267
7268                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
7269
7270                 r = x86_decode_insn(ctxt, insn, insn_len);
7271
7272                 trace_kvm_emulate_insn_start(vcpu);
7273                 ++vcpu->stat.insn_emulation;
7274                 if (r != EMULATION_OK)  {
7275                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
7276                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
7277                                 kvm_queue_exception(vcpu, UD_VECTOR);
7278                                 return 1;
7279                         }
7280                         if (reexecute_instruction(vcpu, cr2_or_gpa,
7281                                                   write_fault_to_spt,
7282                                                   emulation_type))
7283                                 return 1;
7284                         if (ctxt->have_exception) {
7285                                 /*
7286                                  * #UD should result in just EMULATION_FAILED, and trap-like
7287                                  * exception should not be encountered during decode.
7288                                  */
7289                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
7290                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
7291                                 inject_emulated_exception(vcpu);
7292                                 return 1;
7293                         }
7294                         return handle_emulation_failure(vcpu, emulation_type);
7295                 }
7296         }
7297
7298         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
7299             !is_vmware_backdoor_opcode(ctxt)) {
7300                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7301                 return 1;
7302         }
7303
7304         /*
7305          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7306          * for kvm_skip_emulated_instruction().  The caller is responsible for
7307          * updating interruptibility state and injecting single-step #DBs.
7308          */
7309         if (emulation_type & EMULTYPE_SKIP) {
7310                 kvm_rip_write(vcpu, ctxt->_eip);
7311                 if (ctxt->eflags & X86_EFLAGS_RF)
7312                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
7313                 return 1;
7314         }
7315
7316         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
7317                 return 1;
7318
7319         /* this is needed for vmware backdoor interface to work since it
7320            changes registers values  during IO operation */
7321         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
7322                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7323                 emulator_invalidate_register_cache(ctxt);
7324         }
7325
7326 restart:
7327         if (emulation_type & EMULTYPE_PF) {
7328                 /* Save the faulting GPA (cr2) in the address field */
7329                 ctxt->exception.address = cr2_or_gpa;
7330
7331                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7332                 if (vcpu->arch.mmu->direct_map) {
7333                         ctxt->gpa_available = true;
7334                         ctxt->gpa_val = cr2_or_gpa;
7335                 }
7336         } else {
7337                 /* Sanitize the address out of an abundance of paranoia. */
7338                 ctxt->exception.address = 0;
7339         }
7340
7341         r = x86_emulate_insn(ctxt);
7342
7343         if (r == EMULATION_INTERCEPTED)
7344                 return 1;
7345
7346         if (r == EMULATION_FAILED) {
7347                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
7348                                         emulation_type))
7349                         return 1;
7350
7351                 return handle_emulation_failure(vcpu, emulation_type);
7352         }
7353
7354         if (ctxt->have_exception) {
7355                 r = 1;
7356                 if (inject_emulated_exception(vcpu))
7357                         return r;
7358         } else if (vcpu->arch.pio.count) {
7359                 if (!vcpu->arch.pio.in) {
7360                         /* FIXME: return into emulator if single-stepping.  */
7361                         vcpu->arch.pio.count = 0;
7362                 } else {
7363                         writeback = false;
7364                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
7365                 }
7366                 r = 0;
7367         } else if (vcpu->mmio_needed) {
7368                 ++vcpu->stat.mmio_exits;
7369
7370                 if (!vcpu->mmio_is_write)
7371                         writeback = false;
7372                 r = 0;
7373                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7374         } else if (r == EMULATION_RESTART)
7375                 goto restart;
7376         else
7377                 r = 1;
7378
7379         if (writeback) {
7380                 unsigned long rflags = kvm_x86_ops.get_rflags(vcpu);
7381                 toggle_interruptibility(vcpu, ctxt->interruptibility);
7382                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7383                 if (!ctxt->have_exception ||
7384                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
7385                         kvm_rip_write(vcpu, ctxt->eip);
7386                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
7387                                 r = kvm_vcpu_do_singlestep(vcpu);
7388                         if (kvm_x86_ops.update_emulated_instruction)
7389                                 kvm_x86_ops.update_emulated_instruction(vcpu);
7390                         __kvm_set_rflags(vcpu, ctxt->eflags);
7391                 }
7392
7393                 /*
7394                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7395                  * do nothing, and it will be requested again as soon as
7396                  * the shadow expires.  But we still need to check here,
7397                  * because POPF has no interrupt shadow.
7398                  */
7399                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
7400                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7401         } else
7402                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
7403
7404         return r;
7405 }
7406
7407 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
7408 {
7409         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
7410 }
7411 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
7412
7413 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
7414                                         void *insn, int insn_len)
7415 {
7416         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
7417 }
7418 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
7419
7420 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
7421 {
7422         vcpu->arch.pio.count = 0;
7423         return 1;
7424 }
7425
7426 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
7427 {
7428         vcpu->arch.pio.count = 0;
7429
7430         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
7431                 return 1;
7432
7433         return kvm_skip_emulated_instruction(vcpu);
7434 }
7435
7436 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
7437                             unsigned short port)
7438 {
7439         unsigned long val = kvm_rax_read(vcpu);
7440         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
7441
7442         if (ret)
7443                 return ret;
7444
7445         /*
7446          * Workaround userspace that relies on old KVM behavior of %rip being
7447          * incremented prior to exiting to userspace to handle "OUT 0x7e".
7448          */
7449         if (port == 0x7e &&
7450             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
7451                 vcpu->arch.complete_userspace_io =
7452                         complete_fast_pio_out_port_0x7e;
7453                 kvm_skip_emulated_instruction(vcpu);
7454         } else {
7455                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7456                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
7457         }
7458         return 0;
7459 }
7460
7461 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
7462 {
7463         unsigned long val;
7464
7465         /* We should only ever be called with arch.pio.count equal to 1 */
7466         BUG_ON(vcpu->arch.pio.count != 1);
7467
7468         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
7469                 vcpu->arch.pio.count = 0;
7470                 return 1;
7471         }
7472
7473         /* For size less than 4 we merge, else we zero extend */
7474         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
7475
7476         /*
7477          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7478          * the copy and tracing
7479          */
7480         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
7481         kvm_rax_write(vcpu, val);
7482
7483         return kvm_skip_emulated_instruction(vcpu);
7484 }
7485
7486 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
7487                            unsigned short port)
7488 {
7489         unsigned long val;
7490         int ret;
7491
7492         /* For size less than 4 we merge, else we zero extend */
7493         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
7494
7495         ret = emulator_pio_in(vcpu, size, port, &val, 1);
7496         if (ret) {
7497                 kvm_rax_write(vcpu, val);
7498                 return ret;
7499         }
7500
7501         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
7502         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
7503
7504         return 0;
7505 }
7506
7507 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
7508 {
7509         int ret;
7510
7511         if (in)
7512                 ret = kvm_fast_pio_in(vcpu, size, port);
7513         else
7514                 ret = kvm_fast_pio_out(vcpu, size, port);
7515         return ret && kvm_skip_emulated_instruction(vcpu);
7516 }
7517 EXPORT_SYMBOL_GPL(kvm_fast_pio);
7518
7519 static int kvmclock_cpu_down_prep(unsigned int cpu)
7520 {
7521         __this_cpu_write(cpu_tsc_khz, 0);
7522         return 0;
7523 }
7524
7525 static void tsc_khz_changed(void *data)
7526 {
7527         struct cpufreq_freqs *freq = data;
7528         unsigned long khz = 0;
7529
7530         if (data)
7531                 khz = freq->new;
7532         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7533                 khz = cpufreq_quick_get(raw_smp_processor_id());
7534         if (!khz)
7535                 khz = tsc_khz;
7536         __this_cpu_write(cpu_tsc_khz, khz);
7537 }
7538
7539 #ifdef CONFIG_X86_64
7540 static void kvm_hyperv_tsc_notifier(void)
7541 {
7542         struct kvm *kvm;
7543         struct kvm_vcpu *vcpu;
7544         int cpu;
7545
7546         mutex_lock(&kvm_lock);
7547         list_for_each_entry(kvm, &vm_list, vm_list)
7548                 kvm_make_mclock_inprogress_request(kvm);
7549
7550         hyperv_stop_tsc_emulation();
7551
7552         /* TSC frequency always matches when on Hyper-V */
7553         for_each_present_cpu(cpu)
7554                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
7555         kvm_max_guest_tsc_khz = tsc_khz;
7556
7557         list_for_each_entry(kvm, &vm_list, vm_list) {
7558                 struct kvm_arch *ka = &kvm->arch;
7559
7560                 spin_lock(&ka->pvclock_gtod_sync_lock);
7561
7562                 pvclock_update_vm_gtod_copy(kvm);
7563
7564                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7565                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7566
7567                 kvm_for_each_vcpu(cpu, vcpu, kvm)
7568                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
7569
7570                 spin_unlock(&ka->pvclock_gtod_sync_lock);
7571         }
7572         mutex_unlock(&kvm_lock);
7573 }
7574 #endif
7575
7576 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
7577 {
7578         struct kvm *kvm;
7579         struct kvm_vcpu *vcpu;
7580         int i, send_ipi = 0;
7581
7582         /*
7583          * We allow guests to temporarily run on slowing clocks,
7584          * provided we notify them after, or to run on accelerating
7585          * clocks, provided we notify them before.  Thus time never
7586          * goes backwards.
7587          *
7588          * However, we have a problem.  We can't atomically update
7589          * the frequency of a given CPU from this function; it is
7590          * merely a notifier, which can be called from any CPU.
7591          * Changing the TSC frequency at arbitrary points in time
7592          * requires a recomputation of local variables related to
7593          * the TSC for each VCPU.  We must flag these local variables
7594          * to be updated and be sure the update takes place with the
7595          * new frequency before any guests proceed.
7596          *
7597          * Unfortunately, the combination of hotplug CPU and frequency
7598          * change creates an intractable locking scenario; the order
7599          * of when these callouts happen is undefined with respect to
7600          * CPU hotplug, and they can race with each other.  As such,
7601          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
7602          * undefined; you can actually have a CPU frequency change take
7603          * place in between the computation of X and the setting of the
7604          * variable.  To protect against this problem, all updates of
7605          * the per_cpu tsc_khz variable are done in an interrupt
7606          * protected IPI, and all callers wishing to update the value
7607          * must wait for a synchronous IPI to complete (which is trivial
7608          * if the caller is on the CPU already).  This establishes the
7609          * necessary total order on variable updates.
7610          *
7611          * Note that because a guest time update may take place
7612          * anytime after the setting of the VCPU's request bit, the
7613          * correct TSC value must be set before the request.  However,
7614          * to ensure the update actually makes it to any guest which
7615          * starts running in hardware virtualization between the set
7616          * and the acquisition of the spinlock, we must also ping the
7617          * CPU after setting the request bit.
7618          *
7619          */
7620
7621         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7622
7623         mutex_lock(&kvm_lock);
7624         list_for_each_entry(kvm, &vm_list, vm_list) {
7625                 kvm_for_each_vcpu(i, vcpu, kvm) {
7626                         if (vcpu->cpu != cpu)
7627                                 continue;
7628                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7629                         if (vcpu->cpu != raw_smp_processor_id())
7630                                 send_ipi = 1;
7631                 }
7632         }
7633         mutex_unlock(&kvm_lock);
7634
7635         if (freq->old < freq->new && send_ipi) {
7636                 /*
7637                  * We upscale the frequency.  Must make the guest
7638                  * doesn't see old kvmclock values while running with
7639                  * the new frequency, otherwise we risk the guest sees
7640                  * time go backwards.
7641                  *
7642                  * In case we update the frequency for another cpu
7643                  * (which might be in guest context) send an interrupt
7644                  * to kick the cpu out of guest context.  Next time
7645                  * guest context is entered kvmclock will be updated,
7646                  * so the guest will not see stale values.
7647                  */
7648                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7649         }
7650 }
7651
7652 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7653                                      void *data)
7654 {
7655         struct cpufreq_freqs *freq = data;
7656         int cpu;
7657
7658         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7659                 return 0;
7660         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7661                 return 0;
7662
7663         for_each_cpu(cpu, freq->policy->cpus)
7664                 __kvmclock_cpufreq_notifier(freq, cpu);
7665
7666         return 0;
7667 }
7668
7669 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7670         .notifier_call  = kvmclock_cpufreq_notifier
7671 };
7672
7673 static int kvmclock_cpu_online(unsigned int cpu)
7674 {
7675         tsc_khz_changed(NULL);
7676         return 0;
7677 }
7678
7679 static void kvm_timer_init(void)
7680 {
7681         max_tsc_khz = tsc_khz;
7682
7683         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7684 #ifdef CONFIG_CPU_FREQ
7685                 struct cpufreq_policy *policy;
7686                 int cpu;
7687
7688                 cpu = get_cpu();
7689                 policy = cpufreq_cpu_get(cpu);
7690                 if (policy) {
7691                         if (policy->cpuinfo.max_freq)
7692                                 max_tsc_khz = policy->cpuinfo.max_freq;
7693                         cpufreq_cpu_put(policy);
7694                 }
7695                 put_cpu();
7696 #endif
7697                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7698                                           CPUFREQ_TRANSITION_NOTIFIER);
7699         }
7700
7701         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7702                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7703 }
7704
7705 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7706 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7707
7708 int kvm_is_in_guest(void)
7709 {
7710         return __this_cpu_read(current_vcpu) != NULL;
7711 }
7712
7713 static int kvm_is_user_mode(void)
7714 {
7715         int user_mode = 3;
7716
7717         if (__this_cpu_read(current_vcpu))
7718                 user_mode = kvm_x86_ops.get_cpl(__this_cpu_read(current_vcpu));
7719
7720         return user_mode != 0;
7721 }
7722
7723 static unsigned long kvm_get_guest_ip(void)
7724 {
7725         unsigned long ip = 0;
7726
7727         if (__this_cpu_read(current_vcpu))
7728                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7729
7730         return ip;
7731 }
7732
7733 static void kvm_handle_intel_pt_intr(void)
7734 {
7735         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7736
7737         kvm_make_request(KVM_REQ_PMI, vcpu);
7738         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7739                         (unsigned long *)&vcpu->arch.pmu.global_status);
7740 }
7741
7742 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7743         .is_in_guest            = kvm_is_in_guest,
7744         .is_user_mode           = kvm_is_user_mode,
7745         .get_guest_ip           = kvm_get_guest_ip,
7746         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7747 };
7748
7749 #ifdef CONFIG_X86_64
7750 static void pvclock_gtod_update_fn(struct work_struct *work)
7751 {
7752         struct kvm *kvm;
7753
7754         struct kvm_vcpu *vcpu;
7755         int i;
7756
7757         mutex_lock(&kvm_lock);
7758         list_for_each_entry(kvm, &vm_list, vm_list)
7759                 kvm_for_each_vcpu(i, vcpu, kvm)
7760                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7761         atomic_set(&kvm_guest_has_master_clock, 0);
7762         mutex_unlock(&kvm_lock);
7763 }
7764
7765 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7766
7767 /*
7768  * Notification about pvclock gtod data update.
7769  */
7770 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7771                                void *priv)
7772 {
7773         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7774         struct timekeeper *tk = priv;
7775
7776         update_pvclock_gtod(tk);
7777
7778         /* disable master clock if host does not trust, or does not
7779          * use, TSC based clocksource.
7780          */
7781         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7782             atomic_read(&kvm_guest_has_master_clock) != 0)
7783                 queue_work(system_long_wq, &pvclock_gtod_work);
7784
7785         return 0;
7786 }
7787
7788 static struct notifier_block pvclock_gtod_notifier = {
7789         .notifier_call = pvclock_gtod_notify,
7790 };
7791 #endif
7792
7793 int kvm_arch_init(void *opaque)
7794 {
7795         struct kvm_x86_init_ops *ops = opaque;
7796         int r;
7797
7798         if (kvm_x86_ops.hardware_enable) {
7799                 printk(KERN_ERR "kvm: already loaded the other module\n");
7800                 r = -EEXIST;
7801                 goto out;
7802         }
7803
7804         if (!ops->cpu_has_kvm_support()) {
7805                 pr_err_ratelimited("kvm: no hardware support\n");
7806                 r = -EOPNOTSUPP;
7807                 goto out;
7808         }
7809         if (ops->disabled_by_bios()) {
7810                 pr_err_ratelimited("kvm: disabled by bios\n");
7811                 r = -EOPNOTSUPP;
7812                 goto out;
7813         }
7814
7815         /*
7816          * KVM explicitly assumes that the guest has an FPU and
7817          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7818          * vCPU's FPU state as a fxregs_state struct.
7819          */
7820         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7821                 printk(KERN_ERR "kvm: inadequate fpu\n");
7822                 r = -EOPNOTSUPP;
7823                 goto out;
7824         }
7825
7826         r = -ENOMEM;
7827         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7828                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7829                                           NULL);
7830         if (!x86_fpu_cache) {
7831                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7832                 goto out;
7833         }
7834
7835         x86_emulator_cache = kvm_alloc_emulator_cache();
7836         if (!x86_emulator_cache) {
7837                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
7838                 goto out_free_x86_fpu_cache;
7839         }
7840
7841         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
7842         if (!user_return_msrs) {
7843                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
7844                 goto out_free_x86_emulator_cache;
7845         }
7846
7847         r = kvm_mmu_module_init();
7848         if (r)
7849                 goto out_free_percpu;
7850
7851         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7852                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7853                         PT_PRESENT_MASK, 0, sme_me_mask);
7854         kvm_timer_init();
7855
7856         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7857
7858         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
7859                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7860                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
7861         }
7862
7863         kvm_lapic_init();
7864         if (pi_inject_timer == -1)
7865                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7866 #ifdef CONFIG_X86_64
7867         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7868
7869         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7870                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7871 #endif
7872
7873         return 0;
7874
7875 out_free_percpu:
7876         free_percpu(user_return_msrs);
7877 out_free_x86_emulator_cache:
7878         kmem_cache_destroy(x86_emulator_cache);
7879 out_free_x86_fpu_cache:
7880         kmem_cache_destroy(x86_fpu_cache);
7881 out:
7882         return r;
7883 }
7884
7885 void kvm_arch_exit(void)
7886 {
7887 #ifdef CONFIG_X86_64
7888         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7889                 clear_hv_tscchange_cb();
7890 #endif
7891         kvm_lapic_exit();
7892         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7893
7894         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7895                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7896                                             CPUFREQ_TRANSITION_NOTIFIER);
7897         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7898 #ifdef CONFIG_X86_64
7899         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7900 #endif
7901         kvm_x86_ops.hardware_enable = NULL;
7902         kvm_mmu_module_exit();
7903         free_percpu(user_return_msrs);
7904         kmem_cache_destroy(x86_fpu_cache);
7905 }
7906
7907 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7908 {
7909         ++vcpu->stat.halt_exits;
7910         if (lapic_in_kernel(vcpu)) {
7911                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7912                 return 1;
7913         } else {
7914                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7915                 return 0;
7916         }
7917 }
7918 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7919
7920 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7921 {
7922         int ret = kvm_skip_emulated_instruction(vcpu);
7923         /*
7924          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7925          * KVM_EXIT_DEBUG here.
7926          */
7927         return kvm_vcpu_halt(vcpu) && ret;
7928 }
7929 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7930
7931 #ifdef CONFIG_X86_64
7932 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7933                                 unsigned long clock_type)
7934 {
7935         struct kvm_clock_pairing clock_pairing;
7936         struct timespec64 ts;
7937         u64 cycle;
7938         int ret;
7939
7940         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7941                 return -KVM_EOPNOTSUPP;
7942
7943         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7944                 return -KVM_EOPNOTSUPP;
7945
7946         clock_pairing.sec = ts.tv_sec;
7947         clock_pairing.nsec = ts.tv_nsec;
7948         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7949         clock_pairing.flags = 0;
7950         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7951
7952         ret = 0;
7953         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7954                             sizeof(struct kvm_clock_pairing)))
7955                 ret = -KVM_EFAULT;
7956
7957         return ret;
7958 }
7959 #endif
7960
7961 /*
7962  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7963  *
7964  * @apicid - apicid of vcpu to be kicked.
7965  */
7966 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7967 {
7968         struct kvm_lapic_irq lapic_irq;
7969
7970         lapic_irq.shorthand = APIC_DEST_NOSHORT;
7971         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
7972         lapic_irq.level = 0;
7973         lapic_irq.dest_id = apicid;
7974         lapic_irq.msi_redir_hint = false;
7975
7976         lapic_irq.delivery_mode = APIC_DM_REMRD;
7977         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7978 }
7979
7980 bool kvm_apicv_activated(struct kvm *kvm)
7981 {
7982         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
7983 }
7984 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
7985
7986 void kvm_apicv_init(struct kvm *kvm, bool enable)
7987 {
7988         if (enable)
7989                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
7990                           &kvm->arch.apicv_inhibit_reasons);
7991         else
7992                 set_bit(APICV_INHIBIT_REASON_DISABLE,
7993                         &kvm->arch.apicv_inhibit_reasons);
7994 }
7995 EXPORT_SYMBOL_GPL(kvm_apicv_init);
7996
7997 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7998 {
7999         struct kvm_vcpu *target = NULL;
8000         struct kvm_apic_map *map;
8001
8002         rcu_read_lock();
8003         map = rcu_dereference(kvm->arch.apic_map);
8004
8005         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8006                 target = map->phys_map[dest_id]->vcpu;
8007
8008         rcu_read_unlock();
8009
8010         if (target && READ_ONCE(target->ready))
8011                 kvm_vcpu_yield_to(target);
8012 }
8013
8014 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8015 {
8016         unsigned long nr, a0, a1, a2, a3, ret;
8017         int op_64_bit;
8018
8019         if (kvm_hv_hypercall_enabled(vcpu->kvm))
8020                 return kvm_hv_hypercall(vcpu);
8021
8022         nr = kvm_rax_read(vcpu);
8023         a0 = kvm_rbx_read(vcpu);
8024         a1 = kvm_rcx_read(vcpu);
8025         a2 = kvm_rdx_read(vcpu);
8026         a3 = kvm_rsi_read(vcpu);
8027
8028         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8029
8030         op_64_bit = is_64_bit_mode(vcpu);
8031         if (!op_64_bit) {
8032                 nr &= 0xFFFFFFFF;
8033                 a0 &= 0xFFFFFFFF;
8034                 a1 &= 0xFFFFFFFF;
8035                 a2 &= 0xFFFFFFFF;
8036                 a3 &= 0xFFFFFFFF;
8037         }
8038
8039         if (kvm_x86_ops.get_cpl(vcpu) != 0) {
8040                 ret = -KVM_EPERM;
8041                 goto out;
8042         }
8043
8044         ret = -KVM_ENOSYS;
8045
8046         switch (nr) {
8047         case KVM_HC_VAPIC_POLL_IRQ:
8048                 ret = 0;
8049                 break;
8050         case KVM_HC_KICK_CPU:
8051                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8052                         break;
8053
8054                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8055                 kvm_sched_yield(vcpu->kvm, a1);
8056                 ret = 0;
8057                 break;
8058 #ifdef CONFIG_X86_64
8059         case KVM_HC_CLOCK_PAIRING:
8060                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8061                 break;
8062 #endif
8063         case KVM_HC_SEND_IPI:
8064                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8065                         break;
8066
8067                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8068                 break;
8069         case KVM_HC_SCHED_YIELD:
8070                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8071                         break;
8072
8073                 kvm_sched_yield(vcpu->kvm, a0);
8074                 ret = 0;
8075                 break;
8076         default:
8077                 ret = -KVM_ENOSYS;
8078                 break;
8079         }
8080 out:
8081         if (!op_64_bit)
8082                 ret = (u32)ret;
8083         kvm_rax_write(vcpu, ret);
8084
8085         ++vcpu->stat.hypercalls;
8086         return kvm_skip_emulated_instruction(vcpu);
8087 }
8088 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
8089
8090 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
8091 {
8092         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8093         char instruction[3];
8094         unsigned long rip = kvm_rip_read(vcpu);
8095
8096         kvm_x86_ops.patch_hypercall(vcpu, instruction);
8097
8098         return emulator_write_emulated(ctxt, rip, instruction, 3,
8099                 &ctxt->exception);
8100 }
8101
8102 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
8103 {
8104         return vcpu->run->request_interrupt_window &&
8105                 likely(!pic_in_kernel(vcpu->kvm));
8106 }
8107
8108 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
8109 {
8110         struct kvm_run *kvm_run = vcpu->run;
8111
8112         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
8113         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
8114         kvm_run->cr8 = kvm_get_cr8(vcpu);
8115         kvm_run->apic_base = kvm_get_apic_base(vcpu);
8116         kvm_run->ready_for_interrupt_injection =
8117                 pic_in_kernel(vcpu->kvm) ||
8118                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
8119 }
8120
8121 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
8122 {
8123         int max_irr, tpr;
8124
8125         if (!kvm_x86_ops.update_cr8_intercept)
8126                 return;
8127
8128         if (!lapic_in_kernel(vcpu))
8129                 return;
8130
8131         if (vcpu->arch.apicv_active)
8132                 return;
8133
8134         if (!vcpu->arch.apic->vapic_addr)
8135                 max_irr = kvm_lapic_find_highest_irr(vcpu);
8136         else
8137                 max_irr = -1;
8138
8139         if (max_irr != -1)
8140                 max_irr >>= 4;
8141
8142         tpr = kvm_lapic_get_cr8(vcpu);
8143
8144         kvm_x86_ops.update_cr8_intercept(vcpu, tpr, max_irr);
8145 }
8146
8147 static void inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
8148 {
8149         int r;
8150         bool can_inject = true;
8151
8152         /* try to reinject previous events if any */
8153
8154         if (vcpu->arch.exception.injected) {
8155                 kvm_x86_ops.queue_exception(vcpu);
8156                 can_inject = false;
8157         }
8158         /*
8159          * Do not inject an NMI or interrupt if there is a pending
8160          * exception.  Exceptions and interrupts are recognized at
8161          * instruction boundaries, i.e. the start of an instruction.
8162          * Trap-like exceptions, e.g. #DB, have higher priority than
8163          * NMIs and interrupts, i.e. traps are recognized before an
8164          * NMI/interrupt that's pending on the same instruction.
8165          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8166          * priority, but are only generated (pended) during instruction
8167          * execution, i.e. a pending fault-like exception means the
8168          * fault occurred on the *previous* instruction and must be
8169          * serviced prior to recognizing any new events in order to
8170          * fully complete the previous instruction.
8171          */
8172         else if (!vcpu->arch.exception.pending) {
8173                 if (vcpu->arch.nmi_injected) {
8174                         kvm_x86_ops.set_nmi(vcpu);
8175                         can_inject = false;
8176                 } else if (vcpu->arch.interrupt.injected) {
8177                         kvm_x86_ops.set_irq(vcpu);
8178                         can_inject = false;
8179                 }
8180         }
8181
8182         WARN_ON_ONCE(vcpu->arch.exception.injected &&
8183                      vcpu->arch.exception.pending);
8184
8185         /*
8186          * Call check_nested_events() even if we reinjected a previous event
8187          * in order for caller to determine if it should require immediate-exit
8188          * from L2 to L1 due to pending L1 events which require exit
8189          * from L2 to L1.
8190          */
8191         if (is_guest_mode(vcpu)) {
8192                 r = kvm_x86_ops.nested_ops->check_events(vcpu);
8193                 if (r < 0)
8194                         goto busy;
8195         }
8196
8197         /* try to inject new event if pending */
8198         if (vcpu->arch.exception.pending) {
8199                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
8200                                         vcpu->arch.exception.has_error_code,
8201                                         vcpu->arch.exception.error_code);
8202
8203                 vcpu->arch.exception.pending = false;
8204                 vcpu->arch.exception.injected = true;
8205
8206                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
8207                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
8208                                              X86_EFLAGS_RF);
8209
8210                 if (vcpu->arch.exception.nr == DB_VECTOR) {
8211                         kvm_deliver_exception_payload(vcpu);
8212                         if (vcpu->arch.dr7 & DR7_GD) {
8213                                 vcpu->arch.dr7 &= ~DR7_GD;
8214                                 kvm_update_dr7(vcpu);
8215                         }
8216                 }
8217
8218                 kvm_x86_ops.queue_exception(vcpu);
8219                 can_inject = false;
8220         }
8221
8222         /*
8223          * Finally, inject interrupt events.  If an event cannot be injected
8224          * due to architectural conditions (e.g. IF=0) a window-open exit
8225          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
8226          * and can architecturally be injected, but we cannot do it right now:
8227          * an interrupt could have arrived just now and we have to inject it
8228          * as a vmexit, or there could already an event in the queue, which is
8229          * indicated by can_inject.  In that case we request an immediate exit
8230          * in order to make progress and get back here for another iteration.
8231          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8232          */
8233         if (vcpu->arch.smi_pending) {
8234                 r = can_inject ? kvm_x86_ops.smi_allowed(vcpu, true) : -EBUSY;
8235                 if (r < 0)
8236                         goto busy;
8237                 if (r) {
8238                         vcpu->arch.smi_pending = false;
8239                         ++vcpu->arch.smi_count;
8240                         enter_smm(vcpu);
8241                         can_inject = false;
8242                 } else
8243                         kvm_x86_ops.enable_smi_window(vcpu);
8244         }
8245
8246         if (vcpu->arch.nmi_pending) {
8247                 r = can_inject ? kvm_x86_ops.nmi_allowed(vcpu, true) : -EBUSY;
8248                 if (r < 0)
8249                         goto busy;
8250                 if (r) {
8251                         --vcpu->arch.nmi_pending;
8252                         vcpu->arch.nmi_injected = true;
8253                         kvm_x86_ops.set_nmi(vcpu);
8254                         can_inject = false;
8255                         WARN_ON(kvm_x86_ops.nmi_allowed(vcpu, true) < 0);
8256                 }
8257                 if (vcpu->arch.nmi_pending)
8258                         kvm_x86_ops.enable_nmi_window(vcpu);
8259         }
8260
8261         if (kvm_cpu_has_injectable_intr(vcpu)) {
8262                 r = can_inject ? kvm_x86_ops.interrupt_allowed(vcpu, true) : -EBUSY;
8263                 if (r < 0)
8264                         goto busy;
8265                 if (r) {
8266                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
8267                         kvm_x86_ops.set_irq(vcpu);
8268                         WARN_ON(kvm_x86_ops.interrupt_allowed(vcpu, true) < 0);
8269                 }
8270                 if (kvm_cpu_has_injectable_intr(vcpu))
8271                         kvm_x86_ops.enable_irq_window(vcpu);
8272         }
8273
8274         if (is_guest_mode(vcpu) &&
8275             kvm_x86_ops.nested_ops->hv_timer_pending &&
8276             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
8277                 *req_immediate_exit = true;
8278
8279         WARN_ON(vcpu->arch.exception.pending);
8280         return;
8281
8282 busy:
8283         *req_immediate_exit = true;
8284         return;
8285 }
8286
8287 static void process_nmi(struct kvm_vcpu *vcpu)
8288 {
8289         unsigned limit = 2;
8290
8291         /*
8292          * x86 is limited to one NMI running, and one NMI pending after it.
8293          * If an NMI is already in progress, limit further NMIs to just one.
8294          * Otherwise, allow two (and we'll inject the first one immediately).
8295          */
8296         if (kvm_x86_ops.get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
8297                 limit = 1;
8298
8299         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
8300         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
8301         kvm_make_request(KVM_REQ_EVENT, vcpu);
8302 }
8303
8304 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
8305 {
8306         u32 flags = 0;
8307         flags |= seg->g       << 23;
8308         flags |= seg->db      << 22;
8309         flags |= seg->l       << 21;
8310         flags |= seg->avl     << 20;
8311         flags |= seg->present << 15;
8312         flags |= seg->dpl     << 13;
8313         flags |= seg->s       << 12;
8314         flags |= seg->type    << 8;
8315         return flags;
8316 }
8317
8318 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
8319 {
8320         struct kvm_segment seg;
8321         int offset;
8322
8323         kvm_get_segment(vcpu, &seg, n);
8324         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
8325
8326         if (n < 3)
8327                 offset = 0x7f84 + n * 12;
8328         else
8329                 offset = 0x7f2c + (n - 3) * 12;
8330
8331         put_smstate(u32, buf, offset + 8, seg.base);
8332         put_smstate(u32, buf, offset + 4, seg.limit);
8333         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
8334 }
8335
8336 #ifdef CONFIG_X86_64
8337 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
8338 {
8339         struct kvm_segment seg;
8340         int offset;
8341         u16 flags;
8342
8343         kvm_get_segment(vcpu, &seg, n);
8344         offset = 0x7e00 + n * 16;
8345
8346         flags = enter_smm_get_segment_flags(&seg) >> 8;
8347         put_smstate(u16, buf, offset, seg.selector);
8348         put_smstate(u16, buf, offset + 2, flags);
8349         put_smstate(u32, buf, offset + 4, seg.limit);
8350         put_smstate(u64, buf, offset + 8, seg.base);
8351 }
8352 #endif
8353
8354 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
8355 {
8356         struct desc_ptr dt;
8357         struct kvm_segment seg;
8358         unsigned long val;
8359         int i;
8360
8361         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
8362         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
8363         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
8364         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
8365
8366         for (i = 0; i < 8; i++)
8367                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
8368
8369         kvm_get_dr(vcpu, 6, &val);
8370         put_smstate(u32, buf, 0x7fcc, (u32)val);
8371         kvm_get_dr(vcpu, 7, &val);
8372         put_smstate(u32, buf, 0x7fc8, (u32)val);
8373
8374         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8375         put_smstate(u32, buf, 0x7fc4, seg.selector);
8376         put_smstate(u32, buf, 0x7f64, seg.base);
8377         put_smstate(u32, buf, 0x7f60, seg.limit);
8378         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
8379
8380         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8381         put_smstate(u32, buf, 0x7fc0, seg.selector);
8382         put_smstate(u32, buf, 0x7f80, seg.base);
8383         put_smstate(u32, buf, 0x7f7c, seg.limit);
8384         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
8385
8386         kvm_x86_ops.get_gdt(vcpu, &dt);
8387         put_smstate(u32, buf, 0x7f74, dt.address);
8388         put_smstate(u32, buf, 0x7f70, dt.size);
8389
8390         kvm_x86_ops.get_idt(vcpu, &dt);
8391         put_smstate(u32, buf, 0x7f58, dt.address);
8392         put_smstate(u32, buf, 0x7f54, dt.size);
8393
8394         for (i = 0; i < 6; i++)
8395                 enter_smm_save_seg_32(vcpu, buf, i);
8396
8397         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
8398
8399         /* revision id */
8400         put_smstate(u32, buf, 0x7efc, 0x00020000);
8401         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
8402 }
8403
8404 #ifdef CONFIG_X86_64
8405 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
8406 {
8407         struct desc_ptr dt;
8408         struct kvm_segment seg;
8409         unsigned long val;
8410         int i;
8411
8412         for (i = 0; i < 16; i++)
8413                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
8414
8415         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
8416         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
8417
8418         kvm_get_dr(vcpu, 6, &val);
8419         put_smstate(u64, buf, 0x7f68, val);
8420         kvm_get_dr(vcpu, 7, &val);
8421         put_smstate(u64, buf, 0x7f60, val);
8422
8423         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
8424         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
8425         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
8426
8427         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
8428
8429         /* revision id */
8430         put_smstate(u32, buf, 0x7efc, 0x00020064);
8431
8432         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
8433
8434         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
8435         put_smstate(u16, buf, 0x7e90, seg.selector);
8436         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
8437         put_smstate(u32, buf, 0x7e94, seg.limit);
8438         put_smstate(u64, buf, 0x7e98, seg.base);
8439
8440         kvm_x86_ops.get_idt(vcpu, &dt);
8441         put_smstate(u32, buf, 0x7e84, dt.size);
8442         put_smstate(u64, buf, 0x7e88, dt.address);
8443
8444         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
8445         put_smstate(u16, buf, 0x7e70, seg.selector);
8446         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
8447         put_smstate(u32, buf, 0x7e74, seg.limit);
8448         put_smstate(u64, buf, 0x7e78, seg.base);
8449
8450         kvm_x86_ops.get_gdt(vcpu, &dt);
8451         put_smstate(u32, buf, 0x7e64, dt.size);
8452         put_smstate(u64, buf, 0x7e68, dt.address);
8453
8454         for (i = 0; i < 6; i++)
8455                 enter_smm_save_seg_64(vcpu, buf, i);
8456 }
8457 #endif
8458
8459 static void enter_smm(struct kvm_vcpu *vcpu)
8460 {
8461         struct kvm_segment cs, ds;
8462         struct desc_ptr dt;
8463         char buf[512];
8464         u32 cr0;
8465
8466         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
8467         memset(buf, 0, 512);
8468 #ifdef CONFIG_X86_64
8469         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8470                 enter_smm_save_state_64(vcpu, buf);
8471         else
8472 #endif
8473                 enter_smm_save_state_32(vcpu, buf);
8474
8475         /*
8476          * Give pre_enter_smm() a chance to make ISA-specific changes to the
8477          * vCPU state (e.g. leave guest mode) after we've saved the state into
8478          * the SMM state-save area.
8479          */
8480         kvm_x86_ops.pre_enter_smm(vcpu, buf);
8481
8482         vcpu->arch.hflags |= HF_SMM_MASK;
8483         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
8484
8485         if (kvm_x86_ops.get_nmi_mask(vcpu))
8486                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
8487         else
8488                 kvm_x86_ops.set_nmi_mask(vcpu, true);
8489
8490         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
8491         kvm_rip_write(vcpu, 0x8000);
8492
8493         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
8494         kvm_x86_ops.set_cr0(vcpu, cr0);
8495         vcpu->arch.cr0 = cr0;
8496
8497         kvm_x86_ops.set_cr4(vcpu, 0);
8498
8499         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
8500         dt.address = dt.size = 0;
8501         kvm_x86_ops.set_idt(vcpu, &dt);
8502
8503         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
8504
8505         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
8506         cs.base = vcpu->arch.smbase;
8507
8508         ds.selector = 0;
8509         ds.base = 0;
8510
8511         cs.limit    = ds.limit = 0xffffffff;
8512         cs.type     = ds.type = 0x3;
8513         cs.dpl      = ds.dpl = 0;
8514         cs.db       = ds.db = 0;
8515         cs.s        = ds.s = 1;
8516         cs.l        = ds.l = 0;
8517         cs.g        = ds.g = 1;
8518         cs.avl      = ds.avl = 0;
8519         cs.present  = ds.present = 1;
8520         cs.unusable = ds.unusable = 0;
8521         cs.padding  = ds.padding = 0;
8522
8523         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8524         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
8525         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
8526         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
8527         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
8528         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
8529
8530 #ifdef CONFIG_X86_64
8531         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
8532                 kvm_x86_ops.set_efer(vcpu, 0);
8533 #endif
8534
8535         kvm_update_cpuid_runtime(vcpu);
8536         kvm_mmu_reset_context(vcpu);
8537 }
8538
8539 static void process_smi(struct kvm_vcpu *vcpu)
8540 {
8541         vcpu->arch.smi_pending = true;
8542         kvm_make_request(KVM_REQ_EVENT, vcpu);
8543 }
8544
8545 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
8546                                        unsigned long *vcpu_bitmap)
8547 {
8548         cpumask_var_t cpus;
8549
8550         zalloc_cpumask_var(&cpus, GFP_ATOMIC);
8551
8552         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC,
8553                                     NULL, vcpu_bitmap, cpus);
8554
8555         free_cpumask_var(cpus);
8556 }
8557
8558 void kvm_make_scan_ioapic_request(struct kvm *kvm)
8559 {
8560         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
8561 }
8562
8563 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
8564 {
8565         if (!lapic_in_kernel(vcpu))
8566                 return;
8567
8568         vcpu->arch.apicv_active = kvm_apicv_activated(vcpu->kvm);
8569         kvm_apic_update_apicv(vcpu);
8570         kvm_x86_ops.refresh_apicv_exec_ctrl(vcpu);
8571 }
8572 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
8573
8574 /*
8575  * NOTE: Do not hold any lock prior to calling this.
8576  *
8577  * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
8578  * locked, because it calls __x86_set_memory_region() which does
8579  * synchronize_srcu(&kvm->srcu).
8580  */
8581 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
8582 {
8583         struct kvm_vcpu *except;
8584         unsigned long old, new, expected;
8585
8586         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
8587             !kvm_x86_ops.check_apicv_inhibit_reasons(bit))
8588                 return;
8589
8590         old = READ_ONCE(kvm->arch.apicv_inhibit_reasons);
8591         do {
8592                 expected = new = old;
8593                 if (activate)
8594                         __clear_bit(bit, &new);
8595                 else
8596                         __set_bit(bit, &new);
8597                 if (new == old)
8598                         break;
8599                 old = cmpxchg(&kvm->arch.apicv_inhibit_reasons, expected, new);
8600         } while (old != expected);
8601
8602         if (!!old == !!new)
8603                 return;
8604
8605         trace_kvm_apicv_update_request(activate, bit);
8606         if (kvm_x86_ops.pre_update_apicv_exec_ctrl)
8607                 kvm_x86_ops.pre_update_apicv_exec_ctrl(kvm, activate);
8608
8609         /*
8610          * Sending request to update APICV for all other vcpus,
8611          * while update the calling vcpu immediately instead of
8612          * waiting for another #VMEXIT to handle the request.
8613          */
8614         except = kvm_get_running_vcpu();
8615         kvm_make_all_cpus_request_except(kvm, KVM_REQ_APICV_UPDATE,
8616                                          except);
8617         if (except)
8618                 kvm_vcpu_update_apicv(except);
8619 }
8620 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
8621
8622 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
8623 {
8624         if (!kvm_apic_present(vcpu))
8625                 return;
8626
8627         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
8628
8629         if (irqchip_split(vcpu->kvm))
8630                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
8631         else {
8632                 if (vcpu->arch.apicv_active)
8633                         kvm_x86_ops.sync_pir_to_irr(vcpu);
8634                 if (ioapic_in_kernel(vcpu->kvm))
8635                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
8636         }
8637
8638         if (is_guest_mode(vcpu))
8639                 vcpu->arch.load_eoi_exitmap_pending = true;
8640         else
8641                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
8642 }
8643
8644 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
8645 {
8646         u64 eoi_exit_bitmap[4];
8647
8648         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
8649                 return;
8650
8651         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
8652                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
8653         kvm_x86_ops.load_eoi_exitmap(vcpu, eoi_exit_bitmap);
8654 }
8655
8656 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
8657                                             unsigned long start, unsigned long end)
8658 {
8659         unsigned long apic_address;
8660
8661         /*
8662          * The physical address of apic access page is stored in the VMCS.
8663          * Update it when it becomes invalid.
8664          */
8665         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
8666         if (start <= apic_address && apic_address < end)
8667                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
8668 }
8669
8670 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
8671 {
8672         if (!lapic_in_kernel(vcpu))
8673                 return;
8674
8675         if (!kvm_x86_ops.set_apic_access_page_addr)
8676                 return;
8677
8678         kvm_x86_ops.set_apic_access_page_addr(vcpu);
8679 }
8680
8681 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
8682 {
8683         smp_send_reschedule(vcpu->cpu);
8684 }
8685 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
8686
8687 /*
8688  * Returns 1 to let vcpu_run() continue the guest execution loop without
8689  * exiting to the userspace.  Otherwise, the value will be returned to the
8690  * userspace.
8691  */
8692 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
8693 {
8694         int r;
8695         bool req_int_win =
8696                 dm_request_for_irq_injection(vcpu) &&
8697                 kvm_cpu_accept_dm_intr(vcpu);
8698         fastpath_t exit_fastpath;
8699
8700         bool req_immediate_exit = false;
8701
8702         if (kvm_request_pending(vcpu)) {
8703                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
8704                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
8705                                 r = 0;
8706                                 goto out;
8707                         }
8708                 }
8709                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
8710                         kvm_mmu_unload(vcpu);
8711                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
8712                         __kvm_migrate_timers(vcpu);
8713                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
8714                         kvm_gen_update_masterclock(vcpu->kvm);
8715                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
8716                         kvm_gen_kvmclock_update(vcpu);
8717                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
8718                         r = kvm_guest_time_update(vcpu);
8719                         if (unlikely(r))
8720                                 goto out;
8721                 }
8722                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
8723                         kvm_mmu_sync_roots(vcpu);
8724                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
8725                         kvm_mmu_load_pgd(vcpu);
8726                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
8727                         kvm_vcpu_flush_tlb_all(vcpu);
8728
8729                         /* Flushing all ASIDs flushes the current ASID... */
8730                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
8731                 }
8732                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
8733                         kvm_vcpu_flush_tlb_current(vcpu);
8734                 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu))
8735                         kvm_vcpu_flush_tlb_guest(vcpu);
8736
8737                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
8738                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
8739                         r = 0;
8740                         goto out;
8741                 }
8742                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8743                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8744                         vcpu->mmio_needed = 0;
8745                         r = 0;
8746                         goto out;
8747                 }
8748                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8749                         /* Page is swapped out. Do synthetic halt */
8750                         vcpu->arch.apf.halted = true;
8751                         r = 1;
8752                         goto out;
8753                 }
8754                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8755                         record_steal_time(vcpu);
8756                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8757                         process_smi(vcpu);
8758                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8759                         process_nmi(vcpu);
8760                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8761                         kvm_pmu_handle_event(vcpu);
8762                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8763                         kvm_pmu_deliver_pmi(vcpu);
8764                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8765                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8766                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8767                                      vcpu->arch.ioapic_handled_vectors)) {
8768                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8769                                 vcpu->run->eoi.vector =
8770                                                 vcpu->arch.pending_ioapic_eoi;
8771                                 r = 0;
8772                                 goto out;
8773                         }
8774                 }
8775                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8776                         vcpu_scan_ioapic(vcpu);
8777                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8778                         vcpu_load_eoi_exitmap(vcpu);
8779                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8780                         kvm_vcpu_reload_apic_access_page(vcpu);
8781                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8782                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8783                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8784                         r = 0;
8785                         goto out;
8786                 }
8787                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8788                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8789                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8790                         r = 0;
8791                         goto out;
8792                 }
8793                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8794                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8795                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8796                         r = 0;
8797                         goto out;
8798                 }
8799
8800                 /*
8801                  * KVM_REQ_HV_STIMER has to be processed after
8802                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8803                  * depend on the guest clock being up-to-date
8804                  */
8805                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8806                         kvm_hv_process_stimers(vcpu);
8807                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
8808                         kvm_vcpu_update_apicv(vcpu);
8809                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
8810                         kvm_check_async_pf_completion(vcpu);
8811                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
8812                         kvm_x86_ops.msr_filter_changed(vcpu);
8813         }
8814
8815         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8816                 ++vcpu->stat.req_event;
8817                 kvm_apic_accept_events(vcpu);
8818                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8819                         r = 1;
8820                         goto out;
8821                 }
8822
8823                 inject_pending_event(vcpu, &req_immediate_exit);
8824                 if (req_int_win)
8825                         kvm_x86_ops.enable_irq_window(vcpu);
8826
8827                 if (kvm_lapic_enabled(vcpu)) {
8828                         update_cr8_intercept(vcpu);
8829                         kvm_lapic_sync_to_vapic(vcpu);
8830                 }
8831         }
8832
8833         r = kvm_mmu_reload(vcpu);
8834         if (unlikely(r)) {
8835                 goto cancel_injection;
8836         }
8837
8838         preempt_disable();
8839
8840         kvm_x86_ops.prepare_guest_switch(vcpu);
8841
8842         /*
8843          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8844          * IPI are then delayed after guest entry, which ensures that they
8845          * result in virtual interrupt delivery.
8846          */
8847         local_irq_disable();
8848         vcpu->mode = IN_GUEST_MODE;
8849
8850         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8851
8852         /*
8853          * 1) We should set ->mode before checking ->requests.  Please see
8854          * the comment in kvm_vcpu_exiting_guest_mode().
8855          *
8856          * 2) For APICv, we should set ->mode before checking PID.ON. This
8857          * pairs with the memory barrier implicit in pi_test_and_set_on
8858          * (see vmx_deliver_posted_interrupt).
8859          *
8860          * 3) This also orders the write to mode from any reads to the page
8861          * tables done while the VCPU is running.  Please see the comment
8862          * in kvm_flush_remote_tlbs.
8863          */
8864         smp_mb__after_srcu_read_unlock();
8865
8866         /*
8867          * This handles the case where a posted interrupt was
8868          * notified with kvm_vcpu_kick.
8869          */
8870         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8871                 kvm_x86_ops.sync_pir_to_irr(vcpu);
8872
8873         if (kvm_vcpu_exit_request(vcpu)) {
8874                 vcpu->mode = OUTSIDE_GUEST_MODE;
8875                 smp_wmb();
8876                 local_irq_enable();
8877                 preempt_enable();
8878                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8879                 r = 1;
8880                 goto cancel_injection;
8881         }
8882
8883         if (req_immediate_exit) {
8884                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8885                 kvm_x86_ops.request_immediate_exit(vcpu);
8886         }
8887
8888         trace_kvm_entry(vcpu);
8889
8890         fpregs_assert_state_consistent();
8891         if (test_thread_flag(TIF_NEED_FPU_LOAD))
8892                 switch_fpu_return();
8893
8894         if (unlikely(vcpu->arch.switch_db_regs)) {
8895                 set_debugreg(0, 7);
8896                 set_debugreg(vcpu->arch.eff_db[0], 0);
8897                 set_debugreg(vcpu->arch.eff_db[1], 1);
8898                 set_debugreg(vcpu->arch.eff_db[2], 2);
8899                 set_debugreg(vcpu->arch.eff_db[3], 3);
8900                 set_debugreg(vcpu->arch.dr6, 6);
8901                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8902         }
8903
8904         exit_fastpath = kvm_x86_ops.run(vcpu);
8905
8906         /*
8907          * Do this here before restoring debug registers on the host.  And
8908          * since we do this before handling the vmexit, a DR access vmexit
8909          * can (a) read the correct value of the debug registers, (b) set
8910          * KVM_DEBUGREG_WONT_EXIT again.
8911          */
8912         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8913                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8914                 kvm_x86_ops.sync_dirty_debug_regs(vcpu);
8915                 kvm_update_dr0123(vcpu);
8916                 kvm_update_dr7(vcpu);
8917                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8918         }
8919
8920         /*
8921          * If the guest has used debug registers, at least dr7
8922          * will be disabled while returning to the host.
8923          * If we don't have active breakpoints in the host, we don't
8924          * care about the messed up debug address registers. But if
8925          * we have some of them active, restore the old state.
8926          */
8927         if (hw_breakpoint_active())
8928                 hw_breakpoint_restore();
8929
8930         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
8931         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8932
8933         vcpu->mode = OUTSIDE_GUEST_MODE;
8934         smp_wmb();
8935
8936         kvm_x86_ops.handle_exit_irqoff(vcpu);
8937
8938         /*
8939          * Consume any pending interrupts, including the possible source of
8940          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8941          * An instruction is required after local_irq_enable() to fully unblock
8942          * interrupts on processors that implement an interrupt shadow, the
8943          * stat.exits increment will do nicely.
8944          */
8945         kvm_before_interrupt(vcpu);
8946         local_irq_enable();
8947         ++vcpu->stat.exits;
8948         local_irq_disable();
8949         kvm_after_interrupt(vcpu);
8950
8951         if (lapic_in_kernel(vcpu)) {
8952                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8953                 if (delta != S64_MIN) {
8954                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8955                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8956                 }
8957         }
8958
8959         local_irq_enable();
8960         preempt_enable();
8961
8962         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8963
8964         /*
8965          * Profile KVM exit RIPs:
8966          */
8967         if (unlikely(prof_on == KVM_PROFILING)) {
8968                 unsigned long rip = kvm_rip_read(vcpu);
8969                 profile_hit(KVM_PROFILING, (void *)rip);
8970         }
8971
8972         if (unlikely(vcpu->arch.tsc_always_catchup))
8973                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8974
8975         if (vcpu->arch.apic_attention)
8976                 kvm_lapic_sync_from_vapic(vcpu);
8977
8978         r = kvm_x86_ops.handle_exit(vcpu, exit_fastpath);
8979         return r;
8980
8981 cancel_injection:
8982         if (req_immediate_exit)
8983                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8984         kvm_x86_ops.cancel_injection(vcpu);
8985         if (unlikely(vcpu->arch.apic_attention))
8986                 kvm_lapic_sync_from_vapic(vcpu);
8987 out:
8988         return r;
8989 }
8990
8991 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8992 {
8993         if (!kvm_arch_vcpu_runnable(vcpu) &&
8994             (!kvm_x86_ops.pre_block || kvm_x86_ops.pre_block(vcpu) == 0)) {
8995                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8996                 kvm_vcpu_block(vcpu);
8997                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8998
8999                 if (kvm_x86_ops.post_block)
9000                         kvm_x86_ops.post_block(vcpu);
9001
9002                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
9003                         return 1;
9004         }
9005
9006         kvm_apic_accept_events(vcpu);
9007         switch(vcpu->arch.mp_state) {
9008         case KVM_MP_STATE_HALTED:
9009                 vcpu->arch.pv.pv_unhalted = false;
9010                 vcpu->arch.mp_state =
9011                         KVM_MP_STATE_RUNNABLE;
9012                 fallthrough;
9013         case KVM_MP_STATE_RUNNABLE:
9014                 vcpu->arch.apf.halted = false;
9015                 break;
9016         case KVM_MP_STATE_INIT_RECEIVED:
9017                 break;
9018         default:
9019                 return -EINTR;
9020         }
9021         return 1;
9022 }
9023
9024 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
9025 {
9026         if (is_guest_mode(vcpu))
9027                 kvm_x86_ops.nested_ops->check_events(vcpu);
9028
9029         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
9030                 !vcpu->arch.apf.halted);
9031 }
9032
9033 static int vcpu_run(struct kvm_vcpu *vcpu)
9034 {
9035         int r;
9036         struct kvm *kvm = vcpu->kvm;
9037
9038         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9039         vcpu->arch.l1tf_flush_l1d = true;
9040
9041         for (;;) {
9042                 if (kvm_vcpu_running(vcpu)) {
9043                         r = vcpu_enter_guest(vcpu);
9044                 } else {
9045                         r = vcpu_block(kvm, vcpu);
9046                 }
9047
9048                 if (r <= 0)
9049                         break;
9050
9051                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
9052                 if (kvm_cpu_has_pending_timer(vcpu))
9053                         kvm_inject_pending_timer_irqs(vcpu);
9054
9055                 if (dm_request_for_irq_injection(vcpu) &&
9056                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
9057                         r = 0;
9058                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
9059                         ++vcpu->stat.request_irq_exits;
9060                         break;
9061                 }
9062
9063                 if (__xfer_to_guest_mode_work_pending()) {
9064                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9065                         r = xfer_to_guest_mode_handle_work(vcpu);
9066                         if (r)
9067                                 return r;
9068                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
9069                 }
9070         }
9071
9072         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
9073
9074         return r;
9075 }
9076
9077 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
9078 {
9079         int r;
9080
9081         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9082         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
9083         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9084         return r;
9085 }
9086
9087 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
9088 {
9089         BUG_ON(!vcpu->arch.pio.count);
9090
9091         return complete_emulated_io(vcpu);
9092 }
9093
9094 /*
9095  * Implements the following, as a state machine:
9096  *
9097  * read:
9098  *   for each fragment
9099  *     for each mmio piece in the fragment
9100  *       write gpa, len
9101  *       exit
9102  *       copy data
9103  *   execute insn
9104  *
9105  * write:
9106  *   for each fragment
9107  *     for each mmio piece in the fragment
9108  *       write gpa, len
9109  *       copy data
9110  *       exit
9111  */
9112 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
9113 {
9114         struct kvm_run *run = vcpu->run;
9115         struct kvm_mmio_fragment *frag;
9116         unsigned len;
9117
9118         BUG_ON(!vcpu->mmio_needed);
9119
9120         /* Complete previous fragment */
9121         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
9122         len = min(8u, frag->len);
9123         if (!vcpu->mmio_is_write)
9124                 memcpy(frag->data, run->mmio.data, len);
9125
9126         if (frag->len <= 8) {
9127                 /* Switch to the next fragment. */
9128                 frag++;
9129                 vcpu->mmio_cur_fragment++;
9130         } else {
9131                 /* Go forward to the next mmio piece. */
9132                 frag->data += len;
9133                 frag->gpa += len;
9134                 frag->len -= len;
9135         }
9136
9137         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
9138                 vcpu->mmio_needed = 0;
9139
9140                 /* FIXME: return into emulator if single-stepping.  */
9141                 if (vcpu->mmio_is_write)
9142                         return 1;
9143                 vcpu->mmio_read_completed = 1;
9144                 return complete_emulated_io(vcpu);
9145         }
9146
9147         run->exit_reason = KVM_EXIT_MMIO;
9148         run->mmio.phys_addr = frag->gpa;
9149         if (vcpu->mmio_is_write)
9150                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
9151         run->mmio.len = min(8u, frag->len);
9152         run->mmio.is_write = vcpu->mmio_is_write;
9153         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
9154         return 0;
9155 }
9156
9157 static void kvm_save_current_fpu(struct fpu *fpu)
9158 {
9159         /*
9160          * If the target FPU state is not resident in the CPU registers, just
9161          * memcpy() from current, else save CPU state directly to the target.
9162          */
9163         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9164                 memcpy(&fpu->state, &current->thread.fpu.state,
9165                        fpu_kernel_xstate_size);
9166         else
9167                 copy_fpregs_to_fpstate(fpu);
9168 }
9169
9170 /* Swap (qemu) user FPU context for the guest FPU context. */
9171 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
9172 {
9173         fpregs_lock();
9174
9175         kvm_save_current_fpu(vcpu->arch.user_fpu);
9176
9177         /* PKRU is separately restored in kvm_x86_ops.run.  */
9178         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
9179                                 ~XFEATURE_MASK_PKRU);
9180
9181         fpregs_mark_activate();
9182         fpregs_unlock();
9183
9184         trace_kvm_fpu(1);
9185 }
9186
9187 /* When vcpu_run ends, restore user space FPU context. */
9188 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
9189 {
9190         fpregs_lock();
9191
9192         kvm_save_current_fpu(vcpu->arch.guest_fpu);
9193
9194         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
9195
9196         fpregs_mark_activate();
9197         fpregs_unlock();
9198
9199         ++vcpu->stat.fpu_reload;
9200         trace_kvm_fpu(0);
9201 }
9202
9203 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
9204 {
9205         struct kvm_run *kvm_run = vcpu->run;
9206         int r;
9207
9208         vcpu_load(vcpu);
9209         kvm_sigset_activate(vcpu);
9210         kvm_load_guest_fpu(vcpu);
9211
9212         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
9213                 if (kvm_run->immediate_exit) {
9214                         r = -EINTR;
9215                         goto out;
9216                 }
9217                 kvm_vcpu_block(vcpu);
9218                 kvm_apic_accept_events(vcpu);
9219                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
9220                 r = -EAGAIN;
9221                 if (signal_pending(current)) {
9222                         r = -EINTR;
9223                         kvm_run->exit_reason = KVM_EXIT_INTR;
9224                         ++vcpu->stat.signal_exits;
9225                 }
9226                 goto out;
9227         }
9228
9229         if (kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
9230                 r = -EINVAL;
9231                 goto out;
9232         }
9233
9234         if (kvm_run->kvm_dirty_regs) {
9235                 r = sync_regs(vcpu);
9236                 if (r != 0)
9237                         goto out;
9238         }
9239
9240         /* re-sync apic's tpr */
9241         if (!lapic_in_kernel(vcpu)) {
9242                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
9243                         r = -EINVAL;
9244                         goto out;
9245                 }
9246         }
9247
9248         if (unlikely(vcpu->arch.complete_userspace_io)) {
9249                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
9250                 vcpu->arch.complete_userspace_io = NULL;
9251                 r = cui(vcpu);
9252                 if (r <= 0)
9253                         goto out;
9254         } else
9255                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
9256
9257         if (kvm_run->immediate_exit)
9258                 r = -EINTR;
9259         else
9260                 r = vcpu_run(vcpu);
9261
9262 out:
9263         kvm_put_guest_fpu(vcpu);
9264         if (kvm_run->kvm_valid_regs)
9265                 store_regs(vcpu);
9266         post_kvm_run_save(vcpu);
9267         kvm_sigset_deactivate(vcpu);
9268
9269         vcpu_put(vcpu);
9270         return r;
9271 }
9272
9273 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9274 {
9275         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
9276                 /*
9277                  * We are here if userspace calls get_regs() in the middle of
9278                  * instruction emulation. Registers state needs to be copied
9279                  * back from emulation context to vcpu. Userspace shouldn't do
9280                  * that usually, but some bad designed PV devices (vmware
9281                  * backdoor interface) need this to work
9282                  */
9283                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
9284                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9285         }
9286         regs->rax = kvm_rax_read(vcpu);
9287         regs->rbx = kvm_rbx_read(vcpu);
9288         regs->rcx = kvm_rcx_read(vcpu);
9289         regs->rdx = kvm_rdx_read(vcpu);
9290         regs->rsi = kvm_rsi_read(vcpu);
9291         regs->rdi = kvm_rdi_read(vcpu);
9292         regs->rsp = kvm_rsp_read(vcpu);
9293         regs->rbp = kvm_rbp_read(vcpu);
9294 #ifdef CONFIG_X86_64
9295         regs->r8 = kvm_r8_read(vcpu);
9296         regs->r9 = kvm_r9_read(vcpu);
9297         regs->r10 = kvm_r10_read(vcpu);
9298         regs->r11 = kvm_r11_read(vcpu);
9299         regs->r12 = kvm_r12_read(vcpu);
9300         regs->r13 = kvm_r13_read(vcpu);
9301         regs->r14 = kvm_r14_read(vcpu);
9302         regs->r15 = kvm_r15_read(vcpu);
9303 #endif
9304
9305         regs->rip = kvm_rip_read(vcpu);
9306         regs->rflags = kvm_get_rflags(vcpu);
9307 }
9308
9309 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9310 {
9311         vcpu_load(vcpu);
9312         __get_regs(vcpu, regs);
9313         vcpu_put(vcpu);
9314         return 0;
9315 }
9316
9317 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9318 {
9319         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
9320         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
9321
9322         kvm_rax_write(vcpu, regs->rax);
9323         kvm_rbx_write(vcpu, regs->rbx);
9324         kvm_rcx_write(vcpu, regs->rcx);
9325         kvm_rdx_write(vcpu, regs->rdx);
9326         kvm_rsi_write(vcpu, regs->rsi);
9327         kvm_rdi_write(vcpu, regs->rdi);
9328         kvm_rsp_write(vcpu, regs->rsp);
9329         kvm_rbp_write(vcpu, regs->rbp);
9330 #ifdef CONFIG_X86_64
9331         kvm_r8_write(vcpu, regs->r8);
9332         kvm_r9_write(vcpu, regs->r9);
9333         kvm_r10_write(vcpu, regs->r10);
9334         kvm_r11_write(vcpu, regs->r11);
9335         kvm_r12_write(vcpu, regs->r12);
9336         kvm_r13_write(vcpu, regs->r13);
9337         kvm_r14_write(vcpu, regs->r14);
9338         kvm_r15_write(vcpu, regs->r15);
9339 #endif
9340
9341         kvm_rip_write(vcpu, regs->rip);
9342         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
9343
9344         vcpu->arch.exception.pending = false;
9345
9346         kvm_make_request(KVM_REQ_EVENT, vcpu);
9347 }
9348
9349 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
9350 {
9351         vcpu_load(vcpu);
9352         __set_regs(vcpu, regs);
9353         vcpu_put(vcpu);
9354         return 0;
9355 }
9356
9357 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
9358 {
9359         struct kvm_segment cs;
9360
9361         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9362         *db = cs.db;
9363         *l = cs.l;
9364 }
9365 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
9366
9367 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9368 {
9369         struct desc_ptr dt;
9370
9371         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9372         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9373         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9374         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9375         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9376         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9377
9378         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9379         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9380
9381         kvm_x86_ops.get_idt(vcpu, &dt);
9382         sregs->idt.limit = dt.size;
9383         sregs->idt.base = dt.address;
9384         kvm_x86_ops.get_gdt(vcpu, &dt);
9385         sregs->gdt.limit = dt.size;
9386         sregs->gdt.base = dt.address;
9387
9388         sregs->cr0 = kvm_read_cr0(vcpu);
9389         sregs->cr2 = vcpu->arch.cr2;
9390         sregs->cr3 = kvm_read_cr3(vcpu);
9391         sregs->cr4 = kvm_read_cr4(vcpu);
9392         sregs->cr8 = kvm_get_cr8(vcpu);
9393         sregs->efer = vcpu->arch.efer;
9394         sregs->apic_base = kvm_get_apic_base(vcpu);
9395
9396         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
9397
9398         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
9399                 set_bit(vcpu->arch.interrupt.nr,
9400                         (unsigned long *)sregs->interrupt_bitmap);
9401 }
9402
9403 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
9404                                   struct kvm_sregs *sregs)
9405 {
9406         vcpu_load(vcpu);
9407         __get_sregs(vcpu, sregs);
9408         vcpu_put(vcpu);
9409         return 0;
9410 }
9411
9412 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
9413                                     struct kvm_mp_state *mp_state)
9414 {
9415         vcpu_load(vcpu);
9416         if (kvm_mpx_supported())
9417                 kvm_load_guest_fpu(vcpu);
9418
9419         kvm_apic_accept_events(vcpu);
9420         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
9421                                         vcpu->arch.pv.pv_unhalted)
9422                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
9423         else
9424                 mp_state->mp_state = vcpu->arch.mp_state;
9425
9426         if (kvm_mpx_supported())
9427                 kvm_put_guest_fpu(vcpu);
9428         vcpu_put(vcpu);
9429         return 0;
9430 }
9431
9432 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
9433                                     struct kvm_mp_state *mp_state)
9434 {
9435         int ret = -EINVAL;
9436
9437         vcpu_load(vcpu);
9438
9439         if (!lapic_in_kernel(vcpu) &&
9440             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
9441                 goto out;
9442
9443         /*
9444          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
9445          * INIT state; latched init should be reported using
9446          * KVM_SET_VCPU_EVENTS, so reject it here.
9447          */
9448         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
9449             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
9450              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
9451                 goto out;
9452
9453         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
9454                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
9455                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
9456         } else
9457                 vcpu->arch.mp_state = mp_state->mp_state;
9458         kvm_make_request(KVM_REQ_EVENT, vcpu);
9459
9460         ret = 0;
9461 out:
9462         vcpu_put(vcpu);
9463         return ret;
9464 }
9465
9466 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
9467                     int reason, bool has_error_code, u32 error_code)
9468 {
9469         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
9470         int ret;
9471
9472         init_emulate_ctxt(vcpu);
9473
9474         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
9475                                    has_error_code, error_code);
9476         if (ret) {
9477                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
9478                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
9479                 vcpu->run->internal.ndata = 0;
9480                 return 0;
9481         }
9482
9483         kvm_rip_write(vcpu, ctxt->eip);
9484         kvm_set_rflags(vcpu, ctxt->eflags);
9485         return 1;
9486 }
9487 EXPORT_SYMBOL_GPL(kvm_task_switch);
9488
9489 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9490 {
9491         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
9492                 /*
9493                  * When EFER.LME and CR0.PG are set, the processor is in
9494                  * 64-bit mode (though maybe in a 32-bit code segment).
9495                  * CR4.PAE and EFER.LMA must be set.
9496                  */
9497                 if (!(sregs->cr4 & X86_CR4_PAE)
9498                     || !(sregs->efer & EFER_LMA))
9499                         return -EINVAL;
9500         } else {
9501                 /*
9502                  * Not in 64-bit mode: EFER.LMA is clear and the code
9503                  * segment cannot be 64-bit.
9504                  */
9505                 if (sregs->efer & EFER_LMA || sregs->cs.l)
9506                         return -EINVAL;
9507         }
9508
9509         return kvm_valid_cr4(vcpu, sregs->cr4);
9510 }
9511
9512 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
9513 {
9514         struct msr_data apic_base_msr;
9515         int mmu_reset_needed = 0;
9516         int cpuid_update_needed = 0;
9517         int pending_vec, max_bits, idx;
9518         struct desc_ptr dt;
9519         int ret = -EINVAL;
9520
9521         if (kvm_valid_sregs(vcpu, sregs))
9522                 goto out;
9523
9524         apic_base_msr.data = sregs->apic_base;
9525         apic_base_msr.host_initiated = true;
9526         if (kvm_set_apic_base(vcpu, &apic_base_msr))
9527                 goto out;
9528
9529         dt.size = sregs->idt.limit;
9530         dt.address = sregs->idt.base;
9531         kvm_x86_ops.set_idt(vcpu, &dt);
9532         dt.size = sregs->gdt.limit;
9533         dt.address = sregs->gdt.base;
9534         kvm_x86_ops.set_gdt(vcpu, &dt);
9535
9536         vcpu->arch.cr2 = sregs->cr2;
9537         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
9538         vcpu->arch.cr3 = sregs->cr3;
9539         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
9540
9541         kvm_set_cr8(vcpu, sregs->cr8);
9542
9543         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
9544         kvm_x86_ops.set_efer(vcpu, sregs->efer);
9545
9546         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
9547         kvm_x86_ops.set_cr0(vcpu, sregs->cr0);
9548         vcpu->arch.cr0 = sregs->cr0;
9549
9550         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
9551         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
9552                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
9553         kvm_x86_ops.set_cr4(vcpu, sregs->cr4);
9554         if (cpuid_update_needed)
9555                 kvm_update_cpuid_runtime(vcpu);
9556
9557         idx = srcu_read_lock(&vcpu->kvm->srcu);
9558         if (is_pae_paging(vcpu)) {
9559                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
9560                 mmu_reset_needed = 1;
9561         }
9562         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9563
9564         if (mmu_reset_needed)
9565                 kvm_mmu_reset_context(vcpu);
9566
9567         max_bits = KVM_NR_INTERRUPTS;
9568         pending_vec = find_first_bit(
9569                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
9570         if (pending_vec < max_bits) {
9571                 kvm_queue_interrupt(vcpu, pending_vec, false);
9572                 pr_debug("Set back pending irq %d\n", pending_vec);
9573         }
9574
9575         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
9576         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
9577         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
9578         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
9579         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
9580         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
9581
9582         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
9583         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
9584
9585         update_cr8_intercept(vcpu);
9586
9587         /* Older userspace won't unhalt the vcpu on reset. */
9588         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
9589             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
9590             !is_protmode(vcpu))
9591                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9592
9593         kvm_make_request(KVM_REQ_EVENT, vcpu);
9594
9595         ret = 0;
9596 out:
9597         return ret;
9598 }
9599
9600 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
9601                                   struct kvm_sregs *sregs)
9602 {
9603         int ret;
9604
9605         vcpu_load(vcpu);
9606         ret = __set_sregs(vcpu, sregs);
9607         vcpu_put(vcpu);
9608         return ret;
9609 }
9610
9611 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
9612                                         struct kvm_guest_debug *dbg)
9613 {
9614         unsigned long rflags;
9615         int i, r;
9616
9617         vcpu_load(vcpu);
9618
9619         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
9620                 r = -EBUSY;
9621                 if (vcpu->arch.exception.pending)
9622                         goto out;
9623                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
9624                         kvm_queue_exception(vcpu, DB_VECTOR);
9625                 else
9626                         kvm_queue_exception(vcpu, BP_VECTOR);
9627         }
9628
9629         /*
9630          * Read rflags as long as potentially injected trace flags are still
9631          * filtered out.
9632          */
9633         rflags = kvm_get_rflags(vcpu);
9634
9635         vcpu->guest_debug = dbg->control;
9636         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
9637                 vcpu->guest_debug = 0;
9638
9639         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
9640                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
9641                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
9642                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
9643         } else {
9644                 for (i = 0; i < KVM_NR_DB_REGS; i++)
9645                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
9646         }
9647         kvm_update_dr7(vcpu);
9648
9649         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9650                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
9651                         get_segment_base(vcpu, VCPU_SREG_CS);
9652
9653         /*
9654          * Trigger an rflags update that will inject or remove the trace
9655          * flags.
9656          */
9657         kvm_set_rflags(vcpu, rflags);
9658
9659         kvm_x86_ops.update_exception_bitmap(vcpu);
9660
9661         r = 0;
9662
9663 out:
9664         vcpu_put(vcpu);
9665         return r;
9666 }
9667
9668 /*
9669  * Translate a guest virtual address to a guest physical address.
9670  */
9671 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
9672                                     struct kvm_translation *tr)
9673 {
9674         unsigned long vaddr = tr->linear_address;
9675         gpa_t gpa;
9676         int idx;
9677
9678         vcpu_load(vcpu);
9679
9680         idx = srcu_read_lock(&vcpu->kvm->srcu);
9681         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
9682         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9683         tr->physical_address = gpa;
9684         tr->valid = gpa != UNMAPPED_GVA;
9685         tr->writeable = 1;
9686         tr->usermode = 0;
9687
9688         vcpu_put(vcpu);
9689         return 0;
9690 }
9691
9692 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9693 {
9694         struct fxregs_state *fxsave;
9695
9696         vcpu_load(vcpu);
9697
9698         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9699         memcpy(fpu->fpr, fxsave->st_space, 128);
9700         fpu->fcw = fxsave->cwd;
9701         fpu->fsw = fxsave->swd;
9702         fpu->ftwx = fxsave->twd;
9703         fpu->last_opcode = fxsave->fop;
9704         fpu->last_ip = fxsave->rip;
9705         fpu->last_dp = fxsave->rdp;
9706         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
9707
9708         vcpu_put(vcpu);
9709         return 0;
9710 }
9711
9712 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
9713 {
9714         struct fxregs_state *fxsave;
9715
9716         vcpu_load(vcpu);
9717
9718         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
9719
9720         memcpy(fxsave->st_space, fpu->fpr, 128);
9721         fxsave->cwd = fpu->fcw;
9722         fxsave->swd = fpu->fsw;
9723         fxsave->twd = fpu->ftwx;
9724         fxsave->fop = fpu->last_opcode;
9725         fxsave->rip = fpu->last_ip;
9726         fxsave->rdp = fpu->last_dp;
9727         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
9728
9729         vcpu_put(vcpu);
9730         return 0;
9731 }
9732
9733 static void store_regs(struct kvm_vcpu *vcpu)
9734 {
9735         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
9736
9737         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
9738                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
9739
9740         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9741                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9742
9743         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9744                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9745                                 vcpu, &vcpu->run->s.regs.events);
9746 }
9747
9748 static int sync_regs(struct kvm_vcpu *vcpu)
9749 {
9750         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9751                 return -EINVAL;
9752
9753         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9754                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9755                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9756         }
9757         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9758                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9759                         return -EINVAL;
9760                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9761         }
9762         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9763                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9764                                 vcpu, &vcpu->run->s.regs.events))
9765                         return -EINVAL;
9766                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9767         }
9768
9769         return 0;
9770 }
9771
9772 static void fx_init(struct kvm_vcpu *vcpu)
9773 {
9774         fpstate_init(&vcpu->arch.guest_fpu->state);
9775         if (boot_cpu_has(X86_FEATURE_XSAVES))
9776                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9777                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9778
9779         /*
9780          * Ensure guest xcr0 is valid for loading
9781          */
9782         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9783
9784         vcpu->arch.cr0 |= X86_CR0_ET;
9785 }
9786
9787 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
9788 {
9789         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9790                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
9791                              "guest TSC will not be reliable\n");
9792
9793         return 0;
9794 }
9795
9796 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
9797 {
9798         struct page *page;
9799         int r;
9800
9801         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9802                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9803         else
9804                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9805
9806         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9807
9808         r = kvm_mmu_create(vcpu);
9809         if (r < 0)
9810                 return r;
9811
9812         if (irqchip_in_kernel(vcpu->kvm)) {
9813                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9814                 if (r < 0)
9815                         goto fail_mmu_destroy;
9816                 if (kvm_apicv_activated(vcpu->kvm))
9817                         vcpu->arch.apicv_active = true;
9818         } else
9819                 static_key_slow_inc(&kvm_no_apic_vcpu);
9820
9821         r = -ENOMEM;
9822
9823         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9824         if (!page)
9825                 goto fail_free_lapic;
9826         vcpu->arch.pio_data = page_address(page);
9827
9828         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9829                                        GFP_KERNEL_ACCOUNT);
9830         if (!vcpu->arch.mce_banks)
9831                 goto fail_free_pio_data;
9832         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9833
9834         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9835                                 GFP_KERNEL_ACCOUNT))
9836                 goto fail_free_mce_banks;
9837
9838         if (!alloc_emulate_ctxt(vcpu))
9839                 goto free_wbinvd_dirty_mask;
9840
9841         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
9842                                                 GFP_KERNEL_ACCOUNT);
9843         if (!vcpu->arch.user_fpu) {
9844                 pr_err("kvm: failed to allocate userspace's fpu\n");
9845                 goto free_emulate_ctxt;
9846         }
9847
9848         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
9849                                                  GFP_KERNEL_ACCOUNT);
9850         if (!vcpu->arch.guest_fpu) {
9851                 pr_err("kvm: failed to allocate vcpu's fpu\n");
9852                 goto free_user_fpu;
9853         }
9854         fx_init(vcpu);
9855
9856         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9857
9858         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9859
9860         kvm_async_pf_hash_reset(vcpu);
9861         kvm_pmu_init(vcpu);
9862
9863         vcpu->arch.pending_external_vector = -1;
9864         vcpu->arch.preempted_in_kernel = false;
9865
9866         kvm_hv_vcpu_init(vcpu);
9867
9868         r = kvm_x86_ops.vcpu_create(vcpu);
9869         if (r)
9870                 goto free_guest_fpu;
9871
9872         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9873         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9874         kvm_vcpu_mtrr_init(vcpu);
9875         vcpu_load(vcpu);
9876         kvm_vcpu_reset(vcpu, false);
9877         kvm_init_mmu(vcpu, false);
9878         vcpu_put(vcpu);
9879         return 0;
9880
9881 free_guest_fpu:
9882         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9883 free_user_fpu:
9884         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9885 free_emulate_ctxt:
9886         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9887 free_wbinvd_dirty_mask:
9888         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9889 fail_free_mce_banks:
9890         kfree(vcpu->arch.mce_banks);
9891 fail_free_pio_data:
9892         free_page((unsigned long)vcpu->arch.pio_data);
9893 fail_free_lapic:
9894         kvm_free_lapic(vcpu);
9895 fail_mmu_destroy:
9896         kvm_mmu_destroy(vcpu);
9897         return r;
9898 }
9899
9900 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9901 {
9902         struct kvm *kvm = vcpu->kvm;
9903
9904         kvm_hv_vcpu_postcreate(vcpu);
9905
9906         if (mutex_lock_killable(&vcpu->mutex))
9907                 return;
9908         vcpu_load(vcpu);
9909         kvm_synchronize_tsc(vcpu, 0);
9910         vcpu_put(vcpu);
9911
9912         /* poll control enabled by default */
9913         vcpu->arch.msr_kvm_poll_control = 1;
9914
9915         mutex_unlock(&vcpu->mutex);
9916
9917         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
9918                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9919                                                 KVMCLOCK_SYNC_PERIOD);
9920 }
9921
9922 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9923 {
9924         struct gfn_to_pfn_cache *cache = &vcpu->arch.st.cache;
9925         int idx;
9926
9927         kvm_release_pfn(cache->pfn, cache->dirty, cache);
9928
9929         kvmclock_reset(vcpu);
9930
9931         kvm_x86_ops.vcpu_free(vcpu);
9932
9933         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
9934         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
9935         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
9936         kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
9937
9938         kvm_hv_vcpu_uninit(vcpu);
9939         kvm_pmu_destroy(vcpu);
9940         kfree(vcpu->arch.mce_banks);
9941         kvm_free_lapic(vcpu);
9942         idx = srcu_read_lock(&vcpu->kvm->srcu);
9943         kvm_mmu_destroy(vcpu);
9944         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9945         free_page((unsigned long)vcpu->arch.pio_data);
9946         kvfree(vcpu->arch.cpuid_entries);
9947         if (!lapic_in_kernel(vcpu))
9948                 static_key_slow_dec(&kvm_no_apic_vcpu);
9949 }
9950
9951 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9952 {
9953         kvm_lapic_reset(vcpu, init_event);
9954
9955         vcpu->arch.hflags = 0;
9956
9957         vcpu->arch.smi_pending = 0;
9958         vcpu->arch.smi_count = 0;
9959         atomic_set(&vcpu->arch.nmi_queued, 0);
9960         vcpu->arch.nmi_pending = 0;
9961         vcpu->arch.nmi_injected = false;
9962         kvm_clear_interrupt_queue(vcpu);
9963         kvm_clear_exception_queue(vcpu);
9964
9965         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9966         kvm_update_dr0123(vcpu);
9967         vcpu->arch.dr6 = DR6_INIT;
9968         vcpu->arch.dr7 = DR7_FIXED_1;
9969         kvm_update_dr7(vcpu);
9970
9971         vcpu->arch.cr2 = 0;
9972
9973         kvm_make_request(KVM_REQ_EVENT, vcpu);
9974         vcpu->arch.apf.msr_en_val = 0;
9975         vcpu->arch.apf.msr_int_val = 0;
9976         vcpu->arch.st.msr_val = 0;
9977
9978         kvmclock_reset(vcpu);
9979
9980         kvm_clear_async_pf_completion_queue(vcpu);
9981         kvm_async_pf_hash_reset(vcpu);
9982         vcpu->arch.apf.halted = false;
9983
9984         if (kvm_mpx_supported()) {
9985                 void *mpx_state_buffer;
9986
9987                 /*
9988                  * To avoid have the INIT path from kvm_apic_has_events() that be
9989                  * called with loaded FPU and does not let userspace fix the state.
9990                  */
9991                 if (init_event)
9992                         kvm_put_guest_fpu(vcpu);
9993                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9994                                         XFEATURE_BNDREGS);
9995                 if (mpx_state_buffer)
9996                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9997                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9998                                         XFEATURE_BNDCSR);
9999                 if (mpx_state_buffer)
10000                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
10001                 if (init_event)
10002                         kvm_load_guest_fpu(vcpu);
10003         }
10004
10005         if (!init_event) {
10006                 kvm_pmu_reset(vcpu);
10007                 vcpu->arch.smbase = 0x30000;
10008
10009                 vcpu->arch.msr_misc_features_enables = 0;
10010
10011                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
10012         }
10013
10014         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
10015         vcpu->arch.regs_avail = ~0;
10016         vcpu->arch.regs_dirty = ~0;
10017
10018         vcpu->arch.ia32_xss = 0;
10019
10020         kvm_x86_ops.vcpu_reset(vcpu, init_event);
10021 }
10022
10023 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
10024 {
10025         struct kvm_segment cs;
10026
10027         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10028         cs.selector = vector << 8;
10029         cs.base = vector << 12;
10030         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
10031         kvm_rip_write(vcpu, 0);
10032 }
10033
10034 int kvm_arch_hardware_enable(void)
10035 {
10036         struct kvm *kvm;
10037         struct kvm_vcpu *vcpu;
10038         int i;
10039         int ret;
10040         u64 local_tsc;
10041         u64 max_tsc = 0;
10042         bool stable, backwards_tsc = false;
10043
10044         kvm_user_return_msr_cpu_online();
10045         ret = kvm_x86_ops.hardware_enable();
10046         if (ret != 0)
10047                 return ret;
10048
10049         local_tsc = rdtsc();
10050         stable = !kvm_check_tsc_unstable();
10051         list_for_each_entry(kvm, &vm_list, vm_list) {
10052                 kvm_for_each_vcpu(i, vcpu, kvm) {
10053                         if (!stable && vcpu->cpu == smp_processor_id())
10054                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10055                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
10056                                 backwards_tsc = true;
10057                                 if (vcpu->arch.last_host_tsc > max_tsc)
10058                                         max_tsc = vcpu->arch.last_host_tsc;
10059                         }
10060                 }
10061         }
10062
10063         /*
10064          * Sometimes, even reliable TSCs go backwards.  This happens on
10065          * platforms that reset TSC during suspend or hibernate actions, but
10066          * maintain synchronization.  We must compensate.  Fortunately, we can
10067          * detect that condition here, which happens early in CPU bringup,
10068          * before any KVM threads can be running.  Unfortunately, we can't
10069          * bring the TSCs fully up to date with real time, as we aren't yet far
10070          * enough into CPU bringup that we know how much real time has actually
10071          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10072          * variables that haven't been updated yet.
10073          *
10074          * So we simply find the maximum observed TSC above, then record the
10075          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
10076          * the adjustment will be applied.  Note that we accumulate
10077          * adjustments, in case multiple suspend cycles happen before some VCPU
10078          * gets a chance to run again.  In the event that no KVM threads get a
10079          * chance to run, we will miss the entire elapsed period, as we'll have
10080          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10081          * loose cycle time.  This isn't too big a deal, since the loss will be
10082          * uniform across all VCPUs (not to mention the scenario is extremely
10083          * unlikely). It is possible that a second hibernate recovery happens
10084          * much faster than a first, causing the observed TSC here to be
10085          * smaller; this would require additional padding adjustment, which is
10086          * why we set last_host_tsc to the local tsc observed here.
10087          *
10088          * N.B. - this code below runs only on platforms with reliable TSC,
10089          * as that is the only way backwards_tsc is set above.  Also note
10090          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10091          * have the same delta_cyc adjustment applied if backwards_tsc
10092          * is detected.  Note further, this adjustment is only done once,
10093          * as we reset last_host_tsc on all VCPUs to stop this from being
10094          * called multiple times (one for each physical CPU bringup).
10095          *
10096          * Platforms with unreliable TSCs don't have to deal with this, they
10097          * will be compensated by the logic in vcpu_load, which sets the TSC to
10098          * catchup mode.  This will catchup all VCPUs to real time, but cannot
10099          * guarantee that they stay in perfect synchronization.
10100          */
10101         if (backwards_tsc) {
10102                 u64 delta_cyc = max_tsc - local_tsc;
10103                 list_for_each_entry(kvm, &vm_list, vm_list) {
10104                         kvm->arch.backwards_tsc_observed = true;
10105                         kvm_for_each_vcpu(i, vcpu, kvm) {
10106                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
10107                                 vcpu->arch.last_host_tsc = local_tsc;
10108                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
10109                         }
10110
10111                         /*
10112                          * We have to disable TSC offset matching.. if you were
10113                          * booting a VM while issuing an S4 host suspend....
10114                          * you may have some problem.  Solving this issue is
10115                          * left as an exercise to the reader.
10116                          */
10117                         kvm->arch.last_tsc_nsec = 0;
10118                         kvm->arch.last_tsc_write = 0;
10119                 }
10120
10121         }
10122         return 0;
10123 }
10124
10125 void kvm_arch_hardware_disable(void)
10126 {
10127         kvm_x86_ops.hardware_disable();
10128         drop_user_return_notifiers();
10129 }
10130
10131 int kvm_arch_hardware_setup(void *opaque)
10132 {
10133         struct kvm_x86_init_ops *ops = opaque;
10134         int r;
10135
10136         rdmsrl_safe(MSR_EFER, &host_efer);
10137
10138         if (boot_cpu_has(X86_FEATURE_XSAVES))
10139                 rdmsrl(MSR_IA32_XSS, host_xss);
10140
10141         r = ops->hardware_setup();
10142         if (r != 0)
10143                 return r;
10144
10145         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
10146
10147         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
10148                 supported_xss = 0;
10149
10150 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10151         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
10152 #undef __kvm_cpu_cap_has
10153
10154         if (kvm_has_tsc_control) {
10155                 /*
10156                  * Make sure the user can only configure tsc_khz values that
10157                  * fit into a signed integer.
10158                  * A min value is not calculated because it will always
10159                  * be 1 on all machines.
10160                  */
10161                 u64 max = min(0x7fffffffULL,
10162                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
10163                 kvm_max_guest_tsc_khz = max;
10164
10165                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
10166         }
10167
10168         kvm_init_msr_list();
10169         return 0;
10170 }
10171
10172 void kvm_arch_hardware_unsetup(void)
10173 {
10174         kvm_x86_ops.hardware_unsetup();
10175 }
10176
10177 int kvm_arch_check_processor_compat(void *opaque)
10178 {
10179         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
10180         struct kvm_x86_init_ops *ops = opaque;
10181
10182         WARN_ON(!irqs_disabled());
10183
10184         if (__cr4_reserved_bits(cpu_has, c) !=
10185             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
10186                 return -EIO;
10187
10188         return ops->check_processor_compatibility();
10189 }
10190
10191 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
10192 {
10193         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
10194 }
10195 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
10196
10197 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
10198 {
10199         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
10200 }
10201
10202 struct static_key kvm_no_apic_vcpu __read_mostly;
10203 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
10204
10205 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
10206 {
10207         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
10208
10209         vcpu->arch.l1tf_flush_l1d = true;
10210         if (pmu->version && unlikely(pmu->event_count)) {
10211                 pmu->need_cleanup = true;
10212                 kvm_make_request(KVM_REQ_PMU, vcpu);
10213         }
10214         kvm_x86_ops.sched_in(vcpu, cpu);
10215 }
10216
10217 void kvm_arch_free_vm(struct kvm *kvm)
10218 {
10219         kfree(kvm->arch.hyperv.hv_pa_pg);
10220         vfree(kvm);
10221 }
10222
10223
10224 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
10225 {
10226         if (type)
10227                 return -EINVAL;
10228
10229         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
10230         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
10231         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
10232         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
10233         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
10234         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
10235
10236         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10237         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
10238         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10239         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
10240                 &kvm->arch.irq_sources_bitmap);
10241
10242         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
10243         mutex_init(&kvm->arch.apic_map_lock);
10244         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
10245
10246         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
10247         pvclock_update_vm_gtod_copy(kvm);
10248
10249         kvm->arch.guest_can_read_msr_platform_info = true;
10250
10251         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
10252         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
10253
10254         kvm_hv_init_vm(kvm);
10255         kvm_page_track_init(kvm);
10256         kvm_mmu_init_vm(kvm);
10257
10258         return kvm_x86_ops.vm_init(kvm);
10259 }
10260
10261 int kvm_arch_post_init_vm(struct kvm *kvm)
10262 {
10263         return kvm_mmu_post_init_vm(kvm);
10264 }
10265
10266 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
10267 {
10268         vcpu_load(vcpu);
10269         kvm_mmu_unload(vcpu);
10270         vcpu_put(vcpu);
10271 }
10272
10273 static void kvm_free_vcpus(struct kvm *kvm)
10274 {
10275         unsigned int i;
10276         struct kvm_vcpu *vcpu;
10277
10278         /*
10279          * Unpin any mmu pages first.
10280          */
10281         kvm_for_each_vcpu(i, vcpu, kvm) {
10282                 kvm_clear_async_pf_completion_queue(vcpu);
10283                 kvm_unload_vcpu_mmu(vcpu);
10284         }
10285         kvm_for_each_vcpu(i, vcpu, kvm)
10286                 kvm_vcpu_destroy(vcpu);
10287
10288         mutex_lock(&kvm->lock);
10289         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
10290                 kvm->vcpus[i] = NULL;
10291
10292         atomic_set(&kvm->online_vcpus, 0);
10293         mutex_unlock(&kvm->lock);
10294 }
10295
10296 void kvm_arch_sync_events(struct kvm *kvm)
10297 {
10298         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
10299         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
10300         kvm_free_pit(kvm);
10301 }
10302
10303 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
10304 {
10305         int i, r;
10306         unsigned long hva, old_npages;
10307         struct kvm_memslots *slots = kvm_memslots(kvm);
10308         struct kvm_memory_slot *slot;
10309
10310         /* Called with kvm->slots_lock held.  */
10311         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
10312                 return -EINVAL;
10313
10314         slot = id_to_memslot(slots, id);
10315         if (size) {
10316                 if (slot && slot->npages)
10317                         return -EEXIST;
10318
10319                 /*
10320                  * MAP_SHARED to prevent internal slot pages from being moved
10321                  * by fork()/COW.
10322                  */
10323                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
10324                               MAP_SHARED | MAP_ANONYMOUS, 0);
10325                 if (IS_ERR((void *)hva))
10326                         return PTR_ERR((void *)hva);
10327         } else {
10328                 if (!slot || !slot->npages)
10329                         return 0;
10330
10331                 old_npages = slot->npages;
10332                 hva = 0;
10333         }
10334
10335         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
10336                 struct kvm_userspace_memory_region m;
10337
10338                 m.slot = id | (i << 16);
10339                 m.flags = 0;
10340                 m.guest_phys_addr = gpa;
10341                 m.userspace_addr = hva;
10342                 m.memory_size = size;
10343                 r = __kvm_set_memory_region(kvm, &m);
10344                 if (r < 0)
10345                         return r;
10346         }
10347
10348         if (!size)
10349                 vm_munmap(hva, old_npages * PAGE_SIZE);
10350
10351         return 0;
10352 }
10353 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
10354
10355 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
10356 {
10357         kvm_mmu_pre_destroy_vm(kvm);
10358 }
10359
10360 void kvm_arch_destroy_vm(struct kvm *kvm)
10361 {
10362         u32 i;
10363
10364         if (current->mm == kvm->mm) {
10365                 /*
10366                  * Free memory regions allocated on behalf of userspace,
10367                  * unless the the memory map has changed due to process exit
10368                  * or fd copying.
10369                  */
10370                 mutex_lock(&kvm->slots_lock);
10371                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
10372                                         0, 0);
10373                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
10374                                         0, 0);
10375                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
10376                 mutex_unlock(&kvm->slots_lock);
10377         }
10378         if (kvm_x86_ops.vm_destroy)
10379                 kvm_x86_ops.vm_destroy(kvm);
10380         for (i = 0; i < kvm->arch.msr_filter.count; i++)
10381                 kfree(kvm->arch.msr_filter.ranges[i].bitmap);
10382         kvm_pic_destroy(kvm);
10383         kvm_ioapic_destroy(kvm);
10384         kvm_free_vcpus(kvm);
10385         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
10386         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
10387         kvm_mmu_uninit_vm(kvm);
10388         kvm_page_track_cleanup(kvm);
10389         kvm_hv_destroy_vm(kvm);
10390 }
10391
10392 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
10393 {
10394         int i;
10395
10396         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10397                 kvfree(slot->arch.rmap[i]);
10398                 slot->arch.rmap[i] = NULL;
10399
10400                 if (i == 0)
10401                         continue;
10402
10403                 kvfree(slot->arch.lpage_info[i - 1]);
10404                 slot->arch.lpage_info[i - 1] = NULL;
10405         }
10406
10407         kvm_page_track_free_memslot(slot);
10408 }
10409
10410 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot *slot,
10411                                       unsigned long npages)
10412 {
10413         int i;
10414
10415         /*
10416          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
10417          * old arrays will be freed by __kvm_set_memory_region() if installing
10418          * the new memslot is successful.
10419          */
10420         memset(&slot->arch, 0, sizeof(slot->arch));
10421
10422         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10423                 struct kvm_lpage_info *linfo;
10424                 unsigned long ugfn;
10425                 int lpages;
10426                 int level = i + 1;
10427
10428                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
10429                                       slot->base_gfn, level) + 1;
10430
10431                 slot->arch.rmap[i] =
10432                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
10433                                  GFP_KERNEL_ACCOUNT);
10434                 if (!slot->arch.rmap[i])
10435                         goto out_free;
10436                 if (i == 0)
10437                         continue;
10438
10439                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
10440                 if (!linfo)
10441                         goto out_free;
10442
10443                 slot->arch.lpage_info[i - 1] = linfo;
10444
10445                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
10446                         linfo[0].disallow_lpage = 1;
10447                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
10448                         linfo[lpages - 1].disallow_lpage = 1;
10449                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
10450                 /*
10451                  * If the gfn and userspace address are not aligned wrt each
10452                  * other, disable large page support for this slot.
10453                  */
10454                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
10455                         unsigned long j;
10456
10457                         for (j = 0; j < lpages; ++j)
10458                                 linfo[j].disallow_lpage = 1;
10459                 }
10460         }
10461
10462         if (kvm_page_track_create_memslot(slot, npages))
10463                 goto out_free;
10464
10465         return 0;
10466
10467 out_free:
10468         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
10469                 kvfree(slot->arch.rmap[i]);
10470                 slot->arch.rmap[i] = NULL;
10471                 if (i == 0)
10472                         continue;
10473
10474                 kvfree(slot->arch.lpage_info[i - 1]);
10475                 slot->arch.lpage_info[i - 1] = NULL;
10476         }
10477         return -ENOMEM;
10478 }
10479
10480 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
10481 {
10482         struct kvm_vcpu *vcpu;
10483         int i;
10484
10485         /*
10486          * memslots->generation has been incremented.
10487          * mmio generation may have reached its maximum value.
10488          */
10489         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
10490
10491         /* Force re-initialization of steal_time cache */
10492         kvm_for_each_vcpu(i, vcpu, kvm)
10493                 kvm_vcpu_kick(vcpu);
10494 }
10495
10496 int kvm_arch_prepare_memory_region(struct kvm *kvm,
10497                                 struct kvm_memory_slot *memslot,
10498                                 const struct kvm_userspace_memory_region *mem,
10499                                 enum kvm_mr_change change)
10500 {
10501         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
10502                 return kvm_alloc_memslot_metadata(memslot,
10503                                                   mem->memory_size >> PAGE_SHIFT);
10504         return 0;
10505 }
10506
10507 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
10508                                      struct kvm_memory_slot *old,
10509                                      struct kvm_memory_slot *new,
10510                                      enum kvm_mr_change change)
10511 {
10512         /*
10513          * Nothing to do for RO slots or CREATE/MOVE/DELETE of a slot.
10514          * See comments below.
10515          */
10516         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
10517                 return;
10518
10519         /*
10520          * Dirty logging tracks sptes in 4k granularity, meaning that large
10521          * sptes have to be split.  If live migration is successful, the guest
10522          * in the source machine will be destroyed and large sptes will be
10523          * created in the destination. However, if the guest continues to run
10524          * in the source machine (for example if live migration fails), small
10525          * sptes will remain around and cause bad performance.
10526          *
10527          * Scan sptes if dirty logging has been stopped, dropping those
10528          * which can be collapsed into a single large-page spte.  Later
10529          * page faults will create the large-page sptes.
10530          *
10531          * There is no need to do this in any of the following cases:
10532          * CREATE:      No dirty mappings will already exist.
10533          * MOVE/DELETE: The old mappings will already have been cleaned up by
10534          *              kvm_arch_flush_shadow_memslot()
10535          */
10536         if ((old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
10537             !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
10538                 kvm_mmu_zap_collapsible_sptes(kvm, new);
10539
10540         /*
10541          * Enable or disable dirty logging for the slot.
10542          *
10543          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of the old
10544          * slot have been zapped so no dirty logging updates are needed for
10545          * the old slot.
10546          * For KVM_MR_CREATE and KVM_MR_MOVE, once the new slot is visible
10547          * any mappings that might be created in it will consume the
10548          * properties of the new slot and do not need to be updated here.
10549          *
10550          * When PML is enabled, the kvm_x86_ops dirty logging hooks are
10551          * called to enable/disable dirty logging.
10552          *
10553          * When disabling dirty logging with PML enabled, the D-bit is set
10554          * for sptes in the slot in order to prevent unnecessary GPA
10555          * logging in the PML buffer (and potential PML buffer full VMEXIT).
10556          * This guarantees leaving PML enabled for the guest's lifetime
10557          * won't have any additional overhead from PML when the guest is
10558          * running with dirty logging disabled.
10559          *
10560          * When enabling dirty logging, large sptes are write-protected
10561          * so they can be split on first write.  New large sptes cannot
10562          * be created for this slot until the end of the logging.
10563          * See the comments in fast_page_fault().
10564          * For small sptes, nothing is done if the dirty log is in the
10565          * initial-all-set state.  Otherwise, depending on whether pml
10566          * is enabled the D-bit or the W-bit will be cleared.
10567          */
10568         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
10569                 if (kvm_x86_ops.slot_enable_log_dirty) {
10570                         kvm_x86_ops.slot_enable_log_dirty(kvm, new);
10571                 } else {
10572                         int level =
10573                                 kvm_dirty_log_manual_protect_and_init_set(kvm) ?
10574                                 PG_LEVEL_2M : PG_LEVEL_4K;
10575
10576                         /*
10577                          * If we're with initial-all-set, we don't need
10578                          * to write protect any small page because
10579                          * they're reported as dirty already.  However
10580                          * we still need to write-protect huge pages
10581                          * so that the page split can happen lazily on
10582                          * the first write to the huge page.
10583                          */
10584                         kvm_mmu_slot_remove_write_access(kvm, new, level);
10585                 }
10586         } else {
10587                 if (kvm_x86_ops.slot_disable_log_dirty)
10588                         kvm_x86_ops.slot_disable_log_dirty(kvm, new);
10589         }
10590 }
10591
10592 void kvm_arch_commit_memory_region(struct kvm *kvm,
10593                                 const struct kvm_userspace_memory_region *mem,
10594                                 struct kvm_memory_slot *old,
10595                                 const struct kvm_memory_slot *new,
10596                                 enum kvm_mr_change change)
10597 {
10598         if (!kvm->arch.n_requested_mmu_pages)
10599                 kvm_mmu_change_mmu_pages(kvm,
10600                                 kvm_mmu_calculate_default_mmu_pages(kvm));
10601
10602         /*
10603          * FIXME: const-ify all uses of struct kvm_memory_slot.
10604          */
10605         kvm_mmu_slot_apply_flags(kvm, old, (struct kvm_memory_slot *) new, change);
10606
10607         /* Free the arrays associated with the old memslot. */
10608         if (change == KVM_MR_MOVE)
10609                 kvm_arch_free_memslot(kvm, old);
10610 }
10611
10612 void kvm_arch_flush_shadow_all(struct kvm *kvm)
10613 {
10614         kvm_mmu_zap_all(kvm);
10615 }
10616
10617 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
10618                                    struct kvm_memory_slot *slot)
10619 {
10620         kvm_page_track_flush_slot(kvm, slot);
10621 }
10622
10623 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
10624 {
10625         return (is_guest_mode(vcpu) &&
10626                         kvm_x86_ops.guest_apic_has_interrupt &&
10627                         kvm_x86_ops.guest_apic_has_interrupt(vcpu));
10628 }
10629
10630 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
10631 {
10632         if (!list_empty_careful(&vcpu->async_pf.done))
10633                 return true;
10634
10635         if (kvm_apic_has_events(vcpu))
10636                 return true;
10637
10638         if (vcpu->arch.pv.pv_unhalted)
10639                 return true;
10640
10641         if (vcpu->arch.exception.pending)
10642                 return true;
10643
10644         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10645             (vcpu->arch.nmi_pending &&
10646              kvm_x86_ops.nmi_allowed(vcpu, false)))
10647                 return true;
10648
10649         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
10650             (vcpu->arch.smi_pending &&
10651              kvm_x86_ops.smi_allowed(vcpu, false)))
10652                 return true;
10653
10654         if (kvm_arch_interrupt_allowed(vcpu) &&
10655             (kvm_cpu_has_interrupt(vcpu) ||
10656             kvm_guest_apic_has_interrupt(vcpu)))
10657                 return true;
10658
10659         if (kvm_hv_has_stimer_pending(vcpu))
10660                 return true;
10661
10662         if (is_guest_mode(vcpu) &&
10663             kvm_x86_ops.nested_ops->hv_timer_pending &&
10664             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
10665                 return true;
10666
10667         return false;
10668 }
10669
10670 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
10671 {
10672         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
10673 }
10674
10675 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
10676 {
10677         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
10678                 return true;
10679
10680         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
10681                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
10682                  kvm_test_request(KVM_REQ_EVENT, vcpu))
10683                 return true;
10684
10685         if (vcpu->arch.apicv_active && kvm_x86_ops.dy_apicv_has_pending_interrupt(vcpu))
10686                 return true;
10687
10688         return false;
10689 }
10690
10691 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
10692 {
10693         return vcpu->arch.preempted_in_kernel;
10694 }
10695
10696 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
10697 {
10698         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
10699 }
10700
10701 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
10702 {
10703         return kvm_x86_ops.interrupt_allowed(vcpu, false);
10704 }
10705
10706 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
10707 {
10708         if (is_64_bit_mode(vcpu))
10709                 return kvm_rip_read(vcpu);
10710         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
10711                      kvm_rip_read(vcpu));
10712 }
10713 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
10714
10715 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
10716 {
10717         return kvm_get_linear_rip(vcpu) == linear_rip;
10718 }
10719 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
10720
10721 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
10722 {
10723         unsigned long rflags;
10724
10725         rflags = kvm_x86_ops.get_rflags(vcpu);
10726         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10727                 rflags &= ~X86_EFLAGS_TF;
10728         return rflags;
10729 }
10730 EXPORT_SYMBOL_GPL(kvm_get_rflags);
10731
10732 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10733 {
10734         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
10735             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
10736                 rflags |= X86_EFLAGS_TF;
10737         kvm_x86_ops.set_rflags(vcpu, rflags);
10738 }
10739
10740 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
10741 {
10742         __kvm_set_rflags(vcpu, rflags);
10743         kvm_make_request(KVM_REQ_EVENT, vcpu);
10744 }
10745 EXPORT_SYMBOL_GPL(kvm_set_rflags);
10746
10747 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
10748 {
10749         int r;
10750
10751         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
10752               work->wakeup_all)
10753                 return;
10754
10755         r = kvm_mmu_reload(vcpu);
10756         if (unlikely(r))
10757                 return;
10758
10759         if (!vcpu->arch.mmu->direct_map &&
10760               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
10761                 return;
10762
10763         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
10764 }
10765
10766 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
10767 {
10768         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
10769
10770         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
10771 }
10772
10773 static inline u32 kvm_async_pf_next_probe(u32 key)
10774 {
10775         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
10776 }
10777
10778 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10779 {
10780         u32 key = kvm_async_pf_hash_fn(gfn);
10781
10782         while (vcpu->arch.apf.gfns[key] != ~0)
10783                 key = kvm_async_pf_next_probe(key);
10784
10785         vcpu->arch.apf.gfns[key] = gfn;
10786 }
10787
10788 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
10789 {
10790         int i;
10791         u32 key = kvm_async_pf_hash_fn(gfn);
10792
10793         for (i = 0; i < ASYNC_PF_PER_VCPU &&
10794                      (vcpu->arch.apf.gfns[key] != gfn &&
10795                       vcpu->arch.apf.gfns[key] != ~0); i++)
10796                 key = kvm_async_pf_next_probe(key);
10797
10798         return key;
10799 }
10800
10801 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10802 {
10803         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
10804 }
10805
10806 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10807 {
10808         u32 i, j, k;
10809
10810         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
10811
10812         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
10813                 return;
10814
10815         while (true) {
10816                 vcpu->arch.apf.gfns[i] = ~0;
10817                 do {
10818                         j = kvm_async_pf_next_probe(j);
10819                         if (vcpu->arch.apf.gfns[j] == ~0)
10820                                 return;
10821                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10822                         /*
10823                          * k lies cyclically in ]i,j]
10824                          * |    i.k.j |
10825                          * |....j i.k.| or  |.k..j i...|
10826                          */
10827                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10828                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10829                 i = j;
10830         }
10831 }
10832
10833 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
10834 {
10835         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
10836
10837         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
10838                                       sizeof(reason));
10839 }
10840
10841 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
10842 {
10843         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10844
10845         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10846                                              &token, offset, sizeof(token));
10847 }
10848
10849 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
10850 {
10851         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
10852         u32 val;
10853
10854         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
10855                                          &val, offset, sizeof(val)))
10856                 return false;
10857
10858         return !val;
10859 }
10860
10861 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10862 {
10863         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10864                 return false;
10865
10866         if (!kvm_pv_async_pf_enabled(vcpu) ||
10867             (vcpu->arch.apf.send_user_only && kvm_x86_ops.get_cpl(vcpu) == 0))
10868                 return false;
10869
10870         return true;
10871 }
10872
10873 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10874 {
10875         if (unlikely(!lapic_in_kernel(vcpu) ||
10876                      kvm_event_needs_reinjection(vcpu) ||
10877                      vcpu->arch.exception.pending))
10878                 return false;
10879
10880         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10881                 return false;
10882
10883         /*
10884          * If interrupts are off we cannot even use an artificial
10885          * halt state.
10886          */
10887         return kvm_arch_interrupt_allowed(vcpu);
10888 }
10889
10890 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10891                                      struct kvm_async_pf *work)
10892 {
10893         struct x86_exception fault;
10894
10895         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
10896         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10897
10898         if (kvm_can_deliver_async_pf(vcpu) &&
10899             !apf_put_user_notpresent(vcpu)) {
10900                 fault.vector = PF_VECTOR;
10901                 fault.error_code_valid = true;
10902                 fault.error_code = 0;
10903                 fault.nested_page_fault = false;
10904                 fault.address = work->arch.token;
10905                 fault.async_page_fault = true;
10906                 kvm_inject_page_fault(vcpu, &fault);
10907                 return true;
10908         } else {
10909                 /*
10910                  * It is not possible to deliver a paravirtualized asynchronous
10911                  * page fault, but putting the guest in an artificial halt state
10912                  * can be beneficial nevertheless: if an interrupt arrives, we
10913                  * can deliver it timely and perhaps the guest will schedule
10914                  * another process.  When the instruction that triggered a page
10915                  * fault is retried, hopefully the page will be ready in the host.
10916                  */
10917                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10918                 return false;
10919         }
10920 }
10921
10922 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10923                                  struct kvm_async_pf *work)
10924 {
10925         struct kvm_lapic_irq irq = {
10926                 .delivery_mode = APIC_DM_FIXED,
10927                 .vector = vcpu->arch.apf.vec
10928         };
10929
10930         if (work->wakeup_all)
10931                 work->arch.token = ~0; /* broadcast wakeup */
10932         else
10933                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10934         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
10935
10936         if ((work->wakeup_all || work->notpresent_injected) &&
10937             kvm_pv_async_pf_enabled(vcpu) &&
10938             !apf_put_user_ready(vcpu, work->arch.token)) {
10939                 vcpu->arch.apf.pageready_pending = true;
10940                 kvm_apic_set_irq(vcpu, &irq, NULL);
10941         }
10942
10943         vcpu->arch.apf.halted = false;
10944         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10945 }
10946
10947 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
10948 {
10949         kvm_make_request(KVM_REQ_APF_READY, vcpu);
10950         if (!vcpu->arch.apf.pageready_pending)
10951                 kvm_vcpu_kick(vcpu);
10952 }
10953
10954 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
10955 {
10956         if (!kvm_pv_async_pf_enabled(vcpu))
10957                 return true;
10958         else
10959                 return apf_pageready_slot_free(vcpu);
10960 }
10961
10962 void kvm_arch_start_assignment(struct kvm *kvm)
10963 {
10964         atomic_inc(&kvm->arch.assigned_device_count);
10965 }
10966 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10967
10968 void kvm_arch_end_assignment(struct kvm *kvm)
10969 {
10970         atomic_dec(&kvm->arch.assigned_device_count);
10971 }
10972 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10973
10974 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10975 {
10976         return atomic_read(&kvm->arch.assigned_device_count);
10977 }
10978 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10979
10980 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10981 {
10982         atomic_inc(&kvm->arch.noncoherent_dma_count);
10983 }
10984 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10985
10986 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10987 {
10988         atomic_dec(&kvm->arch.noncoherent_dma_count);
10989 }
10990 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10991
10992 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10993 {
10994         return atomic_read(&kvm->arch.noncoherent_dma_count);
10995 }
10996 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10997
10998 bool kvm_arch_has_irq_bypass(void)
10999 {
11000         return true;
11001 }
11002
11003 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
11004                                       struct irq_bypass_producer *prod)
11005 {
11006         struct kvm_kernel_irqfd *irqfd =
11007                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11008         int ret;
11009
11010         irqfd->producer = prod;
11011         kvm_arch_start_assignment(irqfd->kvm);
11012         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm,
11013                                          prod->irq, irqfd->gsi, 1);
11014
11015         if (ret)
11016                 kvm_arch_end_assignment(irqfd->kvm);
11017
11018         return ret;
11019 }
11020
11021 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
11022                                       struct irq_bypass_producer *prod)
11023 {
11024         int ret;
11025         struct kvm_kernel_irqfd *irqfd =
11026                 container_of(cons, struct kvm_kernel_irqfd, consumer);
11027
11028         WARN_ON(irqfd->producer != prod);
11029         irqfd->producer = NULL;
11030
11031         /*
11032          * When producer of consumer is unregistered, we change back to
11033          * remapped mode, so we can re-use the current implementation
11034          * when the irq is masked/disabled or the consumer side (KVM
11035          * int this case doesn't want to receive the interrupts.
11036         */
11037         ret = kvm_x86_ops.update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
11038         if (ret)
11039                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
11040                        " fails: %d\n", irqfd->consumer.token, ret);
11041
11042         kvm_arch_end_assignment(irqfd->kvm);
11043 }
11044
11045 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
11046                                    uint32_t guest_irq, bool set)
11047 {
11048         return kvm_x86_ops.update_pi_irte(kvm, host_irq, guest_irq, set);
11049 }
11050
11051 bool kvm_vector_hashing_enabled(void)
11052 {
11053         return vector_hashing;
11054 }
11055
11056 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
11057 {
11058         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
11059 }
11060 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
11061
11062
11063 int kvm_spec_ctrl_test_value(u64 value)
11064 {
11065         /*
11066          * test that setting IA32_SPEC_CTRL to given value
11067          * is allowed by the host processor
11068          */
11069
11070         u64 saved_value;
11071         unsigned long flags;
11072         int ret = 0;
11073
11074         local_irq_save(flags);
11075
11076         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
11077                 ret = 1;
11078         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
11079                 ret = 1;
11080         else
11081                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
11082
11083         local_irq_restore(flags);
11084
11085         return ret;
11086 }
11087 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
11088
11089 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
11090 {
11091         struct x86_exception fault;
11092         u32 access = error_code &
11093                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
11094
11095         if (!(error_code & PFERR_PRESENT_MASK) ||
11096             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
11097                 /*
11098                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11099                  * tables probably do not match the TLB.  Just proceed
11100                  * with the error code that the processor gave.
11101                  */
11102                 fault.vector = PF_VECTOR;
11103                 fault.error_code_valid = true;
11104                 fault.error_code = error_code;
11105                 fault.nested_page_fault = false;
11106                 fault.address = gva;
11107         }
11108         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
11109 }
11110 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
11111
11112 /*
11113  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11114  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11115  * indicates whether exit to userspace is needed.
11116  */
11117 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
11118                               struct x86_exception *e)
11119 {
11120         if (r == X86EMUL_PROPAGATE_FAULT) {
11121                 kvm_inject_emulated_page_fault(vcpu, e);
11122                 return 1;
11123         }
11124
11125         /*
11126          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11127          * while handling a VMX instruction KVM could've handled the request
11128          * correctly by exiting to userspace and performing I/O but there
11129          * doesn't seem to be a real use-case behind such requests, just return
11130          * KVM_EXIT_INTERNAL_ERROR for now.
11131          */
11132         vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
11133         vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
11134         vcpu->run->internal.ndata = 0;
11135
11136         return 0;
11137 }
11138 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
11139
11140 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
11141 {
11142         bool pcid_enabled;
11143         struct x86_exception e;
11144         unsigned i;
11145         unsigned long roots_to_free = 0;
11146         struct {
11147                 u64 pcid;
11148                 u64 gla;
11149         } operand;
11150         int r;
11151
11152         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
11153         if (r != X86EMUL_CONTINUE)
11154                 return kvm_handle_memory_failure(vcpu, r, &e);
11155
11156         if (operand.pcid >> 12 != 0) {
11157                 kvm_inject_gp(vcpu, 0);
11158                 return 1;
11159         }
11160
11161         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
11162
11163         switch (type) {
11164         case INVPCID_TYPE_INDIV_ADDR:
11165                 if ((!pcid_enabled && (operand.pcid != 0)) ||
11166                     is_noncanonical_address(operand.gla, vcpu)) {
11167                         kvm_inject_gp(vcpu, 0);
11168                         return 1;
11169                 }
11170                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
11171                 return kvm_skip_emulated_instruction(vcpu);
11172
11173         case INVPCID_TYPE_SINGLE_CTXT:
11174                 if (!pcid_enabled && (operand.pcid != 0)) {
11175                         kvm_inject_gp(vcpu, 0);
11176                         return 1;
11177                 }
11178
11179                 if (kvm_get_active_pcid(vcpu) == operand.pcid) {
11180                         kvm_mmu_sync_roots(vcpu);
11181                         kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
11182                 }
11183
11184                 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
11185                         if (kvm_get_pcid(vcpu, vcpu->arch.mmu->prev_roots[i].pgd)
11186                             == operand.pcid)
11187                                 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
11188
11189                 kvm_mmu_free_roots(vcpu, vcpu->arch.mmu, roots_to_free);
11190                 /*
11191                  * If neither the current cr3 nor any of the prev_roots use the
11192                  * given PCID, then nothing needs to be done here because a
11193                  * resync will happen anyway before switching to any other CR3.
11194                  */
11195
11196                 return kvm_skip_emulated_instruction(vcpu);
11197
11198         case INVPCID_TYPE_ALL_NON_GLOBAL:
11199                 /*
11200                  * Currently, KVM doesn't mark global entries in the shadow
11201                  * page tables, so a non-global flush just degenerates to a
11202                  * global flush. If needed, we could optimize this later by
11203                  * keeping track of global entries in shadow page tables.
11204                  */
11205
11206                 fallthrough;
11207         case INVPCID_TYPE_ALL_INCL_GLOBAL:
11208                 kvm_mmu_unload(vcpu);
11209                 return kvm_skip_emulated_instruction(vcpu);
11210
11211         default:
11212                 BUG(); /* We have already checked above that type <= 3 */
11213         }
11214 }
11215 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
11216
11217 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
11218 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
11219 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
11220 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
11221 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
11222 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
11223 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
11224 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
11225 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
11226 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
11227 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
11228 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
11229 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
11230 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
11231 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
11232 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
11233 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
11234 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
11235 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
11236 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
11237 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
11238 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);