2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <trace/events/kvm.h>
42 #undef TRACE_INCLUDE_FILE
43 #define CREATE_TRACE_POINTS
46 #include <asm/uaccess.h>
52 #define MAX_IO_MSRS 256
53 #define CR0_RESERVED_BITS \
54 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
55 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
56 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
57 #define CR4_RESERVED_BITS \
58 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
59 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
60 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
61 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
63 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
65 #define KVM_MAX_MCE_BANKS 32
66 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
69 * - enable syscall per default because its emulated by KVM
70 * - enable LME and LMA per default on 64 bit KVM
73 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
75 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
78 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
79 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
81 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
82 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
83 struct kvm_cpuid_entry2 __user *entries);
85 struct kvm_x86_ops *kvm_x86_ops;
86 EXPORT_SYMBOL_GPL(kvm_x86_ops);
89 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
91 #define KVM_NR_SHARED_MSRS 16
93 struct kvm_shared_msrs_global {
95 struct kvm_shared_msr {
98 } msrs[KVM_NR_SHARED_MSRS];
101 struct kvm_shared_msrs {
102 struct user_return_notifier urn;
104 u64 current_value[KVM_NR_SHARED_MSRS];
107 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
108 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
110 struct kvm_stats_debugfs_item debugfs_entries[] = {
111 { "pf_fixed", VCPU_STAT(pf_fixed) },
112 { "pf_guest", VCPU_STAT(pf_guest) },
113 { "tlb_flush", VCPU_STAT(tlb_flush) },
114 { "invlpg", VCPU_STAT(invlpg) },
115 { "exits", VCPU_STAT(exits) },
116 { "io_exits", VCPU_STAT(io_exits) },
117 { "mmio_exits", VCPU_STAT(mmio_exits) },
118 { "signal_exits", VCPU_STAT(signal_exits) },
119 { "irq_window", VCPU_STAT(irq_window_exits) },
120 { "nmi_window", VCPU_STAT(nmi_window_exits) },
121 { "halt_exits", VCPU_STAT(halt_exits) },
122 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
123 { "hypercalls", VCPU_STAT(hypercalls) },
124 { "request_irq", VCPU_STAT(request_irq_exits) },
125 { "irq_exits", VCPU_STAT(irq_exits) },
126 { "host_state_reload", VCPU_STAT(host_state_reload) },
127 { "efer_reload", VCPU_STAT(efer_reload) },
128 { "fpu_reload", VCPU_STAT(fpu_reload) },
129 { "insn_emulation", VCPU_STAT(insn_emulation) },
130 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
131 { "irq_injections", VCPU_STAT(irq_injections) },
132 { "nmi_injections", VCPU_STAT(nmi_injections) },
133 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
134 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
135 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
136 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
137 { "mmu_flooded", VM_STAT(mmu_flooded) },
138 { "mmu_recycled", VM_STAT(mmu_recycled) },
139 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
140 { "mmu_unsync", VM_STAT(mmu_unsync) },
141 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
142 { "largepages", VM_STAT(lpages) },
146 static void kvm_on_user_return(struct user_return_notifier *urn)
149 struct kvm_shared_msr *global;
150 struct kvm_shared_msrs *locals
151 = container_of(urn, struct kvm_shared_msrs, urn);
153 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
154 global = &shared_msrs_global.msrs[slot];
155 if (global->value != locals->current_value[slot]) {
156 wrmsrl(global->msr, global->value);
157 locals->current_value[slot] = global->value;
160 locals->registered = false;
161 user_return_notifier_unregister(urn);
164 void kvm_define_shared_msr(unsigned slot, u32 msr)
169 if (slot >= shared_msrs_global.nr)
170 shared_msrs_global.nr = slot + 1;
171 shared_msrs_global.msrs[slot].msr = msr;
172 rdmsrl_safe(msr, &value);
173 shared_msrs_global.msrs[slot].value = value;
174 for_each_online_cpu(cpu)
175 per_cpu(shared_msrs, cpu).current_value[slot] = value;
177 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
179 static void kvm_shared_msr_cpu_online(void)
182 struct kvm_shared_msrs *locals = &__get_cpu_var(shared_msrs);
184 for (i = 0; i < shared_msrs_global.nr; ++i)
185 locals->current_value[i] = shared_msrs_global.msrs[i].value;
188 void kvm_set_shared_msr(unsigned slot, u64 value)
190 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
192 if (value == smsr->current_value[slot])
194 smsr->current_value[slot] = value;
195 wrmsrl(shared_msrs_global.msrs[slot].msr, value);
196 if (!smsr->registered) {
197 smsr->urn.on_user_return = kvm_on_user_return;
198 user_return_notifier_register(&smsr->urn);
199 smsr->registered = true;
202 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
204 unsigned long segment_base(u16 selector)
206 struct descriptor_table gdt;
207 struct desc_struct *d;
208 unsigned long table_base;
215 table_base = gdt.base;
217 if (selector & 4) { /* from ldt */
218 u16 ldt_selector = kvm_read_ldt();
220 table_base = segment_base(ldt_selector);
222 d = (struct desc_struct *)(table_base + (selector & ~7));
223 v = get_desc_base(d);
225 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
226 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
230 EXPORT_SYMBOL_GPL(segment_base);
232 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
234 if (irqchip_in_kernel(vcpu->kvm))
235 return vcpu->arch.apic_base;
237 return vcpu->arch.apic_base;
239 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
241 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
243 /* TODO: reserve bits check */
244 if (irqchip_in_kernel(vcpu->kvm))
245 kvm_lapic_set_base(vcpu, data);
247 vcpu->arch.apic_base = data;
249 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
251 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
253 WARN_ON(vcpu->arch.exception.pending);
254 vcpu->arch.exception.pending = true;
255 vcpu->arch.exception.has_error_code = false;
256 vcpu->arch.exception.nr = nr;
258 EXPORT_SYMBOL_GPL(kvm_queue_exception);
260 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
263 ++vcpu->stat.pf_guest;
265 if (vcpu->arch.exception.pending) {
266 switch(vcpu->arch.exception.nr) {
268 /* triple fault -> shutdown */
269 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
272 vcpu->arch.exception.nr = DF_VECTOR;
273 vcpu->arch.exception.error_code = 0;
276 /* replace previous exception with a new one in a hope
277 that instruction re-execution will regenerate lost
279 vcpu->arch.exception.pending = false;
283 vcpu->arch.cr2 = addr;
284 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
287 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
289 vcpu->arch.nmi_pending = 1;
291 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
293 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
295 WARN_ON(vcpu->arch.exception.pending);
296 vcpu->arch.exception.pending = true;
297 vcpu->arch.exception.has_error_code = true;
298 vcpu->arch.exception.nr = nr;
299 vcpu->arch.exception.error_code = error_code;
301 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
304 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
305 * a #GP and return false.
307 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
309 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
311 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
314 EXPORT_SYMBOL_GPL(kvm_require_cpl);
317 * Load the pae pdptrs. Return true is they are all valid.
319 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
321 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
322 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
325 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
327 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
328 offset * sizeof(u64), sizeof(pdpte));
333 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
334 if (is_present_gpte(pdpte[i]) &&
335 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
342 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
343 __set_bit(VCPU_EXREG_PDPTR,
344 (unsigned long *)&vcpu->arch.regs_avail);
345 __set_bit(VCPU_EXREG_PDPTR,
346 (unsigned long *)&vcpu->arch.regs_dirty);
351 EXPORT_SYMBOL_GPL(load_pdptrs);
353 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
355 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
359 if (is_long_mode(vcpu) || !is_pae(vcpu))
362 if (!test_bit(VCPU_EXREG_PDPTR,
363 (unsigned long *)&vcpu->arch.regs_avail))
366 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
369 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
375 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
377 if (cr0 & CR0_RESERVED_BITS) {
378 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
379 cr0, vcpu->arch.cr0);
380 kvm_inject_gp(vcpu, 0);
384 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
385 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
386 kvm_inject_gp(vcpu, 0);
390 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
391 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
392 "and a clear PE flag\n");
393 kvm_inject_gp(vcpu, 0);
397 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
399 if ((vcpu->arch.shadow_efer & EFER_LME)) {
403 printk(KERN_DEBUG "set_cr0: #GP, start paging "
404 "in long mode while PAE is disabled\n");
405 kvm_inject_gp(vcpu, 0);
408 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
410 printk(KERN_DEBUG "set_cr0: #GP, start paging "
411 "in long mode while CS.L == 1\n");
412 kvm_inject_gp(vcpu, 0);
418 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
419 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
421 kvm_inject_gp(vcpu, 0);
427 kvm_x86_ops->set_cr0(vcpu, cr0);
428 vcpu->arch.cr0 = cr0;
430 kvm_mmu_reset_context(vcpu);
433 EXPORT_SYMBOL_GPL(kvm_set_cr0);
435 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
437 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
439 EXPORT_SYMBOL_GPL(kvm_lmsw);
441 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
443 unsigned long old_cr4 = vcpu->arch.cr4;
444 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
446 if (cr4 & CR4_RESERVED_BITS) {
447 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
448 kvm_inject_gp(vcpu, 0);
452 if (is_long_mode(vcpu)) {
453 if (!(cr4 & X86_CR4_PAE)) {
454 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
456 kvm_inject_gp(vcpu, 0);
459 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
460 && ((cr4 ^ old_cr4) & pdptr_bits)
461 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
462 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
463 kvm_inject_gp(vcpu, 0);
467 if (cr4 & X86_CR4_VMXE) {
468 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
469 kvm_inject_gp(vcpu, 0);
472 kvm_x86_ops->set_cr4(vcpu, cr4);
473 vcpu->arch.cr4 = cr4;
474 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
475 kvm_mmu_reset_context(vcpu);
477 EXPORT_SYMBOL_GPL(kvm_set_cr4);
479 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
481 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
482 kvm_mmu_sync_roots(vcpu);
483 kvm_mmu_flush_tlb(vcpu);
487 if (is_long_mode(vcpu)) {
488 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
489 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
490 kvm_inject_gp(vcpu, 0);
495 if (cr3 & CR3_PAE_RESERVED_BITS) {
497 "set_cr3: #GP, reserved bits\n");
498 kvm_inject_gp(vcpu, 0);
501 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
502 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
504 kvm_inject_gp(vcpu, 0);
509 * We don't check reserved bits in nonpae mode, because
510 * this isn't enforced, and VMware depends on this.
515 * Does the new cr3 value map to physical memory? (Note, we
516 * catch an invalid cr3 even in real-mode, because it would
517 * cause trouble later on when we turn on paging anyway.)
519 * A real CPU would silently accept an invalid cr3 and would
520 * attempt to use it - with largely undefined (and often hard
521 * to debug) behavior on the guest side.
523 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
524 kvm_inject_gp(vcpu, 0);
526 vcpu->arch.cr3 = cr3;
527 vcpu->arch.mmu.new_cr3(vcpu);
530 EXPORT_SYMBOL_GPL(kvm_set_cr3);
532 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
534 if (cr8 & CR8_RESERVED_BITS) {
535 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
536 kvm_inject_gp(vcpu, 0);
539 if (irqchip_in_kernel(vcpu->kvm))
540 kvm_lapic_set_tpr(vcpu, cr8);
542 vcpu->arch.cr8 = cr8;
544 EXPORT_SYMBOL_GPL(kvm_set_cr8);
546 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
548 if (irqchip_in_kernel(vcpu->kvm))
549 return kvm_lapic_get_cr8(vcpu);
551 return vcpu->arch.cr8;
553 EXPORT_SYMBOL_GPL(kvm_get_cr8);
555 static inline u32 bit(int bitno)
557 return 1 << (bitno & 31);
561 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
562 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
564 * This list is modified at module load time to reflect the
565 * capabilities of the host cpu. This capabilities test skips MSRs that are
566 * kvm-specific. Those are put in the beginning of the list.
569 #define KVM_SAVE_MSRS_BEGIN 2
570 static u32 msrs_to_save[] = {
571 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
572 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
575 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
577 MSR_IA32_TSC, MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
580 static unsigned num_msrs_to_save;
582 static u32 emulated_msrs[] = {
583 MSR_IA32_MISC_ENABLE,
586 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
588 if (efer & efer_reserved_bits) {
589 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
591 kvm_inject_gp(vcpu, 0);
596 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
597 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
598 kvm_inject_gp(vcpu, 0);
602 if (efer & EFER_FFXSR) {
603 struct kvm_cpuid_entry2 *feat;
605 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
606 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
607 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
608 kvm_inject_gp(vcpu, 0);
613 if (efer & EFER_SVME) {
614 struct kvm_cpuid_entry2 *feat;
616 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
617 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
618 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
619 kvm_inject_gp(vcpu, 0);
624 kvm_x86_ops->set_efer(vcpu, efer);
627 efer |= vcpu->arch.shadow_efer & EFER_LMA;
629 vcpu->arch.shadow_efer = efer;
631 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
632 kvm_mmu_reset_context(vcpu);
635 void kvm_enable_efer_bits(u64 mask)
637 efer_reserved_bits &= ~mask;
639 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
643 * Writes msr value into into the appropriate "register".
644 * Returns 0 on success, non-0 otherwise.
645 * Assumes vcpu_load() was already called.
647 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
649 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
653 * Adapt set_msr() to msr_io()'s calling convention
655 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
657 return kvm_set_msr(vcpu, index, *data);
660 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
663 struct pvclock_wall_clock wc;
664 struct timespec now, sys, boot;
671 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
674 * The guest calculates current wall clock time by adding
675 * system time (updated by kvm_write_guest_time below) to the
676 * wall clock specified here. guest system time equals host
677 * system time for us, thus we must fill in host boot time here.
679 now = current_kernel_time();
681 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
683 wc.sec = boot.tv_sec;
684 wc.nsec = boot.tv_nsec;
685 wc.version = version;
687 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
690 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
693 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
695 uint32_t quotient, remainder;
697 /* Don't try to replace with do_div(), this one calculates
698 * "(dividend << 32) / divisor" */
700 : "=a" (quotient), "=d" (remainder)
701 : "0" (0), "1" (dividend), "r" (divisor) );
705 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
707 uint64_t nsecs = 1000000000LL;
712 tps64 = tsc_khz * 1000LL;
713 while (tps64 > nsecs*2) {
718 tps32 = (uint32_t)tps64;
719 while (tps32 <= (uint32_t)nsecs) {
724 hv_clock->tsc_shift = shift;
725 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
727 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
728 __func__, tsc_khz, hv_clock->tsc_shift,
729 hv_clock->tsc_to_system_mul);
732 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
734 static void kvm_write_guest_time(struct kvm_vcpu *v)
738 struct kvm_vcpu_arch *vcpu = &v->arch;
740 unsigned long this_tsc_khz;
742 if ((!vcpu->time_page))
745 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
746 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
747 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
748 vcpu->hv_clock_tsc_khz = this_tsc_khz;
750 put_cpu_var(cpu_tsc_khz);
752 /* Keep irq disabled to prevent changes to the clock */
753 local_irq_save(flags);
754 kvm_get_msr(v, MSR_IA32_TSC, &vcpu->hv_clock.tsc_timestamp);
756 local_irq_restore(flags);
758 /* With all the info we got, fill in the values */
760 vcpu->hv_clock.system_time = ts.tv_nsec +
761 (NSEC_PER_SEC * (u64)ts.tv_sec) + v->kvm->arch.kvmclock_offset;
764 * The interface expects us to write an even number signaling that the
765 * update is finished. Since the guest won't see the intermediate
766 * state, we just increase by 2 at the end.
768 vcpu->hv_clock.version += 2;
770 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
772 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
773 sizeof(vcpu->hv_clock));
775 kunmap_atomic(shared_kaddr, KM_USER0);
777 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
780 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
782 struct kvm_vcpu_arch *vcpu = &v->arch;
784 if (!vcpu->time_page)
786 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
790 static bool msr_mtrr_valid(unsigned msr)
793 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
794 case MSR_MTRRfix64K_00000:
795 case MSR_MTRRfix16K_80000:
796 case MSR_MTRRfix16K_A0000:
797 case MSR_MTRRfix4K_C0000:
798 case MSR_MTRRfix4K_C8000:
799 case MSR_MTRRfix4K_D0000:
800 case MSR_MTRRfix4K_D8000:
801 case MSR_MTRRfix4K_E0000:
802 case MSR_MTRRfix4K_E8000:
803 case MSR_MTRRfix4K_F0000:
804 case MSR_MTRRfix4K_F8000:
805 case MSR_MTRRdefType:
806 case MSR_IA32_CR_PAT:
814 static bool valid_pat_type(unsigned t)
816 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
819 static bool valid_mtrr_type(unsigned t)
821 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
824 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
828 if (!msr_mtrr_valid(msr))
831 if (msr == MSR_IA32_CR_PAT) {
832 for (i = 0; i < 8; i++)
833 if (!valid_pat_type((data >> (i * 8)) & 0xff))
836 } else if (msr == MSR_MTRRdefType) {
839 return valid_mtrr_type(data & 0xff);
840 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
841 for (i = 0; i < 8 ; i++)
842 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
848 return valid_mtrr_type(data & 0xff);
851 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
853 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
855 if (!mtrr_valid(vcpu, msr, data))
858 if (msr == MSR_MTRRdefType) {
859 vcpu->arch.mtrr_state.def_type = data;
860 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
861 } else if (msr == MSR_MTRRfix64K_00000)
863 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
864 p[1 + msr - MSR_MTRRfix16K_80000] = data;
865 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
866 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
867 else if (msr == MSR_IA32_CR_PAT)
868 vcpu->arch.pat = data;
869 else { /* Variable MTRRs */
870 int idx, is_mtrr_mask;
873 idx = (msr - 0x200) / 2;
874 is_mtrr_mask = msr - 0x200 - 2 * idx;
877 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
880 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
884 kvm_mmu_reset_context(vcpu);
888 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
890 u64 mcg_cap = vcpu->arch.mcg_cap;
891 unsigned bank_num = mcg_cap & 0xff;
894 case MSR_IA32_MCG_STATUS:
895 vcpu->arch.mcg_status = data;
897 case MSR_IA32_MCG_CTL:
898 if (!(mcg_cap & MCG_CTL_P))
900 if (data != 0 && data != ~(u64)0)
902 vcpu->arch.mcg_ctl = data;
905 if (msr >= MSR_IA32_MC0_CTL &&
906 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
907 u32 offset = msr - MSR_IA32_MC0_CTL;
908 /* only 0 or all 1s can be written to IA32_MCi_CTL */
909 if ((offset & 0x3) == 0 &&
910 data != 0 && data != ~(u64)0)
912 vcpu->arch.mce_banks[offset] = data;
920 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
922 struct kvm *kvm = vcpu->kvm;
923 int lm = is_long_mode(vcpu);
924 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
925 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
926 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
927 : kvm->arch.xen_hvm_config.blob_size_32;
928 u32 page_num = data & ~PAGE_MASK;
929 u64 page_addr = data & PAGE_MASK;
934 if (page_num >= blob_size)
937 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
941 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
943 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
952 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
956 set_efer(vcpu, data);
959 data &= ~(u64)0x40; /* ignore flush filter disable */
961 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
966 case MSR_FAM10H_MMIO_CONF_BASE:
968 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
973 case MSR_AMD64_NB_CFG:
975 case MSR_IA32_DEBUGCTLMSR:
977 /* We support the non-activated case already */
979 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
980 /* Values other than LBR and BTF are vendor-specific,
981 thus reserved and should throw a #GP */
984 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
987 case MSR_IA32_UCODE_REV:
988 case MSR_IA32_UCODE_WRITE:
989 case MSR_VM_HSAVE_PA:
990 case MSR_AMD64_PATCH_LOADER:
992 case 0x200 ... 0x2ff:
993 return set_msr_mtrr(vcpu, msr, data);
994 case MSR_IA32_APICBASE:
995 kvm_set_apic_base(vcpu, data);
997 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
998 return kvm_x2apic_msr_write(vcpu, msr, data);
999 case MSR_IA32_MISC_ENABLE:
1000 vcpu->arch.ia32_misc_enable_msr = data;
1002 case MSR_KVM_WALL_CLOCK:
1003 vcpu->kvm->arch.wall_clock = data;
1004 kvm_write_wall_clock(vcpu->kvm, data);
1006 case MSR_KVM_SYSTEM_TIME: {
1007 if (vcpu->arch.time_page) {
1008 kvm_release_page_dirty(vcpu->arch.time_page);
1009 vcpu->arch.time_page = NULL;
1012 vcpu->arch.time = data;
1014 /* we verify if the enable bit is set... */
1018 /* ...but clean it before doing the actual write */
1019 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1021 vcpu->arch.time_page =
1022 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1024 if (is_error_page(vcpu->arch.time_page)) {
1025 kvm_release_page_clean(vcpu->arch.time_page);
1026 vcpu->arch.time_page = NULL;
1029 kvm_request_guest_time_update(vcpu);
1032 case MSR_IA32_MCG_CTL:
1033 case MSR_IA32_MCG_STATUS:
1034 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1035 return set_msr_mce(vcpu, msr, data);
1037 /* Performance counters are not protected by a CPUID bit,
1038 * so we should check all of them in the generic path for the sake of
1039 * cross vendor migration.
1040 * Writing a zero into the event select MSRs disables them,
1041 * which we perfectly emulate ;-). Any other value should be at least
1042 * reported, some guests depend on them.
1044 case MSR_P6_EVNTSEL0:
1045 case MSR_P6_EVNTSEL1:
1046 case MSR_K7_EVNTSEL0:
1047 case MSR_K7_EVNTSEL1:
1048 case MSR_K7_EVNTSEL2:
1049 case MSR_K7_EVNTSEL3:
1051 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1052 "0x%x data 0x%llx\n", msr, data);
1054 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1055 * so we ignore writes to make it happy.
1057 case MSR_P6_PERFCTR0:
1058 case MSR_P6_PERFCTR1:
1059 case MSR_K7_PERFCTR0:
1060 case MSR_K7_PERFCTR1:
1061 case MSR_K7_PERFCTR2:
1062 case MSR_K7_PERFCTR3:
1063 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1064 "0x%x data 0x%llx\n", msr, data);
1067 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1068 return xen_hvm_config(vcpu, data);
1070 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1074 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1081 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1085 * Reads an msr value (of 'msr_index') into 'pdata'.
1086 * Returns 0 on success, non-0 otherwise.
1087 * Assumes vcpu_load() was already called.
1089 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1091 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1094 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1096 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1098 if (!msr_mtrr_valid(msr))
1101 if (msr == MSR_MTRRdefType)
1102 *pdata = vcpu->arch.mtrr_state.def_type +
1103 (vcpu->arch.mtrr_state.enabled << 10);
1104 else if (msr == MSR_MTRRfix64K_00000)
1106 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1107 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1108 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1109 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1110 else if (msr == MSR_IA32_CR_PAT)
1111 *pdata = vcpu->arch.pat;
1112 else { /* Variable MTRRs */
1113 int idx, is_mtrr_mask;
1116 idx = (msr - 0x200) / 2;
1117 is_mtrr_mask = msr - 0x200 - 2 * idx;
1120 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1123 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1130 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1133 u64 mcg_cap = vcpu->arch.mcg_cap;
1134 unsigned bank_num = mcg_cap & 0xff;
1137 case MSR_IA32_P5_MC_ADDR:
1138 case MSR_IA32_P5_MC_TYPE:
1141 case MSR_IA32_MCG_CAP:
1142 data = vcpu->arch.mcg_cap;
1144 case MSR_IA32_MCG_CTL:
1145 if (!(mcg_cap & MCG_CTL_P))
1147 data = vcpu->arch.mcg_ctl;
1149 case MSR_IA32_MCG_STATUS:
1150 data = vcpu->arch.mcg_status;
1153 if (msr >= MSR_IA32_MC0_CTL &&
1154 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1155 u32 offset = msr - MSR_IA32_MC0_CTL;
1156 data = vcpu->arch.mce_banks[offset];
1165 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1170 case MSR_IA32_PLATFORM_ID:
1171 case MSR_IA32_UCODE_REV:
1172 case MSR_IA32_EBL_CR_POWERON:
1173 case MSR_IA32_DEBUGCTLMSR:
1174 case MSR_IA32_LASTBRANCHFROMIP:
1175 case MSR_IA32_LASTBRANCHTOIP:
1176 case MSR_IA32_LASTINTFROMIP:
1177 case MSR_IA32_LASTINTTOIP:
1180 case MSR_VM_HSAVE_PA:
1181 case MSR_P6_PERFCTR0:
1182 case MSR_P6_PERFCTR1:
1183 case MSR_P6_EVNTSEL0:
1184 case MSR_P6_EVNTSEL1:
1185 case MSR_K7_EVNTSEL0:
1186 case MSR_K7_PERFCTR0:
1187 case MSR_K8_INT_PENDING_MSG:
1188 case MSR_AMD64_NB_CFG:
1189 case MSR_FAM10H_MMIO_CONF_BASE:
1193 data = 0x500 | KVM_NR_VAR_MTRR;
1195 case 0x200 ... 0x2ff:
1196 return get_msr_mtrr(vcpu, msr, pdata);
1197 case 0xcd: /* fsb frequency */
1200 case MSR_IA32_APICBASE:
1201 data = kvm_get_apic_base(vcpu);
1203 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1204 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1206 case MSR_IA32_MISC_ENABLE:
1207 data = vcpu->arch.ia32_misc_enable_msr;
1209 case MSR_IA32_PERF_STATUS:
1210 /* TSC increment by tick */
1212 /* CPU multiplier */
1213 data |= (((uint64_t)4ULL) << 40);
1216 data = vcpu->arch.shadow_efer;
1218 case MSR_KVM_WALL_CLOCK:
1219 data = vcpu->kvm->arch.wall_clock;
1221 case MSR_KVM_SYSTEM_TIME:
1222 data = vcpu->arch.time;
1224 case MSR_IA32_P5_MC_ADDR:
1225 case MSR_IA32_P5_MC_TYPE:
1226 case MSR_IA32_MCG_CAP:
1227 case MSR_IA32_MCG_CTL:
1228 case MSR_IA32_MCG_STATUS:
1229 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1230 return get_msr_mce(vcpu, msr, pdata);
1233 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1236 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1244 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1247 * Read or write a bunch of msrs. All parameters are kernel addresses.
1249 * @return number of msrs set successfully.
1251 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1252 struct kvm_msr_entry *entries,
1253 int (*do_msr)(struct kvm_vcpu *vcpu,
1254 unsigned index, u64 *data))
1260 down_read(&vcpu->kvm->slots_lock);
1261 for (i = 0; i < msrs->nmsrs; ++i)
1262 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1264 up_read(&vcpu->kvm->slots_lock);
1272 * Read or write a bunch of msrs. Parameters are user addresses.
1274 * @return number of msrs set successfully.
1276 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1277 int (*do_msr)(struct kvm_vcpu *vcpu,
1278 unsigned index, u64 *data),
1281 struct kvm_msrs msrs;
1282 struct kvm_msr_entry *entries;
1287 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1291 if (msrs.nmsrs >= MAX_IO_MSRS)
1295 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1296 entries = vmalloc(size);
1301 if (copy_from_user(entries, user_msrs->entries, size))
1304 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1309 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1320 int kvm_dev_ioctl_check_extension(long ext)
1325 case KVM_CAP_IRQCHIP:
1327 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1328 case KVM_CAP_SET_TSS_ADDR:
1329 case KVM_CAP_EXT_CPUID:
1330 case KVM_CAP_CLOCKSOURCE:
1332 case KVM_CAP_NOP_IO_DELAY:
1333 case KVM_CAP_MP_STATE:
1334 case KVM_CAP_SYNC_MMU:
1335 case KVM_CAP_REINJECT_CONTROL:
1336 case KVM_CAP_IRQ_INJECT_STATUS:
1337 case KVM_CAP_ASSIGN_DEV_IRQ:
1339 case KVM_CAP_IOEVENTFD:
1341 case KVM_CAP_PIT_STATE2:
1342 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1343 case KVM_CAP_XEN_HVM:
1344 case KVM_CAP_ADJUST_CLOCK:
1345 case KVM_CAP_VCPU_EVENTS:
1348 case KVM_CAP_COALESCED_MMIO:
1349 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1352 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1354 case KVM_CAP_NR_VCPUS:
1357 case KVM_CAP_NR_MEMSLOTS:
1358 r = KVM_MEMORY_SLOTS;
1360 case KVM_CAP_PV_MMU: /* obsolete */
1367 r = KVM_MAX_MCE_BANKS;
1377 long kvm_arch_dev_ioctl(struct file *filp,
1378 unsigned int ioctl, unsigned long arg)
1380 void __user *argp = (void __user *)arg;
1384 case KVM_GET_MSR_INDEX_LIST: {
1385 struct kvm_msr_list __user *user_msr_list = argp;
1386 struct kvm_msr_list msr_list;
1390 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1393 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1394 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1397 if (n < msr_list.nmsrs)
1400 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1401 num_msrs_to_save * sizeof(u32)))
1403 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1405 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1410 case KVM_GET_SUPPORTED_CPUID: {
1411 struct kvm_cpuid2 __user *cpuid_arg = argp;
1412 struct kvm_cpuid2 cpuid;
1415 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1417 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1418 cpuid_arg->entries);
1423 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1428 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
1431 mce_cap = KVM_MCE_CAP_SUPPORTED;
1433 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
1445 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1447 kvm_x86_ops->vcpu_load(vcpu, cpu);
1448 if (unlikely(per_cpu(cpu_tsc_khz, cpu) == 0)) {
1449 unsigned long khz = cpufreq_quick_get(cpu);
1452 per_cpu(cpu_tsc_khz, cpu) = khz;
1454 kvm_request_guest_time_update(vcpu);
1457 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1459 kvm_x86_ops->vcpu_put(vcpu);
1460 kvm_put_guest_fpu(vcpu);
1463 static int is_efer_nx(void)
1465 unsigned long long efer = 0;
1467 rdmsrl_safe(MSR_EFER, &efer);
1468 return efer & EFER_NX;
1471 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1474 struct kvm_cpuid_entry2 *e, *entry;
1477 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1478 e = &vcpu->arch.cpuid_entries[i];
1479 if (e->function == 0x80000001) {
1484 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1485 entry->edx &= ~(1 << 20);
1486 printk(KERN_INFO "kvm: guest NX capability removed\n");
1490 /* when an old userspace process fills a new kernel module */
1491 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1492 struct kvm_cpuid *cpuid,
1493 struct kvm_cpuid_entry __user *entries)
1496 struct kvm_cpuid_entry *cpuid_entries;
1499 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1502 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1506 if (copy_from_user(cpuid_entries, entries,
1507 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1509 for (i = 0; i < cpuid->nent; i++) {
1510 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1511 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1512 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1513 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1514 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1515 vcpu->arch.cpuid_entries[i].index = 0;
1516 vcpu->arch.cpuid_entries[i].flags = 0;
1517 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1518 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1519 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1521 vcpu->arch.cpuid_nent = cpuid->nent;
1522 cpuid_fix_nx_cap(vcpu);
1524 kvm_apic_set_version(vcpu);
1527 vfree(cpuid_entries);
1532 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1533 struct kvm_cpuid2 *cpuid,
1534 struct kvm_cpuid_entry2 __user *entries)
1539 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1542 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1543 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1545 vcpu->arch.cpuid_nent = cpuid->nent;
1546 kvm_apic_set_version(vcpu);
1553 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1554 struct kvm_cpuid2 *cpuid,
1555 struct kvm_cpuid_entry2 __user *entries)
1560 if (cpuid->nent < vcpu->arch.cpuid_nent)
1563 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1564 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1569 cpuid->nent = vcpu->arch.cpuid_nent;
1573 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1576 entry->function = function;
1577 entry->index = index;
1578 cpuid_count(entry->function, entry->index,
1579 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1583 #define F(x) bit(X86_FEATURE_##x)
1585 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1586 u32 index, int *nent, int maxnent)
1588 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1589 unsigned f_gbpages = kvm_x86_ops->gb_page_enable() ? F(GBPAGES) : 0;
1590 #ifdef CONFIG_X86_64
1591 unsigned f_lm = F(LM);
1597 const u32 kvm_supported_word0_x86_features =
1598 F(FPU) | F(VME) | F(DE) | F(PSE) |
1599 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1600 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1601 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1602 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1603 0 /* Reserved, DS, ACPI */ | F(MMX) |
1604 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1605 0 /* HTT, TM, Reserved, PBE */;
1606 /* cpuid 0x80000001.edx */
1607 const u32 kvm_supported_word1_x86_features =
1608 F(FPU) | F(VME) | F(DE) | F(PSE) |
1609 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1610 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1611 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1612 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1613 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1614 F(FXSR) | F(FXSR_OPT) | f_gbpages | 0 /* RDTSCP */ |
1615 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1617 const u32 kvm_supported_word4_x86_features =
1618 F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
1619 0 /* DS-CPL, VMX, SMX, EST */ |
1620 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1621 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
1622 0 /* Reserved, DCA */ | F(XMM4_1) |
1623 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
1624 0 /* Reserved, XSAVE, OSXSAVE */;
1625 /* cpuid 0x80000001.ecx */
1626 const u32 kvm_supported_word6_x86_features =
1627 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1628 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1629 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1630 0 /* SKINIT */ | 0 /* WDT */;
1632 /* all calls to cpuid_count() should be made on the same cpu */
1634 do_cpuid_1_ent(entry, function, index);
1639 entry->eax = min(entry->eax, (u32)0xb);
1642 entry->edx &= kvm_supported_word0_x86_features;
1643 entry->ecx &= kvm_supported_word4_x86_features;
1644 /* we support x2apic emulation even if host does not support
1645 * it since we emulate x2apic in software */
1646 entry->ecx |= F(X2APIC);
1648 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1649 * may return different values. This forces us to get_cpu() before
1650 * issuing the first command, and also to emulate this annoying behavior
1651 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1653 int t, times = entry->eax & 0xff;
1655 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1656 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1657 for (t = 1; t < times && *nent < maxnent; ++t) {
1658 do_cpuid_1_ent(&entry[t], function, 0);
1659 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1664 /* function 4 and 0xb have additional index. */
1668 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1669 /* read more entries until cache_type is zero */
1670 for (i = 1; *nent < maxnent; ++i) {
1671 cache_type = entry[i - 1].eax & 0x1f;
1674 do_cpuid_1_ent(&entry[i], function, i);
1676 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1684 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1685 /* read more entries until level_type is zero */
1686 for (i = 1; *nent < maxnent; ++i) {
1687 level_type = entry[i - 1].ecx & 0xff00;
1690 do_cpuid_1_ent(&entry[i], function, i);
1692 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1698 entry->eax = min(entry->eax, 0x8000001a);
1701 entry->edx &= kvm_supported_word1_x86_features;
1702 entry->ecx &= kvm_supported_word6_x86_features;
1710 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1711 struct kvm_cpuid_entry2 __user *entries)
1713 struct kvm_cpuid_entry2 *cpuid_entries;
1714 int limit, nent = 0, r = -E2BIG;
1717 if (cpuid->nent < 1)
1719 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1720 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1722 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1726 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1727 limit = cpuid_entries[0].eax;
1728 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1729 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1730 &nent, cpuid->nent);
1732 if (nent >= cpuid->nent)
1735 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1736 limit = cpuid_entries[nent - 1].eax;
1737 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1738 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1739 &nent, cpuid->nent);
1741 if (nent >= cpuid->nent)
1745 if (copy_to_user(entries, cpuid_entries,
1746 nent * sizeof(struct kvm_cpuid_entry2)))
1752 vfree(cpuid_entries);
1757 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1758 struct kvm_lapic_state *s)
1761 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1767 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1768 struct kvm_lapic_state *s)
1771 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1772 kvm_apic_post_state_restore(vcpu);
1773 update_cr8_intercept(vcpu);
1779 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1780 struct kvm_interrupt *irq)
1782 if (irq->irq < 0 || irq->irq >= 256)
1784 if (irqchip_in_kernel(vcpu->kvm))
1788 kvm_queue_interrupt(vcpu, irq->irq, false);
1795 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1798 kvm_inject_nmi(vcpu);
1804 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1805 struct kvm_tpr_access_ctl *tac)
1809 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1813 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
1817 unsigned bank_num = mcg_cap & 0xff, bank;
1820 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
1822 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
1825 vcpu->arch.mcg_cap = mcg_cap;
1826 /* Init IA32_MCG_CTL to all 1s */
1827 if (mcg_cap & MCG_CTL_P)
1828 vcpu->arch.mcg_ctl = ~(u64)0;
1829 /* Init IA32_MCi_CTL to all 1s */
1830 for (bank = 0; bank < bank_num; bank++)
1831 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
1836 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
1837 struct kvm_x86_mce *mce)
1839 u64 mcg_cap = vcpu->arch.mcg_cap;
1840 unsigned bank_num = mcg_cap & 0xff;
1841 u64 *banks = vcpu->arch.mce_banks;
1843 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
1846 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1847 * reporting is disabled
1849 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
1850 vcpu->arch.mcg_ctl != ~(u64)0)
1852 banks += 4 * mce->bank;
1854 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1855 * reporting is disabled for the bank
1857 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
1859 if (mce->status & MCI_STATUS_UC) {
1860 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
1861 !(vcpu->arch.cr4 & X86_CR4_MCE)) {
1862 printk(KERN_DEBUG "kvm: set_mce: "
1863 "injects mce exception while "
1864 "previous one is in progress!\n");
1865 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
1868 if (banks[1] & MCI_STATUS_VAL)
1869 mce->status |= MCI_STATUS_OVER;
1870 banks[2] = mce->addr;
1871 banks[3] = mce->misc;
1872 vcpu->arch.mcg_status = mce->mcg_status;
1873 banks[1] = mce->status;
1874 kvm_queue_exception(vcpu, MC_VECTOR);
1875 } else if (!(banks[1] & MCI_STATUS_VAL)
1876 || !(banks[1] & MCI_STATUS_UC)) {
1877 if (banks[1] & MCI_STATUS_VAL)
1878 mce->status |= MCI_STATUS_OVER;
1879 banks[2] = mce->addr;
1880 banks[3] = mce->misc;
1881 banks[1] = mce->status;
1883 banks[1] |= MCI_STATUS_OVER;
1887 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
1888 struct kvm_vcpu_events *events)
1892 events->exception.injected = vcpu->arch.exception.pending;
1893 events->exception.nr = vcpu->arch.exception.nr;
1894 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
1895 events->exception.error_code = vcpu->arch.exception.error_code;
1897 events->interrupt.injected = vcpu->arch.interrupt.pending;
1898 events->interrupt.nr = vcpu->arch.interrupt.nr;
1899 events->interrupt.soft = vcpu->arch.interrupt.soft;
1901 events->nmi.injected = vcpu->arch.nmi_injected;
1902 events->nmi.pending = vcpu->arch.nmi_pending;
1903 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
1905 events->sipi_vector = vcpu->arch.sipi_vector;
1912 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
1913 struct kvm_vcpu_events *events)
1920 vcpu->arch.exception.pending = events->exception.injected;
1921 vcpu->arch.exception.nr = events->exception.nr;
1922 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
1923 vcpu->arch.exception.error_code = events->exception.error_code;
1925 vcpu->arch.interrupt.pending = events->interrupt.injected;
1926 vcpu->arch.interrupt.nr = events->interrupt.nr;
1927 vcpu->arch.interrupt.soft = events->interrupt.soft;
1928 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
1929 kvm_pic_clear_isr_ack(vcpu->kvm);
1931 vcpu->arch.nmi_injected = events->nmi.injected;
1932 vcpu->arch.nmi_pending = events->nmi.pending;
1933 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
1935 vcpu->arch.sipi_vector = events->sipi_vector;
1942 long kvm_arch_vcpu_ioctl(struct file *filp,
1943 unsigned int ioctl, unsigned long arg)
1945 struct kvm_vcpu *vcpu = filp->private_data;
1946 void __user *argp = (void __user *)arg;
1948 struct kvm_lapic_state *lapic = NULL;
1951 case KVM_GET_LAPIC: {
1953 if (!vcpu->arch.apic)
1955 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1960 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1964 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1969 case KVM_SET_LAPIC: {
1971 if (!vcpu->arch.apic)
1973 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1978 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1980 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1986 case KVM_INTERRUPT: {
1987 struct kvm_interrupt irq;
1990 if (copy_from_user(&irq, argp, sizeof irq))
1992 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1999 r = kvm_vcpu_ioctl_nmi(vcpu);
2005 case KVM_SET_CPUID: {
2006 struct kvm_cpuid __user *cpuid_arg = argp;
2007 struct kvm_cpuid cpuid;
2010 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2012 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2017 case KVM_SET_CPUID2: {
2018 struct kvm_cpuid2 __user *cpuid_arg = argp;
2019 struct kvm_cpuid2 cpuid;
2022 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2024 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2025 cpuid_arg->entries);
2030 case KVM_GET_CPUID2: {
2031 struct kvm_cpuid2 __user *cpuid_arg = argp;
2032 struct kvm_cpuid2 cpuid;
2035 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2037 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2038 cpuid_arg->entries);
2042 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2048 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2051 r = msr_io(vcpu, argp, do_set_msr, 0);
2053 case KVM_TPR_ACCESS_REPORTING: {
2054 struct kvm_tpr_access_ctl tac;
2057 if (copy_from_user(&tac, argp, sizeof tac))
2059 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2063 if (copy_to_user(argp, &tac, sizeof tac))
2068 case KVM_SET_VAPIC_ADDR: {
2069 struct kvm_vapic_addr va;
2072 if (!irqchip_in_kernel(vcpu->kvm))
2075 if (copy_from_user(&va, argp, sizeof va))
2078 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2081 case KVM_X86_SETUP_MCE: {
2085 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2087 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2090 case KVM_X86_SET_MCE: {
2091 struct kvm_x86_mce mce;
2094 if (copy_from_user(&mce, argp, sizeof mce))
2096 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2099 case KVM_GET_VCPU_EVENTS: {
2100 struct kvm_vcpu_events events;
2102 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2105 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2110 case KVM_SET_VCPU_EVENTS: {
2111 struct kvm_vcpu_events events;
2114 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2117 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2128 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2132 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2134 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2138 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2141 kvm->arch.ept_identity_map_addr = ident_addr;
2145 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2146 u32 kvm_nr_mmu_pages)
2148 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2151 down_write(&kvm->slots_lock);
2152 spin_lock(&kvm->mmu_lock);
2154 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2155 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2157 spin_unlock(&kvm->mmu_lock);
2158 up_write(&kvm->slots_lock);
2162 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2164 return kvm->arch.n_alloc_mmu_pages;
2167 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
2170 struct kvm_mem_alias *alias;
2172 for (i = 0; i < kvm->arch.naliases; ++i) {
2173 alias = &kvm->arch.aliases[i];
2174 if (gfn >= alias->base_gfn
2175 && gfn < alias->base_gfn + alias->npages)
2176 return alias->target_gfn + gfn - alias->base_gfn;
2182 * Set a new alias region. Aliases map a portion of physical memory into
2183 * another portion. This is useful for memory windows, for example the PC
2186 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
2187 struct kvm_memory_alias *alias)
2190 struct kvm_mem_alias *p;
2193 /* General sanity checks */
2194 if (alias->memory_size & (PAGE_SIZE - 1))
2196 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
2198 if (alias->slot >= KVM_ALIAS_SLOTS)
2200 if (alias->guest_phys_addr + alias->memory_size
2201 < alias->guest_phys_addr)
2203 if (alias->target_phys_addr + alias->memory_size
2204 < alias->target_phys_addr)
2207 down_write(&kvm->slots_lock);
2208 spin_lock(&kvm->mmu_lock);
2210 p = &kvm->arch.aliases[alias->slot];
2211 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
2212 p->npages = alias->memory_size >> PAGE_SHIFT;
2213 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
2215 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
2216 if (kvm->arch.aliases[n - 1].npages)
2218 kvm->arch.naliases = n;
2220 spin_unlock(&kvm->mmu_lock);
2221 kvm_mmu_zap_all(kvm);
2223 up_write(&kvm->slots_lock);
2231 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2236 switch (chip->chip_id) {
2237 case KVM_IRQCHIP_PIC_MASTER:
2238 memcpy(&chip->chip.pic,
2239 &pic_irqchip(kvm)->pics[0],
2240 sizeof(struct kvm_pic_state));
2242 case KVM_IRQCHIP_PIC_SLAVE:
2243 memcpy(&chip->chip.pic,
2244 &pic_irqchip(kvm)->pics[1],
2245 sizeof(struct kvm_pic_state));
2247 case KVM_IRQCHIP_IOAPIC:
2248 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2257 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2262 switch (chip->chip_id) {
2263 case KVM_IRQCHIP_PIC_MASTER:
2264 spin_lock(&pic_irqchip(kvm)->lock);
2265 memcpy(&pic_irqchip(kvm)->pics[0],
2267 sizeof(struct kvm_pic_state));
2268 spin_unlock(&pic_irqchip(kvm)->lock);
2270 case KVM_IRQCHIP_PIC_SLAVE:
2271 spin_lock(&pic_irqchip(kvm)->lock);
2272 memcpy(&pic_irqchip(kvm)->pics[1],
2274 sizeof(struct kvm_pic_state));
2275 spin_unlock(&pic_irqchip(kvm)->lock);
2277 case KVM_IRQCHIP_IOAPIC:
2278 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2284 kvm_pic_update_irq(pic_irqchip(kvm));
2288 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2292 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2293 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2294 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2298 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2302 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2303 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2304 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2305 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2309 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2313 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2314 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2315 sizeof(ps->channels));
2316 ps->flags = kvm->arch.vpit->pit_state.flags;
2317 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2321 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2323 int r = 0, start = 0;
2324 u32 prev_legacy, cur_legacy;
2325 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2326 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2327 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2328 if (!prev_legacy && cur_legacy)
2330 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2331 sizeof(kvm->arch.vpit->pit_state.channels));
2332 kvm->arch.vpit->pit_state.flags = ps->flags;
2333 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2334 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2338 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2339 struct kvm_reinject_control *control)
2341 if (!kvm->arch.vpit)
2343 mutex_lock(&kvm->arch.vpit->pit_state.lock);
2344 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2345 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2350 * Get (and clear) the dirty memory log for a memory slot.
2352 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
2353 struct kvm_dirty_log *log)
2357 struct kvm_memory_slot *memslot;
2360 down_write(&kvm->slots_lock);
2362 r = kvm_get_dirty_log(kvm, log, &is_dirty);
2366 /* If nothing is dirty, don't bother messing with page tables. */
2368 spin_lock(&kvm->mmu_lock);
2369 kvm_mmu_slot_remove_write_access(kvm, log->slot);
2370 spin_unlock(&kvm->mmu_lock);
2371 memslot = &kvm->memslots[log->slot];
2372 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
2373 memset(memslot->dirty_bitmap, 0, n);
2377 up_write(&kvm->slots_lock);
2381 long kvm_arch_vm_ioctl(struct file *filp,
2382 unsigned int ioctl, unsigned long arg)
2384 struct kvm *kvm = filp->private_data;
2385 void __user *argp = (void __user *)arg;
2388 * This union makes it completely explicit to gcc-3.x
2389 * that these two variables' stack usage should be
2390 * combined, not added together.
2393 struct kvm_pit_state ps;
2394 struct kvm_pit_state2 ps2;
2395 struct kvm_memory_alias alias;
2396 struct kvm_pit_config pit_config;
2400 case KVM_SET_TSS_ADDR:
2401 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
2405 case KVM_SET_IDENTITY_MAP_ADDR: {
2409 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
2411 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
2416 case KVM_SET_MEMORY_REGION: {
2417 struct kvm_memory_region kvm_mem;
2418 struct kvm_userspace_memory_region kvm_userspace_mem;
2421 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
2423 kvm_userspace_mem.slot = kvm_mem.slot;
2424 kvm_userspace_mem.flags = kvm_mem.flags;
2425 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
2426 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
2427 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
2432 case KVM_SET_NR_MMU_PAGES:
2433 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
2437 case KVM_GET_NR_MMU_PAGES:
2438 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
2440 case KVM_SET_MEMORY_ALIAS:
2442 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
2444 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
2448 case KVM_CREATE_IRQCHIP: {
2449 struct kvm_pic *vpic;
2451 mutex_lock(&kvm->lock);
2454 goto create_irqchip_unlock;
2456 vpic = kvm_create_pic(kvm);
2458 r = kvm_ioapic_init(kvm);
2461 goto create_irqchip_unlock;
2464 goto create_irqchip_unlock;
2466 kvm->arch.vpic = vpic;
2468 r = kvm_setup_default_irq_routing(kvm);
2470 mutex_lock(&kvm->irq_lock);
2471 kfree(kvm->arch.vpic);
2472 kfree(kvm->arch.vioapic);
2473 kvm->arch.vpic = NULL;
2474 kvm->arch.vioapic = NULL;
2475 mutex_unlock(&kvm->irq_lock);
2477 create_irqchip_unlock:
2478 mutex_unlock(&kvm->lock);
2481 case KVM_CREATE_PIT:
2482 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
2484 case KVM_CREATE_PIT2:
2486 if (copy_from_user(&u.pit_config, argp,
2487 sizeof(struct kvm_pit_config)))
2490 down_write(&kvm->slots_lock);
2493 goto create_pit_unlock;
2495 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
2499 up_write(&kvm->slots_lock);
2501 case KVM_IRQ_LINE_STATUS:
2502 case KVM_IRQ_LINE: {
2503 struct kvm_irq_level irq_event;
2506 if (copy_from_user(&irq_event, argp, sizeof irq_event))
2508 if (irqchip_in_kernel(kvm)) {
2510 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
2511 irq_event.irq, irq_event.level);
2512 if (ioctl == KVM_IRQ_LINE_STATUS) {
2513 irq_event.status = status;
2514 if (copy_to_user(argp, &irq_event,
2522 case KVM_GET_IRQCHIP: {
2523 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2524 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2530 if (copy_from_user(chip, argp, sizeof *chip))
2531 goto get_irqchip_out;
2533 if (!irqchip_in_kernel(kvm))
2534 goto get_irqchip_out;
2535 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
2537 goto get_irqchip_out;
2539 if (copy_to_user(argp, chip, sizeof *chip))
2540 goto get_irqchip_out;
2548 case KVM_SET_IRQCHIP: {
2549 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2550 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2556 if (copy_from_user(chip, argp, sizeof *chip))
2557 goto set_irqchip_out;
2559 if (!irqchip_in_kernel(kvm))
2560 goto set_irqchip_out;
2561 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2563 goto set_irqchip_out;
2573 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2576 if (!kvm->arch.vpit)
2578 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2582 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2589 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2592 if (!kvm->arch.vpit)
2594 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2600 case KVM_GET_PIT2: {
2602 if (!kvm->arch.vpit)
2604 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
2608 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
2613 case KVM_SET_PIT2: {
2615 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
2618 if (!kvm->arch.vpit)
2620 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
2626 case KVM_REINJECT_CONTROL: {
2627 struct kvm_reinject_control control;
2629 if (copy_from_user(&control, argp, sizeof(control)))
2631 r = kvm_vm_ioctl_reinject(kvm, &control);
2637 case KVM_XEN_HVM_CONFIG: {
2639 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
2640 sizeof(struct kvm_xen_hvm_config)))
2643 if (kvm->arch.xen_hvm_config.flags)
2648 case KVM_SET_CLOCK: {
2649 struct timespec now;
2650 struct kvm_clock_data user_ns;
2655 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
2664 now_ns = timespec_to_ns(&now);
2665 delta = user_ns.clock - now_ns;
2666 kvm->arch.kvmclock_offset = delta;
2669 case KVM_GET_CLOCK: {
2670 struct timespec now;
2671 struct kvm_clock_data user_ns;
2675 now_ns = timespec_to_ns(&now);
2676 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
2680 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
2693 static void kvm_init_msr_list(void)
2698 /* skip the first msrs in the list. KVM-specific */
2699 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
2700 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2703 msrs_to_save[j] = msrs_to_save[i];
2706 num_msrs_to_save = j;
2709 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
2712 if (vcpu->arch.apic &&
2713 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
2716 return kvm_io_bus_write(&vcpu->kvm->mmio_bus, addr, len, v);
2719 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
2721 if (vcpu->arch.apic &&
2722 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
2725 return kvm_io_bus_read(&vcpu->kvm->mmio_bus, addr, len, v);
2728 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2729 struct kvm_vcpu *vcpu)
2732 int r = X86EMUL_CONTINUE;
2735 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2736 unsigned offset = addr & (PAGE_SIZE-1);
2737 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2740 if (gpa == UNMAPPED_GVA) {
2741 r = X86EMUL_PROPAGATE_FAULT;
2744 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2746 r = X86EMUL_UNHANDLEABLE;
2758 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2759 struct kvm_vcpu *vcpu)
2762 int r = X86EMUL_CONTINUE;
2765 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2766 unsigned offset = addr & (PAGE_SIZE-1);
2767 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2770 if (gpa == UNMAPPED_GVA) {
2771 r = X86EMUL_PROPAGATE_FAULT;
2774 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2776 r = X86EMUL_UNHANDLEABLE;
2789 static int emulator_read_emulated(unsigned long addr,
2792 struct kvm_vcpu *vcpu)
2796 if (vcpu->mmio_read_completed) {
2797 memcpy(val, vcpu->mmio_data, bytes);
2798 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
2799 vcpu->mmio_phys_addr, *(u64 *)val);
2800 vcpu->mmio_read_completed = 0;
2801 return X86EMUL_CONTINUE;
2804 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2806 /* For APIC access vmexit */
2807 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2810 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2811 == X86EMUL_CONTINUE)
2812 return X86EMUL_CONTINUE;
2813 if (gpa == UNMAPPED_GVA)
2814 return X86EMUL_PROPAGATE_FAULT;
2818 * Is this MMIO handled locally?
2820 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
2821 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
2822 return X86EMUL_CONTINUE;
2825 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
2827 vcpu->mmio_needed = 1;
2828 vcpu->mmio_phys_addr = gpa;
2829 vcpu->mmio_size = bytes;
2830 vcpu->mmio_is_write = 0;
2832 return X86EMUL_UNHANDLEABLE;
2835 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2836 const void *val, int bytes)
2840 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2843 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2847 static int emulator_write_emulated_onepage(unsigned long addr,
2850 struct kvm_vcpu *vcpu)
2854 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2856 if (gpa == UNMAPPED_GVA) {
2857 kvm_inject_page_fault(vcpu, addr, 2);
2858 return X86EMUL_PROPAGATE_FAULT;
2861 /* For APIC access vmexit */
2862 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2865 if (emulator_write_phys(vcpu, gpa, val, bytes))
2866 return X86EMUL_CONTINUE;
2869 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
2871 * Is this MMIO handled locally?
2873 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
2874 return X86EMUL_CONTINUE;
2876 vcpu->mmio_needed = 1;
2877 vcpu->mmio_phys_addr = gpa;
2878 vcpu->mmio_size = bytes;
2879 vcpu->mmio_is_write = 1;
2880 memcpy(vcpu->mmio_data, val, bytes);
2882 return X86EMUL_CONTINUE;
2885 int emulator_write_emulated(unsigned long addr,
2888 struct kvm_vcpu *vcpu)
2890 /* Crossing a page boundary? */
2891 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2894 now = -addr & ~PAGE_MASK;
2895 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2896 if (rc != X86EMUL_CONTINUE)
2902 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2904 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2906 static int emulator_cmpxchg_emulated(unsigned long addr,
2910 struct kvm_vcpu *vcpu)
2912 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
2913 #ifndef CONFIG_X86_64
2914 /* guests cmpxchg8b have to be emulated atomically */
2921 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2923 if (gpa == UNMAPPED_GVA ||
2924 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2927 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2932 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2934 kaddr = kmap_atomic(page, KM_USER0);
2935 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2936 kunmap_atomic(kaddr, KM_USER0);
2937 kvm_release_page_dirty(page);
2942 return emulator_write_emulated(addr, new, bytes, vcpu);
2945 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2947 return kvm_x86_ops->get_segment_base(vcpu, seg);
2950 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2952 kvm_mmu_invlpg(vcpu, address);
2953 return X86EMUL_CONTINUE;
2956 int emulate_clts(struct kvm_vcpu *vcpu)
2958 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2959 return X86EMUL_CONTINUE;
2962 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2964 struct kvm_vcpu *vcpu = ctxt->vcpu;
2968 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2969 return X86EMUL_CONTINUE;
2971 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2972 return X86EMUL_UNHANDLEABLE;
2976 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2978 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2981 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2983 /* FIXME: better handling */
2984 return X86EMUL_UNHANDLEABLE;
2986 return X86EMUL_CONTINUE;
2989 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2992 unsigned long rip = kvm_rip_read(vcpu);
2993 unsigned long rip_linear;
2995 if (!printk_ratelimit())
2998 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
3000 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
3002 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
3003 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
3005 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
3007 static struct x86_emulate_ops emulate_ops = {
3008 .read_std = kvm_read_guest_virt,
3009 .read_emulated = emulator_read_emulated,
3010 .write_emulated = emulator_write_emulated,
3011 .cmpxchg_emulated = emulator_cmpxchg_emulated,
3014 static void cache_all_regs(struct kvm_vcpu *vcpu)
3016 kvm_register_read(vcpu, VCPU_REGS_RAX);
3017 kvm_register_read(vcpu, VCPU_REGS_RSP);
3018 kvm_register_read(vcpu, VCPU_REGS_RIP);
3019 vcpu->arch.regs_dirty = ~0;
3022 int emulate_instruction(struct kvm_vcpu *vcpu,
3028 struct decode_cache *c;
3029 struct kvm_run *run = vcpu->run;
3031 kvm_clear_exception_queue(vcpu);
3032 vcpu->arch.mmio_fault_cr2 = cr2;
3034 * TODO: fix emulate.c to use guest_read/write_register
3035 * instead of direct ->regs accesses, can save hundred cycles
3036 * on Intel for instructions that don't read/change RSP, for
3039 cache_all_regs(vcpu);
3041 vcpu->mmio_is_write = 0;
3042 vcpu->arch.pio.string = 0;
3044 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
3046 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
3048 vcpu->arch.emulate_ctxt.vcpu = vcpu;
3049 vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
3050 vcpu->arch.emulate_ctxt.mode =
3051 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
3052 ? X86EMUL_MODE_REAL : cs_l
3053 ? X86EMUL_MODE_PROT64 : cs_db
3054 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
3056 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3058 /* Only allow emulation of specific instructions on #UD
3059 * (namely VMMCALL, sysenter, sysexit, syscall)*/
3060 c = &vcpu->arch.emulate_ctxt.decode;
3061 if (emulation_type & EMULTYPE_TRAP_UD) {
3063 return EMULATE_FAIL;
3065 case 0x01: /* VMMCALL */
3066 if (c->modrm_mod != 3 || c->modrm_rm != 1)
3067 return EMULATE_FAIL;
3069 case 0x34: /* sysenter */
3070 case 0x35: /* sysexit */
3071 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3072 return EMULATE_FAIL;
3074 case 0x05: /* syscall */
3075 if (c->modrm_mod != 0 || c->modrm_rm != 0)
3076 return EMULATE_FAIL;
3079 return EMULATE_FAIL;
3082 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
3083 return EMULATE_FAIL;
3086 ++vcpu->stat.insn_emulation;
3088 ++vcpu->stat.insn_emulation_fail;
3089 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3090 return EMULATE_DONE;
3091 return EMULATE_FAIL;
3095 if (emulation_type & EMULTYPE_SKIP) {
3096 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
3097 return EMULATE_DONE;
3100 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
3101 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
3104 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
3106 if (vcpu->arch.pio.string)
3107 return EMULATE_DO_MMIO;
3109 if ((r || vcpu->mmio_is_write) && run) {
3110 run->exit_reason = KVM_EXIT_MMIO;
3111 run->mmio.phys_addr = vcpu->mmio_phys_addr;
3112 memcpy(run->mmio.data, vcpu->mmio_data, 8);
3113 run->mmio.len = vcpu->mmio_size;
3114 run->mmio.is_write = vcpu->mmio_is_write;
3118 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
3119 return EMULATE_DONE;
3120 if (!vcpu->mmio_needed) {
3121 kvm_report_emulation_failure(vcpu, "mmio");
3122 return EMULATE_FAIL;
3124 return EMULATE_DO_MMIO;
3127 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
3129 if (vcpu->mmio_is_write) {
3130 vcpu->mmio_needed = 0;
3131 return EMULATE_DO_MMIO;
3134 return EMULATE_DONE;
3136 EXPORT_SYMBOL_GPL(emulate_instruction);
3138 static int pio_copy_data(struct kvm_vcpu *vcpu)
3140 void *p = vcpu->arch.pio_data;
3141 gva_t q = vcpu->arch.pio.guest_gva;
3145 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
3146 if (vcpu->arch.pio.in)
3147 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
3149 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
3153 int complete_pio(struct kvm_vcpu *vcpu)
3155 struct kvm_pio_request *io = &vcpu->arch.pio;
3162 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3163 memcpy(&val, vcpu->arch.pio_data, io->size);
3164 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
3168 r = pio_copy_data(vcpu);
3175 delta *= io->cur_count;
3177 * The size of the register should really depend on
3178 * current address size.
3180 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
3182 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
3188 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
3190 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
3192 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
3194 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
3198 io->count -= io->cur_count;
3204 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3206 /* TODO: String I/O for in kernel device */
3209 if (vcpu->arch.pio.in)
3210 r = kvm_io_bus_read(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
3211 vcpu->arch.pio.size, pd);
3213 r = kvm_io_bus_write(&vcpu->kvm->pio_bus, vcpu->arch.pio.port,
3214 vcpu->arch.pio.size, pd);
3218 static int pio_string_write(struct kvm_vcpu *vcpu)
3220 struct kvm_pio_request *io = &vcpu->arch.pio;
3221 void *pd = vcpu->arch.pio_data;
3224 for (i = 0; i < io->cur_count; i++) {
3225 if (kvm_io_bus_write(&vcpu->kvm->pio_bus,
3226 io->port, io->size, pd)) {
3235 int kvm_emulate_pio(struct kvm_vcpu *vcpu, int in, int size, unsigned port)
3239 vcpu->run->exit_reason = KVM_EXIT_IO;
3240 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3241 vcpu->run->io.size = vcpu->arch.pio.size = size;
3242 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3243 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
3244 vcpu->run->io.port = vcpu->arch.pio.port = port;
3245 vcpu->arch.pio.in = in;
3246 vcpu->arch.pio.string = 0;
3247 vcpu->arch.pio.down = 0;
3248 vcpu->arch.pio.rep = 0;
3250 trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3253 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
3254 memcpy(vcpu->arch.pio_data, &val, 4);
3256 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3262 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
3264 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, int in,
3265 int size, unsigned long count, int down,
3266 gva_t address, int rep, unsigned port)
3268 unsigned now, in_page;
3271 vcpu->run->exit_reason = KVM_EXIT_IO;
3272 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3273 vcpu->run->io.size = vcpu->arch.pio.size = size;
3274 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3275 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
3276 vcpu->run->io.port = vcpu->arch.pio.port = port;
3277 vcpu->arch.pio.in = in;
3278 vcpu->arch.pio.string = 1;
3279 vcpu->arch.pio.down = down;
3280 vcpu->arch.pio.rep = rep;
3282 trace_kvm_pio(vcpu->run->io.direction == KVM_EXIT_IO_OUT, port,
3286 kvm_x86_ops->skip_emulated_instruction(vcpu);
3291 in_page = PAGE_SIZE - offset_in_page(address);
3293 in_page = offset_in_page(address) + size;
3294 now = min(count, (unsigned long)in_page / size);
3299 * String I/O in reverse. Yuck. Kill the guest, fix later.
3301 pr_unimpl(vcpu, "guest string pio down\n");
3302 kvm_inject_gp(vcpu, 0);
3305 vcpu->run->io.count = now;
3306 vcpu->arch.pio.cur_count = now;
3308 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
3309 kvm_x86_ops->skip_emulated_instruction(vcpu);
3311 vcpu->arch.pio.guest_gva = address;
3313 if (!vcpu->arch.pio.in) {
3314 /* string PIO write */
3315 ret = pio_copy_data(vcpu);
3316 if (ret == X86EMUL_PROPAGATE_FAULT) {
3317 kvm_inject_gp(vcpu, 0);
3320 if (ret == 0 && !pio_string_write(vcpu)) {
3322 if (vcpu->arch.pio.count == 0)
3326 /* no string PIO read support yet */
3330 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
3332 static void bounce_off(void *info)
3337 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
3340 struct cpufreq_freqs *freq = data;
3342 struct kvm_vcpu *vcpu;
3343 int i, send_ipi = 0;
3345 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
3347 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
3349 per_cpu(cpu_tsc_khz, freq->cpu) = freq->new;
3351 spin_lock(&kvm_lock);
3352 list_for_each_entry(kvm, &vm_list, vm_list) {
3353 kvm_for_each_vcpu(i, vcpu, kvm) {
3354 if (vcpu->cpu != freq->cpu)
3356 if (!kvm_request_guest_time_update(vcpu))
3358 if (vcpu->cpu != smp_processor_id())
3362 spin_unlock(&kvm_lock);
3364 if (freq->old < freq->new && send_ipi) {
3366 * We upscale the frequency. Must make the guest
3367 * doesn't see old kvmclock values while running with
3368 * the new frequency, otherwise we risk the guest sees
3369 * time go backwards.
3371 * In case we update the frequency for another cpu
3372 * (which might be in guest context) send an interrupt
3373 * to kick the cpu out of guest context. Next time
3374 * guest context is entered kvmclock will be updated,
3375 * so the guest will not see stale values.
3377 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
3382 static struct notifier_block kvmclock_cpufreq_notifier_block = {
3383 .notifier_call = kvmclock_cpufreq_notifier
3386 static void kvm_timer_init(void)
3390 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
3391 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
3392 CPUFREQ_TRANSITION_NOTIFIER);
3393 for_each_online_cpu(cpu) {
3394 unsigned long khz = cpufreq_get(cpu);
3397 per_cpu(cpu_tsc_khz, cpu) = khz;
3400 for_each_possible_cpu(cpu)
3401 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
3405 int kvm_arch_init(void *opaque)
3408 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
3411 printk(KERN_ERR "kvm: already loaded the other module\n");
3416 if (!ops->cpu_has_kvm_support()) {
3417 printk(KERN_ERR "kvm: no hardware support\n");
3421 if (ops->disabled_by_bios()) {
3422 printk(KERN_ERR "kvm: disabled by bios\n");
3427 r = kvm_mmu_module_init();
3431 kvm_init_msr_list();
3434 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3435 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
3436 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
3437 PT_DIRTY_MASK, PT64_NX_MASK, 0);
3447 void kvm_arch_exit(void)
3449 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
3450 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
3451 CPUFREQ_TRANSITION_NOTIFIER);
3453 kvm_mmu_module_exit();
3456 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
3458 ++vcpu->stat.halt_exits;
3459 if (irqchip_in_kernel(vcpu->kvm)) {
3460 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3463 vcpu->run->exit_reason = KVM_EXIT_HLT;
3467 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
3469 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
3472 if (is_long_mode(vcpu))
3475 return a0 | ((gpa_t)a1 << 32);
3478 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
3480 unsigned long nr, a0, a1, a2, a3, ret;
3483 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
3484 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
3485 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
3486 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
3487 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
3489 trace_kvm_hypercall(nr, a0, a1, a2, a3);
3491 if (!is_long_mode(vcpu)) {
3499 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
3505 case KVM_HC_VAPIC_POLL_IRQ:
3509 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
3516 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
3517 ++vcpu->stat.hypercalls;
3520 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
3522 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
3524 char instruction[3];
3526 unsigned long rip = kvm_rip_read(vcpu);
3530 * Blow out the MMU to ensure that no other VCPU has an active mapping
3531 * to ensure that the updated hypercall appears atomically across all
3534 kvm_mmu_zap_all(vcpu->kvm);
3536 kvm_x86_ops->patch_hypercall(vcpu, instruction);
3537 if (emulator_write_emulated(rip, instruction, 3, vcpu)
3538 != X86EMUL_CONTINUE)
3544 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3546 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3549 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3551 struct descriptor_table dt = { limit, base };
3553 kvm_x86_ops->set_gdt(vcpu, &dt);
3556 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
3558 struct descriptor_table dt = { limit, base };
3560 kvm_x86_ops->set_idt(vcpu, &dt);
3563 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
3564 unsigned long *rflags)
3566 kvm_lmsw(vcpu, msw);
3567 *rflags = kvm_get_rflags(vcpu);
3570 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
3572 unsigned long value;
3574 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3577 value = vcpu->arch.cr0;
3580 value = vcpu->arch.cr2;
3583 value = vcpu->arch.cr3;
3586 value = vcpu->arch.cr4;
3589 value = kvm_get_cr8(vcpu);
3592 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3599 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
3600 unsigned long *rflags)
3604 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
3605 *rflags = kvm_get_rflags(vcpu);
3608 vcpu->arch.cr2 = val;
3611 kvm_set_cr3(vcpu, val);
3614 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
3617 kvm_set_cr8(vcpu, val & 0xfUL);
3620 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
3624 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
3626 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
3627 int j, nent = vcpu->arch.cpuid_nent;
3629 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
3630 /* when no next entry is found, the current entry[i] is reselected */
3631 for (j = i + 1; ; j = (j + 1) % nent) {
3632 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
3633 if (ej->function == e->function) {
3634 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
3638 return 0; /* silence gcc, even though control never reaches here */
3641 /* find an entry with matching function, matching index (if needed), and that
3642 * should be read next (if it's stateful) */
3643 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
3644 u32 function, u32 index)
3646 if (e->function != function)
3648 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3650 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3651 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3656 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3657 u32 function, u32 index)
3660 struct kvm_cpuid_entry2 *best = NULL;
3662 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3663 struct kvm_cpuid_entry2 *e;
3665 e = &vcpu->arch.cpuid_entries[i];
3666 if (is_matching_cpuid_entry(e, function, index)) {
3667 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3668 move_to_next_stateful_cpuid_entry(vcpu, i);
3673 * Both basic or both extended?
3675 if (((e->function ^ function) & 0x80000000) == 0)
3676 if (!best || e->function > best->function)
3682 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3684 struct kvm_cpuid_entry2 *best;
3686 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3688 return best->eax & 0xff;
3692 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3694 u32 function, index;
3695 struct kvm_cpuid_entry2 *best;
3697 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3698 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3699 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3700 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3701 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3702 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3703 best = kvm_find_cpuid_entry(vcpu, function, index);
3705 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3706 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3707 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3708 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3710 kvm_x86_ops->skip_emulated_instruction(vcpu);
3711 trace_kvm_cpuid(function,
3712 kvm_register_read(vcpu, VCPU_REGS_RAX),
3713 kvm_register_read(vcpu, VCPU_REGS_RBX),
3714 kvm_register_read(vcpu, VCPU_REGS_RCX),
3715 kvm_register_read(vcpu, VCPU_REGS_RDX));
3717 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3720 * Check if userspace requested an interrupt window, and that the
3721 * interrupt window is open.
3723 * No need to exit to userspace if we already have an interrupt queued.
3725 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
3727 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3728 vcpu->run->request_interrupt_window &&
3729 kvm_arch_interrupt_allowed(vcpu));
3732 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
3734 struct kvm_run *kvm_run = vcpu->run;
3736 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3737 kvm_run->cr8 = kvm_get_cr8(vcpu);
3738 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3739 if (irqchip_in_kernel(vcpu->kvm))
3740 kvm_run->ready_for_interrupt_injection = 1;
3742 kvm_run->ready_for_interrupt_injection =
3743 kvm_arch_interrupt_allowed(vcpu) &&
3744 !kvm_cpu_has_interrupt(vcpu) &&
3745 !kvm_event_needs_reinjection(vcpu);
3748 static void vapic_enter(struct kvm_vcpu *vcpu)
3750 struct kvm_lapic *apic = vcpu->arch.apic;
3753 if (!apic || !apic->vapic_addr)
3756 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3758 vcpu->arch.apic->vapic_page = page;
3761 static void vapic_exit(struct kvm_vcpu *vcpu)
3763 struct kvm_lapic *apic = vcpu->arch.apic;
3765 if (!apic || !apic->vapic_addr)
3768 down_read(&vcpu->kvm->slots_lock);
3769 kvm_release_page_dirty(apic->vapic_page);
3770 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3771 up_read(&vcpu->kvm->slots_lock);
3774 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3778 if (!kvm_x86_ops->update_cr8_intercept)
3781 if (!vcpu->arch.apic)
3784 if (!vcpu->arch.apic->vapic_addr)
3785 max_irr = kvm_lapic_find_highest_irr(vcpu);
3792 tpr = kvm_lapic_get_cr8(vcpu);
3794 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3797 static void inject_pending_event(struct kvm_vcpu *vcpu)
3799 /* try to reinject previous events if any */
3800 if (vcpu->arch.exception.pending) {
3801 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
3802 vcpu->arch.exception.has_error_code,
3803 vcpu->arch.exception.error_code);
3807 if (vcpu->arch.nmi_injected) {
3808 kvm_x86_ops->set_nmi(vcpu);
3812 if (vcpu->arch.interrupt.pending) {
3813 kvm_x86_ops->set_irq(vcpu);
3817 /* try to inject new event if pending */
3818 if (vcpu->arch.nmi_pending) {
3819 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3820 vcpu->arch.nmi_pending = false;
3821 vcpu->arch.nmi_injected = true;
3822 kvm_x86_ops->set_nmi(vcpu);
3824 } else if (kvm_cpu_has_interrupt(vcpu)) {
3825 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3826 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
3828 kvm_x86_ops->set_irq(vcpu);
3833 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
3836 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3837 vcpu->run->request_interrupt_window;
3840 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3841 kvm_mmu_unload(vcpu);
3843 r = kvm_mmu_reload(vcpu);
3847 if (vcpu->requests) {
3848 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3849 __kvm_migrate_timers(vcpu);
3850 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3851 kvm_write_guest_time(vcpu);
3852 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3853 kvm_mmu_sync_roots(vcpu);
3854 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3855 kvm_x86_ops->tlb_flush(vcpu);
3856 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3858 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
3862 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3863 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
3871 kvm_x86_ops->prepare_guest_switch(vcpu);
3872 kvm_load_guest_fpu(vcpu);
3874 local_irq_disable();
3876 clear_bit(KVM_REQ_KICK, &vcpu->requests);
3877 smp_mb__after_clear_bit();
3879 if (vcpu->requests || need_resched() || signal_pending(current)) {
3880 set_bit(KVM_REQ_KICK, &vcpu->requests);
3887 inject_pending_event(vcpu);
3889 /* enable NMI/IRQ window open exits if needed */
3890 if (vcpu->arch.nmi_pending)
3891 kvm_x86_ops->enable_nmi_window(vcpu);
3892 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3893 kvm_x86_ops->enable_irq_window(vcpu);
3895 if (kvm_lapic_enabled(vcpu)) {
3896 update_cr8_intercept(vcpu);
3897 kvm_lapic_sync_to_vapic(vcpu);
3900 up_read(&vcpu->kvm->slots_lock);
3904 if (unlikely(vcpu->arch.switch_db_regs)) {
3906 set_debugreg(vcpu->arch.eff_db[0], 0);
3907 set_debugreg(vcpu->arch.eff_db[1], 1);
3908 set_debugreg(vcpu->arch.eff_db[2], 2);
3909 set_debugreg(vcpu->arch.eff_db[3], 3);
3912 trace_kvm_entry(vcpu->vcpu_id);
3913 kvm_x86_ops->run(vcpu);
3915 if (unlikely(vcpu->arch.switch_db_regs || test_thread_flag(TIF_DEBUG))) {
3916 set_debugreg(current->thread.debugreg0, 0);
3917 set_debugreg(current->thread.debugreg1, 1);
3918 set_debugreg(current->thread.debugreg2, 2);
3919 set_debugreg(current->thread.debugreg3, 3);
3920 set_debugreg(current->thread.debugreg6, 6);
3921 set_debugreg(current->thread.debugreg7, 7);
3924 set_bit(KVM_REQ_KICK, &vcpu->requests);
3930 * We must have an instruction between local_irq_enable() and
3931 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3932 * the interrupt shadow. The stat.exits increment will do nicely.
3933 * But we need to prevent reordering, hence this barrier():
3941 down_read(&vcpu->kvm->slots_lock);
3944 * Profile KVM exit RIPs:
3946 if (unlikely(prof_on == KVM_PROFILING)) {
3947 unsigned long rip = kvm_rip_read(vcpu);
3948 profile_hit(KVM_PROFILING, (void *)rip);
3952 kvm_lapic_sync_from_vapic(vcpu);
3954 r = kvm_x86_ops->handle_exit(vcpu);
3960 static int __vcpu_run(struct kvm_vcpu *vcpu)
3964 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3965 pr_debug("vcpu %d received sipi with vector # %x\n",
3966 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3967 kvm_lapic_reset(vcpu);
3968 r = kvm_arch_vcpu_reset(vcpu);
3971 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3974 down_read(&vcpu->kvm->slots_lock);
3979 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3980 r = vcpu_enter_guest(vcpu);
3982 up_read(&vcpu->kvm->slots_lock);
3983 kvm_vcpu_block(vcpu);
3984 down_read(&vcpu->kvm->slots_lock);
3985 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3987 switch(vcpu->arch.mp_state) {
3988 case KVM_MP_STATE_HALTED:
3989 vcpu->arch.mp_state =
3990 KVM_MP_STATE_RUNNABLE;
3991 case KVM_MP_STATE_RUNNABLE:
3993 case KVM_MP_STATE_SIPI_RECEIVED:
4004 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
4005 if (kvm_cpu_has_pending_timer(vcpu))
4006 kvm_inject_pending_timer_irqs(vcpu);
4008 if (dm_request_for_irq_injection(vcpu)) {
4010 vcpu->run->exit_reason = KVM_EXIT_INTR;
4011 ++vcpu->stat.request_irq_exits;
4013 if (signal_pending(current)) {
4015 vcpu->run->exit_reason = KVM_EXIT_INTR;
4016 ++vcpu->stat.signal_exits;
4018 if (need_resched()) {
4019 up_read(&vcpu->kvm->slots_lock);
4021 down_read(&vcpu->kvm->slots_lock);
4025 up_read(&vcpu->kvm->slots_lock);
4026 post_kvm_run_save(vcpu);
4033 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
4040 if (vcpu->sigset_active)
4041 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
4043 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
4044 kvm_vcpu_block(vcpu);
4045 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
4050 /* re-sync apic's tpr */
4051 if (!irqchip_in_kernel(vcpu->kvm))
4052 kvm_set_cr8(vcpu, kvm_run->cr8);
4054 if (vcpu->arch.pio.cur_count) {
4055 r = complete_pio(vcpu);
4059 if (vcpu->mmio_needed) {
4060 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
4061 vcpu->mmio_read_completed = 1;
4062 vcpu->mmio_needed = 0;
4064 down_read(&vcpu->kvm->slots_lock);
4065 r = emulate_instruction(vcpu, vcpu->arch.mmio_fault_cr2, 0,
4066 EMULTYPE_NO_DECODE);
4067 up_read(&vcpu->kvm->slots_lock);
4068 if (r == EMULATE_DO_MMIO) {
4070 * Read-modify-write. Back to userspace.
4076 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
4077 kvm_register_write(vcpu, VCPU_REGS_RAX,
4078 kvm_run->hypercall.ret);
4080 r = __vcpu_run(vcpu);
4083 if (vcpu->sigset_active)
4084 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
4090 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4094 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4095 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4096 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4097 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4098 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4099 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4100 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4101 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4102 #ifdef CONFIG_X86_64
4103 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
4104 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
4105 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
4106 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
4107 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
4108 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
4109 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
4110 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
4113 regs->rip = kvm_rip_read(vcpu);
4114 regs->rflags = kvm_get_rflags(vcpu);
4121 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
4125 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
4126 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
4127 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
4128 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
4129 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
4130 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
4131 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
4132 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
4133 #ifdef CONFIG_X86_64
4134 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
4135 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
4136 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
4137 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
4138 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
4139 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
4140 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
4141 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
4144 kvm_rip_write(vcpu, regs->rip);
4145 kvm_set_rflags(vcpu, regs->rflags);
4147 vcpu->arch.exception.pending = false;
4154 void kvm_get_segment(struct kvm_vcpu *vcpu,
4155 struct kvm_segment *var, int seg)
4157 kvm_x86_ops->get_segment(vcpu, var, seg);
4160 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
4162 struct kvm_segment cs;
4164 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
4168 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
4170 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
4171 struct kvm_sregs *sregs)
4173 struct descriptor_table dt;
4177 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4178 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4179 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4180 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4181 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4182 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4184 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4185 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4187 kvm_x86_ops->get_idt(vcpu, &dt);
4188 sregs->idt.limit = dt.limit;
4189 sregs->idt.base = dt.base;
4190 kvm_x86_ops->get_gdt(vcpu, &dt);
4191 sregs->gdt.limit = dt.limit;
4192 sregs->gdt.base = dt.base;
4194 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4195 sregs->cr0 = vcpu->arch.cr0;
4196 sregs->cr2 = vcpu->arch.cr2;
4197 sregs->cr3 = vcpu->arch.cr3;
4198 sregs->cr4 = vcpu->arch.cr4;
4199 sregs->cr8 = kvm_get_cr8(vcpu);
4200 sregs->efer = vcpu->arch.shadow_efer;
4201 sregs->apic_base = kvm_get_apic_base(vcpu);
4203 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
4205 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
4206 set_bit(vcpu->arch.interrupt.nr,
4207 (unsigned long *)sregs->interrupt_bitmap);
4214 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
4215 struct kvm_mp_state *mp_state)
4218 mp_state->mp_state = vcpu->arch.mp_state;
4223 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
4224 struct kvm_mp_state *mp_state)
4227 vcpu->arch.mp_state = mp_state->mp_state;
4232 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4233 struct kvm_segment *var, int seg)
4235 kvm_x86_ops->set_segment(vcpu, var, seg);
4238 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
4239 struct kvm_segment *kvm_desct)
4241 kvm_desct->base = get_desc_base(seg_desc);
4242 kvm_desct->limit = get_desc_limit(seg_desc);
4244 kvm_desct->limit <<= 12;
4245 kvm_desct->limit |= 0xfff;
4247 kvm_desct->selector = selector;
4248 kvm_desct->type = seg_desc->type;
4249 kvm_desct->present = seg_desc->p;
4250 kvm_desct->dpl = seg_desc->dpl;
4251 kvm_desct->db = seg_desc->d;
4252 kvm_desct->s = seg_desc->s;
4253 kvm_desct->l = seg_desc->l;
4254 kvm_desct->g = seg_desc->g;
4255 kvm_desct->avl = seg_desc->avl;
4257 kvm_desct->unusable = 1;
4259 kvm_desct->unusable = 0;
4260 kvm_desct->padding = 0;
4263 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
4265 struct descriptor_table *dtable)
4267 if (selector & 1 << 2) {
4268 struct kvm_segment kvm_seg;
4270 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
4272 if (kvm_seg.unusable)
4275 dtable->limit = kvm_seg.limit;
4276 dtable->base = kvm_seg.base;
4279 kvm_x86_ops->get_gdt(vcpu, dtable);
4282 /* allowed just for 8 bytes segments */
4283 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4284 struct desc_struct *seg_desc)
4286 struct descriptor_table dtable;
4287 u16 index = selector >> 3;
4289 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4291 if (dtable.limit < index * 8 + 7) {
4292 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
4295 return kvm_read_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4298 /* allowed just for 8 bytes segments */
4299 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4300 struct desc_struct *seg_desc)
4302 struct descriptor_table dtable;
4303 u16 index = selector >> 3;
4305 get_segment_descriptor_dtable(vcpu, selector, &dtable);
4307 if (dtable.limit < index * 8 + 7)
4309 return kvm_write_guest_virt(dtable.base + index*8, seg_desc, sizeof(*seg_desc), vcpu);
4312 static gpa_t get_tss_base_addr(struct kvm_vcpu *vcpu,
4313 struct desc_struct *seg_desc)
4315 u32 base_addr = get_desc_base(seg_desc);
4317 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
4320 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
4322 struct kvm_segment kvm_seg;
4324 kvm_get_segment(vcpu, &kvm_seg, seg);
4325 return kvm_seg.selector;
4328 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
4330 struct kvm_segment *kvm_seg)
4332 struct desc_struct seg_desc;
4334 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
4336 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
4340 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
4342 struct kvm_segment segvar = {
4343 .base = selector << 4,
4345 .selector = selector,
4356 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
4360 static int is_vm86_segment(struct kvm_vcpu *vcpu, int seg)
4362 return (seg != VCPU_SREG_LDTR) &&
4363 (seg != VCPU_SREG_TR) &&
4364 (kvm_get_rflags(vcpu) & X86_EFLAGS_VM);
4367 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
4368 int type_bits, int seg)
4370 struct kvm_segment kvm_seg;
4372 if (is_vm86_segment(vcpu, seg) || !(vcpu->arch.cr0 & X86_CR0_PE))
4373 return kvm_load_realmode_segment(vcpu, selector, seg);
4374 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
4376 kvm_seg.type |= type_bits;
4378 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
4379 seg != VCPU_SREG_LDTR)
4381 kvm_seg.unusable = 1;
4383 kvm_set_segment(vcpu, &kvm_seg, seg);
4387 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
4388 struct tss_segment_32 *tss)
4390 tss->cr3 = vcpu->arch.cr3;
4391 tss->eip = kvm_rip_read(vcpu);
4392 tss->eflags = kvm_get_rflags(vcpu);
4393 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4394 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4395 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4396 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4397 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4398 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4399 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
4400 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
4401 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4402 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4403 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4404 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4405 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
4406 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
4407 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4410 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
4411 struct tss_segment_32 *tss)
4413 kvm_set_cr3(vcpu, tss->cr3);
4415 kvm_rip_write(vcpu, tss->eip);
4416 kvm_set_rflags(vcpu, tss->eflags | 2);
4418 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
4419 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
4420 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
4421 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
4422 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
4423 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
4424 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
4425 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
4427 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
4430 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4433 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4436 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4439 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4442 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
4445 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
4450 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
4451 struct tss_segment_16 *tss)
4453 tss->ip = kvm_rip_read(vcpu);
4454 tss->flag = kvm_get_rflags(vcpu);
4455 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
4456 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
4457 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
4458 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
4459 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
4460 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
4461 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
4462 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
4464 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
4465 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
4466 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
4467 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
4468 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
4471 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
4472 struct tss_segment_16 *tss)
4474 kvm_rip_write(vcpu, tss->ip);
4475 kvm_set_rflags(vcpu, tss->flag | 2);
4476 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
4477 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
4478 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
4479 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
4480 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
4481 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
4482 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
4483 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
4485 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
4488 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
4491 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
4494 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
4497 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
4502 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
4503 u16 old_tss_sel, u32 old_tss_base,
4504 struct desc_struct *nseg_desc)
4506 struct tss_segment_16 tss_segment_16;
4509 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4510 sizeof tss_segment_16))
4513 save_state_to_tss16(vcpu, &tss_segment_16);
4515 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
4516 sizeof tss_segment_16))
4519 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4520 &tss_segment_16, sizeof tss_segment_16))
4523 if (old_tss_sel != 0xffff) {
4524 tss_segment_16.prev_task_link = old_tss_sel;
4526 if (kvm_write_guest(vcpu->kvm,
4527 get_tss_base_addr(vcpu, nseg_desc),
4528 &tss_segment_16.prev_task_link,
4529 sizeof tss_segment_16.prev_task_link))
4533 if (load_state_from_tss16(vcpu, &tss_segment_16))
4541 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
4542 u16 old_tss_sel, u32 old_tss_base,
4543 struct desc_struct *nseg_desc)
4545 struct tss_segment_32 tss_segment_32;
4548 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4549 sizeof tss_segment_32))
4552 save_state_to_tss32(vcpu, &tss_segment_32);
4554 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
4555 sizeof tss_segment_32))
4558 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
4559 &tss_segment_32, sizeof tss_segment_32))
4562 if (old_tss_sel != 0xffff) {
4563 tss_segment_32.prev_task_link = old_tss_sel;
4565 if (kvm_write_guest(vcpu->kvm,
4566 get_tss_base_addr(vcpu, nseg_desc),
4567 &tss_segment_32.prev_task_link,
4568 sizeof tss_segment_32.prev_task_link))
4572 if (load_state_from_tss32(vcpu, &tss_segment_32))
4580 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
4582 struct kvm_segment tr_seg;
4583 struct desc_struct cseg_desc;
4584 struct desc_struct nseg_desc;
4586 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
4587 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
4589 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
4591 /* FIXME: Handle errors. Failure to read either TSS or their
4592 * descriptors should generate a pagefault.
4594 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
4597 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
4600 if (reason != TASK_SWITCH_IRET) {
4603 cpl = kvm_x86_ops->get_cpl(vcpu);
4604 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
4605 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
4610 if (!nseg_desc.p || get_desc_limit(&nseg_desc) < 0x67) {
4611 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
4615 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4616 cseg_desc.type &= ~(1 << 1); //clear the B flag
4617 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4620 if (reason == TASK_SWITCH_IRET) {
4621 u32 eflags = kvm_get_rflags(vcpu);
4622 kvm_set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4625 /* set back link to prev task only if NT bit is set in eflags
4626 note that old_tss_sel is not used afetr this point */
4627 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4628 old_tss_sel = 0xffff;
4630 if (nseg_desc.type & 8)
4631 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4632 old_tss_base, &nseg_desc);
4634 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4635 old_tss_base, &nseg_desc);
4637 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4638 u32 eflags = kvm_get_rflags(vcpu);
4639 kvm_set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4642 if (reason != TASK_SWITCH_IRET) {
4643 nseg_desc.type |= (1 << 1);
4644 save_guest_segment_descriptor(vcpu, tss_selector,
4648 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4649 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4651 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4655 EXPORT_SYMBOL_GPL(kvm_task_switch);
4657 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4658 struct kvm_sregs *sregs)
4660 int mmu_reset_needed = 0;
4661 int pending_vec, max_bits;
4662 struct descriptor_table dt;
4666 dt.limit = sregs->idt.limit;
4667 dt.base = sregs->idt.base;
4668 kvm_x86_ops->set_idt(vcpu, &dt);
4669 dt.limit = sregs->gdt.limit;
4670 dt.base = sregs->gdt.base;
4671 kvm_x86_ops->set_gdt(vcpu, &dt);
4673 vcpu->arch.cr2 = sregs->cr2;
4674 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4675 vcpu->arch.cr3 = sregs->cr3;
4677 kvm_set_cr8(vcpu, sregs->cr8);
4679 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4680 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4681 kvm_set_apic_base(vcpu, sregs->apic_base);
4683 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4685 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4686 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4687 vcpu->arch.cr0 = sregs->cr0;
4689 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4690 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4691 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
4692 load_pdptrs(vcpu, vcpu->arch.cr3);
4693 mmu_reset_needed = 1;
4696 if (mmu_reset_needed)
4697 kvm_mmu_reset_context(vcpu);
4699 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4700 pending_vec = find_first_bit(
4701 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
4702 if (pending_vec < max_bits) {
4703 kvm_queue_interrupt(vcpu, pending_vec, false);
4704 pr_debug("Set back pending irq %d\n", pending_vec);
4705 if (irqchip_in_kernel(vcpu->kvm))
4706 kvm_pic_clear_isr_ack(vcpu->kvm);
4709 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4710 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4711 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4712 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4713 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4714 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4716 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4717 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4719 update_cr8_intercept(vcpu);
4721 /* Older userspace won't unhalt the vcpu on reset. */
4722 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
4723 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4724 !(vcpu->arch.cr0 & X86_CR0_PE))
4725 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4732 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4733 struct kvm_guest_debug *dbg)
4735 unsigned long rflags;
4740 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
4742 if (vcpu->arch.exception.pending)
4744 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4745 kvm_queue_exception(vcpu, DB_VECTOR);
4747 kvm_queue_exception(vcpu, BP_VECTOR);
4751 * Read rflags as long as potentially injected trace flags are still
4754 rflags = kvm_get_rflags(vcpu);
4756 vcpu->guest_debug = dbg->control;
4757 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
4758 vcpu->guest_debug = 0;
4760 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
4761 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4762 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4763 vcpu->arch.switch_db_regs =
4764 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4766 for (i = 0; i < KVM_NR_DB_REGS; i++)
4767 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4768 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4771 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
4772 vcpu->arch.singlestep_cs =
4773 get_segment_selector(vcpu, VCPU_SREG_CS);
4774 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu);
4778 * Trigger an rflags update that will inject or remove the trace
4781 kvm_set_rflags(vcpu, rflags);
4783 kvm_x86_ops->set_guest_debug(vcpu, dbg);
4794 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4795 * we have asm/x86/processor.h
4806 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4807 #ifdef CONFIG_X86_64
4808 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4810 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4815 * Translate a guest virtual address to a guest physical address.
4817 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4818 struct kvm_translation *tr)
4820 unsigned long vaddr = tr->linear_address;
4824 down_read(&vcpu->kvm->slots_lock);
4825 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4826 up_read(&vcpu->kvm->slots_lock);
4827 tr->physical_address = gpa;
4828 tr->valid = gpa != UNMAPPED_GVA;
4836 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4838 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4842 memcpy(fpu->fpr, fxsave->st_space, 128);
4843 fpu->fcw = fxsave->cwd;
4844 fpu->fsw = fxsave->swd;
4845 fpu->ftwx = fxsave->twd;
4846 fpu->last_opcode = fxsave->fop;
4847 fpu->last_ip = fxsave->rip;
4848 fpu->last_dp = fxsave->rdp;
4849 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4856 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4858 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4862 memcpy(fxsave->st_space, fpu->fpr, 128);
4863 fxsave->cwd = fpu->fcw;
4864 fxsave->swd = fpu->fsw;
4865 fxsave->twd = fpu->ftwx;
4866 fxsave->fop = fpu->last_opcode;
4867 fxsave->rip = fpu->last_ip;
4868 fxsave->rdp = fpu->last_dp;
4869 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4876 void fx_init(struct kvm_vcpu *vcpu)
4878 unsigned after_mxcsr_mask;
4881 * Touch the fpu the first time in non atomic context as if
4882 * this is the first fpu instruction the exception handler
4883 * will fire before the instruction returns and it'll have to
4884 * allocate ram with GFP_KERNEL.
4887 kvm_fx_save(&vcpu->arch.host_fx_image);
4889 /* Initialize guest FPU by resetting ours and saving into guest's */
4891 kvm_fx_save(&vcpu->arch.host_fx_image);
4893 kvm_fx_save(&vcpu->arch.guest_fx_image);
4894 kvm_fx_restore(&vcpu->arch.host_fx_image);
4897 vcpu->arch.cr0 |= X86_CR0_ET;
4898 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4899 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4900 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4901 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4903 EXPORT_SYMBOL_GPL(fx_init);
4905 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4907 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4910 vcpu->guest_fpu_loaded = 1;
4911 kvm_fx_save(&vcpu->arch.host_fx_image);
4912 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4914 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4916 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4918 if (!vcpu->guest_fpu_loaded)
4921 vcpu->guest_fpu_loaded = 0;
4922 kvm_fx_save(&vcpu->arch.guest_fx_image);
4923 kvm_fx_restore(&vcpu->arch.host_fx_image);
4924 ++vcpu->stat.fpu_reload;
4926 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4928 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4930 if (vcpu->arch.time_page) {
4931 kvm_release_page_dirty(vcpu->arch.time_page);
4932 vcpu->arch.time_page = NULL;
4935 kvm_x86_ops->vcpu_free(vcpu);
4938 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4941 return kvm_x86_ops->vcpu_create(kvm, id);
4944 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4948 /* We do fxsave: this must be aligned. */
4949 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4951 vcpu->arch.mtrr_state.have_fixed = 1;
4953 r = kvm_arch_vcpu_reset(vcpu);
4955 r = kvm_mmu_setup(vcpu);
4962 kvm_x86_ops->vcpu_free(vcpu);
4966 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4969 kvm_mmu_unload(vcpu);
4972 kvm_x86_ops->vcpu_free(vcpu);
4975 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4977 vcpu->arch.nmi_pending = false;
4978 vcpu->arch.nmi_injected = false;
4980 vcpu->arch.switch_db_regs = 0;
4981 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4982 vcpu->arch.dr6 = DR6_FIXED_1;
4983 vcpu->arch.dr7 = DR7_FIXED_1;
4985 return kvm_x86_ops->vcpu_reset(vcpu);
4988 int kvm_arch_hardware_enable(void *garbage)
4991 * Since this may be called from a hotplug notifcation,
4992 * we can't get the CPU frequency directly.
4994 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4995 int cpu = raw_smp_processor_id();
4996 per_cpu(cpu_tsc_khz, cpu) = 0;
4999 kvm_shared_msr_cpu_online();
5001 return kvm_x86_ops->hardware_enable(garbage);
5004 void kvm_arch_hardware_disable(void *garbage)
5006 kvm_x86_ops->hardware_disable(garbage);
5009 int kvm_arch_hardware_setup(void)
5011 return kvm_x86_ops->hardware_setup();
5014 void kvm_arch_hardware_unsetup(void)
5016 kvm_x86_ops->hardware_unsetup();
5019 void kvm_arch_check_processor_compat(void *rtn)
5021 kvm_x86_ops->check_processor_compatibility(rtn);
5024 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5030 BUG_ON(vcpu->kvm == NULL);
5033 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5034 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5035 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5037 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5039 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5044 vcpu->arch.pio_data = page_address(page);
5046 r = kvm_mmu_create(vcpu);
5048 goto fail_free_pio_data;
5050 if (irqchip_in_kernel(kvm)) {
5051 r = kvm_create_lapic(vcpu);
5053 goto fail_mmu_destroy;
5056 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5058 if (!vcpu->arch.mce_banks) {
5060 goto fail_mmu_destroy;
5062 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5067 kvm_mmu_destroy(vcpu);
5069 free_page((unsigned long)vcpu->arch.pio_data);
5074 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5076 kvm_free_lapic(vcpu);
5077 down_read(&vcpu->kvm->slots_lock);
5078 kvm_mmu_destroy(vcpu);
5079 up_read(&vcpu->kvm->slots_lock);
5080 free_page((unsigned long)vcpu->arch.pio_data);
5083 struct kvm *kvm_arch_create_vm(void)
5085 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5088 return ERR_PTR(-ENOMEM);
5090 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5091 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5093 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5094 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5096 rdtscll(kvm->arch.vm_init_tsc);
5101 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5104 kvm_mmu_unload(vcpu);
5108 static void kvm_free_vcpus(struct kvm *kvm)
5111 struct kvm_vcpu *vcpu;
5114 * Unpin any mmu pages first.
5116 kvm_for_each_vcpu(i, vcpu, kvm)
5117 kvm_unload_vcpu_mmu(vcpu);
5118 kvm_for_each_vcpu(i, vcpu, kvm)
5119 kvm_arch_vcpu_free(vcpu);
5121 mutex_lock(&kvm->lock);
5122 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5123 kvm->vcpus[i] = NULL;
5125 atomic_set(&kvm->online_vcpus, 0);
5126 mutex_unlock(&kvm->lock);
5129 void kvm_arch_sync_events(struct kvm *kvm)
5131 kvm_free_all_assigned_devices(kvm);
5134 void kvm_arch_destroy_vm(struct kvm *kvm)
5136 kvm_iommu_unmap_guest(kvm);
5138 kfree(kvm->arch.vpic);
5139 kfree(kvm->arch.vioapic);
5140 kvm_free_vcpus(kvm);
5141 kvm_free_physmem(kvm);
5142 if (kvm->arch.apic_access_page)
5143 put_page(kvm->arch.apic_access_page);
5144 if (kvm->arch.ept_identity_pagetable)
5145 put_page(kvm->arch.ept_identity_pagetable);
5149 int kvm_arch_set_memory_region(struct kvm *kvm,
5150 struct kvm_userspace_memory_region *mem,
5151 struct kvm_memory_slot old,
5154 int npages = mem->memory_size >> PAGE_SHIFT;
5155 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
5157 /*To keep backward compatibility with older userspace,
5158 *x86 needs to hanlde !user_alloc case.
5161 if (npages && !old.rmap) {
5162 unsigned long userspace_addr;
5164 down_write(¤t->mm->mmap_sem);
5165 userspace_addr = do_mmap(NULL, 0,
5167 PROT_READ | PROT_WRITE,
5168 MAP_PRIVATE | MAP_ANONYMOUS,
5170 up_write(¤t->mm->mmap_sem);
5172 if (IS_ERR((void *)userspace_addr))
5173 return PTR_ERR((void *)userspace_addr);
5175 /* set userspace_addr atomically for kvm_hva_to_rmapp */
5176 spin_lock(&kvm->mmu_lock);
5177 memslot->userspace_addr = userspace_addr;
5178 spin_unlock(&kvm->mmu_lock);
5180 if (!old.user_alloc && old.rmap) {
5183 down_write(¤t->mm->mmap_sem);
5184 ret = do_munmap(current->mm, old.userspace_addr,
5185 old.npages * PAGE_SIZE);
5186 up_write(¤t->mm->mmap_sem);
5189 "kvm_vm_ioctl_set_memory_region: "
5190 "failed to munmap memory\n");
5195 spin_lock(&kvm->mmu_lock);
5196 if (!kvm->arch.n_requested_mmu_pages) {
5197 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
5198 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
5201 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
5202 spin_unlock(&kvm->mmu_lock);
5207 void kvm_arch_flush_shadow(struct kvm *kvm)
5209 kvm_mmu_zap_all(kvm);
5210 kvm_reload_remote_mmus(kvm);
5213 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
5215 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
5216 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
5217 || vcpu->arch.nmi_pending ||
5218 (kvm_arch_interrupt_allowed(vcpu) &&
5219 kvm_cpu_has_interrupt(vcpu));
5222 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
5225 int cpu = vcpu->cpu;
5227 if (waitqueue_active(&vcpu->wq)) {
5228 wake_up_interruptible(&vcpu->wq);
5229 ++vcpu->stat.halt_wakeup;
5233 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
5234 if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
5235 smp_send_reschedule(cpu);
5239 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
5241 return kvm_x86_ops->interrupt_allowed(vcpu);
5244 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
5246 unsigned long rflags;
5248 rflags = kvm_x86_ops->get_rflags(vcpu);
5249 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5250 rflags &= ~(unsigned long)(X86_EFLAGS_TF | X86_EFLAGS_RF);
5253 EXPORT_SYMBOL_GPL(kvm_get_rflags);
5255 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
5257 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
5258 vcpu->arch.singlestep_cs ==
5259 get_segment_selector(vcpu, VCPU_SREG_CS) &&
5260 vcpu->arch.singlestep_rip == kvm_rip_read(vcpu))
5261 rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
5262 kvm_x86_ops->set_rflags(vcpu, rflags);
5264 EXPORT_SYMBOL_GPL(kvm_set_rflags);
5266 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
5267 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
5268 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
5269 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
5270 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
5271 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
5272 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
5273 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
5274 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
5275 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
5276 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);