arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 500;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 139 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 140 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 141
 142 static bool __read_mostly vector_hashing = true;
 143 module_param(vector_hashing, bool, S_IRUGO);
 144
 145 bool __read_mostly enable_vmware_backdoor = false;
 146 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 147 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 148
 149 #define KVM_NR_SHARED_MSRS 16
 150
 151 struct kvm_shared_msrs_global {
 152         int nr;
 153         u32 msrs[KVM_NR_SHARED_MSRS];
 154 };
 155
 156 struct kvm_shared_msrs {
 157         struct user_return_notifier urn;
 158         bool registered;
 159         struct kvm_shared_msr_values {
 160                 u64 host;
 161                 u64 curr;
 162         } values[KVM_NR_SHARED_MSRS];
 163 };
 164
 165 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 166 static struct kvm_shared_msrs __percpu *shared_msrs;
 167
 168 struct kvm_stats_debugfs_item debugfs_entries[] = {
 169         { "pf_fixed", VCPU_STAT(pf_fixed) },
 170         { "pf_guest", VCPU_STAT(pf_guest) },
 171         { "tlb_flush", VCPU_STAT(tlb_flush) },
 172         { "invlpg", VCPU_STAT(invlpg) },
 173         { "exits", VCPU_STAT(exits) },
 174         { "io_exits", VCPU_STAT(io_exits) },
 175         { "mmio_exits", VCPU_STAT(mmio_exits) },
 176         { "signal_exits", VCPU_STAT(signal_exits) },
 177         { "irq_window", VCPU_STAT(irq_window_exits) },
 178         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 179         { "halt_exits", VCPU_STAT(halt_exits) },
 180         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 181         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 182         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 183         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 184         { "hypercalls", VCPU_STAT(hypercalls) },
 185         { "request_irq", VCPU_STAT(request_irq_exits) },
 186         { "irq_exits", VCPU_STAT(irq_exits) },
 187         { "host_state_reload", VCPU_STAT(host_state_reload) },
 188         { "fpu_reload", VCPU_STAT(fpu_reload) },
 189         { "insn_emulation", VCPU_STAT(insn_emulation) },
 190         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 191         { "irq_injections", VCPU_STAT(irq_injections) },
 192         { "nmi_injections", VCPU_STAT(nmi_injections) },
 193         { "req_event", VCPU_STAT(req_event) },
 194         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 195         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 196         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 197         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 198         { "mmu_flooded", VM_STAT(mmu_flooded) },
 199         { "mmu_recycled", VM_STAT(mmu_recycled) },
 200         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 201         { "mmu_unsync", VM_STAT(mmu_unsync) },
 202         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 203         { "largepages", VM_STAT(lpages) },
 204         { "max_mmu_page_hash_collisions",
 205                 VM_STAT(max_mmu_page_hash_collisions) },
 206         { NULL }
 207 };
 208
 209 u64 __read_mostly host_xcr0;
 210
 211 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 212
 213 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 214 {
 215         int i;
 216         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 217                 vcpu->arch.apf.gfns[i] = ~0;
 218 }
 219
 220 static void kvm_on_user_return(struct user_return_notifier *urn)
 221 {
 222         unsigned slot;
 223         struct kvm_shared_msrs *locals
 224                 = container_of(urn, struct kvm_shared_msrs, urn);
 225         struct kvm_shared_msr_values *values;
 226         unsigned long flags;
 227
 228         /*
 229          * Disabling irqs at this point since the following code could be
 230          * interrupted and executed through kvm_arch_hardware_disable()
 231          */
 232         local_irq_save(flags);
 233         if (locals->registered) {
 234                 locals->registered = false;
 235                 user_return_notifier_unregister(urn);
 236         }
 237         local_irq_restore(flags);
 238         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 239                 values = &locals->values[slot];
 240                 if (values->host != values->curr) {
 241                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 242                         values->curr = values->host;
 243                 }
 244         }
 245 }
 246
 247 static void shared_msr_update(unsigned slot, u32 msr)
 248 {
 249         u64 value;
 250         unsigned int cpu = smp_processor_id();
 251         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 252
 253         /* only read, and nobody should modify it at this time,
 254          * so don't need lock */
 255         if (slot >= shared_msrs_global.nr) {
 256                 printk(KERN_ERR "kvm: invalid MSR slot!");
 257                 return;
 258         }
 259         rdmsrl_safe(msr, &value);
 260         smsr->values[slot].host = value;
 261         smsr->values[slot].curr = value;
 262 }
 263
 264 void kvm_define_shared_msr(unsigned slot, u32 msr)
 265 {
 266         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 267         shared_msrs_global.msrs[slot] = msr;
 268         if (slot >= shared_msrs_global.nr)
 269                 shared_msrs_global.nr = slot + 1;
 270 }
 271 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 272
 273 static void kvm_shared_msr_cpu_online(void)
 274 {
 275         unsigned i;
 276
 277         for (i = 0; i < shared_msrs_global.nr; ++i)
 278                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 279 }
 280
 281 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 282 {
 283         unsigned int cpu = smp_processor_id();
 284         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 285         int err;
 286
 287         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 288                 return 0;
 289         smsr->values[slot].curr = value;
 290         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 291         if (err)
 292                 return 1;
 293
 294         if (!smsr->registered) {
 295                 smsr->urn.on_user_return = kvm_on_user_return;
 296                 user_return_notifier_register(&smsr->urn);
 297                 smsr->registered = true;
 298         }
 299         return 0;
 300 }
 301 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 302
 303 static void drop_user_return_notifiers(void)
 304 {
 305         unsigned int cpu = smp_processor_id();
 306         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 307
 308         if (smsr->registered)
 309                 kvm_on_user_return(&smsr->urn);
 310 }
 311
 312 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 313 {
 314         return vcpu->arch.apic_base;
 315 }
 316 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 317
 318 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 319 {
 320         u64 old_state = vcpu->arch.apic_base &
 321                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 322         u64 new_state = msr_info->data &
 323                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 324         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 325                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 326
 327         if ((msr_info->data & reserved_bits) || new_state == X2APIC_ENABLE)
 328                 return 1;
 329         if (!msr_info->host_initiated &&
 330             ((new_state == MSR_IA32_APICBASE_ENABLE &&
 331               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 332              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 333               old_state == 0)))
 334                 return 1;
 335
 336         kvm_lapic_set_base(vcpu, msr_info->data);
 337         return 0;
 338 }
 339 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 340
 341 asmlinkage __visible void kvm_spurious_fault(void)
 342 {
 343         /* Fault while not rebooting.  We want the trace. */
 344         BUG();
 345 }
 346 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 347
 348 #define EXCPT_BENIGN            0
 349 #define EXCPT_CONTRIBUTORY      1
 350 #define EXCPT_PF                2
 351
 352 static int exception_class(int vector)
 353 {
 354         switch (vector) {
 355         case PF_VECTOR:
 356                 return EXCPT_PF;
 357         case DE_VECTOR:
 358         case TS_VECTOR:
 359         case NP_VECTOR:
 360         case SS_VECTOR:
 361         case GP_VECTOR:
 362                 return EXCPT_CONTRIBUTORY;
 363         default:
 364                 break;
 365         }
 366         return EXCPT_BENIGN;
 367 }
 368
 369 #define EXCPT_FAULT             0
 370 #define EXCPT_TRAP              1
 371 #define EXCPT_ABORT             2
 372 #define EXCPT_INTERRUPT         3
 373
 374 static int exception_type(int vector)
 375 {
 376         unsigned int mask;
 377
 378         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 379                 return EXCPT_INTERRUPT;
 380
 381         mask = 1 << vector;
 382
 383         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 384         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 385                 return EXCPT_TRAP;
 386
 387         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 388                 return EXCPT_ABORT;
 389
 390         /* Reserved exceptions will result in fault */
 391         return EXCPT_FAULT;
 392 }
 393
 394 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 395                 unsigned nr, bool has_error, u32 error_code,
 396                 bool reinject)
 397 {
 398         u32 prev_nr;
 399         int class1, class2;
 400
 401         kvm_make_request(KVM_REQ_EVENT, vcpu);
 402
 403         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 404         queue:
 405                 if (has_error && !is_protmode(vcpu))
 406                         has_error = false;
 407                 if (reinject) {
 408                         /*
 409                          * On vmentry, vcpu->arch.exception.pending is only
 410                          * true if an event injection was blocked by
 411                          * nested_run_pending.  In that case, however,
 412                          * vcpu_enter_guest requests an immediate exit,
 413                          * and the guest shouldn't proceed far enough to
 414                          * need reinjection.
 415                          */
 416                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 417                         vcpu->arch.exception.injected = true;
 418                 } else {
 419                         vcpu->arch.exception.pending = true;
 420                         vcpu->arch.exception.injected = false;
 421                 }
 422                 vcpu->arch.exception.has_error_code = has_error;
 423                 vcpu->arch.exception.nr = nr;
 424                 vcpu->arch.exception.error_code = error_code;
 425                 return;
 426         }
 427
 428         /* to check exception */
 429         prev_nr = vcpu->arch.exception.nr;
 430         if (prev_nr == DF_VECTOR) {
 431                 /* triple fault -> shutdown */
 432                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 433                 return;
 434         }
 435         class1 = exception_class(prev_nr);
 436         class2 = exception_class(nr);
 437         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 438                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 439                 /*
 440                  * Generate double fault per SDM Table 5-5.  Set
 441                  * exception.pending = true so that the double fault
 442                  * can trigger a nested vmexit.
 443                  */
 444                 vcpu->arch.exception.pending = true;
 445                 vcpu->arch.exception.injected = false;
 446                 vcpu->arch.exception.has_error_code = true;
 447                 vcpu->arch.exception.nr = DF_VECTOR;
 448                 vcpu->arch.exception.error_code = 0;
 449         } else
 450                 /* replace previous exception with a new one in a hope
 451                    that instruction re-execution will regenerate lost
 452                    exception */
 453                 goto queue;
 454 }
 455
 456 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 457 {
 458         kvm_multiple_exception(vcpu, nr, false, 0, false);
 459 }
 460 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 461
 462 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 463 {
 464         kvm_multiple_exception(vcpu, nr, false, 0, true);
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 467
 468 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 469 {
 470         if (err)
 471                 kvm_inject_gp(vcpu, 0);
 472         else
 473                 return kvm_skip_emulated_instruction(vcpu);
 474
 475         return 1;
 476 }
 477 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 478
 479 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 480 {
 481         ++vcpu->stat.pf_guest;
 482         vcpu->arch.exception.nested_apf =
 483                 is_guest_mode(vcpu) && fault->async_page_fault;
 484         if (vcpu->arch.exception.nested_apf)
 485                 vcpu->arch.apf.nested_apf_token = fault->address;
 486         else
 487                 vcpu->arch.cr2 = fault->address;
 488         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 489 }
 490 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 491
 492 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 493 {
 494         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 495                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 496         else
 497                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 498
 499         return fault->nested_page_fault;
 500 }
 501
 502 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 503 {
 504         atomic_inc(&vcpu->arch.nmi_queued);
 505         kvm_make_request(KVM_REQ_NMI, vcpu);
 506 }
 507 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 508
 509 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 510 {
 511         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 512 }
 513 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 514
 515 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 516 {
 517         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 518 }
 519 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 520
 521 /*
 522  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 523  * a #GP and return false.
 524  */
 525 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 526 {
 527         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 528                 return true;
 529         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 530         return false;
 531 }
 532 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 533
 534 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 535 {
 536         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 537                 return true;
 538
 539         kvm_queue_exception(vcpu, UD_VECTOR);
 540         return false;
 541 }
 542 EXPORT_SYMBOL_GPL(kvm_require_dr);
 543
 544 /*
 545  * This function will be used to read from the physical memory of the currently
 546  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 547  * can read from guest physical or from the guest's guest physical memory.
 548  */
 549 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 550                             gfn_t ngfn, void *data, int offset, int len,
 551                             u32 access)
 552 {
 553         struct x86_exception exception;
 554         gfn_t real_gfn;
 555         gpa_t ngpa;
 556
 557         ngpa     = gfn_to_gpa(ngfn);
 558         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 559         if (real_gfn == UNMAPPED_GVA)
 560                 return -EFAULT;
 561
 562         real_gfn = gpa_to_gfn(real_gfn);
 563
 564         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 565 }
 566 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 567
 568 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 569                                void *data, int offset, int len, u32 access)
 570 {
 571         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 572                                        data, offset, len, access);
 573 }
 574
 575 /*
 576  * Load the pae pdptrs.  Return true is they are all valid.
 577  */
 578 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 579 {
 580         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 581         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 582         int i;
 583         int ret;
 584         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 585
 586         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 587                                       offset * sizeof(u64), sizeof(pdpte),
 588                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 589         if (ret < 0) {
 590                 ret = 0;
 591                 goto out;
 592         }
 593         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 594                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 595                     (pdpte[i] &
 596                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 597                         ret = 0;
 598                         goto out;
 599                 }
 600         }
 601         ret = 1;
 602
 603         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 604         __set_bit(VCPU_EXREG_PDPTR,
 605                   (unsigned long *)&vcpu->arch.regs_avail);
 606         __set_bit(VCPU_EXREG_PDPTR,
 607                   (unsigned long *)&vcpu->arch.regs_dirty);
 608 out:
 609
 610         return ret;
 611 }
 612 EXPORT_SYMBOL_GPL(load_pdptrs);
 613
 614 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 615 {
 616         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 617         bool changed = true;
 618         int offset;
 619         gfn_t gfn;
 620         int r;
 621
 622         if (is_long_mode(vcpu) || !is_pae(vcpu))
 623                 return false;
 624
 625         if (!test_bit(VCPU_EXREG_PDPTR,
 626                       (unsigned long *)&vcpu->arch.regs_avail))
 627                 return true;
 628
 629         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 630         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 631         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 632                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 633         if (r < 0)
 634                 goto out;
 635         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 636 out:
 637
 638         return changed;
 639 }
 640 EXPORT_SYMBOL_GPL(pdptrs_changed);
 641
 642 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 643 {
 644         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 645         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 646
 647         cr0 |= X86_CR0_ET;
 648
 649 #ifdef CONFIG_X86_64
 650         if (cr0 & 0xffffffff00000000UL)
 651                 return 1;
 652 #endif
 653
 654         cr0 &= ~CR0_RESERVED_BITS;
 655
 656         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 657                 return 1;
 658
 659         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 660                 return 1;
 661
 662         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 663 #ifdef CONFIG_X86_64
 664                 if ((vcpu->arch.efer & EFER_LME)) {
 665                         int cs_db, cs_l;
 666
 667                         if (!is_pae(vcpu))
 668                                 return 1;
 669                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 670                         if (cs_l)
 671                                 return 1;
 672                 } else
 673 #endif
 674                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 675                                                  kvm_read_cr3(vcpu)))
 676                         return 1;
 677         }
 678
 679         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 680                 return 1;
 681
 682         kvm_x86_ops->set_cr0(vcpu, cr0);
 683
 684         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 685                 kvm_clear_async_pf_completion_queue(vcpu);
 686                 kvm_async_pf_hash_reset(vcpu);
 687         }
 688
 689         if ((cr0 ^ old_cr0) & update_bits)
 690                 kvm_mmu_reset_context(vcpu);
 691
 692         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 693             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 694             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 695                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 696
 697         return 0;
 698 }
 699 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 700
 701 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 702 {
 703         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 704 }
 705 EXPORT_SYMBOL_GPL(kvm_lmsw);
 706
 707 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 708 {
 709         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 710                         !vcpu->guest_xcr0_loaded) {
 711                 /* kvm_set_xcr() also depends on this */
 712                 if (vcpu->arch.xcr0 != host_xcr0)
 713                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 714                 vcpu->guest_xcr0_loaded = 1;
 715         }
 716 }
 717
 718 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 719 {
 720         if (vcpu->guest_xcr0_loaded) {
 721                 if (vcpu->arch.xcr0 != host_xcr0)
 722                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 723                 vcpu->guest_xcr0_loaded = 0;
 724         }
 725 }
 726
 727 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 728 {
 729         u64 xcr0 = xcr;
 730         u64 old_xcr0 = vcpu->arch.xcr0;
 731         u64 valid_bits;
 732
 733         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 734         if (index != XCR_XFEATURE_ENABLED_MASK)
 735                 return 1;
 736         if (!(xcr0 & XFEATURE_MASK_FP))
 737                 return 1;
 738         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 739                 return 1;
 740
 741         /*
 742          * Do not allow the guest to set bits that we do not support
 743          * saving.  However, xcr0 bit 0 is always set, even if the
 744          * emulated CPU does not support XSAVE (see fx_init).
 745          */
 746         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 747         if (xcr0 & ~valid_bits)
 748                 return 1;
 749
 750         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 751             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 752                 return 1;
 753
 754         if (xcr0 & XFEATURE_MASK_AVX512) {
 755                 if (!(xcr0 & XFEATURE_MASK_YMM))
 756                         return 1;
 757                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 758                         return 1;
 759         }
 760         vcpu->arch.xcr0 = xcr0;
 761
 762         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 763                 kvm_update_cpuid(vcpu);
 764         return 0;
 765 }
 766
 767 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 768 {
 769         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 770             __kvm_set_xcr(vcpu, index, xcr)) {
 771                 kvm_inject_gp(vcpu, 0);
 772                 return 1;
 773         }
 774         return 0;
 775 }
 776 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 777
 778 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 779 {
 780         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 781         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 782                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 783
 784         if (cr4 & CR4_RESERVED_BITS)
 785                 return 1;
 786
 787         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 788                 return 1;
 789
 790         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 791                 return 1;
 792
 793         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 794                 return 1;
 795
 796         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 797                 return 1;
 798
 799         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 800                 return 1;
 801
 802         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 803                 return 1;
 804
 805         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 806                 return 1;
 807
 808         if (is_long_mode(vcpu)) {
 809                 if (!(cr4 & X86_CR4_PAE))
 810                         return 1;
 811         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 812                    && ((cr4 ^ old_cr4) & pdptr_bits)
 813                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 814                                    kvm_read_cr3(vcpu)))
 815                 return 1;
 816
 817         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 818                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 819                         return 1;
 820
 821                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 822                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 823                         return 1;
 824         }
 825
 826         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 827                 return 1;
 828
 829         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 830             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 831                 kvm_mmu_reset_context(vcpu);
 832
 833         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 834                 kvm_update_cpuid(vcpu);
 835
 836         return 0;
 837 }
 838 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 839
 840 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 841 {
 842 #ifdef CONFIG_X86_64
 843         cr3 &= ~CR3_PCID_INVD;
 844 #endif
 845
 846         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 847                 kvm_mmu_sync_roots(vcpu);
 848                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 849                 return 0;
 850         }
 851
 852         if (is_long_mode(vcpu) &&
 853             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 62)))
 854                 return 1;
 855         else if (is_pae(vcpu) && is_paging(vcpu) &&
 856                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 857                 return 1;
 858
 859         vcpu->arch.cr3 = cr3;
 860         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 861         kvm_mmu_new_cr3(vcpu);
 862         return 0;
 863 }
 864 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 865
 866 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 867 {
 868         if (cr8 & CR8_RESERVED_BITS)
 869                 return 1;
 870         if (lapic_in_kernel(vcpu))
 871                 kvm_lapic_set_tpr(vcpu, cr8);
 872         else
 873                 vcpu->arch.cr8 = cr8;
 874         return 0;
 875 }
 876 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 877
 878 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 879 {
 880         if (lapic_in_kernel(vcpu))
 881                 return kvm_lapic_get_cr8(vcpu);
 882         else
 883                 return vcpu->arch.cr8;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 886
 887 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 888 {
 889         int i;
 890
 891         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 892                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 893                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 894                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 895         }
 896 }
 897
 898 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 899 {
 900         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 901                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 902 }
 903
 904 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 905 {
 906         unsigned long dr7;
 907
 908         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 909                 dr7 = vcpu->arch.guest_debug_dr7;
 910         else
 911                 dr7 = vcpu->arch.dr7;
 912         kvm_x86_ops->set_dr7(vcpu, dr7);
 913         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 914         if (dr7 & DR7_BP_EN_MASK)
 915                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 916 }
 917
 918 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 919 {
 920         u64 fixed = DR6_FIXED_1;
 921
 922         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 923                 fixed |= DR6_RTM;
 924         return fixed;
 925 }
 926
 927 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 928 {
 929         switch (dr) {
 930         case 0 ... 3:
 931                 vcpu->arch.db[dr] = val;
 932                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 933                         vcpu->arch.eff_db[dr] = val;
 934                 break;
 935         case 4:
 936                 /* fall through */
 937         case 6:
 938                 if (val & 0xffffffff00000000ULL)
 939                         return -1; /* #GP */
 940                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 941                 kvm_update_dr6(vcpu);
 942                 break;
 943         case 5:
 944                 /* fall through */
 945         default: /* 7 */
 946                 if (val & 0xffffffff00000000ULL)
 947                         return -1; /* #GP */
 948                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 949                 kvm_update_dr7(vcpu);
 950                 break;
 951         }
 952
 953         return 0;
 954 }
 955
 956 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 957 {
 958         if (__kvm_set_dr(vcpu, dr, val)) {
 959                 kvm_inject_gp(vcpu, 0);
 960                 return 1;
 961         }
 962         return 0;
 963 }
 964 EXPORT_SYMBOL_GPL(kvm_set_dr);
 965
 966 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 967 {
 968         switch (dr) {
 969         case 0 ... 3:
 970                 *val = vcpu->arch.db[dr];
 971                 break;
 972         case 4:
 973                 /* fall through */
 974         case 6:
 975                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 976                         *val = vcpu->arch.dr6;
 977                 else
 978                         *val = kvm_x86_ops->get_dr6(vcpu);
 979                 break;
 980         case 5:
 981                 /* fall through */
 982         default: /* 7 */
 983                 *val = vcpu->arch.dr7;
 984                 break;
 985         }
 986         return 0;
 987 }
 988 EXPORT_SYMBOL_GPL(kvm_get_dr);
 989
 990 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 991 {
 992         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 993         u64 data;
 994         int err;
 995
 996         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 997         if (err)
 998                 return err;
 999         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
1000         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
1001         return err;
1002 }
1003 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1004
1005 /*
1006  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1007  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1008  *
1009  * This list is modified at module load time to reflect the
1010  * capabilities of the host cpu. This capabilities test skips MSRs that are
1011  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1012  * may depend on host virtualization features rather than host cpu features.
1013  */
1014
1015 static u32 msrs_to_save[] = {
1016         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1017         MSR_STAR,
1018 #ifdef CONFIG_X86_64
1019         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1020 #endif
1021         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1022         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1023         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1024 };
1025
1026 static unsigned num_msrs_to_save;
1027
1028 static u32 emulated_msrs[] = {
1029         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1030         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1031         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1032         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1033         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1034         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1035         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1036         HV_X64_MSR_RESET,
1037         HV_X64_MSR_VP_INDEX,
1038         HV_X64_MSR_VP_RUNTIME,
1039         HV_X64_MSR_SCONTROL,
1040         HV_X64_MSR_STIMER0_CONFIG,
1041         HV_X64_MSR_VP_ASSIST_PAGE,
1042         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1043         HV_X64_MSR_TSC_EMULATION_STATUS,
1044
1045         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1046         MSR_KVM_PV_EOI_EN,
1047
1048         MSR_IA32_TSC_ADJUST,
1049         MSR_IA32_TSCDEADLINE,
1050         MSR_IA32_MISC_ENABLE,
1051         MSR_IA32_MCG_STATUS,
1052         MSR_IA32_MCG_CTL,
1053         MSR_IA32_MCG_EXT_CTL,
1054         MSR_IA32_SMBASE,
1055         MSR_SMI_COUNT,
1056         MSR_PLATFORM_INFO,
1057         MSR_MISC_FEATURES_ENABLES,
1058 };
1059
1060 static unsigned num_emulated_msrs;
1061
1062 /*
1063  * List of msr numbers which are used to expose MSR-based features that
1064  * can be used by a hypervisor to validate requested CPU features.
1065  */
1066 static u32 msr_based_features[] = {
1067         MSR_IA32_VMX_BASIC,
1068         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1069         MSR_IA32_VMX_PINBASED_CTLS,
1070         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1071         MSR_IA32_VMX_PROCBASED_CTLS,
1072         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1073         MSR_IA32_VMX_EXIT_CTLS,
1074         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1075         MSR_IA32_VMX_ENTRY_CTLS,
1076         MSR_IA32_VMX_MISC,
1077         MSR_IA32_VMX_CR0_FIXED0,
1078         MSR_IA32_VMX_CR0_FIXED1,
1079         MSR_IA32_VMX_CR4_FIXED0,
1080         MSR_IA32_VMX_CR4_FIXED1,
1081         MSR_IA32_VMX_VMCS_ENUM,
1082         MSR_IA32_VMX_PROCBASED_CTLS2,
1083         MSR_IA32_VMX_EPT_VPID_CAP,
1084         MSR_IA32_VMX_VMFUNC,
1085
1086         MSR_F10H_DECFG,
1087         MSR_IA32_UCODE_REV,
1088 };
1089
1090 static unsigned int num_msr_based_features;
1091
1092 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1093 {
1094         switch (msr->index) {
1095         case MSR_IA32_UCODE_REV:
1096                 rdmsrl(msr->index, msr->data);
1097                 break;
1098         default:
1099                 if (kvm_x86_ops->get_msr_feature(msr))
1100                         return 1;
1101         }
1102         return 0;
1103 }
1104
1105 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1106 {
1107         struct kvm_msr_entry msr;
1108         int r;
1109
1110         msr.index = index;
1111         r = kvm_get_msr_feature(&msr);
1112         if (r)
1113                 return r;
1114
1115         *data = msr.data;
1116
1117         return 0;
1118 }
1119
1120 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1121 {
1122         if (efer & efer_reserved_bits)
1123                 return false;
1124
1125         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1126                         return false;
1127
1128         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1129                         return false;
1130
1131         return true;
1132 }
1133 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1134
1135 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1136 {
1137         u64 old_efer = vcpu->arch.efer;
1138
1139         if (!kvm_valid_efer(vcpu, efer))
1140                 return 1;
1141
1142         if (is_paging(vcpu)
1143             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1144                 return 1;
1145
1146         efer &= ~EFER_LMA;
1147         efer |= vcpu->arch.efer & EFER_LMA;
1148
1149         kvm_x86_ops->set_efer(vcpu, efer);
1150
1151         /* Update reserved bits */
1152         if ((efer ^ old_efer) & EFER_NX)
1153                 kvm_mmu_reset_context(vcpu);
1154
1155         return 0;
1156 }
1157
1158 void kvm_enable_efer_bits(u64 mask)
1159 {
1160        efer_reserved_bits &= ~mask;
1161 }
1162 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1163
1164 /*
1165  * Writes msr value into into the appropriate "register".
1166  * Returns 0 on success, non-0 otherwise.
1167  * Assumes vcpu_load() was already called.
1168  */
1169 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1170 {
1171         switch (msr->index) {
1172         case MSR_FS_BASE:
1173         case MSR_GS_BASE:
1174         case MSR_KERNEL_GS_BASE:
1175         case MSR_CSTAR:
1176         case MSR_LSTAR:
1177                 if (is_noncanonical_address(msr->data, vcpu))
1178                         return 1;
1179                 break;
1180         case MSR_IA32_SYSENTER_EIP:
1181         case MSR_IA32_SYSENTER_ESP:
1182                 /*
1183                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1184                  * non-canonical address is written on Intel but not on
1185                  * AMD (which ignores the top 32-bits, because it does
1186                  * not implement 64-bit SYSENTER).
1187                  *
1188                  * 64-bit code should hence be able to write a non-canonical
1189                  * value on AMD.  Making the address canonical ensures that
1190                  * vmentry does not fail on Intel after writing a non-canonical
1191                  * value, and that something deterministic happens if the guest
1192                  * invokes 64-bit SYSENTER.
1193                  */
1194                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1195         }
1196         return kvm_x86_ops->set_msr(vcpu, msr);
1197 }
1198 EXPORT_SYMBOL_GPL(kvm_set_msr);
1199
1200 /*
1201  * Adapt set_msr() to msr_io()'s calling convention
1202  */
1203 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1204 {
1205         struct msr_data msr;
1206         int r;
1207
1208         msr.index = index;
1209         msr.host_initiated = true;
1210         r = kvm_get_msr(vcpu, &msr);
1211         if (r)
1212                 return r;
1213
1214         *data = msr.data;
1215         return 0;
1216 }
1217
1218 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1219 {
1220         struct msr_data msr;
1221
1222         msr.data = *data;
1223         msr.index = index;
1224         msr.host_initiated = true;
1225         return kvm_set_msr(vcpu, &msr);
1226 }
1227
1228 #ifdef CONFIG_X86_64
1229 struct pvclock_gtod_data {
1230         seqcount_t      seq;
1231
1232         struct { /* extract of a clocksource struct */
1233                 int vclock_mode;
1234                 u64     cycle_last;
1235                 u64     mask;
1236                 u32     mult;
1237                 u32     shift;
1238         } clock;
1239
1240         u64             boot_ns;
1241         u64             nsec_base;
1242         u64             wall_time_sec;
1243 };
1244
1245 static struct pvclock_gtod_data pvclock_gtod_data;
1246
1247 static void update_pvclock_gtod(struct timekeeper *tk)
1248 {
1249         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1250         u64 boot_ns;
1251
1252         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1253
1254         write_seqcount_begin(&vdata->seq);
1255
1256         /* copy pvclock gtod data */
1257         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1258         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1259         vdata->clock.mask               = tk->tkr_mono.mask;
1260         vdata->clock.mult               = tk->tkr_mono.mult;
1261         vdata->clock.shift              = tk->tkr_mono.shift;
1262
1263         vdata->boot_ns                  = boot_ns;
1264         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1265
1266         vdata->wall_time_sec            = tk->xtime_sec;
1267
1268         write_seqcount_end(&vdata->seq);
1269 }
1270 #endif
1271
1272 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1273 {
1274         /*
1275          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1276          * vcpu_enter_guest.  This function is only called from
1277          * the physical CPU that is running vcpu.
1278          */
1279         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1280 }
1281
1282 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1283 {
1284         int version;
1285         int r;
1286         struct pvclock_wall_clock wc;
1287         struct timespec64 boot;
1288
1289         if (!wall_clock)
1290                 return;
1291
1292         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1293         if (r)
1294                 return;
1295
1296         if (version & 1)
1297                 ++version;  /* first time write, random junk */
1298
1299         ++version;
1300
1301         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1302                 return;
1303
1304         /*
1305          * The guest calculates current wall clock time by adding
1306          * system time (updated by kvm_guest_time_update below) to the
1307          * wall clock specified here.  guest system time equals host
1308          * system time for us, thus we must fill in host boot time here.
1309          */
1310         getboottime64(&boot);
1311
1312         if (kvm->arch.kvmclock_offset) {
1313                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1314                 boot = timespec64_sub(boot, ts);
1315         }
1316         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1317         wc.nsec = boot.tv_nsec;
1318         wc.version = version;
1319
1320         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1321
1322         version++;
1323         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1324 }
1325
1326 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1327 {
1328         do_shl32_div32(dividend, divisor);
1329         return dividend;
1330 }
1331
1332 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1333                                s8 *pshift, u32 *pmultiplier)
1334 {
1335         uint64_t scaled64;
1336         int32_t  shift = 0;
1337         uint64_t tps64;
1338         uint32_t tps32;
1339
1340         tps64 = base_hz;
1341         scaled64 = scaled_hz;
1342         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1343                 tps64 >>= 1;
1344                 shift--;
1345         }
1346
1347         tps32 = (uint32_t)tps64;
1348         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1349                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1350                         scaled64 >>= 1;
1351                 else
1352                         tps32 <<= 1;
1353                 shift++;
1354         }
1355
1356         *pshift = shift;
1357         *pmultiplier = div_frac(scaled64, tps32);
1358
1359         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1360                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1361 }
1362
1363 #ifdef CONFIG_X86_64
1364 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1365 #endif
1366
1367 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1368 static unsigned long max_tsc_khz;
1369
1370 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1371 {
1372         u64 v = (u64)khz * (1000000 + ppm);
1373         do_div(v, 1000000);
1374         return v;
1375 }
1376
1377 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1378 {
1379         u64 ratio;
1380
1381         /* Guest TSC same frequency as host TSC? */
1382         if (!scale) {
1383                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1384                 return 0;
1385         }
1386
1387         /* TSC scaling supported? */
1388         if (!kvm_has_tsc_control) {
1389                 if (user_tsc_khz > tsc_khz) {
1390                         vcpu->arch.tsc_catchup = 1;
1391                         vcpu->arch.tsc_always_catchup = 1;
1392                         return 0;
1393                 } else {
1394                         WARN(1, "user requested TSC rate below hardware speed\n");
1395                         return -1;
1396                 }
1397         }
1398
1399         /* TSC scaling required  - calculate ratio */
1400         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1401                                 user_tsc_khz, tsc_khz);
1402
1403         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1404                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1405                           user_tsc_khz);
1406                 return -1;
1407         }
1408
1409         vcpu->arch.tsc_scaling_ratio = ratio;
1410         return 0;
1411 }
1412
1413 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1414 {
1415         u32 thresh_lo, thresh_hi;
1416         int use_scaling = 0;
1417
1418         /* tsc_khz can be zero if TSC calibration fails */
1419         if (user_tsc_khz == 0) {
1420                 /* set tsc_scaling_ratio to a safe value */
1421                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1422                 return -1;
1423         }
1424
1425         /* Compute a scale to convert nanoseconds in TSC cycles */
1426         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1427                            &vcpu->arch.virtual_tsc_shift,
1428                            &vcpu->arch.virtual_tsc_mult);
1429         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1430
1431         /*
1432          * Compute the variation in TSC rate which is acceptable
1433          * within the range of tolerance and decide if the
1434          * rate being applied is within that bounds of the hardware
1435          * rate.  If so, no scaling or compensation need be done.
1436          */
1437         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1438         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1439         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1440                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1441                 use_scaling = 1;
1442         }
1443         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1444 }
1445
1446 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1447 {
1448         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1449                                       vcpu->arch.virtual_tsc_mult,
1450                                       vcpu->arch.virtual_tsc_shift);
1451         tsc += vcpu->arch.this_tsc_write;
1452         return tsc;
1453 }
1454
1455 static inline int gtod_is_based_on_tsc(int mode)
1456 {
1457         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1458 }
1459
1460 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1461 {
1462 #ifdef CONFIG_X86_64
1463         bool vcpus_matched;
1464         struct kvm_arch *ka = &vcpu->kvm->arch;
1465         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1466
1467         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1468                          atomic_read(&vcpu->kvm->online_vcpus));
1469
1470         /*
1471          * Once the masterclock is enabled, always perform request in
1472          * order to update it.
1473          *
1474          * In order to enable masterclock, the host clocksource must be TSC
1475          * and the vcpus need to have matched TSCs.  When that happens,
1476          * perform request to enable masterclock.
1477          */
1478         if (ka->use_master_clock ||
1479             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1480                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1481
1482         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1483                             atomic_read(&vcpu->kvm->online_vcpus),
1484                             ka->use_master_clock, gtod->clock.vclock_mode);
1485 #endif
1486 }
1487
1488 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1489 {
1490         u64 curr_offset = vcpu->arch.tsc_offset;
1491         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1492 }
1493
1494 /*
1495  * Multiply tsc by a fixed point number represented by ratio.
1496  *
1497  * The most significant 64-N bits (mult) of ratio represent the
1498  * integral part of the fixed point number; the remaining N bits
1499  * (frac) represent the fractional part, ie. ratio represents a fixed
1500  * point number (mult + frac * 2^(-N)).
1501  *
1502  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1503  */
1504 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1505 {
1506         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1507 }
1508
1509 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1510 {
1511         u64 _tsc = tsc;
1512         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1513
1514         if (ratio != kvm_default_tsc_scaling_ratio)
1515                 _tsc = __scale_tsc(ratio, tsc);
1516
1517         return _tsc;
1518 }
1519 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1520
1521 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1522 {
1523         u64 tsc;
1524
1525         tsc = kvm_scale_tsc(vcpu, rdtsc());
1526
1527         return target_tsc - tsc;
1528 }
1529
1530 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1531 {
1532         return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1533 }
1534 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1535
1536 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1537 {
1538         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1539         vcpu->arch.tsc_offset = offset;
1540 }
1541
1542 static inline bool kvm_check_tsc_unstable(void)
1543 {
1544 #ifdef CONFIG_X86_64
1545         /*
1546          * TSC is marked unstable when we're running on Hyper-V,
1547          * 'TSC page' clocksource is good.
1548          */
1549         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1550                 return false;
1551 #endif
1552         return check_tsc_unstable();
1553 }
1554
1555 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1556 {
1557         struct kvm *kvm = vcpu->kvm;
1558         u64 offset, ns, elapsed;
1559         unsigned long flags;
1560         bool matched;
1561         bool already_matched;
1562         u64 data = msr->data;
1563         bool synchronizing = false;
1564
1565         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1566         offset = kvm_compute_tsc_offset(vcpu, data);
1567         ns = ktime_get_boot_ns();
1568         elapsed = ns - kvm->arch.last_tsc_nsec;
1569
1570         if (vcpu->arch.virtual_tsc_khz) {
1571                 if (data == 0 && msr->host_initiated) {
1572                         /*
1573                          * detection of vcpu initialization -- need to sync
1574                          * with other vCPUs. This particularly helps to keep
1575                          * kvm_clock stable after CPU hotplug
1576                          */
1577                         synchronizing = true;
1578                 } else {
1579                         u64 tsc_exp = kvm->arch.last_tsc_write +
1580                                                 nsec_to_cycles(vcpu, elapsed);
1581                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1582                         /*
1583                          * Special case: TSC write with a small delta (1 second)
1584                          * of virtual cycle time against real time is
1585                          * interpreted as an attempt to synchronize the CPU.
1586                          */
1587                         synchronizing = data < tsc_exp + tsc_hz &&
1588                                         data + tsc_hz > tsc_exp;
1589                 }
1590         }
1591
1592         /*
1593          * For a reliable TSC, we can match TSC offsets, and for an unstable
1594          * TSC, we add elapsed time in this computation.  We could let the
1595          * compensation code attempt to catch up if we fall behind, but
1596          * it's better to try to match offsets from the beginning.
1597          */
1598         if (synchronizing &&
1599             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1600                 if (!kvm_check_tsc_unstable()) {
1601                         offset = kvm->arch.cur_tsc_offset;
1602                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1603                 } else {
1604                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1605                         data += delta;
1606                         offset = kvm_compute_tsc_offset(vcpu, data);
1607                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1608                 }
1609                 matched = true;
1610                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1611         } else {
1612                 /*
1613                  * We split periods of matched TSC writes into generations.
1614                  * For each generation, we track the original measured
1615                  * nanosecond time, offset, and write, so if TSCs are in
1616                  * sync, we can match exact offset, and if not, we can match
1617                  * exact software computation in compute_guest_tsc()
1618                  *
1619                  * These values are tracked in kvm->arch.cur_xxx variables.
1620                  */
1621                 kvm->arch.cur_tsc_generation++;
1622                 kvm->arch.cur_tsc_nsec = ns;
1623                 kvm->arch.cur_tsc_write = data;
1624                 kvm->arch.cur_tsc_offset = offset;
1625                 matched = false;
1626                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1627                          kvm->arch.cur_tsc_generation, data);
1628         }
1629
1630         /*
1631          * We also track th most recent recorded KHZ, write and time to
1632          * allow the matching interval to be extended at each write.
1633          */
1634         kvm->arch.last_tsc_nsec = ns;
1635         kvm->arch.last_tsc_write = data;
1636         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1637
1638         vcpu->arch.last_guest_tsc = data;
1639
1640         /* Keep track of which generation this VCPU has synchronized to */
1641         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1642         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1643         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1644
1645         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1646                 update_ia32_tsc_adjust_msr(vcpu, offset);
1647
1648         kvm_vcpu_write_tsc_offset(vcpu, offset);
1649         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1650
1651         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1652         if (!matched) {
1653                 kvm->arch.nr_vcpus_matched_tsc = 0;
1654         } else if (!already_matched) {
1655                 kvm->arch.nr_vcpus_matched_tsc++;
1656         }
1657
1658         kvm_track_tsc_matching(vcpu);
1659         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1660 }
1661
1662 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1663
1664 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1665                                            s64 adjustment)
1666 {
1667         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1668 }
1669
1670 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1671 {
1672         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1673                 WARN_ON(adjustment < 0);
1674         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1675         adjust_tsc_offset_guest(vcpu, adjustment);
1676 }
1677
1678 #ifdef CONFIG_X86_64
1679
1680 static u64 read_tsc(void)
1681 {
1682         u64 ret = (u64)rdtsc_ordered();
1683         u64 last = pvclock_gtod_data.clock.cycle_last;
1684
1685         if (likely(ret >= last))
1686                 return ret;
1687
1688         /*
1689          * GCC likes to generate cmov here, but this branch is extremely
1690          * predictable (it's just a function of time and the likely is
1691          * very likely) and there's a data dependence, so force GCC
1692          * to generate a branch instead.  I don't barrier() because
1693          * we don't actually need a barrier, and if this function
1694          * ever gets inlined it will generate worse code.
1695          */
1696         asm volatile ("");
1697         return last;
1698 }
1699
1700 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1701 {
1702         long v;
1703         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1704         u64 tsc_pg_val;
1705
1706         switch (gtod->clock.vclock_mode) {
1707         case VCLOCK_HVCLOCK:
1708                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1709                                                   tsc_timestamp);
1710                 if (tsc_pg_val != U64_MAX) {
1711                         /* TSC page valid */
1712                         *mode = VCLOCK_HVCLOCK;
1713                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1714                                 gtod->clock.mask;
1715                 } else {
1716                         /* TSC page invalid */
1717                         *mode = VCLOCK_NONE;
1718                 }
1719                 break;
1720         case VCLOCK_TSC:
1721                 *mode = VCLOCK_TSC;
1722                 *tsc_timestamp = read_tsc();
1723                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1724                         gtod->clock.mask;
1725                 break;
1726         default:
1727                 *mode = VCLOCK_NONE;
1728         }
1729
1730         if (*mode == VCLOCK_NONE)
1731                 *tsc_timestamp = v = 0;
1732
1733         return v * gtod->clock.mult;
1734 }
1735
1736 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1737 {
1738         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1739         unsigned long seq;
1740         int mode;
1741         u64 ns;
1742
1743         do {
1744                 seq = read_seqcount_begin(&gtod->seq);
1745                 ns = gtod->nsec_base;
1746                 ns += vgettsc(tsc_timestamp, &mode);
1747                 ns >>= gtod->clock.shift;
1748                 ns += gtod->boot_ns;
1749         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1750         *t = ns;
1751
1752         return mode;
1753 }
1754
1755 static int do_realtime(struct timespec *ts, u64 *tsc_timestamp)
1756 {
1757         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1758         unsigned long seq;
1759         int mode;
1760         u64 ns;
1761
1762         do {
1763                 seq = read_seqcount_begin(&gtod->seq);
1764                 ts->tv_sec = gtod->wall_time_sec;
1765                 ns = gtod->nsec_base;
1766                 ns += vgettsc(tsc_timestamp, &mode);
1767                 ns >>= gtod->clock.shift;
1768         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1769
1770         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1771         ts->tv_nsec = ns;
1772
1773         return mode;
1774 }
1775
1776 /* returns true if host is using TSC based clocksource */
1777 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1778 {
1779         /* checked again under seqlock below */
1780         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1781                 return false;
1782
1783         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1784                                                       tsc_timestamp));
1785 }
1786
1787 /* returns true if host is using TSC based clocksource */
1788 static bool kvm_get_walltime_and_clockread(struct timespec *ts,
1789                                            u64 *tsc_timestamp)
1790 {
1791         /* checked again under seqlock below */
1792         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1793                 return false;
1794
1795         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1796 }
1797 #endif
1798
1799 /*
1800  *
1801  * Assuming a stable TSC across physical CPUS, and a stable TSC
1802  * across virtual CPUs, the following condition is possible.
1803  * Each numbered line represents an event visible to both
1804  * CPUs at the next numbered event.
1805  *
1806  * "timespecX" represents host monotonic time. "tscX" represents
1807  * RDTSC value.
1808  *
1809  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1810  *
1811  * 1.  read timespec0,tsc0
1812  * 2.                                   | timespec1 = timespec0 + N
1813  *                                      | tsc1 = tsc0 + M
1814  * 3. transition to guest               | transition to guest
1815  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1816  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1817  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1818  *
1819  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1820  *
1821  *      - ret0 < ret1
1822  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1823  *              ...
1824  *      - 0 < N - M => M < N
1825  *
1826  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1827  * always the case (the difference between two distinct xtime instances
1828  * might be smaller then the difference between corresponding TSC reads,
1829  * when updating guest vcpus pvclock areas).
1830  *
1831  * To avoid that problem, do not allow visibility of distinct
1832  * system_timestamp/tsc_timestamp values simultaneously: use a master
1833  * copy of host monotonic time values. Update that master copy
1834  * in lockstep.
1835  *
1836  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1837  *
1838  */
1839
1840 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1841 {
1842 #ifdef CONFIG_X86_64
1843         struct kvm_arch *ka = &kvm->arch;
1844         int vclock_mode;
1845         bool host_tsc_clocksource, vcpus_matched;
1846
1847         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1848                         atomic_read(&kvm->online_vcpus));
1849
1850         /*
1851          * If the host uses TSC clock, then passthrough TSC as stable
1852          * to the guest.
1853          */
1854         host_tsc_clocksource = kvm_get_time_and_clockread(
1855                                         &ka->master_kernel_ns,
1856                                         &ka->master_cycle_now);
1857
1858         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1859                                 && !ka->backwards_tsc_observed
1860                                 && !ka->boot_vcpu_runs_old_kvmclock;
1861
1862         if (ka->use_master_clock)
1863                 atomic_set(&kvm_guest_has_master_clock, 1);
1864
1865         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1866         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1867                                         vcpus_matched);
1868 #endif
1869 }
1870
1871 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1872 {
1873         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1874 }
1875
1876 static void kvm_gen_update_masterclock(struct kvm *kvm)
1877 {
1878 #ifdef CONFIG_X86_64
1879         int i;
1880         struct kvm_vcpu *vcpu;
1881         struct kvm_arch *ka = &kvm->arch;
1882
1883         spin_lock(&ka->pvclock_gtod_sync_lock);
1884         kvm_make_mclock_inprogress_request(kvm);
1885         /* no guest entries from this point */
1886         pvclock_update_vm_gtod_copy(kvm);
1887
1888         kvm_for_each_vcpu(i, vcpu, kvm)
1889                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1890
1891         /* guest entries allowed */
1892         kvm_for_each_vcpu(i, vcpu, kvm)
1893                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1894
1895         spin_unlock(&ka->pvclock_gtod_sync_lock);
1896 #endif
1897 }
1898
1899 u64 get_kvmclock_ns(struct kvm *kvm)
1900 {
1901         struct kvm_arch *ka = &kvm->arch;
1902         struct pvclock_vcpu_time_info hv_clock;
1903         u64 ret;
1904
1905         spin_lock(&ka->pvclock_gtod_sync_lock);
1906         if (!ka->use_master_clock) {
1907                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1908                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1909         }
1910
1911         hv_clock.tsc_timestamp = ka->master_cycle_now;
1912         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1913         spin_unlock(&ka->pvclock_gtod_sync_lock);
1914
1915         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1916         get_cpu();
1917
1918         if (__this_cpu_read(cpu_tsc_khz)) {
1919                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1920                                    &hv_clock.tsc_shift,
1921                                    &hv_clock.tsc_to_system_mul);
1922                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1923         } else
1924                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1925
1926         put_cpu();
1927
1928         return ret;
1929 }
1930
1931 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1932 {
1933         struct kvm_vcpu_arch *vcpu = &v->arch;
1934         struct pvclock_vcpu_time_info guest_hv_clock;
1935
1936         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1937                 &guest_hv_clock, sizeof(guest_hv_clock))))
1938                 return;
1939
1940         /* This VCPU is paused, but it's legal for a guest to read another
1941          * VCPU's kvmclock, so we really have to follow the specification where
1942          * it says that version is odd if data is being modified, and even after
1943          * it is consistent.
1944          *
1945          * Version field updates must be kept separate.  This is because
1946          * kvm_write_guest_cached might use a "rep movs" instruction, and
1947          * writes within a string instruction are weakly ordered.  So there
1948          * are three writes overall.
1949          *
1950          * As a small optimization, only write the version field in the first
1951          * and third write.  The vcpu->pv_time cache is still valid, because the
1952          * version field is the first in the struct.
1953          */
1954         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1955
1956         if (guest_hv_clock.version & 1)
1957                 ++guest_hv_clock.version;  /* first time write, random junk */
1958
1959         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1960         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1961                                 &vcpu->hv_clock,
1962                                 sizeof(vcpu->hv_clock.version));
1963
1964         smp_wmb();
1965
1966         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1967         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1968
1969         if (vcpu->pvclock_set_guest_stopped_request) {
1970                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
1971                 vcpu->pvclock_set_guest_stopped_request = false;
1972         }
1973
1974         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1975
1976         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1977                                 &vcpu->hv_clock,
1978                                 sizeof(vcpu->hv_clock));
1979
1980         smp_wmb();
1981
1982         vcpu->hv_clock.version++;
1983         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1984                                 &vcpu->hv_clock,
1985                                 sizeof(vcpu->hv_clock.version));
1986 }
1987
1988 static int kvm_guest_time_update(struct kvm_vcpu *v)
1989 {
1990         unsigned long flags, tgt_tsc_khz;
1991         struct kvm_vcpu_arch *vcpu = &v->arch;
1992         struct kvm_arch *ka = &v->kvm->arch;
1993         s64 kernel_ns;
1994         u64 tsc_timestamp, host_tsc;
1995         u8 pvclock_flags;
1996         bool use_master_clock;
1997
1998         kernel_ns = 0;
1999         host_tsc = 0;
2000
2001         /*
2002          * If the host uses TSC clock, then passthrough TSC as stable
2003          * to the guest.
2004          */
2005         spin_lock(&ka->pvclock_gtod_sync_lock);
2006         use_master_clock = ka->use_master_clock;
2007         if (use_master_clock) {
2008                 host_tsc = ka->master_cycle_now;
2009                 kernel_ns = ka->master_kernel_ns;
2010         }
2011         spin_unlock(&ka->pvclock_gtod_sync_lock);
2012
2013         /* Keep irq disabled to prevent changes to the clock */
2014         local_irq_save(flags);
2015         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2016         if (unlikely(tgt_tsc_khz == 0)) {
2017                 local_irq_restore(flags);
2018                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2019                 return 1;
2020         }
2021         if (!use_master_clock) {
2022                 host_tsc = rdtsc();
2023                 kernel_ns = ktime_get_boot_ns();
2024         }
2025
2026         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2027
2028         /*
2029          * We may have to catch up the TSC to match elapsed wall clock
2030          * time for two reasons, even if kvmclock is used.
2031          *   1) CPU could have been running below the maximum TSC rate
2032          *   2) Broken TSC compensation resets the base at each VCPU
2033          *      entry to avoid unknown leaps of TSC even when running
2034          *      again on the same CPU.  This may cause apparent elapsed
2035          *      time to disappear, and the guest to stand still or run
2036          *      very slowly.
2037          */
2038         if (vcpu->tsc_catchup) {
2039                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2040                 if (tsc > tsc_timestamp) {
2041                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2042                         tsc_timestamp = tsc;
2043                 }
2044         }
2045
2046         local_irq_restore(flags);
2047
2048         /* With all the info we got, fill in the values */
2049
2050         if (kvm_has_tsc_control)
2051                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2052
2053         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2054                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2055                                    &vcpu->hv_clock.tsc_shift,
2056                                    &vcpu->hv_clock.tsc_to_system_mul);
2057                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2058         }
2059
2060         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2061         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2062         vcpu->last_guest_tsc = tsc_timestamp;
2063
2064         /* If the host uses TSC clocksource, then it is stable */
2065         pvclock_flags = 0;
2066         if (use_master_clock)
2067                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2068
2069         vcpu->hv_clock.flags = pvclock_flags;
2070
2071         if (vcpu->pv_time_enabled)
2072                 kvm_setup_pvclock_page(v);
2073         if (v == kvm_get_vcpu(v->kvm, 0))
2074                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2075         return 0;
2076 }
2077
2078 /*
2079  * kvmclock updates which are isolated to a given vcpu, such as
2080  * vcpu->cpu migration, should not allow system_timestamp from
2081  * the rest of the vcpus to remain static. Otherwise ntp frequency
2082  * correction applies to one vcpu's system_timestamp but not
2083  * the others.
2084  *
2085  * So in those cases, request a kvmclock update for all vcpus.
2086  * We need to rate-limit these requests though, as they can
2087  * considerably slow guests that have a large number of vcpus.
2088  * The time for a remote vcpu to update its kvmclock is bound
2089  * by the delay we use to rate-limit the updates.
2090  */
2091
2092 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2093
2094 static void kvmclock_update_fn(struct work_struct *work)
2095 {
2096         int i;
2097         struct delayed_work *dwork = to_delayed_work(work);
2098         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2099                                            kvmclock_update_work);
2100         struct kvm *kvm = container_of(ka, struct kvm, arch);
2101         struct kvm_vcpu *vcpu;
2102
2103         kvm_for_each_vcpu(i, vcpu, kvm) {
2104                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2105                 kvm_vcpu_kick(vcpu);
2106         }
2107 }
2108
2109 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2110 {
2111         struct kvm *kvm = v->kvm;
2112
2113         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2114         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2115                                         KVMCLOCK_UPDATE_DELAY);
2116 }
2117
2118 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2119
2120 static void kvmclock_sync_fn(struct work_struct *work)
2121 {
2122         struct delayed_work *dwork = to_delayed_work(work);
2123         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2124                                            kvmclock_sync_work);
2125         struct kvm *kvm = container_of(ka, struct kvm, arch);
2126
2127         if (!kvmclock_periodic_sync)
2128                 return;
2129
2130         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2131         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2132                                         KVMCLOCK_SYNC_PERIOD);
2133 }
2134
2135 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2136 {
2137         u64 mcg_cap = vcpu->arch.mcg_cap;
2138         unsigned bank_num = mcg_cap & 0xff;
2139         u32 msr = msr_info->index;
2140         u64 data = msr_info->data;
2141
2142         switch (msr) {
2143         case MSR_IA32_MCG_STATUS:
2144                 vcpu->arch.mcg_status = data;
2145                 break;
2146         case MSR_IA32_MCG_CTL:
2147                 if (!(mcg_cap & MCG_CTL_P))
2148                         return 1;
2149                 if (data != 0 && data != ~(u64)0)
2150                         return -1;
2151                 vcpu->arch.mcg_ctl = data;
2152                 break;
2153         default:
2154                 if (msr >= MSR_IA32_MC0_CTL &&
2155                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2156                         u32 offset = msr - MSR_IA32_MC0_CTL;
2157                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2158                          * some Linux kernels though clear bit 10 in bank 4 to
2159                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2160                          * this to avoid an uncatched #GP in the guest
2161                          */
2162                         if ((offset & 0x3) == 0 &&
2163                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2164                                 return -1;
2165                         if (!msr_info->host_initiated &&
2166                                 (offset & 0x3) == 1 && data != 0)
2167                                 return -1;
2168                         vcpu->arch.mce_banks[offset] = data;
2169                         break;
2170                 }
2171                 return 1;
2172         }
2173         return 0;
2174 }
2175
2176 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2177 {
2178         struct kvm *kvm = vcpu->kvm;
2179         int lm = is_long_mode(vcpu);
2180         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2181                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2182         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2183                 : kvm->arch.xen_hvm_config.blob_size_32;
2184         u32 page_num = data & ~PAGE_MASK;
2185         u64 page_addr = data & PAGE_MASK;
2186         u8 *page;
2187         int r;
2188
2189         r = -E2BIG;
2190         if (page_num >= blob_size)
2191                 goto out;
2192         r = -ENOMEM;
2193         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2194         if (IS_ERR(page)) {
2195                 r = PTR_ERR(page);
2196                 goto out;
2197         }
2198         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2199                 goto out_free;
2200         r = 0;
2201 out_free:
2202         kfree(page);
2203 out:
2204         return r;
2205 }
2206
2207 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2208 {
2209         gpa_t gpa = data & ~0x3f;
2210
2211         /* Bits 3:5 are reserved, Should be zero */
2212         if (data & 0x38)
2213                 return 1;
2214
2215         vcpu->arch.apf.msr_val = data;
2216
2217         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2218                 kvm_clear_async_pf_completion_queue(vcpu);
2219                 kvm_async_pf_hash_reset(vcpu);
2220                 return 0;
2221         }
2222
2223         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2224                                         sizeof(u32)))
2225                 return 1;
2226
2227         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2228         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2229         kvm_async_pf_wakeup_all(vcpu);
2230         return 0;
2231 }
2232
2233 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2234 {
2235         vcpu->arch.pv_time_enabled = false;
2236 }
2237
2238 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2239 {
2240         ++vcpu->stat.tlb_flush;
2241         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2242 }
2243
2244 static void record_steal_time(struct kvm_vcpu *vcpu)
2245 {
2246         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2247                 return;
2248
2249         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2250                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2251                 return;
2252
2253         /*
2254          * Doing a TLB flush here, on the guest's behalf, can avoid
2255          * expensive IPIs.
2256          */
2257         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2258                 kvm_vcpu_flush_tlb(vcpu, false);
2259
2260         if (vcpu->arch.st.steal.version & 1)
2261                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2262
2263         vcpu->arch.st.steal.version += 1;
2264
2265         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2266                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2267
2268         smp_wmb();
2269
2270         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2271                 vcpu->arch.st.last_steal;
2272         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2273
2274         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2275                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2276
2277         smp_wmb();
2278
2279         vcpu->arch.st.steal.version += 1;
2280
2281         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2282                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2283 }
2284
2285 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2286 {
2287         bool pr = false;
2288         u32 msr = msr_info->index;
2289         u64 data = msr_info->data;
2290
2291         switch (msr) {
2292         case MSR_AMD64_NB_CFG:
2293         case MSR_IA32_UCODE_WRITE:
2294         case MSR_VM_HSAVE_PA:
2295         case MSR_AMD64_PATCH_LOADER:
2296         case MSR_AMD64_BU_CFG2:
2297         case MSR_AMD64_DC_CFG:
2298                 break;
2299
2300         case MSR_IA32_UCODE_REV:
2301                 if (msr_info->host_initiated)
2302                         vcpu->arch.microcode_version = data;
2303                 break;
2304         case MSR_EFER:
2305                 return set_efer(vcpu, data);
2306         case MSR_K7_HWCR:
2307                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2308                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2309                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2310                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2311                 if (data != 0) {
2312                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2313                                     data);
2314                         return 1;
2315                 }
2316                 break;
2317         case MSR_FAM10H_MMIO_CONF_BASE:
2318                 if (data != 0) {
2319                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2320                                     "0x%llx\n", data);
2321                         return 1;
2322                 }
2323                 break;
2324         case MSR_IA32_DEBUGCTLMSR:
2325                 if (!data) {
2326                         /* We support the non-activated case already */
2327                         break;
2328                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2329                         /* Values other than LBR and BTF are vendor-specific,
2330                            thus reserved and should throw a #GP */
2331                         return 1;
2332                 }
2333                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2334                             __func__, data);
2335                 break;
2336         case 0x200 ... 0x2ff:
2337                 return kvm_mtrr_set_msr(vcpu, msr, data);
2338         case MSR_IA32_APICBASE:
2339                 return kvm_set_apic_base(vcpu, msr_info);
2340         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2341                 return kvm_x2apic_msr_write(vcpu, msr, data);
2342         case MSR_IA32_TSCDEADLINE:
2343                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2344                 break;
2345         case MSR_IA32_TSC_ADJUST:
2346                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2347                         if (!msr_info->host_initiated) {
2348                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2349                                 adjust_tsc_offset_guest(vcpu, adj);
2350                         }
2351                         vcpu->arch.ia32_tsc_adjust_msr = data;
2352                 }
2353                 break;
2354         case MSR_IA32_MISC_ENABLE:
2355                 vcpu->arch.ia32_misc_enable_msr = data;
2356                 break;
2357         case MSR_IA32_SMBASE:
2358                 if (!msr_info->host_initiated)
2359                         return 1;
2360                 vcpu->arch.smbase = data;
2361                 break;
2362         case MSR_SMI_COUNT:
2363                 if (!msr_info->host_initiated)
2364                         return 1;
2365                 vcpu->arch.smi_count = data;
2366                 break;
2367         case MSR_KVM_WALL_CLOCK_NEW:
2368         case MSR_KVM_WALL_CLOCK:
2369                 vcpu->kvm->arch.wall_clock = data;
2370                 kvm_write_wall_clock(vcpu->kvm, data);
2371                 break;
2372         case MSR_KVM_SYSTEM_TIME_NEW:
2373         case MSR_KVM_SYSTEM_TIME: {
2374                 struct kvm_arch *ka = &vcpu->kvm->arch;
2375
2376                 kvmclock_reset(vcpu);
2377
2378                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2379                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2380
2381                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2382                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2383
2384                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2385                 }
2386
2387                 vcpu->arch.time = data;
2388                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2389
2390                 /* we verify if the enable bit is set... */
2391                 if (!(data & 1))
2392                         break;
2393
2394                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2395                      &vcpu->arch.pv_time, data & ~1ULL,
2396                      sizeof(struct pvclock_vcpu_time_info)))
2397                         vcpu->arch.pv_time_enabled = false;
2398                 else
2399                         vcpu->arch.pv_time_enabled = true;
2400
2401                 break;
2402         }
2403         case MSR_KVM_ASYNC_PF_EN:
2404                 if (kvm_pv_enable_async_pf(vcpu, data))
2405                         return 1;
2406                 break;
2407         case MSR_KVM_STEAL_TIME:
2408
2409                 if (unlikely(!sched_info_on()))
2410                         return 1;
2411
2412                 if (data & KVM_STEAL_RESERVED_MASK)
2413                         return 1;
2414
2415                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2416                                                 data & KVM_STEAL_VALID_BITS,
2417                                                 sizeof(struct kvm_steal_time)))
2418                         return 1;
2419
2420                 vcpu->arch.st.msr_val = data;
2421
2422                 if (!(data & KVM_MSR_ENABLED))
2423                         break;
2424
2425                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2426
2427                 break;
2428         case MSR_KVM_PV_EOI_EN:
2429                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2430                         return 1;
2431                 break;
2432
2433         case MSR_IA32_MCG_CTL:
2434         case MSR_IA32_MCG_STATUS:
2435         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2436                 return set_msr_mce(vcpu, msr_info);
2437
2438         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2439         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2440                 pr = true; /* fall through */
2441         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2442         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2443                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2444                         return kvm_pmu_set_msr(vcpu, msr_info);
2445
2446                 if (pr || data != 0)
2447                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2448                                     "0x%x data 0x%llx\n", msr, data);
2449                 break;
2450         case MSR_K7_CLK_CTL:
2451                 /*
2452                  * Ignore all writes to this no longer documented MSR.
2453                  * Writes are only relevant for old K7 processors,
2454                  * all pre-dating SVM, but a recommended workaround from
2455                  * AMD for these chips. It is possible to specify the
2456                  * affected processor models on the command line, hence
2457                  * the need to ignore the workaround.
2458                  */
2459                 break;
2460         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2461         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2462         case HV_X64_MSR_CRASH_CTL:
2463         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2464         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2465         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2466         case HV_X64_MSR_TSC_EMULATION_STATUS:
2467                 return kvm_hv_set_msr_common(vcpu, msr, data,
2468                                              msr_info->host_initiated);
2469         case MSR_IA32_BBL_CR_CTL3:
2470                 /* Drop writes to this legacy MSR -- see rdmsr
2471                  * counterpart for further detail.
2472                  */
2473                 if (report_ignored_msrs)
2474                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2475                                 msr, data);
2476                 break;
2477         case MSR_AMD64_OSVW_ID_LENGTH:
2478                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2479                         return 1;
2480                 vcpu->arch.osvw.length = data;
2481                 break;
2482         case MSR_AMD64_OSVW_STATUS:
2483                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2484                         return 1;
2485                 vcpu->arch.osvw.status = data;
2486                 break;
2487         case MSR_PLATFORM_INFO:
2488                 if (!msr_info->host_initiated ||
2489                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2490                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2491                      cpuid_fault_enabled(vcpu)))
2492                         return 1;
2493                 vcpu->arch.msr_platform_info = data;
2494                 break;
2495         case MSR_MISC_FEATURES_ENABLES:
2496                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2497                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2498                      !supports_cpuid_fault(vcpu)))
2499                         return 1;
2500                 vcpu->arch.msr_misc_features_enables = data;
2501                 break;
2502         default:
2503                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2504                         return xen_hvm_config(vcpu, data);
2505                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2506                         return kvm_pmu_set_msr(vcpu, msr_info);
2507                 if (!ignore_msrs) {
2508                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2509                                     msr, data);
2510                         return 1;
2511                 } else {
2512                         if (report_ignored_msrs)
2513                                 vcpu_unimpl(vcpu,
2514                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2515                                         msr, data);
2516                         break;
2517                 }
2518         }
2519         return 0;
2520 }
2521 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2522
2523
2524 /*
2525  * Reads an msr value (of 'msr_index') into 'pdata'.
2526  * Returns 0 on success, non-0 otherwise.
2527  * Assumes vcpu_load() was already called.
2528  */
2529 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2530 {
2531         return kvm_x86_ops->get_msr(vcpu, msr);
2532 }
2533 EXPORT_SYMBOL_GPL(kvm_get_msr);
2534
2535 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2536 {
2537         u64 data;
2538         u64 mcg_cap = vcpu->arch.mcg_cap;
2539         unsigned bank_num = mcg_cap & 0xff;
2540
2541         switch (msr) {
2542         case MSR_IA32_P5_MC_ADDR:
2543         case MSR_IA32_P5_MC_TYPE:
2544                 data = 0;
2545                 break;
2546         case MSR_IA32_MCG_CAP:
2547                 data = vcpu->arch.mcg_cap;
2548                 break;
2549         case MSR_IA32_MCG_CTL:
2550                 if (!(mcg_cap & MCG_CTL_P))
2551                         return 1;
2552                 data = vcpu->arch.mcg_ctl;
2553                 break;
2554         case MSR_IA32_MCG_STATUS:
2555                 data = vcpu->arch.mcg_status;
2556                 break;
2557         default:
2558                 if (msr >= MSR_IA32_MC0_CTL &&
2559                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2560                         u32 offset = msr - MSR_IA32_MC0_CTL;
2561                         data = vcpu->arch.mce_banks[offset];
2562                         break;
2563                 }
2564                 return 1;
2565         }
2566         *pdata = data;
2567         return 0;
2568 }
2569
2570 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2571 {
2572         switch (msr_info->index) {
2573         case MSR_IA32_PLATFORM_ID:
2574         case MSR_IA32_EBL_CR_POWERON:
2575         case MSR_IA32_DEBUGCTLMSR:
2576         case MSR_IA32_LASTBRANCHFROMIP:
2577         case MSR_IA32_LASTBRANCHTOIP:
2578         case MSR_IA32_LASTINTFROMIP:
2579         case MSR_IA32_LASTINTTOIP:
2580         case MSR_K8_SYSCFG:
2581         case MSR_K8_TSEG_ADDR:
2582         case MSR_K8_TSEG_MASK:
2583         case MSR_K7_HWCR:
2584         case MSR_VM_HSAVE_PA:
2585         case MSR_K8_INT_PENDING_MSG:
2586         case MSR_AMD64_NB_CFG:
2587         case MSR_FAM10H_MMIO_CONF_BASE:
2588         case MSR_AMD64_BU_CFG2:
2589         case MSR_IA32_PERF_CTL:
2590         case MSR_AMD64_DC_CFG:
2591                 msr_info->data = 0;
2592                 break;
2593         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2594         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2595         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2596         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2597         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2598                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2599                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2600                 msr_info->data = 0;
2601                 break;
2602         case MSR_IA32_UCODE_REV:
2603                 msr_info->data = vcpu->arch.microcode_version;
2604                 break;
2605         case MSR_MTRRcap:
2606         case 0x200 ... 0x2ff:
2607                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2608         case 0xcd: /* fsb frequency */
2609                 msr_info->data = 3;
2610                 break;
2611                 /*
2612                  * MSR_EBC_FREQUENCY_ID
2613                  * Conservative value valid for even the basic CPU models.
2614                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2615                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2616                  * and 266MHz for model 3, or 4. Set Core Clock
2617                  * Frequency to System Bus Frequency Ratio to 1 (bits
2618                  * 31:24) even though these are only valid for CPU
2619                  * models > 2, however guests may end up dividing or
2620                  * multiplying by zero otherwise.
2621                  */
2622         case MSR_EBC_FREQUENCY_ID:
2623                 msr_info->data = 1 << 24;
2624                 break;
2625         case MSR_IA32_APICBASE:
2626                 msr_info->data = kvm_get_apic_base(vcpu);
2627                 break;
2628         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2629                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2630                 break;
2631         case MSR_IA32_TSCDEADLINE:
2632                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2633                 break;
2634         case MSR_IA32_TSC_ADJUST:
2635                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2636                 break;
2637         case MSR_IA32_MISC_ENABLE:
2638                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2639                 break;
2640         case MSR_IA32_SMBASE:
2641                 if (!msr_info->host_initiated)
2642                         return 1;
2643                 msr_info->data = vcpu->arch.smbase;
2644                 break;
2645         case MSR_SMI_COUNT:
2646                 msr_info->data = vcpu->arch.smi_count;
2647                 break;
2648         case MSR_IA32_PERF_STATUS:
2649                 /* TSC increment by tick */
2650                 msr_info->data = 1000ULL;
2651                 /* CPU multiplier */
2652                 msr_info->data |= (((uint64_t)4ULL) << 40);
2653                 break;
2654         case MSR_EFER:
2655                 msr_info->data = vcpu->arch.efer;
2656                 break;
2657         case MSR_KVM_WALL_CLOCK:
2658         case MSR_KVM_WALL_CLOCK_NEW:
2659                 msr_info->data = vcpu->kvm->arch.wall_clock;
2660                 break;
2661         case MSR_KVM_SYSTEM_TIME:
2662         case MSR_KVM_SYSTEM_TIME_NEW:
2663                 msr_info->data = vcpu->arch.time;
2664                 break;
2665         case MSR_KVM_ASYNC_PF_EN:
2666                 msr_info->data = vcpu->arch.apf.msr_val;
2667                 break;
2668         case MSR_KVM_STEAL_TIME:
2669                 msr_info->data = vcpu->arch.st.msr_val;
2670                 break;
2671         case MSR_KVM_PV_EOI_EN:
2672                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2673                 break;
2674         case MSR_IA32_P5_MC_ADDR:
2675         case MSR_IA32_P5_MC_TYPE:
2676         case MSR_IA32_MCG_CAP:
2677         case MSR_IA32_MCG_CTL:
2678         case MSR_IA32_MCG_STATUS:
2679         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2680                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2681         case MSR_K7_CLK_CTL:
2682                 /*
2683                  * Provide expected ramp-up count for K7. All other
2684                  * are set to zero, indicating minimum divisors for
2685                  * every field.
2686                  *
2687                  * This prevents guest kernels on AMD host with CPU
2688                  * type 6, model 8 and higher from exploding due to
2689                  * the rdmsr failing.
2690                  */
2691                 msr_info->data = 0x20000000;
2692                 break;
2693         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2694         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2695         case HV_X64_MSR_CRASH_CTL:
2696         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2697         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2698         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2699         case HV_X64_MSR_TSC_EMULATION_STATUS:
2700                 return kvm_hv_get_msr_common(vcpu,
2701                                              msr_info->index, &msr_info->data);
2702                 break;
2703         case MSR_IA32_BBL_CR_CTL3:
2704                 /* This legacy MSR exists but isn't fully documented in current
2705                  * silicon.  It is however accessed by winxp in very narrow
2706                  * scenarios where it sets bit #19, itself documented as
2707                  * a "reserved" bit.  Best effort attempt to source coherent
2708                  * read data here should the balance of the register be
2709                  * interpreted by the guest:
2710                  *
2711                  * L2 cache control register 3: 64GB range, 256KB size,
2712                  * enabled, latency 0x1, configured
2713                  */
2714                 msr_info->data = 0xbe702111;
2715                 break;
2716         case MSR_AMD64_OSVW_ID_LENGTH:
2717                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2718                         return 1;
2719                 msr_info->data = vcpu->arch.osvw.length;
2720                 break;
2721         case MSR_AMD64_OSVW_STATUS:
2722                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2723                         return 1;
2724                 msr_info->data = vcpu->arch.osvw.status;
2725                 break;
2726         case MSR_PLATFORM_INFO:
2727                 msr_info->data = vcpu->arch.msr_platform_info;
2728                 break;
2729         case MSR_MISC_FEATURES_ENABLES:
2730                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2731                 break;
2732         default:
2733                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2734                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2735                 if (!ignore_msrs) {
2736                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2737                                                msr_info->index);
2738                         return 1;
2739                 } else {
2740                         if (report_ignored_msrs)
2741                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2742                                         msr_info->index);
2743                         msr_info->data = 0;
2744                 }
2745                 break;
2746         }
2747         return 0;
2748 }
2749 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2750
2751 /*
2752  * Read or write a bunch of msrs. All parameters are kernel addresses.
2753  *
2754  * @return number of msrs set successfully.
2755  */
2756 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2757                     struct kvm_msr_entry *entries,
2758                     int (*do_msr)(struct kvm_vcpu *vcpu,
2759                                   unsigned index, u64 *data))
2760 {
2761         int i;
2762
2763         for (i = 0; i < msrs->nmsrs; ++i)
2764                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2765                         break;
2766
2767         return i;
2768 }
2769
2770 /*
2771  * Read or write a bunch of msrs. Parameters are user addresses.
2772  *
2773  * @return number of msrs set successfully.
2774  */
2775 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2776                   int (*do_msr)(struct kvm_vcpu *vcpu,
2777                                 unsigned index, u64 *data),
2778                   int writeback)
2779 {
2780         struct kvm_msrs msrs;
2781         struct kvm_msr_entry *entries;
2782         int r, n;
2783         unsigned size;
2784
2785         r = -EFAULT;
2786         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2787                 goto out;
2788
2789         r = -E2BIG;
2790         if (msrs.nmsrs >= MAX_IO_MSRS)
2791                 goto out;
2792
2793         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2794         entries = memdup_user(user_msrs->entries, size);
2795         if (IS_ERR(entries)) {
2796                 r = PTR_ERR(entries);
2797                 goto out;
2798         }
2799
2800         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2801         if (r < 0)
2802                 goto out_free;
2803
2804         r = -EFAULT;
2805         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2806                 goto out_free;
2807
2808         r = n;
2809
2810 out_free:
2811         kfree(entries);
2812 out:
2813         return r;
2814 }
2815
2816 static inline bool kvm_can_mwait_in_guest(void)
2817 {
2818         return boot_cpu_has(X86_FEATURE_MWAIT) &&
2819                 !boot_cpu_has_bug(X86_BUG_MONITOR);
2820 }
2821
2822 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2823 {
2824         int r = 0;
2825
2826         switch (ext) {
2827         case KVM_CAP_IRQCHIP:
2828         case KVM_CAP_HLT:
2829         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2830         case KVM_CAP_SET_TSS_ADDR:
2831         case KVM_CAP_EXT_CPUID:
2832         case KVM_CAP_EXT_EMUL_CPUID:
2833         case KVM_CAP_CLOCKSOURCE:
2834         case KVM_CAP_PIT:
2835         case KVM_CAP_NOP_IO_DELAY:
2836         case KVM_CAP_MP_STATE:
2837         case KVM_CAP_SYNC_MMU:
2838         case KVM_CAP_USER_NMI:
2839         case KVM_CAP_REINJECT_CONTROL:
2840         case KVM_CAP_IRQ_INJECT_STATUS:
2841         case KVM_CAP_IOEVENTFD:
2842         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2843         case KVM_CAP_PIT2:
2844         case KVM_CAP_PIT_STATE2:
2845         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2846         case KVM_CAP_XEN_HVM:
2847         case KVM_CAP_VCPU_EVENTS:
2848         case KVM_CAP_HYPERV:
2849         case KVM_CAP_HYPERV_VAPIC:
2850         case KVM_CAP_HYPERV_SPIN:
2851         case KVM_CAP_HYPERV_SYNIC:
2852         case KVM_CAP_HYPERV_SYNIC2:
2853         case KVM_CAP_HYPERV_VP_INDEX:
2854         case KVM_CAP_HYPERV_EVENTFD:
2855         case KVM_CAP_PCI_SEGMENT:
2856         case KVM_CAP_DEBUGREGS:
2857         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2858         case KVM_CAP_XSAVE:
2859         case KVM_CAP_ASYNC_PF:
2860         case KVM_CAP_GET_TSC_KHZ:
2861         case KVM_CAP_KVMCLOCK_CTRL:
2862         case KVM_CAP_READONLY_MEM:
2863         case KVM_CAP_HYPERV_TIME:
2864         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2865         case KVM_CAP_TSC_DEADLINE_TIMER:
2866         case KVM_CAP_ENABLE_CAP_VM:
2867         case KVM_CAP_DISABLE_QUIRKS:
2868         case KVM_CAP_SET_BOOT_CPU_ID:
2869         case KVM_CAP_SPLIT_IRQCHIP:
2870         case KVM_CAP_IMMEDIATE_EXIT:
2871         case KVM_CAP_GET_MSR_FEATURES:
2872                 r = 1;
2873                 break;
2874         case KVM_CAP_SYNC_REGS:
2875                 r = KVM_SYNC_X86_VALID_FIELDS;
2876                 break;
2877         case KVM_CAP_ADJUST_CLOCK:
2878                 r = KVM_CLOCK_TSC_STABLE;
2879                 break;
2880         case KVM_CAP_X86_DISABLE_EXITS:
2881                 r |=  KVM_X86_DISABLE_EXITS_HTL | KVM_X86_DISABLE_EXITS_PAUSE;
2882                 if(kvm_can_mwait_in_guest())
2883                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
2884                 break;
2885         case KVM_CAP_X86_SMM:
2886                 /* SMBASE is usually relocated above 1M on modern chipsets,
2887                  * and SMM handlers might indeed rely on 4G segment limits,
2888                  * so do not report SMM to be available if real mode is
2889                  * emulated via vm86 mode.  Still, do not go to great lengths
2890                  * to avoid userspace's usage of the feature, because it is a
2891                  * fringe case that is not enabled except via specific settings
2892                  * of the module parameters.
2893                  */
2894                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2895                 break;
2896         case KVM_CAP_VAPIC:
2897                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2898                 break;
2899         case KVM_CAP_NR_VCPUS:
2900                 r = KVM_SOFT_MAX_VCPUS;
2901                 break;
2902         case KVM_CAP_MAX_VCPUS:
2903                 r = KVM_MAX_VCPUS;
2904                 break;
2905         case KVM_CAP_NR_MEMSLOTS:
2906                 r = KVM_USER_MEM_SLOTS;
2907                 break;
2908         case KVM_CAP_PV_MMU:    /* obsolete */
2909                 r = 0;
2910                 break;
2911         case KVM_CAP_MCE:
2912                 r = KVM_MAX_MCE_BANKS;
2913                 break;
2914         case KVM_CAP_XCRS:
2915                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2916                 break;
2917         case KVM_CAP_TSC_CONTROL:
2918                 r = kvm_has_tsc_control;
2919                 break;
2920         case KVM_CAP_X2APIC_API:
2921                 r = KVM_X2APIC_API_VALID_FLAGS;
2922                 break;
2923         default:
2924                 break;
2925         }
2926         return r;
2927
2928 }
2929
2930 long kvm_arch_dev_ioctl(struct file *filp,
2931                         unsigned int ioctl, unsigned long arg)
2932 {
2933         void __user *argp = (void __user *)arg;
2934         long r;
2935
2936         switch (ioctl) {
2937         case KVM_GET_MSR_INDEX_LIST: {
2938                 struct kvm_msr_list __user *user_msr_list = argp;
2939                 struct kvm_msr_list msr_list;
2940                 unsigned n;
2941
2942                 r = -EFAULT;
2943                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2944                         goto out;
2945                 n = msr_list.nmsrs;
2946                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2947                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2948                         goto out;
2949                 r = -E2BIG;
2950                 if (n < msr_list.nmsrs)
2951                         goto out;
2952                 r = -EFAULT;
2953                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2954                                  num_msrs_to_save * sizeof(u32)))
2955                         goto out;
2956                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2957                                  &emulated_msrs,
2958                                  num_emulated_msrs * sizeof(u32)))
2959                         goto out;
2960                 r = 0;
2961                 break;
2962         }
2963         case KVM_GET_SUPPORTED_CPUID:
2964         case KVM_GET_EMULATED_CPUID: {
2965                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2966                 struct kvm_cpuid2 cpuid;
2967
2968                 r = -EFAULT;
2969                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2970                         goto out;
2971
2972                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2973                                             ioctl);
2974                 if (r)
2975                         goto out;
2976
2977                 r = -EFAULT;
2978                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2979                         goto out;
2980                 r = 0;
2981                 break;
2982         }
2983         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2984                 r = -EFAULT;
2985                 if (copy_to_user(argp, &kvm_mce_cap_supported,
2986                                  sizeof(kvm_mce_cap_supported)))
2987                         goto out;
2988                 r = 0;
2989                 break;
2990         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
2991                 struct kvm_msr_list __user *user_msr_list = argp;
2992                 struct kvm_msr_list msr_list;
2993                 unsigned int n;
2994
2995                 r = -EFAULT;
2996                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
2997                         goto out;
2998                 n = msr_list.nmsrs;
2999                 msr_list.nmsrs = num_msr_based_features;
3000                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3001                         goto out;
3002                 r = -E2BIG;
3003                 if (n < msr_list.nmsrs)
3004                         goto out;
3005                 r = -EFAULT;
3006                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3007                                  num_msr_based_features * sizeof(u32)))
3008                         goto out;
3009                 r = 0;
3010                 break;
3011         }
3012         case KVM_GET_MSRS:
3013                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3014                 break;
3015         }
3016         default:
3017                 r = -EINVAL;
3018         }
3019 out:
3020         return r;
3021 }
3022
3023 static void wbinvd_ipi(void *garbage)
3024 {
3025         wbinvd();
3026 }
3027
3028 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3029 {
3030         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3031 }
3032
3033 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3034 {
3035         /* Address WBINVD may be executed by guest */
3036         if (need_emulate_wbinvd(vcpu)) {
3037                 if (kvm_x86_ops->has_wbinvd_exit())
3038                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3039                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3040                         smp_call_function_single(vcpu->cpu,
3041                                         wbinvd_ipi, NULL, 1);
3042         }
3043
3044         kvm_x86_ops->vcpu_load(vcpu, cpu);
3045
3046         /* Apply any externally detected TSC adjustments (due to suspend) */
3047         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3048                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3049                 vcpu->arch.tsc_offset_adjustment = 0;
3050                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3051         }
3052
3053         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3054                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3055                                 rdtsc() - vcpu->arch.last_host_tsc;
3056                 if (tsc_delta < 0)
3057                         mark_tsc_unstable("KVM discovered backwards TSC");
3058
3059                 if (kvm_check_tsc_unstable()) {
3060                         u64 offset = kvm_compute_tsc_offset(vcpu,
3061                                                 vcpu->arch.last_guest_tsc);
3062                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3063                         vcpu->arch.tsc_catchup = 1;
3064                 }
3065
3066                 if (kvm_lapic_hv_timer_in_use(vcpu))
3067                         kvm_lapic_restart_hv_timer(vcpu);
3068
3069                 /*
3070                  * On a host with synchronized TSC, there is no need to update
3071                  * kvmclock on vcpu->cpu migration
3072                  */
3073                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3074                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3075                 if (vcpu->cpu != cpu)
3076                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3077                 vcpu->cpu = cpu;
3078         }
3079
3080         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3081 }
3082
3083 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3084 {
3085         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3086                 return;
3087
3088         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3089
3090         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3091                         &vcpu->arch.st.steal.preempted,
3092                         offsetof(struct kvm_steal_time, preempted),
3093                         sizeof(vcpu->arch.st.steal.preempted));
3094 }
3095
3096 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3097 {
3098         int idx;
3099
3100         if (vcpu->preempted)
3101                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3102
3103         /*
3104          * Disable page faults because we're in atomic context here.
3105          * kvm_write_guest_offset_cached() would call might_fault()
3106          * that relies on pagefault_disable() to tell if there's a
3107          * bug. NOTE: the write to guest memory may not go through if
3108          * during postcopy live migration or if there's heavy guest
3109          * paging.
3110          */
3111         pagefault_disable();
3112         /*
3113          * kvm_memslots() will be called by
3114          * kvm_write_guest_offset_cached() so take the srcu lock.
3115          */
3116         idx = srcu_read_lock(&vcpu->kvm->srcu);
3117         kvm_steal_time_set_preempted(vcpu);
3118         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3119         pagefault_enable();
3120         kvm_x86_ops->vcpu_put(vcpu);
3121         vcpu->arch.last_host_tsc = rdtsc();
3122         /*
3123          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3124          * on every vmexit, but if not, we might have a stale dr6 from the
3125          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3126          */
3127         set_debugreg(0, 6);
3128 }
3129
3130 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3131                                     struct kvm_lapic_state *s)
3132 {
3133         if (vcpu->arch.apicv_active)
3134                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3135
3136         return kvm_apic_get_state(vcpu, s);
3137 }
3138
3139 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3140                                     struct kvm_lapic_state *s)
3141 {
3142         int r;
3143
3144         r = kvm_apic_set_state(vcpu, s);
3145         if (r)
3146                 return r;
3147         update_cr8_intercept(vcpu);
3148
3149         return 0;
3150 }
3151
3152 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3153 {
3154         return (!lapic_in_kernel(vcpu) ||
3155                 kvm_apic_accept_pic_intr(vcpu));
3156 }
3157
3158 /*
3159  * if userspace requested an interrupt window, check that the
3160  * interrupt window is open.
3161  *
3162  * No need to exit to userspace if we already have an interrupt queued.
3163  */
3164 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3165 {
3166         return kvm_arch_interrupt_allowed(vcpu) &&
3167                 !kvm_cpu_has_interrupt(vcpu) &&
3168                 !kvm_event_needs_reinjection(vcpu) &&
3169                 kvm_cpu_accept_dm_intr(vcpu);
3170 }
3171
3172 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3173                                     struct kvm_interrupt *irq)
3174 {
3175         if (irq->irq >= KVM_NR_INTERRUPTS)
3176                 return -EINVAL;
3177
3178         if (!irqchip_in_kernel(vcpu->kvm)) {
3179                 kvm_queue_interrupt(vcpu, irq->irq, false);
3180                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3181                 return 0;
3182         }
3183
3184         /*
3185          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3186          * fail for in-kernel 8259.
3187          */
3188         if (pic_in_kernel(vcpu->kvm))
3189                 return -ENXIO;
3190
3191         if (vcpu->arch.pending_external_vector != -1)
3192                 return -EEXIST;
3193
3194         vcpu->arch.pending_external_vector = irq->irq;
3195         kvm_make_request(KVM_REQ_EVENT, vcpu);
3196         return 0;
3197 }
3198
3199 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3200 {
3201         kvm_inject_nmi(vcpu);
3202
3203         return 0;
3204 }
3205
3206 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3207 {
3208         kvm_make_request(KVM_REQ_SMI, vcpu);
3209
3210         return 0;
3211 }
3212
3213 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3214                                            struct kvm_tpr_access_ctl *tac)
3215 {
3216         if (tac->flags)
3217                 return -EINVAL;
3218         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3219         return 0;
3220 }
3221
3222 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3223                                         u64 mcg_cap)
3224 {
3225         int r;
3226         unsigned bank_num = mcg_cap & 0xff, bank;
3227
3228         r = -EINVAL;
3229         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3230                 goto out;
3231         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3232                 goto out;
3233         r = 0;
3234         vcpu->arch.mcg_cap = mcg_cap;
3235         /* Init IA32_MCG_CTL to all 1s */
3236         if (mcg_cap & MCG_CTL_P)
3237                 vcpu->arch.mcg_ctl = ~(u64)0;
3238         /* Init IA32_MCi_CTL to all 1s */
3239         for (bank = 0; bank < bank_num; bank++)
3240                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3241
3242         if (kvm_x86_ops->setup_mce)
3243                 kvm_x86_ops->setup_mce(vcpu);
3244 out:
3245         return r;
3246 }
3247
3248 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3249                                       struct kvm_x86_mce *mce)
3250 {
3251         u64 mcg_cap = vcpu->arch.mcg_cap;
3252         unsigned bank_num = mcg_cap & 0xff;
3253         u64 *banks = vcpu->arch.mce_banks;
3254
3255         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3256                 return -EINVAL;
3257         /*
3258          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3259          * reporting is disabled
3260          */
3261         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3262             vcpu->arch.mcg_ctl != ~(u64)0)
3263                 return 0;
3264         banks += 4 * mce->bank;
3265         /*
3266          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3267          * reporting is disabled for the bank
3268          */
3269         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3270                 return 0;
3271         if (mce->status & MCI_STATUS_UC) {
3272                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3273                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3274                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3275                         return 0;
3276                 }
3277                 if (banks[1] & MCI_STATUS_VAL)
3278                         mce->status |= MCI_STATUS_OVER;
3279                 banks[2] = mce->addr;
3280                 banks[3] = mce->misc;
3281                 vcpu->arch.mcg_status = mce->mcg_status;
3282                 banks[1] = mce->status;
3283                 kvm_queue_exception(vcpu, MC_VECTOR);
3284         } else if (!(banks[1] & MCI_STATUS_VAL)
3285                    || !(banks[1] & MCI_STATUS_UC)) {
3286                 if (banks[1] & MCI_STATUS_VAL)
3287                         mce->status |= MCI_STATUS_OVER;
3288                 banks[2] = mce->addr;
3289                 banks[3] = mce->misc;
3290                 banks[1] = mce->status;
3291         } else
3292                 banks[1] |= MCI_STATUS_OVER;
3293         return 0;
3294 }
3295
3296 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3297                                                struct kvm_vcpu_events *events)
3298 {
3299         process_nmi(vcpu);
3300         /*
3301          * FIXME: pass injected and pending separately.  This is only
3302          * needed for nested virtualization, whose state cannot be
3303          * migrated yet.  For now we can combine them.
3304          */
3305         events->exception.injected =
3306                 (vcpu->arch.exception.pending ||
3307                  vcpu->arch.exception.injected) &&
3308                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3309         events->exception.nr = vcpu->arch.exception.nr;
3310         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3311         events->exception.pad = 0;
3312         events->exception.error_code = vcpu->arch.exception.error_code;
3313
3314         events->interrupt.injected =
3315                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3316         events->interrupt.nr = vcpu->arch.interrupt.nr;
3317         events->interrupt.soft = 0;
3318         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3319
3320         events->nmi.injected = vcpu->arch.nmi_injected;
3321         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3322         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3323         events->nmi.pad = 0;
3324
3325         events->sipi_vector = 0; /* never valid when reporting to user space */
3326
3327         events->smi.smm = is_smm(vcpu);
3328         events->smi.pending = vcpu->arch.smi_pending;
3329         events->smi.smm_inside_nmi =
3330                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3331         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3332
3333         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3334                          | KVM_VCPUEVENT_VALID_SHADOW
3335                          | KVM_VCPUEVENT_VALID_SMM);
3336         memset(&events->reserved, 0, sizeof(events->reserved));
3337 }
3338
3339 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3340
3341 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3342                                               struct kvm_vcpu_events *events)
3343 {
3344         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3345                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3346                               | KVM_VCPUEVENT_VALID_SHADOW
3347                               | KVM_VCPUEVENT_VALID_SMM))
3348                 return -EINVAL;
3349
3350         if (events->exception.injected &&
3351             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3352              is_guest_mode(vcpu)))
3353                 return -EINVAL;
3354
3355         /* INITs are latched while in SMM */
3356         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3357             (events->smi.smm || events->smi.pending) &&
3358             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3359                 return -EINVAL;
3360
3361         process_nmi(vcpu);
3362         vcpu->arch.exception.injected = false;
3363         vcpu->arch.exception.pending = events->exception.injected;
3364         vcpu->arch.exception.nr = events->exception.nr;
3365         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3366         vcpu->arch.exception.error_code = events->exception.error_code;
3367
3368         vcpu->arch.interrupt.pending = events->interrupt.injected;
3369         vcpu->arch.interrupt.nr = events->interrupt.nr;
3370         vcpu->arch.interrupt.soft = events->interrupt.soft;
3371         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3372                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3373                                                   events->interrupt.shadow);
3374
3375         vcpu->arch.nmi_injected = events->nmi.injected;
3376         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3377                 vcpu->arch.nmi_pending = events->nmi.pending;
3378         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3379
3380         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3381             lapic_in_kernel(vcpu))
3382                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3383
3384         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3385                 u32 hflags = vcpu->arch.hflags;
3386                 if (events->smi.smm)
3387                         hflags |= HF_SMM_MASK;
3388                 else
3389                         hflags &= ~HF_SMM_MASK;
3390                 kvm_set_hflags(vcpu, hflags);
3391
3392                 vcpu->arch.smi_pending = events->smi.pending;
3393
3394                 if (events->smi.smm) {
3395                         if (events->smi.smm_inside_nmi)
3396                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3397                         else
3398                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3399                         if (lapic_in_kernel(vcpu)) {
3400                                 if (events->smi.latched_init)
3401                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3402                                 else
3403                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3404                         }
3405                 }
3406         }
3407
3408         kvm_make_request(KVM_REQ_EVENT, vcpu);
3409
3410         return 0;
3411 }
3412
3413 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3414                                              struct kvm_debugregs *dbgregs)
3415 {
3416         unsigned long val;
3417
3418         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3419         kvm_get_dr(vcpu, 6, &val);
3420         dbgregs->dr6 = val;
3421         dbgregs->dr7 = vcpu->arch.dr7;
3422         dbgregs->flags = 0;
3423         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3424 }
3425
3426 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3427                                             struct kvm_debugregs *dbgregs)
3428 {
3429         if (dbgregs->flags)
3430                 return -EINVAL;
3431
3432         if (dbgregs->dr6 & ~0xffffffffull)
3433                 return -EINVAL;
3434         if (dbgregs->dr7 & ~0xffffffffull)
3435                 return -EINVAL;
3436
3437         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3438         kvm_update_dr0123(vcpu);
3439         vcpu->arch.dr6 = dbgregs->dr6;
3440         kvm_update_dr6(vcpu);
3441         vcpu->arch.dr7 = dbgregs->dr7;
3442         kvm_update_dr7(vcpu);
3443
3444         return 0;
3445 }
3446
3447 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3448
3449 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3450 {
3451         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3452         u64 xstate_bv = xsave->header.xfeatures;
3453         u64 valid;
3454
3455         /*
3456          * Copy legacy XSAVE area, to avoid complications with CPUID
3457          * leaves 0 and 1 in the loop below.
3458          */
3459         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3460
3461         /* Set XSTATE_BV */
3462         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3463         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3464
3465         /*
3466          * Copy each region from the possibly compacted offset to the
3467          * non-compacted offset.
3468          */
3469         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3470         while (valid) {
3471                 u64 feature = valid & -valid;
3472                 int index = fls64(feature) - 1;
3473                 void *src = get_xsave_addr(xsave, feature);
3474
3475                 if (src) {
3476                         u32 size, offset, ecx, edx;
3477                         cpuid_count(XSTATE_CPUID, index,
3478                                     &size, &offset, &ecx, &edx);
3479                         if (feature == XFEATURE_MASK_PKRU)
3480                                 memcpy(dest + offset, &vcpu->arch.pkru,
3481                                        sizeof(vcpu->arch.pkru));
3482                         else
3483                                 memcpy(dest + offset, src, size);
3484
3485                 }
3486
3487                 valid -= feature;
3488         }
3489 }
3490
3491 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3492 {
3493         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3494         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3495         u64 valid;
3496
3497         /*
3498          * Copy legacy XSAVE area, to avoid complications with CPUID
3499          * leaves 0 and 1 in the loop below.
3500          */
3501         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3502
3503         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3504         xsave->header.xfeatures = xstate_bv;
3505         if (boot_cpu_has(X86_FEATURE_XSAVES))
3506                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3507
3508         /*
3509          * Copy each region from the non-compacted offset to the
3510          * possibly compacted offset.
3511          */
3512         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3513         while (valid) {
3514                 u64 feature = valid & -valid;
3515                 int index = fls64(feature) - 1;
3516                 void *dest = get_xsave_addr(xsave, feature);
3517
3518                 if (dest) {
3519                         u32 size, offset, ecx, edx;
3520                         cpuid_count(XSTATE_CPUID, index,
3521                                     &size, &offset, &ecx, &edx);
3522                         if (feature == XFEATURE_MASK_PKRU)
3523                                 memcpy(&vcpu->arch.pkru, src + offset,
3524                                        sizeof(vcpu->arch.pkru));
3525                         else
3526                                 memcpy(dest, src + offset, size);
3527                 }
3528
3529                 valid -= feature;
3530         }
3531 }
3532
3533 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3534                                          struct kvm_xsave *guest_xsave)
3535 {
3536         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3537                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3538                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3539         } else {
3540                 memcpy(guest_xsave->region,
3541                         &vcpu->arch.guest_fpu.state.fxsave,
3542                         sizeof(struct fxregs_state));
3543                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3544                         XFEATURE_MASK_FPSSE;
3545         }
3546 }
3547
3548 #define XSAVE_MXCSR_OFFSET 24
3549
3550 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3551                                         struct kvm_xsave *guest_xsave)
3552 {
3553         u64 xstate_bv =
3554                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3555         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3556
3557         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3558                 /*
3559                  * Here we allow setting states that are not present in
3560                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3561                  * with old userspace.
3562                  */
3563                 if (xstate_bv & ~kvm_supported_xcr0() ||
3564                         mxcsr & ~mxcsr_feature_mask)
3565                         return -EINVAL;
3566                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3567         } else {
3568                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3569                         mxcsr & ~mxcsr_feature_mask)
3570                         return -EINVAL;
3571                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3572                         guest_xsave->region, sizeof(struct fxregs_state));
3573         }
3574         return 0;
3575 }
3576
3577 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3578                                         struct kvm_xcrs *guest_xcrs)
3579 {
3580         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3581                 guest_xcrs->nr_xcrs = 0;
3582                 return;
3583         }
3584
3585         guest_xcrs->nr_xcrs = 1;
3586         guest_xcrs->flags = 0;
3587         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3588         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3589 }
3590
3591 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3592                                        struct kvm_xcrs *guest_xcrs)
3593 {
3594         int i, r = 0;
3595
3596         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3597                 return -EINVAL;
3598
3599         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3600                 return -EINVAL;
3601
3602         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3603                 /* Only support XCR0 currently */
3604                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3605                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3606                                 guest_xcrs->xcrs[i].value);
3607                         break;
3608                 }
3609         if (r)
3610                 r = -EINVAL;
3611         return r;
3612 }
3613
3614 /*
3615  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3616  * stopped by the hypervisor.  This function will be called from the host only.
3617  * EINVAL is returned when the host attempts to set the flag for a guest that
3618  * does not support pv clocks.
3619  */
3620 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3621 {
3622         if (!vcpu->arch.pv_time_enabled)
3623                 return -EINVAL;
3624         vcpu->arch.pvclock_set_guest_stopped_request = true;
3625         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3626         return 0;
3627 }
3628
3629 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3630                                      struct kvm_enable_cap *cap)
3631 {
3632         if (cap->flags)
3633                 return -EINVAL;
3634
3635         switch (cap->cap) {
3636         case KVM_CAP_HYPERV_SYNIC2:
3637                 if (cap->args[0])
3638                         return -EINVAL;
3639         case KVM_CAP_HYPERV_SYNIC:
3640                 if (!irqchip_in_kernel(vcpu->kvm))
3641                         return -EINVAL;
3642                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3643                                              KVM_CAP_HYPERV_SYNIC2);
3644         default:
3645                 return -EINVAL;
3646         }
3647 }
3648
3649 long kvm_arch_vcpu_ioctl(struct file *filp,
3650                          unsigned int ioctl, unsigned long arg)
3651 {
3652         struct kvm_vcpu *vcpu = filp->private_data;
3653         void __user *argp = (void __user *)arg;
3654         int r;
3655         union {
3656                 struct kvm_lapic_state *lapic;
3657                 struct kvm_xsave *xsave;
3658                 struct kvm_xcrs *xcrs;
3659                 void *buffer;
3660         } u;
3661
3662         vcpu_load(vcpu);
3663
3664         u.buffer = NULL;
3665         switch (ioctl) {
3666         case KVM_GET_LAPIC: {
3667                 r = -EINVAL;
3668                 if (!lapic_in_kernel(vcpu))
3669                         goto out;
3670                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3671
3672                 r = -ENOMEM;
3673                 if (!u.lapic)
3674                         goto out;
3675                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3676                 if (r)
3677                         goto out;
3678                 r = -EFAULT;
3679                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3680                         goto out;
3681                 r = 0;
3682                 break;
3683         }
3684         case KVM_SET_LAPIC: {
3685                 r = -EINVAL;
3686                 if (!lapic_in_kernel(vcpu))
3687                         goto out;
3688                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3689                 if (IS_ERR(u.lapic)) {
3690                         r = PTR_ERR(u.lapic);
3691                         goto out_nofree;
3692                 }
3693
3694                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3695                 break;
3696         }
3697         case KVM_INTERRUPT: {
3698                 struct kvm_interrupt irq;
3699
3700                 r = -EFAULT;
3701                 if (copy_from_user(&irq, argp, sizeof irq))
3702                         goto out;
3703                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3704                 break;
3705         }
3706         case KVM_NMI: {
3707                 r = kvm_vcpu_ioctl_nmi(vcpu);
3708                 break;
3709         }
3710         case KVM_SMI: {
3711                 r = kvm_vcpu_ioctl_smi(vcpu);
3712                 break;
3713         }
3714         case KVM_SET_CPUID: {
3715                 struct kvm_cpuid __user *cpuid_arg = argp;
3716                 struct kvm_cpuid cpuid;
3717
3718                 r = -EFAULT;
3719                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3720                         goto out;
3721                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3722                 break;
3723         }
3724         case KVM_SET_CPUID2: {
3725                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3726                 struct kvm_cpuid2 cpuid;
3727
3728                 r = -EFAULT;
3729                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3730                         goto out;
3731                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3732                                               cpuid_arg->entries);
3733                 break;
3734         }
3735         case KVM_GET_CPUID2: {
3736                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3737                 struct kvm_cpuid2 cpuid;
3738
3739                 r = -EFAULT;
3740                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3741                         goto out;
3742                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3743                                               cpuid_arg->entries);
3744                 if (r)
3745                         goto out;
3746                 r = -EFAULT;
3747                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3748                         goto out;
3749                 r = 0;
3750                 break;
3751         }
3752         case KVM_GET_MSRS: {
3753                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3754                 r = msr_io(vcpu, argp, do_get_msr, 1);
3755                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3756                 break;
3757         }
3758         case KVM_SET_MSRS: {
3759                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3760                 r = msr_io(vcpu, argp, do_set_msr, 0);
3761                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3762                 break;
3763         }
3764         case KVM_TPR_ACCESS_REPORTING: {
3765                 struct kvm_tpr_access_ctl tac;
3766
3767                 r = -EFAULT;
3768                 if (copy_from_user(&tac, argp, sizeof tac))
3769                         goto out;
3770                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3771                 if (r)
3772                         goto out;
3773                 r = -EFAULT;
3774                 if (copy_to_user(argp, &tac, sizeof tac))
3775                         goto out;
3776                 r = 0;
3777                 break;
3778         };
3779         case KVM_SET_VAPIC_ADDR: {
3780                 struct kvm_vapic_addr va;
3781                 int idx;
3782
3783                 r = -EINVAL;
3784                 if (!lapic_in_kernel(vcpu))
3785                         goto out;
3786                 r = -EFAULT;
3787                 if (copy_from_user(&va, argp, sizeof va))
3788                         goto out;
3789                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3790                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3791                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3792                 break;
3793         }
3794         case KVM_X86_SETUP_MCE: {
3795                 u64 mcg_cap;
3796
3797                 r = -EFAULT;
3798                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3799                         goto out;
3800                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3801                 break;
3802         }
3803         case KVM_X86_SET_MCE: {
3804                 struct kvm_x86_mce mce;
3805
3806                 r = -EFAULT;
3807                 if (copy_from_user(&mce, argp, sizeof mce))
3808                         goto out;
3809                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3810                 break;
3811         }
3812         case KVM_GET_VCPU_EVENTS: {
3813                 struct kvm_vcpu_events events;
3814
3815                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3816
3817                 r = -EFAULT;
3818                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3819                         break;
3820                 r = 0;
3821                 break;
3822         }
3823         case KVM_SET_VCPU_EVENTS: {
3824                 struct kvm_vcpu_events events;
3825
3826                 r = -EFAULT;
3827                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3828                         break;
3829
3830                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3831                 break;
3832         }
3833         case KVM_GET_DEBUGREGS: {
3834                 struct kvm_debugregs dbgregs;
3835
3836                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3837
3838                 r = -EFAULT;
3839                 if (copy_to_user(argp, &dbgregs,
3840                                  sizeof(struct kvm_debugregs)))
3841                         break;
3842                 r = 0;
3843                 break;
3844         }
3845         case KVM_SET_DEBUGREGS: {
3846                 struct kvm_debugregs dbgregs;
3847
3848                 r = -EFAULT;
3849                 if (copy_from_user(&dbgregs, argp,
3850                                    sizeof(struct kvm_debugregs)))
3851                         break;
3852
3853                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3854                 break;
3855         }
3856         case KVM_GET_XSAVE: {
3857                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3858                 r = -ENOMEM;
3859                 if (!u.xsave)
3860                         break;
3861
3862                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3863
3864                 r = -EFAULT;
3865                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3866                         break;
3867                 r = 0;
3868                 break;
3869         }
3870         case KVM_SET_XSAVE: {
3871                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3872                 if (IS_ERR(u.xsave)) {
3873                         r = PTR_ERR(u.xsave);
3874                         goto out_nofree;
3875                 }
3876
3877                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3878                 break;
3879         }
3880         case KVM_GET_XCRS: {
3881                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3882                 r = -ENOMEM;
3883                 if (!u.xcrs)
3884                         break;
3885
3886                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3887
3888                 r = -EFAULT;
3889                 if (copy_to_user(argp, u.xcrs,
3890                                  sizeof(struct kvm_xcrs)))
3891                         break;
3892                 r = 0;
3893                 break;
3894         }
3895         case KVM_SET_XCRS: {
3896                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3897                 if (IS_ERR(u.xcrs)) {
3898                         r = PTR_ERR(u.xcrs);
3899                         goto out_nofree;
3900                 }
3901
3902                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3903                 break;
3904         }
3905         case KVM_SET_TSC_KHZ: {
3906                 u32 user_tsc_khz;
3907
3908                 r = -EINVAL;
3909                 user_tsc_khz = (u32)arg;
3910
3911                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3912                         goto out;
3913
3914                 if (user_tsc_khz == 0)
3915                         user_tsc_khz = tsc_khz;
3916
3917                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3918                         r = 0;
3919
3920                 goto out;
3921         }
3922         case KVM_GET_TSC_KHZ: {
3923                 r = vcpu->arch.virtual_tsc_khz;
3924                 goto out;
3925         }
3926         case KVM_KVMCLOCK_CTRL: {
3927                 r = kvm_set_guest_paused(vcpu);
3928                 goto out;
3929         }
3930         case KVM_ENABLE_CAP: {
3931                 struct kvm_enable_cap cap;
3932
3933                 r = -EFAULT;
3934                 if (copy_from_user(&cap, argp, sizeof(cap)))
3935                         goto out;
3936                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3937                 break;
3938         }
3939         default:
3940                 r = -EINVAL;
3941         }
3942 out:
3943         kfree(u.buffer);
3944 out_nofree:
3945         vcpu_put(vcpu);
3946         return r;
3947 }
3948
3949 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3950 {
3951         return VM_FAULT_SIGBUS;
3952 }
3953
3954 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3955 {
3956         int ret;
3957
3958         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3959                 return -EINVAL;
3960         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3961         return ret;
3962 }
3963
3964 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3965                                               u64 ident_addr)
3966 {
3967         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
3968 }
3969
3970 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3971                                           u32 kvm_nr_mmu_pages)
3972 {
3973         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3974                 return -EINVAL;
3975
3976         mutex_lock(&kvm->slots_lock);
3977
3978         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3979         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3980
3981         mutex_unlock(&kvm->slots_lock);
3982         return 0;
3983 }
3984
3985 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3986 {
3987         return kvm->arch.n_max_mmu_pages;
3988 }
3989
3990 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3991 {
3992         struct kvm_pic *pic = kvm->arch.vpic;
3993         int r;
3994
3995         r = 0;
3996         switch (chip->chip_id) {
3997         case KVM_IRQCHIP_PIC_MASTER:
3998                 memcpy(&chip->chip.pic, &pic->pics[0],
3999                         sizeof(struct kvm_pic_state));
4000                 break;
4001         case KVM_IRQCHIP_PIC_SLAVE:
4002                 memcpy(&chip->chip.pic, &pic->pics[1],
4003                         sizeof(struct kvm_pic_state));
4004                 break;
4005         case KVM_IRQCHIP_IOAPIC:
4006                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4007                 break;
4008         default:
4009                 r = -EINVAL;
4010                 break;
4011         }
4012         return r;
4013 }
4014
4015 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4016 {
4017         struct kvm_pic *pic = kvm->arch.vpic;
4018         int r;
4019
4020         r = 0;
4021         switch (chip->chip_id) {
4022         case KVM_IRQCHIP_PIC_MASTER:
4023                 spin_lock(&pic->lock);
4024                 memcpy(&pic->pics[0], &chip->chip.pic,
4025                         sizeof(struct kvm_pic_state));
4026                 spin_unlock(&pic->lock);
4027                 break;
4028         case KVM_IRQCHIP_PIC_SLAVE:
4029                 spin_lock(&pic->lock);
4030                 memcpy(&pic->pics[1], &chip->chip.pic,
4031                         sizeof(struct kvm_pic_state));
4032                 spin_unlock(&pic->lock);
4033                 break;
4034         case KVM_IRQCHIP_IOAPIC:
4035                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4036                 break;
4037         default:
4038                 r = -EINVAL;
4039                 break;
4040         }
4041         kvm_pic_update_irq(pic);
4042         return r;
4043 }
4044
4045 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4046 {
4047         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4048
4049         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4050
4051         mutex_lock(&kps->lock);
4052         memcpy(ps, &kps->channels, sizeof(*ps));
4053         mutex_unlock(&kps->lock);
4054         return 0;
4055 }
4056
4057 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4058 {
4059         int i;
4060         struct kvm_pit *pit = kvm->arch.vpit;
4061
4062         mutex_lock(&pit->pit_state.lock);
4063         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4064         for (i = 0; i < 3; i++)
4065                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4066         mutex_unlock(&pit->pit_state.lock);
4067         return 0;
4068 }
4069
4070 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4071 {
4072         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4073         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4074                 sizeof(ps->channels));
4075         ps->flags = kvm->arch.vpit->pit_state.flags;
4076         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4077         memset(&ps->reserved, 0, sizeof(ps->reserved));
4078         return 0;
4079 }
4080
4081 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4082 {
4083         int start = 0;
4084         int i;
4085         u32 prev_legacy, cur_legacy;
4086         struct kvm_pit *pit = kvm->arch.vpit;
4087
4088         mutex_lock(&pit->pit_state.lock);
4089         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4090         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4091         if (!prev_legacy && cur_legacy)
4092                 start = 1;
4093         memcpy(&pit->pit_state.channels, &ps->channels,
4094                sizeof(pit->pit_state.channels));
4095         pit->pit_state.flags = ps->flags;
4096         for (i = 0; i < 3; i++)
4097                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4098                                    start && i == 0);
4099         mutex_unlock(&pit->pit_state.lock);
4100         return 0;
4101 }
4102
4103 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4104                                  struct kvm_reinject_control *control)
4105 {
4106         struct kvm_pit *pit = kvm->arch.vpit;
4107
4108         if (!pit)
4109                 return -ENXIO;
4110
4111         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4112          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4113          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4114          */
4115         mutex_lock(&pit->pit_state.lock);
4116         kvm_pit_set_reinject(pit, control->pit_reinject);
4117         mutex_unlock(&pit->pit_state.lock);
4118
4119         return 0;
4120 }
4121
4122 /**
4123  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4124  * @kvm: kvm instance
4125  * @log: slot id and address to which we copy the log
4126  *
4127  * Steps 1-4 below provide general overview of dirty page logging. See
4128  * kvm_get_dirty_log_protect() function description for additional details.
4129  *
4130  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4131  * always flush the TLB (step 4) even if previous step failed  and the dirty
4132  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4133  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4134  * writes will be marked dirty for next log read.
4135  *
4136  *   1. Take a snapshot of the bit and clear it if needed.
4137  *   2. Write protect the corresponding page.
4138  *   3. Copy the snapshot to the userspace.
4139  *   4. Flush TLB's if needed.
4140  */
4141 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4142 {
4143         bool is_dirty = false;
4144         int r;
4145
4146         mutex_lock(&kvm->slots_lock);
4147
4148         /*
4149          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4150          */
4151         if (kvm_x86_ops->flush_log_dirty)
4152                 kvm_x86_ops->flush_log_dirty(kvm);
4153
4154         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4155
4156         /*
4157          * All the TLBs can be flushed out of mmu lock, see the comments in
4158          * kvm_mmu_slot_remove_write_access().
4159          */
4160         lockdep_assert_held(&kvm->slots_lock);
4161         if (is_dirty)
4162                 kvm_flush_remote_tlbs(kvm);
4163
4164         mutex_unlock(&kvm->slots_lock);
4165         return r;
4166 }
4167
4168 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4169                         bool line_status)
4170 {
4171         if (!irqchip_in_kernel(kvm))
4172                 return -ENXIO;
4173
4174         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4175                                         irq_event->irq, irq_event->level,
4176                                         line_status);
4177         return 0;
4178 }
4179
4180 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4181                                    struct kvm_enable_cap *cap)
4182 {
4183         int r;
4184
4185         if (cap->flags)
4186                 return -EINVAL;
4187
4188         switch (cap->cap) {
4189         case KVM_CAP_DISABLE_QUIRKS:
4190                 kvm->arch.disabled_quirks = cap->args[0];
4191                 r = 0;
4192                 break;
4193         case KVM_CAP_SPLIT_IRQCHIP: {
4194                 mutex_lock(&kvm->lock);
4195                 r = -EINVAL;
4196                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4197                         goto split_irqchip_unlock;
4198                 r = -EEXIST;
4199                 if (irqchip_in_kernel(kvm))
4200                         goto split_irqchip_unlock;
4201                 if (kvm->created_vcpus)
4202                         goto split_irqchip_unlock;
4203                 r = kvm_setup_empty_irq_routing(kvm);
4204                 if (r)
4205                         goto split_irqchip_unlock;
4206                 /* Pairs with irqchip_in_kernel. */
4207                 smp_wmb();
4208                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4209                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4210                 r = 0;
4211 split_irqchip_unlock:
4212                 mutex_unlock(&kvm->lock);
4213                 break;
4214         }
4215         case KVM_CAP_X2APIC_API:
4216                 r = -EINVAL;
4217                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4218                         break;
4219
4220                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4221                         kvm->arch.x2apic_format = true;
4222                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4223                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4224
4225                 r = 0;
4226                 break;
4227         case KVM_CAP_X86_DISABLE_EXITS:
4228                 r = -EINVAL;
4229                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4230                         break;
4231
4232                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4233                         kvm_can_mwait_in_guest())
4234                         kvm->arch.mwait_in_guest = true;
4235                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HTL)
4236                         kvm->arch.hlt_in_guest = true;
4237                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4238                         kvm->arch.pause_in_guest = true;
4239                 r = 0;
4240                 break;
4241         default:
4242                 r = -EINVAL;
4243                 break;
4244         }
4245         return r;
4246 }
4247
4248 long kvm_arch_vm_ioctl(struct file *filp,
4249                        unsigned int ioctl, unsigned long arg)
4250 {
4251         struct kvm *kvm = filp->private_data;
4252         void __user *argp = (void __user *)arg;
4253         int r = -ENOTTY;
4254         /*
4255          * This union makes it completely explicit to gcc-3.x
4256          * that these two variables' stack usage should be
4257          * combined, not added together.
4258          */
4259         union {
4260                 struct kvm_pit_state ps;
4261                 struct kvm_pit_state2 ps2;
4262                 struct kvm_pit_config pit_config;
4263         } u;
4264
4265         switch (ioctl) {
4266         case KVM_SET_TSS_ADDR:
4267                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4268                 break;
4269         case KVM_SET_IDENTITY_MAP_ADDR: {
4270                 u64 ident_addr;
4271
4272                 mutex_lock(&kvm->lock);
4273                 r = -EINVAL;
4274                 if (kvm->created_vcpus)
4275                         goto set_identity_unlock;
4276                 r = -EFAULT;
4277                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4278                         goto set_identity_unlock;
4279                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4280 set_identity_unlock:
4281                 mutex_unlock(&kvm->lock);
4282                 break;
4283         }
4284         case KVM_SET_NR_MMU_PAGES:
4285                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4286                 break;
4287         case KVM_GET_NR_MMU_PAGES:
4288                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4289                 break;
4290         case KVM_CREATE_IRQCHIP: {
4291                 mutex_lock(&kvm->lock);
4292
4293                 r = -EEXIST;
4294                 if (irqchip_in_kernel(kvm))
4295                         goto create_irqchip_unlock;
4296
4297                 r = -EINVAL;
4298                 if (kvm->created_vcpus)
4299                         goto create_irqchip_unlock;
4300
4301                 r = kvm_pic_init(kvm);
4302                 if (r)
4303                         goto create_irqchip_unlock;
4304
4305                 r = kvm_ioapic_init(kvm);
4306                 if (r) {
4307                         kvm_pic_destroy(kvm);
4308                         goto create_irqchip_unlock;
4309                 }
4310
4311                 r = kvm_setup_default_irq_routing(kvm);
4312                 if (r) {
4313                         kvm_ioapic_destroy(kvm);
4314                         kvm_pic_destroy(kvm);
4315                         goto create_irqchip_unlock;
4316                 }
4317                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4318                 smp_wmb();
4319                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4320         create_irqchip_unlock:
4321                 mutex_unlock(&kvm->lock);
4322                 break;
4323         }
4324         case KVM_CREATE_PIT:
4325                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4326                 goto create_pit;
4327         case KVM_CREATE_PIT2:
4328                 r = -EFAULT;
4329                 if (copy_from_user(&u.pit_config, argp,
4330                                    sizeof(struct kvm_pit_config)))
4331                         goto out;
4332         create_pit:
4333                 mutex_lock(&kvm->lock);
4334                 r = -EEXIST;
4335                 if (kvm->arch.vpit)
4336                         goto create_pit_unlock;
4337                 r = -ENOMEM;
4338                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4339                 if (kvm->arch.vpit)
4340                         r = 0;
4341         create_pit_unlock:
4342                 mutex_unlock(&kvm->lock);
4343                 break;
4344         case KVM_GET_IRQCHIP: {
4345                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4346                 struct kvm_irqchip *chip;
4347
4348                 chip = memdup_user(argp, sizeof(*chip));
4349                 if (IS_ERR(chip)) {
4350                         r = PTR_ERR(chip);
4351                         goto out;
4352                 }
4353
4354                 r = -ENXIO;
4355                 if (!irqchip_kernel(kvm))
4356                         goto get_irqchip_out;
4357                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4358                 if (r)
4359                         goto get_irqchip_out;
4360                 r = -EFAULT;
4361                 if (copy_to_user(argp, chip, sizeof *chip))
4362                         goto get_irqchip_out;
4363                 r = 0;
4364         get_irqchip_out:
4365                 kfree(chip);
4366                 break;
4367         }
4368         case KVM_SET_IRQCHIP: {
4369                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4370                 struct kvm_irqchip *chip;
4371
4372                 chip = memdup_user(argp, sizeof(*chip));
4373                 if (IS_ERR(chip)) {
4374                         r = PTR_ERR(chip);
4375                         goto out;
4376                 }
4377
4378                 r = -ENXIO;
4379                 if (!irqchip_kernel(kvm))
4380                         goto set_irqchip_out;
4381                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4382                 if (r)
4383                         goto set_irqchip_out;
4384                 r = 0;
4385         set_irqchip_out:
4386                 kfree(chip);
4387                 break;
4388         }
4389         case KVM_GET_PIT: {
4390                 r = -EFAULT;
4391                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4392                         goto out;
4393                 r = -ENXIO;
4394                 if (!kvm->arch.vpit)
4395                         goto out;
4396                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4397                 if (r)
4398                         goto out;
4399                 r = -EFAULT;
4400                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4401                         goto out;
4402                 r = 0;
4403                 break;
4404         }
4405         case KVM_SET_PIT: {
4406                 r = -EFAULT;
4407                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4408                         goto out;
4409                 r = -ENXIO;
4410                 if (!kvm->arch.vpit)
4411                         goto out;
4412                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4413                 break;
4414         }
4415         case KVM_GET_PIT2: {
4416                 r = -ENXIO;
4417                 if (!kvm->arch.vpit)
4418                         goto out;
4419                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4420                 if (r)
4421                         goto out;
4422                 r = -EFAULT;
4423                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4424                         goto out;
4425                 r = 0;
4426                 break;
4427         }
4428         case KVM_SET_PIT2: {
4429                 r = -EFAULT;
4430                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4431                         goto out;
4432                 r = -ENXIO;
4433                 if (!kvm->arch.vpit)
4434                         goto out;
4435                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4436                 break;
4437         }
4438         case KVM_REINJECT_CONTROL: {
4439                 struct kvm_reinject_control control;
4440                 r =  -EFAULT;
4441                 if (copy_from_user(&control, argp, sizeof(control)))
4442                         goto out;
4443                 r = kvm_vm_ioctl_reinject(kvm, &control);
4444                 break;
4445         }
4446         case KVM_SET_BOOT_CPU_ID:
4447                 r = 0;
4448                 mutex_lock(&kvm->lock);
4449                 if (kvm->created_vcpus)
4450                         r = -EBUSY;
4451                 else
4452                         kvm->arch.bsp_vcpu_id = arg;
4453                 mutex_unlock(&kvm->lock);
4454                 break;
4455         case KVM_XEN_HVM_CONFIG: {
4456                 struct kvm_xen_hvm_config xhc;
4457                 r = -EFAULT;
4458                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4459                         goto out;
4460                 r = -EINVAL;
4461                 if (xhc.flags)
4462                         goto out;
4463                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4464                 r = 0;
4465                 break;
4466         }
4467         case KVM_SET_CLOCK: {
4468                 struct kvm_clock_data user_ns;
4469                 u64 now_ns;
4470
4471                 r = -EFAULT;
4472                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4473                         goto out;
4474
4475                 r = -EINVAL;
4476                 if (user_ns.flags)
4477                         goto out;
4478
4479                 r = 0;
4480                 /*
4481                  * TODO: userspace has to take care of races with VCPU_RUN, so
4482                  * kvm_gen_update_masterclock() can be cut down to locked
4483                  * pvclock_update_vm_gtod_copy().
4484                  */
4485                 kvm_gen_update_masterclock(kvm);
4486                 now_ns = get_kvmclock_ns(kvm);
4487                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4488                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4489                 break;
4490         }
4491         case KVM_GET_CLOCK: {
4492                 struct kvm_clock_data user_ns;
4493                 u64 now_ns;
4494
4495                 now_ns = get_kvmclock_ns(kvm);
4496                 user_ns.clock = now_ns;
4497                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4498                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4499
4500                 r = -EFAULT;
4501                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4502                         goto out;
4503                 r = 0;
4504                 break;
4505         }
4506         case KVM_ENABLE_CAP: {
4507                 struct kvm_enable_cap cap;
4508
4509                 r = -EFAULT;
4510                 if (copy_from_user(&cap, argp, sizeof(cap)))
4511                         goto out;
4512                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4513                 break;
4514         }
4515         case KVM_MEMORY_ENCRYPT_OP: {
4516                 r = -ENOTTY;
4517                 if (kvm_x86_ops->mem_enc_op)
4518                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4519                 break;
4520         }
4521         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4522                 struct kvm_enc_region region;
4523
4524                 r = -EFAULT;
4525                 if (copy_from_user(&region, argp, sizeof(region)))
4526                         goto out;
4527
4528                 r = -ENOTTY;
4529                 if (kvm_x86_ops->mem_enc_reg_region)
4530                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4531                 break;
4532         }
4533         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4534                 struct kvm_enc_region region;
4535
4536                 r = -EFAULT;
4537                 if (copy_from_user(&region, argp, sizeof(region)))
4538                         goto out;
4539
4540                 r = -ENOTTY;
4541                 if (kvm_x86_ops->mem_enc_unreg_region)
4542                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4543                 break;
4544         }
4545         case KVM_HYPERV_EVENTFD: {
4546                 struct kvm_hyperv_eventfd hvevfd;
4547
4548                 r = -EFAULT;
4549                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4550                         goto out;
4551                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4552                 break;
4553         }
4554         default:
4555                 r = -ENOTTY;
4556         }
4557 out:
4558         return r;
4559 }
4560
4561 static void kvm_init_msr_list(void)
4562 {
4563         u32 dummy[2];
4564         unsigned i, j;
4565
4566         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4567                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4568                         continue;
4569
4570                 /*
4571                  * Even MSRs that are valid in the host may not be exposed
4572                  * to the guests in some cases.
4573                  */
4574                 switch (msrs_to_save[i]) {
4575                 case MSR_IA32_BNDCFGS:
4576                         if (!kvm_x86_ops->mpx_supported())
4577                                 continue;
4578                         break;
4579                 case MSR_TSC_AUX:
4580                         if (!kvm_x86_ops->rdtscp_supported())
4581                                 continue;
4582                         break;
4583                 default:
4584                         break;
4585                 }
4586
4587                 if (j < i)
4588                         msrs_to_save[j] = msrs_to_save[i];
4589                 j++;
4590         }
4591         num_msrs_to_save = j;
4592
4593         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4594                 switch (emulated_msrs[i]) {
4595                 case MSR_IA32_SMBASE:
4596                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
4597                                 continue;
4598                         break;
4599                 default:
4600                         break;
4601                 }
4602
4603                 if (j < i)
4604                         emulated_msrs[j] = emulated_msrs[i];
4605                 j++;
4606         }
4607         num_emulated_msrs = j;
4608
4609         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4610                 struct kvm_msr_entry msr;
4611
4612                 msr.index = msr_based_features[i];
4613                 if (kvm_get_msr_feature(&msr))
4614                         continue;
4615
4616                 if (j < i)
4617                         msr_based_features[j] = msr_based_features[i];
4618                 j++;
4619         }
4620         num_msr_based_features = j;
4621 }
4622
4623 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4624                            const void *v)
4625 {
4626         int handled = 0;
4627         int n;
4628
4629         do {
4630                 n = min(len, 8);
4631                 if (!(lapic_in_kernel(vcpu) &&
4632                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4633                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4634                         break;
4635                 handled += n;
4636                 addr += n;
4637                 len -= n;
4638                 v += n;
4639         } while (len);
4640
4641         return handled;
4642 }
4643
4644 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4645 {
4646         int handled = 0;
4647         int n;
4648
4649         do {
4650                 n = min(len, 8);
4651                 if (!(lapic_in_kernel(vcpu) &&
4652                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4653                                          addr, n, v))
4654                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4655                         break;
4656                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4657                 handled += n;
4658                 addr += n;
4659                 len -= n;
4660                 v += n;
4661         } while (len);
4662
4663         return handled;
4664 }
4665
4666 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4667                         struct kvm_segment *var, int seg)
4668 {
4669         kvm_x86_ops->set_segment(vcpu, var, seg);
4670 }
4671
4672 void kvm_get_segment(struct kvm_vcpu *vcpu,
4673                      struct kvm_segment *var, int seg)
4674 {
4675         kvm_x86_ops->get_segment(vcpu, var, seg);
4676 }
4677
4678 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4679                            struct x86_exception *exception)
4680 {
4681         gpa_t t_gpa;
4682
4683         BUG_ON(!mmu_is_nested(vcpu));
4684
4685         /* NPT walks are always user-walks */
4686         access |= PFERR_USER_MASK;
4687         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4688
4689         return t_gpa;
4690 }
4691
4692 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4693                               struct x86_exception *exception)
4694 {
4695         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4696         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4697 }
4698
4699  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4700                                 struct x86_exception *exception)
4701 {
4702         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4703         access |= PFERR_FETCH_MASK;
4704         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4705 }
4706
4707 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4708                                struct x86_exception *exception)
4709 {
4710         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4711         access |= PFERR_WRITE_MASK;
4712         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4713 }
4714
4715 /* uses this to access any guest's mapped memory without checking CPL */
4716 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4717                                 struct x86_exception *exception)
4718 {
4719         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4720 }
4721
4722 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4723                                       struct kvm_vcpu *vcpu, u32 access,
4724                                       struct x86_exception *exception)
4725 {
4726         void *data = val;
4727         int r = X86EMUL_CONTINUE;
4728
4729         while (bytes) {
4730                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4731                                                             exception);
4732                 unsigned offset = addr & (PAGE_SIZE-1);
4733                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4734                 int ret;
4735
4736                 if (gpa == UNMAPPED_GVA)
4737                         return X86EMUL_PROPAGATE_FAULT;
4738                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4739                                                offset, toread);
4740                 if (ret < 0) {
4741                         r = X86EMUL_IO_NEEDED;
4742                         goto out;
4743                 }
4744
4745                 bytes -= toread;
4746                 data += toread;
4747                 addr += toread;
4748         }
4749 out:
4750         return r;
4751 }
4752
4753 /* used for instruction fetching */
4754 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4755                                 gva_t addr, void *val, unsigned int bytes,
4756                                 struct x86_exception *exception)
4757 {
4758         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4759         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4760         unsigned offset;
4761         int ret;
4762
4763         /* Inline kvm_read_guest_virt_helper for speed.  */
4764         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4765                                                     exception);
4766         if (unlikely(gpa == UNMAPPED_GVA))
4767                 return X86EMUL_PROPAGATE_FAULT;
4768
4769         offset = addr & (PAGE_SIZE-1);
4770         if (WARN_ON(offset + bytes > PAGE_SIZE))
4771                 bytes = (unsigned)PAGE_SIZE - offset;
4772         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4773                                        offset, bytes);
4774         if (unlikely(ret < 0))
4775                 return X86EMUL_IO_NEEDED;
4776
4777         return X86EMUL_CONTINUE;
4778 }
4779
4780 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4781                                gva_t addr, void *val, unsigned int bytes,
4782                                struct x86_exception *exception)
4783 {
4784         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4785         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4786
4787         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4788                                           exception);
4789 }
4790 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4791
4792 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4793                                       gva_t addr, void *val, unsigned int bytes,
4794                                       struct x86_exception *exception)
4795 {
4796         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4797         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4798 }
4799
4800 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4801                 unsigned long addr, void *val, unsigned int bytes)
4802 {
4803         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4804         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4805
4806         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4807 }
4808
4809 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4810                                        gva_t addr, void *val,
4811                                        unsigned int bytes,
4812                                        struct x86_exception *exception)
4813 {
4814         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4815         void *data = val;
4816         int r = X86EMUL_CONTINUE;
4817
4818         while (bytes) {
4819                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4820                                                              PFERR_WRITE_MASK,
4821                                                              exception);
4822                 unsigned offset = addr & (PAGE_SIZE-1);
4823                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4824                 int ret;
4825
4826                 if (gpa == UNMAPPED_GVA)
4827                         return X86EMUL_PROPAGATE_FAULT;
4828                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4829                 if (ret < 0) {
4830                         r = X86EMUL_IO_NEEDED;
4831                         goto out;
4832                 }
4833
4834                 bytes -= towrite;
4835                 data += towrite;
4836                 addr += towrite;
4837         }
4838 out:
4839         return r;
4840 }
4841 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4842
4843 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4844                             gpa_t gpa, bool write)
4845 {
4846         /* For APIC access vmexit */
4847         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4848                 return 1;
4849
4850         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
4851                 trace_vcpu_match_mmio(gva, gpa, write, true);
4852                 return 1;
4853         }
4854
4855         return 0;
4856 }
4857
4858 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4859                                 gpa_t *gpa, struct x86_exception *exception,
4860                                 bool write)
4861 {
4862         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4863                 | (write ? PFERR_WRITE_MASK : 0);
4864
4865         /*
4866          * currently PKRU is only applied to ept enabled guest so
4867          * there is no pkey in EPT page table for L1 guest or EPT
4868          * shadow page table for L2 guest.
4869          */
4870         if (vcpu_match_mmio_gva(vcpu, gva)
4871             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4872                                  vcpu->arch.access, 0, access)) {
4873                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4874                                         (gva & (PAGE_SIZE - 1));
4875                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4876                 return 1;
4877         }
4878
4879         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4880
4881         if (*gpa == UNMAPPED_GVA)
4882                 return -1;
4883
4884         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4885 }
4886
4887 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4888                         const void *val, int bytes)
4889 {
4890         int ret;
4891
4892         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4893         if (ret < 0)
4894                 return 0;
4895         kvm_page_track_write(vcpu, gpa, val, bytes);
4896         return 1;
4897 }
4898
4899 struct read_write_emulator_ops {
4900         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4901                                   int bytes);
4902         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4903                                   void *val, int bytes);
4904         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4905                                int bytes, void *val);
4906         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4907                                     void *val, int bytes);
4908         bool write;
4909 };
4910
4911 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4912 {
4913         if (vcpu->mmio_read_completed) {
4914                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4915                                vcpu->mmio_fragments[0].gpa, val);
4916                 vcpu->mmio_read_completed = 0;
4917                 return 1;
4918         }
4919
4920         return 0;
4921 }
4922
4923 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4924                         void *val, int bytes)
4925 {
4926         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4927 }
4928
4929 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4930                          void *val, int bytes)
4931 {
4932         return emulator_write_phys(vcpu, gpa, val, bytes);
4933 }
4934
4935 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4936 {
4937         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
4938         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4939 }
4940
4941 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4942                           void *val, int bytes)
4943 {
4944         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
4945         return X86EMUL_IO_NEEDED;
4946 }
4947
4948 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4949                            void *val, int bytes)
4950 {
4951         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4952
4953         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4954         return X86EMUL_CONTINUE;
4955 }
4956
4957 static const struct read_write_emulator_ops read_emultor = {
4958         .read_write_prepare = read_prepare,
4959         .read_write_emulate = read_emulate,
4960         .read_write_mmio = vcpu_mmio_read,
4961         .read_write_exit_mmio = read_exit_mmio,
4962 };
4963
4964 static const struct read_write_emulator_ops write_emultor = {
4965         .read_write_emulate = write_emulate,
4966         .read_write_mmio = write_mmio,
4967         .read_write_exit_mmio = write_exit_mmio,
4968         .write = true,
4969 };
4970
4971 static int emulator_read_write_onepage(unsigned long addr, void *val,
4972                                        unsigned int bytes,
4973                                        struct x86_exception *exception,
4974                                        struct kvm_vcpu *vcpu,
4975                                        const struct read_write_emulator_ops *ops)
4976 {
4977         gpa_t gpa;
4978         int handled, ret;
4979         bool write = ops->write;
4980         struct kvm_mmio_fragment *frag;
4981         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4982
4983         /*
4984          * If the exit was due to a NPF we may already have a GPA.
4985          * If the GPA is present, use it to avoid the GVA to GPA table walk.
4986          * Note, this cannot be used on string operations since string
4987          * operation using rep will only have the initial GPA from the NPF
4988          * occurred.
4989          */
4990         if (vcpu->arch.gpa_available &&
4991             emulator_can_use_gpa(ctxt) &&
4992             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
4993                 gpa = vcpu->arch.gpa_val;
4994                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
4995         } else {
4996                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4997                 if (ret < 0)
4998                         return X86EMUL_PROPAGATE_FAULT;
4999         }
5000
5001         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5002                 return X86EMUL_CONTINUE;
5003
5004         /*
5005          * Is this MMIO handled locally?
5006          */
5007         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5008         if (handled == bytes)
5009                 return X86EMUL_CONTINUE;
5010
5011         gpa += handled;
5012         bytes -= handled;
5013         val += handled;
5014
5015         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5016         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5017         frag->gpa = gpa;
5018         frag->data = val;
5019         frag->len = bytes;
5020         return X86EMUL_CONTINUE;
5021 }
5022
5023 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5024                         unsigned long addr,
5025                         void *val, unsigned int bytes,
5026                         struct x86_exception *exception,
5027                         const struct read_write_emulator_ops *ops)
5028 {
5029         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5030         gpa_t gpa;
5031         int rc;
5032
5033         if (ops->read_write_prepare &&
5034                   ops->read_write_prepare(vcpu, val, bytes))
5035                 return X86EMUL_CONTINUE;
5036
5037         vcpu->mmio_nr_fragments = 0;
5038
5039         /* Crossing a page boundary? */
5040         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5041                 int now;
5042
5043                 now = -addr & ~PAGE_MASK;
5044                 rc = emulator_read_write_onepage(addr, val, now, exception,
5045                                                  vcpu, ops);
5046
5047                 if (rc != X86EMUL_CONTINUE)
5048                         return rc;
5049                 addr += now;
5050                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5051                         addr = (u32)addr;
5052                 val += now;
5053                 bytes -= now;
5054         }
5055
5056         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5057                                          vcpu, ops);
5058         if (rc != X86EMUL_CONTINUE)
5059                 return rc;
5060
5061         if (!vcpu->mmio_nr_fragments)
5062                 return rc;
5063
5064         gpa = vcpu->mmio_fragments[0].gpa;
5065
5066         vcpu->mmio_needed = 1;
5067         vcpu->mmio_cur_fragment = 0;
5068
5069         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5070         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5071         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5072         vcpu->run->mmio.phys_addr = gpa;
5073
5074         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5075 }
5076
5077 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5078                                   unsigned long addr,
5079                                   void *val,
5080                                   unsigned int bytes,
5081                                   struct x86_exception *exception)
5082 {
5083         return emulator_read_write(ctxt, addr, val, bytes,
5084                                    exception, &read_emultor);
5085 }
5086
5087 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5088                             unsigned long addr,
5089                             const void *val,
5090                             unsigned int bytes,
5091                             struct x86_exception *exception)
5092 {
5093         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5094                                    exception, &write_emultor);
5095 }
5096
5097 #define CMPXCHG_TYPE(t, ptr, old, new) \
5098         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5099
5100 #ifdef CONFIG_X86_64
5101 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5102 #else
5103 #  define CMPXCHG64(ptr, old, new) \
5104         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5105 #endif
5106
5107 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5108                                      unsigned long addr,
5109                                      const void *old,
5110                                      const void *new,
5111                                      unsigned int bytes,
5112                                      struct x86_exception *exception)
5113 {
5114         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5115         gpa_t gpa;
5116         struct page *page;
5117         char *kaddr;
5118         bool exchanged;
5119
5120         /* guests cmpxchg8b have to be emulated atomically */
5121         if (bytes > 8 || (bytes & (bytes - 1)))
5122                 goto emul_write;
5123
5124         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5125
5126         if (gpa == UNMAPPED_GVA ||
5127             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5128                 goto emul_write;
5129
5130         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5131                 goto emul_write;
5132
5133         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5134         if (is_error_page(page))
5135                 goto emul_write;
5136
5137         kaddr = kmap_atomic(page);
5138         kaddr += offset_in_page(gpa);
5139         switch (bytes) {
5140         case 1:
5141                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5142                 break;
5143         case 2:
5144                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5145                 break;
5146         case 4:
5147                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5148                 break;
5149         case 8:
5150                 exchanged = CMPXCHG64(kaddr, old, new);
5151                 break;
5152         default:
5153                 BUG();
5154         }
5155         kunmap_atomic(kaddr);
5156         kvm_release_page_dirty(page);
5157
5158         if (!exchanged)
5159                 return X86EMUL_CMPXCHG_FAILED;
5160
5161         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5162         kvm_page_track_write(vcpu, gpa, new, bytes);
5163
5164         return X86EMUL_CONTINUE;
5165
5166 emul_write:
5167         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5168
5169         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5170 }
5171
5172 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5173 {
5174         int r = 0, i;
5175
5176         for (i = 0; i < vcpu->arch.pio.count; i++) {
5177                 if (vcpu->arch.pio.in)
5178                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5179                                             vcpu->arch.pio.size, pd);
5180                 else
5181                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5182                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5183                                              pd);
5184                 if (r)
5185                         break;
5186                 pd += vcpu->arch.pio.size;
5187         }
5188         return r;
5189 }
5190
5191 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5192                                unsigned short port, void *val,
5193                                unsigned int count, bool in)
5194 {
5195         vcpu->arch.pio.port = port;
5196         vcpu->arch.pio.in = in;
5197         vcpu->arch.pio.count  = count;
5198         vcpu->arch.pio.size = size;
5199
5200         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5201                 vcpu->arch.pio.count = 0;
5202                 return 1;
5203         }
5204
5205         vcpu->run->exit_reason = KVM_EXIT_IO;
5206         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5207         vcpu->run->io.size = size;
5208         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5209         vcpu->run->io.count = count;
5210         vcpu->run->io.port = port;
5211
5212         return 0;
5213 }
5214
5215 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5216                                     int size, unsigned short port, void *val,
5217                                     unsigned int count)
5218 {
5219         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5220         int ret;
5221
5222         if (vcpu->arch.pio.count)
5223                 goto data_avail;
5224
5225         memset(vcpu->arch.pio_data, 0, size * count);
5226
5227         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5228         if (ret) {
5229 data_avail:
5230                 memcpy(val, vcpu->arch.pio_data, size * count);
5231                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5232                 vcpu->arch.pio.count = 0;
5233                 return 1;
5234         }
5235
5236         return 0;
5237 }
5238
5239 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5240                                      int size, unsigned short port,
5241                                      const void *val, unsigned int count)
5242 {
5243         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5244
5245         memcpy(vcpu->arch.pio_data, val, size * count);
5246         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5247         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5248 }
5249
5250 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5251 {
5252         return kvm_x86_ops->get_segment_base(vcpu, seg);
5253 }
5254
5255 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5256 {
5257         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5258 }
5259
5260 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5261 {
5262         if (!need_emulate_wbinvd(vcpu))
5263                 return X86EMUL_CONTINUE;
5264
5265         if (kvm_x86_ops->has_wbinvd_exit()) {
5266                 int cpu = get_cpu();
5267
5268                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5269                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5270                                 wbinvd_ipi, NULL, 1);
5271                 put_cpu();
5272                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5273         } else
5274                 wbinvd();
5275         return X86EMUL_CONTINUE;
5276 }
5277
5278 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5279 {
5280         kvm_emulate_wbinvd_noskip(vcpu);
5281         return kvm_skip_emulated_instruction(vcpu);
5282 }
5283 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5284
5285
5286
5287 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5288 {
5289         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5290 }
5291
5292 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5293                            unsigned long *dest)
5294 {
5295         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5296 }
5297
5298 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5299                            unsigned long value)
5300 {
5301
5302         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5303 }
5304
5305 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5306 {
5307         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5308 }
5309
5310 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5311 {
5312         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5313         unsigned long value;
5314
5315         switch (cr) {
5316         case 0:
5317                 value = kvm_read_cr0(vcpu);
5318                 break;
5319         case 2:
5320                 value = vcpu->arch.cr2;
5321                 break;
5322         case 3:
5323                 value = kvm_read_cr3(vcpu);
5324                 break;
5325         case 4:
5326                 value = kvm_read_cr4(vcpu);
5327                 break;
5328         case 8:
5329                 value = kvm_get_cr8(vcpu);
5330                 break;
5331         default:
5332                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5333                 return 0;
5334         }
5335
5336         return value;
5337 }
5338
5339 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5340 {
5341         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5342         int res = 0;
5343
5344         switch (cr) {
5345         case 0:
5346                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5347                 break;
5348         case 2:
5349                 vcpu->arch.cr2 = val;
5350                 break;
5351         case 3:
5352                 res = kvm_set_cr3(vcpu, val);
5353                 break;
5354         case 4:
5355                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5356                 break;
5357         case 8:
5358                 res = kvm_set_cr8(vcpu, val);
5359                 break;
5360         default:
5361                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5362                 res = -1;
5363         }
5364
5365         return res;
5366 }
5367
5368 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5369 {
5370         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5371 }
5372
5373 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5374 {
5375         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5376 }
5377
5378 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5379 {
5380         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5381 }
5382
5383 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5384 {
5385         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5386 }
5387
5388 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5389 {
5390         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5391 }
5392
5393 static unsigned long emulator_get_cached_segment_base(
5394         struct x86_emulate_ctxt *ctxt, int seg)
5395 {
5396         return get_segment_base(emul_to_vcpu(ctxt), seg);
5397 }
5398
5399 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5400                                  struct desc_struct *desc, u32 *base3,
5401                                  int seg)
5402 {
5403         struct kvm_segment var;
5404
5405         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5406         *selector = var.selector;
5407
5408         if (var.unusable) {
5409                 memset(desc, 0, sizeof(*desc));
5410                 if (base3)
5411                         *base3 = 0;
5412                 return false;
5413         }
5414
5415         if (var.g)
5416                 var.limit >>= 12;
5417         set_desc_limit(desc, var.limit);
5418         set_desc_base(desc, (unsigned long)var.base);
5419 #ifdef CONFIG_X86_64
5420         if (base3)
5421                 *base3 = var.base >> 32;
5422 #endif
5423         desc->type = var.type;
5424         desc->s = var.s;
5425         desc->dpl = var.dpl;
5426         desc->p = var.present;
5427         desc->avl = var.avl;
5428         desc->l = var.l;
5429         desc->d = var.db;
5430         desc->g = var.g;
5431
5432         return true;
5433 }
5434
5435 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5436                                  struct desc_struct *desc, u32 base3,
5437                                  int seg)
5438 {
5439         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5440         struct kvm_segment var;
5441
5442         var.selector = selector;
5443         var.base = get_desc_base(desc);
5444 #ifdef CONFIG_X86_64
5445         var.base |= ((u64)base3) << 32;
5446 #endif
5447         var.limit = get_desc_limit(desc);
5448         if (desc->g)
5449                 var.limit = (var.limit << 12) | 0xfff;
5450         var.type = desc->type;
5451         var.dpl = desc->dpl;
5452         var.db = desc->d;
5453         var.s = desc->s;
5454         var.l = desc->l;
5455         var.g = desc->g;
5456         var.avl = desc->avl;
5457         var.present = desc->p;
5458         var.unusable = !var.present;
5459         var.padding = 0;
5460
5461         kvm_set_segment(vcpu, &var, seg);
5462         return;
5463 }
5464
5465 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5466                             u32 msr_index, u64 *pdata)
5467 {
5468         struct msr_data msr;
5469         int r;
5470
5471         msr.index = msr_index;
5472         msr.host_initiated = false;
5473         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5474         if (r)
5475                 return r;
5476
5477         *pdata = msr.data;
5478         return 0;
5479 }
5480
5481 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5482                             u32 msr_index, u64 data)
5483 {
5484         struct msr_data msr;
5485
5486         msr.data = data;
5487         msr.index = msr_index;
5488         msr.host_initiated = false;
5489         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5490 }
5491
5492 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5493 {
5494         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5495
5496         return vcpu->arch.smbase;
5497 }
5498
5499 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5500 {
5501         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5502
5503         vcpu->arch.smbase = smbase;
5504 }
5505
5506 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5507                               u32 pmc)
5508 {
5509         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5510 }
5511
5512 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5513                              u32 pmc, u64 *pdata)
5514 {
5515         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5516 }
5517
5518 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5519 {
5520         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5521 }
5522
5523 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5524                               struct x86_instruction_info *info,
5525                               enum x86_intercept_stage stage)
5526 {
5527         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5528 }
5529
5530 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5531                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5532 {
5533         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5534 }
5535
5536 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5537 {
5538         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5539 }
5540
5541 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5542 {
5543         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5544 }
5545
5546 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5547 {
5548         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5549 }
5550
5551 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5552 {
5553         return emul_to_vcpu(ctxt)->arch.hflags;
5554 }
5555
5556 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5557 {
5558         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5559 }
5560
5561 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5562 {
5563         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5564 }
5565
5566 static const struct x86_emulate_ops emulate_ops = {
5567         .read_gpr            = emulator_read_gpr,
5568         .write_gpr           = emulator_write_gpr,
5569         .read_std            = kvm_read_guest_virt_system,
5570         .write_std           = kvm_write_guest_virt_system,
5571         .read_phys           = kvm_read_guest_phys_system,
5572         .fetch               = kvm_fetch_guest_virt,
5573         .read_emulated       = emulator_read_emulated,
5574         .write_emulated      = emulator_write_emulated,
5575         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5576         .invlpg              = emulator_invlpg,
5577         .pio_in_emulated     = emulator_pio_in_emulated,
5578         .pio_out_emulated    = emulator_pio_out_emulated,
5579         .get_segment         = emulator_get_segment,
5580         .set_segment         = emulator_set_segment,
5581         .get_cached_segment_base = emulator_get_cached_segment_base,
5582         .get_gdt             = emulator_get_gdt,
5583         .get_idt             = emulator_get_idt,
5584         .set_gdt             = emulator_set_gdt,
5585         .set_idt             = emulator_set_idt,
5586         .get_cr              = emulator_get_cr,
5587         .set_cr              = emulator_set_cr,
5588         .cpl                 = emulator_get_cpl,
5589         .get_dr              = emulator_get_dr,
5590         .set_dr              = emulator_set_dr,
5591         .get_smbase          = emulator_get_smbase,
5592         .set_smbase          = emulator_set_smbase,
5593         .set_msr             = emulator_set_msr,
5594         .get_msr             = emulator_get_msr,
5595         .check_pmc           = emulator_check_pmc,
5596         .read_pmc            = emulator_read_pmc,
5597         .halt                = emulator_halt,
5598         .wbinvd              = emulator_wbinvd,
5599         .fix_hypercall       = emulator_fix_hypercall,
5600         .intercept           = emulator_intercept,
5601         .get_cpuid           = emulator_get_cpuid,
5602         .set_nmi_mask        = emulator_set_nmi_mask,
5603         .get_hflags          = emulator_get_hflags,
5604         .set_hflags          = emulator_set_hflags,
5605         .pre_leave_smm       = emulator_pre_leave_smm,
5606 };
5607
5608 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5609 {
5610         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5611         /*
5612          * an sti; sti; sequence only disable interrupts for the first
5613          * instruction. So, if the last instruction, be it emulated or
5614          * not, left the system with the INT_STI flag enabled, it
5615          * means that the last instruction is an sti. We should not
5616          * leave the flag on in this case. The same goes for mov ss
5617          */
5618         if (int_shadow & mask)
5619                 mask = 0;
5620         if (unlikely(int_shadow || mask)) {
5621                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5622                 if (!mask)
5623                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5624         }
5625 }
5626
5627 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5628 {
5629         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5630         if (ctxt->exception.vector == PF_VECTOR)
5631                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5632
5633         if (ctxt->exception.error_code_valid)
5634                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5635                                       ctxt->exception.error_code);
5636         else
5637                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5638         return false;
5639 }
5640
5641 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5642 {
5643         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5644         int cs_db, cs_l;
5645
5646         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5647
5648         ctxt->eflags = kvm_get_rflags(vcpu);
5649         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5650
5651         ctxt->eip = kvm_rip_read(vcpu);
5652         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5653                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5654                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5655                      cs_db                              ? X86EMUL_MODE_PROT32 :
5656                                                           X86EMUL_MODE_PROT16;
5657         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5658         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5659         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5660
5661         init_decode_cache(ctxt);
5662         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5663 }
5664
5665 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5666 {
5667         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5668         int ret;
5669
5670         init_emulate_ctxt(vcpu);
5671
5672         ctxt->op_bytes = 2;
5673         ctxt->ad_bytes = 2;
5674         ctxt->_eip = ctxt->eip + inc_eip;
5675         ret = emulate_int_real(ctxt, irq);
5676
5677         if (ret != X86EMUL_CONTINUE)
5678                 return EMULATE_FAIL;
5679
5680         ctxt->eip = ctxt->_eip;
5681         kvm_rip_write(vcpu, ctxt->eip);
5682         kvm_set_rflags(vcpu, ctxt->eflags);
5683
5684         if (irq == NMI_VECTOR)
5685                 vcpu->arch.nmi_pending = 0;
5686         else
5687                 vcpu->arch.interrupt.pending = false;
5688
5689         return EMULATE_DONE;
5690 }
5691 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5692
5693 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
5694 {
5695         int r = EMULATE_DONE;
5696
5697         ++vcpu->stat.insn_emulation_fail;
5698         trace_kvm_emulate_insn_failed(vcpu);
5699
5700         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
5701                 return EMULATE_FAIL;
5702
5703         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5704                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5705                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5706                 vcpu->run->internal.ndata = 0;
5707                 r = EMULATE_USER_EXIT;
5708         }
5709
5710         kvm_queue_exception(vcpu, UD_VECTOR);
5711
5712         return r;
5713 }
5714
5715 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5716                                   bool write_fault_to_shadow_pgtable,
5717                                   int emulation_type)
5718 {
5719         gpa_t gpa = cr2;
5720         kvm_pfn_t pfn;
5721
5722         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5723                 return false;
5724
5725         if (!vcpu->arch.mmu.direct_map) {
5726                 /*
5727                  * Write permission should be allowed since only
5728                  * write access need to be emulated.
5729                  */
5730                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5731
5732                 /*
5733                  * If the mapping is invalid in guest, let cpu retry
5734                  * it to generate fault.
5735                  */
5736                 if (gpa == UNMAPPED_GVA)
5737                         return true;
5738         }
5739
5740         /*
5741          * Do not retry the unhandleable instruction if it faults on the
5742          * readonly host memory, otherwise it will goto a infinite loop:
5743          * retry instruction -> write #PF -> emulation fail -> retry
5744          * instruction -> ...
5745          */
5746         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5747
5748         /*
5749          * If the instruction failed on the error pfn, it can not be fixed,
5750          * report the error to userspace.
5751          */
5752         if (is_error_noslot_pfn(pfn))
5753                 return false;
5754
5755         kvm_release_pfn_clean(pfn);
5756
5757         /* The instructions are well-emulated on direct mmu. */
5758         if (vcpu->arch.mmu.direct_map) {
5759                 unsigned int indirect_shadow_pages;
5760
5761                 spin_lock(&vcpu->kvm->mmu_lock);
5762                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5763                 spin_unlock(&vcpu->kvm->mmu_lock);
5764
5765                 if (indirect_shadow_pages)
5766                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5767
5768                 return true;
5769         }
5770
5771         /*
5772          * if emulation was due to access to shadowed page table
5773          * and it failed try to unshadow page and re-enter the
5774          * guest to let CPU execute the instruction.
5775          */
5776         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5777
5778         /*
5779          * If the access faults on its page table, it can not
5780          * be fixed by unprotecting shadow page and it should
5781          * be reported to userspace.
5782          */
5783         return !write_fault_to_shadow_pgtable;
5784 }
5785
5786 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5787                               unsigned long cr2,  int emulation_type)
5788 {
5789         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5790         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5791
5792         last_retry_eip = vcpu->arch.last_retry_eip;
5793         last_retry_addr = vcpu->arch.last_retry_addr;
5794
5795         /*
5796          * If the emulation is caused by #PF and it is non-page_table
5797          * writing instruction, it means the VM-EXIT is caused by shadow
5798          * page protected, we can zap the shadow page and retry this
5799          * instruction directly.
5800          *
5801          * Note: if the guest uses a non-page-table modifying instruction
5802          * on the PDE that points to the instruction, then we will unmap
5803          * the instruction and go to an infinite loop. So, we cache the
5804          * last retried eip and the last fault address, if we meet the eip
5805          * and the address again, we can break out of the potential infinite
5806          * loop.
5807          */
5808         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5809
5810         if (!(emulation_type & EMULTYPE_RETRY))
5811                 return false;
5812
5813         if (x86_page_table_writing_insn(ctxt))
5814                 return false;
5815
5816         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5817                 return false;
5818
5819         vcpu->arch.last_retry_eip = ctxt->eip;
5820         vcpu->arch.last_retry_addr = cr2;
5821
5822         if (!vcpu->arch.mmu.direct_map)
5823                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5824
5825         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5826
5827         return true;
5828 }
5829
5830 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5831 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5832
5833 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5834 {
5835         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5836                 /* This is a good place to trace that we are exiting SMM.  */
5837                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5838
5839                 /* Process a latched INIT or SMI, if any.  */
5840                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5841         }
5842
5843         kvm_mmu_reset_context(vcpu);
5844 }
5845
5846 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5847 {
5848         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5849
5850         vcpu->arch.hflags = emul_flags;
5851
5852         if (changed & HF_SMM_MASK)
5853                 kvm_smm_changed(vcpu);
5854 }
5855
5856 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5857                                 unsigned long *db)
5858 {
5859         u32 dr6 = 0;
5860         int i;
5861         u32 enable, rwlen;
5862
5863         enable = dr7;
5864         rwlen = dr7 >> 16;
5865         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5866                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5867                         dr6 |= (1 << i);
5868         return dr6;
5869 }
5870
5871 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
5872 {
5873         struct kvm_run *kvm_run = vcpu->run;
5874
5875         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5876                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
5877                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5878                 kvm_run->debug.arch.exception = DB_VECTOR;
5879                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
5880                 *r = EMULATE_USER_EXIT;
5881         } else {
5882                 /*
5883                  * "Certain debug exceptions may clear bit 0-3.  The
5884                  * remaining contents of the DR6 register are never
5885                  * cleared by the processor".
5886                  */
5887                 vcpu->arch.dr6 &= ~15;
5888                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5889                 kvm_queue_exception(vcpu, DB_VECTOR);
5890         }
5891 }
5892
5893 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
5894 {
5895         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5896         int r = EMULATE_DONE;
5897
5898         kvm_x86_ops->skip_emulated_instruction(vcpu);
5899
5900         /*
5901          * rflags is the old, "raw" value of the flags.  The new value has
5902          * not been saved yet.
5903          *
5904          * This is correct even for TF set by the guest, because "the
5905          * processor will not generate this exception after the instruction
5906          * that sets the TF flag".
5907          */
5908         if (unlikely(rflags & X86_EFLAGS_TF))
5909                 kvm_vcpu_do_singlestep(vcpu, &r);
5910         return r == EMULATE_DONE;
5911 }
5912 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
5913
5914 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5915 {
5916         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5917             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5918                 struct kvm_run *kvm_run = vcpu->run;
5919                 unsigned long eip = kvm_get_linear_rip(vcpu);
5920                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5921                                            vcpu->arch.guest_debug_dr7,
5922                                            vcpu->arch.eff_db);
5923
5924                 if (dr6 != 0) {
5925                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5926                         kvm_run->debug.arch.pc = eip;
5927                         kvm_run->debug.arch.exception = DB_VECTOR;
5928                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5929                         *r = EMULATE_USER_EXIT;
5930                         return true;
5931                 }
5932         }
5933
5934         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5935             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5936                 unsigned long eip = kvm_get_linear_rip(vcpu);
5937                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5938                                            vcpu->arch.dr7,
5939                                            vcpu->arch.db);
5940
5941                 if (dr6 != 0) {
5942                         vcpu->arch.dr6 &= ~15;
5943                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5944                         kvm_queue_exception(vcpu, DB_VECTOR);
5945                         *r = EMULATE_DONE;
5946                         return true;
5947                 }
5948         }
5949
5950         return false;
5951 }
5952
5953 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
5954 {
5955         switch (ctxt->opcode_len) {
5956         case 1:
5957                 switch (ctxt->b) {
5958                 case 0xe4:      /* IN */
5959                 case 0xe5:
5960                 case 0xec:
5961                 case 0xed:
5962                 case 0xe6:      /* OUT */
5963                 case 0xe7:
5964                 case 0xee:
5965                 case 0xef:
5966                 case 0x6c:      /* INS */
5967                 case 0x6d:
5968                 case 0x6e:      /* OUTS */
5969                 case 0x6f:
5970                         return true;
5971                 }
5972                 break;
5973         case 2:
5974                 switch (ctxt->b) {
5975                 case 0x33:      /* RDPMC */
5976                         return true;
5977                 }
5978                 break;
5979         }
5980
5981         return false;
5982 }
5983
5984 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5985                             unsigned long cr2,
5986                             int emulation_type,
5987                             void *insn,
5988                             int insn_len)
5989 {
5990         int r;
5991         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5992         bool writeback = true;
5993         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5994
5995         /*
5996          * Clear write_fault_to_shadow_pgtable here to ensure it is
5997          * never reused.
5998          */
5999         vcpu->arch.write_fault_to_shadow_pgtable = false;
6000         kvm_clear_exception_queue(vcpu);
6001
6002         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6003                 init_emulate_ctxt(vcpu);
6004
6005                 /*
6006                  * We will reenter on the same instruction since
6007                  * we do not set complete_userspace_io.  This does not
6008                  * handle watchpoints yet, those would be handled in
6009                  * the emulate_ops.
6010                  */
6011                 if (!(emulation_type & EMULTYPE_SKIP) &&
6012                     kvm_vcpu_check_breakpoint(vcpu, &r))
6013                         return r;
6014
6015                 ctxt->interruptibility = 0;
6016                 ctxt->have_exception = false;
6017                 ctxt->exception.vector = -1;
6018                 ctxt->perm_ok = false;
6019
6020                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6021
6022                 r = x86_decode_insn(ctxt, insn, insn_len);
6023
6024                 trace_kvm_emulate_insn_start(vcpu);
6025                 ++vcpu->stat.insn_emulation;
6026                 if (r != EMULATION_OK)  {
6027                         if (emulation_type & EMULTYPE_TRAP_UD)
6028                                 return EMULATE_FAIL;
6029                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6030                                                 emulation_type))
6031                                 return EMULATE_DONE;
6032                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6033                                 return EMULATE_DONE;
6034                         if (emulation_type & EMULTYPE_SKIP)
6035                                 return EMULATE_FAIL;
6036                         return handle_emulation_failure(vcpu, emulation_type);
6037                 }
6038         }
6039
6040         if ((emulation_type & EMULTYPE_VMWARE) &&
6041             !is_vmware_backdoor_opcode(ctxt))
6042                 return EMULATE_FAIL;
6043
6044         if (emulation_type & EMULTYPE_SKIP) {
6045                 kvm_rip_write(vcpu, ctxt->_eip);
6046                 if (ctxt->eflags & X86_EFLAGS_RF)
6047                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6048                 return EMULATE_DONE;
6049         }
6050
6051         if (retry_instruction(ctxt, cr2, emulation_type))
6052                 return EMULATE_DONE;
6053
6054         /* this is needed for vmware backdoor interface to work since it
6055            changes registers values  during IO operation */
6056         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6057                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6058                 emulator_invalidate_register_cache(ctxt);
6059         }
6060
6061 restart:
6062         /* Save the faulting GPA (cr2) in the address field */
6063         ctxt->exception.address = cr2;
6064
6065         r = x86_emulate_insn(ctxt);
6066
6067         if (r == EMULATION_INTERCEPTED)
6068                 return EMULATE_DONE;
6069
6070         if (r == EMULATION_FAILED) {
6071                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6072                                         emulation_type))
6073                         return EMULATE_DONE;
6074
6075                 return handle_emulation_failure(vcpu, emulation_type);
6076         }
6077
6078         if (ctxt->have_exception) {
6079                 r = EMULATE_DONE;
6080                 if (inject_emulated_exception(vcpu))
6081                         return r;
6082         } else if (vcpu->arch.pio.count) {
6083                 if (!vcpu->arch.pio.in) {
6084                         /* FIXME: return into emulator if single-stepping.  */
6085                         vcpu->arch.pio.count = 0;
6086                 } else {
6087                         writeback = false;
6088                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6089                 }
6090                 r = EMULATE_USER_EXIT;
6091         } else if (vcpu->mmio_needed) {
6092                 if (!vcpu->mmio_is_write)
6093                         writeback = false;
6094                 r = EMULATE_USER_EXIT;
6095                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6096         } else if (r == EMULATION_RESTART)
6097                 goto restart;
6098         else
6099                 r = EMULATE_DONE;
6100
6101         if (writeback) {
6102                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6103                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6104                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6105                 kvm_rip_write(vcpu, ctxt->eip);
6106                 if (r == EMULATE_DONE &&
6107                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6108                         kvm_vcpu_do_singlestep(vcpu, &r);
6109                 if (!ctxt->have_exception ||
6110                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6111                         __kvm_set_rflags(vcpu, ctxt->eflags);
6112
6113                 /*
6114                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6115                  * do nothing, and it will be requested again as soon as
6116                  * the shadow expires.  But we still need to check here,
6117                  * because POPF has no interrupt shadow.
6118                  */
6119                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6120                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6121         } else
6122                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6123
6124         return r;
6125 }
6126 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
6127
6128 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6129                             unsigned short port)
6130 {
6131         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6132         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6133                                             size, port, &val, 1);
6134         /* do not return to emulator after return from userspace */
6135         vcpu->arch.pio.count = 0;
6136         return ret;
6137 }
6138
6139 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6140 {
6141         unsigned long val;
6142
6143         /* We should only ever be called with arch.pio.count equal to 1 */
6144         BUG_ON(vcpu->arch.pio.count != 1);
6145
6146         /* For size less than 4 we merge, else we zero extend */
6147         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6148                                         : 0;
6149
6150         /*
6151          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6152          * the copy and tracing
6153          */
6154         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6155                                  vcpu->arch.pio.port, &val, 1);
6156         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6157
6158         return 1;
6159 }
6160
6161 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6162                            unsigned short port)
6163 {
6164         unsigned long val;
6165         int ret;
6166
6167         /* For size less than 4 we merge, else we zero extend */
6168         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6169
6170         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6171                                        &val, 1);
6172         if (ret) {
6173                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6174                 return ret;
6175         }
6176
6177         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6178
6179         return 0;
6180 }
6181
6182 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6183 {
6184         int ret = kvm_skip_emulated_instruction(vcpu);
6185
6186         /*
6187          * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
6188          * KVM_EXIT_DEBUG here.
6189          */
6190         if (in)
6191                 return kvm_fast_pio_in(vcpu, size, port) && ret;
6192         else
6193                 return kvm_fast_pio_out(vcpu, size, port) && ret;
6194 }
6195 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6196
6197 static int kvmclock_cpu_down_prep(unsigned int cpu)
6198 {
6199         __this_cpu_write(cpu_tsc_khz, 0);
6200         return 0;
6201 }
6202
6203 static void tsc_khz_changed(void *data)
6204 {
6205         struct cpufreq_freqs *freq = data;
6206         unsigned long khz = 0;
6207
6208         if (data)
6209                 khz = freq->new;
6210         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6211                 khz = cpufreq_quick_get(raw_smp_processor_id());
6212         if (!khz)
6213                 khz = tsc_khz;
6214         __this_cpu_write(cpu_tsc_khz, khz);
6215 }
6216
6217 #ifdef CONFIG_X86_64
6218 static void kvm_hyperv_tsc_notifier(void)
6219 {
6220         struct kvm *kvm;
6221         struct kvm_vcpu *vcpu;
6222         int cpu;
6223
6224         spin_lock(&kvm_lock);
6225         list_for_each_entry(kvm, &vm_list, vm_list)
6226                 kvm_make_mclock_inprogress_request(kvm);
6227
6228         hyperv_stop_tsc_emulation();
6229
6230         /* TSC frequency always matches when on Hyper-V */
6231         for_each_present_cpu(cpu)
6232                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6233         kvm_max_guest_tsc_khz = tsc_khz;
6234
6235         list_for_each_entry(kvm, &vm_list, vm_list) {
6236                 struct kvm_arch *ka = &kvm->arch;
6237
6238                 spin_lock(&ka->pvclock_gtod_sync_lock);
6239
6240                 pvclock_update_vm_gtod_copy(kvm);
6241
6242                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6243                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6244
6245                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6246                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6247
6248                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6249         }
6250         spin_unlock(&kvm_lock);
6251 }
6252 #endif
6253
6254 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6255                                      void *data)
6256 {
6257         struct cpufreq_freqs *freq = data;
6258         struct kvm *kvm;
6259         struct kvm_vcpu *vcpu;
6260         int i, send_ipi = 0;
6261
6262         /*
6263          * We allow guests to temporarily run on slowing clocks,
6264          * provided we notify them after, or to run on accelerating
6265          * clocks, provided we notify them before.  Thus time never
6266          * goes backwards.
6267          *
6268          * However, we have a problem.  We can't atomically update
6269          * the frequency of a given CPU from this function; it is
6270          * merely a notifier, which can be called from any CPU.
6271          * Changing the TSC frequency at arbitrary points in time
6272          * requires a recomputation of local variables related to
6273          * the TSC for each VCPU.  We must flag these local variables
6274          * to be updated and be sure the update takes place with the
6275          * new frequency before any guests proceed.
6276          *
6277          * Unfortunately, the combination of hotplug CPU and frequency
6278          * change creates an intractable locking scenario; the order
6279          * of when these callouts happen is undefined with respect to
6280          * CPU hotplug, and they can race with each other.  As such,
6281          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6282          * undefined; you can actually have a CPU frequency change take
6283          * place in between the computation of X and the setting of the
6284          * variable.  To protect against this problem, all updates of
6285          * the per_cpu tsc_khz variable are done in an interrupt
6286          * protected IPI, and all callers wishing to update the value
6287          * must wait for a synchronous IPI to complete (which is trivial
6288          * if the caller is on the CPU already).  This establishes the
6289          * necessary total order on variable updates.
6290          *
6291          * Note that because a guest time update may take place
6292          * anytime after the setting of the VCPU's request bit, the
6293          * correct TSC value must be set before the request.  However,
6294          * to ensure the update actually makes it to any guest which
6295          * starts running in hardware virtualization between the set
6296          * and the acquisition of the spinlock, we must also ping the
6297          * CPU after setting the request bit.
6298          *
6299          */
6300
6301         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6302                 return 0;
6303         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6304                 return 0;
6305
6306         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6307
6308         spin_lock(&kvm_lock);
6309         list_for_each_entry(kvm, &vm_list, vm_list) {
6310                 kvm_for_each_vcpu(i, vcpu, kvm) {
6311                         if (vcpu->cpu != freq->cpu)
6312                                 continue;
6313                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6314                         if (vcpu->cpu != smp_processor_id())
6315                                 send_ipi = 1;
6316                 }
6317         }
6318         spin_unlock(&kvm_lock);
6319
6320         if (freq->old < freq->new && send_ipi) {
6321                 /*
6322                  * We upscale the frequency.  Must make the guest
6323                  * doesn't see old kvmclock values while running with
6324                  * the new frequency, otherwise we risk the guest sees
6325                  * time go backwards.
6326                  *
6327                  * In case we update the frequency for another cpu
6328                  * (which might be in guest context) send an interrupt
6329                  * to kick the cpu out of guest context.  Next time
6330                  * guest context is entered kvmclock will be updated,
6331                  * so the guest will not see stale values.
6332                  */
6333                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6334         }
6335         return 0;
6336 }
6337
6338 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6339         .notifier_call  = kvmclock_cpufreq_notifier
6340 };
6341
6342 static int kvmclock_cpu_online(unsigned int cpu)
6343 {
6344         tsc_khz_changed(NULL);
6345         return 0;
6346 }
6347
6348 static void kvm_timer_init(void)
6349 {
6350         max_tsc_khz = tsc_khz;
6351
6352         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6353 #ifdef CONFIG_CPU_FREQ
6354                 struct cpufreq_policy policy;
6355                 int cpu;
6356
6357                 memset(&policy, 0, sizeof(policy));
6358                 cpu = get_cpu();
6359                 cpufreq_get_policy(&policy, cpu);
6360                 if (policy.cpuinfo.max_freq)
6361                         max_tsc_khz = policy.cpuinfo.max_freq;
6362                 put_cpu();
6363 #endif
6364                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6365                                           CPUFREQ_TRANSITION_NOTIFIER);
6366         }
6367         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6368
6369         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6370                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6371 }
6372
6373 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6374 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6375
6376 int kvm_is_in_guest(void)
6377 {
6378         return __this_cpu_read(current_vcpu) != NULL;
6379 }
6380
6381 static int kvm_is_user_mode(void)
6382 {
6383         int user_mode = 3;
6384
6385         if (__this_cpu_read(current_vcpu))
6386                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6387
6388         return user_mode != 0;
6389 }
6390
6391 static unsigned long kvm_get_guest_ip(void)
6392 {
6393         unsigned long ip = 0;
6394
6395         if (__this_cpu_read(current_vcpu))
6396                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6397
6398         return ip;
6399 }
6400
6401 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6402         .is_in_guest            = kvm_is_in_guest,
6403         .is_user_mode           = kvm_is_user_mode,
6404         .get_guest_ip           = kvm_get_guest_ip,
6405 };
6406
6407 static void kvm_set_mmio_spte_mask(void)
6408 {
6409         u64 mask;
6410         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6411
6412         /*
6413          * Set the reserved bits and the present bit of an paging-structure
6414          * entry to generate page fault with PFER.RSV = 1.
6415          */
6416          /* Mask the reserved physical address bits. */
6417         mask = rsvd_bits(maxphyaddr, 51);
6418
6419         /* Set the present bit. */
6420         mask |= 1ull;
6421
6422 #ifdef CONFIG_X86_64
6423         /*
6424          * If reserved bit is not supported, clear the present bit to disable
6425          * mmio page fault.
6426          */
6427         if (maxphyaddr == 52)
6428                 mask &= ~1ull;
6429 #endif
6430
6431         kvm_mmu_set_mmio_spte_mask(mask, mask);
6432 }
6433
6434 #ifdef CONFIG_X86_64
6435 static void pvclock_gtod_update_fn(struct work_struct *work)
6436 {
6437         struct kvm *kvm;
6438
6439         struct kvm_vcpu *vcpu;
6440         int i;
6441
6442         spin_lock(&kvm_lock);
6443         list_for_each_entry(kvm, &vm_list, vm_list)
6444                 kvm_for_each_vcpu(i, vcpu, kvm)
6445                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6446         atomic_set(&kvm_guest_has_master_clock, 0);
6447         spin_unlock(&kvm_lock);
6448 }
6449
6450 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6451
6452 /*
6453  * Notification about pvclock gtod data update.
6454  */
6455 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6456                                void *priv)
6457 {
6458         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6459         struct timekeeper *tk = priv;
6460
6461         update_pvclock_gtod(tk);
6462
6463         /* disable master clock if host does not trust, or does not
6464          * use, TSC based clocksource.
6465          */
6466         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6467             atomic_read(&kvm_guest_has_master_clock) != 0)
6468                 queue_work(system_long_wq, &pvclock_gtod_work);
6469
6470         return 0;
6471 }
6472
6473 static struct notifier_block pvclock_gtod_notifier = {
6474         .notifier_call = pvclock_gtod_notify,
6475 };
6476 #endif
6477
6478 int kvm_arch_init(void *opaque)
6479 {
6480         int r;
6481         struct kvm_x86_ops *ops = opaque;
6482
6483         if (kvm_x86_ops) {
6484                 printk(KERN_ERR "kvm: already loaded the other module\n");
6485                 r = -EEXIST;
6486                 goto out;
6487         }
6488
6489         if (!ops->cpu_has_kvm_support()) {
6490                 printk(KERN_ERR "kvm: no hardware support\n");
6491                 r = -EOPNOTSUPP;
6492                 goto out;
6493         }
6494         if (ops->disabled_by_bios()) {
6495                 printk(KERN_ERR "kvm: disabled by bios\n");
6496                 r = -EOPNOTSUPP;
6497                 goto out;
6498         }
6499
6500         r = -ENOMEM;
6501         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6502         if (!shared_msrs) {
6503                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6504                 goto out;
6505         }
6506
6507         r = kvm_mmu_module_init();
6508         if (r)
6509                 goto out_free_percpu;
6510
6511         kvm_set_mmio_spte_mask();
6512
6513         kvm_x86_ops = ops;
6514
6515         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6516                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6517                         PT_PRESENT_MASK, 0, sme_me_mask);
6518         kvm_timer_init();
6519
6520         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6521
6522         if (boot_cpu_has(X86_FEATURE_XSAVE))
6523                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6524
6525         kvm_lapic_init();
6526 #ifdef CONFIG_X86_64
6527         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6528
6529         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6530                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6531 #endif
6532
6533         return 0;
6534
6535 out_free_percpu:
6536         free_percpu(shared_msrs);
6537 out:
6538         return r;
6539 }
6540
6541 void kvm_arch_exit(void)
6542 {
6543 #ifdef CONFIG_X86_64
6544         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6545                 clear_hv_tscchange_cb();
6546 #endif
6547         kvm_lapic_exit();
6548         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6549
6550         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6551                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6552                                             CPUFREQ_TRANSITION_NOTIFIER);
6553         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6554 #ifdef CONFIG_X86_64
6555         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6556 #endif
6557         kvm_x86_ops = NULL;
6558         kvm_mmu_module_exit();
6559         free_percpu(shared_msrs);
6560 }
6561
6562 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6563 {
6564         ++vcpu->stat.halt_exits;
6565         if (lapic_in_kernel(vcpu)) {
6566                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6567                 return 1;
6568         } else {
6569                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6570                 return 0;
6571         }
6572 }
6573 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6574
6575 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6576 {
6577         int ret = kvm_skip_emulated_instruction(vcpu);
6578         /*
6579          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6580          * KVM_EXIT_DEBUG here.
6581          */
6582         return kvm_vcpu_halt(vcpu) && ret;
6583 }
6584 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6585
6586 #ifdef CONFIG_X86_64
6587 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6588                                 unsigned long clock_type)
6589 {
6590         struct kvm_clock_pairing clock_pairing;
6591         struct timespec ts;
6592         u64 cycle;
6593         int ret;
6594
6595         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6596                 return -KVM_EOPNOTSUPP;
6597
6598         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6599                 return -KVM_EOPNOTSUPP;
6600
6601         clock_pairing.sec = ts.tv_sec;
6602         clock_pairing.nsec = ts.tv_nsec;
6603         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6604         clock_pairing.flags = 0;
6605
6606         ret = 0;
6607         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6608                             sizeof(struct kvm_clock_pairing)))
6609                 ret = -KVM_EFAULT;
6610
6611         return ret;
6612 }
6613 #endif
6614
6615 /*
6616  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6617  *
6618  * @apicid - apicid of vcpu to be kicked.
6619  */
6620 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6621 {
6622         struct kvm_lapic_irq lapic_irq;
6623
6624         lapic_irq.shorthand = 0;
6625         lapic_irq.dest_mode = 0;
6626         lapic_irq.level = 0;
6627         lapic_irq.dest_id = apicid;
6628         lapic_irq.msi_redir_hint = false;
6629
6630         lapic_irq.delivery_mode = APIC_DM_REMRD;
6631         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6632 }
6633
6634 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6635 {
6636         vcpu->arch.apicv_active = false;
6637         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6638 }
6639
6640 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6641 {
6642         unsigned long nr, a0, a1, a2, a3, ret;
6643         int op_64_bit, r;
6644
6645         r = kvm_skip_emulated_instruction(vcpu);
6646
6647         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6648                 return kvm_hv_hypercall(vcpu);
6649
6650         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6651         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6652         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6653         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6654         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6655
6656         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6657
6658         op_64_bit = is_64_bit_mode(vcpu);
6659         if (!op_64_bit) {
6660                 nr &= 0xFFFFFFFF;
6661                 a0 &= 0xFFFFFFFF;
6662                 a1 &= 0xFFFFFFFF;
6663                 a2 &= 0xFFFFFFFF;
6664                 a3 &= 0xFFFFFFFF;
6665         }
6666
6667         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6668                 ret = -KVM_EPERM;
6669                 goto out;
6670         }
6671
6672         switch (nr) {
6673         case KVM_HC_VAPIC_POLL_IRQ:
6674                 ret = 0;
6675                 break;
6676         case KVM_HC_KICK_CPU:
6677                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6678                 ret = 0;
6679                 break;
6680 #ifdef CONFIG_X86_64
6681         case KVM_HC_CLOCK_PAIRING:
6682                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6683                 break;
6684 #endif
6685         default:
6686                 ret = -KVM_ENOSYS;
6687                 break;
6688         }
6689 out:
6690         if (!op_64_bit)
6691                 ret = (u32)ret;
6692         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6693         ++vcpu->stat.hypercalls;
6694         return r;
6695 }
6696 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6697
6698 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6699 {
6700         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6701         char instruction[3];
6702         unsigned long rip = kvm_rip_read(vcpu);
6703
6704         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6705
6706         return emulator_write_emulated(ctxt, rip, instruction, 3,
6707                 &ctxt->exception);
6708 }
6709
6710 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6711 {
6712         return vcpu->run->request_interrupt_window &&
6713                 likely(!pic_in_kernel(vcpu->kvm));
6714 }
6715
6716 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6717 {
6718         struct kvm_run *kvm_run = vcpu->run;
6719
6720         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6721         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6722         kvm_run->cr8 = kvm_get_cr8(vcpu);
6723         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6724         kvm_run->ready_for_interrupt_injection =
6725                 pic_in_kernel(vcpu->kvm) ||
6726                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6727 }
6728
6729 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6730 {
6731         int max_irr, tpr;
6732
6733         if (!kvm_x86_ops->update_cr8_intercept)
6734                 return;
6735
6736         if (!lapic_in_kernel(vcpu))
6737                 return;
6738
6739         if (vcpu->arch.apicv_active)
6740                 return;
6741
6742         if (!vcpu->arch.apic->vapic_addr)
6743                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6744         else
6745                 max_irr = -1;
6746
6747         if (max_irr != -1)
6748                 max_irr >>= 4;
6749
6750         tpr = kvm_lapic_get_cr8(vcpu);
6751
6752         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6753 }
6754
6755 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6756 {
6757         int r;
6758
6759         /* try to reinject previous events if any */
6760         if (vcpu->arch.exception.injected) {
6761                 kvm_x86_ops->queue_exception(vcpu);
6762                 return 0;
6763         }
6764
6765         /*
6766          * Exceptions must be injected immediately, or the exception
6767          * frame will have the address of the NMI or interrupt handler.
6768          */
6769         if (!vcpu->arch.exception.pending) {
6770                 if (vcpu->arch.nmi_injected) {
6771                         kvm_x86_ops->set_nmi(vcpu);
6772                         return 0;
6773                 }
6774
6775                 if (vcpu->arch.interrupt.pending) {
6776                         kvm_x86_ops->set_irq(vcpu);
6777                         return 0;
6778                 }
6779         }
6780
6781         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6782                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6783                 if (r != 0)
6784                         return r;
6785         }
6786
6787         /* try to inject new event if pending */
6788         if (vcpu->arch.exception.pending) {
6789                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6790                                         vcpu->arch.exception.has_error_code,
6791                                         vcpu->arch.exception.error_code);
6792
6793                 vcpu->arch.exception.pending = false;
6794                 vcpu->arch.exception.injected = true;
6795
6796                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6797                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6798                                              X86_EFLAGS_RF);
6799
6800                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6801                     (vcpu->arch.dr7 & DR7_GD)) {
6802                         vcpu->arch.dr7 &= ~DR7_GD;
6803                         kvm_update_dr7(vcpu);
6804                 }
6805
6806                 kvm_x86_ops->queue_exception(vcpu);
6807         } else if (vcpu->arch.smi_pending && !is_smm(vcpu) && kvm_x86_ops->smi_allowed(vcpu)) {
6808                 vcpu->arch.smi_pending = false;
6809                 ++vcpu->arch.smi_count;
6810                 enter_smm(vcpu);
6811         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6812                 --vcpu->arch.nmi_pending;
6813                 vcpu->arch.nmi_injected = true;
6814                 kvm_x86_ops->set_nmi(vcpu);
6815         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6816                 /*
6817                  * Because interrupts can be injected asynchronously, we are
6818                  * calling check_nested_events again here to avoid a race condition.
6819                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6820                  * proposal and current concerns.  Perhaps we should be setting
6821                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6822                  */
6823                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6824                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6825                         if (r != 0)
6826                                 return r;
6827                 }
6828                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6829                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
6830                                             false);
6831                         kvm_x86_ops->set_irq(vcpu);
6832                 }
6833         }
6834
6835         return 0;
6836 }
6837
6838 static void process_nmi(struct kvm_vcpu *vcpu)
6839 {
6840         unsigned limit = 2;
6841
6842         /*
6843          * x86 is limited to one NMI running, and one NMI pending after it.
6844          * If an NMI is already in progress, limit further NMIs to just one.
6845          * Otherwise, allow two (and we'll inject the first one immediately).
6846          */
6847         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
6848                 limit = 1;
6849
6850         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
6851         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
6852         kvm_make_request(KVM_REQ_EVENT, vcpu);
6853 }
6854
6855 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6856 {
6857         u32 flags = 0;
6858         flags |= seg->g       << 23;
6859         flags |= seg->db      << 22;
6860         flags |= seg->l       << 21;
6861         flags |= seg->avl     << 20;
6862         flags |= seg->present << 15;
6863         flags |= seg->dpl     << 13;
6864         flags |= seg->s       << 12;
6865         flags |= seg->type    << 8;
6866         return flags;
6867 }
6868
6869 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6870 {
6871         struct kvm_segment seg;
6872         int offset;
6873
6874         kvm_get_segment(vcpu, &seg, n);
6875         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
6876
6877         if (n < 3)
6878                 offset = 0x7f84 + n * 12;
6879         else
6880                 offset = 0x7f2c + (n - 3) * 12;
6881
6882         put_smstate(u32, buf, offset + 8, seg.base);
6883         put_smstate(u32, buf, offset + 4, seg.limit);
6884         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6885 }
6886
6887 #ifdef CONFIG_X86_64
6888 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6889 {
6890         struct kvm_segment seg;
6891         int offset;
6892         u16 flags;
6893
6894         kvm_get_segment(vcpu, &seg, n);
6895         offset = 0x7e00 + n * 16;
6896
6897         flags = enter_smm_get_segment_flags(&seg) >> 8;
6898         put_smstate(u16, buf, offset, seg.selector);
6899         put_smstate(u16, buf, offset + 2, flags);
6900         put_smstate(u32, buf, offset + 4, seg.limit);
6901         put_smstate(u64, buf, offset + 8, seg.base);
6902 }
6903 #endif
6904
6905 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6906 {
6907         struct desc_ptr dt;
6908         struct kvm_segment seg;
6909         unsigned long val;
6910         int i;
6911
6912         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
6913         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
6914         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
6915         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
6916
6917         for (i = 0; i < 8; i++)
6918                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
6919
6920         kvm_get_dr(vcpu, 6, &val);
6921         put_smstate(u32, buf, 0x7fcc, (u32)val);
6922         kvm_get_dr(vcpu, 7, &val);
6923         put_smstate(u32, buf, 0x7fc8, (u32)val);
6924
6925         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6926         put_smstate(u32, buf, 0x7fc4, seg.selector);
6927         put_smstate(u32, buf, 0x7f64, seg.base);
6928         put_smstate(u32, buf, 0x7f60, seg.limit);
6929         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6930
6931         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6932         put_smstate(u32, buf, 0x7fc0, seg.selector);
6933         put_smstate(u32, buf, 0x7f80, seg.base);
6934         put_smstate(u32, buf, 0x7f7c, seg.limit);
6935         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6936
6937         kvm_x86_ops->get_gdt(vcpu, &dt);
6938         put_smstate(u32, buf, 0x7f74, dt.address);
6939         put_smstate(u32, buf, 0x7f70, dt.size);
6940
6941         kvm_x86_ops->get_idt(vcpu, &dt);
6942         put_smstate(u32, buf, 0x7f58, dt.address);
6943         put_smstate(u32, buf, 0x7f54, dt.size);
6944
6945         for (i = 0; i < 6; i++)
6946                 enter_smm_save_seg_32(vcpu, buf, i);
6947
6948         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6949
6950         /* revision id */
6951         put_smstate(u32, buf, 0x7efc, 0x00020000);
6952         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6953 }
6954
6955 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6956 {
6957 #ifdef CONFIG_X86_64
6958         struct desc_ptr dt;
6959         struct kvm_segment seg;
6960         unsigned long val;
6961         int i;
6962
6963         for (i = 0; i < 16; i++)
6964                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6965
6966         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6967         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6968
6969         kvm_get_dr(vcpu, 6, &val);
6970         put_smstate(u64, buf, 0x7f68, val);
6971         kvm_get_dr(vcpu, 7, &val);
6972         put_smstate(u64, buf, 0x7f60, val);
6973
6974         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6975         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6976         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6977
6978         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6979
6980         /* revision id */
6981         put_smstate(u32, buf, 0x7efc, 0x00020064);
6982
6983         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6984
6985         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6986         put_smstate(u16, buf, 0x7e90, seg.selector);
6987         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6988         put_smstate(u32, buf, 0x7e94, seg.limit);
6989         put_smstate(u64, buf, 0x7e98, seg.base);
6990
6991         kvm_x86_ops->get_idt(vcpu, &dt);
6992         put_smstate(u32, buf, 0x7e84, dt.size);
6993         put_smstate(u64, buf, 0x7e88, dt.address);
6994
6995         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6996         put_smstate(u16, buf, 0x7e70, seg.selector);
6997         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6998         put_smstate(u32, buf, 0x7e74, seg.limit);
6999         put_smstate(u64, buf, 0x7e78, seg.base);
7000
7001         kvm_x86_ops->get_gdt(vcpu, &dt);
7002         put_smstate(u32, buf, 0x7e64, dt.size);
7003         put_smstate(u64, buf, 0x7e68, dt.address);
7004
7005         for (i = 0; i < 6; i++)
7006                 enter_smm_save_seg_64(vcpu, buf, i);
7007 #else
7008         WARN_ON_ONCE(1);
7009 #endif
7010 }
7011
7012 static void enter_smm(struct kvm_vcpu *vcpu)
7013 {
7014         struct kvm_segment cs, ds;
7015         struct desc_ptr dt;
7016         char buf[512];
7017         u32 cr0;
7018
7019         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7020         memset(buf, 0, 512);
7021         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7022                 enter_smm_save_state_64(vcpu, buf);
7023         else
7024                 enter_smm_save_state_32(vcpu, buf);
7025
7026         /*
7027          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7028          * vCPU state (e.g. leave guest mode) after we've saved the state into
7029          * the SMM state-save area.
7030          */
7031         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7032
7033         vcpu->arch.hflags |= HF_SMM_MASK;
7034         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7035
7036         if (kvm_x86_ops->get_nmi_mask(vcpu))
7037                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7038         else
7039                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7040
7041         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7042         kvm_rip_write(vcpu, 0x8000);
7043
7044         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7045         kvm_x86_ops->set_cr0(vcpu, cr0);
7046         vcpu->arch.cr0 = cr0;
7047
7048         kvm_x86_ops->set_cr4(vcpu, 0);
7049
7050         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7051         dt.address = dt.size = 0;
7052         kvm_x86_ops->set_idt(vcpu, &dt);
7053
7054         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7055
7056         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7057         cs.base = vcpu->arch.smbase;
7058
7059         ds.selector = 0;
7060         ds.base = 0;
7061
7062         cs.limit    = ds.limit = 0xffffffff;
7063         cs.type     = ds.type = 0x3;
7064         cs.dpl      = ds.dpl = 0;
7065         cs.db       = ds.db = 0;
7066         cs.s        = ds.s = 1;
7067         cs.l        = ds.l = 0;
7068         cs.g        = ds.g = 1;
7069         cs.avl      = ds.avl = 0;
7070         cs.present  = ds.present = 1;
7071         cs.unusable = ds.unusable = 0;
7072         cs.padding  = ds.padding = 0;
7073
7074         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7075         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7076         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7077         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7078         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7079         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7080
7081         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7082                 kvm_x86_ops->set_efer(vcpu, 0);
7083
7084         kvm_update_cpuid(vcpu);
7085         kvm_mmu_reset_context(vcpu);
7086 }
7087
7088 static void process_smi(struct kvm_vcpu *vcpu)
7089 {
7090         vcpu->arch.smi_pending = true;
7091         kvm_make_request(KVM_REQ_EVENT, vcpu);
7092 }
7093
7094 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7095 {
7096         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7097 }
7098
7099 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7100 {
7101         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7102                 return;
7103
7104         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7105
7106         if (irqchip_split(vcpu->kvm))
7107                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7108         else {
7109                 if (vcpu->arch.apicv_active)
7110                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7111                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7112         }
7113
7114         if (is_guest_mode(vcpu))
7115                 vcpu->arch.load_eoi_exitmap_pending = true;
7116         else
7117                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7118 }
7119
7120 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7121 {
7122         u64 eoi_exit_bitmap[4];
7123
7124         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7125                 return;
7126
7127         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7128                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7129         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7130 }
7131
7132 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7133                 unsigned long start, unsigned long end)
7134 {
7135         unsigned long apic_address;
7136
7137         /*
7138          * The physical address of apic access page is stored in the VMCS.
7139          * Update it when it becomes invalid.
7140          */
7141         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7142         if (start <= apic_address && apic_address < end)
7143                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7144 }
7145
7146 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7147 {
7148         struct page *page = NULL;
7149
7150         if (!lapic_in_kernel(vcpu))
7151                 return;
7152
7153         if (!kvm_x86_ops->set_apic_access_page_addr)
7154                 return;
7155
7156         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7157         if (is_error_page(page))
7158                 return;
7159         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7160
7161         /*
7162          * Do not pin apic access page in memory, the MMU notifier
7163          * will call us again if it is migrated or swapped out.
7164          */
7165         put_page(page);
7166 }
7167 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7168
7169 /*
7170  * Returns 1 to let vcpu_run() continue the guest execution loop without
7171  * exiting to the userspace.  Otherwise, the value will be returned to the
7172  * userspace.
7173  */
7174 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7175 {
7176         int r;
7177         bool req_int_win =
7178                 dm_request_for_irq_injection(vcpu) &&
7179                 kvm_cpu_accept_dm_intr(vcpu);
7180
7181         bool req_immediate_exit = false;
7182
7183         if (kvm_request_pending(vcpu)) {
7184                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7185                         kvm_mmu_unload(vcpu);
7186                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7187                         __kvm_migrate_timers(vcpu);
7188                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7189                         kvm_gen_update_masterclock(vcpu->kvm);
7190                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7191                         kvm_gen_kvmclock_update(vcpu);
7192                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7193                         r = kvm_guest_time_update(vcpu);
7194                         if (unlikely(r))
7195                                 goto out;
7196                 }
7197                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7198                         kvm_mmu_sync_roots(vcpu);
7199                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7200                         kvm_vcpu_flush_tlb(vcpu, true);
7201                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7202                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7203                         r = 0;
7204                         goto out;
7205                 }
7206                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7207                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7208                         vcpu->mmio_needed = 0;
7209                         r = 0;
7210                         goto out;
7211                 }
7212                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7213                         /* Page is swapped out. Do synthetic halt */
7214                         vcpu->arch.apf.halted = true;
7215                         r = 1;
7216                         goto out;
7217                 }
7218                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7219                         record_steal_time(vcpu);
7220                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7221                         process_smi(vcpu);
7222                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7223                         process_nmi(vcpu);
7224                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7225                         kvm_pmu_handle_event(vcpu);
7226                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7227                         kvm_pmu_deliver_pmi(vcpu);
7228                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7229                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7230                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7231                                      vcpu->arch.ioapic_handled_vectors)) {
7232                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7233                                 vcpu->run->eoi.vector =
7234                                                 vcpu->arch.pending_ioapic_eoi;
7235                                 r = 0;
7236                                 goto out;
7237                         }
7238                 }
7239                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7240                         vcpu_scan_ioapic(vcpu);
7241                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7242                         vcpu_load_eoi_exitmap(vcpu);
7243                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7244                         kvm_vcpu_reload_apic_access_page(vcpu);
7245                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7246                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7247                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7248                         r = 0;
7249                         goto out;
7250                 }
7251                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7252                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7253                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7254                         r = 0;
7255                         goto out;
7256                 }
7257                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7258                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7259                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7260                         r = 0;
7261                         goto out;
7262                 }
7263
7264                 /*
7265                  * KVM_REQ_HV_STIMER has to be processed after
7266                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7267                  * depend on the guest clock being up-to-date
7268                  */
7269                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7270                         kvm_hv_process_stimers(vcpu);
7271         }
7272
7273         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7274                 ++vcpu->stat.req_event;
7275                 kvm_apic_accept_events(vcpu);
7276                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7277                         r = 1;
7278                         goto out;
7279                 }
7280
7281                 if (inject_pending_event(vcpu, req_int_win) != 0)
7282                         req_immediate_exit = true;
7283                 else {
7284                         /* Enable SMI/NMI/IRQ window open exits if needed.
7285                          *
7286                          * SMIs have three cases:
7287                          * 1) They can be nested, and then there is nothing to
7288                          *    do here because RSM will cause a vmexit anyway.
7289                          * 2) There is an ISA-specific reason why SMI cannot be
7290                          *    injected, and the moment when this changes can be
7291                          *    intercepted.
7292                          * 3) Or the SMI can be pending because
7293                          *    inject_pending_event has completed the injection
7294                          *    of an IRQ or NMI from the previous vmexit, and
7295                          *    then we request an immediate exit to inject the
7296                          *    SMI.
7297                          */
7298                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7299                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7300                                         req_immediate_exit = true;
7301                         if (vcpu->arch.nmi_pending)
7302                                 kvm_x86_ops->enable_nmi_window(vcpu);
7303                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7304                                 kvm_x86_ops->enable_irq_window(vcpu);
7305                         WARN_ON(vcpu->arch.exception.pending);
7306                 }
7307
7308                 if (kvm_lapic_enabled(vcpu)) {
7309                         update_cr8_intercept(vcpu);
7310                         kvm_lapic_sync_to_vapic(vcpu);
7311                 }
7312         }
7313
7314         r = kvm_mmu_reload(vcpu);
7315         if (unlikely(r)) {
7316                 goto cancel_injection;
7317         }
7318
7319         preempt_disable();
7320
7321         kvm_x86_ops->prepare_guest_switch(vcpu);
7322
7323         /*
7324          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7325          * IPI are then delayed after guest entry, which ensures that they
7326          * result in virtual interrupt delivery.
7327          */
7328         local_irq_disable();
7329         vcpu->mode = IN_GUEST_MODE;
7330
7331         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7332
7333         /*
7334          * 1) We should set ->mode before checking ->requests.  Please see
7335          * the comment in kvm_vcpu_exiting_guest_mode().
7336          *
7337          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7338          * pairs with the memory barrier implicit in pi_test_and_set_on
7339          * (see vmx_deliver_posted_interrupt).
7340          *
7341          * 3) This also orders the write to mode from any reads to the page
7342          * tables done while the VCPU is running.  Please see the comment
7343          * in kvm_flush_remote_tlbs.
7344          */
7345         smp_mb__after_srcu_read_unlock();
7346
7347         /*
7348          * This handles the case where a posted interrupt was
7349          * notified with kvm_vcpu_kick.
7350          */
7351         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7352                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7353
7354         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7355             || need_resched() || signal_pending(current)) {
7356                 vcpu->mode = OUTSIDE_GUEST_MODE;
7357                 smp_wmb();
7358                 local_irq_enable();
7359                 preempt_enable();
7360                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7361                 r = 1;
7362                 goto cancel_injection;
7363         }
7364
7365         kvm_load_guest_xcr0(vcpu);
7366
7367         if (req_immediate_exit) {
7368                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7369                 smp_send_reschedule(vcpu->cpu);
7370         }
7371
7372         trace_kvm_entry(vcpu->vcpu_id);
7373         if (lapic_timer_advance_ns)
7374                 wait_lapic_expire(vcpu);
7375         guest_enter_irqoff();
7376
7377         if (unlikely(vcpu->arch.switch_db_regs)) {
7378                 set_debugreg(0, 7);
7379                 set_debugreg(vcpu->arch.eff_db[0], 0);
7380                 set_debugreg(vcpu->arch.eff_db[1], 1);
7381                 set_debugreg(vcpu->arch.eff_db[2], 2);
7382                 set_debugreg(vcpu->arch.eff_db[3], 3);
7383                 set_debugreg(vcpu->arch.dr6, 6);
7384                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7385         }
7386
7387         kvm_x86_ops->run(vcpu);
7388
7389         /*
7390          * Do this here before restoring debug registers on the host.  And
7391          * since we do this before handling the vmexit, a DR access vmexit
7392          * can (a) read the correct value of the debug registers, (b) set
7393          * KVM_DEBUGREG_WONT_EXIT again.
7394          */
7395         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7396                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7397                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7398                 kvm_update_dr0123(vcpu);
7399                 kvm_update_dr6(vcpu);
7400                 kvm_update_dr7(vcpu);
7401                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7402         }
7403
7404         /*
7405          * If the guest has used debug registers, at least dr7
7406          * will be disabled while returning to the host.
7407          * If we don't have active breakpoints in the host, we don't
7408          * care about the messed up debug address registers. But if
7409          * we have some of them active, restore the old state.
7410          */
7411         if (hw_breakpoint_active())
7412                 hw_breakpoint_restore();
7413
7414         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7415
7416         vcpu->mode = OUTSIDE_GUEST_MODE;
7417         smp_wmb();
7418
7419         kvm_put_guest_xcr0(vcpu);
7420
7421         kvm_before_interrupt(vcpu);
7422         kvm_x86_ops->handle_external_intr(vcpu);
7423         kvm_after_interrupt(vcpu);
7424
7425         ++vcpu->stat.exits;
7426
7427         guest_exit_irqoff();
7428
7429         local_irq_enable();
7430         preempt_enable();
7431
7432         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7433
7434         /*
7435          * Profile KVM exit RIPs:
7436          */
7437         if (unlikely(prof_on == KVM_PROFILING)) {
7438                 unsigned long rip = kvm_rip_read(vcpu);
7439                 profile_hit(KVM_PROFILING, (void *)rip);
7440         }
7441
7442         if (unlikely(vcpu->arch.tsc_always_catchup))
7443                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7444
7445         if (vcpu->arch.apic_attention)
7446                 kvm_lapic_sync_from_vapic(vcpu);
7447
7448         vcpu->arch.gpa_available = false;
7449         r = kvm_x86_ops->handle_exit(vcpu);
7450         return r;
7451
7452 cancel_injection:
7453         kvm_x86_ops->cancel_injection(vcpu);
7454         if (unlikely(vcpu->arch.apic_attention))
7455                 kvm_lapic_sync_from_vapic(vcpu);
7456 out:
7457         return r;
7458 }
7459
7460 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7461 {
7462         if (!kvm_arch_vcpu_runnable(vcpu) &&
7463             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7464                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7465                 kvm_vcpu_block(vcpu);
7466                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7467
7468                 if (kvm_x86_ops->post_block)
7469                         kvm_x86_ops->post_block(vcpu);
7470
7471                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7472                         return 1;
7473         }
7474
7475         kvm_apic_accept_events(vcpu);
7476         switch(vcpu->arch.mp_state) {
7477         case KVM_MP_STATE_HALTED:
7478                 vcpu->arch.pv.pv_unhalted = false;
7479                 vcpu->arch.mp_state =
7480                         KVM_MP_STATE_RUNNABLE;
7481         case KVM_MP_STATE_RUNNABLE:
7482                 vcpu->arch.apf.halted = false;
7483                 break;
7484         case KVM_MP_STATE_INIT_RECEIVED:
7485                 break;
7486         default:
7487                 return -EINTR;
7488                 break;
7489         }
7490         return 1;
7491 }
7492
7493 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7494 {
7495         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7496                 kvm_x86_ops->check_nested_events(vcpu, false);
7497
7498         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7499                 !vcpu->arch.apf.halted);
7500 }
7501
7502 static int vcpu_run(struct kvm_vcpu *vcpu)
7503 {
7504         int r;
7505         struct kvm *kvm = vcpu->kvm;
7506
7507         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7508
7509         for (;;) {
7510                 if (kvm_vcpu_running(vcpu)) {
7511                         r = vcpu_enter_guest(vcpu);
7512                 } else {
7513                         r = vcpu_block(kvm, vcpu);
7514                 }
7515
7516                 if (r <= 0)
7517                         break;
7518
7519                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7520                 if (kvm_cpu_has_pending_timer(vcpu))
7521                         kvm_inject_pending_timer_irqs(vcpu);
7522
7523                 if (dm_request_for_irq_injection(vcpu) &&
7524                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7525                         r = 0;
7526                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7527                         ++vcpu->stat.request_irq_exits;
7528                         break;
7529                 }
7530
7531                 kvm_check_async_pf_completion(vcpu);
7532
7533                 if (signal_pending(current)) {
7534                         r = -EINTR;
7535                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7536                         ++vcpu->stat.signal_exits;
7537                         break;
7538                 }
7539                 if (need_resched()) {
7540                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7541                         cond_resched();
7542                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7543                 }
7544         }
7545
7546         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7547
7548         return r;
7549 }
7550
7551 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7552 {
7553         int r;
7554         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7555         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7556         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7557         if (r != EMULATE_DONE)
7558                 return 0;
7559         return 1;
7560 }
7561
7562 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7563 {
7564         BUG_ON(!vcpu->arch.pio.count);
7565
7566         return complete_emulated_io(vcpu);
7567 }
7568
7569 /*
7570  * Implements the following, as a state machine:
7571  *
7572  * read:
7573  *   for each fragment
7574  *     for each mmio piece in the fragment
7575  *       write gpa, len
7576  *       exit
7577  *       copy data
7578  *   execute insn
7579  *
7580  * write:
7581  *   for each fragment
7582  *     for each mmio piece in the fragment
7583  *       write gpa, len
7584  *       copy data
7585  *       exit
7586  */
7587 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7588 {
7589         struct kvm_run *run = vcpu->run;
7590         struct kvm_mmio_fragment *frag;
7591         unsigned len;
7592
7593         BUG_ON(!vcpu->mmio_needed);
7594
7595         /* Complete previous fragment */
7596         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7597         len = min(8u, frag->len);
7598         if (!vcpu->mmio_is_write)
7599                 memcpy(frag->data, run->mmio.data, len);
7600
7601         if (frag->len <= 8) {
7602                 /* Switch to the next fragment. */
7603                 frag++;
7604                 vcpu->mmio_cur_fragment++;
7605         } else {
7606                 /* Go forward to the next mmio piece. */
7607                 frag->data += len;
7608                 frag->gpa += len;
7609                 frag->len -= len;
7610         }
7611
7612         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7613                 vcpu->mmio_needed = 0;
7614
7615                 /* FIXME: return into emulator if single-stepping.  */
7616                 if (vcpu->mmio_is_write)
7617                         return 1;
7618                 vcpu->mmio_read_completed = 1;
7619                 return complete_emulated_io(vcpu);
7620         }
7621
7622         run->exit_reason = KVM_EXIT_MMIO;
7623         run->mmio.phys_addr = frag->gpa;
7624         if (vcpu->mmio_is_write)
7625                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7626         run->mmio.len = min(8u, frag->len);
7627         run->mmio.is_write = vcpu->mmio_is_write;
7628         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7629         return 0;
7630 }
7631
7632 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7633 {
7634         int r;
7635
7636         vcpu_load(vcpu);
7637         kvm_sigset_activate(vcpu);
7638         kvm_load_guest_fpu(vcpu);
7639
7640         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7641                 if (kvm_run->immediate_exit) {
7642                         r = -EINTR;
7643                         goto out;
7644                 }
7645                 kvm_vcpu_block(vcpu);
7646                 kvm_apic_accept_events(vcpu);
7647                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7648                 r = -EAGAIN;
7649                 if (signal_pending(current)) {
7650                         r = -EINTR;
7651                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7652                         ++vcpu->stat.signal_exits;
7653                 }
7654                 goto out;
7655         }
7656
7657         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
7658                 r = -EINVAL;
7659                 goto out;
7660         }
7661
7662         if (vcpu->run->kvm_dirty_regs) {
7663                 r = sync_regs(vcpu);
7664                 if (r != 0)
7665                         goto out;
7666         }
7667
7668         /* re-sync apic's tpr */
7669         if (!lapic_in_kernel(vcpu)) {
7670                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7671                         r = -EINVAL;
7672                         goto out;
7673                 }
7674         }
7675
7676         if (unlikely(vcpu->arch.complete_userspace_io)) {
7677                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7678                 vcpu->arch.complete_userspace_io = NULL;
7679                 r = cui(vcpu);
7680                 if (r <= 0)
7681                         goto out;
7682         } else
7683                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7684
7685         if (kvm_run->immediate_exit)
7686                 r = -EINTR;
7687         else
7688                 r = vcpu_run(vcpu);
7689
7690 out:
7691         kvm_put_guest_fpu(vcpu);
7692         if (vcpu->run->kvm_valid_regs)
7693                 store_regs(vcpu);
7694         post_kvm_run_save(vcpu);
7695         kvm_sigset_deactivate(vcpu);
7696
7697         vcpu_put(vcpu);
7698         return r;
7699 }
7700
7701 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7702 {
7703         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7704                 /*
7705                  * We are here if userspace calls get_regs() in the middle of
7706                  * instruction emulation. Registers state needs to be copied
7707                  * back from emulation context to vcpu. Userspace shouldn't do
7708                  * that usually, but some bad designed PV devices (vmware
7709                  * backdoor interface) need this to work
7710                  */
7711                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7712                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7713         }
7714         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7715         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7716         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7717         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7718         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7719         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7720         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7721         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7722 #ifdef CONFIG_X86_64
7723         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7724         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7725         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7726         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7727         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7728         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7729         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7730         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7731 #endif
7732
7733         regs->rip = kvm_rip_read(vcpu);
7734         regs->rflags = kvm_get_rflags(vcpu);
7735 }
7736
7737 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7738 {
7739         vcpu_load(vcpu);
7740         __get_regs(vcpu, regs);
7741         vcpu_put(vcpu);
7742         return 0;
7743 }
7744
7745 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7746 {
7747         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7748         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7749
7750         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7751         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7752         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7753         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7754         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7755         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7756         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7757         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7758 #ifdef CONFIG_X86_64
7759         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7760         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7761         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7762         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7763         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7764         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7765         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7766         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7767 #endif
7768
7769         kvm_rip_write(vcpu, regs->rip);
7770         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7771
7772         vcpu->arch.exception.pending = false;
7773
7774         kvm_make_request(KVM_REQ_EVENT, vcpu);
7775 }
7776
7777 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7778 {
7779         vcpu_load(vcpu);
7780         __set_regs(vcpu, regs);
7781         vcpu_put(vcpu);
7782         return 0;
7783 }
7784
7785 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7786 {
7787         struct kvm_segment cs;
7788
7789         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7790         *db = cs.db;
7791         *l = cs.l;
7792 }
7793 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7794
7795 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7796 {
7797         struct desc_ptr dt;
7798
7799         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7800         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7801         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7802         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7803         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7804         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7805
7806         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7807         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7808
7809         kvm_x86_ops->get_idt(vcpu, &dt);
7810         sregs->idt.limit = dt.size;
7811         sregs->idt.base = dt.address;
7812         kvm_x86_ops->get_gdt(vcpu, &dt);
7813         sregs->gdt.limit = dt.size;
7814         sregs->gdt.base = dt.address;
7815
7816         sregs->cr0 = kvm_read_cr0(vcpu);
7817         sregs->cr2 = vcpu->arch.cr2;
7818         sregs->cr3 = kvm_read_cr3(vcpu);
7819         sregs->cr4 = kvm_read_cr4(vcpu);
7820         sregs->cr8 = kvm_get_cr8(vcpu);
7821         sregs->efer = vcpu->arch.efer;
7822         sregs->apic_base = kvm_get_apic_base(vcpu);
7823
7824         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7825
7826         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7827                 set_bit(vcpu->arch.interrupt.nr,
7828                         (unsigned long *)sregs->interrupt_bitmap);
7829 }
7830
7831 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
7832                                   struct kvm_sregs *sregs)
7833 {
7834         vcpu_load(vcpu);
7835         __get_sregs(vcpu, sregs);
7836         vcpu_put(vcpu);
7837         return 0;
7838 }
7839
7840 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
7841                                     struct kvm_mp_state *mp_state)
7842 {
7843         vcpu_load(vcpu);
7844
7845         kvm_apic_accept_events(vcpu);
7846         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
7847                                         vcpu->arch.pv.pv_unhalted)
7848                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
7849         else
7850                 mp_state->mp_state = vcpu->arch.mp_state;
7851
7852         vcpu_put(vcpu);
7853         return 0;
7854 }
7855
7856 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
7857                                     struct kvm_mp_state *mp_state)
7858 {
7859         int ret = -EINVAL;
7860
7861         vcpu_load(vcpu);
7862
7863         if (!lapic_in_kernel(vcpu) &&
7864             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
7865                 goto out;
7866
7867         /* INITs are latched while in SMM */
7868         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
7869             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
7870              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
7871                 goto out;
7872
7873         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
7874                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
7875                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
7876         } else
7877                 vcpu->arch.mp_state = mp_state->mp_state;
7878         kvm_make_request(KVM_REQ_EVENT, vcpu);
7879
7880         ret = 0;
7881 out:
7882         vcpu_put(vcpu);
7883         return ret;
7884 }
7885
7886 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
7887                     int reason, bool has_error_code, u32 error_code)
7888 {
7889         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7890         int ret;
7891
7892         init_emulate_ctxt(vcpu);
7893
7894         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7895                                    has_error_code, error_code);
7896
7897         if (ret)
7898                 return EMULATE_FAIL;
7899
7900         kvm_rip_write(vcpu, ctxt->eip);
7901         kvm_set_rflags(vcpu, ctxt->eflags);
7902         kvm_make_request(KVM_REQ_EVENT, vcpu);
7903         return EMULATE_DONE;
7904 }
7905 EXPORT_SYMBOL_GPL(kvm_task_switch);
7906
7907 int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7908 {
7909         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
7910                 /*
7911                  * When EFER.LME and CR0.PG are set, the processor is in
7912                  * 64-bit mode (though maybe in a 32-bit code segment).
7913                  * CR4.PAE and EFER.LMA must be set.
7914                  */
7915                 if (!(sregs->cr4 & X86_CR4_PAE)
7916                     || !(sregs->efer & EFER_LMA))
7917                         return -EINVAL;
7918         } else {
7919                 /*
7920                  * Not in 64-bit mode: EFER.LMA is clear and the code
7921                  * segment cannot be 64-bit.
7922                  */
7923                 if (sregs->efer & EFER_LMA || sregs->cs.l)
7924                         return -EINVAL;
7925         }
7926
7927         return 0;
7928 }
7929
7930 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7931 {
7932         struct msr_data apic_base_msr;
7933         int mmu_reset_needed = 0;
7934         int pending_vec, max_bits, idx;
7935         struct desc_ptr dt;
7936         int ret = -EINVAL;
7937
7938         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
7939                         (sregs->cr4 & X86_CR4_OSXSAVE))
7940                 goto out;
7941
7942         if (kvm_valid_sregs(vcpu, sregs))
7943                 goto out;
7944
7945         apic_base_msr.data = sregs->apic_base;
7946         apic_base_msr.host_initiated = true;
7947         if (kvm_set_apic_base(vcpu, &apic_base_msr))
7948                 goto out;
7949
7950         dt.size = sregs->idt.limit;
7951         dt.address = sregs->idt.base;
7952         kvm_x86_ops->set_idt(vcpu, &dt);
7953         dt.size = sregs->gdt.limit;
7954         dt.address = sregs->gdt.base;
7955         kvm_x86_ops->set_gdt(vcpu, &dt);
7956
7957         vcpu->arch.cr2 = sregs->cr2;
7958         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7959         vcpu->arch.cr3 = sregs->cr3;
7960         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7961
7962         kvm_set_cr8(vcpu, sregs->cr8);
7963
7964         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7965         kvm_x86_ops->set_efer(vcpu, sregs->efer);
7966
7967         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7968         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7969         vcpu->arch.cr0 = sregs->cr0;
7970
7971         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7972         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7973         if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7974                 kvm_update_cpuid(vcpu);
7975
7976         idx = srcu_read_lock(&vcpu->kvm->srcu);
7977         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7978                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7979                 mmu_reset_needed = 1;
7980         }
7981         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7982
7983         if (mmu_reset_needed)
7984                 kvm_mmu_reset_context(vcpu);
7985
7986         max_bits = KVM_NR_INTERRUPTS;
7987         pending_vec = find_first_bit(
7988                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
7989         if (pending_vec < max_bits) {
7990                 kvm_queue_interrupt(vcpu, pending_vec, false);
7991                 pr_debug("Set back pending irq %d\n", pending_vec);
7992         }
7993
7994         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7995         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7996         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7997         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7998         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7999         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8000
8001         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8002         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8003
8004         update_cr8_intercept(vcpu);
8005
8006         /* Older userspace won't unhalt the vcpu on reset. */
8007         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8008             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8009             !is_protmode(vcpu))
8010                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8011
8012         kvm_make_request(KVM_REQ_EVENT, vcpu);
8013
8014         ret = 0;
8015 out:
8016         return ret;
8017 }
8018
8019 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8020                                   struct kvm_sregs *sregs)
8021 {
8022         int ret;
8023
8024         vcpu_load(vcpu);
8025         ret = __set_sregs(vcpu, sregs);
8026         vcpu_put(vcpu);
8027         return ret;
8028 }
8029
8030 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8031                                         struct kvm_guest_debug *dbg)
8032 {
8033         unsigned long rflags;
8034         int i, r;
8035
8036         vcpu_load(vcpu);
8037
8038         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8039                 r = -EBUSY;
8040                 if (vcpu->arch.exception.pending)
8041                         goto out;
8042                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8043                         kvm_queue_exception(vcpu, DB_VECTOR);
8044                 else
8045                         kvm_queue_exception(vcpu, BP_VECTOR);
8046         }
8047
8048         /*
8049          * Read rflags as long as potentially injected trace flags are still
8050          * filtered out.
8051          */
8052         rflags = kvm_get_rflags(vcpu);
8053
8054         vcpu->guest_debug = dbg->control;
8055         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8056                 vcpu->guest_debug = 0;
8057
8058         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8059                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8060                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8061                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8062         } else {
8063                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8064                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8065         }
8066         kvm_update_dr7(vcpu);
8067
8068         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8069                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8070                         get_segment_base(vcpu, VCPU_SREG_CS);
8071
8072         /*
8073          * Trigger an rflags update that will inject or remove the trace
8074          * flags.
8075          */
8076         kvm_set_rflags(vcpu, rflags);
8077
8078         kvm_x86_ops->update_bp_intercept(vcpu);
8079
8080         r = 0;
8081
8082 out:
8083         vcpu_put(vcpu);
8084         return r;
8085 }
8086
8087 /*
8088  * Translate a guest virtual address to a guest physical address.
8089  */
8090 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8091                                     struct kvm_translation *tr)
8092 {
8093         unsigned long vaddr = tr->linear_address;
8094         gpa_t gpa;
8095         int idx;
8096
8097         vcpu_load(vcpu);
8098
8099         idx = srcu_read_lock(&vcpu->kvm->srcu);
8100         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8101         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8102         tr->physical_address = gpa;
8103         tr->valid = gpa != UNMAPPED_GVA;
8104         tr->writeable = 1;
8105         tr->usermode = 0;
8106
8107         vcpu_put(vcpu);
8108         return 0;
8109 }
8110
8111 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8112 {
8113         struct fxregs_state *fxsave;
8114
8115         vcpu_load(vcpu);
8116
8117         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8118         memcpy(fpu->fpr, fxsave->st_space, 128);
8119         fpu->fcw = fxsave->cwd;
8120         fpu->fsw = fxsave->swd;
8121         fpu->ftwx = fxsave->twd;
8122         fpu->last_opcode = fxsave->fop;
8123         fpu->last_ip = fxsave->rip;
8124         fpu->last_dp = fxsave->rdp;
8125         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
8126
8127         vcpu_put(vcpu);
8128         return 0;
8129 }
8130
8131 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8132 {
8133         struct fxregs_state *fxsave;
8134
8135         vcpu_load(vcpu);
8136
8137         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8138
8139         memcpy(fxsave->st_space, fpu->fpr, 128);
8140         fxsave->cwd = fpu->fcw;
8141         fxsave->swd = fpu->fsw;
8142         fxsave->twd = fpu->ftwx;
8143         fxsave->fop = fpu->last_opcode;
8144         fxsave->rip = fpu->last_ip;
8145         fxsave->rdp = fpu->last_dp;
8146         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
8147
8148         vcpu_put(vcpu);
8149         return 0;
8150 }
8151
8152 static void store_regs(struct kvm_vcpu *vcpu)
8153 {
8154         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8155
8156         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8157                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8158
8159         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8160                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8161
8162         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8163                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8164                                 vcpu, &vcpu->run->s.regs.events);
8165 }
8166
8167 static int sync_regs(struct kvm_vcpu *vcpu)
8168 {
8169         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8170                 return -EINVAL;
8171
8172         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8173                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8174                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8175         }
8176         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8177                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8178                         return -EINVAL;
8179                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8180         }
8181         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8182                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8183                                 vcpu, &vcpu->run->s.regs.events))
8184                         return -EINVAL;
8185                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8186         }
8187
8188         return 0;
8189 }
8190
8191 static void fx_init(struct kvm_vcpu *vcpu)
8192 {
8193         fpstate_init(&vcpu->arch.guest_fpu.state);
8194         if (boot_cpu_has(X86_FEATURE_XSAVES))
8195                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8196                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8197
8198         /*
8199          * Ensure guest xcr0 is valid for loading
8200          */
8201         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8202
8203         vcpu->arch.cr0 |= X86_CR0_ET;
8204 }
8205
8206 /* Swap (qemu) user FPU context for the guest FPU context. */
8207 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8208 {
8209         preempt_disable();
8210         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8211         /* PKRU is separately restored in kvm_x86_ops->run.  */
8212         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8213                                 ~XFEATURE_MASK_PKRU);
8214         preempt_enable();
8215         trace_kvm_fpu(1);
8216 }
8217
8218 /* When vcpu_run ends, restore user space FPU context. */
8219 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8220 {
8221         preempt_disable();
8222         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8223         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8224         preempt_enable();
8225         ++vcpu->stat.fpu_reload;
8226         trace_kvm_fpu(0);
8227 }
8228
8229 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8230 {
8231         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8232
8233         kvmclock_reset(vcpu);
8234
8235         kvm_x86_ops->vcpu_free(vcpu);
8236         free_cpumask_var(wbinvd_dirty_mask);
8237 }
8238
8239 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8240                                                 unsigned int id)
8241 {
8242         struct kvm_vcpu *vcpu;
8243
8244         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8245                 printk_once(KERN_WARNING
8246                 "kvm: SMP vm created on host with unstable TSC; "
8247                 "guest TSC will not be reliable\n");
8248
8249         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8250
8251         return vcpu;
8252 }
8253
8254 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8255 {
8256         kvm_vcpu_mtrr_init(vcpu);
8257         vcpu_load(vcpu);
8258         kvm_vcpu_reset(vcpu, false);
8259         kvm_mmu_setup(vcpu);
8260         vcpu_put(vcpu);
8261         return 0;
8262 }
8263
8264 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8265 {
8266         struct msr_data msr;
8267         struct kvm *kvm = vcpu->kvm;
8268
8269         kvm_hv_vcpu_postcreate(vcpu);
8270
8271         if (mutex_lock_killable(&vcpu->mutex))
8272                 return;
8273         vcpu_load(vcpu);
8274         msr.data = 0x0;
8275         msr.index = MSR_IA32_TSC;
8276         msr.host_initiated = true;
8277         kvm_write_tsc(vcpu, &msr);
8278         vcpu_put(vcpu);
8279         mutex_unlock(&vcpu->mutex);
8280
8281         if (!kvmclock_periodic_sync)
8282                 return;
8283
8284         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8285                                         KVMCLOCK_SYNC_PERIOD);
8286 }
8287
8288 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8289 {
8290         vcpu->arch.apf.msr_val = 0;
8291
8292         vcpu_load(vcpu);
8293         kvm_mmu_unload(vcpu);
8294         vcpu_put(vcpu);
8295
8296         kvm_x86_ops->vcpu_free(vcpu);
8297 }
8298
8299 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8300 {
8301         kvm_lapic_reset(vcpu, init_event);
8302
8303         vcpu->arch.hflags = 0;
8304
8305         vcpu->arch.smi_pending = 0;
8306         vcpu->arch.smi_count = 0;
8307         atomic_set(&vcpu->arch.nmi_queued, 0);
8308         vcpu->arch.nmi_pending = 0;
8309         vcpu->arch.nmi_injected = false;
8310         kvm_clear_interrupt_queue(vcpu);
8311         kvm_clear_exception_queue(vcpu);
8312         vcpu->arch.exception.pending = false;
8313
8314         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8315         kvm_update_dr0123(vcpu);
8316         vcpu->arch.dr6 = DR6_INIT;
8317         kvm_update_dr6(vcpu);
8318         vcpu->arch.dr7 = DR7_FIXED_1;
8319         kvm_update_dr7(vcpu);
8320
8321         vcpu->arch.cr2 = 0;
8322
8323         kvm_make_request(KVM_REQ_EVENT, vcpu);
8324         vcpu->arch.apf.msr_val = 0;
8325         vcpu->arch.st.msr_val = 0;
8326
8327         kvmclock_reset(vcpu);
8328
8329         kvm_clear_async_pf_completion_queue(vcpu);
8330         kvm_async_pf_hash_reset(vcpu);
8331         vcpu->arch.apf.halted = false;
8332
8333         if (kvm_mpx_supported()) {
8334                 void *mpx_state_buffer;
8335
8336                 /*
8337                  * To avoid have the INIT path from kvm_apic_has_events() that be
8338                  * called with loaded FPU and does not let userspace fix the state.
8339                  */
8340                 if (init_event)
8341                         kvm_put_guest_fpu(vcpu);
8342                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8343                                         XFEATURE_MASK_BNDREGS);
8344                 if (mpx_state_buffer)
8345                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8346                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8347                                         XFEATURE_MASK_BNDCSR);
8348                 if (mpx_state_buffer)
8349                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8350                 if (init_event)
8351                         kvm_load_guest_fpu(vcpu);
8352         }
8353
8354         if (!init_event) {
8355                 kvm_pmu_reset(vcpu);
8356                 vcpu->arch.smbase = 0x30000;
8357
8358                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8359                 vcpu->arch.msr_misc_features_enables = 0;
8360
8361                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8362         }
8363
8364         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8365         vcpu->arch.regs_avail = ~0;
8366         vcpu->arch.regs_dirty = ~0;
8367
8368         vcpu->arch.ia32_xss = 0;
8369
8370         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8371 }
8372
8373 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8374 {
8375         struct kvm_segment cs;
8376
8377         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8378         cs.selector = vector << 8;
8379         cs.base = vector << 12;
8380         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8381         kvm_rip_write(vcpu, 0);
8382 }
8383
8384 int kvm_arch_hardware_enable(void)
8385 {
8386         struct kvm *kvm;
8387         struct kvm_vcpu *vcpu;
8388         int i;
8389         int ret;
8390         u64 local_tsc;
8391         u64 max_tsc = 0;
8392         bool stable, backwards_tsc = false;
8393
8394         kvm_shared_msr_cpu_online();
8395         ret = kvm_x86_ops->hardware_enable();
8396         if (ret != 0)
8397                 return ret;
8398
8399         local_tsc = rdtsc();
8400         stable = !kvm_check_tsc_unstable();
8401         list_for_each_entry(kvm, &vm_list, vm_list) {
8402                 kvm_for_each_vcpu(i, vcpu, kvm) {
8403                         if (!stable && vcpu->cpu == smp_processor_id())
8404                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8405                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8406                                 backwards_tsc = true;
8407                                 if (vcpu->arch.last_host_tsc > max_tsc)
8408                                         max_tsc = vcpu->arch.last_host_tsc;
8409                         }
8410                 }
8411         }
8412
8413         /*
8414          * Sometimes, even reliable TSCs go backwards.  This happens on
8415          * platforms that reset TSC during suspend or hibernate actions, but
8416          * maintain synchronization.  We must compensate.  Fortunately, we can
8417          * detect that condition here, which happens early in CPU bringup,
8418          * before any KVM threads can be running.  Unfortunately, we can't
8419          * bring the TSCs fully up to date with real time, as we aren't yet far
8420          * enough into CPU bringup that we know how much real time has actually
8421          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8422          * variables that haven't been updated yet.
8423          *
8424          * So we simply find the maximum observed TSC above, then record the
8425          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8426          * the adjustment will be applied.  Note that we accumulate
8427          * adjustments, in case multiple suspend cycles happen before some VCPU
8428          * gets a chance to run again.  In the event that no KVM threads get a
8429          * chance to run, we will miss the entire elapsed period, as we'll have
8430          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8431          * loose cycle time.  This isn't too big a deal, since the loss will be
8432          * uniform across all VCPUs (not to mention the scenario is extremely
8433          * unlikely). It is possible that a second hibernate recovery happens
8434          * much faster than a first, causing the observed TSC here to be
8435          * smaller; this would require additional padding adjustment, which is
8436          * why we set last_host_tsc to the local tsc observed here.
8437          *
8438          * N.B. - this code below runs only on platforms with reliable TSC,
8439          * as that is the only way backwards_tsc is set above.  Also note
8440          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8441          * have the same delta_cyc adjustment applied if backwards_tsc
8442          * is detected.  Note further, this adjustment is only done once,
8443          * as we reset last_host_tsc on all VCPUs to stop this from being
8444          * called multiple times (one for each physical CPU bringup).
8445          *
8446          * Platforms with unreliable TSCs don't have to deal with this, they
8447          * will be compensated by the logic in vcpu_load, which sets the TSC to
8448          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8449          * guarantee that they stay in perfect synchronization.
8450          */
8451         if (backwards_tsc) {
8452                 u64 delta_cyc = max_tsc - local_tsc;
8453                 list_for_each_entry(kvm, &vm_list, vm_list) {
8454                         kvm->arch.backwards_tsc_observed = true;
8455                         kvm_for_each_vcpu(i, vcpu, kvm) {
8456                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8457                                 vcpu->arch.last_host_tsc = local_tsc;
8458                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8459                         }
8460
8461                         /*
8462                          * We have to disable TSC offset matching.. if you were
8463                          * booting a VM while issuing an S4 host suspend....
8464                          * you may have some problem.  Solving this issue is
8465                          * left as an exercise to the reader.
8466                          */
8467                         kvm->arch.last_tsc_nsec = 0;
8468                         kvm->arch.last_tsc_write = 0;
8469                 }
8470
8471         }
8472         return 0;
8473 }
8474
8475 void kvm_arch_hardware_disable(void)
8476 {
8477         kvm_x86_ops->hardware_disable();
8478         drop_user_return_notifiers();
8479 }
8480
8481 int kvm_arch_hardware_setup(void)
8482 {
8483         int r;
8484
8485         r = kvm_x86_ops->hardware_setup();
8486         if (r != 0)
8487                 return r;
8488
8489         if (kvm_has_tsc_control) {
8490                 /*
8491                  * Make sure the user can only configure tsc_khz values that
8492                  * fit into a signed integer.
8493                  * A min value is not calculated needed because it will always
8494                  * be 1 on all machines.
8495                  */
8496                 u64 max = min(0x7fffffffULL,
8497                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8498                 kvm_max_guest_tsc_khz = max;
8499
8500                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8501         }
8502
8503         kvm_init_msr_list();
8504         return 0;
8505 }
8506
8507 void kvm_arch_hardware_unsetup(void)
8508 {
8509         kvm_x86_ops->hardware_unsetup();
8510 }
8511
8512 void kvm_arch_check_processor_compat(void *rtn)
8513 {
8514         kvm_x86_ops->check_processor_compatibility(rtn);
8515 }
8516
8517 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8518 {
8519         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8520 }
8521 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8522
8523 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8524 {
8525         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8526 }
8527
8528 struct static_key kvm_no_apic_vcpu __read_mostly;
8529 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8530
8531 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8532 {
8533         struct page *page;
8534         int r;
8535
8536         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8537         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8538         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8539                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8540         else
8541                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8542
8543         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8544         if (!page) {
8545                 r = -ENOMEM;
8546                 goto fail;
8547         }
8548         vcpu->arch.pio_data = page_address(page);
8549
8550         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8551
8552         r = kvm_mmu_create(vcpu);
8553         if (r < 0)
8554                 goto fail_free_pio_data;
8555
8556         if (irqchip_in_kernel(vcpu->kvm)) {
8557                 r = kvm_create_lapic(vcpu);
8558                 if (r < 0)
8559                         goto fail_mmu_destroy;
8560         } else
8561                 static_key_slow_inc(&kvm_no_apic_vcpu);
8562
8563         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8564                                        GFP_KERNEL);
8565         if (!vcpu->arch.mce_banks) {
8566                 r = -ENOMEM;
8567                 goto fail_free_lapic;
8568         }
8569         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8570
8571         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8572                 r = -ENOMEM;
8573                 goto fail_free_mce_banks;
8574         }
8575
8576         fx_init(vcpu);
8577
8578         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8579
8580         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8581
8582         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8583
8584         kvm_async_pf_hash_reset(vcpu);
8585         kvm_pmu_init(vcpu);
8586
8587         vcpu->arch.pending_external_vector = -1;
8588         vcpu->arch.preempted_in_kernel = false;
8589
8590         kvm_hv_vcpu_init(vcpu);
8591
8592         return 0;
8593
8594 fail_free_mce_banks:
8595         kfree(vcpu->arch.mce_banks);
8596 fail_free_lapic:
8597         kvm_free_lapic(vcpu);
8598 fail_mmu_destroy:
8599         kvm_mmu_destroy(vcpu);
8600 fail_free_pio_data:
8601         free_page((unsigned long)vcpu->arch.pio_data);
8602 fail:
8603         return r;
8604 }
8605
8606 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8607 {
8608         int idx;
8609
8610         kvm_hv_vcpu_uninit(vcpu);
8611         kvm_pmu_destroy(vcpu);
8612         kfree(vcpu->arch.mce_banks);
8613         kvm_free_lapic(vcpu);
8614         idx = srcu_read_lock(&vcpu->kvm->srcu);
8615         kvm_mmu_destroy(vcpu);
8616         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8617         free_page((unsigned long)vcpu->arch.pio_data);
8618         if (!lapic_in_kernel(vcpu))
8619                 static_key_slow_dec(&kvm_no_apic_vcpu);
8620 }
8621
8622 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8623 {
8624         kvm_x86_ops->sched_in(vcpu, cpu);
8625 }
8626
8627 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8628 {
8629         if (type)
8630                 return -EINVAL;
8631
8632         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8633         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8634         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8635         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8636         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8637
8638         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8639         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8640         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8641         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8642                 &kvm->arch.irq_sources_bitmap);
8643
8644         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8645         mutex_init(&kvm->arch.apic_map_lock);
8646         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8647
8648         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8649         pvclock_update_vm_gtod_copy(kvm);
8650
8651         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8652         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8653
8654         kvm_hv_init_vm(kvm);
8655         kvm_page_track_init(kvm);
8656         kvm_mmu_init_vm(kvm);
8657
8658         if (kvm_x86_ops->vm_init)
8659                 return kvm_x86_ops->vm_init(kvm);
8660
8661         return 0;
8662 }
8663
8664 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8665 {
8666         vcpu_load(vcpu);
8667         kvm_mmu_unload(vcpu);
8668         vcpu_put(vcpu);
8669 }
8670
8671 static void kvm_free_vcpus(struct kvm *kvm)
8672 {
8673         unsigned int i;
8674         struct kvm_vcpu *vcpu;
8675
8676         /*
8677          * Unpin any mmu pages first.
8678          */
8679         kvm_for_each_vcpu(i, vcpu, kvm) {
8680                 kvm_clear_async_pf_completion_queue(vcpu);
8681                 kvm_unload_vcpu_mmu(vcpu);
8682         }
8683         kvm_for_each_vcpu(i, vcpu, kvm)
8684                 kvm_arch_vcpu_free(vcpu);
8685
8686         mutex_lock(&kvm->lock);
8687         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8688                 kvm->vcpus[i] = NULL;
8689
8690         atomic_set(&kvm->online_vcpus, 0);
8691         mutex_unlock(&kvm->lock);
8692 }
8693
8694 void kvm_arch_sync_events(struct kvm *kvm)
8695 {
8696         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8697         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8698         kvm_free_pit(kvm);
8699 }
8700
8701 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8702 {
8703         int i, r;
8704         unsigned long hva;
8705         struct kvm_memslots *slots = kvm_memslots(kvm);
8706         struct kvm_memory_slot *slot, old;
8707
8708         /* Called with kvm->slots_lock held.  */
8709         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8710                 return -EINVAL;
8711
8712         slot = id_to_memslot(slots, id);
8713         if (size) {
8714                 if (slot->npages)
8715                         return -EEXIST;
8716
8717                 /*
8718                  * MAP_SHARED to prevent internal slot pages from being moved
8719                  * by fork()/COW.
8720                  */
8721                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8722                               MAP_SHARED | MAP_ANONYMOUS, 0);
8723                 if (IS_ERR((void *)hva))
8724                         return PTR_ERR((void *)hva);
8725         } else {
8726                 if (!slot->npages)
8727                         return 0;
8728
8729                 hva = 0;
8730         }
8731
8732         old = *slot;
8733         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8734                 struct kvm_userspace_memory_region m;
8735
8736                 m.slot = id | (i << 16);
8737                 m.flags = 0;
8738                 m.guest_phys_addr = gpa;
8739                 m.userspace_addr = hva;
8740                 m.memory_size = size;
8741                 r = __kvm_set_memory_region(kvm, &m);
8742                 if (r < 0)
8743                         return r;
8744         }
8745
8746         if (!size)
8747                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8748
8749         return 0;
8750 }
8751 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8752
8753 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8754 {
8755         int r;
8756
8757         mutex_lock(&kvm->slots_lock);
8758         r = __x86_set_memory_region(kvm, id, gpa, size);
8759         mutex_unlock(&kvm->slots_lock);
8760
8761         return r;
8762 }
8763 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8764
8765 void kvm_arch_destroy_vm(struct kvm *kvm)
8766 {
8767         if (current->mm == kvm->mm) {
8768                 /*
8769                  * Free memory regions allocated on behalf of userspace,
8770                  * unless the the memory map has changed due to process exit
8771                  * or fd copying.
8772                  */
8773                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8774                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8775                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8776         }
8777         if (kvm_x86_ops->vm_destroy)
8778                 kvm_x86_ops->vm_destroy(kvm);
8779         kvm_pic_destroy(kvm);
8780         kvm_ioapic_destroy(kvm);
8781         kvm_free_vcpus(kvm);
8782         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8783         kvm_mmu_uninit_vm(kvm);
8784         kvm_page_track_cleanup(kvm);
8785         kvm_hv_destroy_vm(kvm);
8786 }
8787
8788 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8789                            struct kvm_memory_slot *dont)
8790 {
8791         int i;
8792
8793         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8794                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8795                         kvfree(free->arch.rmap[i]);
8796                         free->arch.rmap[i] = NULL;
8797                 }
8798                 if (i == 0)
8799                         continue;
8800
8801                 if (!dont || free->arch.lpage_info[i - 1] !=
8802                              dont->arch.lpage_info[i - 1]) {
8803                         kvfree(free->arch.lpage_info[i - 1]);
8804                         free->arch.lpage_info[i - 1] = NULL;
8805                 }
8806         }
8807
8808         kvm_page_track_free_memslot(free, dont);
8809 }
8810
8811 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8812                             unsigned long npages)
8813 {
8814         int i;
8815
8816         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8817                 struct kvm_lpage_info *linfo;
8818                 unsigned long ugfn;
8819                 int lpages;
8820                 int level = i + 1;
8821
8822                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
8823                                       slot->base_gfn, level) + 1;
8824
8825                 slot->arch.rmap[i] =
8826                         kvzalloc(lpages * sizeof(*slot->arch.rmap[i]), GFP_KERNEL);
8827                 if (!slot->arch.rmap[i])
8828                         goto out_free;
8829                 if (i == 0)
8830                         continue;
8831
8832                 linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
8833                 if (!linfo)
8834                         goto out_free;
8835
8836                 slot->arch.lpage_info[i - 1] = linfo;
8837
8838                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8839                         linfo[0].disallow_lpage = 1;
8840                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8841                         linfo[lpages - 1].disallow_lpage = 1;
8842                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
8843                 /*
8844                  * If the gfn and userspace address are not aligned wrt each
8845                  * other, or if explicitly asked to, disable large page
8846                  * support for this slot
8847                  */
8848                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
8849                     !kvm_largepages_enabled()) {
8850                         unsigned long j;
8851
8852                         for (j = 0; j < lpages; ++j)
8853                                 linfo[j].disallow_lpage = 1;
8854                 }
8855         }
8856
8857         if (kvm_page_track_create_memslot(slot, npages))
8858                 goto out_free;
8859
8860         return 0;
8861
8862 out_free:
8863         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8864                 kvfree(slot->arch.rmap[i]);
8865                 slot->arch.rmap[i] = NULL;
8866                 if (i == 0)
8867                         continue;
8868
8869                 kvfree(slot->arch.lpage_info[i - 1]);
8870                 slot->arch.lpage_info[i - 1] = NULL;
8871         }
8872         return -ENOMEM;
8873 }
8874
8875 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8876 {
8877         /*
8878          * memslots->generation has been incremented.
8879          * mmio generation may have reached its maximum value.
8880          */
8881         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8882 }
8883
8884 int kvm_arch_prepare_memory_region(struct kvm *kvm,
8885                                 struct kvm_memory_slot *memslot,
8886                                 const struct kvm_userspace_memory_region *mem,
8887                                 enum kvm_mr_change change)
8888 {
8889         return 0;
8890 }
8891
8892 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
8893                                      struct kvm_memory_slot *new)
8894 {
8895         /* Still write protect RO slot */
8896         if (new->flags & KVM_MEM_READONLY) {
8897                 kvm_mmu_slot_remove_write_access(kvm, new);
8898                 return;
8899         }
8900
8901         /*
8902          * Call kvm_x86_ops dirty logging hooks when they are valid.
8903          *
8904          * kvm_x86_ops->slot_disable_log_dirty is called when:
8905          *
8906          *  - KVM_MR_CREATE with dirty logging is disabled
8907          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8908          *
8909          * The reason is, in case of PML, we need to set D-bit for any slots
8910          * with dirty logging disabled in order to eliminate unnecessary GPA
8911          * logging in PML buffer (and potential PML buffer full VMEXT). This
8912          * guarantees leaving PML enabled during guest's lifetime won't have
8913          * any additonal overhead from PML when guest is running with dirty
8914          * logging disabled for memory slots.
8915          *
8916          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8917          * to dirty logging mode.
8918          *
8919          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8920          *
8921          * In case of write protect:
8922          *
8923          * Write protect all pages for dirty logging.
8924          *
8925          * All the sptes including the large sptes which point to this
8926          * slot are set to readonly. We can not create any new large
8927          * spte on this slot until the end of the logging.
8928          *
8929          * See the comments in fast_page_fault().
8930          */
8931         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
8932                 if (kvm_x86_ops->slot_enable_log_dirty)
8933                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
8934                 else
8935                         kvm_mmu_slot_remove_write_access(kvm, new);
8936         } else {
8937                 if (kvm_x86_ops->slot_disable_log_dirty)
8938                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
8939         }
8940 }
8941
8942 void kvm_arch_commit_memory_region(struct kvm *kvm,
8943                                 const struct kvm_userspace_memory_region *mem,
8944                                 const struct kvm_memory_slot *old,
8945                                 const struct kvm_memory_slot *new,
8946                                 enum kvm_mr_change change)
8947 {
8948         int nr_mmu_pages = 0;
8949
8950         if (!kvm->arch.n_requested_mmu_pages)
8951                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
8952
8953         if (nr_mmu_pages)
8954                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8955
8956         /*
8957          * Dirty logging tracks sptes in 4k granularity, meaning that large
8958          * sptes have to be split.  If live migration is successful, the guest
8959          * in the source machine will be destroyed and large sptes will be
8960          * created in the destination. However, if the guest continues to run
8961          * in the source machine (for example if live migration fails), small
8962          * sptes will remain around and cause bad performance.
8963          *
8964          * Scan sptes if dirty logging has been stopped, dropping those
8965          * which can be collapsed into a single large-page spte.  Later
8966          * page faults will create the large-page sptes.
8967          */
8968         if ((change != KVM_MR_DELETE) &&
8969                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
8970                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
8971                 kvm_mmu_zap_collapsible_sptes(kvm, new);
8972
8973         /*
8974          * Set up write protection and/or dirty logging for the new slot.
8975          *
8976          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8977          * been zapped so no dirty logging staff is needed for old slot. For
8978          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8979          * new and it's also covered when dealing with the new slot.
8980          *
8981          * FIXME: const-ify all uses of struct kvm_memory_slot.
8982          */
8983         if (change != KVM_MR_DELETE)
8984                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8985 }
8986
8987 void kvm_arch_flush_shadow_all(struct kvm *kvm)
8988 {
8989         kvm_mmu_invalidate_zap_all_pages(kvm);
8990 }
8991
8992 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
8993                                    struct kvm_memory_slot *slot)
8994 {
8995         kvm_page_track_flush_slot(kvm, slot);
8996 }
8997
8998 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
8999 {
9000         if (!list_empty_careful(&vcpu->async_pf.done))
9001                 return true;
9002
9003         if (kvm_apic_has_events(vcpu))
9004                 return true;
9005
9006         if (vcpu->arch.pv.pv_unhalted)
9007                 return true;
9008
9009         if (vcpu->arch.exception.pending)
9010                 return true;
9011
9012         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9013             (vcpu->arch.nmi_pending &&
9014              kvm_x86_ops->nmi_allowed(vcpu)))
9015                 return true;
9016
9017         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9018             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9019                 return true;
9020
9021         if (kvm_arch_interrupt_allowed(vcpu) &&
9022             kvm_cpu_has_interrupt(vcpu))
9023                 return true;
9024
9025         if (kvm_hv_has_stimer_pending(vcpu))
9026                 return true;
9027
9028         return false;
9029 }
9030
9031 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9032 {
9033         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9034 }
9035
9036 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9037 {
9038         return vcpu->arch.preempted_in_kernel;
9039 }
9040
9041 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9042 {
9043         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9044 }
9045
9046 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9047 {
9048         return kvm_x86_ops->interrupt_allowed(vcpu);
9049 }
9050
9051 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9052 {
9053         if (is_64_bit_mode(vcpu))
9054                 return kvm_rip_read(vcpu);
9055         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9056                      kvm_rip_read(vcpu));
9057 }
9058 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9059
9060 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9061 {
9062         return kvm_get_linear_rip(vcpu) == linear_rip;
9063 }
9064 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9065
9066 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9067 {
9068         unsigned long rflags;
9069
9070         rflags = kvm_x86_ops->get_rflags(vcpu);
9071         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9072                 rflags &= ~X86_EFLAGS_TF;
9073         return rflags;
9074 }
9075 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9076
9077 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9078 {
9079         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9080             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9081                 rflags |= X86_EFLAGS_TF;
9082         kvm_x86_ops->set_rflags(vcpu, rflags);
9083 }
9084
9085 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9086 {
9087         __kvm_set_rflags(vcpu, rflags);
9088         kvm_make_request(KVM_REQ_EVENT, vcpu);
9089 }
9090 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9091
9092 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9093 {
9094         int r;
9095
9096         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
9097               work->wakeup_all)
9098                 return;
9099
9100         r = kvm_mmu_reload(vcpu);
9101         if (unlikely(r))
9102                 return;
9103
9104         if (!vcpu->arch.mmu.direct_map &&
9105               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
9106                 return;
9107
9108         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
9109 }
9110
9111 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9112 {
9113         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9114 }
9115
9116 static inline u32 kvm_async_pf_next_probe(u32 key)
9117 {
9118         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9119 }
9120
9121 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9122 {
9123         u32 key = kvm_async_pf_hash_fn(gfn);
9124
9125         while (vcpu->arch.apf.gfns[key] != ~0)
9126                 key = kvm_async_pf_next_probe(key);
9127
9128         vcpu->arch.apf.gfns[key] = gfn;
9129 }
9130
9131 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9132 {
9133         int i;
9134         u32 key = kvm_async_pf_hash_fn(gfn);
9135
9136         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9137                      (vcpu->arch.apf.gfns[key] != gfn &&
9138                       vcpu->arch.apf.gfns[key] != ~0); i++)
9139                 key = kvm_async_pf_next_probe(key);
9140
9141         return key;
9142 }
9143
9144 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9145 {
9146         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9147 }
9148
9149 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9150 {
9151         u32 i, j, k;
9152
9153         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9154         while (true) {
9155                 vcpu->arch.apf.gfns[i] = ~0;
9156                 do {
9157                         j = kvm_async_pf_next_probe(j);
9158                         if (vcpu->arch.apf.gfns[j] == ~0)
9159                                 return;
9160                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9161                         /*
9162                          * k lies cyclically in ]i,j]
9163                          * |    i.k.j |
9164                          * |....j i.k.| or  |.k..j i...|
9165                          */
9166                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9167                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9168                 i = j;
9169         }
9170 }
9171
9172 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9173 {
9174
9175         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9176                                       sizeof(val));
9177 }
9178
9179 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9180 {
9181
9182         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9183                                       sizeof(u32));
9184 }
9185
9186 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9187                                      struct kvm_async_pf *work)
9188 {
9189         struct x86_exception fault;
9190
9191         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9192         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9193
9194         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9195             (vcpu->arch.apf.send_user_only &&
9196              kvm_x86_ops->get_cpl(vcpu) == 0))
9197                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9198         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9199                 fault.vector = PF_VECTOR;
9200                 fault.error_code_valid = true;
9201                 fault.error_code = 0;
9202                 fault.nested_page_fault = false;
9203                 fault.address = work->arch.token;
9204                 fault.async_page_fault = true;
9205                 kvm_inject_page_fault(vcpu, &fault);
9206         }
9207 }
9208
9209 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9210                                  struct kvm_async_pf *work)
9211 {
9212         struct x86_exception fault;
9213         u32 val;
9214
9215         if (work->wakeup_all)
9216                 work->arch.token = ~0; /* broadcast wakeup */
9217         else
9218                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9219         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9220
9221         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9222             !apf_get_user(vcpu, &val)) {
9223                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9224                     vcpu->arch.exception.pending &&
9225                     vcpu->arch.exception.nr == PF_VECTOR &&
9226                     !apf_put_user(vcpu, 0)) {
9227                         vcpu->arch.exception.injected = false;
9228                         vcpu->arch.exception.pending = false;
9229                         vcpu->arch.exception.nr = 0;
9230                         vcpu->arch.exception.has_error_code = false;
9231                         vcpu->arch.exception.error_code = 0;
9232                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9233                         fault.vector = PF_VECTOR;
9234                         fault.error_code_valid = true;
9235                         fault.error_code = 0;
9236                         fault.nested_page_fault = false;
9237                         fault.address = work->arch.token;
9238                         fault.async_page_fault = true;
9239                         kvm_inject_page_fault(vcpu, &fault);
9240                 }
9241         }
9242         vcpu->arch.apf.halted = false;
9243         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9244 }
9245
9246 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9247 {
9248         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9249                 return true;
9250         else
9251                 return kvm_can_do_async_pf(vcpu);
9252 }
9253
9254 void kvm_arch_start_assignment(struct kvm *kvm)
9255 {
9256         atomic_inc(&kvm->arch.assigned_device_count);
9257 }
9258 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9259
9260 void kvm_arch_end_assignment(struct kvm *kvm)
9261 {
9262         atomic_dec(&kvm->arch.assigned_device_count);
9263 }
9264 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9265
9266 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9267 {
9268         return atomic_read(&kvm->arch.assigned_device_count);
9269 }
9270 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9271
9272 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9273 {
9274         atomic_inc(&kvm->arch.noncoherent_dma_count);
9275 }
9276 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9277
9278 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9279 {
9280         atomic_dec(&kvm->arch.noncoherent_dma_count);
9281 }
9282 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9283
9284 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9285 {
9286         return atomic_read(&kvm->arch.noncoherent_dma_count);
9287 }
9288 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9289
9290 bool kvm_arch_has_irq_bypass(void)
9291 {
9292         return kvm_x86_ops->update_pi_irte != NULL;
9293 }
9294
9295 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9296                                       struct irq_bypass_producer *prod)
9297 {
9298         struct kvm_kernel_irqfd *irqfd =
9299                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9300
9301         irqfd->producer = prod;
9302
9303         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9304                                            prod->irq, irqfd->gsi, 1);
9305 }
9306
9307 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9308                                       struct irq_bypass_producer *prod)
9309 {
9310         int ret;
9311         struct kvm_kernel_irqfd *irqfd =
9312                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9313
9314         WARN_ON(irqfd->producer != prod);
9315         irqfd->producer = NULL;
9316
9317         /*
9318          * When producer of consumer is unregistered, we change back to
9319          * remapped mode, so we can re-use the current implementation
9320          * when the irq is masked/disabled or the consumer side (KVM
9321          * int this case doesn't want to receive the interrupts.
9322         */
9323         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9324         if (ret)
9325                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9326                        " fails: %d\n", irqfd->consumer.token, ret);
9327 }
9328
9329 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9330                                    uint32_t guest_irq, bool set)
9331 {
9332         if (!kvm_x86_ops->update_pi_irte)
9333                 return -EINVAL;
9334
9335         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9336 }
9337
9338 bool kvm_vector_hashing_enabled(void)
9339 {
9340         return vector_hashing;
9341 }
9342 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9343
9344 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9345 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9346 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9347 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9348 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9349 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9350 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9351 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9352 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9353 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9354 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9355 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9356 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9357 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9358 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9359 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9360 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9361 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9362 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);