2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/pci.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/intel-iommu.h>
40 #include <asm/uaccess.h>
44 #define MAX_IO_MSRS 256
45 #define CR0_RESERVED_BITS \
46 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
47 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
48 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
49 #define CR4_RESERVED_BITS \
50 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
51 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
52 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
53 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
55 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
57 * - enable syscall per default because its emulated by KVM
58 * - enable LME and LMA per default on 64 bit KVM
61 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
66 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
67 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
69 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
70 struct kvm_cpuid_entry2 __user *entries);
72 struct kvm_x86_ops *kvm_x86_ops;
73 EXPORT_SYMBOL_GPL(kvm_x86_ops);
75 struct kvm_stats_debugfs_item debugfs_entries[] = {
76 { "pf_fixed", VCPU_STAT(pf_fixed) },
77 { "pf_guest", VCPU_STAT(pf_guest) },
78 { "tlb_flush", VCPU_STAT(tlb_flush) },
79 { "invlpg", VCPU_STAT(invlpg) },
80 { "exits", VCPU_STAT(exits) },
81 { "io_exits", VCPU_STAT(io_exits) },
82 { "mmio_exits", VCPU_STAT(mmio_exits) },
83 { "signal_exits", VCPU_STAT(signal_exits) },
84 { "irq_window", VCPU_STAT(irq_window_exits) },
85 { "nmi_window", VCPU_STAT(nmi_window_exits) },
86 { "halt_exits", VCPU_STAT(halt_exits) },
87 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
88 { "hypercalls", VCPU_STAT(hypercalls) },
89 { "request_irq", VCPU_STAT(request_irq_exits) },
90 { "irq_exits", VCPU_STAT(irq_exits) },
91 { "host_state_reload", VCPU_STAT(host_state_reload) },
92 { "efer_reload", VCPU_STAT(efer_reload) },
93 { "fpu_reload", VCPU_STAT(fpu_reload) },
94 { "insn_emulation", VCPU_STAT(insn_emulation) },
95 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
96 { "irq_injections", VCPU_STAT(irq_injections) },
97 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
98 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
99 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
100 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
101 { "mmu_flooded", VM_STAT(mmu_flooded) },
102 { "mmu_recycled", VM_STAT(mmu_recycled) },
103 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
104 { "mmu_unsync", VM_STAT(mmu_unsync) },
105 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
106 { "largepages", VM_STAT(lpages) },
110 static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
113 struct list_head *ptr;
114 struct kvm_assigned_dev_kernel *match;
116 list_for_each(ptr, head) {
117 match = list_entry(ptr, struct kvm_assigned_dev_kernel, list);
118 if (match->assigned_dev_id == assigned_dev_id)
124 static void kvm_assigned_dev_interrupt_work_handler(struct work_struct *work)
126 struct kvm_assigned_dev_kernel *assigned_dev;
128 assigned_dev = container_of(work, struct kvm_assigned_dev_kernel,
131 /* This is taken to safely inject irq inside the guest. When
132 * the interrupt injection (or the ioapic code) uses a
133 * finer-grained lock, update this
135 mutex_lock(&assigned_dev->kvm->lock);
136 kvm_set_irq(assigned_dev->kvm,
137 assigned_dev->guest_irq, 1);
138 mutex_unlock(&assigned_dev->kvm->lock);
139 kvm_put_kvm(assigned_dev->kvm);
142 /* FIXME: Implement the OR logic needed to make shared interrupts on
143 * this line behave properly
145 static irqreturn_t kvm_assigned_dev_intr(int irq, void *dev_id)
147 struct kvm_assigned_dev_kernel *assigned_dev =
148 (struct kvm_assigned_dev_kernel *) dev_id;
150 kvm_get_kvm(assigned_dev->kvm);
151 schedule_work(&assigned_dev->interrupt_work);
152 disable_irq_nosync(irq);
156 /* Ack the irq line for an assigned device */
157 static void kvm_assigned_dev_ack_irq(struct kvm_irq_ack_notifier *kian)
159 struct kvm_assigned_dev_kernel *dev;
164 dev = container_of(kian, struct kvm_assigned_dev_kernel,
166 kvm_set_irq(dev->kvm, dev->guest_irq, 0);
167 enable_irq(dev->host_irq);
170 static void kvm_free_assigned_device(struct kvm *kvm,
171 struct kvm_assigned_dev_kernel
174 if (irqchip_in_kernel(kvm) && assigned_dev->irq_requested)
175 free_irq(assigned_dev->host_irq, (void *)assigned_dev);
177 kvm_unregister_irq_ack_notifier(kvm, &assigned_dev->ack_notifier);
179 if (cancel_work_sync(&assigned_dev->interrupt_work))
180 /* We had pending work. That means we will have to take
181 * care of kvm_put_kvm.
185 pci_release_regions(assigned_dev->dev);
186 pci_disable_device(assigned_dev->dev);
187 pci_dev_put(assigned_dev->dev);
189 list_del(&assigned_dev->list);
193 static void kvm_free_all_assigned_devices(struct kvm *kvm)
195 struct list_head *ptr, *ptr2;
196 struct kvm_assigned_dev_kernel *assigned_dev;
198 list_for_each_safe(ptr, ptr2, &kvm->arch.assigned_dev_head) {
199 assigned_dev = list_entry(ptr,
200 struct kvm_assigned_dev_kernel,
203 kvm_free_assigned_device(kvm, assigned_dev);
207 static int kvm_vm_ioctl_assign_irq(struct kvm *kvm,
208 struct kvm_assigned_irq
212 struct kvm_assigned_dev_kernel *match;
214 mutex_lock(&kvm->lock);
216 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
217 assigned_irq->assigned_dev_id);
219 mutex_unlock(&kvm->lock);
223 if (match->irq_requested) {
224 match->guest_irq = assigned_irq->guest_irq;
225 match->ack_notifier.gsi = assigned_irq->guest_irq;
226 mutex_unlock(&kvm->lock);
230 INIT_WORK(&match->interrupt_work,
231 kvm_assigned_dev_interrupt_work_handler);
233 if (irqchip_in_kernel(kvm)) {
234 if (!capable(CAP_SYS_RAWIO)) {
239 if (assigned_irq->host_irq)
240 match->host_irq = assigned_irq->host_irq;
242 match->host_irq = match->dev->irq;
243 match->guest_irq = assigned_irq->guest_irq;
244 match->ack_notifier.gsi = assigned_irq->guest_irq;
245 match->ack_notifier.irq_acked = kvm_assigned_dev_ack_irq;
246 kvm_register_irq_ack_notifier(kvm, &match->ack_notifier);
248 /* Even though this is PCI, we don't want to use shared
249 * interrupts. Sharing host devices with guest-assigned devices
250 * on the same interrupt line is not a happy situation: there
251 * are going to be long delays in accepting, acking, etc.
253 if (request_irq(match->host_irq, kvm_assigned_dev_intr, 0,
254 "kvm_assigned_device", (void *)match)) {
260 match->irq_requested = true;
261 mutex_unlock(&kvm->lock);
264 mutex_unlock(&kvm->lock);
265 kvm_free_assigned_device(kvm, match);
269 static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
270 struct kvm_assigned_pci_dev *assigned_dev)
273 struct kvm_assigned_dev_kernel *match;
276 mutex_lock(&kvm->lock);
278 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
279 assigned_dev->assigned_dev_id);
281 /* device already assigned */
286 match = kzalloc(sizeof(struct kvm_assigned_dev_kernel), GFP_KERNEL);
288 printk(KERN_INFO "%s: Couldn't allocate memory\n",
293 dev = pci_get_bus_and_slot(assigned_dev->busnr,
294 assigned_dev->devfn);
296 printk(KERN_INFO "%s: host device not found\n", __func__);
300 if (pci_enable_device(dev)) {
301 printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
305 r = pci_request_regions(dev, "kvm_assigned_device");
307 printk(KERN_INFO "%s: Could not get access to device regions\n",
311 match->assigned_dev_id = assigned_dev->assigned_dev_id;
312 match->host_busnr = assigned_dev->busnr;
313 match->host_devfn = assigned_dev->devfn;
318 list_add(&match->list, &kvm->arch.assigned_dev_head);
320 if (assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU) {
321 r = kvm_iommu_map_guest(kvm, match);
327 mutex_unlock(&kvm->lock);
330 list_del(&match->list);
331 pci_release_regions(dev);
333 pci_disable_device(dev);
338 mutex_unlock(&kvm->lock);
342 unsigned long segment_base(u16 selector)
344 struct descriptor_table gdt;
345 struct desc_struct *d;
346 unsigned long table_base;
352 asm("sgdt %0" : "=m"(gdt));
353 table_base = gdt.base;
355 if (selector & 4) { /* from ldt */
358 asm("sldt %0" : "=g"(ldt_selector));
359 table_base = segment_base(ldt_selector);
361 d = (struct desc_struct *)(table_base + (selector & ~7));
362 v = d->base0 | ((unsigned long)d->base1 << 16) |
363 ((unsigned long)d->base2 << 24);
365 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
366 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
370 EXPORT_SYMBOL_GPL(segment_base);
372 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
374 if (irqchip_in_kernel(vcpu->kvm))
375 return vcpu->arch.apic_base;
377 return vcpu->arch.apic_base;
379 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
381 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
383 /* TODO: reserve bits check */
384 if (irqchip_in_kernel(vcpu->kvm))
385 kvm_lapic_set_base(vcpu, data);
387 vcpu->arch.apic_base = data;
389 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
391 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
393 WARN_ON(vcpu->arch.exception.pending);
394 vcpu->arch.exception.pending = true;
395 vcpu->arch.exception.has_error_code = false;
396 vcpu->arch.exception.nr = nr;
398 EXPORT_SYMBOL_GPL(kvm_queue_exception);
400 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
403 ++vcpu->stat.pf_guest;
404 if (vcpu->arch.exception.pending) {
405 if (vcpu->arch.exception.nr == PF_VECTOR) {
406 printk(KERN_DEBUG "kvm: inject_page_fault:"
407 " double fault 0x%lx\n", addr);
408 vcpu->arch.exception.nr = DF_VECTOR;
409 vcpu->arch.exception.error_code = 0;
410 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
411 /* triple fault -> shutdown */
412 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
416 vcpu->arch.cr2 = addr;
417 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
420 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
422 vcpu->arch.nmi_pending = 1;
424 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
426 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
428 WARN_ON(vcpu->arch.exception.pending);
429 vcpu->arch.exception.pending = true;
430 vcpu->arch.exception.has_error_code = true;
431 vcpu->arch.exception.nr = nr;
432 vcpu->arch.exception.error_code = error_code;
434 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
436 static void __queue_exception(struct kvm_vcpu *vcpu)
438 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
439 vcpu->arch.exception.has_error_code,
440 vcpu->arch.exception.error_code);
444 * Load the pae pdptrs. Return true is they are all valid.
446 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
448 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
449 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
452 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
454 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
455 offset * sizeof(u64), sizeof(pdpte));
460 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
461 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
468 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
473 EXPORT_SYMBOL_GPL(load_pdptrs);
475 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
477 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
481 if (is_long_mode(vcpu) || !is_pae(vcpu))
484 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
487 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
493 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
495 if (cr0 & CR0_RESERVED_BITS) {
496 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
497 cr0, vcpu->arch.cr0);
498 kvm_inject_gp(vcpu, 0);
502 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
503 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
504 kvm_inject_gp(vcpu, 0);
508 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
509 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
510 "and a clear PE flag\n");
511 kvm_inject_gp(vcpu, 0);
515 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
517 if ((vcpu->arch.shadow_efer & EFER_LME)) {
521 printk(KERN_DEBUG "set_cr0: #GP, start paging "
522 "in long mode while PAE is disabled\n");
523 kvm_inject_gp(vcpu, 0);
526 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
528 printk(KERN_DEBUG "set_cr0: #GP, start paging "
529 "in long mode while CS.L == 1\n");
530 kvm_inject_gp(vcpu, 0);
536 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
537 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
539 kvm_inject_gp(vcpu, 0);
545 kvm_x86_ops->set_cr0(vcpu, cr0);
546 vcpu->arch.cr0 = cr0;
548 kvm_mmu_reset_context(vcpu);
551 EXPORT_SYMBOL_GPL(kvm_set_cr0);
553 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
555 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
556 KVMTRACE_1D(LMSW, vcpu,
557 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
560 EXPORT_SYMBOL_GPL(kvm_lmsw);
562 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
564 if (cr4 & CR4_RESERVED_BITS) {
565 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
566 kvm_inject_gp(vcpu, 0);
570 if (is_long_mode(vcpu)) {
571 if (!(cr4 & X86_CR4_PAE)) {
572 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
574 kvm_inject_gp(vcpu, 0);
577 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
578 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
579 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
580 kvm_inject_gp(vcpu, 0);
584 if (cr4 & X86_CR4_VMXE) {
585 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
586 kvm_inject_gp(vcpu, 0);
589 kvm_x86_ops->set_cr4(vcpu, cr4);
590 vcpu->arch.cr4 = cr4;
591 kvm_mmu_reset_context(vcpu);
593 EXPORT_SYMBOL_GPL(kvm_set_cr4);
595 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
597 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
598 kvm_mmu_sync_roots(vcpu);
599 kvm_mmu_flush_tlb(vcpu);
603 if (is_long_mode(vcpu)) {
604 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
605 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
606 kvm_inject_gp(vcpu, 0);
611 if (cr3 & CR3_PAE_RESERVED_BITS) {
613 "set_cr3: #GP, reserved bits\n");
614 kvm_inject_gp(vcpu, 0);
617 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
618 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
620 kvm_inject_gp(vcpu, 0);
625 * We don't check reserved bits in nonpae mode, because
626 * this isn't enforced, and VMware depends on this.
631 * Does the new cr3 value map to physical memory? (Note, we
632 * catch an invalid cr3 even in real-mode, because it would
633 * cause trouble later on when we turn on paging anyway.)
635 * A real CPU would silently accept an invalid cr3 and would
636 * attempt to use it - with largely undefined (and often hard
637 * to debug) behavior on the guest side.
639 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
640 kvm_inject_gp(vcpu, 0);
642 vcpu->arch.cr3 = cr3;
643 vcpu->arch.mmu.new_cr3(vcpu);
646 EXPORT_SYMBOL_GPL(kvm_set_cr3);
648 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
650 if (cr8 & CR8_RESERVED_BITS) {
651 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
652 kvm_inject_gp(vcpu, 0);
655 if (irqchip_in_kernel(vcpu->kvm))
656 kvm_lapic_set_tpr(vcpu, cr8);
658 vcpu->arch.cr8 = cr8;
660 EXPORT_SYMBOL_GPL(kvm_set_cr8);
662 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
664 if (irqchip_in_kernel(vcpu->kvm))
665 return kvm_lapic_get_cr8(vcpu);
667 return vcpu->arch.cr8;
669 EXPORT_SYMBOL_GPL(kvm_get_cr8);
672 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
673 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
675 * This list is modified at module load time to reflect the
676 * capabilities of the host cpu.
678 static u32 msrs_to_save[] = {
679 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
682 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
684 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
685 MSR_IA32_PERF_STATUS,
688 static unsigned num_msrs_to_save;
690 static u32 emulated_msrs[] = {
691 MSR_IA32_MISC_ENABLE,
694 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
696 if (efer & efer_reserved_bits) {
697 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
699 kvm_inject_gp(vcpu, 0);
704 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
705 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
706 kvm_inject_gp(vcpu, 0);
710 kvm_x86_ops->set_efer(vcpu, efer);
713 efer |= vcpu->arch.shadow_efer & EFER_LMA;
715 vcpu->arch.shadow_efer = efer;
718 void kvm_enable_efer_bits(u64 mask)
720 efer_reserved_bits &= ~mask;
722 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
726 * Writes msr value into into the appropriate "register".
727 * Returns 0 on success, non-0 otherwise.
728 * Assumes vcpu_load() was already called.
730 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
732 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
736 * Adapt set_msr() to msr_io()'s calling convention
738 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
740 return kvm_set_msr(vcpu, index, *data);
743 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
746 struct pvclock_wall_clock wc;
747 struct timespec now, sys, boot;
754 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
757 * The guest calculates current wall clock time by adding
758 * system time (updated by kvm_write_guest_time below) to the
759 * wall clock specified here. guest system time equals host
760 * system time for us, thus we must fill in host boot time here.
762 now = current_kernel_time();
764 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
766 wc.sec = boot.tv_sec;
767 wc.nsec = boot.tv_nsec;
768 wc.version = version;
770 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
773 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
776 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
778 uint32_t quotient, remainder;
780 /* Don't try to replace with do_div(), this one calculates
781 * "(dividend << 32) / divisor" */
783 : "=a" (quotient), "=d" (remainder)
784 : "0" (0), "1" (dividend), "r" (divisor) );
788 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
790 uint64_t nsecs = 1000000000LL;
795 tps64 = tsc_khz * 1000LL;
796 while (tps64 > nsecs*2) {
801 tps32 = (uint32_t)tps64;
802 while (tps32 <= (uint32_t)nsecs) {
807 hv_clock->tsc_shift = shift;
808 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
810 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
811 __FUNCTION__, tsc_khz, hv_clock->tsc_shift,
812 hv_clock->tsc_to_system_mul);
815 static void kvm_write_guest_time(struct kvm_vcpu *v)
819 struct kvm_vcpu_arch *vcpu = &v->arch;
822 if ((!vcpu->time_page))
825 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
826 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
827 vcpu->hv_clock_tsc_khz = tsc_khz;
830 /* Keep irq disabled to prevent changes to the clock */
831 local_irq_save(flags);
832 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
833 &vcpu->hv_clock.tsc_timestamp);
835 local_irq_restore(flags);
837 /* With all the info we got, fill in the values */
839 vcpu->hv_clock.system_time = ts.tv_nsec +
840 (NSEC_PER_SEC * (u64)ts.tv_sec);
842 * The interface expects us to write an even number signaling that the
843 * update is finished. Since the guest won't see the intermediate
844 * state, we just increase by 2 at the end.
846 vcpu->hv_clock.version += 2;
848 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
850 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
851 sizeof(vcpu->hv_clock));
853 kunmap_atomic(shared_kaddr, KM_USER0);
855 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
858 static bool msr_mtrr_valid(unsigned msr)
861 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
862 case MSR_MTRRfix64K_00000:
863 case MSR_MTRRfix16K_80000:
864 case MSR_MTRRfix16K_A0000:
865 case MSR_MTRRfix4K_C0000:
866 case MSR_MTRRfix4K_C8000:
867 case MSR_MTRRfix4K_D0000:
868 case MSR_MTRRfix4K_D8000:
869 case MSR_MTRRfix4K_E0000:
870 case MSR_MTRRfix4K_E8000:
871 case MSR_MTRRfix4K_F0000:
872 case MSR_MTRRfix4K_F8000:
873 case MSR_MTRRdefType:
874 case MSR_IA32_CR_PAT:
882 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
884 if (!msr_mtrr_valid(msr))
887 vcpu->arch.mtrr[msr - 0x200] = data;
891 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
895 set_efer(vcpu, data);
897 case MSR_IA32_MC0_STATUS:
898 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
901 case MSR_IA32_MCG_STATUS:
902 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
905 case MSR_IA32_MCG_CTL:
906 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
909 case MSR_IA32_DEBUGCTLMSR:
911 /* We support the non-activated case already */
913 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
914 /* Values other than LBR and BTF are vendor-specific,
915 thus reserved and should throw a #GP */
918 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
921 case MSR_IA32_UCODE_REV:
922 case MSR_IA32_UCODE_WRITE:
924 case 0x200 ... 0x2ff:
925 return set_msr_mtrr(vcpu, msr, data);
926 case MSR_IA32_APICBASE:
927 kvm_set_apic_base(vcpu, data);
929 case MSR_IA32_MISC_ENABLE:
930 vcpu->arch.ia32_misc_enable_msr = data;
932 case MSR_KVM_WALL_CLOCK:
933 vcpu->kvm->arch.wall_clock = data;
934 kvm_write_wall_clock(vcpu->kvm, data);
936 case MSR_KVM_SYSTEM_TIME: {
937 if (vcpu->arch.time_page) {
938 kvm_release_page_dirty(vcpu->arch.time_page);
939 vcpu->arch.time_page = NULL;
942 vcpu->arch.time = data;
944 /* we verify if the enable bit is set... */
948 /* ...but clean it before doing the actual write */
949 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
951 vcpu->arch.time_page =
952 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
954 if (is_error_page(vcpu->arch.time_page)) {
955 kvm_release_page_clean(vcpu->arch.time_page);
956 vcpu->arch.time_page = NULL;
959 kvm_write_guest_time(vcpu);
963 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
968 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
972 * Reads an msr value (of 'msr_index') into 'pdata'.
973 * Returns 0 on success, non-0 otherwise.
974 * Assumes vcpu_load() was already called.
976 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
978 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
981 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
983 if (!msr_mtrr_valid(msr))
986 *pdata = vcpu->arch.mtrr[msr - 0x200];
990 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
995 case 0xc0010010: /* SYSCFG */
996 case 0xc0010015: /* HWCR */
997 case MSR_IA32_PLATFORM_ID:
998 case MSR_IA32_P5_MC_ADDR:
999 case MSR_IA32_P5_MC_TYPE:
1000 case MSR_IA32_MC0_CTL:
1001 case MSR_IA32_MCG_STATUS:
1002 case MSR_IA32_MCG_CAP:
1003 case MSR_IA32_MCG_CTL:
1004 case MSR_IA32_MC0_MISC:
1005 case MSR_IA32_MC0_MISC+4:
1006 case MSR_IA32_MC0_MISC+8:
1007 case MSR_IA32_MC0_MISC+12:
1008 case MSR_IA32_MC0_MISC+16:
1009 case MSR_IA32_MC0_MISC+20:
1010 case MSR_IA32_UCODE_REV:
1011 case MSR_IA32_EBL_CR_POWERON:
1012 case MSR_IA32_DEBUGCTLMSR:
1013 case MSR_IA32_LASTBRANCHFROMIP:
1014 case MSR_IA32_LASTBRANCHTOIP:
1015 case MSR_IA32_LASTINTFROMIP:
1016 case MSR_IA32_LASTINTTOIP:
1020 data = 0x500 | KVM_NR_VAR_MTRR;
1022 case 0x200 ... 0x2ff:
1023 return get_msr_mtrr(vcpu, msr, pdata);
1024 case 0xcd: /* fsb frequency */
1027 case MSR_IA32_APICBASE:
1028 data = kvm_get_apic_base(vcpu);
1030 case MSR_IA32_MISC_ENABLE:
1031 data = vcpu->arch.ia32_misc_enable_msr;
1033 case MSR_IA32_PERF_STATUS:
1034 /* TSC increment by tick */
1036 /* CPU multiplier */
1037 data |= (((uint64_t)4ULL) << 40);
1040 data = vcpu->arch.shadow_efer;
1042 case MSR_KVM_WALL_CLOCK:
1043 data = vcpu->kvm->arch.wall_clock;
1045 case MSR_KVM_SYSTEM_TIME:
1046 data = vcpu->arch.time;
1049 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1055 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1058 * Read or write a bunch of msrs. All parameters are kernel addresses.
1060 * @return number of msrs set successfully.
1062 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1063 struct kvm_msr_entry *entries,
1064 int (*do_msr)(struct kvm_vcpu *vcpu,
1065 unsigned index, u64 *data))
1071 down_read(&vcpu->kvm->slots_lock);
1072 for (i = 0; i < msrs->nmsrs; ++i)
1073 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1075 up_read(&vcpu->kvm->slots_lock);
1083 * Read or write a bunch of msrs. Parameters are user addresses.
1085 * @return number of msrs set successfully.
1087 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1088 int (*do_msr)(struct kvm_vcpu *vcpu,
1089 unsigned index, u64 *data),
1092 struct kvm_msrs msrs;
1093 struct kvm_msr_entry *entries;
1098 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1102 if (msrs.nmsrs >= MAX_IO_MSRS)
1106 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1107 entries = vmalloc(size);
1112 if (copy_from_user(entries, user_msrs->entries, size))
1115 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1120 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1131 int kvm_dev_ioctl_check_extension(long ext)
1136 case KVM_CAP_IRQCHIP:
1138 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1139 case KVM_CAP_USER_MEMORY:
1140 case KVM_CAP_SET_TSS_ADDR:
1141 case KVM_CAP_EXT_CPUID:
1142 case KVM_CAP_CLOCKSOURCE:
1144 case KVM_CAP_NOP_IO_DELAY:
1145 case KVM_CAP_MP_STATE:
1146 case KVM_CAP_SYNC_MMU:
1149 case KVM_CAP_COALESCED_MMIO:
1150 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1153 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1155 case KVM_CAP_NR_VCPUS:
1158 case KVM_CAP_NR_MEMSLOTS:
1159 r = KVM_MEMORY_SLOTS;
1161 case KVM_CAP_PV_MMU:
1165 r = intel_iommu_found();
1175 long kvm_arch_dev_ioctl(struct file *filp,
1176 unsigned int ioctl, unsigned long arg)
1178 void __user *argp = (void __user *)arg;
1182 case KVM_GET_MSR_INDEX_LIST: {
1183 struct kvm_msr_list __user *user_msr_list = argp;
1184 struct kvm_msr_list msr_list;
1188 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1191 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1192 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1195 if (n < num_msrs_to_save)
1198 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1199 num_msrs_to_save * sizeof(u32)))
1201 if (copy_to_user(user_msr_list->indices
1202 + num_msrs_to_save * sizeof(u32),
1204 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1209 case KVM_GET_SUPPORTED_CPUID: {
1210 struct kvm_cpuid2 __user *cpuid_arg = argp;
1211 struct kvm_cpuid2 cpuid;
1214 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1216 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1217 cpuid_arg->entries);
1222 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1234 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1236 kvm_x86_ops->vcpu_load(vcpu, cpu);
1237 kvm_write_guest_time(vcpu);
1240 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1242 kvm_x86_ops->vcpu_put(vcpu);
1243 kvm_put_guest_fpu(vcpu);
1246 static int is_efer_nx(void)
1250 rdmsrl(MSR_EFER, efer);
1251 return efer & EFER_NX;
1254 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1257 struct kvm_cpuid_entry2 *e, *entry;
1260 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1261 e = &vcpu->arch.cpuid_entries[i];
1262 if (e->function == 0x80000001) {
1267 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1268 entry->edx &= ~(1 << 20);
1269 printk(KERN_INFO "kvm: guest NX capability removed\n");
1273 /* when an old userspace process fills a new kernel module */
1274 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1275 struct kvm_cpuid *cpuid,
1276 struct kvm_cpuid_entry __user *entries)
1279 struct kvm_cpuid_entry *cpuid_entries;
1282 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1285 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1289 if (copy_from_user(cpuid_entries, entries,
1290 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1292 for (i = 0; i < cpuid->nent; i++) {
1293 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1294 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1295 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1296 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1297 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1298 vcpu->arch.cpuid_entries[i].index = 0;
1299 vcpu->arch.cpuid_entries[i].flags = 0;
1300 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1301 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1302 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1304 vcpu->arch.cpuid_nent = cpuid->nent;
1305 cpuid_fix_nx_cap(vcpu);
1309 vfree(cpuid_entries);
1314 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1315 struct kvm_cpuid2 *cpuid,
1316 struct kvm_cpuid_entry2 __user *entries)
1321 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1324 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1325 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1327 vcpu->arch.cpuid_nent = cpuid->nent;
1334 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1335 struct kvm_cpuid2 *cpuid,
1336 struct kvm_cpuid_entry2 __user *entries)
1341 if (cpuid->nent < vcpu->arch.cpuid_nent)
1344 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1345 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1350 cpuid->nent = vcpu->arch.cpuid_nent;
1354 static inline u32 bit(int bitno)
1356 return 1 << (bitno & 31);
1359 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1362 entry->function = function;
1363 entry->index = index;
1364 cpuid_count(entry->function, entry->index,
1365 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1369 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1370 u32 index, int *nent, int maxnent)
1372 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1373 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1374 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1375 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1376 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1377 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1378 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1379 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1380 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1381 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1382 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1383 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1384 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1385 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1386 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1387 bit(X86_FEATURE_PGE) |
1388 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1389 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1390 bit(X86_FEATURE_SYSCALL) |
1391 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1392 #ifdef CONFIG_X86_64
1393 bit(X86_FEATURE_LM) |
1395 bit(X86_FEATURE_MMXEXT) |
1396 bit(X86_FEATURE_3DNOWEXT) |
1397 bit(X86_FEATURE_3DNOW);
1398 const u32 kvm_supported_word3_x86_features =
1399 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1400 const u32 kvm_supported_word6_x86_features =
1401 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
1403 /* all func 2 cpuid_count() should be called on the same cpu */
1405 do_cpuid_1_ent(entry, function, index);
1410 entry->eax = min(entry->eax, (u32)0xb);
1413 entry->edx &= kvm_supported_word0_x86_features;
1414 entry->ecx &= kvm_supported_word3_x86_features;
1416 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1417 * may return different values. This forces us to get_cpu() before
1418 * issuing the first command, and also to emulate this annoying behavior
1419 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1421 int t, times = entry->eax & 0xff;
1423 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1424 for (t = 1; t < times && *nent < maxnent; ++t) {
1425 do_cpuid_1_ent(&entry[t], function, 0);
1426 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1431 /* function 4 and 0xb have additional index. */
1435 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1436 /* read more entries until cache_type is zero */
1437 for (i = 1; *nent < maxnent; ++i) {
1438 cache_type = entry[i - 1].eax & 0x1f;
1441 do_cpuid_1_ent(&entry[i], function, i);
1443 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1451 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1452 /* read more entries until level_type is zero */
1453 for (i = 1; *nent < maxnent; ++i) {
1454 level_type = entry[i - 1].ecx & 0xff;
1457 do_cpuid_1_ent(&entry[i], function, i);
1459 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1465 entry->eax = min(entry->eax, 0x8000001a);
1468 entry->edx &= kvm_supported_word1_x86_features;
1469 entry->ecx &= kvm_supported_word6_x86_features;
1475 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1476 struct kvm_cpuid_entry2 __user *entries)
1478 struct kvm_cpuid_entry2 *cpuid_entries;
1479 int limit, nent = 0, r = -E2BIG;
1482 if (cpuid->nent < 1)
1485 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1489 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1490 limit = cpuid_entries[0].eax;
1491 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1492 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1493 &nent, cpuid->nent);
1495 if (nent >= cpuid->nent)
1498 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1499 limit = cpuid_entries[nent - 1].eax;
1500 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1501 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1502 &nent, cpuid->nent);
1504 if (copy_to_user(entries, cpuid_entries,
1505 nent * sizeof(struct kvm_cpuid_entry2)))
1511 vfree(cpuid_entries);
1516 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1517 struct kvm_lapic_state *s)
1520 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1526 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1527 struct kvm_lapic_state *s)
1530 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1531 kvm_apic_post_state_restore(vcpu);
1537 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1538 struct kvm_interrupt *irq)
1540 if (irq->irq < 0 || irq->irq >= 256)
1542 if (irqchip_in_kernel(vcpu->kvm))
1546 set_bit(irq->irq, vcpu->arch.irq_pending);
1547 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1554 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1555 struct kvm_tpr_access_ctl *tac)
1559 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1563 long kvm_arch_vcpu_ioctl(struct file *filp,
1564 unsigned int ioctl, unsigned long arg)
1566 struct kvm_vcpu *vcpu = filp->private_data;
1567 void __user *argp = (void __user *)arg;
1569 struct kvm_lapic_state *lapic = NULL;
1572 case KVM_GET_LAPIC: {
1573 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1578 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1582 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1587 case KVM_SET_LAPIC: {
1588 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1593 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1595 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1601 case KVM_INTERRUPT: {
1602 struct kvm_interrupt irq;
1605 if (copy_from_user(&irq, argp, sizeof irq))
1607 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1613 case KVM_SET_CPUID: {
1614 struct kvm_cpuid __user *cpuid_arg = argp;
1615 struct kvm_cpuid cpuid;
1618 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1620 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1625 case KVM_SET_CPUID2: {
1626 struct kvm_cpuid2 __user *cpuid_arg = argp;
1627 struct kvm_cpuid2 cpuid;
1630 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1632 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1633 cpuid_arg->entries);
1638 case KVM_GET_CPUID2: {
1639 struct kvm_cpuid2 __user *cpuid_arg = argp;
1640 struct kvm_cpuid2 cpuid;
1643 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1645 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1646 cpuid_arg->entries);
1650 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1656 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1659 r = msr_io(vcpu, argp, do_set_msr, 0);
1661 case KVM_TPR_ACCESS_REPORTING: {
1662 struct kvm_tpr_access_ctl tac;
1665 if (copy_from_user(&tac, argp, sizeof tac))
1667 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1671 if (copy_to_user(argp, &tac, sizeof tac))
1676 case KVM_SET_VAPIC_ADDR: {
1677 struct kvm_vapic_addr va;
1680 if (!irqchip_in_kernel(vcpu->kvm))
1683 if (copy_from_user(&va, argp, sizeof va))
1686 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1698 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1702 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1704 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1708 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1709 u32 kvm_nr_mmu_pages)
1711 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1714 down_write(&kvm->slots_lock);
1716 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1717 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1719 up_write(&kvm->slots_lock);
1723 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1725 return kvm->arch.n_alloc_mmu_pages;
1728 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1731 struct kvm_mem_alias *alias;
1733 for (i = 0; i < kvm->arch.naliases; ++i) {
1734 alias = &kvm->arch.aliases[i];
1735 if (gfn >= alias->base_gfn
1736 && gfn < alias->base_gfn + alias->npages)
1737 return alias->target_gfn + gfn - alias->base_gfn;
1743 * Set a new alias region. Aliases map a portion of physical memory into
1744 * another portion. This is useful for memory windows, for example the PC
1747 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1748 struct kvm_memory_alias *alias)
1751 struct kvm_mem_alias *p;
1754 /* General sanity checks */
1755 if (alias->memory_size & (PAGE_SIZE - 1))
1757 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1759 if (alias->slot >= KVM_ALIAS_SLOTS)
1761 if (alias->guest_phys_addr + alias->memory_size
1762 < alias->guest_phys_addr)
1764 if (alias->target_phys_addr + alias->memory_size
1765 < alias->target_phys_addr)
1768 down_write(&kvm->slots_lock);
1769 spin_lock(&kvm->mmu_lock);
1771 p = &kvm->arch.aliases[alias->slot];
1772 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1773 p->npages = alias->memory_size >> PAGE_SHIFT;
1774 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1776 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1777 if (kvm->arch.aliases[n - 1].npages)
1779 kvm->arch.naliases = n;
1781 spin_unlock(&kvm->mmu_lock);
1782 kvm_mmu_zap_all(kvm);
1784 up_write(&kvm->slots_lock);
1792 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1797 switch (chip->chip_id) {
1798 case KVM_IRQCHIP_PIC_MASTER:
1799 memcpy(&chip->chip.pic,
1800 &pic_irqchip(kvm)->pics[0],
1801 sizeof(struct kvm_pic_state));
1803 case KVM_IRQCHIP_PIC_SLAVE:
1804 memcpy(&chip->chip.pic,
1805 &pic_irqchip(kvm)->pics[1],
1806 sizeof(struct kvm_pic_state));
1808 case KVM_IRQCHIP_IOAPIC:
1809 memcpy(&chip->chip.ioapic,
1810 ioapic_irqchip(kvm),
1811 sizeof(struct kvm_ioapic_state));
1820 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1825 switch (chip->chip_id) {
1826 case KVM_IRQCHIP_PIC_MASTER:
1827 memcpy(&pic_irqchip(kvm)->pics[0],
1829 sizeof(struct kvm_pic_state));
1831 case KVM_IRQCHIP_PIC_SLAVE:
1832 memcpy(&pic_irqchip(kvm)->pics[1],
1834 sizeof(struct kvm_pic_state));
1836 case KVM_IRQCHIP_IOAPIC:
1837 memcpy(ioapic_irqchip(kvm),
1839 sizeof(struct kvm_ioapic_state));
1845 kvm_pic_update_irq(pic_irqchip(kvm));
1849 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1853 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1857 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1861 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1862 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1867 * Get (and clear) the dirty memory log for a memory slot.
1869 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1870 struct kvm_dirty_log *log)
1874 struct kvm_memory_slot *memslot;
1877 down_write(&kvm->slots_lock);
1879 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1883 /* If nothing is dirty, don't bother messing with page tables. */
1885 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1886 kvm_flush_remote_tlbs(kvm);
1887 memslot = &kvm->memslots[log->slot];
1888 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1889 memset(memslot->dirty_bitmap, 0, n);
1893 up_write(&kvm->slots_lock);
1897 long kvm_arch_vm_ioctl(struct file *filp,
1898 unsigned int ioctl, unsigned long arg)
1900 struct kvm *kvm = filp->private_data;
1901 void __user *argp = (void __user *)arg;
1904 * This union makes it completely explicit to gcc-3.x
1905 * that these two variables' stack usage should be
1906 * combined, not added together.
1909 struct kvm_pit_state ps;
1910 struct kvm_memory_alias alias;
1914 case KVM_SET_TSS_ADDR:
1915 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1919 case KVM_SET_MEMORY_REGION: {
1920 struct kvm_memory_region kvm_mem;
1921 struct kvm_userspace_memory_region kvm_userspace_mem;
1924 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1926 kvm_userspace_mem.slot = kvm_mem.slot;
1927 kvm_userspace_mem.flags = kvm_mem.flags;
1928 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1929 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1930 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1935 case KVM_SET_NR_MMU_PAGES:
1936 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1940 case KVM_GET_NR_MMU_PAGES:
1941 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1943 case KVM_SET_MEMORY_ALIAS:
1945 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1947 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1951 case KVM_CREATE_IRQCHIP:
1953 kvm->arch.vpic = kvm_create_pic(kvm);
1954 if (kvm->arch.vpic) {
1955 r = kvm_ioapic_init(kvm);
1957 kfree(kvm->arch.vpic);
1958 kvm->arch.vpic = NULL;
1964 case KVM_CREATE_PIT:
1966 kvm->arch.vpit = kvm_create_pit(kvm);
1970 case KVM_IRQ_LINE: {
1971 struct kvm_irq_level irq_event;
1974 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1976 if (irqchip_in_kernel(kvm)) {
1977 mutex_lock(&kvm->lock);
1978 kvm_set_irq(kvm, irq_event.irq, irq_event.level);
1979 mutex_unlock(&kvm->lock);
1984 case KVM_GET_IRQCHIP: {
1985 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1986 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1992 if (copy_from_user(chip, argp, sizeof *chip))
1993 goto get_irqchip_out;
1995 if (!irqchip_in_kernel(kvm))
1996 goto get_irqchip_out;
1997 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1999 goto get_irqchip_out;
2001 if (copy_to_user(argp, chip, sizeof *chip))
2002 goto get_irqchip_out;
2010 case KVM_SET_IRQCHIP: {
2011 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2012 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
2018 if (copy_from_user(chip, argp, sizeof *chip))
2019 goto set_irqchip_out;
2021 if (!irqchip_in_kernel(kvm))
2022 goto set_irqchip_out;
2023 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
2025 goto set_irqchip_out;
2033 case KVM_ASSIGN_PCI_DEVICE: {
2034 struct kvm_assigned_pci_dev assigned_dev;
2037 if (copy_from_user(&assigned_dev, argp, sizeof assigned_dev))
2039 r = kvm_vm_ioctl_assign_device(kvm, &assigned_dev);
2044 case KVM_ASSIGN_IRQ: {
2045 struct kvm_assigned_irq assigned_irq;
2048 if (copy_from_user(&assigned_irq, argp, sizeof assigned_irq))
2050 r = kvm_vm_ioctl_assign_irq(kvm, &assigned_irq);
2057 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
2060 if (!kvm->arch.vpit)
2062 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
2066 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
2073 if (copy_from_user(&u.ps, argp, sizeof u.ps))
2076 if (!kvm->arch.vpit)
2078 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
2091 static void kvm_init_msr_list(void)
2096 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2097 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2100 msrs_to_save[j] = msrs_to_save[i];
2103 num_msrs_to_save = j;
2107 * Only apic need an MMIO device hook, so shortcut now..
2109 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2110 gpa_t addr, int len,
2113 struct kvm_io_device *dev;
2115 if (vcpu->arch.apic) {
2116 dev = &vcpu->arch.apic->dev;
2117 if (dev->in_range(dev, addr, len, is_write))
2124 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2125 gpa_t addr, int len,
2128 struct kvm_io_device *dev;
2130 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2132 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2137 int emulator_read_std(unsigned long addr,
2140 struct kvm_vcpu *vcpu)
2143 int r = X86EMUL_CONTINUE;
2146 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2147 unsigned offset = addr & (PAGE_SIZE-1);
2148 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
2151 if (gpa == UNMAPPED_GVA) {
2152 r = X86EMUL_PROPAGATE_FAULT;
2155 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
2157 r = X86EMUL_UNHANDLEABLE;
2168 EXPORT_SYMBOL_GPL(emulator_read_std);
2170 static int emulator_read_emulated(unsigned long addr,
2173 struct kvm_vcpu *vcpu)
2175 struct kvm_io_device *mmio_dev;
2178 if (vcpu->mmio_read_completed) {
2179 memcpy(val, vcpu->mmio_data, bytes);
2180 vcpu->mmio_read_completed = 0;
2181 return X86EMUL_CONTINUE;
2184 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2186 /* For APIC access vmexit */
2187 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2190 if (emulator_read_std(addr, val, bytes, vcpu)
2191 == X86EMUL_CONTINUE)
2192 return X86EMUL_CONTINUE;
2193 if (gpa == UNMAPPED_GVA)
2194 return X86EMUL_PROPAGATE_FAULT;
2198 * Is this MMIO handled locally?
2200 mutex_lock(&vcpu->kvm->lock);
2201 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2203 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2204 mutex_unlock(&vcpu->kvm->lock);
2205 return X86EMUL_CONTINUE;
2207 mutex_unlock(&vcpu->kvm->lock);
2209 vcpu->mmio_needed = 1;
2210 vcpu->mmio_phys_addr = gpa;
2211 vcpu->mmio_size = bytes;
2212 vcpu->mmio_is_write = 0;
2214 return X86EMUL_UNHANDLEABLE;
2217 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2218 const void *val, int bytes)
2222 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2225 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
2229 static int emulator_write_emulated_onepage(unsigned long addr,
2232 struct kvm_vcpu *vcpu)
2234 struct kvm_io_device *mmio_dev;
2237 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2239 if (gpa == UNMAPPED_GVA) {
2240 kvm_inject_page_fault(vcpu, addr, 2);
2241 return X86EMUL_PROPAGATE_FAULT;
2244 /* For APIC access vmexit */
2245 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2248 if (emulator_write_phys(vcpu, gpa, val, bytes))
2249 return X86EMUL_CONTINUE;
2253 * Is this MMIO handled locally?
2255 mutex_lock(&vcpu->kvm->lock);
2256 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2258 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2259 mutex_unlock(&vcpu->kvm->lock);
2260 return X86EMUL_CONTINUE;
2262 mutex_unlock(&vcpu->kvm->lock);
2264 vcpu->mmio_needed = 1;
2265 vcpu->mmio_phys_addr = gpa;
2266 vcpu->mmio_size = bytes;
2267 vcpu->mmio_is_write = 1;
2268 memcpy(vcpu->mmio_data, val, bytes);
2270 return X86EMUL_CONTINUE;
2273 int emulator_write_emulated(unsigned long addr,
2276 struct kvm_vcpu *vcpu)
2278 /* Crossing a page boundary? */
2279 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2282 now = -addr & ~PAGE_MASK;
2283 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2284 if (rc != X86EMUL_CONTINUE)
2290 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2292 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2294 static int emulator_cmpxchg_emulated(unsigned long addr,
2298 struct kvm_vcpu *vcpu)
2300 static int reported;
2304 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2306 #ifndef CONFIG_X86_64
2307 /* guests cmpxchg8b have to be emulated atomically */
2314 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2316 if (gpa == UNMAPPED_GVA ||
2317 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2320 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2325 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2327 kaddr = kmap_atomic(page, KM_USER0);
2328 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2329 kunmap_atomic(kaddr, KM_USER0);
2330 kvm_release_page_dirty(page);
2335 return emulator_write_emulated(addr, new, bytes, vcpu);
2338 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2340 return kvm_x86_ops->get_segment_base(vcpu, seg);
2343 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2345 kvm_mmu_invlpg(vcpu, address);
2346 return X86EMUL_CONTINUE;
2349 int emulate_clts(struct kvm_vcpu *vcpu)
2351 KVMTRACE_0D(CLTS, vcpu, handler);
2352 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2353 return X86EMUL_CONTINUE;
2356 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2358 struct kvm_vcpu *vcpu = ctxt->vcpu;
2362 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2363 return X86EMUL_CONTINUE;
2365 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2366 return X86EMUL_UNHANDLEABLE;
2370 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2372 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2375 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2377 /* FIXME: better handling */
2378 return X86EMUL_UNHANDLEABLE;
2380 return X86EMUL_CONTINUE;
2383 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2386 unsigned long rip = kvm_rip_read(vcpu);
2387 unsigned long rip_linear;
2389 if (!printk_ratelimit())
2392 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2394 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
2396 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2397 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2399 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2401 static struct x86_emulate_ops emulate_ops = {
2402 .read_std = emulator_read_std,
2403 .read_emulated = emulator_read_emulated,
2404 .write_emulated = emulator_write_emulated,
2405 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2408 static void cache_all_regs(struct kvm_vcpu *vcpu)
2410 kvm_register_read(vcpu, VCPU_REGS_RAX);
2411 kvm_register_read(vcpu, VCPU_REGS_RSP);
2412 kvm_register_read(vcpu, VCPU_REGS_RIP);
2413 vcpu->arch.regs_dirty = ~0;
2416 int emulate_instruction(struct kvm_vcpu *vcpu,
2417 struct kvm_run *run,
2423 struct decode_cache *c;
2425 kvm_clear_exception_queue(vcpu);
2426 vcpu->arch.mmio_fault_cr2 = cr2;
2428 * TODO: fix x86_emulate.c to use guest_read/write_register
2429 * instead of direct ->regs accesses, can save hundred cycles
2430 * on Intel for instructions that don't read/change RSP, for
2433 cache_all_regs(vcpu);
2435 vcpu->mmio_is_write = 0;
2436 vcpu->arch.pio.string = 0;
2438 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2440 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2442 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2443 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2444 vcpu->arch.emulate_ctxt.mode =
2445 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2446 ? X86EMUL_MODE_REAL : cs_l
2447 ? X86EMUL_MODE_PROT64 : cs_db
2448 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2450 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2452 /* Reject the instructions other than VMCALL/VMMCALL when
2453 * try to emulate invalid opcode */
2454 c = &vcpu->arch.emulate_ctxt.decode;
2455 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2456 (!(c->twobyte && c->b == 0x01 &&
2457 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2458 c->modrm_mod == 3 && c->modrm_rm == 1)))
2459 return EMULATE_FAIL;
2461 ++vcpu->stat.insn_emulation;
2463 ++vcpu->stat.insn_emulation_fail;
2464 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2465 return EMULATE_DONE;
2466 return EMULATE_FAIL;
2470 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2472 if (vcpu->arch.pio.string)
2473 return EMULATE_DO_MMIO;
2475 if ((r || vcpu->mmio_is_write) && run) {
2476 run->exit_reason = KVM_EXIT_MMIO;
2477 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2478 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2479 run->mmio.len = vcpu->mmio_size;
2480 run->mmio.is_write = vcpu->mmio_is_write;
2484 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2485 return EMULATE_DONE;
2486 if (!vcpu->mmio_needed) {
2487 kvm_report_emulation_failure(vcpu, "mmio");
2488 return EMULATE_FAIL;
2490 return EMULATE_DO_MMIO;
2493 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2495 if (vcpu->mmio_is_write) {
2496 vcpu->mmio_needed = 0;
2497 return EMULATE_DO_MMIO;
2500 return EMULATE_DONE;
2502 EXPORT_SYMBOL_GPL(emulate_instruction);
2504 static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
2508 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
2509 if (vcpu->arch.pio.guest_pages[i]) {
2510 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
2511 vcpu->arch.pio.guest_pages[i] = NULL;
2515 static int pio_copy_data(struct kvm_vcpu *vcpu)
2517 void *p = vcpu->arch.pio_data;
2520 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
2522 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
2525 free_pio_guest_pages(vcpu);
2528 q += vcpu->arch.pio.guest_page_offset;
2529 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2530 if (vcpu->arch.pio.in)
2531 memcpy(q, p, bytes);
2533 memcpy(p, q, bytes);
2534 q -= vcpu->arch.pio.guest_page_offset;
2536 free_pio_guest_pages(vcpu);
2540 int complete_pio(struct kvm_vcpu *vcpu)
2542 struct kvm_pio_request *io = &vcpu->arch.pio;
2549 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2550 memcpy(&val, vcpu->arch.pio_data, io->size);
2551 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2555 r = pio_copy_data(vcpu);
2562 delta *= io->cur_count;
2564 * The size of the register should really depend on
2565 * current address size.
2567 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2569 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2575 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2577 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2579 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2581 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2585 io->count -= io->cur_count;
2591 static void kernel_pio(struct kvm_io_device *pio_dev,
2592 struct kvm_vcpu *vcpu,
2595 /* TODO: String I/O for in kernel device */
2597 mutex_lock(&vcpu->kvm->lock);
2598 if (vcpu->arch.pio.in)
2599 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2600 vcpu->arch.pio.size,
2603 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2604 vcpu->arch.pio.size,
2606 mutex_unlock(&vcpu->kvm->lock);
2609 static void pio_string_write(struct kvm_io_device *pio_dev,
2610 struct kvm_vcpu *vcpu)
2612 struct kvm_pio_request *io = &vcpu->arch.pio;
2613 void *pd = vcpu->arch.pio_data;
2616 mutex_lock(&vcpu->kvm->lock);
2617 for (i = 0; i < io->cur_count; i++) {
2618 kvm_iodevice_write(pio_dev, io->port,
2623 mutex_unlock(&vcpu->kvm->lock);
2626 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2627 gpa_t addr, int len,
2630 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2633 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2634 int size, unsigned port)
2636 struct kvm_io_device *pio_dev;
2639 vcpu->run->exit_reason = KVM_EXIT_IO;
2640 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2641 vcpu->run->io.size = vcpu->arch.pio.size = size;
2642 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2643 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2644 vcpu->run->io.port = vcpu->arch.pio.port = port;
2645 vcpu->arch.pio.in = in;
2646 vcpu->arch.pio.string = 0;
2647 vcpu->arch.pio.down = 0;
2648 vcpu->arch.pio.guest_page_offset = 0;
2649 vcpu->arch.pio.rep = 0;
2651 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2652 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2655 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2658 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2659 memcpy(vcpu->arch.pio_data, &val, 4);
2661 kvm_x86_ops->skip_emulated_instruction(vcpu);
2663 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2665 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2671 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2673 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2674 int size, unsigned long count, int down,
2675 gva_t address, int rep, unsigned port)
2677 unsigned now, in_page;
2681 struct kvm_io_device *pio_dev;
2683 vcpu->run->exit_reason = KVM_EXIT_IO;
2684 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2685 vcpu->run->io.size = vcpu->arch.pio.size = size;
2686 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2687 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2688 vcpu->run->io.port = vcpu->arch.pio.port = port;
2689 vcpu->arch.pio.in = in;
2690 vcpu->arch.pio.string = 1;
2691 vcpu->arch.pio.down = down;
2692 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2693 vcpu->arch.pio.rep = rep;
2695 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2696 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2699 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2703 kvm_x86_ops->skip_emulated_instruction(vcpu);
2708 in_page = PAGE_SIZE - offset_in_page(address);
2710 in_page = offset_in_page(address) + size;
2711 now = min(count, (unsigned long)in_page / size);
2714 * String I/O straddles page boundary. Pin two guest pages
2715 * so that we satisfy atomicity constraints. Do just one
2716 * transaction to avoid complexity.
2723 * String I/O in reverse. Yuck. Kill the guest, fix later.
2725 pr_unimpl(vcpu, "guest string pio down\n");
2726 kvm_inject_gp(vcpu, 0);
2729 vcpu->run->io.count = now;
2730 vcpu->arch.pio.cur_count = now;
2732 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2733 kvm_x86_ops->skip_emulated_instruction(vcpu);
2735 for (i = 0; i < nr_pages; ++i) {
2736 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
2737 vcpu->arch.pio.guest_pages[i] = page;
2739 kvm_inject_gp(vcpu, 0);
2740 free_pio_guest_pages(vcpu);
2745 pio_dev = vcpu_find_pio_dev(vcpu, port,
2746 vcpu->arch.pio.cur_count,
2747 !vcpu->arch.pio.in);
2748 if (!vcpu->arch.pio.in) {
2749 /* string PIO write */
2750 ret = pio_copy_data(vcpu);
2751 if (ret >= 0 && pio_dev) {
2752 pio_string_write(pio_dev, vcpu);
2754 if (vcpu->arch.pio.count == 0)
2758 pr_unimpl(vcpu, "no string pio read support yet, "
2759 "port %x size %d count %ld\n",
2764 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2766 int kvm_arch_init(void *opaque)
2769 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2772 printk(KERN_ERR "kvm: already loaded the other module\n");
2777 if (!ops->cpu_has_kvm_support()) {
2778 printk(KERN_ERR "kvm: no hardware support\n");
2782 if (ops->disabled_by_bios()) {
2783 printk(KERN_ERR "kvm: disabled by bios\n");
2788 r = kvm_mmu_module_init();
2792 kvm_init_msr_list();
2795 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2796 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2797 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2798 PT_DIRTY_MASK, PT64_NX_MASK, 0);
2805 void kvm_arch_exit(void)
2808 kvm_mmu_module_exit();
2811 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2813 ++vcpu->stat.halt_exits;
2814 KVMTRACE_0D(HLT, vcpu, handler);
2815 if (irqchip_in_kernel(vcpu->kvm)) {
2816 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2819 vcpu->run->exit_reason = KVM_EXIT_HLT;
2823 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2825 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2828 if (is_long_mode(vcpu))
2831 return a0 | ((gpa_t)a1 << 32);
2834 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2836 unsigned long nr, a0, a1, a2, a3, ret;
2839 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2840 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2841 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2842 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2843 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2845 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2847 if (!is_long_mode(vcpu)) {
2856 case KVM_HC_VAPIC_POLL_IRQ:
2860 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2866 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2867 ++vcpu->stat.hypercalls;
2870 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2872 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2874 char instruction[3];
2876 unsigned long rip = kvm_rip_read(vcpu);
2880 * Blow out the MMU to ensure that no other VCPU has an active mapping
2881 * to ensure that the updated hypercall appears atomically across all
2884 kvm_mmu_zap_all(vcpu->kvm);
2886 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2887 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2888 != X86EMUL_CONTINUE)
2894 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2896 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2899 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2901 struct descriptor_table dt = { limit, base };
2903 kvm_x86_ops->set_gdt(vcpu, &dt);
2906 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2908 struct descriptor_table dt = { limit, base };
2910 kvm_x86_ops->set_idt(vcpu, &dt);
2913 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2914 unsigned long *rflags)
2916 kvm_lmsw(vcpu, msw);
2917 *rflags = kvm_x86_ops->get_rflags(vcpu);
2920 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2922 unsigned long value;
2924 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2927 value = vcpu->arch.cr0;
2930 value = vcpu->arch.cr2;
2933 value = vcpu->arch.cr3;
2936 value = vcpu->arch.cr4;
2939 value = kvm_get_cr8(vcpu);
2942 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2945 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2946 (u32)((u64)value >> 32), handler);
2951 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2952 unsigned long *rflags)
2954 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2955 (u32)((u64)val >> 32), handler);
2959 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2960 *rflags = kvm_x86_ops->get_rflags(vcpu);
2963 vcpu->arch.cr2 = val;
2966 kvm_set_cr3(vcpu, val);
2969 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2972 kvm_set_cr8(vcpu, val & 0xfUL);
2975 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2979 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2981 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2982 int j, nent = vcpu->arch.cpuid_nent;
2984 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2985 /* when no next entry is found, the current entry[i] is reselected */
2986 for (j = i + 1; j == i; j = (j + 1) % nent) {
2987 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2988 if (ej->function == e->function) {
2989 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2993 return 0; /* silence gcc, even though control never reaches here */
2996 /* find an entry with matching function, matching index (if needed), and that
2997 * should be read next (if it's stateful) */
2998 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2999 u32 function, u32 index)
3001 if (e->function != function)
3003 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3005 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3006 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3011 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3014 u32 function, index;
3015 struct kvm_cpuid_entry2 *e, *best;
3017 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3018 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3019 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3020 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3021 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3022 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3024 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3025 e = &vcpu->arch.cpuid_entries[i];
3026 if (is_matching_cpuid_entry(e, function, index)) {
3027 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3028 move_to_next_stateful_cpuid_entry(vcpu, i);
3033 * Both basic or both extended?
3035 if (((e->function ^ function) & 0x80000000) == 0)
3036 if (!best || e->function > best->function)
3040 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3041 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3042 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3043 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3045 kvm_x86_ops->skip_emulated_instruction(vcpu);
3046 KVMTRACE_5D(CPUID, vcpu, function,
3047 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3048 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3049 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3050 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3052 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3055 * Check if userspace requested an interrupt window, and that the
3056 * interrupt window is open.
3058 * No need to exit to userspace if we already have an interrupt queued.
3060 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3061 struct kvm_run *kvm_run)
3063 return (!vcpu->arch.irq_summary &&
3064 kvm_run->request_interrupt_window &&
3065 vcpu->arch.interrupt_window_open &&
3066 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3069 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3070 struct kvm_run *kvm_run)
3072 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3073 kvm_run->cr8 = kvm_get_cr8(vcpu);
3074 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3075 if (irqchip_in_kernel(vcpu->kvm))
3076 kvm_run->ready_for_interrupt_injection = 1;
3078 kvm_run->ready_for_interrupt_injection =
3079 (vcpu->arch.interrupt_window_open &&
3080 vcpu->arch.irq_summary == 0);
3083 static void vapic_enter(struct kvm_vcpu *vcpu)
3085 struct kvm_lapic *apic = vcpu->arch.apic;
3088 if (!apic || !apic->vapic_addr)
3091 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3093 vcpu->arch.apic->vapic_page = page;
3096 static void vapic_exit(struct kvm_vcpu *vcpu)
3098 struct kvm_lapic *apic = vcpu->arch.apic;
3100 if (!apic || !apic->vapic_addr)
3103 down_read(&vcpu->kvm->slots_lock);
3104 kvm_release_page_dirty(apic->vapic_page);
3105 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3106 up_read(&vcpu->kvm->slots_lock);
3109 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3114 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3115 kvm_mmu_unload(vcpu);
3117 r = kvm_mmu_reload(vcpu);
3121 if (vcpu->requests) {
3122 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3123 __kvm_migrate_timers(vcpu);
3124 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3125 kvm_mmu_sync_roots(vcpu);
3126 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3127 kvm_x86_ops->tlb_flush(vcpu);
3128 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3130 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3134 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3135 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3141 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3142 kvm_inject_pending_timer_irqs(vcpu);
3146 kvm_x86_ops->prepare_guest_switch(vcpu);
3147 kvm_load_guest_fpu(vcpu);
3149 local_irq_disable();
3151 if (vcpu->requests || need_resched() || signal_pending(current)) {
3158 if (vcpu->guest_debug.enabled)
3159 kvm_x86_ops->guest_debug_pre(vcpu);
3161 vcpu->guest_mode = 1;
3163 * Make sure that guest_mode assignment won't happen after
3164 * testing the pending IRQ vector bitmap.
3168 if (vcpu->arch.exception.pending)
3169 __queue_exception(vcpu);
3170 else if (irqchip_in_kernel(vcpu->kvm))
3171 kvm_x86_ops->inject_pending_irq(vcpu);
3173 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3175 kvm_lapic_sync_to_vapic(vcpu);
3177 up_read(&vcpu->kvm->slots_lock);
3182 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3183 kvm_x86_ops->run(vcpu, kvm_run);
3185 vcpu->guest_mode = 0;
3191 * We must have an instruction between local_irq_enable() and
3192 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3193 * the interrupt shadow. The stat.exits increment will do nicely.
3194 * But we need to prevent reordering, hence this barrier():
3202 down_read(&vcpu->kvm->slots_lock);
3205 * Profile KVM exit RIPs:
3207 if (unlikely(prof_on == KVM_PROFILING)) {
3208 unsigned long rip = kvm_rip_read(vcpu);
3209 profile_hit(KVM_PROFILING, (void *)rip);
3212 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3213 vcpu->arch.exception.pending = false;
3215 kvm_lapic_sync_from_vapic(vcpu);
3217 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3222 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3226 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3227 printk("vcpu %d received sipi with vector # %x\n",
3228 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3229 kvm_lapic_reset(vcpu);
3230 r = kvm_x86_ops->vcpu_reset(vcpu);
3233 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3236 down_read(&vcpu->kvm->slots_lock);
3241 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3242 r = vcpu_enter_guest(vcpu, kvm_run);
3244 up_read(&vcpu->kvm->slots_lock);
3245 kvm_vcpu_block(vcpu);
3246 down_read(&vcpu->kvm->slots_lock);
3247 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3248 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
3249 vcpu->arch.mp_state =
3250 KVM_MP_STATE_RUNNABLE;
3251 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
3256 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3258 kvm_run->exit_reason = KVM_EXIT_INTR;
3259 ++vcpu->stat.request_irq_exits;
3261 if (signal_pending(current)) {
3263 kvm_run->exit_reason = KVM_EXIT_INTR;
3264 ++vcpu->stat.signal_exits;
3266 if (need_resched()) {
3267 up_read(&vcpu->kvm->slots_lock);
3269 down_read(&vcpu->kvm->slots_lock);
3274 up_read(&vcpu->kvm->slots_lock);
3275 post_kvm_run_save(vcpu, kvm_run);
3282 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3289 if (vcpu->sigset_active)
3290 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3292 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3293 kvm_vcpu_block(vcpu);
3294 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3299 /* re-sync apic's tpr */
3300 if (!irqchip_in_kernel(vcpu->kvm))
3301 kvm_set_cr8(vcpu, kvm_run->cr8);
3303 if (vcpu->arch.pio.cur_count) {
3304 r = complete_pio(vcpu);
3308 #if CONFIG_HAS_IOMEM
3309 if (vcpu->mmio_needed) {
3310 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3311 vcpu->mmio_read_completed = 1;
3312 vcpu->mmio_needed = 0;
3314 down_read(&vcpu->kvm->slots_lock);
3315 r = emulate_instruction(vcpu, kvm_run,
3316 vcpu->arch.mmio_fault_cr2, 0,
3317 EMULTYPE_NO_DECODE);
3318 up_read(&vcpu->kvm->slots_lock);
3319 if (r == EMULATE_DO_MMIO) {
3321 * Read-modify-write. Back to userspace.
3328 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3329 kvm_register_write(vcpu, VCPU_REGS_RAX,
3330 kvm_run->hypercall.ret);
3332 r = __vcpu_run(vcpu, kvm_run);
3335 if (vcpu->sigset_active)
3336 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3342 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3346 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3347 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3348 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3349 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3350 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3351 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3352 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3353 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3354 #ifdef CONFIG_X86_64
3355 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3356 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3357 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3358 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3359 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3360 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3361 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3362 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3365 regs->rip = kvm_rip_read(vcpu);
3366 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3369 * Don't leak debug flags in case they were set for guest debugging
3371 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
3372 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3379 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3383 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3384 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3385 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3386 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3387 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3388 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3389 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3390 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3391 #ifdef CONFIG_X86_64
3392 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3393 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3394 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3395 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3396 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3397 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3398 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3399 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3403 kvm_rip_write(vcpu, regs->rip);
3404 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3407 vcpu->arch.exception.pending = false;
3414 void kvm_get_segment(struct kvm_vcpu *vcpu,
3415 struct kvm_segment *var, int seg)
3417 kvm_x86_ops->get_segment(vcpu, var, seg);
3420 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3422 struct kvm_segment cs;
3424 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3428 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3430 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3431 struct kvm_sregs *sregs)
3433 struct descriptor_table dt;
3438 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3439 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3440 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3441 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3442 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3443 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3445 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3446 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3448 kvm_x86_ops->get_idt(vcpu, &dt);
3449 sregs->idt.limit = dt.limit;
3450 sregs->idt.base = dt.base;
3451 kvm_x86_ops->get_gdt(vcpu, &dt);
3452 sregs->gdt.limit = dt.limit;
3453 sregs->gdt.base = dt.base;
3455 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3456 sregs->cr0 = vcpu->arch.cr0;
3457 sregs->cr2 = vcpu->arch.cr2;
3458 sregs->cr3 = vcpu->arch.cr3;
3459 sregs->cr4 = vcpu->arch.cr4;
3460 sregs->cr8 = kvm_get_cr8(vcpu);
3461 sregs->efer = vcpu->arch.shadow_efer;
3462 sregs->apic_base = kvm_get_apic_base(vcpu);
3464 if (irqchip_in_kernel(vcpu->kvm)) {
3465 memset(sregs->interrupt_bitmap, 0,
3466 sizeof sregs->interrupt_bitmap);
3467 pending_vec = kvm_x86_ops->get_irq(vcpu);
3468 if (pending_vec >= 0)
3469 set_bit(pending_vec,
3470 (unsigned long *)sregs->interrupt_bitmap);
3472 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3473 sizeof sregs->interrupt_bitmap);
3480 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3481 struct kvm_mp_state *mp_state)
3484 mp_state->mp_state = vcpu->arch.mp_state;
3489 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3490 struct kvm_mp_state *mp_state)
3493 vcpu->arch.mp_state = mp_state->mp_state;
3498 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3499 struct kvm_segment *var, int seg)
3501 kvm_x86_ops->set_segment(vcpu, var, seg);
3504 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3505 struct kvm_segment *kvm_desct)
3507 kvm_desct->base = seg_desc->base0;
3508 kvm_desct->base |= seg_desc->base1 << 16;
3509 kvm_desct->base |= seg_desc->base2 << 24;
3510 kvm_desct->limit = seg_desc->limit0;
3511 kvm_desct->limit |= seg_desc->limit << 16;
3513 kvm_desct->limit <<= 12;
3514 kvm_desct->limit |= 0xfff;
3516 kvm_desct->selector = selector;
3517 kvm_desct->type = seg_desc->type;
3518 kvm_desct->present = seg_desc->p;
3519 kvm_desct->dpl = seg_desc->dpl;
3520 kvm_desct->db = seg_desc->d;
3521 kvm_desct->s = seg_desc->s;
3522 kvm_desct->l = seg_desc->l;
3523 kvm_desct->g = seg_desc->g;
3524 kvm_desct->avl = seg_desc->avl;
3526 kvm_desct->unusable = 1;
3528 kvm_desct->unusable = 0;
3529 kvm_desct->padding = 0;
3532 static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu,
3534 struct descriptor_table *dtable)
3536 if (selector & 1 << 2) {
3537 struct kvm_segment kvm_seg;
3539 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3541 if (kvm_seg.unusable)
3544 dtable->limit = kvm_seg.limit;
3545 dtable->base = kvm_seg.base;
3548 kvm_x86_ops->get_gdt(vcpu, dtable);
3551 /* allowed just for 8 bytes segments */
3552 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3553 struct desc_struct *seg_desc)
3556 struct descriptor_table dtable;
3557 u16 index = selector >> 3;
3559 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3561 if (dtable.limit < index * 8 + 7) {
3562 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3565 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3567 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3570 /* allowed just for 8 bytes segments */
3571 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3572 struct desc_struct *seg_desc)
3575 struct descriptor_table dtable;
3576 u16 index = selector >> 3;
3578 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3580 if (dtable.limit < index * 8 + 7)
3582 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3584 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3587 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3588 struct desc_struct *seg_desc)
3592 base_addr = seg_desc->base0;
3593 base_addr |= (seg_desc->base1 << 16);
3594 base_addr |= (seg_desc->base2 << 24);
3596 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3599 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3601 struct kvm_segment kvm_seg;
3603 kvm_get_segment(vcpu, &kvm_seg, seg);
3604 return kvm_seg.selector;
3607 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3609 struct kvm_segment *kvm_seg)
3611 struct desc_struct seg_desc;
3613 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3615 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3619 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3621 struct kvm_segment segvar = {
3622 .base = selector << 4,
3624 .selector = selector,
3635 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3639 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3640 int type_bits, int seg)
3642 struct kvm_segment kvm_seg;
3644 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3645 return kvm_load_realmode_segment(vcpu, selector, seg);
3646 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3648 kvm_seg.type |= type_bits;
3650 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3651 seg != VCPU_SREG_LDTR)
3653 kvm_seg.unusable = 1;
3655 kvm_set_segment(vcpu, &kvm_seg, seg);
3659 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3660 struct tss_segment_32 *tss)
3662 tss->cr3 = vcpu->arch.cr3;
3663 tss->eip = kvm_rip_read(vcpu);
3664 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3665 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3666 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3667 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3668 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3669 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3670 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3671 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3672 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3673 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3674 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3675 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3676 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3677 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3678 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3679 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3680 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3683 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3684 struct tss_segment_32 *tss)
3686 kvm_set_cr3(vcpu, tss->cr3);
3688 kvm_rip_write(vcpu, tss->eip);
3689 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3691 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3692 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3693 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3694 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3695 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3696 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3697 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3698 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3700 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3703 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3706 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3709 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3712 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3715 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3718 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3723 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3724 struct tss_segment_16 *tss)
3726 tss->ip = kvm_rip_read(vcpu);
3727 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3728 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3729 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3730 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3731 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3732 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3733 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3734 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3735 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3737 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3738 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3739 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3740 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3741 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3742 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3745 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3746 struct tss_segment_16 *tss)
3748 kvm_rip_write(vcpu, tss->ip);
3749 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3750 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3751 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3752 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3753 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3754 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3755 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3756 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3757 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3759 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3762 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3765 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3768 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3771 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3776 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3778 struct desc_struct *nseg_desc)
3780 struct tss_segment_16 tss_segment_16;
3783 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3784 sizeof tss_segment_16))
3787 save_state_to_tss16(vcpu, &tss_segment_16);
3789 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3790 sizeof tss_segment_16))
3793 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3794 &tss_segment_16, sizeof tss_segment_16))
3797 if (load_state_from_tss16(vcpu, &tss_segment_16))
3805 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3807 struct desc_struct *nseg_desc)
3809 struct tss_segment_32 tss_segment_32;
3812 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3813 sizeof tss_segment_32))
3816 save_state_to_tss32(vcpu, &tss_segment_32);
3818 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3819 sizeof tss_segment_32))
3822 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3823 &tss_segment_32, sizeof tss_segment_32))
3826 if (load_state_from_tss32(vcpu, &tss_segment_32))
3834 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3836 struct kvm_segment tr_seg;
3837 struct desc_struct cseg_desc;
3838 struct desc_struct nseg_desc;
3840 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3841 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3843 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3845 /* FIXME: Handle errors. Failure to read either TSS or their
3846 * descriptors should generate a pagefault.
3848 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3851 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3854 if (reason != TASK_SWITCH_IRET) {
3857 cpl = kvm_x86_ops->get_cpl(vcpu);
3858 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3859 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3864 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3865 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3869 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3870 cseg_desc.type &= ~(1 << 1); //clear the B flag
3871 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3874 if (reason == TASK_SWITCH_IRET) {
3875 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3876 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3879 kvm_x86_ops->skip_emulated_instruction(vcpu);
3881 if (nseg_desc.type & 8)
3882 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3885 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3888 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3889 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3890 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3893 if (reason != TASK_SWITCH_IRET) {
3894 nseg_desc.type |= (1 << 1);
3895 save_guest_segment_descriptor(vcpu, tss_selector,
3899 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3900 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3902 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3906 EXPORT_SYMBOL_GPL(kvm_task_switch);
3908 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3909 struct kvm_sregs *sregs)
3911 int mmu_reset_needed = 0;
3912 int i, pending_vec, max_bits;
3913 struct descriptor_table dt;
3917 dt.limit = sregs->idt.limit;
3918 dt.base = sregs->idt.base;
3919 kvm_x86_ops->set_idt(vcpu, &dt);
3920 dt.limit = sregs->gdt.limit;
3921 dt.base = sregs->gdt.base;
3922 kvm_x86_ops->set_gdt(vcpu, &dt);
3924 vcpu->arch.cr2 = sregs->cr2;
3925 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3926 vcpu->arch.cr3 = sregs->cr3;
3928 kvm_set_cr8(vcpu, sregs->cr8);
3930 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3931 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3932 kvm_set_apic_base(vcpu, sregs->apic_base);
3934 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3936 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3937 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3938 vcpu->arch.cr0 = sregs->cr0;
3940 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3941 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3942 if (!is_long_mode(vcpu) && is_pae(vcpu))
3943 load_pdptrs(vcpu, vcpu->arch.cr3);
3945 if (mmu_reset_needed)
3946 kvm_mmu_reset_context(vcpu);
3948 if (!irqchip_in_kernel(vcpu->kvm)) {
3949 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3950 sizeof vcpu->arch.irq_pending);
3951 vcpu->arch.irq_summary = 0;
3952 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3953 if (vcpu->arch.irq_pending[i])
3954 __set_bit(i, &vcpu->arch.irq_summary);
3956 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3957 pending_vec = find_first_bit(
3958 (const unsigned long *)sregs->interrupt_bitmap,
3960 /* Only pending external irq is handled here */
3961 if (pending_vec < max_bits) {
3962 kvm_x86_ops->set_irq(vcpu, pending_vec);
3963 pr_debug("Set back pending irq %d\n",
3968 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3969 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3970 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3971 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3972 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3973 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3975 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3976 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3978 /* Older userspace won't unhalt the vcpu on reset. */
3979 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
3980 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
3981 !(vcpu->arch.cr0 & X86_CR0_PE))
3982 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3989 int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
3990 struct kvm_debug_guest *dbg)
3996 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4004 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4005 * we have asm/x86/processor.h
4016 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4017 #ifdef CONFIG_X86_64
4018 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4020 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4025 * Translate a guest virtual address to a guest physical address.
4027 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4028 struct kvm_translation *tr)
4030 unsigned long vaddr = tr->linear_address;
4034 down_read(&vcpu->kvm->slots_lock);
4035 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4036 up_read(&vcpu->kvm->slots_lock);
4037 tr->physical_address = gpa;
4038 tr->valid = gpa != UNMAPPED_GVA;
4046 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4048 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4052 memcpy(fpu->fpr, fxsave->st_space, 128);
4053 fpu->fcw = fxsave->cwd;
4054 fpu->fsw = fxsave->swd;
4055 fpu->ftwx = fxsave->twd;
4056 fpu->last_opcode = fxsave->fop;
4057 fpu->last_ip = fxsave->rip;
4058 fpu->last_dp = fxsave->rdp;
4059 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4066 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4068 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4072 memcpy(fxsave->st_space, fpu->fpr, 128);
4073 fxsave->cwd = fpu->fcw;
4074 fxsave->swd = fpu->fsw;
4075 fxsave->twd = fpu->ftwx;
4076 fxsave->fop = fpu->last_opcode;
4077 fxsave->rip = fpu->last_ip;
4078 fxsave->rdp = fpu->last_dp;
4079 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4086 void fx_init(struct kvm_vcpu *vcpu)
4088 unsigned after_mxcsr_mask;
4091 * Touch the fpu the first time in non atomic context as if
4092 * this is the first fpu instruction the exception handler
4093 * will fire before the instruction returns and it'll have to
4094 * allocate ram with GFP_KERNEL.
4097 kvm_fx_save(&vcpu->arch.host_fx_image);
4099 /* Initialize guest FPU by resetting ours and saving into guest's */
4101 kvm_fx_save(&vcpu->arch.host_fx_image);
4103 kvm_fx_save(&vcpu->arch.guest_fx_image);
4104 kvm_fx_restore(&vcpu->arch.host_fx_image);
4107 vcpu->arch.cr0 |= X86_CR0_ET;
4108 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4109 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4110 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4111 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4113 EXPORT_SYMBOL_GPL(fx_init);
4115 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4117 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4120 vcpu->guest_fpu_loaded = 1;
4121 kvm_fx_save(&vcpu->arch.host_fx_image);
4122 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4124 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4126 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4128 if (!vcpu->guest_fpu_loaded)
4131 vcpu->guest_fpu_loaded = 0;
4132 kvm_fx_save(&vcpu->arch.guest_fx_image);
4133 kvm_fx_restore(&vcpu->arch.host_fx_image);
4134 ++vcpu->stat.fpu_reload;
4136 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4138 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4140 kvm_x86_ops->vcpu_free(vcpu);
4143 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4146 return kvm_x86_ops->vcpu_create(kvm, id);
4149 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4153 /* We do fxsave: this must be aligned. */
4154 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4157 r = kvm_arch_vcpu_reset(vcpu);
4159 r = kvm_mmu_setup(vcpu);
4166 kvm_x86_ops->vcpu_free(vcpu);
4170 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4173 kvm_mmu_unload(vcpu);
4176 kvm_x86_ops->vcpu_free(vcpu);
4179 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4181 return kvm_x86_ops->vcpu_reset(vcpu);
4184 void kvm_arch_hardware_enable(void *garbage)
4186 kvm_x86_ops->hardware_enable(garbage);
4189 void kvm_arch_hardware_disable(void *garbage)
4191 kvm_x86_ops->hardware_disable(garbage);
4194 int kvm_arch_hardware_setup(void)
4196 return kvm_x86_ops->hardware_setup();
4199 void kvm_arch_hardware_unsetup(void)
4201 kvm_x86_ops->hardware_unsetup();
4204 void kvm_arch_check_processor_compat(void *rtn)
4206 kvm_x86_ops->check_processor_compatibility(rtn);
4209 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4215 BUG_ON(vcpu->kvm == NULL);
4218 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4219 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4220 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4222 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4224 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4229 vcpu->arch.pio_data = page_address(page);
4231 r = kvm_mmu_create(vcpu);
4233 goto fail_free_pio_data;
4235 if (irqchip_in_kernel(kvm)) {
4236 r = kvm_create_lapic(vcpu);
4238 goto fail_mmu_destroy;
4244 kvm_mmu_destroy(vcpu);
4246 free_page((unsigned long)vcpu->arch.pio_data);
4251 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4253 kvm_free_lapic(vcpu);
4254 down_read(&vcpu->kvm->slots_lock);
4255 kvm_mmu_destroy(vcpu);
4256 up_read(&vcpu->kvm->slots_lock);
4257 free_page((unsigned long)vcpu->arch.pio_data);
4260 struct kvm *kvm_arch_create_vm(void)
4262 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4265 return ERR_PTR(-ENOMEM);
4267 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4268 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4273 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4276 kvm_mmu_unload(vcpu);
4280 static void kvm_free_vcpus(struct kvm *kvm)
4285 * Unpin any mmu pages first.
4287 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4289 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4290 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4291 if (kvm->vcpus[i]) {
4292 kvm_arch_vcpu_free(kvm->vcpus[i]);
4293 kvm->vcpus[i] = NULL;
4299 void kvm_arch_destroy_vm(struct kvm *kvm)
4301 kvm_iommu_unmap_guest(kvm);
4302 kvm_free_all_assigned_devices(kvm);
4304 kfree(kvm->arch.vpic);
4305 kfree(kvm->arch.vioapic);
4306 kvm_free_vcpus(kvm);
4307 kvm_free_physmem(kvm);
4308 if (kvm->arch.apic_access_page)
4309 put_page(kvm->arch.apic_access_page);
4310 if (kvm->arch.ept_identity_pagetable)
4311 put_page(kvm->arch.ept_identity_pagetable);
4315 int kvm_arch_set_memory_region(struct kvm *kvm,
4316 struct kvm_userspace_memory_region *mem,
4317 struct kvm_memory_slot old,
4320 int npages = mem->memory_size >> PAGE_SHIFT;
4321 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4323 /*To keep backward compatibility with older userspace,
4324 *x86 needs to hanlde !user_alloc case.
4327 if (npages && !old.rmap) {
4328 unsigned long userspace_addr;
4330 down_write(¤t->mm->mmap_sem);
4331 userspace_addr = do_mmap(NULL, 0,
4333 PROT_READ | PROT_WRITE,
4334 MAP_PRIVATE | MAP_ANONYMOUS,
4336 up_write(¤t->mm->mmap_sem);
4338 if (IS_ERR((void *)userspace_addr))
4339 return PTR_ERR((void *)userspace_addr);
4341 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4342 spin_lock(&kvm->mmu_lock);
4343 memslot->userspace_addr = userspace_addr;
4344 spin_unlock(&kvm->mmu_lock);
4346 if (!old.user_alloc && old.rmap) {
4349 down_write(¤t->mm->mmap_sem);
4350 ret = do_munmap(current->mm, old.userspace_addr,
4351 old.npages * PAGE_SIZE);
4352 up_write(¤t->mm->mmap_sem);
4355 "kvm_vm_ioctl_set_memory_region: "
4356 "failed to munmap memory\n");
4361 if (!kvm->arch.n_requested_mmu_pages) {
4362 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4363 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4366 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4367 kvm_flush_remote_tlbs(kvm);
4372 void kvm_arch_flush_shadow(struct kvm *kvm)
4374 kvm_mmu_zap_all(kvm);
4377 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4379 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4380 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED;
4383 static void vcpu_kick_intr(void *info)
4386 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4387 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4391 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4393 int ipi_pcpu = vcpu->cpu;
4394 int cpu = get_cpu();
4396 if (waitqueue_active(&vcpu->wq)) {
4397 wake_up_interruptible(&vcpu->wq);
4398 ++vcpu->stat.halt_wakeup;
4401 * We may be called synchronously with irqs disabled in guest mode,
4402 * So need not to call smp_call_function_single() in that case.
4404 if (vcpu->guest_mode && vcpu->cpu != cpu)
4405 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);