1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
61 #include <linux/suspend.h>
63 #include <trace/events/kvm.h>
65 #include <asm/debugreg.h>
70 #include <linux/kernel_stat.h>
71 #include <asm/fpu/api.h>
72 #include <asm/fpu/xcr.h>
73 #include <asm/fpu/xstate.h>
74 #include <asm/pvclock.h>
75 #include <asm/div64.h>
76 #include <asm/irq_remapping.h>
77 #include <asm/mshyperv.h>
78 #include <asm/hypervisor.h>
79 #include <asm/tlbflush.h>
80 #include <asm/intel_pt.h>
81 #include <asm/emulate_prefix.h>
83 #include <clocksource/hyperv_timer.h>
85 #define CREATE_TRACE_POINTS
88 #define MAX_IO_MSRS 256
89 #define KVM_MAX_MCE_BANKS 32
90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
93 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
95 #define emul_to_vcpu(ctxt) \
96 ((struct kvm_vcpu *)(ctxt)->vcpu)
99 * - enable syscall per default because its emulated by KVM
100 * - enable LME and LMA per default on 64 bit KVM
104 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
106 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
109 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
111 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
113 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
115 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
116 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
118 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
119 static void process_nmi(struct kvm_vcpu *vcpu);
120 static void process_smi(struct kvm_vcpu *vcpu);
121 static void enter_smm(struct kvm_vcpu *vcpu);
122 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
123 static void store_regs(struct kvm_vcpu *vcpu);
124 static int sync_regs(struct kvm_vcpu *vcpu);
125 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
127 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
128 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
130 struct kvm_x86_ops kvm_x86_ops __read_mostly;
132 #define KVM_X86_OP(func) \
133 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
134 *(((struct kvm_x86_ops *)0)->func));
135 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
136 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
137 #include <asm/kvm-x86-ops.h>
138 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
139 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
141 static bool __read_mostly ignore_msrs = 0;
142 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
144 bool __read_mostly report_ignored_msrs = true;
145 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
146 EXPORT_SYMBOL_GPL(report_ignored_msrs);
148 unsigned int min_timer_period_us = 200;
149 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
151 static bool __read_mostly kvmclock_periodic_sync = true;
152 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
154 bool __read_mostly kvm_has_tsc_control;
155 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
156 u32 __read_mostly kvm_max_guest_tsc_khz;
157 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
158 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits;
159 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
160 u64 __read_mostly kvm_max_tsc_scaling_ratio;
161 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
162 u64 __read_mostly kvm_default_tsc_scaling_ratio;
163 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
164 bool __read_mostly kvm_has_bus_lock_exit;
165 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
167 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
168 static u32 __read_mostly tsc_tolerance_ppm = 250;
169 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
172 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
173 * adaptive tuning starting from default advancement of 1000ns. '0' disables
174 * advancement entirely. Any other value is used as-is and disables adaptive
175 * tuning, i.e. allows privileged userspace to set an exact advancement time.
177 static int __read_mostly lapic_timer_advance_ns = -1;
178 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
180 static bool __read_mostly vector_hashing = true;
181 module_param(vector_hashing, bool, S_IRUGO);
183 bool __read_mostly enable_vmware_backdoor = false;
184 module_param(enable_vmware_backdoor, bool, S_IRUGO);
185 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
187 static bool __read_mostly force_emulation_prefix = false;
188 module_param(force_emulation_prefix, bool, S_IRUGO);
190 int __read_mostly pi_inject_timer = -1;
191 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
193 /* Enable/disable PMU virtualization */
194 bool __read_mostly enable_pmu = true;
195 EXPORT_SYMBOL_GPL(enable_pmu);
196 module_param(enable_pmu, bool, 0444);
198 bool __read_mostly eager_page_split = true;
199 module_param(eager_page_split, bool, 0644);
202 * Restoring the host value for MSRs that are only consumed when running in
203 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
204 * returns to userspace, i.e. the kernel can run with the guest's value.
206 #define KVM_MAX_NR_USER_RETURN_MSRS 16
208 struct kvm_user_return_msrs {
209 struct user_return_notifier urn;
211 struct kvm_user_return_msr_values {
214 } values[KVM_MAX_NR_USER_RETURN_MSRS];
217 u32 __read_mostly kvm_nr_uret_msrs;
218 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
219 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
220 static struct kvm_user_return_msrs __percpu *user_return_msrs;
222 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
223 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
224 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
225 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
227 u64 __read_mostly host_efer;
228 EXPORT_SYMBOL_GPL(host_efer);
230 bool __read_mostly allow_smaller_maxphyaddr = 0;
231 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
233 bool __read_mostly enable_apicv = true;
234 EXPORT_SYMBOL_GPL(enable_apicv);
236 u64 __read_mostly host_xss;
237 EXPORT_SYMBOL_GPL(host_xss);
238 u64 __read_mostly supported_xss;
239 EXPORT_SYMBOL_GPL(supported_xss);
241 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
242 KVM_GENERIC_VM_STATS(),
243 STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
244 STATS_DESC_COUNTER(VM, mmu_pte_write),
245 STATS_DESC_COUNTER(VM, mmu_pde_zapped),
246 STATS_DESC_COUNTER(VM, mmu_flooded),
247 STATS_DESC_COUNTER(VM, mmu_recycled),
248 STATS_DESC_COUNTER(VM, mmu_cache_miss),
249 STATS_DESC_ICOUNTER(VM, mmu_unsync),
250 STATS_DESC_ICOUNTER(VM, pages_4k),
251 STATS_DESC_ICOUNTER(VM, pages_2m),
252 STATS_DESC_ICOUNTER(VM, pages_1g),
253 STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
254 STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
255 STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
258 const struct kvm_stats_header kvm_vm_stats_header = {
259 .name_size = KVM_STATS_NAME_SIZE,
260 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
261 .id_offset = sizeof(struct kvm_stats_header),
262 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
263 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
264 sizeof(kvm_vm_stats_desc),
267 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
268 KVM_GENERIC_VCPU_STATS(),
269 STATS_DESC_COUNTER(VCPU, pf_taken),
270 STATS_DESC_COUNTER(VCPU, pf_fixed),
271 STATS_DESC_COUNTER(VCPU, pf_emulate),
272 STATS_DESC_COUNTER(VCPU, pf_spurious),
273 STATS_DESC_COUNTER(VCPU, pf_fast),
274 STATS_DESC_COUNTER(VCPU, pf_mmio_spte_created),
275 STATS_DESC_COUNTER(VCPU, pf_guest),
276 STATS_DESC_COUNTER(VCPU, tlb_flush),
277 STATS_DESC_COUNTER(VCPU, invlpg),
278 STATS_DESC_COUNTER(VCPU, exits),
279 STATS_DESC_COUNTER(VCPU, io_exits),
280 STATS_DESC_COUNTER(VCPU, mmio_exits),
281 STATS_DESC_COUNTER(VCPU, signal_exits),
282 STATS_DESC_COUNTER(VCPU, irq_window_exits),
283 STATS_DESC_COUNTER(VCPU, nmi_window_exits),
284 STATS_DESC_COUNTER(VCPU, l1d_flush),
285 STATS_DESC_COUNTER(VCPU, halt_exits),
286 STATS_DESC_COUNTER(VCPU, request_irq_exits),
287 STATS_DESC_COUNTER(VCPU, irq_exits),
288 STATS_DESC_COUNTER(VCPU, host_state_reload),
289 STATS_DESC_COUNTER(VCPU, fpu_reload),
290 STATS_DESC_COUNTER(VCPU, insn_emulation),
291 STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
292 STATS_DESC_COUNTER(VCPU, hypercalls),
293 STATS_DESC_COUNTER(VCPU, irq_injections),
294 STATS_DESC_COUNTER(VCPU, nmi_injections),
295 STATS_DESC_COUNTER(VCPU, req_event),
296 STATS_DESC_COUNTER(VCPU, nested_run),
297 STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
298 STATS_DESC_COUNTER(VCPU, directed_yield_successful),
299 STATS_DESC_COUNTER(VCPU, preemption_reported),
300 STATS_DESC_COUNTER(VCPU, preemption_other),
301 STATS_DESC_ICOUNTER(VCPU, guest_mode)
304 const struct kvm_stats_header kvm_vcpu_stats_header = {
305 .name_size = KVM_STATS_NAME_SIZE,
306 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
307 .id_offset = sizeof(struct kvm_stats_header),
308 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
309 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
310 sizeof(kvm_vcpu_stats_desc),
313 u64 __read_mostly host_xcr0;
314 u64 __read_mostly supported_xcr0;
315 EXPORT_SYMBOL_GPL(supported_xcr0);
317 static struct kmem_cache *x86_emulator_cache;
320 * When called, it means the previous get/set msr reached an invalid msr.
321 * Return true if we want to ignore/silent this failed msr access.
323 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
325 const char *op = write ? "wrmsr" : "rdmsr";
328 if (report_ignored_msrs)
329 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
334 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
340 static struct kmem_cache *kvm_alloc_emulator_cache(void)
342 unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
343 unsigned int size = sizeof(struct x86_emulate_ctxt);
345 return kmem_cache_create_usercopy("x86_emulator", size,
346 __alignof__(struct x86_emulate_ctxt),
347 SLAB_ACCOUNT, useroffset,
348 size - useroffset, NULL);
351 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
353 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
356 for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
357 vcpu->arch.apf.gfns[i] = ~0;
360 static void kvm_on_user_return(struct user_return_notifier *urn)
363 struct kvm_user_return_msrs *msrs
364 = container_of(urn, struct kvm_user_return_msrs, urn);
365 struct kvm_user_return_msr_values *values;
369 * Disabling irqs at this point since the following code could be
370 * interrupted and executed through kvm_arch_hardware_disable()
372 local_irq_save(flags);
373 if (msrs->registered) {
374 msrs->registered = false;
375 user_return_notifier_unregister(urn);
377 local_irq_restore(flags);
378 for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
379 values = &msrs->values[slot];
380 if (values->host != values->curr) {
381 wrmsrl(kvm_uret_msrs_list[slot], values->host);
382 values->curr = values->host;
387 static int kvm_probe_user_return_msr(u32 msr)
393 ret = rdmsrl_safe(msr, &val);
396 ret = wrmsrl_safe(msr, val);
402 int kvm_add_user_return_msr(u32 msr)
404 BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
406 if (kvm_probe_user_return_msr(msr))
409 kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
410 return kvm_nr_uret_msrs++;
412 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
414 int kvm_find_user_return_msr(u32 msr)
418 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
419 if (kvm_uret_msrs_list[i] == msr)
424 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
426 static void kvm_user_return_msr_cpu_online(void)
428 unsigned int cpu = smp_processor_id();
429 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
433 for (i = 0; i < kvm_nr_uret_msrs; ++i) {
434 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
435 msrs->values[i].host = value;
436 msrs->values[i].curr = value;
440 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
442 unsigned int cpu = smp_processor_id();
443 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
446 value = (value & mask) | (msrs->values[slot].host & ~mask);
447 if (value == msrs->values[slot].curr)
449 err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
453 msrs->values[slot].curr = value;
454 if (!msrs->registered) {
455 msrs->urn.on_user_return = kvm_on_user_return;
456 user_return_notifier_register(&msrs->urn);
457 msrs->registered = true;
461 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
463 static void drop_user_return_notifiers(void)
465 unsigned int cpu = smp_processor_id();
466 struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
468 if (msrs->registered)
469 kvm_on_user_return(&msrs->urn);
472 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
474 return vcpu->arch.apic_base;
476 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
478 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
480 return kvm_apic_mode(kvm_get_apic_base(vcpu));
482 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
484 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
486 enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
487 enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
488 u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
489 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
491 if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
493 if (!msr_info->host_initiated) {
494 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
496 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
500 kvm_lapic_set_base(vcpu, msr_info->data);
501 kvm_recalculate_apic_map(vcpu->kvm);
504 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
507 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
509 * Hardware virtualization extension instructions may fault if a reboot turns
510 * off virtualization while processes are running. Usually after catching the
511 * fault we just panic; during reboot instead the instruction is ignored.
513 noinstr void kvm_spurious_fault(void)
515 /* Fault while not rebooting. We want the trace. */
516 BUG_ON(!kvm_rebooting);
518 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
520 #define EXCPT_BENIGN 0
521 #define EXCPT_CONTRIBUTORY 1
524 static int exception_class(int vector)
534 return EXCPT_CONTRIBUTORY;
541 #define EXCPT_FAULT 0
543 #define EXCPT_ABORT 2
544 #define EXCPT_INTERRUPT 3
546 static int exception_type(int vector)
550 if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
551 return EXCPT_INTERRUPT;
555 /* #DB is trap, as instruction watchpoints are handled elsewhere */
556 if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
559 if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
562 /* Reserved exceptions will result in fault */
566 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
568 unsigned nr = vcpu->arch.exception.nr;
569 bool has_payload = vcpu->arch.exception.has_payload;
570 unsigned long payload = vcpu->arch.exception.payload;
578 * "Certain debug exceptions may clear bit 0-3. The
579 * remaining contents of the DR6 register are never
580 * cleared by the processor".
582 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
584 * In order to reflect the #DB exception payload in guest
585 * dr6, three components need to be considered: active low
586 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
588 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
589 * In the target guest dr6:
590 * FIXED_1 bits should always be set.
591 * Active low bits should be cleared if 1-setting in payload.
592 * Active high bits should be set if 1-setting in payload.
594 * Note, the payload is compatible with the pending debug
595 * exceptions/exit qualification under VMX, that active_low bits
596 * are active high in payload.
597 * So they need to be flipped for DR6.
599 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
600 vcpu->arch.dr6 |= payload;
601 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
604 * The #DB payload is defined as compatible with the 'pending
605 * debug exceptions' field under VMX, not DR6. While bit 12 is
606 * defined in the 'pending debug exceptions' field (enabled
607 * breakpoint), it is reserved and must be zero in DR6.
609 vcpu->arch.dr6 &= ~BIT(12);
612 vcpu->arch.cr2 = payload;
616 vcpu->arch.exception.has_payload = false;
617 vcpu->arch.exception.payload = 0;
619 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
621 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
622 unsigned nr, bool has_error, u32 error_code,
623 bool has_payload, unsigned long payload, bool reinject)
628 kvm_make_request(KVM_REQ_EVENT, vcpu);
630 if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
634 * On vmentry, vcpu->arch.exception.pending is only
635 * true if an event injection was blocked by
636 * nested_run_pending. In that case, however,
637 * vcpu_enter_guest requests an immediate exit,
638 * and the guest shouldn't proceed far enough to
641 WARN_ON_ONCE(vcpu->arch.exception.pending);
642 vcpu->arch.exception.injected = true;
643 if (WARN_ON_ONCE(has_payload)) {
645 * A reinjected event has already
646 * delivered its payload.
652 vcpu->arch.exception.pending = true;
653 vcpu->arch.exception.injected = false;
655 vcpu->arch.exception.has_error_code = has_error;
656 vcpu->arch.exception.nr = nr;
657 vcpu->arch.exception.error_code = error_code;
658 vcpu->arch.exception.has_payload = has_payload;
659 vcpu->arch.exception.payload = payload;
660 if (!is_guest_mode(vcpu))
661 kvm_deliver_exception_payload(vcpu);
665 /* to check exception */
666 prev_nr = vcpu->arch.exception.nr;
667 if (prev_nr == DF_VECTOR) {
668 /* triple fault -> shutdown */
669 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
672 class1 = exception_class(prev_nr);
673 class2 = exception_class(nr);
674 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
675 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
677 * Generate double fault per SDM Table 5-5. Set
678 * exception.pending = true so that the double fault
679 * can trigger a nested vmexit.
681 vcpu->arch.exception.pending = true;
682 vcpu->arch.exception.injected = false;
683 vcpu->arch.exception.has_error_code = true;
684 vcpu->arch.exception.nr = DF_VECTOR;
685 vcpu->arch.exception.error_code = 0;
686 vcpu->arch.exception.has_payload = false;
687 vcpu->arch.exception.payload = 0;
689 /* replace previous exception with a new one in a hope
690 that instruction re-execution will regenerate lost
695 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
697 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
699 EXPORT_SYMBOL_GPL(kvm_queue_exception);
701 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
703 kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
705 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
707 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
708 unsigned long payload)
710 kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
712 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
714 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
715 u32 error_code, unsigned long payload)
717 kvm_multiple_exception(vcpu, nr, true, error_code,
718 true, payload, false);
721 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
724 kvm_inject_gp(vcpu, 0);
726 return kvm_skip_emulated_instruction(vcpu);
730 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
732 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
735 kvm_inject_gp(vcpu, 0);
739 return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
740 EMULTYPE_COMPLETE_USER_EXIT);
743 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
745 ++vcpu->stat.pf_guest;
746 vcpu->arch.exception.nested_apf =
747 is_guest_mode(vcpu) && fault->async_page_fault;
748 if (vcpu->arch.exception.nested_apf) {
749 vcpu->arch.apf.nested_apf_token = fault->address;
750 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
752 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
756 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
758 /* Returns true if the page fault was immediately morphed into a VM-Exit. */
759 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
760 struct x86_exception *fault)
762 struct kvm_mmu *fault_mmu;
763 WARN_ON_ONCE(fault->vector != PF_VECTOR);
765 fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
769 * Invalidate the TLB entry for the faulting address, if it exists,
770 * else the access will fault indefinitely (and to emulate hardware).
772 if ((fault->error_code & PFERR_PRESENT_MASK) &&
773 !(fault->error_code & PFERR_RSVD_MASK))
774 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
775 fault_mmu->root.hpa);
778 * A workaround for KVM's bad exception handling. If KVM injected an
779 * exception into L2, and L2 encountered a #PF while vectoring the
780 * injected exception, manually check to see if L1 wants to intercept
781 * #PF, otherwise queuing the #PF will lead to #DF or a lost exception.
782 * In all other cases, defer the check to nested_ops->check_events(),
783 * which will correctly handle priority (this does not). Note, other
784 * exceptions, e.g. #GP, are theoretically affected, #PF is simply the
785 * most problematic, e.g. when L0 and L1 are both intercepting #PF for
788 * TODO: Rewrite exception handling to track injected and pending
789 * (VM-Exit) exceptions separately.
791 if (unlikely(vcpu->arch.exception.injected && is_guest_mode(vcpu)) &&
792 kvm_x86_ops.nested_ops->handle_page_fault_workaround(vcpu, fault))
795 fault_mmu->inject_page_fault(vcpu, fault);
798 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
800 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
802 atomic_inc(&vcpu->arch.nmi_queued);
803 kvm_make_request(KVM_REQ_NMI, vcpu);
805 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
807 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
809 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
811 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
813 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
815 kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
817 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
820 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
821 * a #GP and return false.
823 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
825 if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
827 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
830 EXPORT_SYMBOL_GPL(kvm_require_cpl);
832 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
834 if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
837 kvm_queue_exception(vcpu, UD_VECTOR);
840 EXPORT_SYMBOL_GPL(kvm_require_dr);
842 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
844 return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
848 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
850 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
852 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
853 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
857 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
860 * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
863 real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
864 PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
865 if (real_gpa == UNMAPPED_GVA)
868 /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
869 ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
870 cr3 & GENMASK(11, 5), sizeof(pdpte));
874 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
875 if ((pdpte[i] & PT_PRESENT_MASK) &&
876 (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
882 * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
883 * Shadow page roots need to be reconstructed instead.
885 if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
886 kvm_mmu_free_roots(vcpu->kvm, mmu, KVM_MMU_ROOT_CURRENT);
888 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
889 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
890 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
891 vcpu->arch.pdptrs_from_userspace = false;
895 EXPORT_SYMBOL_GPL(load_pdptrs);
897 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
899 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
900 kvm_clear_async_pf_completion_queue(vcpu);
901 kvm_async_pf_hash_reset(vcpu);
904 * Clearing CR0.PG is defined to flush the TLB from the guest's
907 if (!(cr0 & X86_CR0_PG))
908 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
911 if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
912 kvm_mmu_reset_context(vcpu);
914 if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
915 kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
916 !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
917 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
919 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
921 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
923 unsigned long old_cr0 = kvm_read_cr0(vcpu);
928 if (cr0 & 0xffffffff00000000UL)
932 cr0 &= ~CR0_RESERVED_BITS;
934 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
937 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
941 if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
942 (cr0 & X86_CR0_PG)) {
947 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
952 if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
953 is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
954 !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
957 if (!(cr0 & X86_CR0_PG) &&
958 (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
961 static_call(kvm_x86_set_cr0)(vcpu, cr0);
963 kvm_post_set_cr0(vcpu, old_cr0, cr0);
967 EXPORT_SYMBOL_GPL(kvm_set_cr0);
969 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
971 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
973 EXPORT_SYMBOL_GPL(kvm_lmsw);
975 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
977 if (vcpu->arch.guest_state_protected)
980 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
982 if (vcpu->arch.xcr0 != host_xcr0)
983 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
985 if (vcpu->arch.xsaves_enabled &&
986 vcpu->arch.ia32_xss != host_xss)
987 wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
990 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
991 if (static_cpu_has(X86_FEATURE_PKU) &&
992 vcpu->arch.pkru != vcpu->arch.host_pkru &&
993 ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
994 kvm_read_cr4_bits(vcpu, X86_CR4_PKE)))
995 write_pkru(vcpu->arch.pkru);
996 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
998 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
1000 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
1002 if (vcpu->arch.guest_state_protected)
1005 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1006 if (static_cpu_has(X86_FEATURE_PKU) &&
1007 ((vcpu->arch.xcr0 & XFEATURE_MASK_PKRU) ||
1008 kvm_read_cr4_bits(vcpu, X86_CR4_PKE))) {
1009 vcpu->arch.pkru = rdpkru();
1010 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
1011 write_pkru(vcpu->arch.host_pkru);
1013 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
1015 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
1017 if (vcpu->arch.xcr0 != host_xcr0)
1018 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
1020 if (vcpu->arch.xsaves_enabled &&
1021 vcpu->arch.ia32_xss != host_xss)
1022 wrmsrl(MSR_IA32_XSS, host_xss);
1026 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
1028 static inline u64 kvm_guest_supported_xcr0(struct kvm_vcpu *vcpu)
1030 return vcpu->arch.guest_fpu.fpstate->user_xfeatures;
1033 #ifdef CONFIG_X86_64
1034 static inline u64 kvm_guest_supported_xfd(struct kvm_vcpu *vcpu)
1036 return kvm_guest_supported_xcr0(vcpu) & XFEATURE_MASK_USER_DYNAMIC;
1040 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
1043 u64 old_xcr0 = vcpu->arch.xcr0;
1046 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
1047 if (index != XCR_XFEATURE_ENABLED_MASK)
1049 if (!(xcr0 & XFEATURE_MASK_FP))
1051 if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1055 * Do not allow the guest to set bits that we do not support
1056 * saving. However, xcr0 bit 0 is always set, even if the
1057 * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1059 valid_bits = kvm_guest_supported_xcr0(vcpu) | XFEATURE_MASK_FP;
1060 if (xcr0 & ~valid_bits)
1063 if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1064 (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1067 if (xcr0 & XFEATURE_MASK_AVX512) {
1068 if (!(xcr0 & XFEATURE_MASK_YMM))
1070 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1074 if ((xcr0 & XFEATURE_MASK_XTILE) &&
1075 ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1078 vcpu->arch.xcr0 = xcr0;
1080 if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1081 kvm_update_cpuid_runtime(vcpu);
1085 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1087 if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1088 __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1089 kvm_inject_gp(vcpu, 0);
1093 return kvm_skip_emulated_instruction(vcpu);
1095 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1097 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1099 if (cr4 & cr4_reserved_bits)
1102 if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1105 return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1107 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1109 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1111 if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1112 kvm_mmu_reset_context(vcpu);
1115 * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1116 * according to the SDM; however, stale prev_roots could be reused
1117 * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1118 * free them all. This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1119 * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1123 (cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE))
1124 kvm_mmu_unload(vcpu);
1127 * The TLB has to be flushed for all PCIDs if any of the following
1128 * (architecturally required) changes happen:
1129 * - CR4.PCIDE is changed from 1 to 0
1130 * - CR4.PGE is toggled
1132 * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1134 if (((cr4 ^ old_cr4) & X86_CR4_PGE) ||
1135 (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1136 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1139 * The TLB has to be flushed for the current PCID if any of the
1140 * following (architecturally required) changes happen:
1141 * - CR4.SMEP is changed from 0 to 1
1142 * - CR4.PAE is toggled
1144 else if (((cr4 ^ old_cr4) & X86_CR4_PAE) ||
1145 ((cr4 & X86_CR4_SMEP) && !(old_cr4 & X86_CR4_SMEP)))
1146 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1149 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1151 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1153 unsigned long old_cr4 = kvm_read_cr4(vcpu);
1155 if (!kvm_is_valid_cr4(vcpu, cr4))
1158 if (is_long_mode(vcpu)) {
1159 if (!(cr4 & X86_CR4_PAE))
1161 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1163 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1164 && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1165 && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1168 if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1169 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1172 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1173 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1177 static_call(kvm_x86_set_cr4)(vcpu, cr4);
1179 kvm_post_set_cr4(vcpu, old_cr4, cr4);
1183 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1185 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1187 struct kvm_mmu *mmu = vcpu->arch.mmu;
1188 unsigned long roots_to_free = 0;
1192 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1193 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1194 * also via the emulator. KVM's TDP page tables are not in the scope of
1195 * the invalidation, but the guest's TLB entries need to be flushed as
1196 * the CPU may have cached entries in its TLB for the target PCID.
1198 if (unlikely(tdp_enabled)) {
1199 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1204 * If neither the current CR3 nor any of the prev_roots use the given
1205 * PCID, then nothing needs to be done here because a resync will
1206 * happen anyway before switching to any other CR3.
1208 if (kvm_get_active_pcid(vcpu) == pcid) {
1209 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1210 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1214 * If PCID is disabled, there is no need to free prev_roots even if the
1215 * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1218 if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1221 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1222 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1223 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1225 kvm_mmu_free_roots(vcpu->kvm, mmu, roots_to_free);
1228 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1230 bool skip_tlb_flush = false;
1231 unsigned long pcid = 0;
1232 #ifdef CONFIG_X86_64
1233 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1236 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1237 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1238 pcid = cr3 & X86_CR3_PCID_MASK;
1242 /* PDPTRs are always reloaded for PAE paging. */
1243 if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1244 goto handle_tlb_flush;
1247 * Do not condition the GPA check on long mode, this helper is used to
1248 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1249 * the current vCPU mode is accurate.
1251 if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1254 if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1257 if (cr3 != kvm_read_cr3(vcpu))
1258 kvm_mmu_new_pgd(vcpu, cr3);
1260 vcpu->arch.cr3 = cr3;
1261 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1262 /* Do not call post_set_cr3, we do not get here for confidential guests. */
1266 * A load of CR3 that flushes the TLB flushes only the current PCID,
1267 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1268 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1269 * and it's impossible to use a non-zero PCID when PCID is disabled,
1270 * i.e. only PCID=0 can be relevant.
1272 if (!skip_tlb_flush)
1273 kvm_invalidate_pcid(vcpu, pcid);
1277 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1279 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1281 if (cr8 & CR8_RESERVED_BITS)
1283 if (lapic_in_kernel(vcpu))
1284 kvm_lapic_set_tpr(vcpu, cr8);
1286 vcpu->arch.cr8 = cr8;
1289 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1291 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1293 if (lapic_in_kernel(vcpu))
1294 return kvm_lapic_get_cr8(vcpu);
1296 return vcpu->arch.cr8;
1298 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1300 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1304 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1305 for (i = 0; i < KVM_NR_DB_REGS; i++)
1306 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1310 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1314 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1315 dr7 = vcpu->arch.guest_debug_dr7;
1317 dr7 = vcpu->arch.dr7;
1318 static_call(kvm_x86_set_dr7)(vcpu, dr7);
1319 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1320 if (dr7 & DR7_BP_EN_MASK)
1321 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1323 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1325 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1327 u64 fixed = DR6_FIXED_1;
1329 if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1332 if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1333 fixed |= DR6_BUS_LOCK;
1337 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1339 size_t size = ARRAY_SIZE(vcpu->arch.db);
1343 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1344 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1345 vcpu->arch.eff_db[dr] = val;
1349 if (!kvm_dr6_valid(val))
1351 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1355 if (!kvm_dr7_valid(val))
1357 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1358 kvm_update_dr7(vcpu);
1364 EXPORT_SYMBOL_GPL(kvm_set_dr);
1366 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1368 size_t size = ARRAY_SIZE(vcpu->arch.db);
1372 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1376 *val = vcpu->arch.dr6;
1380 *val = vcpu->arch.dr7;
1384 EXPORT_SYMBOL_GPL(kvm_get_dr);
1386 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1388 u32 ecx = kvm_rcx_read(vcpu);
1391 if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1392 kvm_inject_gp(vcpu, 0);
1396 kvm_rax_write(vcpu, (u32)data);
1397 kvm_rdx_write(vcpu, data >> 32);
1398 return kvm_skip_emulated_instruction(vcpu);
1400 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1403 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1404 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1406 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1407 * extract the supported MSRs from the related const lists.
1408 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1409 * capabilities of the host cpu. This capabilities test skips MSRs that are
1410 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1411 * may depend on host virtualization features rather than host cpu features.
1414 static const u32 msrs_to_save_all[] = {
1415 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1417 #ifdef CONFIG_X86_64
1418 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1420 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1421 MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1423 MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1424 MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1425 MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1426 MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1427 MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1428 MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1429 MSR_IA32_UMWAIT_CONTROL,
1431 MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1432 MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1433 MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1434 MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1435 MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1436 MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1437 MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1438 MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1439 MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1440 MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1441 MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1442 MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1443 MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1444 MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1445 MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1446 MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1447 MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1448 MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1449 MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1450 MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1451 MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1452 MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1454 MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1455 MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1456 MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1457 MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1458 MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1459 MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1460 MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1463 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1464 static unsigned num_msrs_to_save;
1466 static const u32 emulated_msrs_all[] = {
1467 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1468 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1469 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1470 HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1471 HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1472 HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1473 HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1475 HV_X64_MSR_VP_INDEX,
1476 HV_X64_MSR_VP_RUNTIME,
1477 HV_X64_MSR_SCONTROL,
1478 HV_X64_MSR_STIMER0_CONFIG,
1479 HV_X64_MSR_VP_ASSIST_PAGE,
1480 HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1481 HV_X64_MSR_TSC_EMULATION_STATUS,
1482 HV_X64_MSR_SYNDBG_OPTIONS,
1483 HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1484 HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1485 HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1487 MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1488 MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1490 MSR_IA32_TSC_ADJUST,
1491 MSR_IA32_TSC_DEADLINE,
1492 MSR_IA32_ARCH_CAPABILITIES,
1493 MSR_IA32_PERF_CAPABILITIES,
1494 MSR_IA32_MISC_ENABLE,
1495 MSR_IA32_MCG_STATUS,
1497 MSR_IA32_MCG_EXT_CTL,
1501 MSR_MISC_FEATURES_ENABLES,
1502 MSR_AMD64_VIRT_SPEC_CTRL,
1503 MSR_AMD64_TSC_RATIO,
1508 * The following list leaves out MSRs whose values are determined
1509 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1510 * We always support the "true" VMX control MSRs, even if the host
1511 * processor does not, so I am putting these registers here rather
1512 * than in msrs_to_save_all.
1515 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1516 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1517 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1518 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1520 MSR_IA32_VMX_CR0_FIXED0,
1521 MSR_IA32_VMX_CR4_FIXED0,
1522 MSR_IA32_VMX_VMCS_ENUM,
1523 MSR_IA32_VMX_PROCBASED_CTLS2,
1524 MSR_IA32_VMX_EPT_VPID_CAP,
1525 MSR_IA32_VMX_VMFUNC,
1528 MSR_KVM_POLL_CONTROL,
1531 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1532 static unsigned num_emulated_msrs;
1535 * List of msr numbers which are used to expose MSR-based features that
1536 * can be used by a hypervisor to validate requested CPU features.
1538 static const u32 msr_based_features_all[] = {
1540 MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1541 MSR_IA32_VMX_PINBASED_CTLS,
1542 MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1543 MSR_IA32_VMX_PROCBASED_CTLS,
1544 MSR_IA32_VMX_TRUE_EXIT_CTLS,
1545 MSR_IA32_VMX_EXIT_CTLS,
1546 MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1547 MSR_IA32_VMX_ENTRY_CTLS,
1549 MSR_IA32_VMX_CR0_FIXED0,
1550 MSR_IA32_VMX_CR0_FIXED1,
1551 MSR_IA32_VMX_CR4_FIXED0,
1552 MSR_IA32_VMX_CR4_FIXED1,
1553 MSR_IA32_VMX_VMCS_ENUM,
1554 MSR_IA32_VMX_PROCBASED_CTLS2,
1555 MSR_IA32_VMX_EPT_VPID_CAP,
1556 MSR_IA32_VMX_VMFUNC,
1560 MSR_IA32_ARCH_CAPABILITIES,
1561 MSR_IA32_PERF_CAPABILITIES,
1564 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1565 static unsigned int num_msr_based_features;
1567 static u64 kvm_get_arch_capabilities(void)
1571 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1572 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1575 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1576 * the nested hypervisor runs with NX huge pages. If it is not,
1577 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1578 * L1 guests, so it need not worry about its own (L2) guests.
1580 data |= ARCH_CAP_PSCHANGE_MC_NO;
1583 * If we're doing cache flushes (either "always" or "cond")
1584 * we will do one whenever the guest does a vmlaunch/vmresume.
1585 * If an outer hypervisor is doing the cache flush for us
1586 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1587 * capability to the guest too, and if EPT is disabled we're not
1588 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1589 * require a nested hypervisor to do a flush of its own.
1591 if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1592 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1594 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1595 data |= ARCH_CAP_RDCL_NO;
1596 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1597 data |= ARCH_CAP_SSB_NO;
1598 if (!boot_cpu_has_bug(X86_BUG_MDS))
1599 data |= ARCH_CAP_MDS_NO;
1601 if (!boot_cpu_has(X86_FEATURE_RTM)) {
1603 * If RTM=0 because the kernel has disabled TSX, the host might
1604 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1605 * and therefore knows that there cannot be TAA) but keep
1606 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1607 * and we want to allow migrating those guests to tsx=off hosts.
1609 data &= ~ARCH_CAP_TAA_NO;
1610 } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1611 data |= ARCH_CAP_TAA_NO;
1614 * Nothing to do here; we emulate TSX_CTRL if present on the
1615 * host so the guest can choose between disabling TSX or
1616 * using VERW to clear CPU buffers.
1623 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1625 switch (msr->index) {
1626 case MSR_IA32_ARCH_CAPABILITIES:
1627 msr->data = kvm_get_arch_capabilities();
1629 case MSR_IA32_UCODE_REV:
1630 rdmsrl_safe(msr->index, &msr->data);
1633 return static_call(kvm_x86_get_msr_feature)(msr);
1638 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1640 struct kvm_msr_entry msr;
1644 r = kvm_get_msr_feature(&msr);
1646 if (r == KVM_MSR_RET_INVALID) {
1647 /* Unconditionally clear the output for simplicity */
1649 if (kvm_msr_ignored_check(index, 0, false))
1661 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1663 if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1666 if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1669 if (efer & (EFER_LME | EFER_LMA) &&
1670 !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1673 if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1679 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1681 if (efer & efer_reserved_bits)
1684 return __kvm_valid_efer(vcpu, efer);
1686 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1688 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1690 u64 old_efer = vcpu->arch.efer;
1691 u64 efer = msr_info->data;
1694 if (efer & efer_reserved_bits)
1697 if (!msr_info->host_initiated) {
1698 if (!__kvm_valid_efer(vcpu, efer))
1701 if (is_paging(vcpu) &&
1702 (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1707 efer |= vcpu->arch.efer & EFER_LMA;
1709 r = static_call(kvm_x86_set_efer)(vcpu, efer);
1715 if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1716 kvm_mmu_reset_context(vcpu);
1721 void kvm_enable_efer_bits(u64 mask)
1723 efer_reserved_bits &= ~mask;
1725 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1727 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1729 struct kvm_x86_msr_filter *msr_filter;
1730 struct msr_bitmap_range *ranges;
1731 struct kvm *kvm = vcpu->kvm;
1736 /* x2APIC MSRs do not support filtering. */
1737 if (index >= 0x800 && index <= 0x8ff)
1740 idx = srcu_read_lock(&kvm->srcu);
1742 msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1748 allowed = msr_filter->default_allow;
1749 ranges = msr_filter->ranges;
1751 for (i = 0; i < msr_filter->count; i++) {
1752 u32 start = ranges[i].base;
1753 u32 end = start + ranges[i].nmsrs;
1754 u32 flags = ranges[i].flags;
1755 unsigned long *bitmap = ranges[i].bitmap;
1757 if ((index >= start) && (index < end) && (flags & type)) {
1758 allowed = !!test_bit(index - start, bitmap);
1764 srcu_read_unlock(&kvm->srcu, idx);
1768 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1771 * Write @data into the MSR specified by @index. Select MSR specific fault
1772 * checks are bypassed if @host_initiated is %true.
1773 * Returns 0 on success, non-0 otherwise.
1774 * Assumes vcpu_load() was already called.
1776 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1777 bool host_initiated)
1779 struct msr_data msr;
1784 case MSR_KERNEL_GS_BASE:
1787 if (is_noncanonical_address(data, vcpu))
1790 case MSR_IA32_SYSENTER_EIP:
1791 case MSR_IA32_SYSENTER_ESP:
1793 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1794 * non-canonical address is written on Intel but not on
1795 * AMD (which ignores the top 32-bits, because it does
1796 * not implement 64-bit SYSENTER).
1798 * 64-bit code should hence be able to write a non-canonical
1799 * value on AMD. Making the address canonical ensures that
1800 * vmentry does not fail on Intel after writing a non-canonical
1801 * value, and that something deterministic happens if the guest
1802 * invokes 64-bit SYSENTER.
1804 data = __canonical_address(data, vcpu_virt_addr_bits(vcpu));
1807 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1810 if (!host_initiated &&
1811 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1812 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1816 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1817 * incomplete and conflicting architectural behavior. Current
1818 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1819 * reserved and always read as zeros. Enforce Intel's reserved
1820 * bits check if and only if the guest CPU is Intel, and clear
1821 * the bits in all other cases. This ensures cross-vendor
1822 * migration will provide consistent behavior for the guest.
1824 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1833 msr.host_initiated = host_initiated;
1835 return static_call(kvm_x86_set_msr)(vcpu, &msr);
1838 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1839 u32 index, u64 data, bool host_initiated)
1841 int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1843 if (ret == KVM_MSR_RET_INVALID)
1844 if (kvm_msr_ignored_check(index, data, true))
1851 * Read the MSR specified by @index into @data. Select MSR specific fault
1852 * checks are bypassed if @host_initiated is %true.
1853 * Returns 0 on success, non-0 otherwise.
1854 * Assumes vcpu_load() was already called.
1856 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1857 bool host_initiated)
1859 struct msr_data msr;
1864 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1867 if (!host_initiated &&
1868 !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1869 !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1875 msr.host_initiated = host_initiated;
1877 ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1883 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1884 u32 index, u64 *data, bool host_initiated)
1886 int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1888 if (ret == KVM_MSR_RET_INVALID) {
1889 /* Unconditionally clear *data for simplicity */
1891 if (kvm_msr_ignored_check(index, 0, false))
1898 static int kvm_get_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1900 if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1901 return KVM_MSR_RET_FILTERED;
1902 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1905 static int kvm_set_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 data)
1907 if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1908 return KVM_MSR_RET_FILTERED;
1909 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1912 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1914 return kvm_get_msr_ignored_check(vcpu, index, data, false);
1916 EXPORT_SYMBOL_GPL(kvm_get_msr);
1918 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1920 return kvm_set_msr_ignored_check(vcpu, index, data, false);
1922 EXPORT_SYMBOL_GPL(kvm_set_msr);
1924 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1926 if (!vcpu->run->msr.error) {
1927 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1928 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1932 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1934 return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1937 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1939 complete_userspace_rdmsr(vcpu);
1940 return complete_emulated_msr_access(vcpu);
1943 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1945 return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1948 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1950 complete_userspace_rdmsr(vcpu);
1951 return complete_fast_msr_access(vcpu);
1954 static u64 kvm_msr_reason(int r)
1957 case KVM_MSR_RET_INVALID:
1958 return KVM_MSR_EXIT_REASON_UNKNOWN;
1959 case KVM_MSR_RET_FILTERED:
1960 return KVM_MSR_EXIT_REASON_FILTER;
1962 return KVM_MSR_EXIT_REASON_INVAL;
1966 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1967 u32 exit_reason, u64 data,
1968 int (*completion)(struct kvm_vcpu *vcpu),
1971 u64 msr_reason = kvm_msr_reason(r);
1973 /* Check if the user wanted to know about this MSR fault */
1974 if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1977 vcpu->run->exit_reason = exit_reason;
1978 vcpu->run->msr.error = 0;
1979 memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1980 vcpu->run->msr.reason = msr_reason;
1981 vcpu->run->msr.index = index;
1982 vcpu->run->msr.data = data;
1983 vcpu->arch.complete_userspace_io = completion;
1988 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1990 u32 ecx = kvm_rcx_read(vcpu);
1994 r = kvm_get_msr_with_filter(vcpu, ecx, &data);
1997 trace_kvm_msr_read(ecx, data);
1999 kvm_rax_write(vcpu, data & -1u);
2000 kvm_rdx_write(vcpu, (data >> 32) & -1u);
2002 /* MSR read failed? See if we should ask user space */
2003 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
2004 complete_fast_rdmsr, r))
2006 trace_kvm_msr_read_ex(ecx);
2009 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2011 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
2013 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
2015 u32 ecx = kvm_rcx_read(vcpu);
2016 u64 data = kvm_read_edx_eax(vcpu);
2019 r = kvm_set_msr_with_filter(vcpu, ecx, data);
2022 trace_kvm_msr_write(ecx, data);
2024 /* MSR write failed? See if we should ask user space */
2025 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
2026 complete_fast_msr_access, r))
2028 /* Signal all other negative errors to userspace */
2031 trace_kvm_msr_write_ex(ecx, data);
2034 return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2036 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
2038 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
2040 return kvm_skip_emulated_instruction(vcpu);
2042 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
2044 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
2046 /* Treat an INVD instruction as a NOP and just skip it. */
2047 return kvm_emulate_as_nop(vcpu);
2049 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
2051 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
2053 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
2054 return kvm_emulate_as_nop(vcpu);
2056 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
2058 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
2060 kvm_queue_exception(vcpu, UD_VECTOR);
2063 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
2065 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
2067 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
2068 return kvm_emulate_as_nop(vcpu);
2070 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
2072 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
2074 xfer_to_guest_mode_prepare();
2075 return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2076 xfer_to_guest_mode_work_pending();
2080 * The fast path for frequent and performance sensitive wrmsr emulation,
2081 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2082 * the latency of virtual IPI by avoiding the expensive bits of transitioning
2083 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2084 * other cases which must be called after interrupts are enabled on the host.
2086 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2088 if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2091 if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2092 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2093 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2094 ((u32)(data >> 32) != X2APIC_BROADCAST))
2095 return kvm_x2apic_icr_write(vcpu->arch.apic, data);
2100 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2102 if (!kvm_can_use_hv_timer(vcpu))
2105 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2109 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2111 u32 msr = kvm_rcx_read(vcpu);
2113 fastpath_t ret = EXIT_FASTPATH_NONE;
2116 case APIC_BASE_MSR + (APIC_ICR >> 4):
2117 data = kvm_read_edx_eax(vcpu);
2118 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2119 kvm_skip_emulated_instruction(vcpu);
2120 ret = EXIT_FASTPATH_EXIT_HANDLED;
2123 case MSR_IA32_TSC_DEADLINE:
2124 data = kvm_read_edx_eax(vcpu);
2125 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2126 kvm_skip_emulated_instruction(vcpu);
2127 ret = EXIT_FASTPATH_REENTER_GUEST;
2134 if (ret != EXIT_FASTPATH_NONE)
2135 trace_kvm_msr_write(msr, data);
2139 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2142 * Adapt set_msr() to msr_io()'s calling convention
2144 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2146 return kvm_get_msr_ignored_check(vcpu, index, data, true);
2149 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2151 return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2154 #ifdef CONFIG_X86_64
2155 struct pvclock_clock {
2165 struct pvclock_gtod_data {
2168 struct pvclock_clock clock; /* extract of a clocksource struct */
2169 struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2175 static struct pvclock_gtod_data pvclock_gtod_data;
2177 static void update_pvclock_gtod(struct timekeeper *tk)
2179 struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2181 write_seqcount_begin(&vdata->seq);
2183 /* copy pvclock gtod data */
2184 vdata->clock.vclock_mode = tk->tkr_mono.clock->vdso_clock_mode;
2185 vdata->clock.cycle_last = tk->tkr_mono.cycle_last;
2186 vdata->clock.mask = tk->tkr_mono.mask;
2187 vdata->clock.mult = tk->tkr_mono.mult;
2188 vdata->clock.shift = tk->tkr_mono.shift;
2189 vdata->clock.base_cycles = tk->tkr_mono.xtime_nsec;
2190 vdata->clock.offset = tk->tkr_mono.base;
2192 vdata->raw_clock.vclock_mode = tk->tkr_raw.clock->vdso_clock_mode;
2193 vdata->raw_clock.cycle_last = tk->tkr_raw.cycle_last;
2194 vdata->raw_clock.mask = tk->tkr_raw.mask;
2195 vdata->raw_clock.mult = tk->tkr_raw.mult;
2196 vdata->raw_clock.shift = tk->tkr_raw.shift;
2197 vdata->raw_clock.base_cycles = tk->tkr_raw.xtime_nsec;
2198 vdata->raw_clock.offset = tk->tkr_raw.base;
2200 vdata->wall_time_sec = tk->xtime_sec;
2202 vdata->offs_boot = tk->offs_boot;
2204 write_seqcount_end(&vdata->seq);
2207 static s64 get_kvmclock_base_ns(void)
2209 /* Count up from boot time, but with the frequency of the raw clock. */
2210 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2213 static s64 get_kvmclock_base_ns(void)
2215 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2216 return ktime_get_boottime_ns();
2220 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2224 struct pvclock_wall_clock wc;
2231 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2236 ++version; /* first time write, random junk */
2240 if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2244 * The guest calculates current wall clock time by adding
2245 * system time (updated by kvm_guest_time_update below) to the
2246 * wall clock specified here. We do the reverse here.
2248 wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2250 wc.nsec = do_div(wall_nsec, 1000000000);
2251 wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2252 wc.version = version;
2254 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2257 wc_sec_hi = wall_nsec >> 32;
2258 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2259 &wc_sec_hi, sizeof(wc_sec_hi));
2263 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2266 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2267 bool old_msr, bool host_initiated)
2269 struct kvm_arch *ka = &vcpu->kvm->arch;
2271 if (vcpu->vcpu_id == 0 && !host_initiated) {
2272 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2273 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2275 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2278 vcpu->arch.time = system_time;
2279 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2281 /* we verify if the enable bit is set... */
2282 if (system_time & 1) {
2283 kvm_gfn_to_pfn_cache_init(vcpu->kvm, &vcpu->arch.pv_time, vcpu,
2284 KVM_HOST_USES_PFN, system_time & ~1ULL,
2285 sizeof(struct pvclock_vcpu_time_info));
2287 kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
2293 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2295 do_shl32_div32(dividend, divisor);
2299 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2300 s8 *pshift, u32 *pmultiplier)
2308 scaled64 = scaled_hz;
2309 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2314 tps32 = (uint32_t)tps64;
2315 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2316 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2324 *pmultiplier = div_frac(scaled64, tps32);
2327 #ifdef CONFIG_X86_64
2328 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2331 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2332 static unsigned long max_tsc_khz;
2334 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2336 u64 v = (u64)khz * (1000000 + ppm);
2341 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2343 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2347 /* Guest TSC same frequency as host TSC? */
2349 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2353 /* TSC scaling supported? */
2354 if (!kvm_has_tsc_control) {
2355 if (user_tsc_khz > tsc_khz) {
2356 vcpu->arch.tsc_catchup = 1;
2357 vcpu->arch.tsc_always_catchup = 1;
2360 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2365 /* TSC scaling required - calculate ratio */
2366 ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2367 user_tsc_khz, tsc_khz);
2369 if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2370 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2375 kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2379 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2381 u32 thresh_lo, thresh_hi;
2382 int use_scaling = 0;
2384 /* tsc_khz can be zero if TSC calibration fails */
2385 if (user_tsc_khz == 0) {
2386 /* set tsc_scaling_ratio to a safe value */
2387 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2391 /* Compute a scale to convert nanoseconds in TSC cycles */
2392 kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2393 &vcpu->arch.virtual_tsc_shift,
2394 &vcpu->arch.virtual_tsc_mult);
2395 vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2398 * Compute the variation in TSC rate which is acceptable
2399 * within the range of tolerance and decide if the
2400 * rate being applied is within that bounds of the hardware
2401 * rate. If so, no scaling or compensation need be done.
2403 thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2404 thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2405 if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2406 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2409 return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2412 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2414 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2415 vcpu->arch.virtual_tsc_mult,
2416 vcpu->arch.virtual_tsc_shift);
2417 tsc += vcpu->arch.this_tsc_write;
2421 #ifdef CONFIG_X86_64
2422 static inline int gtod_is_based_on_tsc(int mode)
2424 return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2428 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2430 #ifdef CONFIG_X86_64
2432 struct kvm_arch *ka = &vcpu->kvm->arch;
2433 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2435 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2436 atomic_read(&vcpu->kvm->online_vcpus));
2439 * Once the masterclock is enabled, always perform request in
2440 * order to update it.
2442 * In order to enable masterclock, the host clocksource must be TSC
2443 * and the vcpus need to have matched TSCs. When that happens,
2444 * perform request to enable masterclock.
2446 if (ka->use_master_clock ||
2447 (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2448 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2450 trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2451 atomic_read(&vcpu->kvm->online_vcpus),
2452 ka->use_master_clock, gtod->clock.vclock_mode);
2457 * Multiply tsc by a fixed point number represented by ratio.
2459 * The most significant 64-N bits (mult) of ratio represent the
2460 * integral part of the fixed point number; the remaining N bits
2461 * (frac) represent the fractional part, ie. ratio represents a fixed
2462 * point number (mult + frac * 2^(-N)).
2464 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2466 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2468 return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2471 u64 kvm_scale_tsc(u64 tsc, u64 ratio)
2475 if (ratio != kvm_default_tsc_scaling_ratio)
2476 _tsc = __scale_tsc(ratio, tsc);
2480 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2482 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2486 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2488 return target_tsc - tsc;
2491 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2493 return vcpu->arch.l1_tsc_offset +
2494 kvm_scale_tsc(host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2496 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2498 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2502 if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2503 nested_offset = l1_offset;
2505 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2506 kvm_tsc_scaling_ratio_frac_bits);
2508 nested_offset += l2_offset;
2509 return nested_offset;
2511 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2513 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2515 if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2516 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2517 kvm_tsc_scaling_ratio_frac_bits);
2519 return l1_multiplier;
2521 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2523 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2525 trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2526 vcpu->arch.l1_tsc_offset,
2529 vcpu->arch.l1_tsc_offset = l1_offset;
2532 * If we are here because L1 chose not to trap WRMSR to TSC then
2533 * according to the spec this should set L1's TSC (as opposed to
2534 * setting L1's offset for L2).
2536 if (is_guest_mode(vcpu))
2537 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2539 static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2540 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2542 vcpu->arch.tsc_offset = l1_offset;
2544 static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2547 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2549 vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2551 /* Userspace is changing the multiplier while L2 is active */
2552 if (is_guest_mode(vcpu))
2553 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2555 static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2557 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2559 if (kvm_has_tsc_control)
2560 static_call(kvm_x86_write_tsc_multiplier)(
2561 vcpu, vcpu->arch.tsc_scaling_ratio);
2564 static inline bool kvm_check_tsc_unstable(void)
2566 #ifdef CONFIG_X86_64
2568 * TSC is marked unstable when we're running on Hyper-V,
2569 * 'TSC page' clocksource is good.
2571 if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2574 return check_tsc_unstable();
2578 * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2579 * offset for the vcpu and tracks the TSC matching generation that the vcpu
2582 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2583 u64 ns, bool matched)
2585 struct kvm *kvm = vcpu->kvm;
2587 lockdep_assert_held(&kvm->arch.tsc_write_lock);
2590 * We also track th most recent recorded KHZ, write and time to
2591 * allow the matching interval to be extended at each write.
2593 kvm->arch.last_tsc_nsec = ns;
2594 kvm->arch.last_tsc_write = tsc;
2595 kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2596 kvm->arch.last_tsc_offset = offset;
2598 vcpu->arch.last_guest_tsc = tsc;
2600 kvm_vcpu_write_tsc_offset(vcpu, offset);
2604 * We split periods of matched TSC writes into generations.
2605 * For each generation, we track the original measured
2606 * nanosecond time, offset, and write, so if TSCs are in
2607 * sync, we can match exact offset, and if not, we can match
2608 * exact software computation in compute_guest_tsc()
2610 * These values are tracked in kvm->arch.cur_xxx variables.
2612 kvm->arch.cur_tsc_generation++;
2613 kvm->arch.cur_tsc_nsec = ns;
2614 kvm->arch.cur_tsc_write = tsc;
2615 kvm->arch.cur_tsc_offset = offset;
2616 kvm->arch.nr_vcpus_matched_tsc = 0;
2617 } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2618 kvm->arch.nr_vcpus_matched_tsc++;
2621 /* Keep track of which generation this VCPU has synchronized to */
2622 vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2623 vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2624 vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2626 kvm_track_tsc_matching(vcpu);
2629 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2631 struct kvm *kvm = vcpu->kvm;
2632 u64 offset, ns, elapsed;
2633 unsigned long flags;
2634 bool matched = false;
2635 bool synchronizing = false;
2637 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2638 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2639 ns = get_kvmclock_base_ns();
2640 elapsed = ns - kvm->arch.last_tsc_nsec;
2642 if (vcpu->arch.virtual_tsc_khz) {
2645 * detection of vcpu initialization -- need to sync
2646 * with other vCPUs. This particularly helps to keep
2647 * kvm_clock stable after CPU hotplug
2649 synchronizing = true;
2651 u64 tsc_exp = kvm->arch.last_tsc_write +
2652 nsec_to_cycles(vcpu, elapsed);
2653 u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2655 * Special case: TSC write with a small delta (1 second)
2656 * of virtual cycle time against real time is
2657 * interpreted as an attempt to synchronize the CPU.
2659 synchronizing = data < tsc_exp + tsc_hz &&
2660 data + tsc_hz > tsc_exp;
2665 * For a reliable TSC, we can match TSC offsets, and for an unstable
2666 * TSC, we add elapsed time in this computation. We could let the
2667 * compensation code attempt to catch up if we fall behind, but
2668 * it's better to try to match offsets from the beginning.
2670 if (synchronizing &&
2671 vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2672 if (!kvm_check_tsc_unstable()) {
2673 offset = kvm->arch.cur_tsc_offset;
2675 u64 delta = nsec_to_cycles(vcpu, elapsed);
2677 offset = kvm_compute_l1_tsc_offset(vcpu, data);
2682 __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2683 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2686 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2689 u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2690 kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2693 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2695 if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2696 WARN_ON(adjustment < 0);
2697 adjustment = kvm_scale_tsc((u64) adjustment,
2698 vcpu->arch.l1_tsc_scaling_ratio);
2699 adjust_tsc_offset_guest(vcpu, adjustment);
2702 #ifdef CONFIG_X86_64
2704 static u64 read_tsc(void)
2706 u64 ret = (u64)rdtsc_ordered();
2707 u64 last = pvclock_gtod_data.clock.cycle_last;
2709 if (likely(ret >= last))
2713 * GCC likes to generate cmov here, but this branch is extremely
2714 * predictable (it's just a function of time and the likely is
2715 * very likely) and there's a data dependence, so force GCC
2716 * to generate a branch instead. I don't barrier() because
2717 * we don't actually need a barrier, and if this function
2718 * ever gets inlined it will generate worse code.
2724 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2730 switch (clock->vclock_mode) {
2731 case VDSO_CLOCKMODE_HVCLOCK:
2732 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2734 if (tsc_pg_val != U64_MAX) {
2735 /* TSC page valid */
2736 *mode = VDSO_CLOCKMODE_HVCLOCK;
2737 v = (tsc_pg_val - clock->cycle_last) &
2740 /* TSC page invalid */
2741 *mode = VDSO_CLOCKMODE_NONE;
2744 case VDSO_CLOCKMODE_TSC:
2745 *mode = VDSO_CLOCKMODE_TSC;
2746 *tsc_timestamp = read_tsc();
2747 v = (*tsc_timestamp - clock->cycle_last) &
2751 *mode = VDSO_CLOCKMODE_NONE;
2754 if (*mode == VDSO_CLOCKMODE_NONE)
2755 *tsc_timestamp = v = 0;
2757 return v * clock->mult;
2760 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2762 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2768 seq = read_seqcount_begin(>od->seq);
2769 ns = gtod->raw_clock.base_cycles;
2770 ns += vgettsc(>od->raw_clock, tsc_timestamp, &mode);
2771 ns >>= gtod->raw_clock.shift;
2772 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2773 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2779 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2781 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2787 seq = read_seqcount_begin(>od->seq);
2788 ts->tv_sec = gtod->wall_time_sec;
2789 ns = gtod->clock.base_cycles;
2790 ns += vgettsc(>od->clock, tsc_timestamp, &mode);
2791 ns >>= gtod->clock.shift;
2792 } while (unlikely(read_seqcount_retry(>od->seq, seq)));
2794 ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2800 /* returns true if host is using TSC based clocksource */
2801 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2803 /* checked again under seqlock below */
2804 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2807 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2811 /* returns true if host is using TSC based clocksource */
2812 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2815 /* checked again under seqlock below */
2816 if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2819 return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2825 * Assuming a stable TSC across physical CPUS, and a stable TSC
2826 * across virtual CPUs, the following condition is possible.
2827 * Each numbered line represents an event visible to both
2828 * CPUs at the next numbered event.
2830 * "timespecX" represents host monotonic time. "tscX" represents
2833 * VCPU0 on CPU0 | VCPU1 on CPU1
2835 * 1. read timespec0,tsc0
2836 * 2. | timespec1 = timespec0 + N
2838 * 3. transition to guest | transition to guest
2839 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2840 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2841 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2843 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2846 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2848 * - 0 < N - M => M < N
2850 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2851 * always the case (the difference between two distinct xtime instances
2852 * might be smaller then the difference between corresponding TSC reads,
2853 * when updating guest vcpus pvclock areas).
2855 * To avoid that problem, do not allow visibility of distinct
2856 * system_timestamp/tsc_timestamp values simultaneously: use a master
2857 * copy of host monotonic time values. Update that master copy
2860 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2864 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2866 #ifdef CONFIG_X86_64
2867 struct kvm_arch *ka = &kvm->arch;
2869 bool host_tsc_clocksource, vcpus_matched;
2871 lockdep_assert_held(&kvm->arch.tsc_write_lock);
2872 vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2873 atomic_read(&kvm->online_vcpus));
2876 * If the host uses TSC clock, then passthrough TSC as stable
2879 host_tsc_clocksource = kvm_get_time_and_clockread(
2880 &ka->master_kernel_ns,
2881 &ka->master_cycle_now);
2883 ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2884 && !ka->backwards_tsc_observed
2885 && !ka->boot_vcpu_runs_old_kvmclock;
2887 if (ka->use_master_clock)
2888 atomic_set(&kvm_guest_has_master_clock, 1);
2890 vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2891 trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2896 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2898 kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2901 static void __kvm_start_pvclock_update(struct kvm *kvm)
2903 raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2904 write_seqcount_begin(&kvm->arch.pvclock_sc);
2907 static void kvm_start_pvclock_update(struct kvm *kvm)
2909 kvm_make_mclock_inprogress_request(kvm);
2911 /* no guest entries from this point */
2912 __kvm_start_pvclock_update(kvm);
2915 static void kvm_end_pvclock_update(struct kvm *kvm)
2917 struct kvm_arch *ka = &kvm->arch;
2918 struct kvm_vcpu *vcpu;
2921 write_seqcount_end(&ka->pvclock_sc);
2922 raw_spin_unlock_irq(&ka->tsc_write_lock);
2923 kvm_for_each_vcpu(i, vcpu, kvm)
2924 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2926 /* guest entries allowed */
2927 kvm_for_each_vcpu(i, vcpu, kvm)
2928 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2931 static void kvm_update_masterclock(struct kvm *kvm)
2933 kvm_hv_request_tsc_page_update(kvm);
2934 kvm_start_pvclock_update(kvm);
2935 pvclock_update_vm_gtod_copy(kvm);
2936 kvm_end_pvclock_update(kvm);
2939 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc. */
2940 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2942 struct kvm_arch *ka = &kvm->arch;
2943 struct pvclock_vcpu_time_info hv_clock;
2945 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2949 if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2950 #ifdef CONFIG_X86_64
2951 struct timespec64 ts;
2953 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2954 data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2955 data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2958 data->host_tsc = rdtsc();
2960 data->flags |= KVM_CLOCK_TSC_STABLE;
2961 hv_clock.tsc_timestamp = ka->master_cycle_now;
2962 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2963 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2964 &hv_clock.tsc_shift,
2965 &hv_clock.tsc_to_system_mul);
2966 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2968 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2974 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2976 struct kvm_arch *ka = &kvm->arch;
2980 seq = read_seqcount_begin(&ka->pvclock_sc);
2981 __get_kvmclock(kvm, data);
2982 } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2985 u64 get_kvmclock_ns(struct kvm *kvm)
2987 struct kvm_clock_data data;
2989 get_kvmclock(kvm, &data);
2993 static void kvm_setup_guest_pvclock(struct kvm_vcpu *v,
2994 struct gfn_to_pfn_cache *gpc,
2995 unsigned int offset)
2997 struct kvm_vcpu_arch *vcpu = &v->arch;
2998 struct pvclock_vcpu_time_info *guest_hv_clock;
2999 unsigned long flags;
3001 read_lock_irqsave(&gpc->lock, flags);
3002 while (!kvm_gfn_to_pfn_cache_check(v->kvm, gpc, gpc->gpa,
3003 offset + sizeof(*guest_hv_clock))) {
3004 read_unlock_irqrestore(&gpc->lock, flags);
3006 if (kvm_gfn_to_pfn_cache_refresh(v->kvm, gpc, gpc->gpa,
3007 offset + sizeof(*guest_hv_clock)))
3010 read_lock_irqsave(&gpc->lock, flags);
3013 guest_hv_clock = (void *)(gpc->khva + offset);
3016 * This VCPU is paused, but it's legal for a guest to read another
3017 * VCPU's kvmclock, so we really have to follow the specification where
3018 * it says that version is odd if data is being modified, and even after
3022 guest_hv_clock->version = vcpu->hv_clock.version = (guest_hv_clock->version + 1) | 1;
3025 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
3026 vcpu->hv_clock.flags |= (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
3028 if (vcpu->pvclock_set_guest_stopped_request) {
3029 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
3030 vcpu->pvclock_set_guest_stopped_request = false;
3033 memcpy(guest_hv_clock, &vcpu->hv_clock, sizeof(*guest_hv_clock));
3036 guest_hv_clock->version = ++vcpu->hv_clock.version;
3038 mark_page_dirty_in_slot(v->kvm, gpc->memslot, gpc->gpa >> PAGE_SHIFT);
3039 read_unlock_irqrestore(&gpc->lock, flags);
3041 trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
3044 static int kvm_guest_time_update(struct kvm_vcpu *v)
3046 unsigned long flags, tgt_tsc_khz;
3048 struct kvm_vcpu_arch *vcpu = &v->arch;
3049 struct kvm_arch *ka = &v->kvm->arch;
3051 u64 tsc_timestamp, host_tsc;
3053 bool use_master_clock;
3059 * If the host uses TSC clock, then passthrough TSC as stable
3063 seq = read_seqcount_begin(&ka->pvclock_sc);
3064 use_master_clock = ka->use_master_clock;
3065 if (use_master_clock) {
3066 host_tsc = ka->master_cycle_now;
3067 kernel_ns = ka->master_kernel_ns;
3069 } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3071 /* Keep irq disabled to prevent changes to the clock */
3072 local_irq_save(flags);
3073 tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3074 if (unlikely(tgt_tsc_khz == 0)) {
3075 local_irq_restore(flags);
3076 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3079 if (!use_master_clock) {
3081 kernel_ns = get_kvmclock_base_ns();
3084 tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3087 * We may have to catch up the TSC to match elapsed wall clock
3088 * time for two reasons, even if kvmclock is used.
3089 * 1) CPU could have been running below the maximum TSC rate
3090 * 2) Broken TSC compensation resets the base at each VCPU
3091 * entry to avoid unknown leaps of TSC even when running
3092 * again on the same CPU. This may cause apparent elapsed
3093 * time to disappear, and the guest to stand still or run
3096 if (vcpu->tsc_catchup) {
3097 u64 tsc = compute_guest_tsc(v, kernel_ns);
3098 if (tsc > tsc_timestamp) {
3099 adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3100 tsc_timestamp = tsc;
3104 local_irq_restore(flags);
3106 /* With all the info we got, fill in the values */
3108 if (kvm_has_tsc_control)
3109 tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz,
3110 v->arch.l1_tsc_scaling_ratio);
3112 if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3113 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3114 &vcpu->hv_clock.tsc_shift,
3115 &vcpu->hv_clock.tsc_to_system_mul);
3116 vcpu->hw_tsc_khz = tgt_tsc_khz;
3119 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3120 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3121 vcpu->last_guest_tsc = tsc_timestamp;
3123 /* If the host uses TSC clocksource, then it is stable */
3125 if (use_master_clock)
3126 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3128 vcpu->hv_clock.flags = pvclock_flags;
3130 if (vcpu->pv_time.active)
3131 kvm_setup_guest_pvclock(v, &vcpu->pv_time, 0);
3132 if (vcpu->xen.vcpu_info_cache.active)
3133 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_info_cache,
3134 offsetof(struct compat_vcpu_info, time));
3135 if (vcpu->xen.vcpu_time_info_cache.active)
3136 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_time_info_cache, 0);
3137 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3142 * kvmclock updates which are isolated to a given vcpu, such as
3143 * vcpu->cpu migration, should not allow system_timestamp from
3144 * the rest of the vcpus to remain static. Otherwise ntp frequency
3145 * correction applies to one vcpu's system_timestamp but not
3148 * So in those cases, request a kvmclock update for all vcpus.
3149 * We need to rate-limit these requests though, as they can
3150 * considerably slow guests that have a large number of vcpus.
3151 * The time for a remote vcpu to update its kvmclock is bound
3152 * by the delay we use to rate-limit the updates.
3155 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3157 static void kvmclock_update_fn(struct work_struct *work)
3160 struct delayed_work *dwork = to_delayed_work(work);
3161 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3162 kvmclock_update_work);
3163 struct kvm *kvm = container_of(ka, struct kvm, arch);
3164 struct kvm_vcpu *vcpu;
3166 kvm_for_each_vcpu(i, vcpu, kvm) {
3167 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3168 kvm_vcpu_kick(vcpu);
3172 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3174 struct kvm *kvm = v->kvm;
3176 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3177 schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3178 KVMCLOCK_UPDATE_DELAY);
3181 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3183 static void kvmclock_sync_fn(struct work_struct *work)
3185 struct delayed_work *dwork = to_delayed_work(work);
3186 struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3187 kvmclock_sync_work);
3188 struct kvm *kvm = container_of(ka, struct kvm, arch);
3190 if (!kvmclock_periodic_sync)
3193 schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3194 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3195 KVMCLOCK_SYNC_PERIOD);
3199 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3201 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3203 /* McStatusWrEn enabled? */
3204 if (guest_cpuid_is_amd_or_hygon(vcpu))
3205 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3210 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3212 u64 mcg_cap = vcpu->arch.mcg_cap;
3213 unsigned bank_num = mcg_cap & 0xff;
3214 u32 msr = msr_info->index;
3215 u64 data = msr_info->data;
3218 case MSR_IA32_MCG_STATUS:
3219 vcpu->arch.mcg_status = data;
3221 case MSR_IA32_MCG_CTL:
3222 if (!(mcg_cap & MCG_CTL_P) &&
3223 (data || !msr_info->host_initiated))
3225 if (data != 0 && data != ~(u64)0)
3227 vcpu->arch.mcg_ctl = data;
3230 if (msr >= MSR_IA32_MC0_CTL &&
3231 msr < MSR_IA32_MCx_CTL(bank_num)) {
3232 u32 offset = array_index_nospec(
3233 msr - MSR_IA32_MC0_CTL,
3234 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3236 /* only 0 or all 1s can be written to IA32_MCi_CTL
3237 * some Linux kernels though clear bit 10 in bank 4 to
3238 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3239 * this to avoid an uncatched #GP in the guest
3241 if ((offset & 0x3) == 0 &&
3242 data != 0 && (data | (1 << 10)) != ~(u64)0)
3246 if (!msr_info->host_initiated &&
3247 (offset & 0x3) == 1 && data != 0) {
3248 if (!can_set_mci_status(vcpu))
3252 vcpu->arch.mce_banks[offset] = data;
3260 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3262 u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3264 return (vcpu->arch.apf.msr_en_val & mask) == mask;
3267 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3269 gpa_t gpa = data & ~0x3f;
3271 /* Bits 4:5 are reserved, Should be zero */
3275 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3276 (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3279 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3280 (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3283 if (!lapic_in_kernel(vcpu))
3284 return data ? 1 : 0;
3286 vcpu->arch.apf.msr_en_val = data;
3288 if (!kvm_pv_async_pf_enabled(vcpu)) {
3289 kvm_clear_async_pf_completion_queue(vcpu);
3290 kvm_async_pf_hash_reset(vcpu);
3294 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3298 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3299 vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3301 kvm_async_pf_wakeup_all(vcpu);
3306 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3308 /* Bits 8-63 are reserved */
3312 if (!lapic_in_kernel(vcpu))
3315 vcpu->arch.apf.msr_int_val = data;
3317 vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3322 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3324 kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
3325 vcpu->arch.time = 0;
3328 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3330 ++vcpu->stat.tlb_flush;
3331 static_call(kvm_x86_flush_tlb_all)(vcpu);
3334 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3336 ++vcpu->stat.tlb_flush;
3340 * A TLB flush on behalf of the guest is equivalent to
3341 * INVPCID(all), toggling CR4.PGE, etc., which requires
3342 * a forced sync of the shadow page tables. Ensure all the
3343 * roots are synced and the guest TLB in hardware is clean.
3345 kvm_mmu_sync_roots(vcpu);
3346 kvm_mmu_sync_prev_roots(vcpu);
3349 static_call(kvm_x86_flush_tlb_guest)(vcpu);
3353 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3355 ++vcpu->stat.tlb_flush;
3356 static_call(kvm_x86_flush_tlb_current)(vcpu);
3360 * Service "local" TLB flush requests, which are specific to the current MMU
3361 * context. In addition to the generic event handling in vcpu_enter_guest(),
3362 * TLB flushes that are targeted at an MMU context also need to be serviced
3363 * prior before nested VM-Enter/VM-Exit.
3365 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3367 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3368 kvm_vcpu_flush_tlb_current(vcpu);
3370 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3371 kvm_vcpu_flush_tlb_guest(vcpu);
3373 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3375 static void record_steal_time(struct kvm_vcpu *vcpu)
3377 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3378 struct kvm_steal_time __user *st;
3379 struct kvm_memslots *slots;
3383 if (kvm_xen_msr_enabled(vcpu->kvm)) {
3384 kvm_xen_runstate_set_running(vcpu);
3388 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3391 if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3394 slots = kvm_memslots(vcpu->kvm);
3396 if (unlikely(slots->generation != ghc->generation ||
3397 kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3398 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3400 /* We rely on the fact that it fits in a single page. */
3401 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3403 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3404 kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3408 st = (struct kvm_steal_time __user *)ghc->hva;
3410 * Doing a TLB flush here, on the guest's behalf, can avoid
3413 if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3414 u8 st_preempted = 0;
3417 if (!user_access_begin(st, sizeof(*st)))
3420 asm volatile("1: xchgb %0, %2\n"
3423 _ASM_EXTABLE_UA(1b, 2b)
3424 : "+q" (st_preempted),
3426 "+m" (st->preempted));
3432 vcpu->arch.st.preempted = 0;
3434 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3435 st_preempted & KVM_VCPU_FLUSH_TLB);
3436 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3437 kvm_vcpu_flush_tlb_guest(vcpu);
3439 if (!user_access_begin(st, sizeof(*st)))
3442 if (!user_access_begin(st, sizeof(*st)))
3445 unsafe_put_user(0, &st->preempted, out);
3446 vcpu->arch.st.preempted = 0;
3449 unsafe_get_user(version, &st->version, out);
3451 version += 1; /* first time write, random junk */
3454 unsafe_put_user(version, &st->version, out);
3458 unsafe_get_user(steal, &st->steal, out);
3459 steal += current->sched_info.run_delay -
3460 vcpu->arch.st.last_steal;
3461 vcpu->arch.st.last_steal = current->sched_info.run_delay;
3462 unsafe_put_user(steal, &st->steal, out);
3465 unsafe_put_user(version, &st->version, out);
3470 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3473 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3476 u32 msr = msr_info->index;
3477 u64 data = msr_info->data;
3479 if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3480 return kvm_xen_write_hypercall_page(vcpu, data);
3483 case MSR_AMD64_NB_CFG:
3484 case MSR_IA32_UCODE_WRITE:
3485 case MSR_VM_HSAVE_PA:
3486 case MSR_AMD64_PATCH_LOADER:
3487 case MSR_AMD64_BU_CFG2:
3488 case MSR_AMD64_DC_CFG:
3489 case MSR_F15H_EX_CFG:
3492 case MSR_IA32_UCODE_REV:
3493 if (msr_info->host_initiated)
3494 vcpu->arch.microcode_version = data;
3496 case MSR_IA32_ARCH_CAPABILITIES:
3497 if (!msr_info->host_initiated)
3499 vcpu->arch.arch_capabilities = data;
3501 case MSR_IA32_PERF_CAPABILITIES: {
3502 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3504 if (!msr_info->host_initiated)
3506 if (kvm_get_msr_feature(&msr_ent))
3508 if (data & ~msr_ent.data)
3511 vcpu->arch.perf_capabilities = data;
3516 return set_efer(vcpu, msr_info);
3518 data &= ~(u64)0x40; /* ignore flush filter disable */
3519 data &= ~(u64)0x100; /* ignore ignne emulation enable */
3520 data &= ~(u64)0x8; /* ignore TLB cache disable */
3522 /* Handle McStatusWrEn */
3523 if (data == BIT_ULL(18)) {
3524 vcpu->arch.msr_hwcr = data;
3525 } else if (data != 0) {
3526 vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3531 case MSR_FAM10H_MMIO_CONF_BASE:
3533 vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3538 case 0x200 ... 0x2ff:
3539 return kvm_mtrr_set_msr(vcpu, msr, data);
3540 case MSR_IA32_APICBASE:
3541 return kvm_set_apic_base(vcpu, msr_info);
3542 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3543 return kvm_x2apic_msr_write(vcpu, msr, data);
3544 case MSR_IA32_TSC_DEADLINE:
3545 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3547 case MSR_IA32_TSC_ADJUST:
3548 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3549 if (!msr_info->host_initiated) {
3550 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3551 adjust_tsc_offset_guest(vcpu, adj);
3552 /* Before back to guest, tsc_timestamp must be adjusted
3553 * as well, otherwise guest's percpu pvclock time could jump.
3555 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3557 vcpu->arch.ia32_tsc_adjust_msr = data;
3560 case MSR_IA32_MISC_ENABLE:
3561 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3562 ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3563 if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3565 vcpu->arch.ia32_misc_enable_msr = data;
3566 kvm_update_cpuid_runtime(vcpu);
3568 vcpu->arch.ia32_misc_enable_msr = data;
3571 case MSR_IA32_SMBASE:
3572 if (!msr_info->host_initiated)
3574 vcpu->arch.smbase = data;
3576 case MSR_IA32_POWER_CTL:
3577 vcpu->arch.msr_ia32_power_ctl = data;
3580 if (msr_info->host_initiated) {
3581 kvm_synchronize_tsc(vcpu, data);
3583 u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3584 adjust_tsc_offset_guest(vcpu, adj);
3585 vcpu->arch.ia32_tsc_adjust_msr += adj;
3589 if (!msr_info->host_initiated &&
3590 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3593 * KVM supports exposing PT to the guest, but does not support
3594 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3595 * XSAVES/XRSTORS to save/restore PT MSRs.
3597 if (data & ~supported_xss)
3599 vcpu->arch.ia32_xss = data;
3600 kvm_update_cpuid_runtime(vcpu);
3603 if (!msr_info->host_initiated)
3605 vcpu->arch.smi_count = data;
3607 case MSR_KVM_WALL_CLOCK_NEW:
3608 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3611 vcpu->kvm->arch.wall_clock = data;
3612 kvm_write_wall_clock(vcpu->kvm, data, 0);
3614 case MSR_KVM_WALL_CLOCK:
3615 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3618 vcpu->kvm->arch.wall_clock = data;
3619 kvm_write_wall_clock(vcpu->kvm, data, 0);
3621 case MSR_KVM_SYSTEM_TIME_NEW:
3622 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3625 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3627 case MSR_KVM_SYSTEM_TIME:
3628 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3631 kvm_write_system_time(vcpu, data, true, msr_info->host_initiated);
3633 case MSR_KVM_ASYNC_PF_EN:
3634 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3637 if (kvm_pv_enable_async_pf(vcpu, data))
3640 case MSR_KVM_ASYNC_PF_INT:
3641 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3644 if (kvm_pv_enable_async_pf_int(vcpu, data))
3647 case MSR_KVM_ASYNC_PF_ACK:
3648 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3651 vcpu->arch.apf.pageready_pending = false;
3652 kvm_check_async_pf_completion(vcpu);
3655 case MSR_KVM_STEAL_TIME:
3656 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3659 if (unlikely(!sched_info_on()))
3662 if (data & KVM_STEAL_RESERVED_MASK)
3665 vcpu->arch.st.msr_val = data;
3667 if (!(data & KVM_MSR_ENABLED))
3670 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3673 case MSR_KVM_PV_EOI_EN:
3674 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3677 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3681 case MSR_KVM_POLL_CONTROL:
3682 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3685 /* only enable bit supported */
3686 if (data & (-1ULL << 1))
3689 vcpu->arch.msr_kvm_poll_control = data;
3692 case MSR_IA32_MCG_CTL:
3693 case MSR_IA32_MCG_STATUS:
3694 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3695 return set_msr_mce(vcpu, msr_info);
3697 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3698 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3701 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3702 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3703 if (kvm_pmu_is_valid_msr(vcpu, msr))
3704 return kvm_pmu_set_msr(vcpu, msr_info);
3706 if (pr || data != 0)
3707 vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3708 "0x%x data 0x%llx\n", msr, data);
3710 case MSR_K7_CLK_CTL:
3712 * Ignore all writes to this no longer documented MSR.
3713 * Writes are only relevant for old K7 processors,
3714 * all pre-dating SVM, but a recommended workaround from
3715 * AMD for these chips. It is possible to specify the
3716 * affected processor models on the command line, hence
3717 * the need to ignore the workaround.
3720 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3721 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3722 case HV_X64_MSR_SYNDBG_OPTIONS:
3723 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3724 case HV_X64_MSR_CRASH_CTL:
3725 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3726 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3727 case HV_X64_MSR_TSC_EMULATION_CONTROL:
3728 case HV_X64_MSR_TSC_EMULATION_STATUS:
3729 return kvm_hv_set_msr_common(vcpu, msr, data,
3730 msr_info->host_initiated);
3731 case MSR_IA32_BBL_CR_CTL3:
3732 /* Drop writes to this legacy MSR -- see rdmsr
3733 * counterpart for further detail.
3735 if (report_ignored_msrs)
3736 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3739 case MSR_AMD64_OSVW_ID_LENGTH:
3740 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3742 vcpu->arch.osvw.length = data;
3744 case MSR_AMD64_OSVW_STATUS:
3745 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3747 vcpu->arch.osvw.status = data;
3749 case MSR_PLATFORM_INFO:
3750 if (!msr_info->host_initiated ||
3751 (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3752 cpuid_fault_enabled(vcpu)))
3754 vcpu->arch.msr_platform_info = data;
3756 case MSR_MISC_FEATURES_ENABLES:
3757 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3758 (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3759 !supports_cpuid_fault(vcpu)))
3761 vcpu->arch.msr_misc_features_enables = data;
3763 #ifdef CONFIG_X86_64
3765 if (!msr_info->host_initiated &&
3766 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3769 if (data & ~kvm_guest_supported_xfd(vcpu))
3772 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3774 case MSR_IA32_XFD_ERR:
3775 if (!msr_info->host_initiated &&
3776 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3779 if (data & ~kvm_guest_supported_xfd(vcpu))
3782 vcpu->arch.guest_fpu.xfd_err = data;
3786 if (kvm_pmu_is_valid_msr(vcpu, msr))
3787 return kvm_pmu_set_msr(vcpu, msr_info);
3788 return KVM_MSR_RET_INVALID;
3792 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3794 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3797 u64 mcg_cap = vcpu->arch.mcg_cap;
3798 unsigned bank_num = mcg_cap & 0xff;
3801 case MSR_IA32_P5_MC_ADDR:
3802 case MSR_IA32_P5_MC_TYPE:
3805 case MSR_IA32_MCG_CAP:
3806 data = vcpu->arch.mcg_cap;
3808 case MSR_IA32_MCG_CTL:
3809 if (!(mcg_cap & MCG_CTL_P) && !host)
3811 data = vcpu->arch.mcg_ctl;
3813 case MSR_IA32_MCG_STATUS:
3814 data = vcpu->arch.mcg_status;
3817 if (msr >= MSR_IA32_MC0_CTL &&
3818 msr < MSR_IA32_MCx_CTL(bank_num)) {
3819 u32 offset = array_index_nospec(
3820 msr - MSR_IA32_MC0_CTL,
3821 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3823 data = vcpu->arch.mce_banks[offset];
3832 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3834 switch (msr_info->index) {
3835 case MSR_IA32_PLATFORM_ID:
3836 case MSR_IA32_EBL_CR_POWERON:
3837 case MSR_IA32_LASTBRANCHFROMIP:
3838 case MSR_IA32_LASTBRANCHTOIP:
3839 case MSR_IA32_LASTINTFROMIP:
3840 case MSR_IA32_LASTINTTOIP:
3841 case MSR_AMD64_SYSCFG:
3842 case MSR_K8_TSEG_ADDR:
3843 case MSR_K8_TSEG_MASK:
3844 case MSR_VM_HSAVE_PA:
3845 case MSR_K8_INT_PENDING_MSG:
3846 case MSR_AMD64_NB_CFG:
3847 case MSR_FAM10H_MMIO_CONF_BASE:
3848 case MSR_AMD64_BU_CFG2:
3849 case MSR_IA32_PERF_CTL:
3850 case MSR_AMD64_DC_CFG:
3851 case MSR_F15H_EX_CFG:
3853 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3854 * limit) MSRs. Just return 0, as we do not want to expose the host
3855 * data here. Do not conditionalize this on CPUID, as KVM does not do
3856 * so for existing CPU-specific MSRs.
3858 case MSR_RAPL_POWER_UNIT:
3859 case MSR_PP0_ENERGY_STATUS: /* Power plane 0 (core) */
3860 case MSR_PP1_ENERGY_STATUS: /* Power plane 1 (graphics uncore) */
3861 case MSR_PKG_ENERGY_STATUS: /* Total package */
3862 case MSR_DRAM_ENERGY_STATUS: /* DRAM controller */
3865 case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3866 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3867 return kvm_pmu_get_msr(vcpu, msr_info);
3868 if (!msr_info->host_initiated)
3872 case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3873 case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3874 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3875 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3876 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3877 return kvm_pmu_get_msr(vcpu, msr_info);
3880 case MSR_IA32_UCODE_REV:
3881 msr_info->data = vcpu->arch.microcode_version;
3883 case MSR_IA32_ARCH_CAPABILITIES:
3884 if (!msr_info->host_initiated &&
3885 !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3887 msr_info->data = vcpu->arch.arch_capabilities;
3889 case MSR_IA32_PERF_CAPABILITIES:
3890 if (!msr_info->host_initiated &&
3891 !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3893 msr_info->data = vcpu->arch.perf_capabilities;
3895 case MSR_IA32_POWER_CTL:
3896 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3898 case MSR_IA32_TSC: {
3900 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3901 * even when not intercepted. AMD manual doesn't explicitly
3902 * state this but appears to behave the same.
3904 * On userspace reads and writes, however, we unconditionally
3905 * return L1's TSC value to ensure backwards-compatible
3906 * behavior for migration.
3910 if (msr_info->host_initiated) {
3911 offset = vcpu->arch.l1_tsc_offset;
3912 ratio = vcpu->arch.l1_tsc_scaling_ratio;
3914 offset = vcpu->arch.tsc_offset;
3915 ratio = vcpu->arch.tsc_scaling_ratio;
3918 msr_info->data = kvm_scale_tsc(rdtsc(), ratio) + offset;
3922 case 0x200 ... 0x2ff:
3923 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3924 case 0xcd: /* fsb frequency */
3928 * MSR_EBC_FREQUENCY_ID
3929 * Conservative value valid for even the basic CPU models.
3930 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3931 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3932 * and 266MHz for model 3, or 4. Set Core Clock
3933 * Frequency to System Bus Frequency Ratio to 1 (bits
3934 * 31:24) even though these are only valid for CPU
3935 * models > 2, however guests may end up dividing or
3936 * multiplying by zero otherwise.
3938 case MSR_EBC_FREQUENCY_ID:
3939 msr_info->data = 1 << 24;
3941 case MSR_IA32_APICBASE:
3942 msr_info->data = kvm_get_apic_base(vcpu);
3944 case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3945 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3946 case MSR_IA32_TSC_DEADLINE:
3947 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3949 case MSR_IA32_TSC_ADJUST:
3950 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3952 case MSR_IA32_MISC_ENABLE:
3953 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3955 case MSR_IA32_SMBASE:
3956 if (!msr_info->host_initiated)
3958 msr_info->data = vcpu->arch.smbase;
3961 msr_info->data = vcpu->arch.smi_count;
3963 case MSR_IA32_PERF_STATUS:
3964 /* TSC increment by tick */
3965 msr_info->data = 1000ULL;
3966 /* CPU multiplier */
3967 msr_info->data |= (((uint64_t)4ULL) << 40);
3970 msr_info->data = vcpu->arch.efer;
3972 case MSR_KVM_WALL_CLOCK:
3973 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3976 msr_info->data = vcpu->kvm->arch.wall_clock;
3978 case MSR_KVM_WALL_CLOCK_NEW:
3979 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3982 msr_info->data = vcpu->kvm->arch.wall_clock;
3984 case MSR_KVM_SYSTEM_TIME:
3985 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3988 msr_info->data = vcpu->arch.time;
3990 case MSR_KVM_SYSTEM_TIME_NEW:
3991 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3994 msr_info->data = vcpu->arch.time;
3996 case MSR_KVM_ASYNC_PF_EN:
3997 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
4000 msr_info->data = vcpu->arch.apf.msr_en_val;
4002 case MSR_KVM_ASYNC_PF_INT:
4003 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4006 msr_info->data = vcpu->arch.apf.msr_int_val;
4008 case MSR_KVM_ASYNC_PF_ACK:
4009 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
4014 case MSR_KVM_STEAL_TIME:
4015 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
4018 msr_info->data = vcpu->arch.st.msr_val;
4020 case MSR_KVM_PV_EOI_EN:
4021 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
4024 msr_info->data = vcpu->arch.pv_eoi.msr_val;
4026 case MSR_KVM_POLL_CONTROL:
4027 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
4030 msr_info->data = vcpu->arch.msr_kvm_poll_control;
4032 case MSR_IA32_P5_MC_ADDR:
4033 case MSR_IA32_P5_MC_TYPE:
4034 case MSR_IA32_MCG_CAP:
4035 case MSR_IA32_MCG_CTL:
4036 case MSR_IA32_MCG_STATUS:
4037 case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
4038 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
4039 msr_info->host_initiated);
4041 if (!msr_info->host_initiated &&
4042 !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
4044 msr_info->data = vcpu->arch.ia32_xss;
4046 case MSR_K7_CLK_CTL:
4048 * Provide expected ramp-up count for K7. All other
4049 * are set to zero, indicating minimum divisors for
4052 * This prevents guest kernels on AMD host with CPU
4053 * type 6, model 8 and higher from exploding due to
4054 * the rdmsr failing.
4056 msr_info->data = 0x20000000;
4058 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
4059 case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4060 case HV_X64_MSR_SYNDBG_OPTIONS:
4061 case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4062 case HV_X64_MSR_CRASH_CTL:
4063 case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4064 case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4065 case HV_X64_MSR_TSC_EMULATION_CONTROL:
4066 case HV_X64_MSR_TSC_EMULATION_STATUS:
4067 return kvm_hv_get_msr_common(vcpu,
4068 msr_info->index, &msr_info->data,
4069 msr_info->host_initiated);
4070 case MSR_IA32_BBL_CR_CTL3:
4071 /* This legacy MSR exists but isn't fully documented in current
4072 * silicon. It is however accessed by winxp in very narrow
4073 * scenarios where it sets bit #19, itself documented as
4074 * a "reserved" bit. Best effort attempt to source coherent
4075 * read data here should the balance of the register be
4076 * interpreted by the guest:
4078 * L2 cache control register 3: 64GB range, 256KB size,
4079 * enabled, latency 0x1, configured
4081 msr_info->data = 0xbe702111;
4083 case MSR_AMD64_OSVW_ID_LENGTH:
4084 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4086 msr_info->data = vcpu->arch.osvw.length;
4088 case MSR_AMD64_OSVW_STATUS:
4089 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4091 msr_info->data = vcpu->arch.osvw.status;
4093 case MSR_PLATFORM_INFO:
4094 if (!msr_info->host_initiated &&
4095 !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4097 msr_info->data = vcpu->arch.msr_platform_info;
4099 case MSR_MISC_FEATURES_ENABLES:
4100 msr_info->data = vcpu->arch.msr_misc_features_enables;
4103 msr_info->data = vcpu->arch.msr_hwcr;
4105 #ifdef CONFIG_X86_64
4107 if (!msr_info->host_initiated &&
4108 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4111 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4113 case MSR_IA32_XFD_ERR:
4114 if (!msr_info->host_initiated &&
4115 !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4118 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4122 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4123 return kvm_pmu_get_msr(vcpu, msr_info);
4124 return KVM_MSR_RET_INVALID;
4128 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4131 * Read or write a bunch of msrs. All parameters are kernel addresses.
4133 * @return number of msrs set successfully.
4135 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4136 struct kvm_msr_entry *entries,
4137 int (*do_msr)(struct kvm_vcpu *vcpu,
4138 unsigned index, u64 *data))
4142 for (i = 0; i < msrs->nmsrs; ++i)
4143 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4150 * Read or write a bunch of msrs. Parameters are user addresses.
4152 * @return number of msrs set successfully.
4154 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4155 int (*do_msr)(struct kvm_vcpu *vcpu,
4156 unsigned index, u64 *data),
4159 struct kvm_msrs msrs;
4160 struct kvm_msr_entry *entries;
4165 if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4169 if (msrs.nmsrs >= MAX_IO_MSRS)
4172 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4173 entries = memdup_user(user_msrs->entries, size);
4174 if (IS_ERR(entries)) {
4175 r = PTR_ERR(entries);
4179 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4184 if (writeback && copy_to_user(user_msrs->entries, entries, size))
4195 static inline bool kvm_can_mwait_in_guest(void)
4197 return boot_cpu_has(X86_FEATURE_MWAIT) &&
4198 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4199 boot_cpu_has(X86_FEATURE_ARAT);
4202 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4203 struct kvm_cpuid2 __user *cpuid_arg)
4205 struct kvm_cpuid2 cpuid;
4209 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4212 r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4217 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4223 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4228 case KVM_CAP_IRQCHIP:
4230 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4231 case KVM_CAP_SET_TSS_ADDR:
4232 case KVM_CAP_EXT_CPUID:
4233 case KVM_CAP_EXT_EMUL_CPUID:
4234 case KVM_CAP_CLOCKSOURCE:
4236 case KVM_CAP_NOP_IO_DELAY:
4237 case KVM_CAP_MP_STATE:
4238 case KVM_CAP_SYNC_MMU:
4239 case KVM_CAP_USER_NMI:
4240 case KVM_CAP_REINJECT_CONTROL:
4241 case KVM_CAP_IRQ_INJECT_STATUS:
4242 case KVM_CAP_IOEVENTFD:
4243 case KVM_CAP_IOEVENTFD_NO_LENGTH:
4245 case KVM_CAP_PIT_STATE2:
4246 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4247 case KVM_CAP_VCPU_EVENTS:
4248 case KVM_CAP_HYPERV:
4249 case KVM_CAP_HYPERV_VAPIC:
4250 case KVM_CAP_HYPERV_SPIN:
4251 case KVM_CAP_HYPERV_SYNIC:
4252 case KVM_CAP_HYPERV_SYNIC2:
4253 case KVM_CAP_HYPERV_VP_INDEX:
4254 case KVM_CAP_HYPERV_EVENTFD:
4255 case KVM_CAP_HYPERV_TLBFLUSH:
4256 case KVM_CAP_HYPERV_SEND_IPI:
4257 case KVM_CAP_HYPERV_CPUID:
4258 case KVM_CAP_HYPERV_ENFORCE_CPUID:
4259 case KVM_CAP_SYS_HYPERV_CPUID:
4260 case KVM_CAP_PCI_SEGMENT:
4261 case KVM_CAP_DEBUGREGS:
4262 case KVM_CAP_X86_ROBUST_SINGLESTEP:
4264 case KVM_CAP_ASYNC_PF:
4265 case KVM_CAP_ASYNC_PF_INT:
4266 case KVM_CAP_GET_TSC_KHZ:
4267 case KVM_CAP_KVMCLOCK_CTRL:
4268 case KVM_CAP_READONLY_MEM:
4269 case KVM_CAP_HYPERV_TIME:
4270 case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4271 case KVM_CAP_TSC_DEADLINE_TIMER:
4272 case KVM_CAP_DISABLE_QUIRKS:
4273 case KVM_CAP_SET_BOOT_CPU_ID:
4274 case KVM_CAP_SPLIT_IRQCHIP:
4275 case KVM_CAP_IMMEDIATE_EXIT:
4276 case KVM_CAP_PMU_EVENT_FILTER:
4277 case KVM_CAP_GET_MSR_FEATURES:
4278 case KVM_CAP_MSR_PLATFORM_INFO:
4279 case KVM_CAP_EXCEPTION_PAYLOAD:
4280 case KVM_CAP_SET_GUEST_DEBUG:
4281 case KVM_CAP_LAST_CPU:
4282 case KVM_CAP_X86_USER_SPACE_MSR:
4283 case KVM_CAP_X86_MSR_FILTER:
4284 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4285 #ifdef CONFIG_X86_SGX_KVM
4286 case KVM_CAP_SGX_ATTRIBUTE:
4288 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4289 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4290 case KVM_CAP_SREGS2:
4291 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4292 case KVM_CAP_VCPU_ATTRIBUTES:
4293 case KVM_CAP_SYS_ATTRIBUTES:
4295 case KVM_CAP_ENABLE_CAP:
4298 case KVM_CAP_EXIT_HYPERCALL:
4299 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4301 case KVM_CAP_SET_GUEST_DEBUG2:
4302 return KVM_GUESTDBG_VALID_MASK;
4303 #ifdef CONFIG_KVM_XEN
4304 case KVM_CAP_XEN_HVM:
4305 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4306 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4307 KVM_XEN_HVM_CONFIG_SHARED_INFO |
4308 KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL |
4309 KVM_XEN_HVM_CONFIG_EVTCHN_SEND;
4310 if (sched_info_on())
4311 r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4314 case KVM_CAP_SYNC_REGS:
4315 r = KVM_SYNC_X86_VALID_FIELDS;
4317 case KVM_CAP_ADJUST_CLOCK:
4318 r = KVM_CLOCK_VALID_FLAGS;
4320 case KVM_CAP_X86_DISABLE_EXITS:
4321 r |= KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4322 KVM_X86_DISABLE_EXITS_CSTATE;
4323 if(kvm_can_mwait_in_guest())
4324 r |= KVM_X86_DISABLE_EXITS_MWAIT;
4326 case KVM_CAP_X86_SMM:
4327 /* SMBASE is usually relocated above 1M on modern chipsets,
4328 * and SMM handlers might indeed rely on 4G segment limits,
4329 * so do not report SMM to be available if real mode is
4330 * emulated via vm86 mode. Still, do not go to great lengths
4331 * to avoid userspace's usage of the feature, because it is a
4332 * fringe case that is not enabled except via specific settings
4333 * of the module parameters.
4335 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4337 case KVM_CAP_NR_VCPUS:
4338 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4340 case KVM_CAP_MAX_VCPUS:
4343 case KVM_CAP_MAX_VCPU_ID:
4344 r = KVM_MAX_VCPU_IDS;
4346 case KVM_CAP_PV_MMU: /* obsolete */
4350 r = KVM_MAX_MCE_BANKS;
4353 r = boot_cpu_has(X86_FEATURE_XSAVE);
4355 case KVM_CAP_TSC_CONTROL:
4356 case KVM_CAP_VM_TSC_CONTROL:
4357 r = kvm_has_tsc_control;
4359 case KVM_CAP_X2APIC_API:
4360 r = KVM_X2APIC_API_VALID_FLAGS;
4362 case KVM_CAP_NESTED_STATE:
4363 r = kvm_x86_ops.nested_ops->get_state ?
4364 kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4366 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4367 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4369 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4370 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4372 case KVM_CAP_SMALLER_MAXPHYADDR:
4373 r = (int) allow_smaller_maxphyaddr;
4375 case KVM_CAP_STEAL_TIME:
4376 r = sched_info_on();
4378 case KVM_CAP_X86_BUS_LOCK_EXIT:
4379 if (kvm_has_bus_lock_exit)
4380 r = KVM_BUS_LOCK_DETECTION_OFF |
4381 KVM_BUS_LOCK_DETECTION_EXIT;
4385 case KVM_CAP_XSAVE2: {
4386 u64 guest_perm = xstate_get_guest_group_perm();
4388 r = xstate_required_size(supported_xcr0 & guest_perm, false);
4389 if (r < sizeof(struct kvm_xsave))
4390 r = sizeof(struct kvm_xsave);
4392 case KVM_CAP_PMU_CAPABILITY:
4393 r = enable_pmu ? KVM_CAP_PMU_VALID_MASK : 0;
4396 case KVM_CAP_DISABLE_QUIRKS2:
4397 r = KVM_X86_VALID_QUIRKS;
4405 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4407 void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4409 if ((u64)(unsigned long)uaddr != attr->addr)
4410 return ERR_PTR_USR(-EFAULT);
4414 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4416 u64 __user *uaddr = kvm_get_attr_addr(attr);
4422 return PTR_ERR(uaddr);
4424 switch (attr->attr) {
4425 case KVM_X86_XCOMP_GUEST_SUPP:
4426 if (put_user(supported_xcr0, uaddr))
4435 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4440 switch (attr->attr) {
4441 case KVM_X86_XCOMP_GUEST_SUPP:
4448 long kvm_arch_dev_ioctl(struct file *filp,
4449 unsigned int ioctl, unsigned long arg)
4451 void __user *argp = (void __user *)arg;
4455 case KVM_GET_MSR_INDEX_LIST: {
4456 struct kvm_msr_list __user *user_msr_list = argp;
4457 struct kvm_msr_list msr_list;
4461 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4464 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4465 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4468 if (n < msr_list.nmsrs)
4471 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4472 num_msrs_to_save * sizeof(u32)))
4474 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4476 num_emulated_msrs * sizeof(u32)))
4481 case KVM_GET_SUPPORTED_CPUID:
4482 case KVM_GET_EMULATED_CPUID: {
4483 struct kvm_cpuid2 __user *cpuid_arg = argp;
4484 struct kvm_cpuid2 cpuid;
4487 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4490 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4496 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4501 case KVM_X86_GET_MCE_CAP_SUPPORTED:
4503 if (copy_to_user(argp, &kvm_mce_cap_supported,
4504 sizeof(kvm_mce_cap_supported)))
4508 case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4509 struct kvm_msr_list __user *user_msr_list = argp;
4510 struct kvm_msr_list msr_list;
4514 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4517 msr_list.nmsrs = num_msr_based_features;
4518 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4521 if (n < msr_list.nmsrs)
4524 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4525 num_msr_based_features * sizeof(u32)))
4531 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4533 case KVM_GET_SUPPORTED_HV_CPUID:
4534 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4536 case KVM_GET_DEVICE_ATTR: {
4537 struct kvm_device_attr attr;
4539 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4541 r = kvm_x86_dev_get_attr(&attr);
4544 case KVM_HAS_DEVICE_ATTR: {
4545 struct kvm_device_attr attr;
4547 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4549 r = kvm_x86_dev_has_attr(&attr);
4560 static void wbinvd_ipi(void *garbage)
4565 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4567 return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4570 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4572 /* Address WBINVD may be executed by guest */
4573 if (need_emulate_wbinvd(vcpu)) {
4574 if (static_call(kvm_x86_has_wbinvd_exit)())
4575 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4576 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4577 smp_call_function_single(vcpu->cpu,
4578 wbinvd_ipi, NULL, 1);
4581 static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4583 /* Save host pkru register if supported */
4584 vcpu->arch.host_pkru = read_pkru();
4586 /* Apply any externally detected TSC adjustments (due to suspend) */
4587 if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4588 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4589 vcpu->arch.tsc_offset_adjustment = 0;
4590 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4593 if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4594 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4595 rdtsc() - vcpu->arch.last_host_tsc;
4597 mark_tsc_unstable("KVM discovered backwards TSC");
4599 if (kvm_check_tsc_unstable()) {
4600 u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4601 vcpu->arch.last_guest_tsc);
4602 kvm_vcpu_write_tsc_offset(vcpu, offset);
4603 vcpu->arch.tsc_catchup = 1;
4606 if (kvm_lapic_hv_timer_in_use(vcpu))
4607 kvm_lapic_restart_hv_timer(vcpu);
4610 * On a host with synchronized TSC, there is no need to update
4611 * kvmclock on vcpu->cpu migration
4613 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4614 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4615 if (vcpu->cpu != cpu)
4616 kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4620 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4623 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4625 struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4626 struct kvm_steal_time __user *st;
4627 struct kvm_memslots *slots;
4628 static const u8 preempted = KVM_VCPU_PREEMPTED;
4631 * The vCPU can be marked preempted if and only if the VM-Exit was on
4632 * an instruction boundary and will not trigger guest emulation of any
4633 * kind (see vcpu_run). Vendor specific code controls (conservatively)
4634 * when this is true, for example allowing the vCPU to be marked
4635 * preempted if and only if the VM-Exit was due to a host interrupt.
4637 if (!vcpu->arch.at_instruction_boundary) {
4638 vcpu->stat.preemption_other++;
4642 vcpu->stat.preemption_reported++;
4643 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4646 if (vcpu->arch.st.preempted)
4649 /* This happens on process exit */
4650 if (unlikely(current->mm != vcpu->kvm->mm))
4653 slots = kvm_memslots(vcpu->kvm);
4655 if (unlikely(slots->generation != ghc->generation ||
4656 kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4659 st = (struct kvm_steal_time __user *)ghc->hva;
4660 BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4662 if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4663 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4665 mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4668 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4672 if (vcpu->preempted) {
4673 if (!vcpu->arch.guest_state_protected)
4674 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4677 * Take the srcu lock as memslots will be accessed to check the gfn
4678 * cache generation against the memslots generation.
4680 idx = srcu_read_lock(&vcpu->kvm->srcu);
4681 if (kvm_xen_msr_enabled(vcpu->kvm))
4682 kvm_xen_runstate_set_preempted(vcpu);
4684 kvm_steal_time_set_preempted(vcpu);
4685 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4688 static_call(kvm_x86_vcpu_put)(vcpu);
4689 vcpu->arch.last_host_tsc = rdtsc();
4692 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4693 struct kvm_lapic_state *s)
4695 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4697 return kvm_apic_get_state(vcpu, s);
4700 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4701 struct kvm_lapic_state *s)
4705 r = kvm_apic_set_state(vcpu, s);
4708 update_cr8_intercept(vcpu);
4713 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4716 * We can accept userspace's request for interrupt injection
4717 * as long as we have a place to store the interrupt number.
4718 * The actual injection will happen when the CPU is able to
4719 * deliver the interrupt.
4721 if (kvm_cpu_has_extint(vcpu))
4724 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4725 return (!lapic_in_kernel(vcpu) ||
4726 kvm_apic_accept_pic_intr(vcpu));
4729 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4732 * Do not cause an interrupt window exit if an exception
4733 * is pending or an event needs reinjection; userspace
4734 * might want to inject the interrupt manually using KVM_SET_REGS
4735 * or KVM_SET_SREGS. For that to work, we must be at an
4736 * instruction boundary and with no events half-injected.
4738 return (kvm_arch_interrupt_allowed(vcpu) &&
4739 kvm_cpu_accept_dm_intr(vcpu) &&
4740 !kvm_event_needs_reinjection(vcpu) &&
4741 !vcpu->arch.exception.pending);
4744 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4745 struct kvm_interrupt *irq)
4747 if (irq->irq >= KVM_NR_INTERRUPTS)
4750 if (!irqchip_in_kernel(vcpu->kvm)) {
4751 kvm_queue_interrupt(vcpu, irq->irq, false);
4752 kvm_make_request(KVM_REQ_EVENT, vcpu);
4757 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4758 * fail for in-kernel 8259.
4760 if (pic_in_kernel(vcpu->kvm))
4763 if (vcpu->arch.pending_external_vector != -1)
4766 vcpu->arch.pending_external_vector = irq->irq;
4767 kvm_make_request(KVM_REQ_EVENT, vcpu);
4771 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4773 kvm_inject_nmi(vcpu);
4778 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4780 kvm_make_request(KVM_REQ_SMI, vcpu);
4785 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4786 struct kvm_tpr_access_ctl *tac)
4790 vcpu->arch.tpr_access_reporting = !!tac->enabled;
4794 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4798 unsigned bank_num = mcg_cap & 0xff, bank;
4801 if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4803 if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4806 vcpu->arch.mcg_cap = mcg_cap;
4807 /* Init IA32_MCG_CTL to all 1s */
4808 if (mcg_cap & MCG_CTL_P)
4809 vcpu->arch.mcg_ctl = ~(u64)0;
4810 /* Init IA32_MCi_CTL to all 1s */
4811 for (bank = 0; bank < bank_num; bank++)
4812 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4814 static_call(kvm_x86_setup_mce)(vcpu);
4819 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4820 struct kvm_x86_mce *mce)
4822 u64 mcg_cap = vcpu->arch.mcg_cap;
4823 unsigned bank_num = mcg_cap & 0xff;
4824 u64 *banks = vcpu->arch.mce_banks;
4826 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4829 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4830 * reporting is disabled
4832 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4833 vcpu->arch.mcg_ctl != ~(u64)0)
4835 banks += 4 * mce->bank;
4837 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4838 * reporting is disabled for the bank
4840 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4842 if (mce->status & MCI_STATUS_UC) {
4843 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4844 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4845 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4848 if (banks[1] & MCI_STATUS_VAL)
4849 mce->status |= MCI_STATUS_OVER;
4850 banks[2] = mce->addr;
4851 banks[3] = mce->misc;
4852 vcpu->arch.mcg_status = mce->mcg_status;
4853 banks[1] = mce->status;
4854 kvm_queue_exception(vcpu, MC_VECTOR);
4855 } else if (!(banks[1] & MCI_STATUS_VAL)
4856 || !(banks[1] & MCI_STATUS_UC)) {
4857 if (banks[1] & MCI_STATUS_VAL)
4858 mce->status |= MCI_STATUS_OVER;
4859 banks[2] = mce->addr;
4860 banks[3] = mce->misc;
4861 banks[1] = mce->status;
4863 banks[1] |= MCI_STATUS_OVER;
4867 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4868 struct kvm_vcpu_events *events)
4872 if (kvm_check_request(KVM_REQ_SMI, vcpu))
4876 * In guest mode, payload delivery should be deferred,
4877 * so that the L1 hypervisor can intercept #PF before
4878 * CR2 is modified (or intercept #DB before DR6 is
4879 * modified under nVMX). Unless the per-VM capability,
4880 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4881 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4882 * opportunistically defer the exception payload, deliver it if the
4883 * capability hasn't been requested before processing a
4884 * KVM_GET_VCPU_EVENTS.
4886 if (!vcpu->kvm->arch.exception_payload_enabled &&
4887 vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4888 kvm_deliver_exception_payload(vcpu);
4891 * The API doesn't provide the instruction length for software
4892 * exceptions, so don't report them. As long as the guest RIP
4893 * isn't advanced, we should expect to encounter the exception
4896 if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4897 events->exception.injected = 0;
4898 events->exception.pending = 0;
4900 events->exception.injected = vcpu->arch.exception.injected;
4901 events->exception.pending = vcpu->arch.exception.pending;
4903 * For ABI compatibility, deliberately conflate
4904 * pending and injected exceptions when
4905 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4907 if (!vcpu->kvm->arch.exception_payload_enabled)
4908 events->exception.injected |=
4909 vcpu->arch.exception.pending;
4911 events->exception.nr = vcpu->arch.exception.nr;
4912 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4913 events->exception.error_code = vcpu->arch.exception.error_code;
4914 events->exception_has_payload = vcpu->arch.exception.has_payload;
4915 events->exception_payload = vcpu->arch.exception.payload;
4917 events->interrupt.injected =
4918 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4919 events->interrupt.nr = vcpu->arch.interrupt.nr;
4920 events->interrupt.soft = 0;
4921 events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4923 events->nmi.injected = vcpu->arch.nmi_injected;
4924 events->nmi.pending = vcpu->arch.nmi_pending != 0;
4925 events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4926 events->nmi.pad = 0;
4928 events->sipi_vector = 0; /* never valid when reporting to user space */
4930 events->smi.smm = is_smm(vcpu);
4931 events->smi.pending = vcpu->arch.smi_pending;
4932 events->smi.smm_inside_nmi =
4933 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4934 events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4936 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4937 | KVM_VCPUEVENT_VALID_SHADOW
4938 | KVM_VCPUEVENT_VALID_SMM);
4939 if (vcpu->kvm->arch.exception_payload_enabled)
4940 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4942 memset(&events->reserved, 0, sizeof(events->reserved));
4945 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4947 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4948 struct kvm_vcpu_events *events)
4950 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4951 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4952 | KVM_VCPUEVENT_VALID_SHADOW
4953 | KVM_VCPUEVENT_VALID_SMM
4954 | KVM_VCPUEVENT_VALID_PAYLOAD))
4957 if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4958 if (!vcpu->kvm->arch.exception_payload_enabled)
4960 if (events->exception.pending)
4961 events->exception.injected = 0;
4963 events->exception_has_payload = 0;
4965 events->exception.pending = 0;
4966 events->exception_has_payload = 0;
4969 if ((events->exception.injected || events->exception.pending) &&
4970 (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4973 /* INITs are latched while in SMM */
4974 if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4975 (events->smi.smm || events->smi.pending) &&
4976 vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4980 vcpu->arch.exception.injected = events->exception.injected;
4981 vcpu->arch.exception.pending = events->exception.pending;
4982 vcpu->arch.exception.nr = events->exception.nr;
4983 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4984 vcpu->arch.exception.error_code = events->exception.error_code;
4985 vcpu->arch.exception.has_payload = events->exception_has_payload;
4986 vcpu->arch.exception.payload = events->exception_payload;
4988 vcpu->arch.interrupt.injected = events->interrupt.injected;
4989 vcpu->arch.interrupt.nr = events->interrupt.nr;
4990 vcpu->arch.interrupt.soft = events->interrupt.soft;
4991 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4992 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4993 events->interrupt.shadow);
4995 vcpu->arch.nmi_injected = events->nmi.injected;
4996 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4997 vcpu->arch.nmi_pending = events->nmi.pending;
4998 static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
5000 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
5001 lapic_in_kernel(vcpu))
5002 vcpu->arch.apic->sipi_vector = events->sipi_vector;
5004 if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
5005 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
5006 kvm_x86_ops.nested_ops->leave_nested(vcpu);
5007 kvm_smm_changed(vcpu, events->smi.smm);
5010 vcpu->arch.smi_pending = events->smi.pending;
5012 if (events->smi.smm) {
5013 if (events->smi.smm_inside_nmi)
5014 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
5016 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
5019 if (lapic_in_kernel(vcpu)) {
5020 if (events->smi.latched_init)
5021 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5023 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
5027 kvm_make_request(KVM_REQ_EVENT, vcpu);
5032 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
5033 struct kvm_debugregs *dbgregs)
5037 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
5038 kvm_get_dr(vcpu, 6, &val);
5040 dbgregs->dr7 = vcpu->arch.dr7;
5042 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
5045 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
5046 struct kvm_debugregs *dbgregs)
5051 if (!kvm_dr6_valid(dbgregs->dr6))
5053 if (!kvm_dr7_valid(dbgregs->dr7))
5056 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
5057 kvm_update_dr0123(vcpu);
5058 vcpu->arch.dr6 = dbgregs->dr6;
5059 vcpu->arch.dr7 = dbgregs->dr7;
5060 kvm_update_dr7(vcpu);
5065 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
5066 struct kvm_xsave *guest_xsave)
5068 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5071 fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5072 guest_xsave->region,
5073 sizeof(guest_xsave->region),
5077 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
5078 u8 *state, unsigned int size)
5080 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5083 fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5084 state, size, vcpu->arch.pkru);
5087 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5088 struct kvm_xsave *guest_xsave)
5090 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5093 return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5094 guest_xsave->region,
5095 supported_xcr0, &vcpu->arch.pkru);
5098 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5099 struct kvm_xcrs *guest_xcrs)
5101 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5102 guest_xcrs->nr_xcrs = 0;
5106 guest_xcrs->nr_xcrs = 1;
5107 guest_xcrs->flags = 0;
5108 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5109 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5112 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5113 struct kvm_xcrs *guest_xcrs)
5117 if (!boot_cpu_has(X86_FEATURE_XSAVE))
5120 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5123 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5124 /* Only support XCR0 currently */
5125 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5126 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5127 guest_xcrs->xcrs[i].value);
5136 * kvm_set_guest_paused() indicates to the guest kernel that it has been
5137 * stopped by the hypervisor. This function will be called from the host only.
5138 * EINVAL is returned when the host attempts to set the flag for a guest that
5139 * does not support pv clocks.
5141 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5143 if (!vcpu->arch.pv_time.active)
5145 vcpu->arch.pvclock_set_guest_stopped_request = true;
5146 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5150 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5151 struct kvm_device_attr *attr)
5155 switch (attr->attr) {
5156 case KVM_VCPU_TSC_OFFSET:
5166 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5167 struct kvm_device_attr *attr)
5169 u64 __user *uaddr = kvm_get_attr_addr(attr);
5173 return PTR_ERR(uaddr);
5175 switch (attr->attr) {
5176 case KVM_VCPU_TSC_OFFSET:
5178 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5189 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5190 struct kvm_device_attr *attr)
5192 u64 __user *uaddr = kvm_get_attr_addr(attr);
5193 struct kvm *kvm = vcpu->kvm;
5197 return PTR_ERR(uaddr);
5199 switch (attr->attr) {
5200 case KVM_VCPU_TSC_OFFSET: {
5201 u64 offset, tsc, ns;
5202 unsigned long flags;
5206 if (get_user(offset, uaddr))
5209 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5211 matched = (vcpu->arch.virtual_tsc_khz &&
5212 kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5213 kvm->arch.last_tsc_offset == offset);
5215 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5216 ns = get_kvmclock_base_ns();
5218 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5219 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5231 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5235 struct kvm_device_attr attr;
5238 if (copy_from_user(&attr, argp, sizeof(attr)))
5241 if (attr.group != KVM_VCPU_TSC_CTRL)
5245 case KVM_HAS_DEVICE_ATTR:
5246 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5248 case KVM_GET_DEVICE_ATTR:
5249 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5251 case KVM_SET_DEVICE_ATTR:
5252 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5259 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5260 struct kvm_enable_cap *cap)
5263 uint16_t vmcs_version;
5264 void __user *user_ptr;
5270 case KVM_CAP_HYPERV_SYNIC2:
5275 case KVM_CAP_HYPERV_SYNIC:
5276 if (!irqchip_in_kernel(vcpu->kvm))
5278 return kvm_hv_activate_synic(vcpu, cap->cap ==
5279 KVM_CAP_HYPERV_SYNIC2);
5280 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5281 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5283 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5285 user_ptr = (void __user *)(uintptr_t)cap->args[0];
5286 if (copy_to_user(user_ptr, &vmcs_version,
5287 sizeof(vmcs_version)))
5291 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5292 if (!kvm_x86_ops.enable_direct_tlbflush)
5295 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5297 case KVM_CAP_HYPERV_ENFORCE_CPUID:
5298 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5300 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5301 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5302 if (vcpu->arch.pv_cpuid.enforce)
5303 kvm_update_pv_runtime(vcpu);
5311 long kvm_arch_vcpu_ioctl(struct file *filp,
5312 unsigned int ioctl, unsigned long arg)
5314 struct kvm_vcpu *vcpu = filp->private_data;
5315 void __user *argp = (void __user *)arg;
5318 struct kvm_sregs2 *sregs2;
5319 struct kvm_lapic_state *lapic;
5320 struct kvm_xsave *xsave;
5321 struct kvm_xcrs *xcrs;
5329 case KVM_GET_LAPIC: {
5331 if (!lapic_in_kernel(vcpu))
5333 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5334 GFP_KERNEL_ACCOUNT);
5339 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5343 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5348 case KVM_SET_LAPIC: {
5350 if (!lapic_in_kernel(vcpu))
5352 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5353 if (IS_ERR(u.lapic)) {
5354 r = PTR_ERR(u.lapic);
5358 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5361 case KVM_INTERRUPT: {
5362 struct kvm_interrupt irq;
5365 if (copy_from_user(&irq, argp, sizeof(irq)))
5367 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5371 r = kvm_vcpu_ioctl_nmi(vcpu);
5375 r = kvm_vcpu_ioctl_smi(vcpu);
5378 case KVM_SET_CPUID: {
5379 struct kvm_cpuid __user *cpuid_arg = argp;
5380 struct kvm_cpuid cpuid;
5383 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5385 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5388 case KVM_SET_CPUID2: {
5389 struct kvm_cpuid2 __user *cpuid_arg = argp;
5390 struct kvm_cpuid2 cpuid;
5393 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5395 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5396 cpuid_arg->entries);
5399 case KVM_GET_CPUID2: {
5400 struct kvm_cpuid2 __user *cpuid_arg = argp;
5401 struct kvm_cpuid2 cpuid;
5404 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5406 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5407 cpuid_arg->entries);
5411 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5416 case KVM_GET_MSRS: {
5417 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5418 r = msr_io(vcpu, argp, do_get_msr, 1);
5419 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5422 case KVM_SET_MSRS: {
5423 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5424 r = msr_io(vcpu, argp, do_set_msr, 0);
5425 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5428 case KVM_TPR_ACCESS_REPORTING: {
5429 struct kvm_tpr_access_ctl tac;
5432 if (copy_from_user(&tac, argp, sizeof(tac)))
5434 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5438 if (copy_to_user(argp, &tac, sizeof(tac)))
5443 case KVM_SET_VAPIC_ADDR: {
5444 struct kvm_vapic_addr va;
5448 if (!lapic_in_kernel(vcpu))
5451 if (copy_from_user(&va, argp, sizeof(va)))
5453 idx = srcu_read_lock(&vcpu->kvm->srcu);
5454 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5455 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5458 case KVM_X86_SETUP_MCE: {
5462 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5464 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5467 case KVM_X86_SET_MCE: {
5468 struct kvm_x86_mce mce;
5471 if (copy_from_user(&mce, argp, sizeof(mce)))
5473 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5476 case KVM_GET_VCPU_EVENTS: {
5477 struct kvm_vcpu_events events;
5479 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5482 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5487 case KVM_SET_VCPU_EVENTS: {
5488 struct kvm_vcpu_events events;
5491 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5494 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5497 case KVM_GET_DEBUGREGS: {
5498 struct kvm_debugregs dbgregs;
5500 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5503 if (copy_to_user(argp, &dbgregs,
5504 sizeof(struct kvm_debugregs)))
5509 case KVM_SET_DEBUGREGS: {
5510 struct kvm_debugregs dbgregs;
5513 if (copy_from_user(&dbgregs, argp,
5514 sizeof(struct kvm_debugregs)))
5517 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5520 case KVM_GET_XSAVE: {
5522 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5525 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5530 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5533 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5538 case KVM_SET_XSAVE: {
5539 int size = vcpu->arch.guest_fpu.uabi_size;
5541 u.xsave = memdup_user(argp, size);
5542 if (IS_ERR(u.xsave)) {
5543 r = PTR_ERR(u.xsave);
5547 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5551 case KVM_GET_XSAVE2: {
5552 int size = vcpu->arch.guest_fpu.uabi_size;
5554 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5559 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5562 if (copy_to_user(argp, u.xsave, size))
5569 case KVM_GET_XCRS: {
5570 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5575 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5578 if (copy_to_user(argp, u.xcrs,
5579 sizeof(struct kvm_xcrs)))
5584 case KVM_SET_XCRS: {
5585 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5586 if (IS_ERR(u.xcrs)) {
5587 r = PTR_ERR(u.xcrs);
5591 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5594 case KVM_SET_TSC_KHZ: {
5598 user_tsc_khz = (u32)arg;
5600 if (kvm_has_tsc_control &&
5601 user_tsc_khz >= kvm_max_guest_tsc_khz)
5604 if (user_tsc_khz == 0)
5605 user_tsc_khz = tsc_khz;
5607 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5612 case KVM_GET_TSC_KHZ: {
5613 r = vcpu->arch.virtual_tsc_khz;
5616 case KVM_KVMCLOCK_CTRL: {
5617 r = kvm_set_guest_paused(vcpu);
5620 case KVM_ENABLE_CAP: {
5621 struct kvm_enable_cap cap;
5624 if (copy_from_user(&cap, argp, sizeof(cap)))
5626 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5629 case KVM_GET_NESTED_STATE: {
5630 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5634 if (!kvm_x86_ops.nested_ops->get_state)
5637 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5639 if (get_user(user_data_size, &user_kvm_nested_state->size))
5642 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5647 if (r > user_data_size) {
5648 if (put_user(r, &user_kvm_nested_state->size))
5658 case KVM_SET_NESTED_STATE: {
5659 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5660 struct kvm_nested_state kvm_state;
5664 if (!kvm_x86_ops.nested_ops->set_state)
5668 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5672 if (kvm_state.size < sizeof(kvm_state))
5675 if (kvm_state.flags &
5676 ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5677 | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5678 | KVM_STATE_NESTED_GIF_SET))
5681 /* nested_run_pending implies guest_mode. */
5682 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5683 && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5686 idx = srcu_read_lock(&vcpu->kvm->srcu);
5687 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5688 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5691 case KVM_GET_SUPPORTED_HV_CPUID:
5692 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5694 #ifdef CONFIG_KVM_XEN
5695 case KVM_XEN_VCPU_GET_ATTR: {
5696 struct kvm_xen_vcpu_attr xva;
5699 if (copy_from_user(&xva, argp, sizeof(xva)))
5701 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5702 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5706 case KVM_XEN_VCPU_SET_ATTR: {
5707 struct kvm_xen_vcpu_attr xva;
5710 if (copy_from_user(&xva, argp, sizeof(xva)))
5712 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5716 case KVM_GET_SREGS2: {
5717 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5721 __get_sregs2(vcpu, u.sregs2);
5723 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5728 case KVM_SET_SREGS2: {
5729 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5730 if (IS_ERR(u.sregs2)) {
5731 r = PTR_ERR(u.sregs2);
5735 r = __set_sregs2(vcpu, u.sregs2);
5738 case KVM_HAS_DEVICE_ATTR:
5739 case KVM_GET_DEVICE_ATTR:
5740 case KVM_SET_DEVICE_ATTR:
5741 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5753 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5755 return VM_FAULT_SIGBUS;
5758 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5762 if (addr > (unsigned int)(-3 * PAGE_SIZE))
5764 ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5768 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5771 return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5774 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5775 unsigned long kvm_nr_mmu_pages)
5777 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5780 mutex_lock(&kvm->slots_lock);
5782 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5783 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5785 mutex_unlock(&kvm->slots_lock);
5789 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5791 return kvm->arch.n_max_mmu_pages;
5794 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5796 struct kvm_pic *pic = kvm->arch.vpic;
5800 switch (chip->chip_id) {
5801 case KVM_IRQCHIP_PIC_MASTER:
5802 memcpy(&chip->chip.pic, &pic->pics[0],
5803 sizeof(struct kvm_pic_state));
5805 case KVM_IRQCHIP_PIC_SLAVE:
5806 memcpy(&chip->chip.pic, &pic->pics[1],
5807 sizeof(struct kvm_pic_state));
5809 case KVM_IRQCHIP_IOAPIC:
5810 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5819 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5821 struct kvm_pic *pic = kvm->arch.vpic;
5825 switch (chip->chip_id) {
5826 case KVM_IRQCHIP_PIC_MASTER:
5827 spin_lock(&pic->lock);
5828 memcpy(&pic->pics[0], &chip->chip.pic,
5829 sizeof(struct kvm_pic_state));
5830 spin_unlock(&pic->lock);
5832 case KVM_IRQCHIP_PIC_SLAVE:
5833 spin_lock(&pic->lock);
5834 memcpy(&pic->pics[1], &chip->chip.pic,
5835 sizeof(struct kvm_pic_state));
5836 spin_unlock(&pic->lock);
5838 case KVM_IRQCHIP_IOAPIC:
5839 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5845 kvm_pic_update_irq(pic);
5849 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5851 struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5853 BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5855 mutex_lock(&kps->lock);
5856 memcpy(ps, &kps->channels, sizeof(*ps));
5857 mutex_unlock(&kps->lock);
5861 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5864 struct kvm_pit *pit = kvm->arch.vpit;
5866 mutex_lock(&pit->pit_state.lock);
5867 memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5868 for (i = 0; i < 3; i++)
5869 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5870 mutex_unlock(&pit->pit_state.lock);
5874 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5876 mutex_lock(&kvm->arch.vpit->pit_state.lock);
5877 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5878 sizeof(ps->channels));
5879 ps->flags = kvm->arch.vpit->pit_state.flags;
5880 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5881 memset(&ps->reserved, 0, sizeof(ps->reserved));
5885 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5889 u32 prev_legacy, cur_legacy;
5890 struct kvm_pit *pit = kvm->arch.vpit;
5892 mutex_lock(&pit->pit_state.lock);
5893 prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5894 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5895 if (!prev_legacy && cur_legacy)
5897 memcpy(&pit->pit_state.channels, &ps->channels,
5898 sizeof(pit->pit_state.channels));
5899 pit->pit_state.flags = ps->flags;
5900 for (i = 0; i < 3; i++)
5901 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5903 mutex_unlock(&pit->pit_state.lock);
5907 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5908 struct kvm_reinject_control *control)
5910 struct kvm_pit *pit = kvm->arch.vpit;
5912 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5913 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5914 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5916 mutex_lock(&pit->pit_state.lock);
5917 kvm_pit_set_reinject(pit, control->pit_reinject);
5918 mutex_unlock(&pit->pit_state.lock);
5923 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5927 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5928 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5929 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5932 struct kvm_vcpu *vcpu;
5935 kvm_for_each_vcpu(i, vcpu, kvm)
5936 kvm_vcpu_kick(vcpu);
5939 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5942 if (!irqchip_in_kernel(kvm))
5945 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5946 irq_event->irq, irq_event->level,
5951 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5952 struct kvm_enable_cap *cap)
5960 case KVM_CAP_DISABLE_QUIRKS2:
5962 if (cap->args[0] & ~KVM_X86_VALID_QUIRKS)
5965 case KVM_CAP_DISABLE_QUIRKS:
5966 kvm->arch.disabled_quirks = cap->args[0];
5969 case KVM_CAP_SPLIT_IRQCHIP: {
5970 mutex_lock(&kvm->lock);
5972 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5973 goto split_irqchip_unlock;
5975 if (irqchip_in_kernel(kvm))
5976 goto split_irqchip_unlock;
5977 if (kvm->created_vcpus)
5978 goto split_irqchip_unlock;
5979 r = kvm_setup_empty_irq_routing(kvm);
5981 goto split_irqchip_unlock;
5982 /* Pairs with irqchip_in_kernel. */
5984 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5985 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5986 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
5988 split_irqchip_unlock:
5989 mutex_unlock(&kvm->lock);
5992 case KVM_CAP_X2APIC_API:
5994 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5997 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5998 kvm->arch.x2apic_format = true;
5999 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
6000 kvm->arch.x2apic_broadcast_quirk_disabled = true;
6004 case KVM_CAP_X86_DISABLE_EXITS:
6006 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
6009 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
6010 kvm_can_mwait_in_guest())
6011 kvm->arch.mwait_in_guest = true;
6012 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
6013 kvm->arch.hlt_in_guest = true;
6014 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
6015 kvm->arch.pause_in_guest = true;
6016 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
6017 kvm->arch.cstate_in_guest = true;
6020 case KVM_CAP_MSR_PLATFORM_INFO:
6021 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
6024 case KVM_CAP_EXCEPTION_PAYLOAD:
6025 kvm->arch.exception_payload_enabled = cap->args[0];
6028 case KVM_CAP_X86_USER_SPACE_MSR:
6029 kvm->arch.user_space_msr_mask = cap->args[0];
6032 case KVM_CAP_X86_BUS_LOCK_EXIT:
6034 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
6037 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
6038 (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
6041 if (kvm_has_bus_lock_exit &&
6042 cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
6043 kvm->arch.bus_lock_detection_enabled = true;
6046 #ifdef CONFIG_X86_SGX_KVM
6047 case KVM_CAP_SGX_ATTRIBUTE: {
6048 unsigned long allowed_attributes = 0;
6050 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
6054 /* KVM only supports the PROVISIONKEY privileged attribute. */
6055 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
6056 !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
6057 kvm->arch.sgx_provisioning_allowed = true;
6063 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
6065 if (!kvm_x86_ops.vm_copy_enc_context_from)
6068 r = static_call(kvm_x86_vm_copy_enc_context_from)(kvm, cap->args[0]);
6070 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
6072 if (!kvm_x86_ops.vm_move_enc_context_from)
6075 r = static_call(kvm_x86_vm_move_enc_context_from)(kvm, cap->args[0]);
6077 case KVM_CAP_EXIT_HYPERCALL:
6078 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
6082 kvm->arch.hypercall_exit_enabled = cap->args[0];
6085 case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
6087 if (cap->args[0] & ~1)
6089 kvm->arch.exit_on_emulation_error = cap->args[0];
6092 case KVM_CAP_PMU_CAPABILITY:
6094 if (!enable_pmu || (cap->args[0] & ~KVM_CAP_PMU_VALID_MASK))
6097 mutex_lock(&kvm->lock);
6098 if (!kvm->created_vcpus) {
6099 kvm->arch.enable_pmu = !(cap->args[0] & KVM_PMU_CAP_DISABLE);
6102 mutex_unlock(&kvm->lock);
6111 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6113 struct kvm_x86_msr_filter *msr_filter;
6115 msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6119 msr_filter->default_allow = default_allow;
6123 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6130 for (i = 0; i < msr_filter->count; i++)
6131 kfree(msr_filter->ranges[i].bitmap);
6136 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6137 struct kvm_msr_filter_range *user_range)
6139 unsigned long *bitmap = NULL;
6142 if (!user_range->nmsrs)
6145 if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
6148 if (!user_range->flags)
6151 bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6152 if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6155 bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6157 return PTR_ERR(bitmap);
6159 msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6160 .flags = user_range->flags,
6161 .base = user_range->base,
6162 .nmsrs = user_range->nmsrs,
6166 msr_filter->count++;
6170 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
6172 struct kvm_msr_filter __user *user_msr_filter = argp;
6173 struct kvm_x86_msr_filter *new_filter, *old_filter;
6174 struct kvm_msr_filter filter;
6180 if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6183 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
6184 empty &= !filter.ranges[i].nmsrs;
6186 default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
6187 if (empty && !default_allow)
6190 new_filter = kvm_alloc_msr_filter(default_allow);
6194 for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6195 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6197 kvm_free_msr_filter(new_filter);
6202 mutex_lock(&kvm->lock);
6204 /* The per-VM filter is protected by kvm->lock... */
6205 old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6207 rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6208 synchronize_srcu(&kvm->srcu);
6210 kvm_free_msr_filter(old_filter);
6212 kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6213 mutex_unlock(&kvm->lock);
6218 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6219 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6221 struct kvm_vcpu *vcpu;
6225 mutex_lock(&kvm->lock);
6226 kvm_for_each_vcpu(i, vcpu, kvm) {
6227 if (!vcpu->arch.pv_time.active)
6230 ret = kvm_set_guest_paused(vcpu);
6232 kvm_err("Failed to pause guest VCPU%d: %d\n",
6233 vcpu->vcpu_id, ret);
6237 mutex_unlock(&kvm->lock);
6239 return ret ? NOTIFY_BAD : NOTIFY_DONE;
6242 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6245 case PM_HIBERNATION_PREPARE:
6246 case PM_SUSPEND_PREPARE:
6247 return kvm_arch_suspend_notifier(kvm);
6252 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6254 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6256 struct kvm_clock_data data = { 0 };
6258 get_kvmclock(kvm, &data);
6259 if (copy_to_user(argp, &data, sizeof(data)))
6265 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6267 struct kvm_arch *ka = &kvm->arch;
6268 struct kvm_clock_data data;
6271 if (copy_from_user(&data, argp, sizeof(data)))
6275 * Only KVM_CLOCK_REALTIME is used, but allow passing the
6276 * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6278 if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6281 kvm_hv_request_tsc_page_update(kvm);
6282 kvm_start_pvclock_update(kvm);
6283 pvclock_update_vm_gtod_copy(kvm);
6286 * This pairs with kvm_guest_time_update(): when masterclock is
6287 * in use, we use master_kernel_ns + kvmclock_offset to set
6288 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6289 * is slightly ahead) here we risk going negative on unsigned
6290 * 'system_time' when 'data.clock' is very small.
6292 if (data.flags & KVM_CLOCK_REALTIME) {
6293 u64 now_real_ns = ktime_get_real_ns();
6296 * Avoid stepping the kvmclock backwards.
6298 if (now_real_ns > data.realtime)
6299 data.clock += now_real_ns - data.realtime;
6302 if (ka->use_master_clock)
6303 now_raw_ns = ka->master_kernel_ns;
6305 now_raw_ns = get_kvmclock_base_ns();
6306 ka->kvmclock_offset = data.clock - now_raw_ns;
6307 kvm_end_pvclock_update(kvm);
6311 long kvm_arch_vm_ioctl(struct file *filp,
6312 unsigned int ioctl, unsigned long arg)
6314 struct kvm *kvm = filp->private_data;
6315 void __user *argp = (void __user *)arg;
6318 * This union makes it completely explicit to gcc-3.x
6319 * that these two variables' stack usage should be
6320 * combined, not added together.
6323 struct kvm_pit_state ps;
6324 struct kvm_pit_state2 ps2;
6325 struct kvm_pit_config pit_config;
6329 case KVM_SET_TSS_ADDR:
6330 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6332 case KVM_SET_IDENTITY_MAP_ADDR: {
6335 mutex_lock(&kvm->lock);
6337 if (kvm->created_vcpus)
6338 goto set_identity_unlock;
6340 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6341 goto set_identity_unlock;
6342 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6343 set_identity_unlock:
6344 mutex_unlock(&kvm->lock);
6347 case KVM_SET_NR_MMU_PAGES:
6348 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6350 case KVM_GET_NR_MMU_PAGES:
6351 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6353 case KVM_CREATE_IRQCHIP: {
6354 mutex_lock(&kvm->lock);
6357 if (irqchip_in_kernel(kvm))
6358 goto create_irqchip_unlock;
6361 if (kvm->created_vcpus)
6362 goto create_irqchip_unlock;
6364 r = kvm_pic_init(kvm);
6366 goto create_irqchip_unlock;
6368 r = kvm_ioapic_init(kvm);
6370 kvm_pic_destroy(kvm);
6371 goto create_irqchip_unlock;
6374 r = kvm_setup_default_irq_routing(kvm);
6376 kvm_ioapic_destroy(kvm);
6377 kvm_pic_destroy(kvm);
6378 goto create_irqchip_unlock;
6380 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6382 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6383 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
6384 create_irqchip_unlock:
6385 mutex_unlock(&kvm->lock);
6388 case KVM_CREATE_PIT:
6389 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6391 case KVM_CREATE_PIT2:
6393 if (copy_from_user(&u.pit_config, argp,
6394 sizeof(struct kvm_pit_config)))
6397 mutex_lock(&kvm->lock);
6400 goto create_pit_unlock;
6402 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6406 mutex_unlock(&kvm->lock);
6408 case KVM_GET_IRQCHIP: {
6409 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6410 struct kvm_irqchip *chip;
6412 chip = memdup_user(argp, sizeof(*chip));
6419 if (!irqchip_kernel(kvm))
6420 goto get_irqchip_out;
6421 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6423 goto get_irqchip_out;
6425 if (copy_to_user(argp, chip, sizeof(*chip)))
6426 goto get_irqchip_out;
6432 case KVM_SET_IRQCHIP: {
6433 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6434 struct kvm_irqchip *chip;
6436 chip = memdup_user(argp, sizeof(*chip));
6443 if (!irqchip_kernel(kvm))
6444 goto set_irqchip_out;
6445 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6452 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6455 if (!kvm->arch.vpit)
6457 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6461 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6468 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6470 mutex_lock(&kvm->lock);
6472 if (!kvm->arch.vpit)
6474 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6476 mutex_unlock(&kvm->lock);
6479 case KVM_GET_PIT2: {
6481 if (!kvm->arch.vpit)
6483 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6487 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6492 case KVM_SET_PIT2: {
6494 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6496 mutex_lock(&kvm->lock);
6498 if (!kvm->arch.vpit)
6500 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6502 mutex_unlock(&kvm->lock);
6505 case KVM_REINJECT_CONTROL: {
6506 struct kvm_reinject_control control;
6508 if (copy_from_user(&control, argp, sizeof(control)))
6511 if (!kvm->arch.vpit)
6513 r = kvm_vm_ioctl_reinject(kvm, &control);
6516 case KVM_SET_BOOT_CPU_ID:
6518 mutex_lock(&kvm->lock);
6519 if (kvm->created_vcpus)
6522 kvm->arch.bsp_vcpu_id = arg;
6523 mutex_unlock(&kvm->lock);
6525 #ifdef CONFIG_KVM_XEN
6526 case KVM_XEN_HVM_CONFIG: {
6527 struct kvm_xen_hvm_config xhc;
6529 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6531 r = kvm_xen_hvm_config(kvm, &xhc);
6534 case KVM_XEN_HVM_GET_ATTR: {
6535 struct kvm_xen_hvm_attr xha;
6538 if (copy_from_user(&xha, argp, sizeof(xha)))
6540 r = kvm_xen_hvm_get_attr(kvm, &xha);
6541 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6545 case KVM_XEN_HVM_SET_ATTR: {
6546 struct kvm_xen_hvm_attr xha;
6549 if (copy_from_user(&xha, argp, sizeof(xha)))
6551 r = kvm_xen_hvm_set_attr(kvm, &xha);
6554 case KVM_XEN_HVM_EVTCHN_SEND: {
6555 struct kvm_irq_routing_xen_evtchn uxe;
6558 if (copy_from_user(&uxe, argp, sizeof(uxe)))
6560 r = kvm_xen_hvm_evtchn_send(kvm, &uxe);
6565 r = kvm_vm_ioctl_set_clock(kvm, argp);
6568 r = kvm_vm_ioctl_get_clock(kvm, argp);
6570 case KVM_SET_TSC_KHZ: {
6574 user_tsc_khz = (u32)arg;
6576 if (kvm_has_tsc_control &&
6577 user_tsc_khz >= kvm_max_guest_tsc_khz)
6580 if (user_tsc_khz == 0)
6581 user_tsc_khz = tsc_khz;
6583 WRITE_ONCE(kvm->arch.default_tsc_khz, user_tsc_khz);
6588 case KVM_GET_TSC_KHZ: {
6589 r = READ_ONCE(kvm->arch.default_tsc_khz);
6592 case KVM_MEMORY_ENCRYPT_OP: {
6594 if (!kvm_x86_ops.mem_enc_ioctl)
6597 r = static_call(kvm_x86_mem_enc_ioctl)(kvm, argp);
6600 case KVM_MEMORY_ENCRYPT_REG_REGION: {
6601 struct kvm_enc_region region;
6604 if (copy_from_user(®ion, argp, sizeof(region)))
6608 if (!kvm_x86_ops.mem_enc_register_region)
6611 r = static_call(kvm_x86_mem_enc_register_region)(kvm, ®ion);
6614 case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6615 struct kvm_enc_region region;
6618 if (copy_from_user(®ion, argp, sizeof(region)))
6622 if (!kvm_x86_ops.mem_enc_unregister_region)
6625 r = static_call(kvm_x86_mem_enc_unregister_region)(kvm, ®ion);
6628 case KVM_HYPERV_EVENTFD: {
6629 struct kvm_hyperv_eventfd hvevfd;
6632 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6634 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6637 case KVM_SET_PMU_EVENT_FILTER:
6638 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6640 case KVM_X86_SET_MSR_FILTER:
6641 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6650 static void kvm_init_msr_list(void)
6652 struct x86_pmu_capability x86_pmu;
6656 BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED != 3,
6657 "Please update the fixed PMCs in msrs_to_saved_all[]");
6659 perf_get_x86_pmu_capability(&x86_pmu);
6661 num_msrs_to_save = 0;
6662 num_emulated_msrs = 0;
6663 num_msr_based_features = 0;
6665 for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6666 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6670 * Even MSRs that are valid in the host may not be exposed
6671 * to the guests in some cases.
6673 switch (msrs_to_save_all[i]) {
6674 case MSR_IA32_BNDCFGS:
6675 if (!kvm_mpx_supported())
6679 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6680 !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6683 case MSR_IA32_UMWAIT_CONTROL:
6684 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6687 case MSR_IA32_RTIT_CTL:
6688 case MSR_IA32_RTIT_STATUS:
6689 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6692 case MSR_IA32_RTIT_CR3_MATCH:
6693 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6694 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6697 case MSR_IA32_RTIT_OUTPUT_BASE:
6698 case MSR_IA32_RTIT_OUTPUT_MASK:
6699 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6700 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6701 !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6704 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6705 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6706 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6707 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6710 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6711 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6712 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6715 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6716 if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6717 min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6721 case MSR_IA32_XFD_ERR:
6722 if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
6729 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6732 for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6733 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6736 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6739 for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6740 struct kvm_msr_entry msr;
6742 msr.index = msr_based_features_all[i];
6743 if (kvm_get_msr_feature(&msr))
6746 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6750 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6758 if (!(lapic_in_kernel(vcpu) &&
6759 !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6760 && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6771 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6778 if (!(lapic_in_kernel(vcpu) &&
6779 !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6781 && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6783 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6793 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6794 struct kvm_segment *var, int seg)
6796 static_call(kvm_x86_set_segment)(vcpu, var, seg);
6799 void kvm_get_segment(struct kvm_vcpu *vcpu,
6800 struct kvm_segment *var, int seg)
6802 static_call(kvm_x86_get_segment)(vcpu, var, seg);
6805 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u64 access,
6806 struct x86_exception *exception)
6808 struct kvm_mmu *mmu = vcpu->arch.mmu;
6811 BUG_ON(!mmu_is_nested(vcpu));
6813 /* NPT walks are always user-walks */
6814 access |= PFERR_USER_MASK;
6815 t_gpa = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
6820 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6821 struct x86_exception *exception)
6823 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6825 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6826 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6828 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6830 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6831 struct x86_exception *exception)
6833 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6835 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6836 access |= PFERR_FETCH_MASK;
6837 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6840 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6841 struct x86_exception *exception)
6843 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6845 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6846 access |= PFERR_WRITE_MASK;
6847 return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6849 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6851 /* uses this to access any guest's mapped memory without checking CPL */
6852 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6853 struct x86_exception *exception)
6855 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6857 return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
6860 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6861 struct kvm_vcpu *vcpu, u64 access,
6862 struct x86_exception *exception)
6864 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6866 int r = X86EMUL_CONTINUE;
6869 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6870 unsigned offset = addr & (PAGE_SIZE-1);
6871 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6874 if (gpa == UNMAPPED_GVA)
6875 return X86EMUL_PROPAGATE_FAULT;
6876 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6879 r = X86EMUL_IO_NEEDED;
6891 /* used for instruction fetching */
6892 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6893 gva_t addr, void *val, unsigned int bytes,
6894 struct x86_exception *exception)
6896 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6897 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6898 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6902 /* Inline kvm_read_guest_virt_helper for speed. */
6903 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
6905 if (unlikely(gpa == UNMAPPED_GVA))
6906 return X86EMUL_PROPAGATE_FAULT;
6908 offset = addr & (PAGE_SIZE-1);
6909 if (WARN_ON(offset + bytes > PAGE_SIZE))
6910 bytes = (unsigned)PAGE_SIZE - offset;
6911 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6913 if (unlikely(ret < 0))
6914 return X86EMUL_IO_NEEDED;
6916 return X86EMUL_CONTINUE;
6919 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6920 gva_t addr, void *val, unsigned int bytes,
6921 struct x86_exception *exception)
6923 u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6926 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6927 * is returned, but our callers are not ready for that and they blindly
6928 * call kvm_inject_page_fault. Ensure that they at least do not leak
6929 * uninitialized kernel stack memory into cr2 and error code.
6931 memset(exception, 0, sizeof(*exception));
6932 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6935 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6937 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6938 gva_t addr, void *val, unsigned int bytes,
6939 struct x86_exception *exception, bool system)
6941 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6945 access |= PFERR_IMPLICIT_ACCESS;
6946 else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
6947 access |= PFERR_USER_MASK;
6949 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6952 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6953 unsigned long addr, void *val, unsigned int bytes)
6955 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6956 int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6958 return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6961 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6962 struct kvm_vcpu *vcpu, u64 access,
6963 struct x86_exception *exception)
6965 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6967 int r = X86EMUL_CONTINUE;
6970 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6971 unsigned offset = addr & (PAGE_SIZE-1);
6972 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6975 if (gpa == UNMAPPED_GVA)
6976 return X86EMUL_PROPAGATE_FAULT;
6977 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6979 r = X86EMUL_IO_NEEDED;
6991 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6992 unsigned int bytes, struct x86_exception *exception,
6995 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6996 u64 access = PFERR_WRITE_MASK;
6999 access |= PFERR_IMPLICIT_ACCESS;
7000 else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
7001 access |= PFERR_USER_MASK;
7003 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
7007 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
7008 unsigned int bytes, struct x86_exception *exception)
7010 /* kvm_write_guest_virt_system can pull in tons of pages. */
7011 vcpu->arch.l1tf_flush_l1d = true;
7013 return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
7014 PFERR_WRITE_MASK, exception);
7016 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
7018 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
7019 void *insn, int insn_len)
7021 return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
7025 int handle_ud(struct kvm_vcpu *vcpu)
7027 static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
7028 int emul_type = EMULTYPE_TRAP_UD;
7029 char sig[5]; /* ud2; .ascii "kvm" */
7030 struct x86_exception e;
7032 if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
7035 if (force_emulation_prefix &&
7036 kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
7037 sig, sizeof(sig), &e) == 0 &&
7038 memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
7039 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
7040 emul_type = EMULTYPE_TRAP_UD_FORCED;
7043 return kvm_emulate_instruction(vcpu, emul_type);
7045 EXPORT_SYMBOL_GPL(handle_ud);
7047 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7048 gpa_t gpa, bool write)
7050 /* For APIC access vmexit */
7051 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7054 if (vcpu_match_mmio_gpa(vcpu, gpa)) {
7055 trace_vcpu_match_mmio(gva, gpa, write, true);
7062 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7063 gpa_t *gpa, struct x86_exception *exception,
7066 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7067 u64 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
7068 | (write ? PFERR_WRITE_MASK : 0);
7071 * currently PKRU is only applied to ept enabled guest so
7072 * there is no pkey in EPT page table for L1 guest or EPT
7073 * shadow page table for L2 guest.
7075 if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
7076 !permission_fault(vcpu, vcpu->arch.walk_mmu,
7077 vcpu->arch.mmio_access, 0, access))) {
7078 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
7079 (gva & (PAGE_SIZE - 1));
7080 trace_vcpu_match_mmio(gva, *gpa, write, false);
7084 *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7086 if (*gpa == UNMAPPED_GVA)
7089 return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
7092 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
7093 const void *val, int bytes)
7097 ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
7100 kvm_page_track_write(vcpu, gpa, val, bytes);
7104 struct read_write_emulator_ops {
7105 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
7107 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
7108 void *val, int bytes);
7109 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7110 int bytes, void *val);
7111 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7112 void *val, int bytes);
7116 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
7118 if (vcpu->mmio_read_completed) {
7119 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
7120 vcpu->mmio_fragments[0].gpa, val);
7121 vcpu->mmio_read_completed = 0;
7128 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7129 void *val, int bytes)
7131 return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
7134 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7135 void *val, int bytes)
7137 return emulator_write_phys(vcpu, gpa, val, bytes);
7140 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
7142 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7143 return vcpu_mmio_write(vcpu, gpa, bytes, val);
7146 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7147 void *val, int bytes)
7149 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7150 return X86EMUL_IO_NEEDED;
7153 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7154 void *val, int bytes)
7156 struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7158 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7159 return X86EMUL_CONTINUE;
7162 static const struct read_write_emulator_ops read_emultor = {
7163 .read_write_prepare = read_prepare,
7164 .read_write_emulate = read_emulate,
7165 .read_write_mmio = vcpu_mmio_read,
7166 .read_write_exit_mmio = read_exit_mmio,
7169 static const struct read_write_emulator_ops write_emultor = {
7170 .read_write_emulate = write_emulate,
7171 .read_write_mmio = write_mmio,
7172 .read_write_exit_mmio = write_exit_mmio,
7176 static int emulator_read_write_onepage(unsigned long addr, void *val,
7178 struct x86_exception *exception,
7179 struct kvm_vcpu *vcpu,
7180 const struct read_write_emulator_ops *ops)
7184 bool write = ops->write;
7185 struct kvm_mmio_fragment *frag;
7186 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7189 * If the exit was due to a NPF we may already have a GPA.
7190 * If the GPA is present, use it to avoid the GVA to GPA table walk.
7191 * Note, this cannot be used on string operations since string
7192 * operation using rep will only have the initial GPA from the NPF
7195 if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7196 (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7197 gpa = ctxt->gpa_val;
7198 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7200 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7202 return X86EMUL_PROPAGATE_FAULT;
7205 if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7206 return X86EMUL_CONTINUE;
7209 * Is this MMIO handled locally?
7211 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7212 if (handled == bytes)
7213 return X86EMUL_CONTINUE;
7219 WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7220 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7224 return X86EMUL_CONTINUE;
7227 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7229 void *val, unsigned int bytes,
7230 struct x86_exception *exception,
7231 const struct read_write_emulator_ops *ops)
7233 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7237 if (ops->read_write_prepare &&
7238 ops->read_write_prepare(vcpu, val, bytes))
7239 return X86EMUL_CONTINUE;
7241 vcpu->mmio_nr_fragments = 0;
7243 /* Crossing a page boundary? */
7244 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7247 now = -addr & ~PAGE_MASK;
7248 rc = emulator_read_write_onepage(addr, val, now, exception,
7251 if (rc != X86EMUL_CONTINUE)
7254 if (ctxt->mode != X86EMUL_MODE_PROT64)
7260 rc = emulator_read_write_onepage(addr, val, bytes, exception,
7262 if (rc != X86EMUL_CONTINUE)
7265 if (!vcpu->mmio_nr_fragments)
7268 gpa = vcpu->mmio_fragments[0].gpa;
7270 vcpu->mmio_needed = 1;
7271 vcpu->mmio_cur_fragment = 0;
7273 vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7274 vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7275 vcpu->run->exit_reason = KVM_EXIT_MMIO;
7276 vcpu->run->mmio.phys_addr = gpa;
7278 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7281 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7285 struct x86_exception *exception)
7287 return emulator_read_write(ctxt, addr, val, bytes,
7288 exception, &read_emultor);
7291 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7295 struct x86_exception *exception)
7297 return emulator_read_write(ctxt, addr, (void *)val, bytes,
7298 exception, &write_emultor);
7301 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7302 (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7304 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7309 struct x86_exception *exception)
7311 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7317 /* guests cmpxchg8b have to be emulated atomically */
7318 if (bytes > 8 || (bytes & (bytes - 1)))
7321 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7323 if (gpa == UNMAPPED_GVA ||
7324 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7328 * Emulate the atomic as a straight write to avoid #AC if SLD is
7329 * enabled in the host and the access splits a cache line.
7331 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7332 page_line_mask = ~(cache_line_size() - 1);
7334 page_line_mask = PAGE_MASK;
7336 if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7339 hva = kvm_vcpu_gfn_to_hva(vcpu, gpa_to_gfn(gpa));
7340 if (kvm_is_error_hva(hva))
7343 hva += offset_in_page(gpa);
7347 r = emulator_try_cmpxchg_user(u8, hva, old, new);
7350 r = emulator_try_cmpxchg_user(u16, hva, old, new);
7353 r = emulator_try_cmpxchg_user(u32, hva, old, new);
7356 r = emulator_try_cmpxchg_user(u64, hva, old, new);
7363 return X86EMUL_UNHANDLEABLE;
7365 return X86EMUL_CMPXCHG_FAILED;
7367 kvm_page_track_write(vcpu, gpa, new, bytes);
7369 return X86EMUL_CONTINUE;
7372 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7374 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7377 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7381 for (i = 0; i < vcpu->arch.pio.count; i++) {
7382 if (vcpu->arch.pio.in)
7383 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7384 vcpu->arch.pio.size, pd);
7386 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7387 vcpu->arch.pio.port, vcpu->arch.pio.size,
7391 pd += vcpu->arch.pio.size;
7396 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7397 unsigned short port,
7398 unsigned int count, bool in)
7400 vcpu->arch.pio.port = port;
7401 vcpu->arch.pio.in = in;
7402 vcpu->arch.pio.count = count;
7403 vcpu->arch.pio.size = size;
7405 if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7408 vcpu->run->exit_reason = KVM_EXIT_IO;
7409 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7410 vcpu->run->io.size = size;
7411 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7412 vcpu->run->io.count = count;
7413 vcpu->run->io.port = port;
7418 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7419 unsigned short port, unsigned int count)
7421 WARN_ON(vcpu->arch.pio.count);
7422 memset(vcpu->arch.pio_data, 0, size * count);
7423 return emulator_pio_in_out(vcpu, size, port, count, true);
7426 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7428 int size = vcpu->arch.pio.size;
7429 unsigned count = vcpu->arch.pio.count;
7430 memcpy(val, vcpu->arch.pio_data, size * count);
7431 trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7432 vcpu->arch.pio.count = 0;
7435 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7436 unsigned short port, void *val, unsigned int count)
7438 if (vcpu->arch.pio.count) {
7440 * Complete a previous iteration that required userspace I/O.
7441 * Note, @count isn't guaranteed to match pio.count as userspace
7442 * can modify ECX before rerunning the vCPU. Ignore any such
7443 * shenanigans as KVM doesn't support modifying the rep count,
7444 * and the emulator ensures @count doesn't overflow the buffer.
7447 int r = __emulator_pio_in(vcpu, size, port, count);
7451 /* Results already available, fall through. */
7454 complete_emulator_pio_in(vcpu, val);
7458 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7459 int size, unsigned short port, void *val,
7462 return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7466 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7467 unsigned short port, const void *val,
7472 memcpy(vcpu->arch.pio_data, val, size * count);
7473 trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7474 ret = emulator_pio_in_out(vcpu, size, port, count, false);
7476 vcpu->arch.pio.count = 0;
7481 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7482 int size, unsigned short port,
7483 const void *val, unsigned int count)
7485 return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7488 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7490 return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7493 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7495 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7498 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7500 if (!need_emulate_wbinvd(vcpu))
7501 return X86EMUL_CONTINUE;
7503 if (static_call(kvm_x86_has_wbinvd_exit)()) {
7504 int cpu = get_cpu();
7506 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7507 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7508 wbinvd_ipi, NULL, 1);
7510 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7513 return X86EMUL_CONTINUE;
7516 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7518 kvm_emulate_wbinvd_noskip(vcpu);
7519 return kvm_skip_emulated_instruction(vcpu);
7521 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7525 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7527 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7530 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7531 unsigned long *dest)
7533 kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7536 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7537 unsigned long value)
7540 return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7543 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7545 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7548 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7550 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7551 unsigned long value;
7555 value = kvm_read_cr0(vcpu);
7558 value = vcpu->arch.cr2;
7561 value = kvm_read_cr3(vcpu);
7564 value = kvm_read_cr4(vcpu);
7567 value = kvm_get_cr8(vcpu);
7570 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7577 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7579 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7584 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7587 vcpu->arch.cr2 = val;
7590 res = kvm_set_cr3(vcpu, val);
7593 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7596 res = kvm_set_cr8(vcpu, val);
7599 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7606 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7608 return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7611 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7613 static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7616 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7618 static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7621 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7623 static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7626 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7628 static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7631 static unsigned long emulator_get_cached_segment_base(
7632 struct x86_emulate_ctxt *ctxt, int seg)
7634 return get_segment_base(emul_to_vcpu(ctxt), seg);
7637 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7638 struct desc_struct *desc, u32 *base3,
7641 struct kvm_segment var;
7643 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7644 *selector = var.selector;
7647 memset(desc, 0, sizeof(*desc));
7655 set_desc_limit(desc, var.limit);
7656 set_desc_base(desc, (unsigned long)var.base);
7657 #ifdef CONFIG_X86_64
7659 *base3 = var.base >> 32;
7661 desc->type = var.type;
7663 desc->dpl = var.dpl;
7664 desc->p = var.present;
7665 desc->avl = var.avl;
7673 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7674 struct desc_struct *desc, u32 base3,
7677 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7678 struct kvm_segment var;
7680 var.selector = selector;
7681 var.base = get_desc_base(desc);
7682 #ifdef CONFIG_X86_64
7683 var.base |= ((u64)base3) << 32;
7685 var.limit = get_desc_limit(desc);
7687 var.limit = (var.limit << 12) | 0xfff;
7688 var.type = desc->type;
7689 var.dpl = desc->dpl;
7694 var.avl = desc->avl;
7695 var.present = desc->p;
7696 var.unusable = !var.present;
7699 kvm_set_segment(vcpu, &var, seg);
7703 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7704 u32 msr_index, u64 *pdata)
7706 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7709 r = kvm_get_msr_with_filter(vcpu, msr_index, pdata);
7711 if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7712 complete_emulated_rdmsr, r)) {
7713 /* Bounce to user space */
7714 return X86EMUL_IO_NEEDED;
7720 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7721 u32 msr_index, u64 data)
7723 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7726 r = kvm_set_msr_with_filter(vcpu, msr_index, data);
7728 if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7729 complete_emulated_msr_access, r)) {
7730 /* Bounce to user space */
7731 return X86EMUL_IO_NEEDED;
7737 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7738 u32 msr_index, u64 *pdata)
7740 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
7743 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7744 u32 msr_index, u64 data)
7746 return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
7749 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7751 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7753 return vcpu->arch.smbase;
7756 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7758 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7760 vcpu->arch.smbase = smbase;
7763 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7766 if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7771 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7772 u32 pmc, u64 *pdata)
7774 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7777 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7779 emul_to_vcpu(ctxt)->arch.halt_request = 1;
7782 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7783 struct x86_instruction_info *info,
7784 enum x86_intercept_stage stage)
7786 return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7790 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7791 u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7794 return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7797 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7799 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7802 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7804 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7807 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7809 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7812 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
7814 return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
7817 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7819 return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7822 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7824 kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7827 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7829 static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7832 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7834 return emul_to_vcpu(ctxt)->arch.hflags;
7837 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7839 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7841 kvm_smm_changed(vcpu, false);
7844 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7845 const char *smstate)
7847 return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7850 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7852 kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7855 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7857 return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7860 static const struct x86_emulate_ops emulate_ops = {
7861 .read_gpr = emulator_read_gpr,
7862 .write_gpr = emulator_write_gpr,
7863 .read_std = emulator_read_std,
7864 .write_std = emulator_write_std,
7865 .read_phys = kvm_read_guest_phys_system,
7866 .fetch = kvm_fetch_guest_virt,
7867 .read_emulated = emulator_read_emulated,
7868 .write_emulated = emulator_write_emulated,
7869 .cmpxchg_emulated = emulator_cmpxchg_emulated,
7870 .invlpg = emulator_invlpg,
7871 .pio_in_emulated = emulator_pio_in_emulated,
7872 .pio_out_emulated = emulator_pio_out_emulated,
7873 .get_segment = emulator_get_segment,
7874 .set_segment = emulator_set_segment,
7875 .get_cached_segment_base = emulator_get_cached_segment_base,
7876 .get_gdt = emulator_get_gdt,
7877 .get_idt = emulator_get_idt,
7878 .set_gdt = emulator_set_gdt,
7879 .set_idt = emulator_set_idt,
7880 .get_cr = emulator_get_cr,
7881 .set_cr = emulator_set_cr,
7882 .cpl = emulator_get_cpl,
7883 .get_dr = emulator_get_dr,
7884 .set_dr = emulator_set_dr,
7885 .get_smbase = emulator_get_smbase,
7886 .set_smbase = emulator_set_smbase,
7887 .set_msr_with_filter = emulator_set_msr_with_filter,
7888 .get_msr_with_filter = emulator_get_msr_with_filter,
7889 .set_msr = emulator_set_msr,
7890 .get_msr = emulator_get_msr,
7891 .check_pmc = emulator_check_pmc,
7892 .read_pmc = emulator_read_pmc,
7893 .halt = emulator_halt,
7894 .wbinvd = emulator_wbinvd,
7895 .fix_hypercall = emulator_fix_hypercall,
7896 .intercept = emulator_intercept,
7897 .get_cpuid = emulator_get_cpuid,
7898 .guest_has_long_mode = emulator_guest_has_long_mode,
7899 .guest_has_movbe = emulator_guest_has_movbe,
7900 .guest_has_fxsr = emulator_guest_has_fxsr,
7901 .guest_has_rdpid = emulator_guest_has_rdpid,
7902 .set_nmi_mask = emulator_set_nmi_mask,
7903 .get_hflags = emulator_get_hflags,
7904 .exiting_smm = emulator_exiting_smm,
7905 .leave_smm = emulator_leave_smm,
7906 .triple_fault = emulator_triple_fault,
7907 .set_xcr = emulator_set_xcr,
7910 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7912 u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7914 * an sti; sti; sequence only disable interrupts for the first
7915 * instruction. So, if the last instruction, be it emulated or
7916 * not, left the system with the INT_STI flag enabled, it
7917 * means that the last instruction is an sti. We should not
7918 * leave the flag on in this case. The same goes for mov ss
7920 if (int_shadow & mask)
7922 if (unlikely(int_shadow || mask)) {
7923 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7925 kvm_make_request(KVM_REQ_EVENT, vcpu);
7929 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7931 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7932 if (ctxt->exception.vector == PF_VECTOR)
7933 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7935 if (ctxt->exception.error_code_valid)
7936 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7937 ctxt->exception.error_code);
7939 kvm_queue_exception(vcpu, ctxt->exception.vector);
7943 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7945 struct x86_emulate_ctxt *ctxt;
7947 ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7949 pr_err("kvm: failed to allocate vcpu's emulator\n");
7954 ctxt->ops = &emulate_ops;
7955 vcpu->arch.emulate_ctxt = ctxt;
7960 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7962 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7965 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7967 ctxt->gpa_available = false;
7968 ctxt->eflags = kvm_get_rflags(vcpu);
7969 ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7971 ctxt->eip = kvm_rip_read(vcpu);
7972 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
7973 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
7974 (cs_l && is_long_mode(vcpu)) ? X86EMUL_MODE_PROT64 :
7975 cs_db ? X86EMUL_MODE_PROT32 :
7976 X86EMUL_MODE_PROT16;
7977 BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7978 BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7979 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7981 ctxt->interruptibility = 0;
7982 ctxt->have_exception = false;
7983 ctxt->exception.vector = -1;
7984 ctxt->perm_ok = false;
7986 init_decode_cache(ctxt);
7987 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7990 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7992 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7995 init_emulate_ctxt(vcpu);
7999 ctxt->_eip = ctxt->eip + inc_eip;
8000 ret = emulate_int_real(ctxt, irq);
8002 if (ret != X86EMUL_CONTINUE) {
8003 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
8005 ctxt->eip = ctxt->_eip;
8006 kvm_rip_write(vcpu, ctxt->eip);
8007 kvm_set_rflags(vcpu, ctxt->eflags);
8010 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
8012 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8013 u8 ndata, u8 *insn_bytes, u8 insn_size)
8015 struct kvm_run *run = vcpu->run;
8020 * Zero the whole array used to retrieve the exit info, as casting to
8021 * u32 for select entries will leave some chunks uninitialized.
8023 memset(&info, 0, sizeof(info));
8025 static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
8026 &info[2], (u32 *)&info[3],
8029 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8030 run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
8033 * There's currently space for 13 entries, but 5 are used for the exit
8034 * reason and info. Restrict to 4 to reduce the maintenance burden
8035 * when expanding kvm_run.emulation_failure in the future.
8037 if (WARN_ON_ONCE(ndata > 4))
8040 /* Always include the flags as a 'data' entry. */
8042 run->emulation_failure.flags = 0;
8045 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
8046 sizeof(run->emulation_failure.insn_bytes) != 16));
8048 run->emulation_failure.flags |=
8049 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
8050 run->emulation_failure.insn_size = insn_size;
8051 memset(run->emulation_failure.insn_bytes, 0x90,
8052 sizeof(run->emulation_failure.insn_bytes));
8053 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
8056 memcpy(&run->internal.data[info_start], info, sizeof(info));
8057 memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
8058 ndata * sizeof(data[0]));
8060 run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
8063 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
8065 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8067 prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
8068 ctxt->fetch.end - ctxt->fetch.data);
8071 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8074 prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
8076 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
8078 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
8080 __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
8082 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
8084 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
8086 struct kvm *kvm = vcpu->kvm;
8088 ++vcpu->stat.insn_emulation_fail;
8089 trace_kvm_emulate_insn_failed(vcpu);
8091 if (emulation_type & EMULTYPE_VMWARE_GP) {
8092 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8096 if (kvm->arch.exit_on_emulation_error ||
8097 (emulation_type & EMULTYPE_SKIP)) {
8098 prepare_emulation_ctxt_failure_exit(vcpu);
8102 kvm_queue_exception(vcpu, UD_VECTOR);
8104 if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
8105 prepare_emulation_ctxt_failure_exit(vcpu);
8112 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8113 bool write_fault_to_shadow_pgtable,
8116 gpa_t gpa = cr2_or_gpa;
8119 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8122 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8123 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8126 if (!vcpu->arch.mmu->root_role.direct) {
8128 * Write permission should be allowed since only
8129 * write access need to be emulated.
8131 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8134 * If the mapping is invalid in guest, let cpu retry
8135 * it to generate fault.
8137 if (gpa == UNMAPPED_GVA)
8142 * Do not retry the unhandleable instruction if it faults on the
8143 * readonly host memory, otherwise it will goto a infinite loop:
8144 * retry instruction -> write #PF -> emulation fail -> retry
8145 * instruction -> ...
8147 pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
8150 * If the instruction failed on the error pfn, it can not be fixed,
8151 * report the error to userspace.
8153 if (is_error_noslot_pfn(pfn))
8156 kvm_release_pfn_clean(pfn);
8158 /* The instructions are well-emulated on direct mmu. */
8159 if (vcpu->arch.mmu->root_role.direct) {
8160 unsigned int indirect_shadow_pages;
8162 write_lock(&vcpu->kvm->mmu_lock);
8163 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8164 write_unlock(&vcpu->kvm->mmu_lock);
8166 if (indirect_shadow_pages)
8167 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8173 * if emulation was due to access to shadowed page table
8174 * and it failed try to unshadow page and re-enter the
8175 * guest to let CPU execute the instruction.
8177 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8180 * If the access faults on its page table, it can not
8181 * be fixed by unprotecting shadow page and it should
8182 * be reported to userspace.
8184 return !write_fault_to_shadow_pgtable;
8187 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8188 gpa_t cr2_or_gpa, int emulation_type)
8190 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8191 unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8193 last_retry_eip = vcpu->arch.last_retry_eip;
8194 last_retry_addr = vcpu->arch.last_retry_addr;
8197 * If the emulation is caused by #PF and it is non-page_table
8198 * writing instruction, it means the VM-EXIT is caused by shadow
8199 * page protected, we can zap the shadow page and retry this
8200 * instruction directly.
8202 * Note: if the guest uses a non-page-table modifying instruction
8203 * on the PDE that points to the instruction, then we will unmap
8204 * the instruction and go to an infinite loop. So, we cache the
8205 * last retried eip and the last fault address, if we meet the eip
8206 * and the address again, we can break out of the potential infinite
8209 vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8211 if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8214 if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8215 WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8218 if (x86_page_table_writing_insn(ctxt))
8221 if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8224 vcpu->arch.last_retry_eip = ctxt->eip;
8225 vcpu->arch.last_retry_addr = cr2_or_gpa;
8227 if (!vcpu->arch.mmu->root_role.direct)
8228 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8230 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8235 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8236 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8238 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
8240 trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
8243 vcpu->arch.hflags |= HF_SMM_MASK;
8245 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
8247 /* Process a latched INIT or SMI, if any. */
8248 kvm_make_request(KVM_REQ_EVENT, vcpu);
8251 * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8252 * on SMM exit we still need to reload them from
8255 vcpu->arch.pdptrs_from_userspace = false;
8258 kvm_mmu_reset_context(vcpu);
8261 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8270 for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8271 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8276 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8278 struct kvm_run *kvm_run = vcpu->run;
8280 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8281 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8282 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8283 kvm_run->debug.arch.exception = DB_VECTOR;
8284 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8287 kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8291 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8293 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8296 r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8300 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8303 * rflags is the old, "raw" value of the flags. The new value has
8304 * not been saved yet.
8306 * This is correct even for TF set by the guest, because "the
8307 * processor will not generate this exception after the instruction
8308 * that sets the TF flag".
8310 if (unlikely(rflags & X86_EFLAGS_TF))
8311 r = kvm_vcpu_do_singlestep(vcpu);
8314 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8316 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu *vcpu, int *r)
8318 if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8319 (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8320 struct kvm_run *kvm_run = vcpu->run;
8321 unsigned long eip = kvm_get_linear_rip(vcpu);
8322 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8323 vcpu->arch.guest_debug_dr7,
8327 kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8328 kvm_run->debug.arch.pc = eip;
8329 kvm_run->debug.arch.exception = DB_VECTOR;
8330 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8336 if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8337 !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8338 unsigned long eip = kvm_get_linear_rip(vcpu);
8339 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8344 kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8353 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8355 switch (ctxt->opcode_len) {
8362 case 0xe6: /* OUT */
8366 case 0x6c: /* INS */
8368 case 0x6e: /* OUTS */
8375 case 0x33: /* RDPMC */
8385 * Decode an instruction for emulation. The caller is responsible for handling
8386 * code breakpoints. Note, manually detecting code breakpoints is unnecessary
8387 * (and wrong) when emulating on an intercepted fault-like exception[*], as
8388 * code breakpoints have higher priority and thus have already been done by
8391 * [*] Except #MC, which is higher priority, but KVM should never emulate in
8392 * response to a machine check.
8394 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8395 void *insn, int insn_len)
8397 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8400 init_emulate_ctxt(vcpu);
8402 r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8404 trace_kvm_emulate_insn_start(vcpu);
8405 ++vcpu->stat.insn_emulation;
8409 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8411 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8412 int emulation_type, void *insn, int insn_len)
8415 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8416 bool writeback = true;
8417 bool write_fault_to_spt;
8419 if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8422 vcpu->arch.l1tf_flush_l1d = true;
8425 * Clear write_fault_to_shadow_pgtable here to ensure it is
8428 write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8429 vcpu->arch.write_fault_to_shadow_pgtable = false;
8431 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8432 kvm_clear_exception_queue(vcpu);
8435 * Return immediately if RIP hits a code breakpoint, such #DBs
8436 * are fault-like and are higher priority than any faults on
8437 * the code fetch itself.
8439 if (!(emulation_type & EMULTYPE_SKIP) &&
8440 kvm_vcpu_check_code_breakpoint(vcpu, &r))
8443 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8445 if (r != EMULATION_OK) {
8446 if ((emulation_type & EMULTYPE_TRAP_UD) ||
8447 (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8448 kvm_queue_exception(vcpu, UD_VECTOR);
8451 if (reexecute_instruction(vcpu, cr2_or_gpa,
8455 if (ctxt->have_exception) {
8457 * #UD should result in just EMULATION_FAILED, and trap-like
8458 * exception should not be encountered during decode.
8460 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8461 exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8462 inject_emulated_exception(vcpu);
8465 return handle_emulation_failure(vcpu, emulation_type);
8469 if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8470 !is_vmware_backdoor_opcode(ctxt)) {
8471 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8476 * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8477 * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8478 * The caller is responsible for updating interruptibility state and
8479 * injecting single-step #DBs.
8481 if (emulation_type & EMULTYPE_SKIP) {
8482 if (ctxt->mode != X86EMUL_MODE_PROT64)
8483 ctxt->eip = (u32)ctxt->_eip;
8485 ctxt->eip = ctxt->_eip;
8487 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8492 kvm_rip_write(vcpu, ctxt->eip);
8493 if (ctxt->eflags & X86_EFLAGS_RF)
8494 kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8498 if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8501 /* this is needed for vmware backdoor interface to work since it
8502 changes registers values during IO operation */
8503 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8504 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8505 emulator_invalidate_register_cache(ctxt);
8509 if (emulation_type & EMULTYPE_PF) {
8510 /* Save the faulting GPA (cr2) in the address field */
8511 ctxt->exception.address = cr2_or_gpa;
8513 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8514 if (vcpu->arch.mmu->root_role.direct) {
8515 ctxt->gpa_available = true;
8516 ctxt->gpa_val = cr2_or_gpa;
8519 /* Sanitize the address out of an abundance of paranoia. */
8520 ctxt->exception.address = 0;
8523 r = x86_emulate_insn(ctxt);
8525 if (r == EMULATION_INTERCEPTED)
8528 if (r == EMULATION_FAILED) {
8529 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8533 return handle_emulation_failure(vcpu, emulation_type);
8536 if (ctxt->have_exception) {
8538 if (inject_emulated_exception(vcpu))
8540 } else if (vcpu->arch.pio.count) {
8541 if (!vcpu->arch.pio.in) {
8542 /* FIXME: return into emulator if single-stepping. */
8543 vcpu->arch.pio.count = 0;
8546 vcpu->arch.complete_userspace_io = complete_emulated_pio;
8549 } else if (vcpu->mmio_needed) {
8550 ++vcpu->stat.mmio_exits;
8552 if (!vcpu->mmio_is_write)
8555 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8556 } else if (vcpu->arch.complete_userspace_io) {
8559 } else if (r == EMULATION_RESTART)
8566 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8567 toggle_interruptibility(vcpu, ctxt->interruptibility);
8568 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8569 if (!ctxt->have_exception ||
8570 exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8571 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8572 if (ctxt->is_branch)
8573 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8574 kvm_rip_write(vcpu, ctxt->eip);
8575 if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8576 r = kvm_vcpu_do_singlestep(vcpu);
8577 static_call_cond(kvm_x86_update_emulated_instruction)(vcpu);
8578 __kvm_set_rflags(vcpu, ctxt->eflags);
8582 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8583 * do nothing, and it will be requested again as soon as
8584 * the shadow expires. But we still need to check here,
8585 * because POPF has no interrupt shadow.
8587 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8588 kvm_make_request(KVM_REQ_EVENT, vcpu);
8590 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8595 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8597 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8599 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8601 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8602 void *insn, int insn_len)
8604 return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8606 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8608 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8610 vcpu->arch.pio.count = 0;
8614 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8616 vcpu->arch.pio.count = 0;
8618 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8621 return kvm_skip_emulated_instruction(vcpu);
8624 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8625 unsigned short port)
8627 unsigned long val = kvm_rax_read(vcpu);
8628 int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8634 * Workaround userspace that relies on old KVM behavior of %rip being
8635 * incremented prior to exiting to userspace to handle "OUT 0x7e".
8638 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8639 vcpu->arch.complete_userspace_io =
8640 complete_fast_pio_out_port_0x7e;
8641 kvm_skip_emulated_instruction(vcpu);
8643 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8644 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8649 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8653 /* We should only ever be called with arch.pio.count equal to 1 */
8654 BUG_ON(vcpu->arch.pio.count != 1);
8656 if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8657 vcpu->arch.pio.count = 0;
8661 /* For size less than 4 we merge, else we zero extend */
8662 val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8665 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8666 * the copy and tracing
8668 emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8669 kvm_rax_write(vcpu, val);
8671 return kvm_skip_emulated_instruction(vcpu);
8674 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8675 unsigned short port)
8680 /* For size less than 4 we merge, else we zero extend */
8681 val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8683 ret = emulator_pio_in(vcpu, size, port, &val, 1);
8685 kvm_rax_write(vcpu, val);
8689 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8690 vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8695 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8700 ret = kvm_fast_pio_in(vcpu, size, port);
8702 ret = kvm_fast_pio_out(vcpu, size, port);
8703 return ret && kvm_skip_emulated_instruction(vcpu);
8705 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8707 static int kvmclock_cpu_down_prep(unsigned int cpu)
8709 __this_cpu_write(cpu_tsc_khz, 0);
8713 static void tsc_khz_changed(void *data)
8715 struct cpufreq_freqs *freq = data;
8716 unsigned long khz = 0;
8720 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8721 khz = cpufreq_quick_get(raw_smp_processor_id());
8724 __this_cpu_write(cpu_tsc_khz, khz);
8727 #ifdef CONFIG_X86_64
8728 static void kvm_hyperv_tsc_notifier(void)
8733 mutex_lock(&kvm_lock);
8734 list_for_each_entry(kvm, &vm_list, vm_list)
8735 kvm_make_mclock_inprogress_request(kvm);
8737 /* no guest entries from this point */
8738 hyperv_stop_tsc_emulation();
8740 /* TSC frequency always matches when on Hyper-V */
8741 for_each_present_cpu(cpu)
8742 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8743 kvm_max_guest_tsc_khz = tsc_khz;
8745 list_for_each_entry(kvm, &vm_list, vm_list) {
8746 __kvm_start_pvclock_update(kvm);
8747 pvclock_update_vm_gtod_copy(kvm);
8748 kvm_end_pvclock_update(kvm);
8751 mutex_unlock(&kvm_lock);
8755 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8758 struct kvm_vcpu *vcpu;
8763 * We allow guests to temporarily run on slowing clocks,
8764 * provided we notify them after, or to run on accelerating
8765 * clocks, provided we notify them before. Thus time never
8768 * However, we have a problem. We can't atomically update
8769 * the frequency of a given CPU from this function; it is
8770 * merely a notifier, which can be called from any CPU.
8771 * Changing the TSC frequency at arbitrary points in time
8772 * requires a recomputation of local variables related to
8773 * the TSC for each VCPU. We must flag these local variables
8774 * to be updated and be sure the update takes place with the
8775 * new frequency before any guests proceed.
8777 * Unfortunately, the combination of hotplug CPU and frequency
8778 * change creates an intractable locking scenario; the order
8779 * of when these callouts happen is undefined with respect to
8780 * CPU hotplug, and they can race with each other. As such,
8781 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8782 * undefined; you can actually have a CPU frequency change take
8783 * place in between the computation of X and the setting of the
8784 * variable. To protect against this problem, all updates of
8785 * the per_cpu tsc_khz variable are done in an interrupt
8786 * protected IPI, and all callers wishing to update the value
8787 * must wait for a synchronous IPI to complete (which is trivial
8788 * if the caller is on the CPU already). This establishes the
8789 * necessary total order on variable updates.
8791 * Note that because a guest time update may take place
8792 * anytime after the setting of the VCPU's request bit, the
8793 * correct TSC value must be set before the request. However,
8794 * to ensure the update actually makes it to any guest which
8795 * starts running in hardware virtualization between the set
8796 * and the acquisition of the spinlock, we must also ping the
8797 * CPU after setting the request bit.
8801 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8803 mutex_lock(&kvm_lock);
8804 list_for_each_entry(kvm, &vm_list, vm_list) {
8805 kvm_for_each_vcpu(i, vcpu, kvm) {
8806 if (vcpu->cpu != cpu)
8808 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8809 if (vcpu->cpu != raw_smp_processor_id())
8813 mutex_unlock(&kvm_lock);
8815 if (freq->old < freq->new && send_ipi) {
8817 * We upscale the frequency. Must make the guest
8818 * doesn't see old kvmclock values while running with
8819 * the new frequency, otherwise we risk the guest sees
8820 * time go backwards.
8822 * In case we update the frequency for another cpu
8823 * (which might be in guest context) send an interrupt
8824 * to kick the cpu out of guest context. Next time
8825 * guest context is entered kvmclock will be updated,
8826 * so the guest will not see stale values.
8828 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8832 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8835 struct cpufreq_freqs *freq = data;
8838 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8840 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8843 for_each_cpu(cpu, freq->policy->cpus)
8844 __kvmclock_cpufreq_notifier(freq, cpu);
8849 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8850 .notifier_call = kvmclock_cpufreq_notifier
8853 static int kvmclock_cpu_online(unsigned int cpu)
8855 tsc_khz_changed(NULL);
8859 static void kvm_timer_init(void)
8861 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8862 max_tsc_khz = tsc_khz;
8864 if (IS_ENABLED(CONFIG_CPU_FREQ)) {
8865 struct cpufreq_policy *policy;
8869 policy = cpufreq_cpu_get(cpu);
8871 if (policy->cpuinfo.max_freq)
8872 max_tsc_khz = policy->cpuinfo.max_freq;
8873 cpufreq_cpu_put(policy);
8877 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8878 CPUFREQ_TRANSITION_NOTIFIER);
8881 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8882 kvmclock_cpu_online, kvmclock_cpu_down_prep);
8885 #ifdef CONFIG_X86_64
8886 static void pvclock_gtod_update_fn(struct work_struct *work)
8889 struct kvm_vcpu *vcpu;
8892 mutex_lock(&kvm_lock);
8893 list_for_each_entry(kvm, &vm_list, vm_list)
8894 kvm_for_each_vcpu(i, vcpu, kvm)
8895 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8896 atomic_set(&kvm_guest_has_master_clock, 0);
8897 mutex_unlock(&kvm_lock);
8900 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8903 * Indirection to move queue_work() out of the tk_core.seq write held
8904 * region to prevent possible deadlocks against time accessors which
8905 * are invoked with work related locks held.
8907 static void pvclock_irq_work_fn(struct irq_work *w)
8909 queue_work(system_long_wq, &pvclock_gtod_work);
8912 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8915 * Notification about pvclock gtod data update.
8917 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8920 struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8921 struct timekeeper *tk = priv;
8923 update_pvclock_gtod(tk);
8926 * Disable master clock if host does not trust, or does not use,
8927 * TSC based clocksource. Delegate queue_work() to irq_work as
8928 * this is invoked with tk_core.seq write held.
8930 if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8931 atomic_read(&kvm_guest_has_master_clock) != 0)
8932 irq_work_queue(&pvclock_irq_work);
8936 static struct notifier_block pvclock_gtod_notifier = {
8937 .notifier_call = pvclock_gtod_notify,
8941 int kvm_arch_init(void *opaque)
8943 struct kvm_x86_init_ops *ops = opaque;
8946 if (kvm_x86_ops.hardware_enable) {
8947 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8952 if (!ops->cpu_has_kvm_support()) {
8953 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8954 ops->runtime_ops->name);
8958 if (ops->disabled_by_bios()) {
8959 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8960 ops->runtime_ops->name);
8966 * KVM explicitly assumes that the guest has an FPU and
8967 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8968 * vCPU's FPU state as a fxregs_state struct.
8970 if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8971 printk(KERN_ERR "kvm: inadequate fpu\n");
8976 if (IS_ENABLED(CONFIG_PREEMPT_RT) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8977 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
8984 x86_emulator_cache = kvm_alloc_emulator_cache();
8985 if (!x86_emulator_cache) {
8986 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8990 user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8991 if (!user_return_msrs) {
8992 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8993 goto out_free_x86_emulator_cache;
8995 kvm_nr_uret_msrs = 0;
8997 r = kvm_mmu_vendor_module_init();
8999 goto out_free_percpu;
9003 if (boot_cpu_has(X86_FEATURE_XSAVE)) {
9004 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
9005 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
9008 if (pi_inject_timer == -1)
9009 pi_inject_timer = housekeeping_enabled(HK_TYPE_TIMER);
9010 #ifdef CONFIG_X86_64
9011 pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
9013 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9014 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
9020 free_percpu(user_return_msrs);
9021 out_free_x86_emulator_cache:
9022 kmem_cache_destroy(x86_emulator_cache);
9027 void kvm_arch_exit(void)
9029 #ifdef CONFIG_X86_64
9030 if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
9031 clear_hv_tscchange_cb();
9035 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
9036 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
9037 CPUFREQ_TRANSITION_NOTIFIER);
9038 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
9039 #ifdef CONFIG_X86_64
9040 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
9041 irq_work_sync(&pvclock_irq_work);
9042 cancel_work_sync(&pvclock_gtod_work);
9044 kvm_x86_ops.hardware_enable = NULL;
9045 kvm_mmu_vendor_module_exit();
9046 free_percpu(user_return_msrs);
9047 kmem_cache_destroy(x86_emulator_cache);
9048 #ifdef CONFIG_KVM_XEN
9049 static_key_deferred_flush(&kvm_xen_enabled);
9050 WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
9054 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
9057 * The vCPU has halted, e.g. executed HLT. Update the run state if the
9058 * local APIC is in-kernel, the run loop will detect the non-runnable
9059 * state and halt the vCPU. Exit to userspace if the local APIC is
9060 * managed by userspace, in which case userspace is responsible for
9061 * handling wake events.
9063 ++vcpu->stat.halt_exits;
9064 if (lapic_in_kernel(vcpu)) {
9065 vcpu->arch.mp_state = state;
9068 vcpu->run->exit_reason = reason;
9073 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
9075 return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
9077 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
9079 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
9081 int ret = kvm_skip_emulated_instruction(vcpu);
9083 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9084 * KVM_EXIT_DEBUG here.
9086 return kvm_emulate_halt_noskip(vcpu) && ret;
9088 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
9090 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
9092 int ret = kvm_skip_emulated_instruction(vcpu);
9094 return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
9095 KVM_EXIT_AP_RESET_HOLD) && ret;
9097 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
9099 #ifdef CONFIG_X86_64
9100 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
9101 unsigned long clock_type)
9103 struct kvm_clock_pairing clock_pairing;
9104 struct timespec64 ts;
9108 if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
9109 return -KVM_EOPNOTSUPP;
9112 * When tsc is in permanent catchup mode guests won't be able to use
9113 * pvclock_read_retry loop to get consistent view of pvclock
9115 if (vcpu->arch.tsc_always_catchup)
9116 return -KVM_EOPNOTSUPP;
9118 if (!kvm_get_walltime_and_clockread(&ts, &cycle))
9119 return -KVM_EOPNOTSUPP;
9121 clock_pairing.sec = ts.tv_sec;
9122 clock_pairing.nsec = ts.tv_nsec;
9123 clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
9124 clock_pairing.flags = 0;
9125 memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
9128 if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
9129 sizeof(struct kvm_clock_pairing)))
9137 * kvm_pv_kick_cpu_op: Kick a vcpu.
9139 * @apicid - apicid of vcpu to be kicked.
9141 static void kvm_pv_kick_cpu_op(struct kvm *kvm, int apicid)
9143 struct kvm_lapic_irq lapic_irq;
9145 lapic_irq.shorthand = APIC_DEST_NOSHORT;
9146 lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
9147 lapic_irq.level = 0;
9148 lapic_irq.dest_id = apicid;
9149 lapic_irq.msi_redir_hint = false;
9151 lapic_irq.delivery_mode = APIC_DM_REMRD;
9152 kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
9155 bool kvm_apicv_activated(struct kvm *kvm)
9157 return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
9159 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
9161 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu)
9163 ulong vm_reasons = READ_ONCE(vcpu->kvm->arch.apicv_inhibit_reasons);
9164 ulong vcpu_reasons = static_call(kvm_x86_vcpu_get_apicv_inhibit_reasons)(vcpu);
9166 return (vm_reasons | vcpu_reasons) == 0;
9168 EXPORT_SYMBOL_GPL(kvm_vcpu_apicv_activated);
9170 static void set_or_clear_apicv_inhibit(unsigned long *inhibits,
9171 enum kvm_apicv_inhibit reason, bool set)
9174 __set_bit(reason, inhibits);
9176 __clear_bit(reason, inhibits);
9178 trace_kvm_apicv_inhibit_changed(reason, set, *inhibits);
9181 static void kvm_apicv_init(struct kvm *kvm)
9183 unsigned long *inhibits = &kvm->arch.apicv_inhibit_reasons;
9185 init_rwsem(&kvm->arch.apicv_update_lock);
9187 set_or_clear_apicv_inhibit(inhibits, APICV_INHIBIT_REASON_ABSENT, true);
9190 set_or_clear_apicv_inhibit(inhibits,
9191 APICV_INHIBIT_REASON_DISABLE, true);
9194 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
9196 struct kvm_vcpu *target = NULL;
9197 struct kvm_apic_map *map;
9199 vcpu->stat.directed_yield_attempted++;
9201 if (single_task_running())
9205 map = rcu_dereference(vcpu->kvm->arch.apic_map);
9207 if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9208 target = map->phys_map[dest_id]->vcpu;
9212 if (!target || !READ_ONCE(target->ready))
9215 /* Ignore requests to yield to self */
9219 if (kvm_vcpu_yield_to(target) <= 0)
9222 vcpu->stat.directed_yield_successful++;
9228 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9230 u64 ret = vcpu->run->hypercall.ret;
9232 if (!is_64_bit_mode(vcpu))
9234 kvm_rax_write(vcpu, ret);
9235 ++vcpu->stat.hypercalls;
9236 return kvm_skip_emulated_instruction(vcpu);
9239 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9241 unsigned long nr, a0, a1, a2, a3, ret;
9244 if (kvm_xen_hypercall_enabled(vcpu->kvm))
9245 return kvm_xen_hypercall(vcpu);
9247 if (kvm_hv_hypercall_enabled(vcpu))
9248 return kvm_hv_hypercall(vcpu);
9250 nr = kvm_rax_read(vcpu);
9251 a0 = kvm_rbx_read(vcpu);
9252 a1 = kvm_rcx_read(vcpu);
9253 a2 = kvm_rdx_read(vcpu);
9254 a3 = kvm_rsi_read(vcpu);
9256 trace_kvm_hypercall(nr, a0, a1, a2, a3);
9258 op_64_bit = is_64_bit_hypercall(vcpu);
9267 if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9275 case KVM_HC_VAPIC_POLL_IRQ:
9278 case KVM_HC_KICK_CPU:
9279 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9282 kvm_pv_kick_cpu_op(vcpu->kvm, a1);
9283 kvm_sched_yield(vcpu, a1);
9286 #ifdef CONFIG_X86_64
9287 case KVM_HC_CLOCK_PAIRING:
9288 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9291 case KVM_HC_SEND_IPI:
9292 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9295 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9297 case KVM_HC_SCHED_YIELD:
9298 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9301 kvm_sched_yield(vcpu, a0);
9304 case KVM_HC_MAP_GPA_RANGE: {
9305 u64 gpa = a0, npages = a1, attrs = a2;
9308 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9311 if (!PAGE_ALIGNED(gpa) || !npages ||
9312 gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9317 vcpu->run->exit_reason = KVM_EXIT_HYPERCALL;
9318 vcpu->run->hypercall.nr = KVM_HC_MAP_GPA_RANGE;
9319 vcpu->run->hypercall.args[0] = gpa;
9320 vcpu->run->hypercall.args[1] = npages;
9321 vcpu->run->hypercall.args[2] = attrs;
9322 vcpu->run->hypercall.longmode = op_64_bit;
9323 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9333 kvm_rax_write(vcpu, ret);
9335 ++vcpu->stat.hypercalls;
9336 return kvm_skip_emulated_instruction(vcpu);
9338 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9340 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9342 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9343 char instruction[3];
9344 unsigned long rip = kvm_rip_read(vcpu);
9347 * If the quirk is disabled, synthesize a #UD and let the guest pick up
9350 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_FIX_HYPERCALL_INSN)) {
9351 ctxt->exception.error_code_valid = false;
9352 ctxt->exception.vector = UD_VECTOR;
9353 ctxt->have_exception = true;
9354 return X86EMUL_PROPAGATE_FAULT;
9357 static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9359 return emulator_write_emulated(ctxt, rip, instruction, 3,
9363 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9365 return vcpu->run->request_interrupt_window &&
9366 likely(!pic_in_kernel(vcpu->kvm));
9369 /* Called within kvm->srcu read side. */
9370 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9372 struct kvm_run *kvm_run = vcpu->run;
9374 kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9375 kvm_run->cr8 = kvm_get_cr8(vcpu);
9376 kvm_run->apic_base = kvm_get_apic_base(vcpu);
9378 kvm_run->ready_for_interrupt_injection =
9379 pic_in_kernel(vcpu->kvm) ||
9380 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9383 kvm_run->flags |= KVM_RUN_X86_SMM;
9386 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9390 if (!kvm_x86_ops.update_cr8_intercept)
9393 if (!lapic_in_kernel(vcpu))
9396 if (vcpu->arch.apicv_active)
9399 if (!vcpu->arch.apic->vapic_addr)
9400 max_irr = kvm_lapic_find_highest_irr(vcpu);
9407 tpr = kvm_lapic_get_cr8(vcpu);
9409 static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9413 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9415 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9416 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9420 return kvm_x86_ops.nested_ops->check_events(vcpu);
9423 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9425 if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9426 vcpu->arch.exception.error_code = false;
9427 static_call(kvm_x86_queue_exception)(vcpu);
9430 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9433 bool can_inject = true;
9435 /* try to reinject previous events if any */
9437 if (vcpu->arch.exception.injected) {
9438 kvm_inject_exception(vcpu);
9442 * Do not inject an NMI or interrupt if there is a pending
9443 * exception. Exceptions and interrupts are recognized at
9444 * instruction boundaries, i.e. the start of an instruction.
9445 * Trap-like exceptions, e.g. #DB, have higher priority than
9446 * NMIs and interrupts, i.e. traps are recognized before an
9447 * NMI/interrupt that's pending on the same instruction.
9448 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9449 * priority, but are only generated (pended) during instruction
9450 * execution, i.e. a pending fault-like exception means the
9451 * fault occurred on the *previous* instruction and must be
9452 * serviced prior to recognizing any new events in order to
9453 * fully complete the previous instruction.
9455 else if (!vcpu->arch.exception.pending) {
9456 if (vcpu->arch.nmi_injected) {
9457 static_call(kvm_x86_inject_nmi)(vcpu);
9459 } else if (vcpu->arch.interrupt.injected) {
9460 static_call(kvm_x86_inject_irq)(vcpu);
9465 WARN_ON_ONCE(vcpu->arch.exception.injected &&
9466 vcpu->arch.exception.pending);
9469 * Call check_nested_events() even if we reinjected a previous event
9470 * in order for caller to determine if it should require immediate-exit
9471 * from L2 to L1 due to pending L1 events which require exit
9474 if (is_guest_mode(vcpu)) {
9475 r = kvm_check_nested_events(vcpu);
9480 /* try to inject new event if pending */
9481 if (vcpu->arch.exception.pending) {
9482 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9483 vcpu->arch.exception.has_error_code,
9484 vcpu->arch.exception.error_code);
9486 vcpu->arch.exception.pending = false;
9487 vcpu->arch.exception.injected = true;
9489 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9490 __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9493 if (vcpu->arch.exception.nr == DB_VECTOR) {
9494 kvm_deliver_exception_payload(vcpu);
9495 if (vcpu->arch.dr7 & DR7_GD) {
9496 vcpu->arch.dr7 &= ~DR7_GD;
9497 kvm_update_dr7(vcpu);
9501 kvm_inject_exception(vcpu);
9505 /* Don't inject interrupts if the user asked to avoid doing so */
9506 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9510 * Finally, inject interrupt events. If an event cannot be injected
9511 * due to architectural conditions (e.g. IF=0) a window-open exit
9512 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
9513 * and can architecturally be injected, but we cannot do it right now:
9514 * an interrupt could have arrived just now and we have to inject it
9515 * as a vmexit, or there could already an event in the queue, which is
9516 * indicated by can_inject. In that case we request an immediate exit
9517 * in order to make progress and get back here for another iteration.
9518 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9520 if (vcpu->arch.smi_pending) {
9521 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9525 vcpu->arch.smi_pending = false;
9526 ++vcpu->arch.smi_count;
9530 static_call(kvm_x86_enable_smi_window)(vcpu);
9533 if (vcpu->arch.nmi_pending) {
9534 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9538 --vcpu->arch.nmi_pending;
9539 vcpu->arch.nmi_injected = true;
9540 static_call(kvm_x86_inject_nmi)(vcpu);
9542 WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9544 if (vcpu->arch.nmi_pending)
9545 static_call(kvm_x86_enable_nmi_window)(vcpu);
9548 if (kvm_cpu_has_injectable_intr(vcpu)) {
9549 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9553 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9554 static_call(kvm_x86_inject_irq)(vcpu);
9555 WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9557 if (kvm_cpu_has_injectable_intr(vcpu))
9558 static_call(kvm_x86_enable_irq_window)(vcpu);
9561 if (is_guest_mode(vcpu) &&
9562 kvm_x86_ops.nested_ops->hv_timer_pending &&
9563 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9564 *req_immediate_exit = true;
9566 WARN_ON(vcpu->arch.exception.pending);
9571 *req_immediate_exit = true;
9577 static void process_nmi(struct kvm_vcpu *vcpu)
9582 * x86 is limited to one NMI running, and one NMI pending after it.
9583 * If an NMI is already in progress, limit further NMIs to just one.
9584 * Otherwise, allow two (and we'll inject the first one immediately).
9586 if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9589 vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9590 vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9591 kvm_make_request(KVM_REQ_EVENT, vcpu);
9594 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9597 flags |= seg->g << 23;
9598 flags |= seg->db << 22;
9599 flags |= seg->l << 21;
9600 flags |= seg->avl << 20;
9601 flags |= seg->present << 15;
9602 flags |= seg->dpl << 13;
9603 flags |= seg->s << 12;
9604 flags |= seg->type << 8;
9608 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9610 struct kvm_segment seg;
9613 kvm_get_segment(vcpu, &seg, n);
9614 put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9617 offset = 0x7f84 + n * 12;
9619 offset = 0x7f2c + (n - 3) * 12;
9621 put_smstate(u32, buf, offset + 8, seg.base);
9622 put_smstate(u32, buf, offset + 4, seg.limit);
9623 put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9626 #ifdef CONFIG_X86_64
9627 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9629 struct kvm_segment seg;
9633 kvm_get_segment(vcpu, &seg, n);
9634 offset = 0x7e00 + n * 16;
9636 flags = enter_smm_get_segment_flags(&seg) >> 8;
9637 put_smstate(u16, buf, offset, seg.selector);
9638 put_smstate(u16, buf, offset + 2, flags);
9639 put_smstate(u32, buf, offset + 4, seg.limit);
9640 put_smstate(u64, buf, offset + 8, seg.base);
9644 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9647 struct kvm_segment seg;
9651 put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9652 put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9653 put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9654 put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9656 for (i = 0; i < 8; i++)
9657 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9659 kvm_get_dr(vcpu, 6, &val);
9660 put_smstate(u32, buf, 0x7fcc, (u32)val);
9661 kvm_get_dr(vcpu, 7, &val);
9662 put_smstate(u32, buf, 0x7fc8, (u32)val);
9664 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9665 put_smstate(u32, buf, 0x7fc4, seg.selector);
9666 put_smstate(u32, buf, 0x7f64, seg.base);
9667 put_smstate(u32, buf, 0x7f60, seg.limit);
9668 put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9670 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9671 put_smstate(u32, buf, 0x7fc0, seg.selector);
9672 put_smstate(u32, buf, 0x7f80, seg.base);
9673 put_smstate(u32, buf, 0x7f7c, seg.limit);
9674 put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9676 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9677 put_smstate(u32, buf, 0x7f74, dt.address);
9678 put_smstate(u32, buf, 0x7f70, dt.size);
9680 static_call(kvm_x86_get_idt)(vcpu, &dt);
9681 put_smstate(u32, buf, 0x7f58, dt.address);
9682 put_smstate(u32, buf, 0x7f54, dt.size);
9684 for (i = 0; i < 6; i++)
9685 enter_smm_save_seg_32(vcpu, buf, i);
9687 put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9690 put_smstate(u32, buf, 0x7efc, 0x00020000);
9691 put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9694 #ifdef CONFIG_X86_64
9695 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9698 struct kvm_segment seg;
9702 for (i = 0; i < 16; i++)
9703 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9705 put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9706 put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9708 kvm_get_dr(vcpu, 6, &val);
9709 put_smstate(u64, buf, 0x7f68, val);
9710 kvm_get_dr(vcpu, 7, &val);
9711 put_smstate(u64, buf, 0x7f60, val);
9713 put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9714 put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9715 put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9717 put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9720 put_smstate(u32, buf, 0x7efc, 0x00020064);
9722 put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9724 kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9725 put_smstate(u16, buf, 0x7e90, seg.selector);
9726 put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9727 put_smstate(u32, buf, 0x7e94, seg.limit);
9728 put_smstate(u64, buf, 0x7e98, seg.base);
9730 static_call(kvm_x86_get_idt)(vcpu, &dt);
9731 put_smstate(u32, buf, 0x7e84, dt.size);
9732 put_smstate(u64, buf, 0x7e88, dt.address);
9734 kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9735 put_smstate(u16, buf, 0x7e70, seg.selector);
9736 put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9737 put_smstate(u32, buf, 0x7e74, seg.limit);
9738 put_smstate(u64, buf, 0x7e78, seg.base);
9740 static_call(kvm_x86_get_gdt)(vcpu, &dt);
9741 put_smstate(u32, buf, 0x7e64, dt.size);
9742 put_smstate(u64, buf, 0x7e68, dt.address);
9744 for (i = 0; i < 6; i++)
9745 enter_smm_save_seg_64(vcpu, buf, i);
9749 static void enter_smm(struct kvm_vcpu *vcpu)
9751 struct kvm_segment cs, ds;
9756 memset(buf, 0, 512);
9757 #ifdef CONFIG_X86_64
9758 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9759 enter_smm_save_state_64(vcpu, buf);
9762 enter_smm_save_state_32(vcpu, buf);
9765 * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9766 * state (e.g. leave guest mode) after we've saved the state into the
9767 * SMM state-save area.
9769 static_call(kvm_x86_enter_smm)(vcpu, buf);
9771 kvm_smm_changed(vcpu, true);
9772 kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9774 if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9775 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9777 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9779 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9780 kvm_rip_write(vcpu, 0x8000);
9782 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9783 static_call(kvm_x86_set_cr0)(vcpu, cr0);
9784 vcpu->arch.cr0 = cr0;
9786 static_call(kvm_x86_set_cr4)(vcpu, 0);
9788 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9789 dt.address = dt.size = 0;
9790 static_call(kvm_x86_set_idt)(vcpu, &dt);
9792 kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9794 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9795 cs.base = vcpu->arch.smbase;
9800 cs.limit = ds.limit = 0xffffffff;
9801 cs.type = ds.type = 0x3;
9802 cs.dpl = ds.dpl = 0;
9807 cs.avl = ds.avl = 0;
9808 cs.present = ds.present = 1;
9809 cs.unusable = ds.unusable = 0;
9810 cs.padding = ds.padding = 0;
9812 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9813 kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9814 kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9815 kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9816 kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9817 kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9819 #ifdef CONFIG_X86_64
9820 if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9821 static_call(kvm_x86_set_efer)(vcpu, 0);
9824 kvm_update_cpuid_runtime(vcpu);
9825 kvm_mmu_reset_context(vcpu);
9828 static void process_smi(struct kvm_vcpu *vcpu)
9830 vcpu->arch.smi_pending = true;
9831 kvm_make_request(KVM_REQ_EVENT, vcpu);
9834 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9835 unsigned long *vcpu_bitmap)
9837 kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9840 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9842 kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9845 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9849 if (!lapic_in_kernel(vcpu))
9852 down_read(&vcpu->kvm->arch.apicv_update_lock);
9854 activate = kvm_vcpu_apicv_activated(vcpu);
9856 if (vcpu->arch.apicv_active == activate)
9859 vcpu->arch.apicv_active = activate;
9860 kvm_apic_update_apicv(vcpu);
9861 static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9864 * When APICv gets disabled, we may still have injected interrupts
9865 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9866 * still active when the interrupt got accepted. Make sure
9867 * inject_pending_event() is called to check for that.
9869 if (!vcpu->arch.apicv_active)
9870 kvm_make_request(KVM_REQ_EVENT, vcpu);
9873 up_read(&vcpu->kvm->arch.apicv_update_lock);
9875 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9877 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
9878 enum kvm_apicv_inhibit reason, bool set)
9880 unsigned long old, new;
9882 lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9884 if (!static_call(kvm_x86_check_apicv_inhibit_reasons)(reason))
9887 old = new = kvm->arch.apicv_inhibit_reasons;
9889 set_or_clear_apicv_inhibit(&new, reason, set);
9891 if (!!old != !!new) {
9893 * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9894 * false positives in the sanity check WARN in svm_vcpu_run().
9895 * This task will wait for all vCPUs to ack the kick IRQ before
9896 * updating apicv_inhibit_reasons, and all other vCPUs will
9897 * block on acquiring apicv_update_lock so that vCPUs can't
9898 * redo svm_vcpu_run() without seeing the new inhibit state.
9900 * Note, holding apicv_update_lock and taking it in the read
9901 * side (handling the request) also prevents other vCPUs from
9902 * servicing the request with a stale apicv_inhibit_reasons.
9904 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9905 kvm->arch.apicv_inhibit_reasons = new;
9907 unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9908 kvm_zap_gfn_range(kvm, gfn, gfn+1);
9911 kvm->arch.apicv_inhibit_reasons = new;
9915 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
9916 enum kvm_apicv_inhibit reason, bool set)
9921 down_write(&kvm->arch.apicv_update_lock);
9922 __kvm_set_or_clear_apicv_inhibit(kvm, reason, set);
9923 up_write(&kvm->arch.apicv_update_lock);
9925 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit);
9927 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9929 if (!kvm_apic_present(vcpu))
9932 bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9934 if (irqchip_split(vcpu->kvm))
9935 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9937 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9938 if (ioapic_in_kernel(vcpu->kvm))
9939 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9942 if (is_guest_mode(vcpu))
9943 vcpu->arch.load_eoi_exitmap_pending = true;
9945 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9948 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9950 u64 eoi_exit_bitmap[4];
9952 if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9955 if (to_hv_vcpu(vcpu)) {
9956 bitmap_or((ulong *)eoi_exit_bitmap,
9957 vcpu->arch.ioapic_handled_vectors,
9958 to_hv_synic(vcpu)->vec_bitmap, 256);
9959 static_call_cond(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9963 static_call_cond(kvm_x86_load_eoi_exitmap)(
9964 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9967 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9968 unsigned long start, unsigned long end)
9970 unsigned long apic_address;
9973 * The physical address of apic access page is stored in the VMCS.
9974 * Update it when it becomes invalid.
9976 apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9977 if (start <= apic_address && apic_address < end)
9978 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9981 void kvm_arch_guest_memory_reclaimed(struct kvm *kvm)
9983 static_call_cond(kvm_x86_guest_memory_reclaimed)(kvm);
9986 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9988 if (!lapic_in_kernel(vcpu))
9991 static_call_cond(kvm_x86_set_apic_access_page_addr)(vcpu);
9994 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9996 smp_send_reschedule(vcpu->cpu);
9998 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
10001 * Called within kvm->srcu read side.
10002 * Returns 1 to let vcpu_run() continue the guest execution loop without
10003 * exiting to the userspace. Otherwise, the value will be returned to the
10006 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
10010 dm_request_for_irq_injection(vcpu) &&
10011 kvm_cpu_accept_dm_intr(vcpu);
10012 fastpath_t exit_fastpath;
10014 bool req_immediate_exit = false;
10016 /* Forbid vmenter if vcpu dirty ring is soft-full */
10017 if (unlikely(vcpu->kvm->dirty_ring_size &&
10018 kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
10019 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
10020 trace_kvm_dirty_ring_exit(vcpu);
10025 if (kvm_request_pending(vcpu)) {
10026 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
10030 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
10031 if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
10036 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
10037 kvm_mmu_free_obsolete_roots(vcpu);
10038 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
10039 __kvm_migrate_timers(vcpu);
10040 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
10041 kvm_update_masterclock(vcpu->kvm);
10042 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
10043 kvm_gen_kvmclock_update(vcpu);
10044 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
10045 r = kvm_guest_time_update(vcpu);
10049 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
10050 kvm_mmu_sync_roots(vcpu);
10051 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
10052 kvm_mmu_load_pgd(vcpu);
10053 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
10054 kvm_vcpu_flush_tlb_all(vcpu);
10056 /* Flushing all ASIDs flushes the current ASID... */
10057 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
10059 kvm_service_local_tlb_flush_requests(vcpu);
10061 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
10062 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
10066 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
10067 if (is_guest_mode(vcpu)) {
10068 kvm_x86_ops.nested_ops->triple_fault(vcpu);
10070 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
10071 vcpu->mmio_needed = 0;
10076 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
10077 /* Page is swapped out. Do synthetic halt */
10078 vcpu->arch.apf.halted = true;
10082 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
10083 record_steal_time(vcpu);
10084 if (kvm_check_request(KVM_REQ_SMI, vcpu))
10086 if (kvm_check_request(KVM_REQ_NMI, vcpu))
10088 if (kvm_check_request(KVM_REQ_PMU, vcpu))
10089 kvm_pmu_handle_event(vcpu);
10090 if (kvm_check_request(KVM_REQ_PMI, vcpu))
10091 kvm_pmu_deliver_pmi(vcpu);
10092 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
10093 BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
10094 if (test_bit(vcpu->arch.pending_ioapic_eoi,
10095 vcpu->arch.ioapic_handled_vectors)) {
10096 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
10097 vcpu->run->eoi.vector =
10098 vcpu->arch.pending_ioapic_eoi;
10103 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
10104 vcpu_scan_ioapic(vcpu);
10105 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
10106 vcpu_load_eoi_exitmap(vcpu);
10107 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
10108 kvm_vcpu_reload_apic_access_page(vcpu);
10109 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
10110 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10111 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
10112 vcpu->run->system_event.ndata = 0;
10116 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
10117 vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10118 vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
10119 vcpu->run->system_event.ndata = 0;
10123 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
10124 struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
10126 vcpu->run->exit_reason = KVM_EXIT_HYPERV;
10127 vcpu->run->hyperv = hv_vcpu->exit;
10133 * KVM_REQ_HV_STIMER has to be processed after
10134 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10135 * depend on the guest clock being up-to-date
10137 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
10138 kvm_hv_process_stimers(vcpu);
10139 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
10140 kvm_vcpu_update_apicv(vcpu);
10141 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
10142 kvm_check_async_pf_completion(vcpu);
10143 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
10144 static_call(kvm_x86_msr_filter_changed)(vcpu);
10146 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
10147 static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
10150 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
10151 kvm_xen_has_interrupt(vcpu)) {
10152 ++vcpu->stat.req_event;
10153 r = kvm_apic_accept_events(vcpu);
10158 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
10163 r = inject_pending_event(vcpu, &req_immediate_exit);
10169 static_call(kvm_x86_enable_irq_window)(vcpu);
10171 if (kvm_lapic_enabled(vcpu)) {
10172 update_cr8_intercept(vcpu);
10173 kvm_lapic_sync_to_vapic(vcpu);
10177 r = kvm_mmu_reload(vcpu);
10179 goto cancel_injection;
10184 static_call(kvm_x86_prepare_switch_to_guest)(vcpu);
10187 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
10188 * IPI are then delayed after guest entry, which ensures that they
10189 * result in virtual interrupt delivery.
10191 local_irq_disable();
10193 /* Store vcpu->apicv_active before vcpu->mode. */
10194 smp_store_release(&vcpu->mode, IN_GUEST_MODE);
10196 kvm_vcpu_srcu_read_unlock(vcpu);
10199 * 1) We should set ->mode before checking ->requests. Please see
10200 * the comment in kvm_vcpu_exiting_guest_mode().
10202 * 2) For APICv, we should set ->mode before checking PID.ON. This
10203 * pairs with the memory barrier implicit in pi_test_and_set_on
10204 * (see vmx_deliver_posted_interrupt).
10206 * 3) This also orders the write to mode from any reads to the page
10207 * tables done while the VCPU is running. Please see the comment
10208 * in kvm_flush_remote_tlbs.
10210 smp_mb__after_srcu_read_unlock();
10213 * Process pending posted interrupts to handle the case where the
10214 * notification IRQ arrived in the host, or was never sent (because the
10215 * target vCPU wasn't running). Do this regardless of the vCPU's APICv
10216 * status, KVM doesn't update assigned devices when APICv is inhibited,
10217 * i.e. they can post interrupts even if APICv is temporarily disabled.
10219 if (kvm_lapic_enabled(vcpu))
10220 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10222 if (kvm_vcpu_exit_request(vcpu)) {
10223 vcpu->mode = OUTSIDE_GUEST_MODE;
10225 local_irq_enable();
10227 kvm_vcpu_srcu_read_lock(vcpu);
10229 goto cancel_injection;
10232 if (req_immediate_exit) {
10233 kvm_make_request(KVM_REQ_EVENT, vcpu);
10234 static_call(kvm_x86_request_immediate_exit)(vcpu);
10237 fpregs_assert_state_consistent();
10238 if (test_thread_flag(TIF_NEED_FPU_LOAD))
10239 switch_fpu_return();
10241 if (vcpu->arch.guest_fpu.xfd_err)
10242 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10244 if (unlikely(vcpu->arch.switch_db_regs)) {
10245 set_debugreg(0, 7);
10246 set_debugreg(vcpu->arch.eff_db[0], 0);
10247 set_debugreg(vcpu->arch.eff_db[1], 1);
10248 set_debugreg(vcpu->arch.eff_db[2], 2);
10249 set_debugreg(vcpu->arch.eff_db[3], 3);
10250 } else if (unlikely(hw_breakpoint_active())) {
10251 set_debugreg(0, 7);
10254 guest_timing_enter_irqoff();
10258 * Assert that vCPU vs. VM APICv state is consistent. An APICv
10259 * update must kick and wait for all vCPUs before toggling the
10260 * per-VM state, and responsing vCPUs must wait for the update
10261 * to complete before servicing KVM_REQ_APICV_UPDATE.
10263 WARN_ON_ONCE(kvm_vcpu_apicv_activated(vcpu) != kvm_vcpu_apicv_active(vcpu));
10265 exit_fastpath = static_call(kvm_x86_vcpu_run)(vcpu);
10266 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10269 if (kvm_lapic_enabled(vcpu))
10270 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10272 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10273 exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10279 * Do this here before restoring debug registers on the host. And
10280 * since we do this before handling the vmexit, a DR access vmexit
10281 * can (a) read the correct value of the debug registers, (b) set
10282 * KVM_DEBUGREG_WONT_EXIT again.
10284 if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10285 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10286 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10287 kvm_update_dr0123(vcpu);
10288 kvm_update_dr7(vcpu);
10292 * If the guest has used debug registers, at least dr7
10293 * will be disabled while returning to the host.
10294 * If we don't have active breakpoints in the host, we don't
10295 * care about the messed up debug address registers. But if
10296 * we have some of them active, restore the old state.
10298 if (hw_breakpoint_active())
10299 hw_breakpoint_restore();
10301 vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10302 vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10304 vcpu->mode = OUTSIDE_GUEST_MODE;
10308 * Sync xfd before calling handle_exit_irqoff() which may
10309 * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10310 * in #NM irqoff handler).
10312 if (vcpu->arch.xfd_no_write_intercept)
10313 fpu_sync_guest_vmexit_xfd_state();
10315 static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10317 if (vcpu->arch.guest_fpu.xfd_err)
10318 wrmsrl(MSR_IA32_XFD_ERR, 0);
10321 * Consume any pending interrupts, including the possible source of
10322 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10323 * An instruction is required after local_irq_enable() to fully unblock
10324 * interrupts on processors that implement an interrupt shadow, the
10325 * stat.exits increment will do nicely.
10327 kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10328 local_irq_enable();
10329 ++vcpu->stat.exits;
10330 local_irq_disable();
10331 kvm_after_interrupt(vcpu);
10334 * Wait until after servicing IRQs to account guest time so that any
10335 * ticks that occurred while running the guest are properly accounted
10336 * to the guest. Waiting until IRQs are enabled degrades the accuracy
10337 * of accounting via context tracking, but the loss of accuracy is
10338 * acceptable for all known use cases.
10340 guest_timing_exit_irqoff();
10342 local_irq_enable();
10345 kvm_vcpu_srcu_read_lock(vcpu);
10348 * Profile KVM exit RIPs:
10350 if (unlikely(prof_on == KVM_PROFILING)) {
10351 unsigned long rip = kvm_rip_read(vcpu);
10352 profile_hit(KVM_PROFILING, (void *)rip);
10355 if (unlikely(vcpu->arch.tsc_always_catchup))
10356 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10358 if (vcpu->arch.apic_attention)
10359 kvm_lapic_sync_from_vapic(vcpu);
10361 r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10365 if (req_immediate_exit)
10366 kvm_make_request(KVM_REQ_EVENT, vcpu);
10367 static_call(kvm_x86_cancel_injection)(vcpu);
10368 if (unlikely(vcpu->arch.apic_attention))
10369 kvm_lapic_sync_from_vapic(vcpu);
10374 /* Called within kvm->srcu read side. */
10375 static inline int vcpu_block(struct kvm_vcpu *vcpu)
10379 if (!kvm_arch_vcpu_runnable(vcpu)) {
10381 * Switch to the software timer before halt-polling/blocking as
10382 * the guest's timer may be a break event for the vCPU, and the
10383 * hypervisor timer runs only when the CPU is in guest mode.
10384 * Switch before halt-polling so that KVM recognizes an expired
10385 * timer before blocking.
10387 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10389 kvm_lapic_switch_to_sw_timer(vcpu);
10391 kvm_vcpu_srcu_read_unlock(vcpu);
10392 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10393 kvm_vcpu_halt(vcpu);
10395 kvm_vcpu_block(vcpu);
10396 kvm_vcpu_srcu_read_lock(vcpu);
10399 kvm_lapic_switch_to_hv_timer(vcpu);
10401 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10405 if (kvm_apic_accept_events(vcpu) < 0)
10407 switch(vcpu->arch.mp_state) {
10408 case KVM_MP_STATE_HALTED:
10409 case KVM_MP_STATE_AP_RESET_HOLD:
10410 vcpu->arch.pv.pv_unhalted = false;
10411 vcpu->arch.mp_state =
10412 KVM_MP_STATE_RUNNABLE;
10414 case KVM_MP_STATE_RUNNABLE:
10415 vcpu->arch.apf.halted = false;
10417 case KVM_MP_STATE_INIT_RECEIVED:
10425 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10427 if (is_guest_mode(vcpu))
10428 kvm_check_nested_events(vcpu);
10430 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10431 !vcpu->arch.apf.halted);
10434 /* Called within kvm->srcu read side. */
10435 static int vcpu_run(struct kvm_vcpu *vcpu)
10439 vcpu->arch.l1tf_flush_l1d = true;
10443 * If another guest vCPU requests a PV TLB flush in the middle
10444 * of instruction emulation, the rest of the emulation could
10445 * use a stale page translation. Assume that any code after
10446 * this point can start executing an instruction.
10448 vcpu->arch.at_instruction_boundary = false;
10449 if (kvm_vcpu_running(vcpu)) {
10450 r = vcpu_enter_guest(vcpu);
10452 r = vcpu_block(vcpu);
10458 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10459 if (kvm_xen_has_pending_events(vcpu))
10460 kvm_xen_inject_pending_events(vcpu);
10462 if (kvm_cpu_has_pending_timer(vcpu))
10463 kvm_inject_pending_timer_irqs(vcpu);
10465 if (dm_request_for_irq_injection(vcpu) &&
10466 kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10468 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10469 ++vcpu->stat.request_irq_exits;
10473 if (__xfer_to_guest_mode_work_pending()) {
10474 kvm_vcpu_srcu_read_unlock(vcpu);
10475 r = xfer_to_guest_mode_handle_work(vcpu);
10476 kvm_vcpu_srcu_read_lock(vcpu);
10485 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10487 return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10490 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10492 BUG_ON(!vcpu->arch.pio.count);
10494 return complete_emulated_io(vcpu);
10498 * Implements the following, as a state machine:
10501 * for each fragment
10502 * for each mmio piece in the fragment
10509 * for each fragment
10510 * for each mmio piece in the fragment
10515 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10517 struct kvm_run *run = vcpu->run;
10518 struct kvm_mmio_fragment *frag;
10521 BUG_ON(!vcpu->mmio_needed);
10523 /* Complete previous fragment */
10524 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10525 len = min(8u, frag->len);
10526 if (!vcpu->mmio_is_write)
10527 memcpy(frag->data, run->mmio.data, len);
10529 if (frag->len <= 8) {
10530 /* Switch to the next fragment. */
10532 vcpu->mmio_cur_fragment++;
10534 /* Go forward to the next mmio piece. */
10540 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10541 vcpu->mmio_needed = 0;
10543 /* FIXME: return into emulator if single-stepping. */
10544 if (vcpu->mmio_is_write)
10546 vcpu->mmio_read_completed = 1;
10547 return complete_emulated_io(vcpu);
10550 run->exit_reason = KVM_EXIT_MMIO;
10551 run->mmio.phys_addr = frag->gpa;
10552 if (vcpu->mmio_is_write)
10553 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10554 run->mmio.len = min(8u, frag->len);
10555 run->mmio.is_write = vcpu->mmio_is_write;
10556 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10560 /* Swap (qemu) user FPU context for the guest FPU context. */
10561 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10563 /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
10564 fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10568 /* When vcpu_run ends, restore user space FPU context. */
10569 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10571 fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10572 ++vcpu->stat.fpu_reload;
10576 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10578 struct kvm_run *kvm_run = vcpu->run;
10582 kvm_sigset_activate(vcpu);
10583 kvm_run->flags = 0;
10584 kvm_load_guest_fpu(vcpu);
10586 kvm_vcpu_srcu_read_lock(vcpu);
10587 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10588 if (kvm_run->immediate_exit) {
10593 * It should be impossible for the hypervisor timer to be in
10594 * use before KVM has ever run the vCPU.
10596 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10598 kvm_vcpu_srcu_read_unlock(vcpu);
10599 kvm_vcpu_block(vcpu);
10600 kvm_vcpu_srcu_read_lock(vcpu);
10602 if (kvm_apic_accept_events(vcpu) < 0) {
10606 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10608 if (signal_pending(current)) {
10610 kvm_run->exit_reason = KVM_EXIT_INTR;
10611 ++vcpu->stat.signal_exits;
10616 if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10617 (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10622 if (kvm_run->kvm_dirty_regs) {
10623 r = sync_regs(vcpu);
10628 /* re-sync apic's tpr */
10629 if (!lapic_in_kernel(vcpu)) {
10630 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10636 if (unlikely(vcpu->arch.complete_userspace_io)) {
10637 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10638 vcpu->arch.complete_userspace_io = NULL;
10643 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10645 if (kvm_run->immediate_exit) {
10650 r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
10654 r = vcpu_run(vcpu);
10657 kvm_put_guest_fpu(vcpu);
10658 if (kvm_run->kvm_valid_regs)
10660 post_kvm_run_save(vcpu);
10661 kvm_vcpu_srcu_read_unlock(vcpu);
10663 kvm_sigset_deactivate(vcpu);
10668 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10670 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10672 * We are here if userspace calls get_regs() in the middle of
10673 * instruction emulation. Registers state needs to be copied
10674 * back from emulation context to vcpu. Userspace shouldn't do
10675 * that usually, but some bad designed PV devices (vmware
10676 * backdoor interface) need this to work
10678 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10679 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10681 regs->rax = kvm_rax_read(vcpu);
10682 regs->rbx = kvm_rbx_read(vcpu);
10683 regs->rcx = kvm_rcx_read(vcpu);
10684 regs->rdx = kvm_rdx_read(vcpu);
10685 regs->rsi = kvm_rsi_read(vcpu);
10686 regs->rdi = kvm_rdi_read(vcpu);
10687 regs->rsp = kvm_rsp_read(vcpu);
10688 regs->rbp = kvm_rbp_read(vcpu);
10689 #ifdef CONFIG_X86_64
10690 regs->r8 = kvm_r8_read(vcpu);
10691 regs->r9 = kvm_r9_read(vcpu);
10692 regs->r10 = kvm_r10_read(vcpu);
10693 regs->r11 = kvm_r11_read(vcpu);
10694 regs->r12 = kvm_r12_read(vcpu);
10695 regs->r13 = kvm_r13_read(vcpu);
10696 regs->r14 = kvm_r14_read(vcpu);
10697 regs->r15 = kvm_r15_read(vcpu);
10700 regs->rip = kvm_rip_read(vcpu);
10701 regs->rflags = kvm_get_rflags(vcpu);
10704 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10707 __get_regs(vcpu, regs);
10712 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10714 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10715 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10717 kvm_rax_write(vcpu, regs->rax);
10718 kvm_rbx_write(vcpu, regs->rbx);
10719 kvm_rcx_write(vcpu, regs->rcx);
10720 kvm_rdx_write(vcpu, regs->rdx);
10721 kvm_rsi_write(vcpu, regs->rsi);
10722 kvm_rdi_write(vcpu, regs->rdi);
10723 kvm_rsp_write(vcpu, regs->rsp);
10724 kvm_rbp_write(vcpu, regs->rbp);
10725 #ifdef CONFIG_X86_64
10726 kvm_r8_write(vcpu, regs->r8);
10727 kvm_r9_write(vcpu, regs->r9);
10728 kvm_r10_write(vcpu, regs->r10);
10729 kvm_r11_write(vcpu, regs->r11);
10730 kvm_r12_write(vcpu, regs->r12);
10731 kvm_r13_write(vcpu, regs->r13);
10732 kvm_r14_write(vcpu, regs->r14);
10733 kvm_r15_write(vcpu, regs->r15);
10736 kvm_rip_write(vcpu, regs->rip);
10737 kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10739 vcpu->arch.exception.pending = false;
10741 kvm_make_request(KVM_REQ_EVENT, vcpu);
10744 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10747 __set_regs(vcpu, regs);
10752 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10754 struct desc_ptr dt;
10756 if (vcpu->arch.guest_state_protected)
10757 goto skip_protected_regs;
10759 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10760 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10761 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10762 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10763 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10764 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10766 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10767 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10769 static_call(kvm_x86_get_idt)(vcpu, &dt);
10770 sregs->idt.limit = dt.size;
10771 sregs->idt.base = dt.address;
10772 static_call(kvm_x86_get_gdt)(vcpu, &dt);
10773 sregs->gdt.limit = dt.size;
10774 sregs->gdt.base = dt.address;
10776 sregs->cr2 = vcpu->arch.cr2;
10777 sregs->cr3 = kvm_read_cr3(vcpu);
10779 skip_protected_regs:
10780 sregs->cr0 = kvm_read_cr0(vcpu);
10781 sregs->cr4 = kvm_read_cr4(vcpu);
10782 sregs->cr8 = kvm_get_cr8(vcpu);
10783 sregs->efer = vcpu->arch.efer;
10784 sregs->apic_base = kvm_get_apic_base(vcpu);
10787 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10789 __get_sregs_common(vcpu, sregs);
10791 if (vcpu->arch.guest_state_protected)
10794 if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10795 set_bit(vcpu->arch.interrupt.nr,
10796 (unsigned long *)sregs->interrupt_bitmap);
10799 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10803 __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10805 if (vcpu->arch.guest_state_protected)
10808 if (is_pae_paging(vcpu)) {
10809 for (i = 0 ; i < 4 ; i++)
10810 sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10811 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10815 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10816 struct kvm_sregs *sregs)
10819 __get_sregs(vcpu, sregs);
10824 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10825 struct kvm_mp_state *mp_state)
10830 if (kvm_mpx_supported())
10831 kvm_load_guest_fpu(vcpu);
10833 r = kvm_apic_accept_events(vcpu);
10838 if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10839 vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10840 vcpu->arch.pv.pv_unhalted)
10841 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10843 mp_state->mp_state = vcpu->arch.mp_state;
10846 if (kvm_mpx_supported())
10847 kvm_put_guest_fpu(vcpu);
10852 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10853 struct kvm_mp_state *mp_state)
10859 if (!lapic_in_kernel(vcpu) &&
10860 mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10864 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10865 * INIT state; latched init should be reported using
10866 * KVM_SET_VCPU_EVENTS, so reject it here.
10868 if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10869 (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10870 mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10873 if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10874 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10875 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10877 vcpu->arch.mp_state = mp_state->mp_state;
10878 kvm_make_request(KVM_REQ_EVENT, vcpu);
10886 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10887 int reason, bool has_error_code, u32 error_code)
10889 struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10892 init_emulate_ctxt(vcpu);
10894 ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10895 has_error_code, error_code);
10897 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10898 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10899 vcpu->run->internal.ndata = 0;
10903 kvm_rip_write(vcpu, ctxt->eip);
10904 kvm_set_rflags(vcpu, ctxt->eflags);
10907 EXPORT_SYMBOL_GPL(kvm_task_switch);
10909 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10911 if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10913 * When EFER.LME and CR0.PG are set, the processor is in
10914 * 64-bit mode (though maybe in a 32-bit code segment).
10915 * CR4.PAE and EFER.LMA must be set.
10917 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10919 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10923 * Not in 64-bit mode: EFER.LMA is clear and the code
10924 * segment cannot be 64-bit.
10926 if (sregs->efer & EFER_LMA || sregs->cs.l)
10930 return kvm_is_valid_cr4(vcpu, sregs->cr4);
10933 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10934 int *mmu_reset_needed, bool update_pdptrs)
10936 struct msr_data apic_base_msr;
10938 struct desc_ptr dt;
10940 if (!kvm_is_valid_sregs(vcpu, sregs))
10943 apic_base_msr.data = sregs->apic_base;
10944 apic_base_msr.host_initiated = true;
10945 if (kvm_set_apic_base(vcpu, &apic_base_msr))
10948 if (vcpu->arch.guest_state_protected)
10951 dt.size = sregs->idt.limit;
10952 dt.address = sregs->idt.base;
10953 static_call(kvm_x86_set_idt)(vcpu, &dt);
10954 dt.size = sregs->gdt.limit;
10955 dt.address = sregs->gdt.base;
10956 static_call(kvm_x86_set_gdt)(vcpu, &dt);
10958 vcpu->arch.cr2 = sregs->cr2;
10959 *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10960 vcpu->arch.cr3 = sregs->cr3;
10961 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10962 static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
10964 kvm_set_cr8(vcpu, sregs->cr8);
10966 *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10967 static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10969 *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10970 static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10971 vcpu->arch.cr0 = sregs->cr0;
10973 *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10974 static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10976 if (update_pdptrs) {
10977 idx = srcu_read_lock(&vcpu->kvm->srcu);
10978 if (is_pae_paging(vcpu)) {
10979 load_pdptrs(vcpu, kvm_read_cr3(vcpu));
10980 *mmu_reset_needed = 1;
10982 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10985 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10986 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10987 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10988 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10989 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10990 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10992 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10993 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10995 update_cr8_intercept(vcpu);
10997 /* Older userspace won't unhalt the vcpu on reset. */
10998 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10999 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
11000 !is_protmode(vcpu))
11001 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11006 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
11008 int pending_vec, max_bits;
11009 int mmu_reset_needed = 0;
11010 int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
11015 if (mmu_reset_needed)
11016 kvm_mmu_reset_context(vcpu);
11018 max_bits = KVM_NR_INTERRUPTS;
11019 pending_vec = find_first_bit(
11020 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
11022 if (pending_vec < max_bits) {
11023 kvm_queue_interrupt(vcpu, pending_vec, false);
11024 pr_debug("Set back pending irq %d\n", pending_vec);
11025 kvm_make_request(KVM_REQ_EVENT, vcpu);
11030 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
11032 int mmu_reset_needed = 0;
11033 bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
11034 bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
11035 !(sregs2->efer & EFER_LMA);
11038 if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
11041 if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
11044 ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
11045 &mmu_reset_needed, !valid_pdptrs);
11049 if (valid_pdptrs) {
11050 for (i = 0; i < 4 ; i++)
11051 kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
11053 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
11054 mmu_reset_needed = 1;
11055 vcpu->arch.pdptrs_from_userspace = true;
11057 if (mmu_reset_needed)
11058 kvm_mmu_reset_context(vcpu);
11062 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
11063 struct kvm_sregs *sregs)
11068 ret = __set_sregs(vcpu, sregs);
11073 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
11076 struct kvm_vcpu *vcpu;
11082 down_write(&kvm->arch.apicv_update_lock);
11084 kvm_for_each_vcpu(i, vcpu, kvm) {
11085 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
11090 __kvm_set_or_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_BLOCKIRQ, set);
11091 up_write(&kvm->arch.apicv_update_lock);
11094 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
11095 struct kvm_guest_debug *dbg)
11097 unsigned long rflags;
11100 if (vcpu->arch.guest_state_protected)
11105 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
11107 if (vcpu->arch.exception.pending)
11109 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
11110 kvm_queue_exception(vcpu, DB_VECTOR);
11112 kvm_queue_exception(vcpu, BP_VECTOR);
11116 * Read rflags as long as potentially injected trace flags are still
11119 rflags = kvm_get_rflags(vcpu);
11121 vcpu->guest_debug = dbg->control;
11122 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
11123 vcpu->guest_debug = 0;
11125 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
11126 for (i = 0; i < KVM_NR_DB_REGS; ++i)
11127 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
11128 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
11130 for (i = 0; i < KVM_NR_DB_REGS; i++)
11131 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
11133 kvm_update_dr7(vcpu);
11135 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11136 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
11139 * Trigger an rflags update that will inject or remove the trace
11142 kvm_set_rflags(vcpu, rflags);
11144 static_call(kvm_x86_update_exception_bitmap)(vcpu);
11146 kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
11156 * Translate a guest virtual address to a guest physical address.
11158 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
11159 struct kvm_translation *tr)
11161 unsigned long vaddr = tr->linear_address;
11167 idx = srcu_read_lock(&vcpu->kvm->srcu);
11168 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
11169 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11170 tr->physical_address = gpa;
11171 tr->valid = gpa != UNMAPPED_GVA;
11179 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11181 struct fxregs_state *fxsave;
11183 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11188 fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11189 memcpy(fpu->fpr, fxsave->st_space, 128);
11190 fpu->fcw = fxsave->cwd;
11191 fpu->fsw = fxsave->swd;
11192 fpu->ftwx = fxsave->twd;
11193 fpu->last_opcode = fxsave->fop;
11194 fpu->last_ip = fxsave->rip;
11195 fpu->last_dp = fxsave->rdp;
11196 memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
11202 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11204 struct fxregs_state *fxsave;
11206 if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11211 fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11213 memcpy(fxsave->st_space, fpu->fpr, 128);
11214 fxsave->cwd = fpu->fcw;
11215 fxsave->swd = fpu->fsw;
11216 fxsave->twd = fpu->ftwx;
11217 fxsave->fop = fpu->last_opcode;
11218 fxsave->rip = fpu->last_ip;
11219 fxsave->rdp = fpu->last_dp;
11220 memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11226 static void store_regs(struct kvm_vcpu *vcpu)
11228 BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11230 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11231 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11233 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11234 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11236 if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11237 kvm_vcpu_ioctl_x86_get_vcpu_events(
11238 vcpu, &vcpu->run->s.regs.events);
11241 static int sync_regs(struct kvm_vcpu *vcpu)
11243 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11244 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11245 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11247 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11248 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11250 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11252 if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11253 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11254 vcpu, &vcpu->run->s.regs.events))
11256 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11262 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11264 if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
11265 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
11266 "guest TSC will not be reliable\n");
11271 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11276 vcpu->arch.last_vmentry_cpu = -1;
11277 vcpu->arch.regs_avail = ~0;
11278 vcpu->arch.regs_dirty = ~0;
11280 if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11281 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11283 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11285 r = kvm_mmu_create(vcpu);
11289 if (irqchip_in_kernel(vcpu->kvm)) {
11290 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11292 goto fail_mmu_destroy;
11295 * Defer evaluating inhibits until the vCPU is first run, as
11296 * this vCPU will not get notified of any changes until this
11297 * vCPU is visible to other vCPUs (marked online and added to
11298 * the set of vCPUs). Opportunistically mark APICv active as
11299 * VMX in particularly is highly unlikely to have inhibits.
11300 * Ignore the current per-VM APICv state so that vCPU creation
11301 * is guaranteed to run with a deterministic value, the request
11302 * will ensure the vCPU gets the correct state before VM-Entry.
11304 if (enable_apicv) {
11305 vcpu->arch.apicv_active = true;
11306 kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
11309 static_branch_inc(&kvm_has_noapic_vcpu);
11313 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11315 goto fail_free_lapic;
11316 vcpu->arch.pio_data = page_address(page);
11318 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11319 GFP_KERNEL_ACCOUNT);
11320 if (!vcpu->arch.mce_banks)
11321 goto fail_free_pio_data;
11322 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11324 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11325 GFP_KERNEL_ACCOUNT))
11326 goto fail_free_mce_banks;
11328 if (!alloc_emulate_ctxt(vcpu))
11329 goto free_wbinvd_dirty_mask;
11331 if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11332 pr_err("kvm: failed to allocate vcpu's fpu\n");
11333 goto free_emulate_ctxt;
11336 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11337 vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11339 vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11341 kvm_async_pf_hash_reset(vcpu);
11342 kvm_pmu_init(vcpu);
11344 vcpu->arch.pending_external_vector = -1;
11345 vcpu->arch.preempted_in_kernel = false;
11347 #if IS_ENABLED(CONFIG_HYPERV)
11348 vcpu->arch.hv_root_tdp = INVALID_PAGE;
11351 r = static_call(kvm_x86_vcpu_create)(vcpu);
11353 goto free_guest_fpu;
11355 vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11356 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11357 kvm_xen_init_vcpu(vcpu);
11358 kvm_vcpu_mtrr_init(vcpu);
11360 kvm_set_tsc_khz(vcpu, vcpu->kvm->arch.default_tsc_khz);
11361 kvm_vcpu_reset(vcpu, false);
11362 kvm_init_mmu(vcpu);
11367 fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11369 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11370 free_wbinvd_dirty_mask:
11371 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11372 fail_free_mce_banks:
11373 kfree(vcpu->arch.mce_banks);
11374 fail_free_pio_data:
11375 free_page((unsigned long)vcpu->arch.pio_data);
11377 kvm_free_lapic(vcpu);
11379 kvm_mmu_destroy(vcpu);
11383 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11385 struct kvm *kvm = vcpu->kvm;
11387 if (mutex_lock_killable(&vcpu->mutex))
11390 kvm_synchronize_tsc(vcpu, 0);
11393 /* poll control enabled by default */
11394 vcpu->arch.msr_kvm_poll_control = 1;
11396 mutex_unlock(&vcpu->mutex);
11398 if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11399 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11400 KVMCLOCK_SYNC_PERIOD);
11403 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11407 kvmclock_reset(vcpu);
11409 static_call(kvm_x86_vcpu_free)(vcpu);
11411 kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11412 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11413 fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11415 kvm_xen_destroy_vcpu(vcpu);
11416 kvm_hv_vcpu_uninit(vcpu);
11417 kvm_pmu_destroy(vcpu);
11418 kfree(vcpu->arch.mce_banks);
11419 kvm_free_lapic(vcpu);
11420 idx = srcu_read_lock(&vcpu->kvm->srcu);
11421 kvm_mmu_destroy(vcpu);
11422 srcu_read_unlock(&vcpu->kvm->srcu, idx);
11423 free_page((unsigned long)vcpu->arch.pio_data);
11424 kvfree(vcpu->arch.cpuid_entries);
11425 if (!lapic_in_kernel(vcpu))
11426 static_branch_dec(&kvm_has_noapic_vcpu);
11429 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11431 struct kvm_cpuid_entry2 *cpuid_0x1;
11432 unsigned long old_cr0 = kvm_read_cr0(vcpu);
11433 unsigned long new_cr0;
11436 * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11437 * to handle side effects. RESET emulation hits those flows and relies
11438 * on emulated/virtualized registers, including those that are loaded
11439 * into hardware, to be zeroed at vCPU creation. Use CRs as a sentinel
11440 * to detect improper or missing initialization.
11442 WARN_ON_ONCE(!init_event &&
11443 (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11445 kvm_lapic_reset(vcpu, init_event);
11447 vcpu->arch.hflags = 0;
11449 vcpu->arch.smi_pending = 0;
11450 vcpu->arch.smi_count = 0;
11451 atomic_set(&vcpu->arch.nmi_queued, 0);
11452 vcpu->arch.nmi_pending = 0;
11453 vcpu->arch.nmi_injected = false;
11454 kvm_clear_interrupt_queue(vcpu);
11455 kvm_clear_exception_queue(vcpu);
11457 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11458 kvm_update_dr0123(vcpu);
11459 vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11460 vcpu->arch.dr7 = DR7_FIXED_1;
11461 kvm_update_dr7(vcpu);
11463 vcpu->arch.cr2 = 0;
11465 kvm_make_request(KVM_REQ_EVENT, vcpu);
11466 vcpu->arch.apf.msr_en_val = 0;
11467 vcpu->arch.apf.msr_int_val = 0;
11468 vcpu->arch.st.msr_val = 0;
11470 kvmclock_reset(vcpu);
11472 kvm_clear_async_pf_completion_queue(vcpu);
11473 kvm_async_pf_hash_reset(vcpu);
11474 vcpu->arch.apf.halted = false;
11476 if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11477 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11480 * To avoid have the INIT path from kvm_apic_has_events() that be
11481 * called with loaded FPU and does not let userspace fix the state.
11484 kvm_put_guest_fpu(vcpu);
11486 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11487 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11490 kvm_load_guest_fpu(vcpu);
11494 kvm_pmu_reset(vcpu);
11495 vcpu->arch.smbase = 0x30000;
11497 vcpu->arch.msr_misc_features_enables = 0;
11499 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11500 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11503 /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11504 memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11505 kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11508 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11509 * if no CPUID match is found. Note, it's impossible to get a match at
11510 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11511 * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11512 * on RESET. But, go through the motions in case that's ever remedied.
11514 cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11515 kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11517 static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11519 kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11520 kvm_rip_write(vcpu, 0xfff0);
11522 vcpu->arch.cr3 = 0;
11523 kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11526 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
11527 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11528 * (or qualify) that with a footnote stating that CD/NW are preserved.
11530 new_cr0 = X86_CR0_ET;
11532 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11534 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11536 static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11537 static_call(kvm_x86_set_cr4)(vcpu, 0);
11538 static_call(kvm_x86_set_efer)(vcpu, 0);
11539 static_call(kvm_x86_update_exception_bitmap)(vcpu);
11542 * On the standard CR0/CR4/EFER modification paths, there are several
11543 * complex conditions determining whether the MMU has to be reset and/or
11544 * which PCIDs have to be flushed. However, CR0.WP and the paging-related
11545 * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
11546 * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
11547 * CR0 will be '0' prior to RESET). So we only need to check CR0.PG here.
11549 if (old_cr0 & X86_CR0_PG) {
11550 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11551 kvm_mmu_reset_context(vcpu);
11555 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
11556 * APM states the TLBs are untouched by INIT, but it also states that
11557 * the TLBs are flushed on "External initialization of the processor."
11558 * Flush the guest TLB regardless of vendor, there is no meaningful
11559 * benefit in relying on the guest to flush the TLB immediately after
11560 * INIT. A spurious TLB flush is benign and likely negligible from a
11561 * performance perspective.
11564 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11566 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11568 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11570 struct kvm_segment cs;
11572 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11573 cs.selector = vector << 8;
11574 cs.base = vector << 12;
11575 kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11576 kvm_rip_write(vcpu, 0);
11578 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11580 int kvm_arch_hardware_enable(void)
11583 struct kvm_vcpu *vcpu;
11588 bool stable, backwards_tsc = false;
11590 kvm_user_return_msr_cpu_online();
11591 ret = static_call(kvm_x86_hardware_enable)();
11595 local_tsc = rdtsc();
11596 stable = !kvm_check_tsc_unstable();
11597 list_for_each_entry(kvm, &vm_list, vm_list) {
11598 kvm_for_each_vcpu(i, vcpu, kvm) {
11599 if (!stable && vcpu->cpu == smp_processor_id())
11600 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11601 if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11602 backwards_tsc = true;
11603 if (vcpu->arch.last_host_tsc > max_tsc)
11604 max_tsc = vcpu->arch.last_host_tsc;
11610 * Sometimes, even reliable TSCs go backwards. This happens on
11611 * platforms that reset TSC during suspend or hibernate actions, but
11612 * maintain synchronization. We must compensate. Fortunately, we can
11613 * detect that condition here, which happens early in CPU bringup,
11614 * before any KVM threads can be running. Unfortunately, we can't
11615 * bring the TSCs fully up to date with real time, as we aren't yet far
11616 * enough into CPU bringup that we know how much real time has actually
11617 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11618 * variables that haven't been updated yet.
11620 * So we simply find the maximum observed TSC above, then record the
11621 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
11622 * the adjustment will be applied. Note that we accumulate
11623 * adjustments, in case multiple suspend cycles happen before some VCPU
11624 * gets a chance to run again. In the event that no KVM threads get a
11625 * chance to run, we will miss the entire elapsed period, as we'll have
11626 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11627 * loose cycle time. This isn't too big a deal, since the loss will be
11628 * uniform across all VCPUs (not to mention the scenario is extremely
11629 * unlikely). It is possible that a second hibernate recovery happens
11630 * much faster than a first, causing the observed TSC here to be
11631 * smaller; this would require additional padding adjustment, which is
11632 * why we set last_host_tsc to the local tsc observed here.
11634 * N.B. - this code below runs only on platforms with reliable TSC,
11635 * as that is the only way backwards_tsc is set above. Also note
11636 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11637 * have the same delta_cyc adjustment applied if backwards_tsc
11638 * is detected. Note further, this adjustment is only done once,
11639 * as we reset last_host_tsc on all VCPUs to stop this from being
11640 * called multiple times (one for each physical CPU bringup).
11642 * Platforms with unreliable TSCs don't have to deal with this, they
11643 * will be compensated by the logic in vcpu_load, which sets the TSC to
11644 * catchup mode. This will catchup all VCPUs to real time, but cannot
11645 * guarantee that they stay in perfect synchronization.
11647 if (backwards_tsc) {
11648 u64 delta_cyc = max_tsc - local_tsc;
11649 list_for_each_entry(kvm, &vm_list, vm_list) {
11650 kvm->arch.backwards_tsc_observed = true;
11651 kvm_for_each_vcpu(i, vcpu, kvm) {
11652 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11653 vcpu->arch.last_host_tsc = local_tsc;
11654 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11658 * We have to disable TSC offset matching.. if you were
11659 * booting a VM while issuing an S4 host suspend....
11660 * you may have some problem. Solving this issue is
11661 * left as an exercise to the reader.
11663 kvm->arch.last_tsc_nsec = 0;
11664 kvm->arch.last_tsc_write = 0;
11671 void kvm_arch_hardware_disable(void)
11673 static_call(kvm_x86_hardware_disable)();
11674 drop_user_return_notifiers();
11677 static inline void kvm_ops_update(struct kvm_x86_init_ops *ops)
11679 memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11681 #define __KVM_X86_OP(func) \
11682 static_call_update(kvm_x86_##func, kvm_x86_ops.func);
11683 #define KVM_X86_OP(func) \
11684 WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
11685 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
11686 #define KVM_X86_OP_OPTIONAL_RET0(func) \
11687 static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
11688 (void *)__static_call_return0);
11689 #include <asm/kvm-x86-ops.h>
11690 #undef __KVM_X86_OP
11692 kvm_pmu_ops_update(ops->pmu_ops);
11695 int kvm_arch_hardware_setup(void *opaque)
11697 struct kvm_x86_init_ops *ops = opaque;
11700 rdmsrl_safe(MSR_EFER, &host_efer);
11702 if (boot_cpu_has(X86_FEATURE_XSAVES))
11703 rdmsrl(MSR_IA32_XSS, host_xss);
11705 r = ops->hardware_setup();
11709 kvm_ops_update(ops);
11711 kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
11713 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11716 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11717 cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11718 #undef __kvm_cpu_cap_has
11720 if (kvm_has_tsc_control) {
11722 * Make sure the user can only configure tsc_khz values that
11723 * fit into a signed integer.
11724 * A min value is not calculated because it will always
11725 * be 1 on all machines.
11727 u64 max = min(0x7fffffffULL,
11728 __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11729 kvm_max_guest_tsc_khz = max;
11731 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11732 kvm_init_msr_list();
11736 void kvm_arch_hardware_unsetup(void)
11738 kvm_unregister_perf_callbacks();
11740 static_call(kvm_x86_hardware_unsetup)();
11743 int kvm_arch_check_processor_compat(void *opaque)
11745 struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11746 struct kvm_x86_init_ops *ops = opaque;
11748 WARN_ON(!irqs_disabled());
11750 if (__cr4_reserved_bits(cpu_has, c) !=
11751 __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11754 return ops->check_processor_compatibility();
11757 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11759 return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11761 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11763 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11765 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11768 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11769 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11771 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11773 struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11775 vcpu->arch.l1tf_flush_l1d = true;
11776 if (pmu->version && unlikely(pmu->event_count)) {
11777 pmu->need_cleanup = true;
11778 kvm_make_request(KVM_REQ_PMU, vcpu);
11780 static_call(kvm_x86_sched_in)(vcpu, cpu);
11783 void kvm_arch_free_vm(struct kvm *kvm)
11785 kfree(to_kvm_hv(kvm)->hv_pa_pg);
11786 __kvm_arch_free_vm(kvm);
11790 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11793 unsigned long flags;
11798 ret = kvm_page_track_init(kvm);
11802 ret = kvm_mmu_init_vm(kvm);
11804 goto out_page_track;
11806 INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11807 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11808 atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11810 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11811 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11812 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11813 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11814 &kvm->arch.irq_sources_bitmap);
11816 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11817 mutex_init(&kvm->arch.apic_map_lock);
11818 seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11819 kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11821 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11822 pvclock_update_vm_gtod_copy(kvm);
11823 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11825 kvm->arch.default_tsc_khz = max_tsc_khz ? : tsc_khz;
11826 kvm->arch.guest_can_read_msr_platform_info = true;
11827 kvm->arch.enable_pmu = enable_pmu;
11829 #if IS_ENABLED(CONFIG_HYPERV)
11830 spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11831 kvm->arch.hv_root_tdp = INVALID_PAGE;
11834 INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11835 INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11837 kvm_apicv_init(kvm);
11838 kvm_hv_init_vm(kvm);
11839 kvm_xen_init_vm(kvm);
11841 return static_call(kvm_x86_vm_init)(kvm);
11844 kvm_page_track_cleanup(kvm);
11849 int kvm_arch_post_init_vm(struct kvm *kvm)
11851 return kvm_mmu_post_init_vm(kvm);
11854 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11857 kvm_mmu_unload(vcpu);
11861 static void kvm_unload_vcpu_mmus(struct kvm *kvm)
11864 struct kvm_vcpu *vcpu;
11866 kvm_for_each_vcpu(i, vcpu, kvm) {
11867 kvm_clear_async_pf_completion_queue(vcpu);
11868 kvm_unload_vcpu_mmu(vcpu);
11872 void kvm_arch_sync_events(struct kvm *kvm)
11874 cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11875 cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11880 * __x86_set_memory_region: Setup KVM internal memory slot
11882 * @kvm: the kvm pointer to the VM.
11883 * @id: the slot ID to setup.
11884 * @gpa: the GPA to install the slot (unused when @size == 0).
11885 * @size: the size of the slot. Set to zero to uninstall a slot.
11887 * This function helps to setup a KVM internal memory slot. Specify
11888 * @size > 0 to install a new slot, while @size == 0 to uninstall a
11889 * slot. The return code can be one of the following:
11891 * HVA: on success (uninstall will return a bogus HVA)
11894 * The caller should always use IS_ERR() to check the return value
11895 * before use. Note, the KVM internal memory slots are guaranteed to
11896 * remain valid and unchanged until the VM is destroyed, i.e., the
11897 * GPA->HVA translation will not change. However, the HVA is a user
11898 * address, i.e. its accessibility is not guaranteed, and must be
11899 * accessed via __copy_{to,from}_user().
11901 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11905 unsigned long hva, old_npages;
11906 struct kvm_memslots *slots = kvm_memslots(kvm);
11907 struct kvm_memory_slot *slot;
11909 /* Called with kvm->slots_lock held. */
11910 if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11911 return ERR_PTR_USR(-EINVAL);
11913 slot = id_to_memslot(slots, id);
11915 if (slot && slot->npages)
11916 return ERR_PTR_USR(-EEXIST);
11919 * MAP_SHARED to prevent internal slot pages from being moved
11922 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11923 MAP_SHARED | MAP_ANONYMOUS, 0);
11924 if (IS_ERR((void *)hva))
11925 return (void __user *)hva;
11927 if (!slot || !slot->npages)
11930 old_npages = slot->npages;
11931 hva = slot->userspace_addr;
11934 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11935 struct kvm_userspace_memory_region m;
11937 m.slot = id | (i << 16);
11939 m.guest_phys_addr = gpa;
11940 m.userspace_addr = hva;
11941 m.memory_size = size;
11942 r = __kvm_set_memory_region(kvm, &m);
11944 return ERR_PTR_USR(r);
11948 vm_munmap(hva, old_npages * PAGE_SIZE);
11950 return (void __user *)hva;
11952 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11954 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11956 kvm_mmu_pre_destroy_vm(kvm);
11959 void kvm_arch_destroy_vm(struct kvm *kvm)
11961 if (current->mm == kvm->mm) {
11963 * Free memory regions allocated on behalf of userspace,
11964 * unless the memory map has changed due to process exit
11967 mutex_lock(&kvm->slots_lock);
11968 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11970 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11972 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11973 mutex_unlock(&kvm->slots_lock);
11975 kvm_unload_vcpu_mmus(kvm);
11976 static_call_cond(kvm_x86_vm_destroy)(kvm);
11977 kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11978 kvm_pic_destroy(kvm);
11979 kvm_ioapic_destroy(kvm);
11980 kvm_destroy_vcpus(kvm);
11981 kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11982 kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11983 kvm_mmu_uninit_vm(kvm);
11984 kvm_page_track_cleanup(kvm);
11985 kvm_xen_destroy_vm(kvm);
11986 kvm_hv_destroy_vm(kvm);
11989 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11993 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11994 kvfree(slot->arch.rmap[i]);
11995 slot->arch.rmap[i] = NULL;
11999 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
12003 memslot_rmap_free(slot);
12005 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12006 kvfree(slot->arch.lpage_info[i - 1]);
12007 slot->arch.lpage_info[i - 1] = NULL;
12010 kvm_page_track_free_memslot(slot);
12013 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
12015 const int sz = sizeof(*slot->arch.rmap[0]);
12018 for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
12020 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12022 if (slot->arch.rmap[i])
12025 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
12026 if (!slot->arch.rmap[i]) {
12027 memslot_rmap_free(slot);
12035 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
12036 struct kvm_memory_slot *slot)
12038 unsigned long npages = slot->npages;
12042 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
12043 * old arrays will be freed by __kvm_set_memory_region() if installing
12044 * the new memslot is successful.
12046 memset(&slot->arch, 0, sizeof(slot->arch));
12048 if (kvm_memslots_have_rmaps(kvm)) {
12049 r = memslot_rmap_alloc(slot, npages);
12054 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12055 struct kvm_lpage_info *linfo;
12056 unsigned long ugfn;
12060 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
12062 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
12066 slot->arch.lpage_info[i - 1] = linfo;
12068 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
12069 linfo[0].disallow_lpage = 1;
12070 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
12071 linfo[lpages - 1].disallow_lpage = 1;
12072 ugfn = slot->userspace_addr >> PAGE_SHIFT;
12074 * If the gfn and userspace address are not aligned wrt each
12075 * other, disable large page support for this slot.
12077 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
12080 for (j = 0; j < lpages; ++j)
12081 linfo[j].disallow_lpage = 1;
12085 if (kvm_page_track_create_memslot(kvm, slot, npages))
12091 memslot_rmap_free(slot);
12093 for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12094 kvfree(slot->arch.lpage_info[i - 1]);
12095 slot->arch.lpage_info[i - 1] = NULL;
12100 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
12102 struct kvm_vcpu *vcpu;
12106 * memslots->generation has been incremented.
12107 * mmio generation may have reached its maximum value.
12109 kvm_mmu_invalidate_mmio_sptes(kvm, gen);
12111 /* Force re-initialization of steal_time cache */
12112 kvm_for_each_vcpu(i, vcpu, kvm)
12113 kvm_vcpu_kick(vcpu);
12116 int kvm_arch_prepare_memory_region(struct kvm *kvm,
12117 const struct kvm_memory_slot *old,
12118 struct kvm_memory_slot *new,
12119 enum kvm_mr_change change)
12121 if (change == KVM_MR_CREATE || change == KVM_MR_MOVE) {
12122 if ((new->base_gfn + new->npages - 1) > kvm_mmu_max_gfn())
12125 return kvm_alloc_memslot_metadata(kvm, new);
12128 if (change == KVM_MR_FLAGS_ONLY)
12129 memcpy(&new->arch, &old->arch, sizeof(old->arch));
12130 else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
12137 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
12139 struct kvm_arch *ka = &kvm->arch;
12141 if (!kvm_x86_ops.cpu_dirty_log_size)
12144 if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
12145 (!enable && --ka->cpu_dirty_logging_count == 0))
12146 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
12148 WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
12151 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
12152 struct kvm_memory_slot *old,
12153 const struct kvm_memory_slot *new,
12154 enum kvm_mr_change change)
12156 u32 old_flags = old ? old->flags : 0;
12157 u32 new_flags = new ? new->flags : 0;
12158 bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
12161 * Update CPU dirty logging if dirty logging is being toggled. This
12162 * applies to all operations.
12164 if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
12165 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
12168 * Nothing more to do for RO slots (which can't be dirtied and can't be
12169 * made writable) or CREATE/MOVE/DELETE of a slot.
12171 * For a memslot with dirty logging disabled:
12172 * CREATE: No dirty mappings will already exist.
12173 * MOVE/DELETE: The old mappings will already have been cleaned up by
12174 * kvm_arch_flush_shadow_memslot()
12176 * For a memslot with dirty logging enabled:
12177 * CREATE: No shadow pages exist, thus nothing to write-protect
12178 * and no dirty bits to clear.
12179 * MOVE/DELETE: The old mappings will already have been cleaned up by
12180 * kvm_arch_flush_shadow_memslot().
12182 if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
12186 * READONLY and non-flags changes were filtered out above, and the only
12187 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12188 * logging isn't being toggled on or off.
12190 if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
12193 if (!log_dirty_pages) {
12195 * Dirty logging tracks sptes in 4k granularity, meaning that
12196 * large sptes have to be split. If live migration succeeds,
12197 * the guest in the source machine will be destroyed and large
12198 * sptes will be created in the destination. However, if the
12199 * guest continues to run in the source machine (for example if
12200 * live migration fails), small sptes will remain around and
12201 * cause bad performance.
12203 * Scan sptes if dirty logging has been stopped, dropping those
12204 * which can be collapsed into a single large-page spte. Later
12205 * page faults will create the large-page sptes.
12207 kvm_mmu_zap_collapsible_sptes(kvm, new);
12210 * Initially-all-set does not require write protecting any page,
12211 * because they're all assumed to be dirty.
12213 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
12216 if (READ_ONCE(eager_page_split))
12217 kvm_mmu_slot_try_split_huge_pages(kvm, new, PG_LEVEL_4K);
12219 if (kvm_x86_ops.cpu_dirty_log_size) {
12220 kvm_mmu_slot_leaf_clear_dirty(kvm, new);
12221 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
12223 kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
12228 void kvm_arch_commit_memory_region(struct kvm *kvm,
12229 struct kvm_memory_slot *old,
12230 const struct kvm_memory_slot *new,
12231 enum kvm_mr_change change)
12233 if (!kvm->arch.n_requested_mmu_pages &&
12234 (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
12235 unsigned long nr_mmu_pages;
12237 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
12238 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
12239 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
12242 kvm_mmu_slot_apply_flags(kvm, old, new, change);
12244 /* Free the arrays associated with the old memslot. */
12245 if (change == KVM_MR_MOVE)
12246 kvm_arch_free_memslot(kvm, old);
12249 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12251 kvm_mmu_zap_all(kvm);
12254 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12255 struct kvm_memory_slot *slot)
12257 kvm_page_track_flush_slot(kvm, slot);
12260 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12262 return (is_guest_mode(vcpu) &&
12263 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12266 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12268 if (!list_empty_careful(&vcpu->async_pf.done))
12271 if (kvm_apic_has_events(vcpu))
12274 if (vcpu->arch.pv.pv_unhalted)
12277 if (vcpu->arch.exception.pending)
12280 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12281 (vcpu->arch.nmi_pending &&
12282 static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12285 if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12286 (vcpu->arch.smi_pending &&
12287 static_call(kvm_x86_smi_allowed)(vcpu, false)))
12290 if (kvm_arch_interrupt_allowed(vcpu) &&
12291 (kvm_cpu_has_interrupt(vcpu) ||
12292 kvm_guest_apic_has_interrupt(vcpu)))
12295 if (kvm_hv_has_stimer_pending(vcpu))
12298 if (is_guest_mode(vcpu) &&
12299 kvm_x86_ops.nested_ops->hv_timer_pending &&
12300 kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12303 if (kvm_xen_has_pending_events(vcpu))
12306 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT, vcpu))
12312 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12314 return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12317 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12319 if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12325 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12327 if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12330 if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12331 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12332 kvm_test_request(KVM_REQ_EVENT, vcpu))
12335 return kvm_arch_dy_has_pending_interrupt(vcpu);
12338 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12340 if (vcpu->arch.guest_state_protected)
12343 return vcpu->arch.preempted_in_kernel;
12346 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12348 return kvm_rip_read(vcpu);
12351 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12353 return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12356 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12358 return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12361 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12363 /* Can't read the RIP when guest state is protected, just return 0 */
12364 if (vcpu->arch.guest_state_protected)
12367 if (is_64_bit_mode(vcpu))
12368 return kvm_rip_read(vcpu);
12369 return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12370 kvm_rip_read(vcpu));
12372 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12374 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12376 return kvm_get_linear_rip(vcpu) == linear_rip;
12378 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12380 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12382 unsigned long rflags;
12384 rflags = static_call(kvm_x86_get_rflags)(vcpu);
12385 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12386 rflags &= ~X86_EFLAGS_TF;
12389 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12391 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12393 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12394 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12395 rflags |= X86_EFLAGS_TF;
12396 static_call(kvm_x86_set_rflags)(vcpu, rflags);
12399 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12401 __kvm_set_rflags(vcpu, rflags);
12402 kvm_make_request(KVM_REQ_EVENT, vcpu);
12404 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12406 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12408 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12410 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12413 static inline u32 kvm_async_pf_next_probe(u32 key)
12415 return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12418 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12420 u32 key = kvm_async_pf_hash_fn(gfn);
12422 while (vcpu->arch.apf.gfns[key] != ~0)
12423 key = kvm_async_pf_next_probe(key);
12425 vcpu->arch.apf.gfns[key] = gfn;
12428 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12431 u32 key = kvm_async_pf_hash_fn(gfn);
12433 for (i = 0; i < ASYNC_PF_PER_VCPU &&
12434 (vcpu->arch.apf.gfns[key] != gfn &&
12435 vcpu->arch.apf.gfns[key] != ~0); i++)
12436 key = kvm_async_pf_next_probe(key);
12441 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12443 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12446 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12450 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12452 if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12456 vcpu->arch.apf.gfns[i] = ~0;
12458 j = kvm_async_pf_next_probe(j);
12459 if (vcpu->arch.apf.gfns[j] == ~0)
12461 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12463 * k lies cyclically in ]i,j]
12465 * |....j i.k.| or |.k..j i...|
12467 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12468 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12473 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12475 u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12477 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12481 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12483 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12485 return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12486 &token, offset, sizeof(token));
12489 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12491 unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12494 if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12495 &val, offset, sizeof(val)))
12501 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12504 if (!kvm_pv_async_pf_enabled(vcpu))
12507 if (vcpu->arch.apf.send_user_only &&
12508 static_call(kvm_x86_get_cpl)(vcpu) == 0)
12511 if (is_guest_mode(vcpu)) {
12513 * L1 needs to opt into the special #PF vmexits that are
12514 * used to deliver async page faults.
12516 return vcpu->arch.apf.delivery_as_pf_vmexit;
12519 * Play it safe in case the guest temporarily disables paging.
12520 * The real mode IDT in particular is unlikely to have a #PF
12523 return is_paging(vcpu);
12527 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12529 if (unlikely(!lapic_in_kernel(vcpu) ||
12530 kvm_event_needs_reinjection(vcpu) ||
12531 vcpu->arch.exception.pending))
12534 if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12538 * If interrupts are off we cannot even use an artificial
12541 return kvm_arch_interrupt_allowed(vcpu);
12544 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12545 struct kvm_async_pf *work)
12547 struct x86_exception fault;
12549 trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12550 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12552 if (kvm_can_deliver_async_pf(vcpu) &&
12553 !apf_put_user_notpresent(vcpu)) {
12554 fault.vector = PF_VECTOR;
12555 fault.error_code_valid = true;
12556 fault.error_code = 0;
12557 fault.nested_page_fault = false;
12558 fault.address = work->arch.token;
12559 fault.async_page_fault = true;
12560 kvm_inject_page_fault(vcpu, &fault);
12564 * It is not possible to deliver a paravirtualized asynchronous
12565 * page fault, but putting the guest in an artificial halt state
12566 * can be beneficial nevertheless: if an interrupt arrives, we
12567 * can deliver it timely and perhaps the guest will schedule
12568 * another process. When the instruction that triggered a page
12569 * fault is retried, hopefully the page will be ready in the host.
12571 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12576 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12577 struct kvm_async_pf *work)
12579 struct kvm_lapic_irq irq = {
12580 .delivery_mode = APIC_DM_FIXED,
12581 .vector = vcpu->arch.apf.vec
12584 if (work->wakeup_all)
12585 work->arch.token = ~0; /* broadcast wakeup */
12587 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12588 trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12590 if ((work->wakeup_all || work->notpresent_injected) &&
12591 kvm_pv_async_pf_enabled(vcpu) &&
12592 !apf_put_user_ready(vcpu, work->arch.token)) {
12593 vcpu->arch.apf.pageready_pending = true;
12594 kvm_apic_set_irq(vcpu, &irq, NULL);
12597 vcpu->arch.apf.halted = false;
12598 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12601 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12603 kvm_make_request(KVM_REQ_APF_READY, vcpu);
12604 if (!vcpu->arch.apf.pageready_pending)
12605 kvm_vcpu_kick(vcpu);
12608 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12610 if (!kvm_pv_async_pf_enabled(vcpu))
12613 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12616 void kvm_arch_start_assignment(struct kvm *kvm)
12618 if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12619 static_call_cond(kvm_x86_pi_start_assignment)(kvm);
12621 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12623 void kvm_arch_end_assignment(struct kvm *kvm)
12625 atomic_dec(&kvm->arch.assigned_device_count);
12627 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12629 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12631 return atomic_read(&kvm->arch.assigned_device_count);
12633 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12635 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12637 atomic_inc(&kvm->arch.noncoherent_dma_count);
12639 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12641 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12643 atomic_dec(&kvm->arch.noncoherent_dma_count);
12645 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12647 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12649 return atomic_read(&kvm->arch.noncoherent_dma_count);
12651 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12653 bool kvm_arch_has_irq_bypass(void)
12658 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12659 struct irq_bypass_producer *prod)
12661 struct kvm_kernel_irqfd *irqfd =
12662 container_of(cons, struct kvm_kernel_irqfd, consumer);
12665 irqfd->producer = prod;
12666 kvm_arch_start_assignment(irqfd->kvm);
12667 ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm,
12668 prod->irq, irqfd->gsi, 1);
12671 kvm_arch_end_assignment(irqfd->kvm);
12676 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12677 struct irq_bypass_producer *prod)
12680 struct kvm_kernel_irqfd *irqfd =
12681 container_of(cons, struct kvm_kernel_irqfd, consumer);
12683 WARN_ON(irqfd->producer != prod);
12684 irqfd->producer = NULL;
12687 * When producer of consumer is unregistered, we change back to
12688 * remapped mode, so we can re-use the current implementation
12689 * when the irq is masked/disabled or the consumer side (KVM
12690 * int this case doesn't want to receive the interrupts.
12692 ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12694 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12695 " fails: %d\n", irqfd->consumer.token, ret);
12697 kvm_arch_end_assignment(irqfd->kvm);
12700 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12701 uint32_t guest_irq, bool set)
12703 return static_call(kvm_x86_pi_update_irte)(kvm, host_irq, guest_irq, set);
12706 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12707 struct kvm_kernel_irq_routing_entry *new)
12709 if (new->type != KVM_IRQ_ROUTING_MSI)
12712 return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12715 bool kvm_vector_hashing_enabled(void)
12717 return vector_hashing;
12720 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12722 return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12724 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12727 int kvm_spec_ctrl_test_value(u64 value)
12730 * test that setting IA32_SPEC_CTRL to given value
12731 * is allowed by the host processor
12735 unsigned long flags;
12738 local_irq_save(flags);
12740 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12742 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12745 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12747 local_irq_restore(flags);
12751 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12753 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12755 struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
12756 struct x86_exception fault;
12757 u64 access = error_code &
12758 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12760 if (!(error_code & PFERR_PRESENT_MASK) ||
12761 mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != UNMAPPED_GVA) {
12763 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12764 * tables probably do not match the TLB. Just proceed
12765 * with the error code that the processor gave.
12767 fault.vector = PF_VECTOR;
12768 fault.error_code_valid = true;
12769 fault.error_code = error_code;
12770 fault.nested_page_fault = false;
12771 fault.address = gva;
12773 vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12775 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12778 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12779 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12780 * indicates whether exit to userspace is needed.
12782 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12783 struct x86_exception *e)
12785 if (r == X86EMUL_PROPAGATE_FAULT) {
12786 kvm_inject_emulated_page_fault(vcpu, e);
12791 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12792 * while handling a VMX instruction KVM could've handled the request
12793 * correctly by exiting to userspace and performing I/O but there
12794 * doesn't seem to be a real use-case behind such requests, just return
12795 * KVM_EXIT_INTERNAL_ERROR for now.
12797 kvm_prepare_emulation_failure_exit(vcpu);
12801 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12803 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12806 struct x86_exception e;
12813 r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12814 if (r != X86EMUL_CONTINUE)
12815 return kvm_handle_memory_failure(vcpu, r, &e);
12817 if (operand.pcid >> 12 != 0) {
12818 kvm_inject_gp(vcpu, 0);
12822 pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12825 case INVPCID_TYPE_INDIV_ADDR:
12826 if ((!pcid_enabled && (operand.pcid != 0)) ||
12827 is_noncanonical_address(operand.gla, vcpu)) {
12828 kvm_inject_gp(vcpu, 0);
12831 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12832 return kvm_skip_emulated_instruction(vcpu);
12834 case INVPCID_TYPE_SINGLE_CTXT:
12835 if (!pcid_enabled && (operand.pcid != 0)) {
12836 kvm_inject_gp(vcpu, 0);
12840 kvm_invalidate_pcid(vcpu, operand.pcid);
12841 return kvm_skip_emulated_instruction(vcpu);
12843 case INVPCID_TYPE_ALL_NON_GLOBAL:
12845 * Currently, KVM doesn't mark global entries in the shadow
12846 * page tables, so a non-global flush just degenerates to a
12847 * global flush. If needed, we could optimize this later by
12848 * keeping track of global entries in shadow page tables.
12852 case INVPCID_TYPE_ALL_INCL_GLOBAL:
12853 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12854 return kvm_skip_emulated_instruction(vcpu);
12857 kvm_inject_gp(vcpu, 0);
12861 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12863 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12865 struct kvm_run *run = vcpu->run;
12866 struct kvm_mmio_fragment *frag;
12869 BUG_ON(!vcpu->mmio_needed);
12871 /* Complete previous fragment */
12872 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12873 len = min(8u, frag->len);
12874 if (!vcpu->mmio_is_write)
12875 memcpy(frag->data, run->mmio.data, len);
12877 if (frag->len <= 8) {
12878 /* Switch to the next fragment. */
12880 vcpu->mmio_cur_fragment++;
12882 /* Go forward to the next mmio piece. */
12888 if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12889 vcpu->mmio_needed = 0;
12891 // VMG change, at this point, we're always done
12892 // RIP has already been advanced
12896 // More MMIO is needed
12897 run->mmio.phys_addr = frag->gpa;
12898 run->mmio.len = min(8u, frag->len);
12899 run->mmio.is_write = vcpu->mmio_is_write;
12900 if (run->mmio.is_write)
12901 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12902 run->exit_reason = KVM_EXIT_MMIO;
12904 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12909 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12913 struct kvm_mmio_fragment *frag;
12918 handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12919 if (handled == bytes)
12926 /*TODO: Check if need to increment number of frags */
12927 frag = vcpu->mmio_fragments;
12928 vcpu->mmio_nr_fragments = 1;
12933 vcpu->mmio_needed = 1;
12934 vcpu->mmio_cur_fragment = 0;
12936 vcpu->run->mmio.phys_addr = gpa;
12937 vcpu->run->mmio.len = min(8u, frag->len);
12938 vcpu->run->mmio.is_write = 1;
12939 memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12940 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12942 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12946 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12948 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12952 struct kvm_mmio_fragment *frag;
12957 handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12958 if (handled == bytes)
12965 /*TODO: Check if need to increment number of frags */
12966 frag = vcpu->mmio_fragments;
12967 vcpu->mmio_nr_fragments = 1;
12972 vcpu->mmio_needed = 1;
12973 vcpu->mmio_cur_fragment = 0;
12975 vcpu->run->mmio.phys_addr = gpa;
12976 vcpu->run->mmio.len = min(8u, frag->len);
12977 vcpu->run->mmio.is_write = 0;
12978 vcpu->run->exit_reason = KVM_EXIT_MMIO;
12980 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12984 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12986 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12987 unsigned int port);
12989 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12991 int size = vcpu->arch.pio.size;
12992 int port = vcpu->arch.pio.port;
12994 vcpu->arch.pio.count = 0;
12995 if (vcpu->arch.sev_pio_count)
12996 return kvm_sev_es_outs(vcpu, size, port);
13000 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
13004 unsigned int count =
13005 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13006 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
13008 /* memcpy done already by emulator_pio_out. */
13009 vcpu->arch.sev_pio_count -= count;
13010 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
13014 /* Emulation done by the kernel. */
13015 if (!vcpu->arch.sev_pio_count)
13019 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
13023 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13024 unsigned int port);
13026 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
13028 unsigned count = vcpu->arch.pio.count;
13029 complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
13030 vcpu->arch.sev_pio_count -= count;
13031 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
13034 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
13036 int size = vcpu->arch.pio.size;
13037 int port = vcpu->arch.pio.port;
13039 advance_sev_es_emulated_ins(vcpu);
13040 if (vcpu->arch.sev_pio_count)
13041 return kvm_sev_es_ins(vcpu, size, port);
13045 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
13049 unsigned int count =
13050 min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
13051 if (!__emulator_pio_in(vcpu, size, port, count))
13054 /* Emulation done by the kernel. */
13055 advance_sev_es_emulated_ins(vcpu);
13056 if (!vcpu->arch.sev_pio_count)
13060 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
13064 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
13065 unsigned int port, void *data, unsigned int count,
13068 vcpu->arch.sev_pio_data = data;
13069 vcpu->arch.sev_pio_count = count;
13070 return in ? kvm_sev_es_ins(vcpu, size, port)
13071 : kvm_sev_es_outs(vcpu, size, port);
13073 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
13075 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
13076 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
13077 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
13078 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
13079 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
13080 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
13081 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
13082 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
13083 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
13084 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
13085 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
13086 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
13087 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
13088 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
13089 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
13090 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
13091 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
13092 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
13093 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
13094 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
13095 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
13096 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
13097 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_kick_vcpu_slowpath);
13098 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
13099 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
13100 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
13101 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
13102 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);
13104 static int __init kvm_x86_init(void)
13106 kvm_mmu_x86_module_init();
13109 module_init(kvm_x86_init);
13111 static void __exit kvm_x86_exit(void)
13114 * If module_init() is implemented, module_exit() must also be
13115 * implemented to allow module unload.
13118 module_exit(kvm_x86_exit);