arch/x86/kvm/mmu.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Avi Kivity   <avi@qumranet.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include "irq.h"
  22 #include "mmu.h"
  23 #include "x86.h"
  24 #include "kvm_cache_regs.h"
  25
  26 #include <linux/kvm_host.h>
  27 #include <linux/types.h>
  28 #include <linux/string.h>
  29 #include <linux/mm.h>
  30 #include <linux/highmem.h>
  31 #include <linux/module.h>
  32 #include <linux/swap.h>
  33 #include <linux/hugetlb.h>
  34 #include <linux/compiler.h>
  35 #include <linux/srcu.h>
  36 #include <linux/slab.h>
  37 #include <linux/uaccess.h>
  38
  39 #include <asm/page.h>
  40 #include <asm/cmpxchg.h>
  41 #include <asm/io.h>
  42 #include <asm/vmx.h>
  43
  44 /*
  45  * When setting this variable to true it enables Two-Dimensional-Paging
  46  * where the hardware walks 2 page tables:
  47  * 1. the guest-virtual to guest-physical
  48  * 2. while doing 1. it walks guest-physical to host-physical
  49  * If the hardware supports that we don't need to do shadow paging.
  50  */
  51 bool tdp_enabled = false;
  52
  53 enum {
  54         AUDIT_PRE_PAGE_FAULT,
  55         AUDIT_POST_PAGE_FAULT,
  56         AUDIT_PRE_PTE_WRITE,
  57         AUDIT_POST_PTE_WRITE,
  58         AUDIT_PRE_SYNC,
  59         AUDIT_POST_SYNC
  60 };
  61
  62 #undef MMU_DEBUG
  63
  64 #ifdef MMU_DEBUG
  65
  66 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  67 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  68
  69 #else
  70
  71 #define pgprintk(x...) do { } while (0)
  72 #define rmap_printk(x...) do { } while (0)
  73
  74 #endif
  75
  76 #ifdef MMU_DEBUG
  77 static bool dbg = 0;
  78 module_param(dbg, bool, 0644);
  79 #endif
  80
  81 #ifndef MMU_DEBUG
  82 #define ASSERT(x) do { } while (0)
  83 #else
  84 #define ASSERT(x)                                                       \
  85         if (!(x)) {                                                     \
  86                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
  87                        __FILE__, __LINE__, #x);                         \
  88         }
  89 #endif
  90
  91 #define PTE_PREFETCH_NUM                8
  92
  93 #define PT_FIRST_AVAIL_BITS_SHIFT 9
  94 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  95
  96 #define PT64_LEVEL_BITS 9
  97
  98 #define PT64_LEVEL_SHIFT(level) \
  99                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
 100
 101 #define PT64_INDEX(address, level)\
 102         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
 103
 104
 105 #define PT32_LEVEL_BITS 10
 106
 107 #define PT32_LEVEL_SHIFT(level) \
 108                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
 109
 110 #define PT32_LVL_OFFSET_MASK(level) \
 111         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 112                                                 * PT32_LEVEL_BITS))) - 1))
 113
 114 #define PT32_INDEX(address, level)\
 115         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
 116
 117
 118 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
 119 #define PT64_DIR_BASE_ADDR_MASK \
 120         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
 121 #define PT64_LVL_ADDR_MASK(level) \
 122         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 123                                                 * PT64_LEVEL_BITS))) - 1))
 124 #define PT64_LVL_OFFSET_MASK(level) \
 125         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 126                                                 * PT64_LEVEL_BITS))) - 1))
 127
 128 #define PT32_BASE_ADDR_MASK PAGE_MASK
 129 #define PT32_DIR_BASE_ADDR_MASK \
 130         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
 131 #define PT32_LVL_ADDR_MASK(level) \
 132         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 133                                             * PT32_LEVEL_BITS))) - 1))
 134
 135 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
 136                         | PT64_NX_MASK)
 137
 138 #define ACC_EXEC_MASK    1
 139 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
 140 #define ACC_USER_MASK    PT_USER_MASK
 141 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
 142
 143 #include <trace/events/kvm.h>
 144
 145 #define CREATE_TRACE_POINTS
 146 #include "mmutrace.h"
 147
 148 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
 149
 150 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
 151
 152 /* make pte_list_desc fit well in cache line */
 153 #define PTE_LIST_EXT 3
 154
 155 struct pte_list_desc {
 156         u64 *sptes[PTE_LIST_EXT];
 157         struct pte_list_desc *more;
 158 };
 159
 160 struct kvm_shadow_walk_iterator {
 161         u64 addr;
 162         hpa_t shadow_addr;
 163         u64 *sptep;
 164         int level;
 165         unsigned index;
 166 };
 167
 168 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
 169         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
 170              shadow_walk_okay(&(_walker));                      \
 171              shadow_walk_next(&(_walker)))
 172
 173 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte)     \
 174         for (shadow_walk_init(&(_walker), _vcpu, _addr);                \
 175              shadow_walk_okay(&(_walker)) &&                            \
 176                 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; });  \
 177              __shadow_walk_next(&(_walker), spte))
 178
 179 static struct kmem_cache *pte_list_desc_cache;
 180 static struct kmem_cache *mmu_page_header_cache;
 181 static struct percpu_counter kvm_total_used_mmu_pages;
 182
 183 static u64 __read_mostly shadow_nx_mask;
 184 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
 185 static u64 __read_mostly shadow_user_mask;
 186 static u64 __read_mostly shadow_accessed_mask;
 187 static u64 __read_mostly shadow_dirty_mask;
 188 static u64 __read_mostly shadow_mmio_mask;
 189
 190 static void mmu_spte_set(u64 *sptep, u64 spte);
 191
 192 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask)
 193 {
 194         shadow_mmio_mask = mmio_mask;
 195 }
 196 EXPORT_SYMBOL_GPL(kvm_mmu_set_mmio_spte_mask);
 197
 198 static void mark_mmio_spte(u64 *sptep, u64 gfn, unsigned access)
 199 {
 200         access &= ACC_WRITE_MASK | ACC_USER_MASK;
 201
 202         trace_mark_mmio_spte(sptep, gfn, access);
 203         mmu_spte_set(sptep, shadow_mmio_mask | access | gfn << PAGE_SHIFT);
 204 }
 205
 206 static bool is_mmio_spte(u64 spte)
 207 {
 208         return (spte & shadow_mmio_mask) == shadow_mmio_mask;
 209 }
 210
 211 static gfn_t get_mmio_spte_gfn(u64 spte)
 212 {
 213         return (spte & ~shadow_mmio_mask) >> PAGE_SHIFT;
 214 }
 215
 216 static unsigned get_mmio_spte_access(u64 spte)
 217 {
 218         return (spte & ~shadow_mmio_mask) & ~PAGE_MASK;
 219 }
 220
 221 static bool set_mmio_spte(u64 *sptep, gfn_t gfn, pfn_t pfn, unsigned access)
 222 {
 223         if (unlikely(is_noslot_pfn(pfn))) {
 224                 mark_mmio_spte(sptep, gfn, access);
 225                 return true;
 226         }
 227
 228         return false;
 229 }
 230
 231 static inline u64 rsvd_bits(int s, int e)
 232 {
 233         return ((1ULL << (e - s + 1)) - 1) << s;
 234 }
 235
 236 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
 237                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
 238 {
 239         shadow_user_mask = user_mask;
 240         shadow_accessed_mask = accessed_mask;
 241         shadow_dirty_mask = dirty_mask;
 242         shadow_nx_mask = nx_mask;
 243         shadow_x_mask = x_mask;
 244 }
 245 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
 246
 247 static int is_cpuid_PSE36(void)
 248 {
 249         return 1;
 250 }
 251
 252 static int is_nx(struct kvm_vcpu *vcpu)
 253 {
 254         return vcpu->arch.efer & EFER_NX;
 255 }
 256
 257 static int is_shadow_present_pte(u64 pte)
 258 {
 259         return pte & PT_PRESENT_MASK && !is_mmio_spte(pte);
 260 }
 261
 262 static int is_large_pte(u64 pte)
 263 {
 264         return pte & PT_PAGE_SIZE_MASK;
 265 }
 266
 267 static int is_dirty_gpte(unsigned long pte)
 268 {
 269         return pte & PT_DIRTY_MASK;
 270 }
 271
 272 static int is_rmap_spte(u64 pte)
 273 {
 274         return is_shadow_present_pte(pte);
 275 }
 276
 277 static int is_last_spte(u64 pte, int level)
 278 {
 279         if (level == PT_PAGE_TABLE_LEVEL)
 280                 return 1;
 281         if (is_large_pte(pte))
 282                 return 1;
 283         return 0;
 284 }
 285
 286 static pfn_t spte_to_pfn(u64 pte)
 287 {
 288         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
 289 }
 290
 291 static gfn_t pse36_gfn_delta(u32 gpte)
 292 {
 293         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
 294
 295         return (gpte & PT32_DIR_PSE36_MASK) << shift;
 296 }
 297
 298 #ifdef CONFIG_X86_64
 299 static void __set_spte(u64 *sptep, u64 spte)
 300 {
 301         *sptep = spte;
 302 }
 303
 304 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
 305 {
 306         *sptep = spte;
 307 }
 308
 309 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
 310 {
 311         return xchg(sptep, spte);
 312 }
 313
 314 static u64 __get_spte_lockless(u64 *sptep)
 315 {
 316         return ACCESS_ONCE(*sptep);
 317 }
 318
 319 static bool __check_direct_spte_mmio_pf(u64 spte)
 320 {
 321         /* It is valid if the spte is zapped. */
 322         return spte == 0ull;
 323 }
 324 #else
 325 union split_spte {
 326         struct {
 327                 u32 spte_low;
 328                 u32 spte_high;
 329         };
 330         u64 spte;
 331 };
 332
 333 static void count_spte_clear(u64 *sptep, u64 spte)
 334 {
 335         struct kvm_mmu_page *sp =  page_header(__pa(sptep));
 336
 337         if (is_shadow_present_pte(spte))
 338                 return;
 339
 340         /* Ensure the spte is completely set before we increase the count */
 341         smp_wmb();
 342         sp->clear_spte_count++;
 343 }
 344
 345 static void __set_spte(u64 *sptep, u64 spte)
 346 {
 347         union split_spte *ssptep, sspte;
 348
 349         ssptep = (union split_spte *)sptep;
 350         sspte = (union split_spte)spte;
 351
 352         ssptep->spte_high = sspte.spte_high;
 353
 354         /*
 355          * If we map the spte from nonpresent to present, We should store
 356          * the high bits firstly, then set present bit, so cpu can not
 357          * fetch this spte while we are setting the spte.
 358          */
 359         smp_wmb();
 360
 361         ssptep->spte_low = sspte.spte_low;
 362 }
 363
 364 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
 365 {
 366         union split_spte *ssptep, sspte;
 367
 368         ssptep = (union split_spte *)sptep;
 369         sspte = (union split_spte)spte;
 370
 371         ssptep->spte_low = sspte.spte_low;
 372
 373         /*
 374          * If we map the spte from present to nonpresent, we should clear
 375          * present bit firstly to avoid vcpu fetch the old high bits.
 376          */
 377         smp_wmb();
 378
 379         ssptep->spte_high = sspte.spte_high;
 380         count_spte_clear(sptep, spte);
 381 }
 382
 383 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
 384 {
 385         union split_spte *ssptep, sspte, orig;
 386
 387         ssptep = (union split_spte *)sptep;
 388         sspte = (union split_spte)spte;
 389
 390         /* xchg acts as a barrier before the setting of the high bits */
 391         orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
 392         orig.spte_high = ssptep->spte_high;
 393         ssptep->spte_high = sspte.spte_high;
 394         count_spte_clear(sptep, spte);
 395
 396         return orig.spte;
 397 }
 398
 399 /*
 400  * The idea using the light way get the spte on x86_32 guest is from
 401  * gup_get_pte(arch/x86/mm/gup.c).
 402  * The difference is we can not catch the spte tlb flush if we leave
 403  * guest mode, so we emulate it by increase clear_spte_count when spte
 404  * is cleared.
 405  */
 406 static u64 __get_spte_lockless(u64 *sptep)
 407 {
 408         struct kvm_mmu_page *sp =  page_header(__pa(sptep));
 409         union split_spte spte, *orig = (union split_spte *)sptep;
 410         int count;
 411
 412 retry:
 413         count = sp->clear_spte_count;
 414         smp_rmb();
 415
 416         spte.spte_low = orig->spte_low;
 417         smp_rmb();
 418
 419         spte.spte_high = orig->spte_high;
 420         smp_rmb();
 421
 422         if (unlikely(spte.spte_low != orig->spte_low ||
 423               count != sp->clear_spte_count))
 424                 goto retry;
 425
 426         return spte.spte;
 427 }
 428
 429 static bool __check_direct_spte_mmio_pf(u64 spte)
 430 {
 431         union split_spte sspte = (union split_spte)spte;
 432         u32 high_mmio_mask = shadow_mmio_mask >> 32;
 433
 434         /* It is valid if the spte is zapped. */
 435         if (spte == 0ull)
 436                 return true;
 437
 438         /* It is valid if the spte is being zapped. */
 439         if (sspte.spte_low == 0ull &&
 440             (sspte.spte_high & high_mmio_mask) == high_mmio_mask)
 441                 return true;
 442
 443         return false;
 444 }
 445 #endif
 446
 447 static bool spte_has_volatile_bits(u64 spte)
 448 {
 449         if (!shadow_accessed_mask)
 450                 return false;
 451
 452         if (!is_shadow_present_pte(spte))
 453                 return false;
 454
 455         if ((spte & shadow_accessed_mask) &&
 456               (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
 457                 return false;
 458
 459         return true;
 460 }
 461
 462 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
 463 {
 464         return (old_spte & bit_mask) && !(new_spte & bit_mask);
 465 }
 466
 467 /* Rules for using mmu_spte_set:
 468  * Set the sptep from nonpresent to present.
 469  * Note: the sptep being assigned *must* be either not present
 470  * or in a state where the hardware will not attempt to update
 471  * the spte.
 472  */
 473 static void mmu_spte_set(u64 *sptep, u64 new_spte)
 474 {
 475         WARN_ON(is_shadow_present_pte(*sptep));
 476         __set_spte(sptep, new_spte);
 477 }
 478
 479 /* Rules for using mmu_spte_update:
 480  * Update the state bits, it means the mapped pfn is not changged.
 481  */
 482 static void mmu_spte_update(u64 *sptep, u64 new_spte)
 483 {
 484         u64 mask, old_spte = *sptep;
 485
 486         WARN_ON(!is_rmap_spte(new_spte));
 487
 488         if (!is_shadow_present_pte(old_spte))
 489                 return mmu_spte_set(sptep, new_spte);
 490
 491         new_spte |= old_spte & shadow_dirty_mask;
 492
 493         mask = shadow_accessed_mask;
 494         if (is_writable_pte(old_spte))
 495                 mask |= shadow_dirty_mask;
 496
 497         if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
 498                 __update_clear_spte_fast(sptep, new_spte);
 499         else
 500                 old_spte = __update_clear_spte_slow(sptep, new_spte);
 501
 502         if (!shadow_accessed_mask)
 503                 return;
 504
 505         if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
 506                 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
 507         if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
 508                 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
 509 }
 510
 511 /*
 512  * Rules for using mmu_spte_clear_track_bits:
 513  * It sets the sptep from present to nonpresent, and track the
 514  * state bits, it is used to clear the last level sptep.
 515  */
 516 static int mmu_spte_clear_track_bits(u64 *sptep)
 517 {
 518         pfn_t pfn;
 519         u64 old_spte = *sptep;
 520
 521         if (!spte_has_volatile_bits(old_spte))
 522                 __update_clear_spte_fast(sptep, 0ull);
 523         else
 524                 old_spte = __update_clear_spte_slow(sptep, 0ull);
 525
 526         if (!is_rmap_spte(old_spte))
 527                 return 0;
 528
 529         pfn = spte_to_pfn(old_spte);
 530         if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
 531                 kvm_set_pfn_accessed(pfn);
 532         if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
 533                 kvm_set_pfn_dirty(pfn);
 534         return 1;
 535 }
 536
 537 /*
 538  * Rules for using mmu_spte_clear_no_track:
 539  * Directly clear spte without caring the state bits of sptep,
 540  * it is used to set the upper level spte.
 541  */
 542 static void mmu_spte_clear_no_track(u64 *sptep)
 543 {
 544         __update_clear_spte_fast(sptep, 0ull);
 545 }
 546
 547 static u64 mmu_spte_get_lockless(u64 *sptep)
 548 {
 549         return __get_spte_lockless(sptep);
 550 }
 551
 552 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
 553 {
 554         /*
 555          * Prevent page table teardown by making any free-er wait during
 556          * kvm_flush_remote_tlbs() IPI to all active vcpus.
 557          */
 558         local_irq_disable();
 559         vcpu->mode = READING_SHADOW_PAGE_TABLES;
 560         /*
 561          * Make sure a following spte read is not reordered ahead of the write
 562          * to vcpu->mode.
 563          */
 564         smp_mb();
 565 }
 566
 567 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
 568 {
 569         /*
 570          * Make sure the write to vcpu->mode is not reordered in front of
 571          * reads to sptes.  If it does, kvm_commit_zap_page() can see us
 572          * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
 573          */
 574         smp_mb();
 575         vcpu->mode = OUTSIDE_GUEST_MODE;
 576         local_irq_enable();
 577 }
 578
 579 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
 580                                   struct kmem_cache *base_cache, int min)
 581 {
 582         void *obj;
 583
 584         if (cache->nobjs >= min)
 585                 return 0;
 586         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 587                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
 588                 if (!obj)
 589                         return -ENOMEM;
 590                 cache->objects[cache->nobjs++] = obj;
 591         }
 592         return 0;
 593 }
 594
 595 static int mmu_memory_cache_free_objects(struct kvm_mmu_memory_cache *cache)
 596 {
 597         return cache->nobjs;
 598 }
 599
 600 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
 601                                   struct kmem_cache *cache)
 602 {
 603         while (mc->nobjs)
 604                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
 605 }
 606
 607 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
 608                                        int min)
 609 {
 610         void *page;
 611
 612         if (cache->nobjs >= min)
 613                 return 0;
 614         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 615                 page = (void *)__get_free_page(GFP_KERNEL);
 616                 if (!page)
 617                         return -ENOMEM;
 618                 cache->objects[cache->nobjs++] = page;
 619         }
 620         return 0;
 621 }
 622
 623 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
 624 {
 625         while (mc->nobjs)
 626                 free_page((unsigned long)mc->objects[--mc->nobjs]);
 627 }
 628
 629 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
 630 {
 631         int r;
 632
 633         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
 634                                    pte_list_desc_cache, 8 + PTE_PREFETCH_NUM);
 635         if (r)
 636                 goto out;
 637         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
 638         if (r)
 639                 goto out;
 640         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
 641                                    mmu_page_header_cache, 4);
 642 out:
 643         return r;
 644 }
 645
 646 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
 647 {
 648         mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
 649                                 pte_list_desc_cache);
 650         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
 651         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
 652                                 mmu_page_header_cache);
 653 }
 654
 655 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
 656 {
 657         void *p;
 658
 659         BUG_ON(!mc->nobjs);
 660         p = mc->objects[--mc->nobjs];
 661         return p;
 662 }
 663
 664 static struct pte_list_desc *mmu_alloc_pte_list_desc(struct kvm_vcpu *vcpu)
 665 {
 666         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_list_desc_cache);
 667 }
 668
 669 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
 670 {
 671         kmem_cache_free(pte_list_desc_cache, pte_list_desc);
 672 }
 673
 674 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
 675 {
 676         if (!sp->role.direct)
 677                 return sp->gfns[index];
 678
 679         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
 680 }
 681
 682 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
 683 {
 684         if (sp->role.direct)
 685                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
 686         else
 687                 sp->gfns[index] = gfn;
 688 }
 689
 690 /*
 691  * Return the pointer to the large page information for a given gfn,
 692  * handling slots that are not large page aligned.
 693  */
 694 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
 695                                               struct kvm_memory_slot *slot,
 696                                               int level)
 697 {
 698         unsigned long idx;
 699
 700         idx = gfn_to_index(gfn, slot->base_gfn, level);
 701         return &slot->arch.lpage_info[level - 2][idx];
 702 }
 703
 704 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
 705 {
 706         struct kvm_memory_slot *slot;
 707         struct kvm_lpage_info *linfo;
 708         int i;
 709
 710         slot = gfn_to_memslot(kvm, gfn);
 711         for (i = PT_DIRECTORY_LEVEL;
 712              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 713                 linfo = lpage_info_slot(gfn, slot, i);
 714                 linfo->write_count += 1;
 715         }
 716         kvm->arch.indirect_shadow_pages++;
 717 }
 718
 719 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
 720 {
 721         struct kvm_memory_slot *slot;
 722         struct kvm_lpage_info *linfo;
 723         int i;
 724
 725         slot = gfn_to_memslot(kvm, gfn);
 726         for (i = PT_DIRECTORY_LEVEL;
 727              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 728                 linfo = lpage_info_slot(gfn, slot, i);
 729                 linfo->write_count -= 1;
 730                 WARN_ON(linfo->write_count < 0);
 731         }
 732         kvm->arch.indirect_shadow_pages--;
 733 }
 734
 735 static int has_wrprotected_page(struct kvm *kvm,
 736                                 gfn_t gfn,
 737                                 int level)
 738 {
 739         struct kvm_memory_slot *slot;
 740         struct kvm_lpage_info *linfo;
 741
 742         slot = gfn_to_memslot(kvm, gfn);
 743         if (slot) {
 744                 linfo = lpage_info_slot(gfn, slot, level);
 745                 return linfo->write_count;
 746         }
 747
 748         return 1;
 749 }
 750
 751 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
 752 {
 753         unsigned long page_size;
 754         int i, ret = 0;
 755
 756         page_size = kvm_host_page_size(kvm, gfn);
 757
 758         for (i = PT_PAGE_TABLE_LEVEL;
 759              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
 760                 if (page_size >= KVM_HPAGE_SIZE(i))
 761                         ret = i;
 762                 else
 763                         break;
 764         }
 765
 766         return ret;
 767 }
 768
 769 static struct kvm_memory_slot *
 770 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
 771                             bool no_dirty_log)
 772 {
 773         struct kvm_memory_slot *slot;
 774
 775         slot = gfn_to_memslot(vcpu->kvm, gfn);
 776         if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
 777               (no_dirty_log && slot->dirty_bitmap))
 778                 slot = NULL;
 779
 780         return slot;
 781 }
 782
 783 static bool mapping_level_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t large_gfn)
 784 {
 785         return !gfn_to_memslot_dirty_bitmap(vcpu, large_gfn, true);
 786 }
 787
 788 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
 789 {
 790         int host_level, level, max_level;
 791
 792         host_level = host_mapping_level(vcpu->kvm, large_gfn);
 793
 794         if (host_level == PT_PAGE_TABLE_LEVEL)
 795                 return host_level;
 796
 797         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
 798                 kvm_x86_ops->get_lpage_level() : host_level;
 799
 800         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
 801                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
 802                         break;
 803
 804         return level - 1;
 805 }
 806
 807 /*
 808  * Pte mapping structures:
 809  *
 810  * If pte_list bit zero is zero, then pte_list point to the spte.
 811  *
 812  * If pte_list bit zero is one, (then pte_list & ~1) points to a struct
 813  * pte_list_desc containing more mappings.
 814  *
 815  * Returns the number of pte entries before the spte was added or zero if
 816  * the spte was not added.
 817  *
 818  */
 819 static int pte_list_add(struct kvm_vcpu *vcpu, u64 *spte,
 820                         unsigned long *pte_list)
 821 {
 822         struct pte_list_desc *desc;
 823         int i, count = 0;
 824
 825         if (!*pte_list) {
 826                 rmap_printk("pte_list_add: %p %llx 0->1\n", spte, *spte);
 827                 *pte_list = (unsigned long)spte;
 828         } else if (!(*pte_list & 1)) {
 829                 rmap_printk("pte_list_add: %p %llx 1->many\n", spte, *spte);
 830                 desc = mmu_alloc_pte_list_desc(vcpu);
 831                 desc->sptes[0] = (u64 *)*pte_list;
 832                 desc->sptes[1] = spte;
 833                 *pte_list = (unsigned long)desc | 1;
 834                 ++count;
 835         } else {
 836                 rmap_printk("pte_list_add: %p %llx many->many\n", spte, *spte);
 837                 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
 838                 while (desc->sptes[PTE_LIST_EXT-1] && desc->more) {
 839                         desc = desc->more;
 840                         count += PTE_LIST_EXT;
 841                 }
 842                 if (desc->sptes[PTE_LIST_EXT-1]) {
 843                         desc->more = mmu_alloc_pte_list_desc(vcpu);
 844                         desc = desc->more;
 845                 }
 846                 for (i = 0; desc->sptes[i]; ++i)
 847                         ++count;
 848                 desc->sptes[i] = spte;
 849         }
 850         return count;
 851 }
 852
 853 static void
 854 pte_list_desc_remove_entry(unsigned long *pte_list, struct pte_list_desc *desc,
 855                            int i, struct pte_list_desc *prev_desc)
 856 {
 857         int j;
 858
 859         for (j = PTE_LIST_EXT - 1; !desc->sptes[j] && j > i; --j)
 860                 ;
 861         desc->sptes[i] = desc->sptes[j];
 862         desc->sptes[j] = NULL;
 863         if (j != 0)
 864                 return;
 865         if (!prev_desc && !desc->more)
 866                 *pte_list = (unsigned long)desc->sptes[0];
 867         else
 868                 if (prev_desc)
 869                         prev_desc->more = desc->more;
 870                 else
 871                         *pte_list = (unsigned long)desc->more | 1;
 872         mmu_free_pte_list_desc(desc);
 873 }
 874
 875 static void pte_list_remove(u64 *spte, unsigned long *pte_list)
 876 {
 877         struct pte_list_desc *desc;
 878         struct pte_list_desc *prev_desc;
 879         int i;
 880
 881         if (!*pte_list) {
 882                 printk(KERN_ERR "pte_list_remove: %p 0->BUG\n", spte);
 883                 BUG();
 884         } else if (!(*pte_list & 1)) {
 885                 rmap_printk("pte_list_remove:  %p 1->0\n", spte);
 886                 if ((u64 *)*pte_list != spte) {
 887                         printk(KERN_ERR "pte_list_remove:  %p 1->BUG\n", spte);
 888                         BUG();
 889                 }
 890                 *pte_list = 0;
 891         } else {
 892                 rmap_printk("pte_list_remove:  %p many->many\n", spte);
 893                 desc = (struct pte_list_desc *)(*pte_list & ~1ul);
 894                 prev_desc = NULL;
 895                 while (desc) {
 896                         for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
 897                                 if (desc->sptes[i] == spte) {
 898                                         pte_list_desc_remove_entry(pte_list,
 899                                                                desc, i,
 900                                                                prev_desc);
 901                                         return;
 902                                 }
 903                         prev_desc = desc;
 904                         desc = desc->more;
 905                 }
 906                 pr_err("pte_list_remove: %p many->many\n", spte);
 907                 BUG();
 908         }
 909 }
 910
 911 typedef void (*pte_list_walk_fn) (u64 *spte);
 912 static void pte_list_walk(unsigned long *pte_list, pte_list_walk_fn fn)
 913 {
 914         struct pte_list_desc *desc;
 915         int i;
 916
 917         if (!*pte_list)
 918                 return;
 919
 920         if (!(*pte_list & 1))
 921                 return fn((u64 *)*pte_list);
 922
 923         desc = (struct pte_list_desc *)(*pte_list & ~1ul);
 924         while (desc) {
 925                 for (i = 0; i < PTE_LIST_EXT && desc->sptes[i]; ++i)
 926                         fn(desc->sptes[i]);
 927                 desc = desc->more;
 928         }
 929 }
 930
 931 static unsigned long *__gfn_to_rmap(gfn_t gfn, int level,
 932                                     struct kvm_memory_slot *slot)
 933 {
 934         struct kvm_lpage_info *linfo;
 935
 936         if (likely(level == PT_PAGE_TABLE_LEVEL))
 937                 return &slot->rmap[gfn - slot->base_gfn];
 938
 939         linfo = lpage_info_slot(gfn, slot, level);
 940         return &linfo->rmap_pde;
 941 }
 942
 943 /*
 944  * Take gfn and return the reverse mapping to it.
 945  */
 946 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
 947 {
 948         struct kvm_memory_slot *slot;
 949
 950         slot = gfn_to_memslot(kvm, gfn);
 951         return __gfn_to_rmap(gfn, level, slot);
 952 }
 953
 954 static bool rmap_can_add(struct kvm_vcpu *vcpu)
 955 {
 956         struct kvm_mmu_memory_cache *cache;
 957
 958         cache = &vcpu->arch.mmu_pte_list_desc_cache;
 959         return mmu_memory_cache_free_objects(cache);
 960 }
 961
 962 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
 963 {
 964         struct kvm_mmu_page *sp;
 965         unsigned long *rmapp;
 966
 967         sp = page_header(__pa(spte));
 968         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
 969         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
 970         return pte_list_add(vcpu, spte, rmapp);
 971 }
 972
 973 static void rmap_remove(struct kvm *kvm, u64 *spte)
 974 {
 975         struct kvm_mmu_page *sp;
 976         gfn_t gfn;
 977         unsigned long *rmapp;
 978
 979         sp = page_header(__pa(spte));
 980         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
 981         rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
 982         pte_list_remove(spte, rmapp);
 983 }
 984
 985 /*
 986  * Used by the following functions to iterate through the sptes linked by a
 987  * rmap.  All fields are private and not assumed to be used outside.
 988  */
 989 struct rmap_iterator {
 990         /* private fields */
 991         struct pte_list_desc *desc;     /* holds the sptep if not NULL */
 992         int pos;                        /* index of the sptep */
 993 };
 994
 995 /*
 996  * Iteration must be started by this function.  This should also be used after
 997  * removing/dropping sptes from the rmap link because in such cases the
 998  * information in the itererator may not be valid.
 999  *
1000  * Returns sptep if found, NULL otherwise.
1001  */
1002 static u64 *rmap_get_first(unsigned long rmap, struct rmap_iterator *iter)
1003 {
1004         if (!rmap)
1005                 return NULL;
1006
1007         if (!(rmap & 1)) {
1008                 iter->desc = NULL;
1009                 return (u64 *)rmap;
1010         }
1011
1012         iter->desc = (struct pte_list_desc *)(rmap & ~1ul);
1013         iter->pos = 0;
1014         return iter->desc->sptes[iter->pos];
1015 }
1016
1017 /*
1018  * Must be used with a valid iterator: e.g. after rmap_get_first().
1019  *
1020  * Returns sptep if found, NULL otherwise.
1021  */
1022 static u64 *rmap_get_next(struct rmap_iterator *iter)
1023 {
1024         if (iter->desc) {
1025                 if (iter->pos < PTE_LIST_EXT - 1) {
1026                         u64 *sptep;
1027
1028                         ++iter->pos;
1029                         sptep = iter->desc->sptes[iter->pos];
1030                         if (sptep)
1031                                 return sptep;
1032                 }
1033
1034                 iter->desc = iter->desc->more;
1035
1036                 if (iter->desc) {
1037                         iter->pos = 0;
1038                         /* desc->sptes[0] cannot be NULL */
1039                         return iter->desc->sptes[iter->pos];
1040                 }
1041         }
1042
1043         return NULL;
1044 }
1045
1046 static void drop_spte(struct kvm *kvm, u64 *sptep)
1047 {
1048         if (mmu_spte_clear_track_bits(sptep))
1049                 rmap_remove(kvm, sptep);
1050 }
1051
1052 static int __rmap_write_protect(struct kvm *kvm, unsigned long *rmapp, int level)
1053 {
1054         u64 *sptep;
1055         struct rmap_iterator iter;
1056         int write_protected = 0;
1057
1058         for (sptep = rmap_get_first(*rmapp, &iter); sptep;) {
1059                 BUG_ON(!(*sptep & PT_PRESENT_MASK));
1060                 rmap_printk("rmap_write_protect: spte %p %llx\n", sptep, *sptep);
1061
1062                 if (!is_writable_pte(*sptep)) {
1063                         sptep = rmap_get_next(&iter);
1064                         continue;
1065                 }
1066
1067                 if (level == PT_PAGE_TABLE_LEVEL) {
1068                         mmu_spte_update(sptep, *sptep & ~PT_WRITABLE_MASK);
1069                         sptep = rmap_get_next(&iter);
1070                 } else {
1071                         BUG_ON(!is_large_pte(*sptep));
1072                         drop_spte(kvm, sptep);
1073                         --kvm->stat.lpages;
1074                         sptep = rmap_get_first(*rmapp, &iter);
1075                 }
1076
1077                 write_protected = 1;
1078         }
1079
1080         return write_protected;
1081 }
1082
1083 /**
1084  * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1085  * @kvm: kvm instance
1086  * @slot: slot to protect
1087  * @gfn_offset: start of the BITS_PER_LONG pages we care about
1088  * @mask: indicates which pages we should protect
1089  *
1090  * Used when we do not need to care about huge page mappings: e.g. during dirty
1091  * logging we do not have any such mappings.
1092  */
1093 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1094                                      struct kvm_memory_slot *slot,
1095                                      gfn_t gfn_offset, unsigned long mask)
1096 {
1097         unsigned long *rmapp;
1098
1099         while (mask) {
1100                 rmapp = &slot->rmap[gfn_offset + __ffs(mask)];
1101                 __rmap_write_protect(kvm, rmapp, PT_PAGE_TABLE_LEVEL);
1102
1103                 /* clear the first set bit */
1104                 mask &= mask - 1;
1105         }
1106 }
1107
1108 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
1109 {
1110         struct kvm_memory_slot *slot;
1111         unsigned long *rmapp;
1112         int i;
1113         int write_protected = 0;
1114
1115         slot = gfn_to_memslot(kvm, gfn);
1116
1117         for (i = PT_PAGE_TABLE_LEVEL;
1118              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
1119                 rmapp = __gfn_to_rmap(gfn, i, slot);
1120                 write_protected |= __rmap_write_protect(kvm, rmapp, i);
1121         }
1122
1123         return write_protected;
1124 }
1125
1126 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
1127                            unsigned long data)
1128 {
1129         u64 *sptep;
1130         struct rmap_iterator iter;
1131         int need_tlb_flush = 0;
1132
1133         while ((sptep = rmap_get_first(*rmapp, &iter))) {
1134                 BUG_ON(!(*sptep & PT_PRESENT_MASK));
1135                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", sptep, *sptep);
1136
1137                 drop_spte(kvm, sptep);
1138                 need_tlb_flush = 1;
1139         }
1140
1141         return need_tlb_flush;
1142 }
1143
1144 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
1145                              unsigned long data)
1146 {
1147         u64 *sptep;
1148         struct rmap_iterator iter;
1149         int need_flush = 0;
1150         u64 new_spte;
1151         pte_t *ptep = (pte_t *)data;
1152         pfn_t new_pfn;
1153
1154         WARN_ON(pte_huge(*ptep));
1155         new_pfn = pte_pfn(*ptep);
1156
1157         for (sptep = rmap_get_first(*rmapp, &iter); sptep;) {
1158                 BUG_ON(!is_shadow_present_pte(*sptep));
1159                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", sptep, *sptep);
1160
1161                 need_flush = 1;
1162
1163                 if (pte_write(*ptep)) {
1164                         drop_spte(kvm, sptep);
1165                         sptep = rmap_get_first(*rmapp, &iter);
1166                 } else {
1167                         new_spte = *sptep & ~PT64_BASE_ADDR_MASK;
1168                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
1169
1170                         new_spte &= ~PT_WRITABLE_MASK;
1171                         new_spte &= ~SPTE_HOST_WRITEABLE;
1172                         new_spte &= ~shadow_accessed_mask;
1173
1174                         mmu_spte_clear_track_bits(sptep);
1175                         mmu_spte_set(sptep, new_spte);
1176                         sptep = rmap_get_next(&iter);
1177                 }
1178         }
1179
1180         if (need_flush)
1181                 kvm_flush_remote_tlbs(kvm);
1182
1183         return 0;
1184 }
1185
1186 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
1187                           unsigned long data,
1188                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
1189                                          unsigned long data))
1190 {
1191         int j;
1192         int ret;
1193         int retval = 0;
1194         struct kvm_memslots *slots;
1195         struct kvm_memory_slot *memslot;
1196
1197         slots = kvm_memslots(kvm);
1198
1199         kvm_for_each_memslot(memslot, slots) {
1200                 unsigned long start = memslot->userspace_addr;
1201                 unsigned long end;
1202
1203                 end = start + (memslot->npages << PAGE_SHIFT);
1204                 if (hva >= start && hva < end) {
1205                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
1206                         gfn_t gfn = memslot->base_gfn + gfn_offset;
1207
1208                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
1209
1210                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
1211                                 struct kvm_lpage_info *linfo;
1212
1213                                 linfo = lpage_info_slot(gfn, memslot,
1214                                                         PT_DIRECTORY_LEVEL + j);
1215                                 ret |= handler(kvm, &linfo->rmap_pde, data);
1216                         }
1217                         trace_kvm_age_page(hva, memslot, ret);
1218                         retval |= ret;
1219                 }
1220         }
1221
1222         return retval;
1223 }
1224
1225 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1226 {
1227         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
1228 }
1229
1230 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1231 {
1232         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
1233 }
1234
1235 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1236                          unsigned long data)
1237 {
1238         u64 *sptep;
1239         struct rmap_iterator uninitialized_var(iter);
1240         int young = 0;
1241
1242         /*
1243          * In case of absence of EPT Access and Dirty Bits supports,
1244          * emulate the accessed bit for EPT, by checking if this page has
1245          * an EPT mapping, and clearing it if it does. On the next access,
1246          * a new EPT mapping will be established.
1247          * This has some overhead, but not as much as the cost of swapping
1248          * out actively used pages or breaking up actively used hugepages.
1249          */
1250         if (!shadow_accessed_mask)
1251                 return kvm_unmap_rmapp(kvm, rmapp, data);
1252
1253         for (sptep = rmap_get_first(*rmapp, &iter); sptep;
1254              sptep = rmap_get_next(&iter)) {
1255                 BUG_ON(!is_shadow_present_pte(*sptep));
1256
1257                 if (*sptep & shadow_accessed_mask) {
1258                         young = 1;
1259                         clear_bit((ffs(shadow_accessed_mask) - 1),
1260                                  (unsigned long *)sptep);
1261                 }
1262         }
1263
1264         return young;
1265 }
1266
1267 static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1268                               unsigned long data)
1269 {
1270         u64 *sptep;
1271         struct rmap_iterator iter;
1272         int young = 0;
1273
1274         /*
1275          * If there's no access bit in the secondary pte set by the
1276          * hardware it's up to gup-fast/gup to set the access bit in
1277          * the primary pte or in the page structure.
1278          */
1279         if (!shadow_accessed_mask)
1280                 goto out;
1281
1282         for (sptep = rmap_get_first(*rmapp, &iter); sptep;
1283              sptep = rmap_get_next(&iter)) {
1284                 BUG_ON(!is_shadow_present_pte(*sptep));
1285
1286                 if (*sptep & shadow_accessed_mask) {
1287                         young = 1;
1288                         break;
1289                 }
1290         }
1291 out:
1292         return young;
1293 }
1294
1295 #define RMAP_RECYCLE_THRESHOLD 1000
1296
1297 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
1298 {
1299         unsigned long *rmapp;
1300         struct kvm_mmu_page *sp;
1301
1302         sp = page_header(__pa(spte));
1303
1304         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
1305
1306         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
1307         kvm_flush_remote_tlbs(vcpu->kvm);
1308 }
1309
1310 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
1311 {
1312         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
1313 }
1314
1315 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1316 {
1317         return kvm_handle_hva(kvm, hva, 0, kvm_test_age_rmapp);
1318 }
1319
1320 #ifdef MMU_DEBUG
1321 static int is_empty_shadow_page(u64 *spt)
1322 {
1323         u64 *pos;
1324         u64 *end;
1325
1326         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
1327                 if (is_shadow_present_pte(*pos)) {
1328                         printk(KERN_ERR "%s: %p %llx\n", __func__,
1329                                pos, *pos);
1330                         return 0;
1331                 }
1332         return 1;
1333 }
1334 #endif
1335
1336 /*
1337  * This value is the sum of all of the kvm instances's
1338  * kvm->arch.n_used_mmu_pages values.  We need a global,
1339  * aggregate version in order to make the slab shrinker
1340  * faster
1341  */
1342 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
1343 {
1344         kvm->arch.n_used_mmu_pages += nr;
1345         percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1346 }
1347
1348 /*
1349  * Remove the sp from shadow page cache, after call it,
1350  * we can not find this sp from the cache, and the shadow
1351  * page table is still valid.
1352  * It should be under the protection of mmu lock.
1353  */
1354 static void kvm_mmu_isolate_page(struct kvm_mmu_page *sp)
1355 {
1356         ASSERT(is_empty_shadow_page(sp->spt));
1357         hlist_del(&sp->hash_link);
1358         if (!sp->role.direct)
1359                 free_page((unsigned long)sp->gfns);
1360 }
1361
1362 /*
1363  * Free the shadow page table and the sp, we can do it
1364  * out of the protection of mmu lock.
1365  */
1366 static void kvm_mmu_free_page(struct kvm_mmu_page *sp)
1367 {
1368         list_del(&sp->link);
1369         free_page((unsigned long)sp->spt);
1370         kmem_cache_free(mmu_page_header_cache, sp);
1371 }
1372
1373 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1374 {
1375         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1376 }
1377
1378 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1379                                     struct kvm_mmu_page *sp, u64 *parent_pte)
1380 {
1381         if (!parent_pte)
1382                 return;
1383
1384         pte_list_add(vcpu, parent_pte, &sp->parent_ptes);
1385 }
1386
1387 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1388                                        u64 *parent_pte)
1389 {
1390         pte_list_remove(parent_pte, &sp->parent_ptes);
1391 }
1392
1393 static void drop_parent_pte(struct kvm_mmu_page *sp,
1394                             u64 *parent_pte)
1395 {
1396         mmu_page_remove_parent_pte(sp, parent_pte);
1397         mmu_spte_clear_no_track(parent_pte);
1398 }
1399
1400 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1401                                                u64 *parent_pte, int direct)
1402 {
1403         struct kvm_mmu_page *sp;
1404         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache);
1405         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1406         if (!direct)
1407                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache);
1408         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1409         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1410         bitmap_zero(sp->slot_bitmap, KVM_MEM_SLOTS_NUM);
1411         sp->parent_ptes = 0;
1412         mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1413         kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1414         return sp;
1415 }
1416
1417 static void mark_unsync(u64 *spte);
1418 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1419 {
1420         pte_list_walk(&sp->parent_ptes, mark_unsync);
1421 }
1422
1423 static void mark_unsync(u64 *spte)
1424 {
1425         struct kvm_mmu_page *sp;
1426         unsigned int index;
1427
1428         sp = page_header(__pa(spte));
1429         index = spte - sp->spt;
1430         if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1431                 return;
1432         if (sp->unsync_children++)
1433                 return;
1434         kvm_mmu_mark_parents_unsync(sp);
1435 }
1436
1437 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1438                                struct kvm_mmu_page *sp)
1439 {
1440         return 1;
1441 }
1442
1443 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1444 {
1445 }
1446
1447 static void nonpaging_update_pte(struct kvm_vcpu *vcpu,
1448                                  struct kvm_mmu_page *sp, u64 *spte,
1449                                  const void *pte)
1450 {
1451         WARN_ON(1);
1452 }
1453
1454 #define KVM_PAGE_ARRAY_NR 16
1455
1456 struct kvm_mmu_pages {
1457         struct mmu_page_and_offset {
1458                 struct kvm_mmu_page *sp;
1459                 unsigned int idx;
1460         } page[KVM_PAGE_ARRAY_NR];
1461         unsigned int nr;
1462 };
1463
1464 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1465                          int idx)
1466 {
1467         int i;
1468
1469         if (sp->unsync)
1470                 for (i=0; i < pvec->nr; i++)
1471                         if (pvec->page[i].sp == sp)
1472                                 return 0;
1473
1474         pvec->page[pvec->nr].sp = sp;
1475         pvec->page[pvec->nr].idx = idx;
1476         pvec->nr++;
1477         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1478 }
1479
1480 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1481                            struct kvm_mmu_pages *pvec)
1482 {
1483         int i, ret, nr_unsync_leaf = 0;
1484
1485         for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1486                 struct kvm_mmu_page *child;
1487                 u64 ent = sp->spt[i];
1488
1489                 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1490                         goto clear_child_bitmap;
1491
1492                 child = page_header(ent & PT64_BASE_ADDR_MASK);
1493
1494                 if (child->unsync_children) {
1495                         if (mmu_pages_add(pvec, child, i))
1496                                 return -ENOSPC;
1497
1498                         ret = __mmu_unsync_walk(child, pvec);
1499                         if (!ret)
1500                                 goto clear_child_bitmap;
1501                         else if (ret > 0)
1502                                 nr_unsync_leaf += ret;
1503                         else
1504                                 return ret;
1505                 } else if (child->unsync) {
1506                         nr_unsync_leaf++;
1507                         if (mmu_pages_add(pvec, child, i))
1508                                 return -ENOSPC;
1509                 } else
1510                          goto clear_child_bitmap;
1511
1512                 continue;
1513
1514 clear_child_bitmap:
1515                 __clear_bit(i, sp->unsync_child_bitmap);
1516                 sp->unsync_children--;
1517                 WARN_ON((int)sp->unsync_children < 0);
1518         }
1519
1520
1521         return nr_unsync_leaf;
1522 }
1523
1524 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1525                            struct kvm_mmu_pages *pvec)
1526 {
1527         if (!sp->unsync_children)
1528                 return 0;
1529
1530         mmu_pages_add(pvec, sp, 0);
1531         return __mmu_unsync_walk(sp, pvec);
1532 }
1533
1534 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1535 {
1536         WARN_ON(!sp->unsync);
1537         trace_kvm_mmu_sync_page(sp);
1538         sp->unsync = 0;
1539         --kvm->stat.mmu_unsync;
1540 }
1541
1542 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1543                                     struct list_head *invalid_list);
1544 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1545                                     struct list_head *invalid_list);
1546
1547 #define for_each_gfn_sp(kvm, sp, gfn, pos)                              \
1548   hlist_for_each_entry(sp, pos,                                         \
1549    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1550         if ((sp)->gfn != (gfn)) {} else
1551
1552 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos)               \
1553   hlist_for_each_entry(sp, pos,                                         \
1554    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1555                 if ((sp)->gfn != (gfn) || (sp)->role.direct ||          \
1556                         (sp)->role.invalid) {} else
1557
1558 /* @sp->gfn should be write-protected at the call site */
1559 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1560                            struct list_head *invalid_list, bool clear_unsync)
1561 {
1562         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1563                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1564                 return 1;
1565         }
1566
1567         if (clear_unsync)
1568                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1569
1570         if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1571                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1572                 return 1;
1573         }
1574
1575         kvm_mmu_flush_tlb(vcpu);
1576         return 0;
1577 }
1578
1579 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1580                                    struct kvm_mmu_page *sp)
1581 {
1582         LIST_HEAD(invalid_list);
1583         int ret;
1584
1585         ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1586         if (ret)
1587                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1588
1589         return ret;
1590 }
1591
1592 #ifdef CONFIG_KVM_MMU_AUDIT
1593 #include "mmu_audit.c"
1594 #else
1595 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, int point) { }
1596 static void mmu_audit_disable(void) { }
1597 #endif
1598
1599 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1600                          struct list_head *invalid_list)
1601 {
1602         return __kvm_sync_page(vcpu, sp, invalid_list, true);
1603 }
1604
1605 /* @gfn should be write-protected at the call site */
1606 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1607 {
1608         struct kvm_mmu_page *s;
1609         struct hlist_node *node;
1610         LIST_HEAD(invalid_list);
1611         bool flush = false;
1612
1613         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1614                 if (!s->unsync)
1615                         continue;
1616
1617                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1618                 kvm_unlink_unsync_page(vcpu->kvm, s);
1619                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1620                         (vcpu->arch.mmu.sync_page(vcpu, s))) {
1621                         kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1622                         continue;
1623                 }
1624                 flush = true;
1625         }
1626
1627         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1628         if (flush)
1629                 kvm_mmu_flush_tlb(vcpu);
1630 }
1631
1632 struct mmu_page_path {
1633         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1634         unsigned int idx[PT64_ROOT_LEVEL-1];
1635 };
1636
1637 #define for_each_sp(pvec, sp, parents, i)                       \
1638                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1639                         sp = pvec.page[i].sp;                   \
1640                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1641                         i = mmu_pages_next(&pvec, &parents, i))
1642
1643 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1644                           struct mmu_page_path *parents,
1645                           int i)
1646 {
1647         int n;
1648
1649         for (n = i+1; n < pvec->nr; n++) {
1650                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1651
1652                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1653                         parents->idx[0] = pvec->page[n].idx;
1654                         return n;
1655                 }
1656
1657                 parents->parent[sp->role.level-2] = sp;
1658                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1659         }
1660
1661         return n;
1662 }
1663
1664 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1665 {
1666         struct kvm_mmu_page *sp;
1667         unsigned int level = 0;
1668
1669         do {
1670                 unsigned int idx = parents->idx[level];
1671
1672                 sp = parents->parent[level];
1673                 if (!sp)
1674                         return;
1675
1676                 --sp->unsync_children;
1677                 WARN_ON((int)sp->unsync_children < 0);
1678                 __clear_bit(idx, sp->unsync_child_bitmap);
1679                 level++;
1680         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1681 }
1682
1683 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1684                                struct mmu_page_path *parents,
1685                                struct kvm_mmu_pages *pvec)
1686 {
1687         parents->parent[parent->role.level-1] = NULL;
1688         pvec->nr = 0;
1689 }
1690
1691 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1692                               struct kvm_mmu_page *parent)
1693 {
1694         int i;
1695         struct kvm_mmu_page *sp;
1696         struct mmu_page_path parents;
1697         struct kvm_mmu_pages pages;
1698         LIST_HEAD(invalid_list);
1699
1700         kvm_mmu_pages_init(parent, &parents, &pages);
1701         while (mmu_unsync_walk(parent, &pages)) {
1702                 int protected = 0;
1703
1704                 for_each_sp(pages, sp, parents, i)
1705                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1706
1707                 if (protected)
1708                         kvm_flush_remote_tlbs(vcpu->kvm);
1709
1710                 for_each_sp(pages, sp, parents, i) {
1711                         kvm_sync_page(vcpu, sp, &invalid_list);
1712                         mmu_pages_clear_parents(&parents);
1713                 }
1714                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1715                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1716                 kvm_mmu_pages_init(parent, &parents, &pages);
1717         }
1718 }
1719
1720 static void init_shadow_page_table(struct kvm_mmu_page *sp)
1721 {
1722         int i;
1723
1724         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1725                 sp->spt[i] = 0ull;
1726 }
1727
1728 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
1729 {
1730         sp->write_flooding_count = 0;
1731 }
1732
1733 static void clear_sp_write_flooding_count(u64 *spte)
1734 {
1735         struct kvm_mmu_page *sp =  page_header(__pa(spte));
1736
1737         __clear_sp_write_flooding_count(sp);
1738 }
1739
1740 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1741                                              gfn_t gfn,
1742                                              gva_t gaddr,
1743                                              unsigned level,
1744                                              int direct,
1745                                              unsigned access,
1746                                              u64 *parent_pte)
1747 {
1748         union kvm_mmu_page_role role;
1749         unsigned quadrant;
1750         struct kvm_mmu_page *sp;
1751         struct hlist_node *node;
1752         bool need_sync = false;
1753
1754         role = vcpu->arch.mmu.base_role;
1755         role.level = level;
1756         role.direct = direct;
1757         if (role.direct)
1758                 role.cr4_pae = 0;
1759         role.access = access;
1760         if (!vcpu->arch.mmu.direct_map
1761             && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1762                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1763                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1764                 role.quadrant = quadrant;
1765         }
1766         for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1767                 if (!need_sync && sp->unsync)
1768                         need_sync = true;
1769
1770                 if (sp->role.word != role.word)
1771                         continue;
1772
1773                 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1774                         break;
1775
1776                 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1777                 if (sp->unsync_children) {
1778                         kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1779                         kvm_mmu_mark_parents_unsync(sp);
1780                 } else if (sp->unsync)
1781                         kvm_mmu_mark_parents_unsync(sp);
1782
1783                 __clear_sp_write_flooding_count(sp);
1784                 trace_kvm_mmu_get_page(sp, false);
1785                 return sp;
1786         }
1787         ++vcpu->kvm->stat.mmu_cache_miss;
1788         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1789         if (!sp)
1790                 return sp;
1791         sp->gfn = gfn;
1792         sp->role = role;
1793         hlist_add_head(&sp->hash_link,
1794                 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1795         if (!direct) {
1796                 if (rmap_write_protect(vcpu->kvm, gfn))
1797                         kvm_flush_remote_tlbs(vcpu->kvm);
1798                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1799                         kvm_sync_pages(vcpu, gfn);
1800
1801                 account_shadowed(vcpu->kvm, gfn);
1802         }
1803         init_shadow_page_table(sp);
1804         trace_kvm_mmu_get_page(sp, true);
1805         return sp;
1806 }
1807
1808 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1809                              struct kvm_vcpu *vcpu, u64 addr)
1810 {
1811         iterator->addr = addr;
1812         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1813         iterator->level = vcpu->arch.mmu.shadow_root_level;
1814
1815         if (iterator->level == PT64_ROOT_LEVEL &&
1816             vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
1817             !vcpu->arch.mmu.direct_map)
1818                 --iterator->level;
1819
1820         if (iterator->level == PT32E_ROOT_LEVEL) {
1821                 iterator->shadow_addr
1822                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1823                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1824                 --iterator->level;
1825                 if (!iterator->shadow_addr)
1826                         iterator->level = 0;
1827         }
1828 }
1829
1830 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1831 {
1832         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1833                 return false;
1834
1835         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1836         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1837         return true;
1838 }
1839
1840 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
1841                                u64 spte)
1842 {
1843         if (is_last_spte(spte, iterator->level)) {
1844                 iterator->level = 0;
1845                 return;
1846         }
1847
1848         iterator->shadow_addr = spte & PT64_BASE_ADDR_MASK;
1849         --iterator->level;
1850 }
1851
1852 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1853 {
1854         return __shadow_walk_next(iterator, *iterator->sptep);
1855 }
1856
1857 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1858 {
1859         u64 spte;
1860
1861         spte = __pa(sp->spt)
1862                 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1863                 | PT_WRITABLE_MASK | PT_USER_MASK;
1864         mmu_spte_set(sptep, spte);
1865 }
1866
1867 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1868 {
1869         if (is_large_pte(*sptep)) {
1870                 drop_spte(vcpu->kvm, sptep);
1871                 --vcpu->kvm->stat.lpages;
1872                 kvm_flush_remote_tlbs(vcpu->kvm);
1873         }
1874 }
1875
1876 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1877                                    unsigned direct_access)
1878 {
1879         if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1880                 struct kvm_mmu_page *child;
1881
1882                 /*
1883                  * For the direct sp, if the guest pte's dirty bit
1884                  * changed form clean to dirty, it will corrupt the
1885                  * sp's access: allow writable in the read-only sp,
1886                  * so we should update the spte at this point to get
1887                  * a new sp with the correct access.
1888                  */
1889                 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1890                 if (child->role.access == direct_access)
1891                         return;
1892
1893                 drop_parent_pte(child, sptep);
1894                 kvm_flush_remote_tlbs(vcpu->kvm);
1895         }
1896 }
1897
1898 static bool mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
1899                              u64 *spte)
1900 {
1901         u64 pte;
1902         struct kvm_mmu_page *child;
1903
1904         pte = *spte;
1905         if (is_shadow_present_pte(pte)) {
1906                 if (is_last_spte(pte, sp->role.level)) {
1907                         drop_spte(kvm, spte);
1908                         if (is_large_pte(pte))
1909                                 --kvm->stat.lpages;
1910                 } else {
1911                         child = page_header(pte & PT64_BASE_ADDR_MASK);
1912                         drop_parent_pte(child, spte);
1913                 }
1914                 return true;
1915         }
1916
1917         if (is_mmio_spte(pte))
1918                 mmu_spte_clear_no_track(spte);
1919
1920         return false;
1921 }
1922
1923 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1924                                          struct kvm_mmu_page *sp)
1925 {
1926         unsigned i;
1927
1928         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1929                 mmu_page_zap_pte(kvm, sp, sp->spt + i);
1930 }
1931
1932 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1933 {
1934         mmu_page_remove_parent_pte(sp, parent_pte);
1935 }
1936
1937 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1938 {
1939         u64 *sptep;
1940         struct rmap_iterator iter;
1941
1942         while ((sptep = rmap_get_first(sp->parent_ptes, &iter)))
1943                 drop_parent_pte(sp, sptep);
1944 }
1945
1946 static int mmu_zap_unsync_children(struct kvm *kvm,
1947                                    struct kvm_mmu_page *parent,
1948                                    struct list_head *invalid_list)
1949 {
1950         int i, zapped = 0;
1951         struct mmu_page_path parents;
1952         struct kvm_mmu_pages pages;
1953
1954         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1955                 return 0;
1956
1957         kvm_mmu_pages_init(parent, &parents, &pages);
1958         while (mmu_unsync_walk(parent, &pages)) {
1959                 struct kvm_mmu_page *sp;
1960
1961                 for_each_sp(pages, sp, parents, i) {
1962                         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1963                         mmu_pages_clear_parents(&parents);
1964                         zapped++;
1965                 }
1966                 kvm_mmu_pages_init(parent, &parents, &pages);
1967         }
1968
1969         return zapped;
1970 }
1971
1972 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1973                                     struct list_head *invalid_list)
1974 {
1975         int ret;
1976
1977         trace_kvm_mmu_prepare_zap_page(sp);
1978         ++kvm->stat.mmu_shadow_zapped;
1979         ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1980         kvm_mmu_page_unlink_children(kvm, sp);
1981         kvm_mmu_unlink_parents(kvm, sp);
1982         if (!sp->role.invalid && !sp->role.direct)
1983                 unaccount_shadowed(kvm, sp->gfn);
1984         if (sp->unsync)
1985                 kvm_unlink_unsync_page(kvm, sp);
1986         if (!sp->root_count) {
1987                 /* Count self */
1988                 ret++;
1989                 list_move(&sp->link, invalid_list);
1990                 kvm_mod_used_mmu_pages(kvm, -1);
1991         } else {
1992                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1993                 kvm_reload_remote_mmus(kvm);
1994         }
1995
1996         sp->role.invalid = 1;
1997         return ret;
1998 }
1999
2000 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2001                                     struct list_head *invalid_list)
2002 {
2003         struct kvm_mmu_page *sp;
2004
2005         if (list_empty(invalid_list))
2006                 return;
2007
2008         /*
2009          * wmb: make sure everyone sees our modifications to the page tables
2010          * rmb: make sure we see changes to vcpu->mode
2011          */
2012         smp_mb();
2013
2014         /*
2015          * Wait for all vcpus to exit guest mode and/or lockless shadow
2016          * page table walks.
2017          */
2018         kvm_flush_remote_tlbs(kvm);
2019
2020         do {
2021                 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
2022                 WARN_ON(!sp->role.invalid || sp->root_count);
2023                 kvm_mmu_isolate_page(sp);
2024                 kvm_mmu_free_page(sp);
2025         } while (!list_empty(invalid_list));
2026 }
2027
2028 /*
2029  * Changing the number of mmu pages allocated to the vm
2030  * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2031  */
2032 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
2033 {
2034         LIST_HEAD(invalid_list);
2035         /*
2036          * If we set the number of mmu pages to be smaller be than the
2037          * number of actived pages , we must to free some mmu pages before we
2038          * change the value
2039          */
2040
2041         if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2042                 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages &&
2043                         !list_empty(&kvm->arch.active_mmu_pages)) {
2044                         struct kvm_mmu_page *page;
2045
2046                         page = container_of(kvm->arch.active_mmu_pages.prev,
2047                                             struct kvm_mmu_page, link);
2048                         kvm_mmu_prepare_zap_page(kvm, page, &invalid_list);
2049                 }
2050                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2051                 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2052         }
2053
2054         kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2055 }
2056
2057 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2058 {
2059         struct kvm_mmu_page *sp;
2060         struct hlist_node *node;
2061         LIST_HEAD(invalid_list);
2062         int r;
2063
2064         pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
2065         r = 0;
2066         spin_lock(&kvm->mmu_lock);
2067         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
2068                 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
2069                          sp->role.word);
2070                 r = 1;
2071                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2072         }
2073         kvm_mmu_commit_zap_page(kvm, &invalid_list);
2074         spin_unlock(&kvm->mmu_lock);
2075
2076         return r;
2077 }
2078 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page);
2079
2080 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
2081 {
2082         int slot = memslot_id(kvm, gfn);
2083         struct kvm_mmu_page *sp = page_header(__pa(pte));
2084
2085         __set_bit(slot, sp->slot_bitmap);
2086 }
2087
2088 /*
2089  * The function is based on mtrr_type_lookup() in
2090  * arch/x86/kernel/cpu/mtrr/generic.c
2091  */
2092 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
2093                          u64 start, u64 end)
2094 {
2095         int i;
2096         u64 base, mask;
2097         u8 prev_match, curr_match;
2098         int num_var_ranges = KVM_NR_VAR_MTRR;
2099
2100         if (!mtrr_state->enabled)
2101                 return 0xFF;
2102
2103         /* Make end inclusive end, instead of exclusive */
2104         end--;
2105
2106         /* Look in fixed ranges. Just return the type as per start */
2107         if (mtrr_state->have_fixed && (start < 0x100000)) {
2108                 int idx;
2109
2110                 if (start < 0x80000) {
2111                         idx = 0;
2112                         idx += (start >> 16);
2113                         return mtrr_state->fixed_ranges[idx];
2114                 } else if (start < 0xC0000) {
2115                         idx = 1 * 8;
2116                         idx += ((start - 0x80000) >> 14);
2117                         return mtrr_state->fixed_ranges[idx];
2118                 } else if (start < 0x1000000) {
2119                         idx = 3 * 8;
2120                         idx += ((start - 0xC0000) >> 12);
2121                         return mtrr_state->fixed_ranges[idx];
2122                 }
2123         }
2124
2125         /*
2126          * Look in variable ranges
2127          * Look of multiple ranges matching this address and pick type
2128          * as per MTRR precedence
2129          */
2130         if (!(mtrr_state->enabled & 2))
2131                 return mtrr_state->def_type;
2132
2133         prev_match = 0xFF;
2134         for (i = 0; i < num_var_ranges; ++i) {
2135                 unsigned short start_state, end_state;
2136
2137                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
2138                         continue;
2139
2140                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
2141                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
2142                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
2143                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
2144
2145                 start_state = ((start & mask) == (base & mask));
2146                 end_state = ((end & mask) == (base & mask));
2147                 if (start_state != end_state)
2148                         return 0xFE;
2149
2150                 if ((start & mask) != (base & mask))
2151                         continue;
2152
2153                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
2154                 if (prev_match == 0xFF) {
2155                         prev_match = curr_match;
2156                         continue;
2157                 }
2158
2159                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
2160                     curr_match == MTRR_TYPE_UNCACHABLE)
2161                         return MTRR_TYPE_UNCACHABLE;
2162
2163                 if ((prev_match == MTRR_TYPE_WRBACK &&
2164                      curr_match == MTRR_TYPE_WRTHROUGH) ||
2165                     (prev_match == MTRR_TYPE_WRTHROUGH &&
2166                      curr_match == MTRR_TYPE_WRBACK)) {
2167                         prev_match = MTRR_TYPE_WRTHROUGH;
2168                         curr_match = MTRR_TYPE_WRTHROUGH;
2169                 }
2170
2171                 if (prev_match != curr_match)
2172                         return MTRR_TYPE_UNCACHABLE;
2173         }
2174
2175         if (prev_match != 0xFF)
2176                 return prev_match;
2177
2178         return mtrr_state->def_type;
2179 }
2180
2181 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
2182 {
2183         u8 mtrr;
2184
2185         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
2186                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
2187         if (mtrr == 0xfe || mtrr == 0xff)
2188                 mtrr = MTRR_TYPE_WRBACK;
2189         return mtrr;
2190 }
2191 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
2192
2193 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
2194 {
2195         trace_kvm_mmu_unsync_page(sp);
2196         ++vcpu->kvm->stat.mmu_unsync;
2197         sp->unsync = 1;
2198
2199         kvm_mmu_mark_parents_unsync(sp);
2200 }
2201
2202 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
2203 {
2204         struct kvm_mmu_page *s;
2205         struct hlist_node *node;
2206
2207         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
2208                 if (s->unsync)
2209                         continue;
2210                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
2211                 __kvm_unsync_page(vcpu, s);
2212         }
2213 }
2214
2215 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
2216                                   bool can_unsync)
2217 {
2218         struct kvm_mmu_page *s;
2219         struct hlist_node *node;
2220         bool need_unsync = false;
2221
2222         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
2223                 if (!can_unsync)
2224                         return 1;
2225
2226                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
2227                         return 1;
2228
2229                 if (!need_unsync && !s->unsync) {
2230                         need_unsync = true;
2231                 }
2232         }
2233         if (need_unsync)
2234                 kvm_unsync_pages(vcpu, gfn);
2235         return 0;
2236 }
2237
2238 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2239                     unsigned pte_access, int user_fault,
2240                     int write_fault, int level,
2241                     gfn_t gfn, pfn_t pfn, bool speculative,
2242                     bool can_unsync, bool host_writable)
2243 {
2244         u64 spte, entry = *sptep;
2245         int ret = 0;
2246
2247         if (set_mmio_spte(sptep, gfn, pfn, pte_access))
2248                 return 0;
2249
2250         spte = PT_PRESENT_MASK;
2251         if (!speculative)
2252                 spte |= shadow_accessed_mask;
2253
2254         if (pte_access & ACC_EXEC_MASK)
2255                 spte |= shadow_x_mask;
2256         else
2257                 spte |= shadow_nx_mask;
2258         if (pte_access & ACC_USER_MASK)
2259                 spte |= shadow_user_mask;
2260         if (level > PT_PAGE_TABLE_LEVEL)
2261                 spte |= PT_PAGE_SIZE_MASK;
2262         if (tdp_enabled)
2263                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
2264                         kvm_is_mmio_pfn(pfn));
2265
2266         if (host_writable)
2267                 spte |= SPTE_HOST_WRITEABLE;
2268         else
2269                 pte_access &= ~ACC_WRITE_MASK;
2270
2271         spte |= (u64)pfn << PAGE_SHIFT;
2272
2273         if ((pte_access & ACC_WRITE_MASK)
2274             || (!vcpu->arch.mmu.direct_map && write_fault
2275                 && !is_write_protection(vcpu) && !user_fault)) {
2276
2277                 if (level > PT_PAGE_TABLE_LEVEL &&
2278                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
2279                         ret = 1;
2280                         drop_spte(vcpu->kvm, sptep);
2281                         goto done;
2282                 }
2283
2284                 spte |= PT_WRITABLE_MASK;
2285
2286                 if (!vcpu->arch.mmu.direct_map
2287                     && !(pte_access & ACC_WRITE_MASK)) {
2288                         spte &= ~PT_USER_MASK;
2289                         /*
2290                          * If we converted a user page to a kernel page,
2291                          * so that the kernel can write to it when cr0.wp=0,
2292                          * then we should prevent the kernel from executing it
2293                          * if SMEP is enabled.
2294                          */
2295                         if (kvm_read_cr4_bits(vcpu, X86_CR4_SMEP))
2296                                 spte |= PT64_NX_MASK;
2297                 }
2298
2299                 /*
2300                  * Optimization: for pte sync, if spte was writable the hash
2301                  * lookup is unnecessary (and expensive). Write protection
2302                  * is responsibility of mmu_get_page / kvm_sync_page.
2303                  * Same reasoning can be applied to dirty page accounting.
2304                  */
2305                 if (!can_unsync && is_writable_pte(*sptep))
2306                         goto set_pte;
2307
2308                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2309                         pgprintk("%s: found shadow page for %llx, marking ro\n",
2310                                  __func__, gfn);
2311                         ret = 1;
2312                         pte_access &= ~ACC_WRITE_MASK;
2313                         if (is_writable_pte(spte))
2314                                 spte &= ~PT_WRITABLE_MASK;
2315                 }
2316         }
2317
2318         if (pte_access & ACC_WRITE_MASK)
2319                 mark_page_dirty(vcpu->kvm, gfn);
2320
2321 set_pte:
2322         mmu_spte_update(sptep, spte);
2323         /*
2324          * If we overwrite a writable spte with a read-only one we
2325          * should flush remote TLBs. Otherwise rmap_write_protect
2326          * will find a read-only spte, even though the writable spte
2327          * might be cached on a CPU's TLB.
2328          */
2329         if (is_writable_pte(entry) && !is_writable_pte(*sptep))
2330                 kvm_flush_remote_tlbs(vcpu->kvm);
2331 done:
2332         return ret;
2333 }
2334
2335 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2336                          unsigned pt_access, unsigned pte_access,
2337                          int user_fault, int write_fault,
2338                          int *emulate, int level, gfn_t gfn,
2339                          pfn_t pfn, bool speculative,
2340                          bool host_writable)
2341 {
2342         int was_rmapped = 0;
2343         int rmap_count;
2344
2345         pgprintk("%s: spte %llx access %x write_fault %d"
2346                  " user_fault %d gfn %llx\n",
2347                  __func__, *sptep, pt_access,
2348                  write_fault, user_fault, gfn);
2349
2350         if (is_rmap_spte(*sptep)) {
2351                 /*
2352                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2353                  * the parent of the now unreachable PTE.
2354                  */
2355                 if (level > PT_PAGE_TABLE_LEVEL &&
2356                     !is_large_pte(*sptep)) {
2357                         struct kvm_mmu_page *child;
2358                         u64 pte = *sptep;
2359
2360                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2361                         drop_parent_pte(child, sptep);
2362                         kvm_flush_remote_tlbs(vcpu->kvm);
2363                 } else if (pfn != spte_to_pfn(*sptep)) {
2364                         pgprintk("hfn old %llx new %llx\n",
2365                                  spte_to_pfn(*sptep), pfn);
2366                         drop_spte(vcpu->kvm, sptep);
2367                         kvm_flush_remote_tlbs(vcpu->kvm);
2368                 } else
2369                         was_rmapped = 1;
2370         }
2371
2372         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2373                       level, gfn, pfn, speculative, true,
2374                       host_writable)) {
2375                 if (write_fault)
2376                         *emulate = 1;
2377                 kvm_mmu_flush_tlb(vcpu);
2378         }
2379
2380         if (unlikely(is_mmio_spte(*sptep) && emulate))
2381                 *emulate = 1;
2382
2383         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2384         pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2385                  is_large_pte(*sptep)? "2MB" : "4kB",
2386                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2387                  *sptep, sptep);
2388         if (!was_rmapped && is_large_pte(*sptep))
2389                 ++vcpu->kvm->stat.lpages;
2390
2391         if (is_shadow_present_pte(*sptep)) {
2392                 page_header_update_slot(vcpu->kvm, sptep, gfn);
2393                 if (!was_rmapped) {
2394                         rmap_count = rmap_add(vcpu, sptep, gfn);
2395                         if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2396                                 rmap_recycle(vcpu, sptep, gfn);
2397                 }
2398         }
2399         kvm_release_pfn_clean(pfn);
2400 }
2401
2402 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2403 {
2404 }
2405
2406 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2407                                      bool no_dirty_log)
2408 {
2409         struct kvm_memory_slot *slot;
2410         unsigned long hva;
2411
2412         slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, no_dirty_log);
2413         if (!slot) {
2414                 get_page(fault_page);
2415                 return page_to_pfn(fault_page);
2416         }
2417
2418         hva = gfn_to_hva_memslot(slot, gfn);
2419
2420         return hva_to_pfn_atomic(vcpu->kvm, hva);
2421 }
2422
2423 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2424                                     struct kvm_mmu_page *sp,
2425                                     u64 *start, u64 *end)
2426 {
2427         struct page *pages[PTE_PREFETCH_NUM];
2428         unsigned access = sp->role.access;
2429         int i, ret;
2430         gfn_t gfn;
2431
2432         gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2433         if (!gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK))
2434                 return -1;
2435
2436         ret = gfn_to_page_many_atomic(vcpu->kvm, gfn, pages, end - start);
2437         if (ret <= 0)
2438                 return -1;
2439
2440         for (i = 0; i < ret; i++, gfn++, start++)
2441                 mmu_set_spte(vcpu, start, ACC_ALL,
2442                              access, 0, 0, NULL,
2443                              sp->role.level, gfn,
2444                              page_to_pfn(pages[i]), true, true);
2445
2446         return 0;
2447 }
2448
2449 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2450                                   struct kvm_mmu_page *sp, u64 *sptep)
2451 {
2452         u64 *spte, *start = NULL;
2453         int i;
2454
2455         WARN_ON(!sp->role.direct);
2456
2457         i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2458         spte = sp->spt + i;
2459
2460         for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2461                 if (is_shadow_present_pte(*spte) || spte == sptep) {
2462                         if (!start)
2463                                 continue;
2464                         if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2465                                 break;
2466                         start = NULL;
2467                 } else if (!start)
2468                         start = spte;
2469         }
2470 }
2471
2472 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2473 {
2474         struct kvm_mmu_page *sp;
2475
2476         /*
2477          * Since it's no accessed bit on EPT, it's no way to
2478          * distinguish between actually accessed translations
2479          * and prefetched, so disable pte prefetch if EPT is
2480          * enabled.
2481          */
2482         if (!shadow_accessed_mask)
2483                 return;
2484
2485         sp = page_header(__pa(sptep));
2486         if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2487                 return;
2488
2489         __direct_pte_prefetch(vcpu, sp, sptep);
2490 }
2491
2492 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2493                         int map_writable, int level, gfn_t gfn, pfn_t pfn,
2494                         bool prefault)
2495 {
2496         struct kvm_shadow_walk_iterator iterator;
2497         struct kvm_mmu_page *sp;
2498         int emulate = 0;
2499         gfn_t pseudo_gfn;
2500
2501         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2502                 if (iterator.level == level) {
2503                         unsigned pte_access = ACC_ALL;
2504
2505                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, pte_access,
2506                                      0, write, &emulate,
2507                                      level, gfn, pfn, prefault, map_writable);
2508                         direct_pte_prefetch(vcpu, iterator.sptep);
2509                         ++vcpu->stat.pf_fixed;
2510                         break;
2511                 }
2512
2513                 if (!is_shadow_present_pte(*iterator.sptep)) {
2514                         u64 base_addr = iterator.addr;
2515
2516                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2517                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2518                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2519                                               iterator.level - 1,
2520                                               1, ACC_ALL, iterator.sptep);
2521                         if (!sp) {
2522                                 pgprintk("nonpaging_map: ENOMEM\n");
2523                                 kvm_release_pfn_clean(pfn);
2524                                 return -ENOMEM;
2525                         }
2526
2527                         mmu_spte_set(iterator.sptep,
2528                                      __pa(sp->spt)
2529                                      | PT_PRESENT_MASK | PT_WRITABLE_MASK
2530                                      | shadow_user_mask | shadow_x_mask
2531                                      | shadow_accessed_mask);
2532                 }
2533         }
2534         return emulate;
2535 }
2536
2537 static void kvm_send_hwpoison_signal(unsigned long address, struct task_struct *tsk)
2538 {
2539         siginfo_t info;
2540
2541         info.si_signo   = SIGBUS;
2542         info.si_errno   = 0;
2543         info.si_code    = BUS_MCEERR_AR;
2544         info.si_addr    = (void __user *)address;
2545         info.si_addr_lsb = PAGE_SHIFT;
2546
2547         send_sig_info(SIGBUS, &info, tsk);
2548 }
2549
2550 static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, pfn_t pfn)
2551 {
2552         kvm_release_pfn_clean(pfn);
2553         if (is_hwpoison_pfn(pfn)) {
2554                 kvm_send_hwpoison_signal(gfn_to_hva(vcpu->kvm, gfn), current);
2555                 return 0;
2556         }
2557
2558         return -EFAULT;
2559 }
2560
2561 static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu,
2562                                         gfn_t *gfnp, pfn_t *pfnp, int *levelp)
2563 {
2564         pfn_t pfn = *pfnp;
2565         gfn_t gfn = *gfnp;
2566         int level = *levelp;
2567
2568         /*
2569          * Check if it's a transparent hugepage. If this would be an
2570          * hugetlbfs page, level wouldn't be set to
2571          * PT_PAGE_TABLE_LEVEL and there would be no adjustment done
2572          * here.
2573          */
2574         if (!is_error_pfn(pfn) && !kvm_is_mmio_pfn(pfn) &&
2575             level == PT_PAGE_TABLE_LEVEL &&
2576             PageTransCompound(pfn_to_page(pfn)) &&
2577             !has_wrprotected_page(vcpu->kvm, gfn, PT_DIRECTORY_LEVEL)) {
2578                 unsigned long mask;
2579                 /*
2580                  * mmu_notifier_retry was successful and we hold the
2581                  * mmu_lock here, so the pmd can't become splitting
2582                  * from under us, and in turn
2583                  * __split_huge_page_refcount() can't run from under
2584                  * us and we can safely transfer the refcount from
2585                  * PG_tail to PG_head as we switch the pfn to tail to
2586                  * head.
2587                  */
2588                 *levelp = level = PT_DIRECTORY_LEVEL;
2589                 mask = KVM_PAGES_PER_HPAGE(level) - 1;
2590                 VM_BUG_ON((gfn & mask) != (pfn & mask));
2591                 if (pfn & mask) {
2592                         gfn &= ~mask;
2593                         *gfnp = gfn;
2594                         kvm_release_pfn_clean(pfn);
2595                         pfn &= ~mask;
2596                         kvm_get_pfn(pfn);
2597                         *pfnp = pfn;
2598                 }
2599         }
2600 }
2601
2602 static bool mmu_invalid_pfn(pfn_t pfn)
2603 {
2604         return unlikely(is_invalid_pfn(pfn));
2605 }
2606
2607 static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn,
2608                                 pfn_t pfn, unsigned access, int *ret_val)
2609 {
2610         bool ret = true;
2611
2612         /* The pfn is invalid, report the error! */
2613         if (unlikely(is_invalid_pfn(pfn))) {
2614                 *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn);
2615                 goto exit;
2616         }
2617
2618         if (unlikely(is_noslot_pfn(pfn)))
2619                 vcpu_cache_mmio_info(vcpu, gva, gfn, access);
2620
2621         ret = false;
2622 exit:
2623         return ret;
2624 }
2625
2626 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
2627                          gva_t gva, pfn_t *pfn, bool write, bool *writable);
2628
2629 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn,
2630                          bool prefault)
2631 {
2632         int r;
2633         int level;
2634         int force_pt_level;
2635         pfn_t pfn;
2636         unsigned long mmu_seq;
2637         bool map_writable;
2638
2639         force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
2640         if (likely(!force_pt_level)) {
2641                 level = mapping_level(vcpu, gfn);
2642                 /*
2643                  * This path builds a PAE pagetable - so we can map
2644                  * 2mb pages at maximum. Therefore check if the level
2645                  * is larger than that.
2646                  */
2647                 if (level > PT_DIRECTORY_LEVEL)
2648                         level = PT_DIRECTORY_LEVEL;
2649
2650                 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2651         } else
2652                 level = PT_PAGE_TABLE_LEVEL;
2653
2654         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2655         smp_rmb();
2656
2657         if (try_async_pf(vcpu, prefault, gfn, v, &pfn, write, &map_writable))
2658                 return 0;
2659
2660         if (handle_abnormal_pfn(vcpu, v, gfn, pfn, ACC_ALL, &r))
2661                 return r;
2662
2663         spin_lock(&vcpu->kvm->mmu_lock);
2664         if (mmu_notifier_retry(vcpu, mmu_seq))
2665                 goto out_unlock;
2666         kvm_mmu_free_some_pages(vcpu);
2667         if (likely(!force_pt_level))
2668                 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
2669         r = __direct_map(vcpu, v, write, map_writable, level, gfn, pfn,
2670                          prefault);
2671         spin_unlock(&vcpu->kvm->mmu_lock);
2672
2673
2674         return r;
2675
2676 out_unlock:
2677         spin_unlock(&vcpu->kvm->mmu_lock);
2678         kvm_release_pfn_clean(pfn);
2679         return 0;
2680 }
2681
2682
2683 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2684 {
2685         int i;
2686         struct kvm_mmu_page *sp;
2687         LIST_HEAD(invalid_list);
2688
2689         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2690                 return;
2691         spin_lock(&vcpu->kvm->mmu_lock);
2692         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
2693             (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
2694              vcpu->arch.mmu.direct_map)) {
2695                 hpa_t root = vcpu->arch.mmu.root_hpa;
2696
2697                 sp = page_header(root);
2698                 --sp->root_count;
2699                 if (!sp->root_count && sp->role.invalid) {
2700                         kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2701                         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2702                 }
2703                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2704                 spin_unlock(&vcpu->kvm->mmu_lock);
2705                 return;
2706         }
2707         for (i = 0; i < 4; ++i) {
2708                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2709
2710                 if (root) {
2711                         root &= PT64_BASE_ADDR_MASK;
2712                         sp = page_header(root);
2713                         --sp->root_count;
2714                         if (!sp->root_count && sp->role.invalid)
2715                                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2716                                                          &invalid_list);
2717                 }
2718                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2719         }
2720         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2721         spin_unlock(&vcpu->kvm->mmu_lock);
2722         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2723 }
2724
2725 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2726 {
2727         int ret = 0;
2728
2729         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2730                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2731                 ret = 1;
2732         }
2733
2734         return ret;
2735 }
2736
2737 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
2738 {
2739         struct kvm_mmu_page *sp;
2740         unsigned i;
2741
2742         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2743                 spin_lock(&vcpu->kvm->mmu_lock);
2744                 kvm_mmu_free_some_pages(vcpu);
2745                 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
2746                                       1, ACC_ALL, NULL);
2747                 ++sp->root_count;
2748                 spin_unlock(&vcpu->kvm->mmu_lock);
2749                 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
2750         } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
2751                 for (i = 0; i < 4; ++i) {
2752                         hpa_t root = vcpu->arch.mmu.pae_root[i];
2753
2754                         ASSERT(!VALID_PAGE(root));
2755                         spin_lock(&vcpu->kvm->mmu_lock);
2756                         kvm_mmu_free_some_pages(vcpu);
2757                         sp = kvm_mmu_get_page(vcpu, i << (30 - PAGE_SHIFT),
2758                                               i << 30,
2759                                               PT32_ROOT_LEVEL, 1, ACC_ALL,
2760                                               NULL);
2761                         root = __pa(sp->spt);
2762                         ++sp->root_count;
2763                         spin_unlock(&vcpu->kvm->mmu_lock);
2764                         vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2765                 }
2766                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2767         } else
2768                 BUG();
2769
2770         return 0;
2771 }
2772
2773 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
2774 {
2775         struct kvm_mmu_page *sp;
2776         u64 pdptr, pm_mask;
2777         gfn_t root_gfn;
2778         int i;
2779
2780         root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
2781
2782         if (mmu_check_root(vcpu, root_gfn))
2783                 return 1;
2784
2785         /*
2786          * Do we shadow a long mode page table? If so we need to
2787          * write-protect the guests page table root.
2788          */
2789         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2790                 hpa_t root = vcpu->arch.mmu.root_hpa;
2791
2792                 ASSERT(!VALID_PAGE(root));
2793
2794                 spin_lock(&vcpu->kvm->mmu_lock);
2795                 kvm_mmu_free_some_pages(vcpu);
2796                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
2797                                       0, ACC_ALL, NULL);
2798                 root = __pa(sp->spt);
2799                 ++sp->root_count;
2800                 spin_unlock(&vcpu->kvm->mmu_lock);
2801                 vcpu->arch.mmu.root_hpa = root;
2802                 return 0;
2803         }
2804
2805         /*
2806          * We shadow a 32 bit page table. This may be a legacy 2-level
2807          * or a PAE 3-level page table. In either case we need to be aware that
2808          * the shadow page table may be a PAE or a long mode page table.
2809          */
2810         pm_mask = PT_PRESENT_MASK;
2811         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
2812                 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
2813
2814         for (i = 0; i < 4; ++i) {
2815                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2816
2817                 ASSERT(!VALID_PAGE(root));
2818                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2819                         pdptr = vcpu->arch.mmu.get_pdptr(vcpu, i);
2820                         if (!is_present_gpte(pdptr)) {
2821                                 vcpu->arch.mmu.pae_root[i] = 0;
2822                                 continue;
2823                         }
2824                         root_gfn = pdptr >> PAGE_SHIFT;
2825                         if (mmu_check_root(vcpu, root_gfn))
2826                                 return 1;
2827                 }
2828                 spin_lock(&vcpu->kvm->mmu_lock);
2829                 kvm_mmu_free_some_pages(vcpu);
2830                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2831                                       PT32_ROOT_LEVEL, 0,
2832                                       ACC_ALL, NULL);
2833                 root = __pa(sp->spt);
2834                 ++sp->root_count;
2835                 spin_unlock(&vcpu->kvm->mmu_lock);
2836
2837                 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
2838         }
2839         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2840
2841         /*
2842          * If we shadow a 32 bit page table with a long mode page
2843          * table we enter this path.
2844          */
2845         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2846                 if (vcpu->arch.mmu.lm_root == NULL) {
2847                         /*
2848                          * The additional page necessary for this is only
2849                          * allocated on demand.
2850                          */
2851
2852                         u64 *lm_root;
2853
2854                         lm_root = (void*)get_zeroed_page(GFP_KERNEL);
2855                         if (lm_root == NULL)
2856                                 return 1;
2857
2858                         lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
2859
2860                         vcpu->arch.mmu.lm_root = lm_root;
2861                 }
2862
2863                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
2864         }
2865
2866         return 0;
2867 }
2868
2869 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2870 {
2871         if (vcpu->arch.mmu.direct_map)
2872                 return mmu_alloc_direct_roots(vcpu);
2873         else
2874                 return mmu_alloc_shadow_roots(vcpu);
2875 }
2876
2877 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2878 {
2879         int i;
2880         struct kvm_mmu_page *sp;
2881
2882         if (vcpu->arch.mmu.direct_map)
2883                 return;
2884
2885         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2886                 return;
2887
2888         vcpu_clear_mmio_info(vcpu, ~0ul);
2889         kvm_mmu_audit(vcpu, AUDIT_PRE_SYNC);
2890         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2891                 hpa_t root = vcpu->arch.mmu.root_hpa;
2892                 sp = page_header(root);
2893                 mmu_sync_children(vcpu, sp);
2894                 kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
2895                 return;
2896         }
2897         for (i = 0; i < 4; ++i) {
2898                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2899
2900                 if (root && VALID_PAGE(root)) {
2901                         root &= PT64_BASE_ADDR_MASK;
2902                         sp = page_header(root);
2903                         mmu_sync_children(vcpu, sp);
2904                 }
2905         }
2906         kvm_mmu_audit(vcpu, AUDIT_POST_SYNC);
2907 }
2908
2909 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2910 {
2911         spin_lock(&vcpu->kvm->mmu_lock);
2912         mmu_sync_roots(vcpu);
2913         spin_unlock(&vcpu->kvm->mmu_lock);
2914 }
2915
2916 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2917                                   u32 access, struct x86_exception *exception)
2918 {
2919         if (exception)
2920                 exception->error_code = 0;
2921         return vaddr;
2922 }
2923
2924 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
2925                                          u32 access,
2926                                          struct x86_exception *exception)
2927 {
2928         if (exception)
2929                 exception->error_code = 0;
2930         return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access);
2931 }
2932
2933 static bool quickly_check_mmio_pf(struct kvm_vcpu *vcpu, u64 addr, bool direct)
2934 {
2935         if (direct)
2936                 return vcpu_match_mmio_gpa(vcpu, addr);
2937
2938         return vcpu_match_mmio_gva(vcpu, addr);
2939 }
2940
2941
2942 /*
2943  * On direct hosts, the last spte is only allows two states
2944  * for mmio page fault:
2945  *   - It is the mmio spte
2946  *   - It is zapped or it is being zapped.
2947  *
2948  * This function completely checks the spte when the last spte
2949  * is not the mmio spte.
2950  */
2951 static bool check_direct_spte_mmio_pf(u64 spte)
2952 {
2953         return __check_direct_spte_mmio_pf(spte);
2954 }
2955
2956 static u64 walk_shadow_page_get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr)
2957 {
2958         struct kvm_shadow_walk_iterator iterator;
2959         u64 spte = 0ull;
2960
2961         walk_shadow_page_lockless_begin(vcpu);
2962         for_each_shadow_entry_lockless(vcpu, addr, iterator, spte)
2963                 if (!is_shadow_present_pte(spte))
2964                         break;
2965         walk_shadow_page_lockless_end(vcpu);
2966
2967         return spte;
2968 }
2969
2970 /*
2971  * If it is a real mmio page fault, return 1 and emulat the instruction
2972  * directly, return 0 to let CPU fault again on the address, -1 is
2973  * returned if bug is detected.
2974  */
2975 int handle_mmio_page_fault_common(struct kvm_vcpu *vcpu, u64 addr, bool direct)
2976 {
2977         u64 spte;
2978
2979         if (quickly_check_mmio_pf(vcpu, addr, direct))
2980                 return 1;
2981
2982         spte = walk_shadow_page_get_mmio_spte(vcpu, addr);
2983
2984         if (is_mmio_spte(spte)) {
2985                 gfn_t gfn = get_mmio_spte_gfn(spte);
2986                 unsigned access = get_mmio_spte_access(spte);
2987
2988                 if (direct)
2989                         addr = 0;
2990
2991                 trace_handle_mmio_page_fault(addr, gfn, access);
2992                 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
2993                 return 1;
2994         }
2995
2996         /*
2997          * It's ok if the gva is remapped by other cpus on shadow guest,
2998          * it's a BUG if the gfn is not a mmio page.
2999          */
3000         if (direct && !check_direct_spte_mmio_pf(spte))
3001                 return -1;
3002
3003         /*
3004          * If the page table is zapped by other cpus, let CPU fault again on
3005          * the address.
3006          */
3007         return 0;
3008 }
3009 EXPORT_SYMBOL_GPL(handle_mmio_page_fault_common);
3010
3011 static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr,
3012                                   u32 error_code, bool direct)
3013 {
3014         int ret;
3015
3016         ret = handle_mmio_page_fault_common(vcpu, addr, direct);
3017         WARN_ON(ret < 0);
3018         return ret;
3019 }
3020
3021 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3022                                 u32 error_code, bool prefault)
3023 {
3024         gfn_t gfn;
3025         int r;
3026
3027         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
3028
3029         if (unlikely(error_code & PFERR_RSVD_MASK))
3030                 return handle_mmio_page_fault(vcpu, gva, error_code, true);
3031
3032         r = mmu_topup_memory_caches(vcpu);
3033         if (r)
3034                 return r;
3035
3036         ASSERT(vcpu);
3037         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
3038
3039         gfn = gva >> PAGE_SHIFT;
3040
3041         return nonpaging_map(vcpu, gva & PAGE_MASK,
3042                              error_code & PFERR_WRITE_MASK, gfn, prefault);
3043 }
3044
3045 static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)
3046 {
3047         struct kvm_arch_async_pf arch;
3048
3049         arch.token = (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
3050         arch.gfn = gfn;
3051         arch.direct_map = vcpu->arch.mmu.direct_map;
3052         arch.cr3 = vcpu->arch.mmu.get_cr3(vcpu);
3053
3054         return kvm_setup_async_pf(vcpu, gva, gfn, &arch);
3055 }
3056
3057 static bool can_do_async_pf(struct kvm_vcpu *vcpu)
3058 {
3059         if (unlikely(!irqchip_in_kernel(vcpu->kvm) ||
3060                      kvm_event_needs_reinjection(vcpu)))
3061                 return false;
3062
3063         return kvm_x86_ops->interrupt_allowed(vcpu);
3064 }
3065
3066 static bool try_async_pf(struct kvm_vcpu *vcpu, bool prefault, gfn_t gfn,
3067                          gva_t gva, pfn_t *pfn, bool write, bool *writable)
3068 {
3069         bool async;
3070
3071         *pfn = gfn_to_pfn_async(vcpu->kvm, gfn, &async, write, writable);
3072
3073         if (!async)
3074                 return false; /* *pfn has correct page already */
3075
3076         put_page(pfn_to_page(*pfn));
3077
3078         if (!prefault && can_do_async_pf(vcpu)) {
3079                 trace_kvm_try_async_get_page(gva, gfn);
3080                 if (kvm_find_async_pf_gfn(vcpu, gfn)) {
3081                         trace_kvm_async_pf_doublefault(gva, gfn);
3082                         kvm_make_request(KVM_REQ_APF_HALT, vcpu);
3083                         return true;
3084                 } else if (kvm_arch_setup_async_pf(vcpu, gva, gfn))
3085                         return true;
3086         }
3087
3088         *pfn = gfn_to_pfn_prot(vcpu->kvm, gfn, write, writable);
3089
3090         return false;
3091 }
3092
3093 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, u32 error_code,
3094                           bool prefault)
3095 {
3096         pfn_t pfn;
3097         int r;
3098         int level;
3099         int force_pt_level;
3100         gfn_t gfn = gpa >> PAGE_SHIFT;
3101         unsigned long mmu_seq;
3102         int write = error_code & PFERR_WRITE_MASK;
3103         bool map_writable;
3104
3105         ASSERT(vcpu);
3106         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
3107
3108         if (unlikely(error_code & PFERR_RSVD_MASK))
3109                 return handle_mmio_page_fault(vcpu, gpa, error_code, true);
3110
3111         r = mmu_topup_memory_caches(vcpu);
3112         if (r)
3113                 return r;
3114
3115         force_pt_level = mapping_level_dirty_bitmap(vcpu, gfn);
3116         if (likely(!force_pt_level)) {
3117                 level = mapping_level(vcpu, gfn);
3118                 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
3119         } else
3120                 level = PT_PAGE_TABLE_LEVEL;
3121
3122         mmu_seq = vcpu->kvm->mmu_notifier_seq;
3123         smp_rmb();
3124
3125         if (try_async_pf(vcpu, prefault, gfn, gpa, &pfn, write, &map_writable))
3126                 return 0;
3127
3128         if (handle_abnormal_pfn(vcpu, 0, gfn, pfn, ACC_ALL, &r))
3129                 return r;
3130
3131         spin_lock(&vcpu->kvm->mmu_lock);
3132         if (mmu_notifier_retry(vcpu, mmu_seq))
3133                 goto out_unlock;
3134         kvm_mmu_free_some_pages(vcpu);
3135         if (likely(!force_pt_level))
3136                 transparent_hugepage_adjust(vcpu, &gfn, &pfn, &level);
3137         r = __direct_map(vcpu, gpa, write, map_writable,
3138                          level, gfn, pfn, prefault);
3139         spin_unlock(&vcpu->kvm->mmu_lock);
3140
3141         return r;
3142
3143 out_unlock:
3144         spin_unlock(&vcpu->kvm->mmu_lock);
3145         kvm_release_pfn_clean(pfn);
3146         return 0;
3147 }
3148
3149 static void nonpaging_free(struct kvm_vcpu *vcpu)
3150 {
3151         mmu_free_roots(vcpu);
3152 }
3153
3154 static int nonpaging_init_context(struct kvm_vcpu *vcpu,
3155                                   struct kvm_mmu *context)
3156 {
3157         context->new_cr3 = nonpaging_new_cr3;
3158         context->page_fault = nonpaging_page_fault;
3159         context->gva_to_gpa = nonpaging_gva_to_gpa;
3160         context->free = nonpaging_free;
3161         context->sync_page = nonpaging_sync_page;
3162         context->invlpg = nonpaging_invlpg;
3163         context->update_pte = nonpaging_update_pte;
3164         context->root_level = 0;
3165         context->shadow_root_level = PT32E_ROOT_LEVEL;
3166         context->root_hpa = INVALID_PAGE;
3167         context->direct_map = true;
3168         context->nx = false;
3169         return 0;
3170 }
3171
3172 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3173 {
3174         ++vcpu->stat.tlb_flush;
3175         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
3176 }
3177
3178 static void paging_new_cr3(struct kvm_vcpu *vcpu)
3179 {
3180         pgprintk("%s: cr3 %lx\n", __func__, kvm_read_cr3(vcpu));
3181         mmu_free_roots(vcpu);
3182 }
3183
3184 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
3185 {
3186         return kvm_read_cr3(vcpu);
3187 }
3188
3189 static void inject_page_fault(struct kvm_vcpu *vcpu,
3190                               struct x86_exception *fault)
3191 {
3192         vcpu->arch.mmu.inject_page_fault(vcpu, fault);
3193 }
3194
3195 static void paging_free(struct kvm_vcpu *vcpu)
3196 {
3197         nonpaging_free(vcpu);
3198 }
3199
3200 static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
3201 {
3202         int bit7;
3203
3204         bit7 = (gpte >> 7) & 1;
3205         return (gpte & mmu->rsvd_bits_mask[bit7][level-1]) != 0;
3206 }
3207
3208 static bool sync_mmio_spte(u64 *sptep, gfn_t gfn, unsigned access,
3209                            int *nr_present)
3210 {
3211         if (unlikely(is_mmio_spte(*sptep))) {
3212                 if (gfn != get_mmio_spte_gfn(*sptep)) {
3213                         mmu_spte_clear_no_track(sptep);
3214                         return true;
3215                 }
3216
3217                 (*nr_present)++;
3218                 mark_mmio_spte(sptep, gfn, access);
3219                 return true;
3220         }
3221
3222         return false;
3223 }
3224
3225 #define PTTYPE 64
3226 #include "paging_tmpl.h"
3227 #undef PTTYPE
3228
3229 #define PTTYPE 32
3230 #include "paging_tmpl.h"
3231 #undef PTTYPE
3232
3233 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
3234                                   struct kvm_mmu *context)
3235 {
3236         int maxphyaddr = cpuid_maxphyaddr(vcpu);
3237         u64 exb_bit_rsvd = 0;
3238
3239         if (!context->nx)
3240                 exb_bit_rsvd = rsvd_bits(63, 63);
3241         switch (context->root_level) {
3242         case PT32_ROOT_LEVEL:
3243                 /* no rsvd bits for 2 level 4K page table entries */
3244                 context->rsvd_bits_mask[0][1] = 0;
3245                 context->rsvd_bits_mask[0][0] = 0;
3246                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3247
3248                 if (!is_pse(vcpu)) {
3249                         context->rsvd_bits_mask[1][1] = 0;
3250                         break;
3251                 }
3252
3253                 if (is_cpuid_PSE36())
3254                         /* 36bits PSE 4MB page */
3255                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
3256                 else
3257                         /* 32 bits PSE 4MB page */
3258                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
3259                 break;
3260         case PT32E_ROOT_LEVEL:
3261                 context->rsvd_bits_mask[0][2] =
3262                         rsvd_bits(maxphyaddr, 63) |
3263                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
3264                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3265                         rsvd_bits(maxphyaddr, 62);      /* PDE */
3266                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3267                         rsvd_bits(maxphyaddr, 62);      /* PTE */
3268                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3269                         rsvd_bits(maxphyaddr, 62) |
3270                         rsvd_bits(13, 20);              /* large page */
3271                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3272                 break;
3273         case PT64_ROOT_LEVEL:
3274                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
3275                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
3276                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
3277                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
3278                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
3279                         rsvd_bits(maxphyaddr, 51);
3280                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
3281                         rsvd_bits(maxphyaddr, 51);
3282                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
3283                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
3284                         rsvd_bits(maxphyaddr, 51) |
3285                         rsvd_bits(13, 29);
3286                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
3287                         rsvd_bits(maxphyaddr, 51) |
3288                         rsvd_bits(13, 20);              /* large page */
3289                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
3290                 break;
3291         }
3292 }
3293
3294 static int paging64_init_context_common(struct kvm_vcpu *vcpu,
3295                                         struct kvm_mmu *context,
3296                                         int level)
3297 {
3298         context->nx = is_nx(vcpu);
3299         context->root_level = level;
3300
3301         reset_rsvds_bits_mask(vcpu, context);
3302
3303         ASSERT(is_pae(vcpu));
3304         context->new_cr3 = paging_new_cr3;
3305         context->page_fault = paging64_page_fault;
3306         context->gva_to_gpa = paging64_gva_to_gpa;
3307         context->sync_page = paging64_sync_page;
3308         context->invlpg = paging64_invlpg;
3309         context->update_pte = paging64_update_pte;
3310         context->free = paging_free;
3311         context->shadow_root_level = level;
3312         context->root_hpa = INVALID_PAGE;
3313         context->direct_map = false;
3314         return 0;
3315 }
3316
3317 static int paging64_init_context(struct kvm_vcpu *vcpu,
3318                                  struct kvm_mmu *context)
3319 {
3320         return paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
3321 }
3322
3323 static int paging32_init_context(struct kvm_vcpu *vcpu,
3324                                  struct kvm_mmu *context)
3325 {
3326         context->nx = false;
3327         context->root_level = PT32_ROOT_LEVEL;
3328
3329         reset_rsvds_bits_mask(vcpu, context);
3330
3331         context->new_cr3 = paging_new_cr3;
3332         context->page_fault = paging32_page_fault;
3333         context->gva_to_gpa = paging32_gva_to_gpa;
3334         context->free = paging_free;
3335         context->sync_page = paging32_sync_page;
3336         context->invlpg = paging32_invlpg;
3337         context->update_pte = paging32_update_pte;
3338         context->shadow_root_level = PT32E_ROOT_LEVEL;
3339         context->root_hpa = INVALID_PAGE;
3340         context->direct_map = false;
3341         return 0;
3342 }
3343
3344 static int paging32E_init_context(struct kvm_vcpu *vcpu,
3345                                   struct kvm_mmu *context)
3346 {
3347         return paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
3348 }
3349
3350 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
3351 {
3352         struct kvm_mmu *context = vcpu->arch.walk_mmu;
3353
3354         context->base_role.word = 0;
3355         context->new_cr3 = nonpaging_new_cr3;
3356         context->page_fault = tdp_page_fault;
3357         context->free = nonpaging_free;
3358         context->sync_page = nonpaging_sync_page;
3359         context->invlpg = nonpaging_invlpg;
3360         context->update_pte = nonpaging_update_pte;
3361         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
3362         context->root_hpa = INVALID_PAGE;
3363         context->direct_map = true;
3364         context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
3365         context->get_cr3 = get_cr3;
3366         context->get_pdptr = kvm_pdptr_read;
3367         context->inject_page_fault = kvm_inject_page_fault;
3368
3369         if (!is_paging(vcpu)) {
3370                 context->nx = false;
3371                 context->gva_to_gpa = nonpaging_gva_to_gpa;
3372                 context->root_level = 0;
3373         } else if (is_long_mode(vcpu)) {
3374                 context->nx = is_nx(vcpu);
3375                 context->root_level = PT64_ROOT_LEVEL;
3376                 reset_rsvds_bits_mask(vcpu, context);
3377                 context->gva_to_gpa = paging64_gva_to_gpa;
3378         } else if (is_pae(vcpu)) {
3379                 context->nx = is_nx(vcpu);
3380                 context->root_level = PT32E_ROOT_LEVEL;
3381                 reset_rsvds_bits_mask(vcpu, context);
3382                 context->gva_to_gpa = paging64_gva_to_gpa;
3383         } else {
3384                 context->nx = false;
3385                 context->root_level = PT32_ROOT_LEVEL;
3386                 reset_rsvds_bits_mask(vcpu, context);
3387                 context->gva_to_gpa = paging32_gva_to_gpa;
3388         }
3389
3390         return 0;
3391 }
3392
3393 int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
3394 {
3395         int r;
3396         bool smep = kvm_read_cr4_bits(vcpu, X86_CR4_SMEP);
3397         ASSERT(vcpu);
3398         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3399
3400         if (!is_paging(vcpu))
3401                 r = nonpaging_init_context(vcpu, context);
3402         else if (is_long_mode(vcpu))
3403                 r = paging64_init_context(vcpu, context);
3404         else if (is_pae(vcpu))
3405                 r = paging32E_init_context(vcpu, context);
3406         else
3407                 r = paging32_init_context(vcpu, context);
3408
3409         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
3410         vcpu->arch.mmu.base_role.cr0_wp  = is_write_protection(vcpu);
3411         vcpu->arch.mmu.base_role.smep_andnot_wp
3412                 = smep && !is_write_protection(vcpu);
3413
3414         return r;
3415 }
3416 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
3417
3418 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
3419 {
3420         int r = kvm_init_shadow_mmu(vcpu, vcpu->arch.walk_mmu);
3421
3422         vcpu->arch.walk_mmu->set_cr3           = kvm_x86_ops->set_cr3;
3423         vcpu->arch.walk_mmu->get_cr3           = get_cr3;
3424         vcpu->arch.walk_mmu->get_pdptr         = kvm_pdptr_read;
3425         vcpu->arch.walk_mmu->inject_page_fault = kvm_inject_page_fault;
3426
3427         return r;
3428 }
3429
3430 static int init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
3431 {
3432         struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
3433
3434         g_context->get_cr3           = get_cr3;
3435         g_context->get_pdptr         = kvm_pdptr_read;
3436         g_context->inject_page_fault = kvm_inject_page_fault;
3437
3438         /*
3439          * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
3440          * translation of l2_gpa to l1_gpa addresses is done using the
3441          * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
3442          * functions between mmu and nested_mmu are swapped.
3443          */
3444         if (!is_paging(vcpu)) {
3445                 g_context->nx = false;
3446                 g_context->root_level = 0;
3447                 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
3448         } else if (is_long_mode(vcpu)) {
3449                 g_context->nx = is_nx(vcpu);
3450                 g_context->root_level = PT64_ROOT_LEVEL;
3451                 reset_rsvds_bits_mask(vcpu, g_context);
3452                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
3453         } else if (is_pae(vcpu)) {
3454                 g_context->nx = is_nx(vcpu);
3455                 g_context->root_level = PT32E_ROOT_LEVEL;
3456                 reset_rsvds_bits_mask(vcpu, g_context);
3457                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
3458         } else {
3459                 g_context->nx = false;
3460                 g_context->root_level = PT32_ROOT_LEVEL;
3461                 reset_rsvds_bits_mask(vcpu, g_context);
3462                 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
3463         }
3464
3465         return 0;
3466 }
3467
3468 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
3469 {
3470         if (mmu_is_nested(vcpu))
3471                 return init_kvm_nested_mmu(vcpu);
3472         else if (tdp_enabled)
3473                 return init_kvm_tdp_mmu(vcpu);
3474         else
3475                 return init_kvm_softmmu(vcpu);
3476 }
3477
3478 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
3479 {
3480         ASSERT(vcpu);
3481         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
3482                 /* mmu.free() should set root_hpa = INVALID_PAGE */
3483                 vcpu->arch.mmu.free(vcpu);
3484 }
3485
3486 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
3487 {
3488         destroy_kvm_mmu(vcpu);
3489         return init_kvm_mmu(vcpu);
3490 }
3491 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
3492
3493 int kvm_mmu_load(struct kvm_vcpu *vcpu)
3494 {
3495         int r;
3496
3497         r = mmu_topup_memory_caches(vcpu);
3498         if (r)
3499                 goto out;
3500         r = mmu_alloc_roots(vcpu);
3501         spin_lock(&vcpu->kvm->mmu_lock);
3502         mmu_sync_roots(vcpu);
3503         spin_unlock(&vcpu->kvm->mmu_lock);
3504         if (r)
3505                 goto out;
3506         /* set_cr3() should ensure TLB has been flushed */
3507         vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
3508 out:
3509         return r;
3510 }
3511 EXPORT_SYMBOL_GPL(kvm_mmu_load);
3512
3513 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
3514 {
3515         mmu_free_roots(vcpu);
3516 }
3517 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
3518
3519 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
3520                                   struct kvm_mmu_page *sp, u64 *spte,
3521                                   const void *new)
3522 {
3523         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
3524                 ++vcpu->kvm->stat.mmu_pde_zapped;
3525                 return;
3526         }
3527
3528         ++vcpu->kvm->stat.mmu_pte_updated;
3529         vcpu->arch.mmu.update_pte(vcpu, sp, spte, new);
3530 }
3531
3532 static bool need_remote_flush(u64 old, u64 new)
3533 {
3534         if (!is_shadow_present_pte(old))
3535                 return false;
3536         if (!is_shadow_present_pte(new))
3537                 return true;
3538         if ((old ^ new) & PT64_BASE_ADDR_MASK)
3539                 return true;
3540         old ^= PT64_NX_MASK;
3541         new ^= PT64_NX_MASK;
3542         return (old & ~new & PT64_PERM_MASK) != 0;
3543 }
3544
3545 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
3546                                     bool remote_flush, bool local_flush)
3547 {
3548         if (zap_page)
3549                 return;
3550
3551         if (remote_flush)
3552                 kvm_flush_remote_tlbs(vcpu->kvm);
3553         else if (local_flush)
3554                 kvm_mmu_flush_tlb(vcpu);
3555 }
3556
3557 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
3558                                     const u8 *new, int *bytes)
3559 {
3560         u64 gentry;
3561         int r;
3562
3563         /*
3564          * Assume that the pte write on a page table of the same type
3565          * as the current vcpu paging mode since we update the sptes only
3566          * when they have the same mode.
3567          */
3568         if (is_pae(vcpu) && *bytes == 4) {
3569                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3570                 *gpa &= ~(gpa_t)7;
3571                 *bytes = 8;
3572                 r = kvm_read_guest(vcpu->kvm, *gpa, &gentry, min(*bytes, 8));
3573                 if (r)
3574                         gentry = 0;
3575                 new = (const u8 *)&gentry;
3576         }
3577
3578         switch (*bytes) {
3579         case 4:
3580                 gentry = *(const u32 *)new;
3581                 break;
3582         case 8:
3583                 gentry = *(const u64 *)new;
3584                 break;
3585         default:
3586                 gentry = 0;
3587                 break;
3588         }
3589
3590         return gentry;
3591 }
3592
3593 /*
3594  * If we're seeing too many writes to a page, it may no longer be a page table,
3595  * or we may be forking, in which case it is better to unmap the page.
3596  */
3597 static bool detect_write_flooding(struct kvm_mmu_page *sp)
3598 {
3599         /*
3600          * Skip write-flooding detected for the sp whose level is 1, because
3601          * it can become unsync, then the guest page is not write-protected.
3602          */
3603         if (sp->role.level == PT_PAGE_TABLE_LEVEL)
3604                 return false;
3605
3606         return ++sp->write_flooding_count >= 3;
3607 }
3608
3609 /*
3610  * Misaligned accesses are too much trouble to fix up; also, they usually
3611  * indicate a page is not used as a page table.
3612  */
3613 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
3614                                     int bytes)
3615 {
3616         unsigned offset, pte_size, misaligned;
3617
3618         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3619                  gpa, bytes, sp->role.word);
3620
3621         offset = offset_in_page(gpa);
3622         pte_size = sp->role.cr4_pae ? 8 : 4;
3623
3624         /*
3625          * Sometimes, the OS only writes the last one bytes to update status
3626          * bits, for example, in linux, andb instruction is used in clear_bit().
3627          */
3628         if (!(offset & (pte_size - 1)) && bytes == 1)
3629                 return false;
3630
3631         misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
3632         misaligned |= bytes < 4;
3633
3634         return misaligned;
3635 }
3636
3637 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
3638 {
3639         unsigned page_offset, quadrant;
3640         u64 *spte;
3641         int level;
3642
3643         page_offset = offset_in_page(gpa);
3644         level = sp->role.level;
3645         *nspte = 1;
3646         if (!sp->role.cr4_pae) {
3647                 page_offset <<= 1;      /* 32->64 */
3648                 /*
3649                  * A 32-bit pde maps 4MB while the shadow pdes map
3650                  * only 2MB.  So we need to double the offset again
3651                  * and zap two pdes instead of one.
3652                  */
3653                 if (level == PT32_ROOT_LEVEL) {
3654                         page_offset &= ~7; /* kill rounding error */
3655                         page_offset <<= 1;
3656                         *nspte = 2;
3657                 }
3658                 quadrant = page_offset >> PAGE_SHIFT;
3659                 page_offset &= ~PAGE_MASK;
3660                 if (quadrant != sp->role.quadrant)
3661                         return NULL;
3662         }
3663
3664         spte = &sp->spt[page_offset / sizeof(*spte)];
3665         return spte;
3666 }
3667
3668 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3669                        const u8 *new, int bytes)
3670 {
3671         gfn_t gfn = gpa >> PAGE_SHIFT;
3672         union kvm_mmu_page_role mask = { .word = 0 };
3673         struct kvm_mmu_page *sp;
3674         struct hlist_node *node;
3675         LIST_HEAD(invalid_list);
3676         u64 entry, gentry, *spte;
3677         int npte;
3678         bool remote_flush, local_flush, zap_page;
3679
3680         /*
3681          * If we don't have indirect shadow pages, it means no page is
3682          * write-protected, so we can exit simply.
3683          */
3684         if (!ACCESS_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
3685                 return;
3686
3687         zap_page = remote_flush = local_flush = false;
3688
3689         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
3690
3691         gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, new, &bytes);
3692
3693         /*
3694          * No need to care whether allocation memory is successful
3695          * or not since pte prefetch is skiped if it does not have
3696          * enough objects in the cache.
3697          */
3698         mmu_topup_memory_caches(vcpu);
3699
3700         spin_lock(&vcpu->kvm->mmu_lock);
3701         ++vcpu->kvm->stat.mmu_pte_write;
3702         kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
3703
3704         mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
3705         for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
3706                 if (detect_write_misaligned(sp, gpa, bytes) ||
3707                       detect_write_flooding(sp)) {
3708                         zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3709                                                      &invalid_list);
3710                         ++vcpu->kvm->stat.mmu_flooded;
3711                         continue;
3712                 }
3713
3714                 spte = get_written_sptes(sp, gpa, &npte);
3715                 if (!spte)
3716                         continue;
3717
3718                 local_flush = true;
3719                 while (npte--) {
3720                         entry = *spte;
3721                         mmu_page_zap_pte(vcpu->kvm, sp, spte);
3722                         if (gentry &&
3723                               !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
3724                               & mask.word) && rmap_can_add(vcpu))
3725                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
3726                         if (!remote_flush && need_remote_flush(entry, *spte))
3727                                 remote_flush = true;
3728                         ++spte;
3729                 }
3730         }
3731         mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
3732         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3733         kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
3734         spin_unlock(&vcpu->kvm->mmu_lock);
3735 }
3736
3737 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
3738 {
3739         gpa_t gpa;
3740         int r;
3741
3742         if (vcpu->arch.mmu.direct_map)
3743                 return 0;
3744
3745         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
3746
3747         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3748
3749         return r;
3750 }
3751 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
3752
3753 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
3754 {
3755         LIST_HEAD(invalid_list);
3756
3757         while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES &&
3758                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
3759                 struct kvm_mmu_page *sp;
3760
3761                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
3762                                   struct kvm_mmu_page, link);
3763                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3764                 ++vcpu->kvm->stat.mmu_recycled;
3765         }
3766         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3767 }
3768
3769 static bool is_mmio_page_fault(struct kvm_vcpu *vcpu, gva_t addr)
3770 {
3771         if (vcpu->arch.mmu.direct_map || mmu_is_nested(vcpu))
3772                 return vcpu_match_mmio_gpa(vcpu, addr);
3773
3774         return vcpu_match_mmio_gva(vcpu, addr);
3775 }
3776
3777 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code,
3778                        void *insn, int insn_len)
3779 {
3780         int r, emulation_type = EMULTYPE_RETRY;
3781         enum emulation_result er;
3782
3783         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code, false);
3784         if (r < 0)
3785                 goto out;
3786
3787         if (!r) {
3788                 r = 1;
3789                 goto out;
3790         }
3791
3792         if (is_mmio_page_fault(vcpu, cr2))
3793                 emulation_type = 0;
3794
3795         er = x86_emulate_instruction(vcpu, cr2, emulation_type, insn, insn_len);
3796
3797         switch (er) {
3798         case EMULATE_DONE:
3799                 return 1;
3800         case EMULATE_DO_MMIO:
3801                 ++vcpu->stat.mmio_exits;
3802                 /* fall through */
3803         case EMULATE_FAIL:
3804                 return 0;
3805         default:
3806                 BUG();
3807         }
3808 out:
3809         return r;
3810 }
3811 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
3812
3813 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
3814 {
3815         vcpu->arch.mmu.invlpg(vcpu, gva);
3816         kvm_mmu_flush_tlb(vcpu);
3817         ++vcpu->stat.invlpg;
3818 }
3819 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3820
3821 void kvm_enable_tdp(void)
3822 {
3823         tdp_enabled = true;
3824 }
3825 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3826
3827 void kvm_disable_tdp(void)
3828 {
3829         tdp_enabled = false;
3830 }
3831 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3832
3833 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3834 {
3835         free_page((unsigned long)vcpu->arch.mmu.pae_root);
3836         if (vcpu->arch.mmu.lm_root != NULL)
3837                 free_page((unsigned long)vcpu->arch.mmu.lm_root);
3838 }
3839
3840 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3841 {
3842         struct page *page;
3843         int i;
3844
3845         ASSERT(vcpu);
3846
3847         /*
3848          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3849          * Therefore we need to allocate shadow page tables in the first
3850          * 4GB of memory, which happens to fit the DMA32 zone.
3851          */
3852         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3853         if (!page)
3854                 return -ENOMEM;
3855
3856         vcpu->arch.mmu.pae_root = page_address(page);
3857         for (i = 0; i < 4; ++i)
3858                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3859
3860         return 0;
3861 }
3862
3863 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3864 {
3865         ASSERT(vcpu);
3866
3867         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
3868         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3869         vcpu->arch.mmu.translate_gpa = translate_gpa;
3870         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
3871
3872         return alloc_mmu_pages(vcpu);
3873 }
3874
3875 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3876 {
3877         ASSERT(vcpu);
3878         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3879
3880         return init_kvm_mmu(vcpu);
3881 }
3882
3883 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3884 {
3885         struct kvm_mmu_page *sp;
3886
3887         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3888                 int i;
3889                 u64 *pt;
3890
3891                 if (!test_bit(slot, sp->slot_bitmap))
3892                         continue;
3893
3894                 pt = sp->spt;
3895                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3896                         if (!is_shadow_present_pte(pt[i]) ||
3897                               !is_last_spte(pt[i], sp->role.level))
3898                                 continue;
3899
3900                         if (is_large_pte(pt[i])) {
3901                                 drop_spte(kvm, &pt[i]);
3902                                 --kvm->stat.lpages;
3903                                 continue;
3904                         }
3905
3906                         /* avoid RMW */
3907                         if (is_writable_pte(pt[i]))
3908                                 mmu_spte_update(&pt[i],
3909                                                 pt[i] & ~PT_WRITABLE_MASK);
3910                 }
3911         }
3912         kvm_flush_remote_tlbs(kvm);
3913 }
3914
3915 void kvm_mmu_zap_all(struct kvm *kvm)
3916 {
3917         struct kvm_mmu_page *sp, *node;
3918         LIST_HEAD(invalid_list);
3919
3920         spin_lock(&kvm->mmu_lock);
3921 restart:
3922         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3923                 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3924                         goto restart;
3925
3926         kvm_mmu_commit_zap_page(kvm, &invalid_list);
3927         spin_unlock(&kvm->mmu_lock);
3928 }
3929
3930 static void kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3931                                                 struct list_head *invalid_list)
3932 {
3933         struct kvm_mmu_page *page;
3934
3935         page = container_of(kvm->arch.active_mmu_pages.prev,
3936                             struct kvm_mmu_page, link);
3937         kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3938 }
3939
3940 static int mmu_shrink(struct shrinker *shrink, struct shrink_control *sc)
3941 {
3942         struct kvm *kvm;
3943         int nr_to_scan = sc->nr_to_scan;
3944
3945         if (nr_to_scan == 0)
3946                 goto out;
3947
3948         raw_spin_lock(&kvm_lock);
3949
3950         list_for_each_entry(kvm, &vm_list, vm_list) {
3951                 int idx;
3952                 LIST_HEAD(invalid_list);
3953
3954                 /*
3955                  * n_used_mmu_pages is accessed without holding kvm->mmu_lock
3956                  * here. We may skip a VM instance errorneosly, but we do not
3957                  * want to shrink a VM that only started to populate its MMU
3958                  * anyway.
3959                  */
3960                 if (kvm->arch.n_used_mmu_pages > 0) {
3961                         if (!nr_to_scan--)
3962                                 break;
3963                         continue;
3964                 }
3965
3966                 idx = srcu_read_lock(&kvm->srcu);
3967                 spin_lock(&kvm->mmu_lock);
3968
3969                 kvm_mmu_remove_some_alloc_mmu_pages(kvm, &invalid_list);
3970                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3971
3972                 spin_unlock(&kvm->mmu_lock);
3973                 srcu_read_unlock(&kvm->srcu, idx);
3974
3975                 list_move_tail(&kvm->vm_list, &vm_list);
3976                 break;
3977         }
3978
3979         raw_spin_unlock(&kvm_lock);
3980
3981 out:
3982         return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
3983 }
3984
3985 static struct shrinker mmu_shrinker = {
3986         .shrink = mmu_shrink,
3987         .seeks = DEFAULT_SEEKS * 10,
3988 };
3989
3990 static void mmu_destroy_caches(void)
3991 {
3992         if (pte_list_desc_cache)
3993                 kmem_cache_destroy(pte_list_desc_cache);
3994         if (mmu_page_header_cache)
3995                 kmem_cache_destroy(mmu_page_header_cache);
3996 }
3997
3998 int kvm_mmu_module_init(void)
3999 {
4000         pte_list_desc_cache = kmem_cache_create("pte_list_desc",
4001                                             sizeof(struct pte_list_desc),
4002                                             0, 0, NULL);
4003         if (!pte_list_desc_cache)
4004                 goto nomem;
4005
4006         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
4007                                                   sizeof(struct kvm_mmu_page),
4008                                                   0, 0, NULL);
4009         if (!mmu_page_header_cache)
4010                 goto nomem;
4011
4012         if (percpu_counter_init(&kvm_total_used_mmu_pages, 0))
4013                 goto nomem;
4014
4015         register_shrinker(&mmu_shrinker);
4016
4017         return 0;
4018
4019 nomem:
4020         mmu_destroy_caches();
4021         return -ENOMEM;
4022 }
4023
4024 /*
4025  * Caculate mmu pages needed for kvm.
4026  */
4027 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
4028 {
4029         unsigned int nr_mmu_pages;
4030         unsigned int  nr_pages = 0;
4031         struct kvm_memslots *slots;
4032         struct kvm_memory_slot *memslot;
4033
4034         slots = kvm_memslots(kvm);
4035
4036         kvm_for_each_memslot(memslot, slots)
4037                 nr_pages += memslot->npages;
4038
4039         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
4040         nr_mmu_pages = max(nr_mmu_pages,
4041                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
4042
4043         return nr_mmu_pages;
4044 }
4045
4046 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
4047 {
4048         struct kvm_shadow_walk_iterator iterator;
4049         u64 spte;
4050         int nr_sptes = 0;
4051
4052         walk_shadow_page_lockless_begin(vcpu);
4053         for_each_shadow_entry_lockless(vcpu, addr, iterator, spte) {
4054                 sptes[iterator.level-1] = spte;
4055                 nr_sptes++;
4056                 if (!is_shadow_present_pte(spte))
4057                         break;
4058         }
4059         walk_shadow_page_lockless_end(vcpu);
4060
4061         return nr_sptes;
4062 }
4063 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
4064
4065 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
4066 {
4067         ASSERT(vcpu);
4068
4069         destroy_kvm_mmu(vcpu);
4070         free_mmu_pages(vcpu);
4071         mmu_free_memory_caches(vcpu);
4072 }
4073
4074 void kvm_mmu_module_exit(void)
4075 {
4076         mmu_destroy_caches();
4077         percpu_counter_destroy(&kvm_total_used_mmu_pages);
4078         unregister_shrinker(&mmu_shrinker);
4079         mmu_audit_disable();
4080 }