arch/x86/kvm/mmu.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  * Copyright 2010 Red Hat, Inc. and/or its affilates.
  11  *
  12  * Authors:
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Avi Kivity   <avi@qumranet.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include "mmu.h"
  22 #include "x86.h"
  23 #include "kvm_cache_regs.h"
  24
  25 #include <linux/kvm_host.h>
  26 #include <linux/types.h>
  27 #include <linux/string.h>
  28 #include <linux/mm.h>
  29 #include <linux/highmem.h>
  30 #include <linux/module.h>
  31 #include <linux/swap.h>
  32 #include <linux/hugetlb.h>
  33 #include <linux/compiler.h>
  34 #include <linux/srcu.h>
  35 #include <linux/slab.h>
  36 #include <linux/uaccess.h>
  37
  38 #include <asm/page.h>
  39 #include <asm/cmpxchg.h>
  40 #include <asm/io.h>
  41 #include <asm/vmx.h>
  42
  43 /*
  44  * When setting this variable to true it enables Two-Dimensional-Paging
  45  * where the hardware walks 2 page tables:
  46  * 1. the guest-virtual to guest-physical
  47  * 2. while doing 1. it walks guest-physical to host-physical
  48  * If the hardware supports that we don't need to do shadow paging.
  49  */
  50 bool tdp_enabled = false;
  51
  52 #undef MMU_DEBUG
  53
  54 #undef AUDIT
  55
  56 #ifdef AUDIT
  57 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  58 #else
  59 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  60 #endif
  61
  62 #ifdef MMU_DEBUG
  63
  64 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  65 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  66
  67 #else
  68
  69 #define pgprintk(x...) do { } while (0)
  70 #define rmap_printk(x...) do { } while (0)
  71
  72 #endif
  73
  74 #if defined(MMU_DEBUG) || defined(AUDIT)
  75 static int dbg = 0;
  76 module_param(dbg, bool, 0644);
  77 #endif
  78
  79 static int oos_shadow = 1;
  80 module_param(oos_shadow, bool, 0644);
  81
  82 #ifndef MMU_DEBUG
  83 #define ASSERT(x) do { } while (0)
  84 #else
  85 #define ASSERT(x)                                                       \
  86         if (!(x)) {                                                     \
  87                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
  88                        __FILE__, __LINE__, #x);                         \
  89         }
  90 #endif
  91
  92 #define PTE_PREFETCH_NUM                8
  93
  94 #define PT_FIRST_AVAIL_BITS_SHIFT 9
  95 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  96
  97 #define PT64_LEVEL_BITS 9
  98
  99 #define PT64_LEVEL_SHIFT(level) \
 100                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
 101
 102 #define PT64_LEVEL_MASK(level) \
 103                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
 104
 105 #define PT64_INDEX(address, level)\
 106         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
 107
 108
 109 #define PT32_LEVEL_BITS 10
 110
 111 #define PT32_LEVEL_SHIFT(level) \
 112                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
 113
 114 #define PT32_LEVEL_MASK(level) \
 115                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
 116 #define PT32_LVL_OFFSET_MASK(level) \
 117         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 118                                                 * PT32_LEVEL_BITS))) - 1))
 119
 120 #define PT32_INDEX(address, level)\
 121         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
 122
 123
 124 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
 125 #define PT64_DIR_BASE_ADDR_MASK \
 126         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
 127 #define PT64_LVL_ADDR_MASK(level) \
 128         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 129                                                 * PT64_LEVEL_BITS))) - 1))
 130 #define PT64_LVL_OFFSET_MASK(level) \
 131         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 132                                                 * PT64_LEVEL_BITS))) - 1))
 133
 134 #define PT32_BASE_ADDR_MASK PAGE_MASK
 135 #define PT32_DIR_BASE_ADDR_MASK \
 136         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
 137 #define PT32_LVL_ADDR_MASK(level) \
 138         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 139                                             * PT32_LEVEL_BITS))) - 1))
 140
 141 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
 142                         | PT64_NX_MASK)
 143
 144 #define RMAP_EXT 4
 145
 146 #define ACC_EXEC_MASK    1
 147 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
 148 #define ACC_USER_MASK    PT_USER_MASK
 149 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
 150
 151 #include <trace/events/kvm.h>
 152
 153 #define CREATE_TRACE_POINTS
 154 #include "mmutrace.h"
 155
 156 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
 157
 158 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
 159
 160 struct kvm_rmap_desc {
 161         u64 *sptes[RMAP_EXT];
 162         struct kvm_rmap_desc *more;
 163 };
 164
 165 struct kvm_shadow_walk_iterator {
 166         u64 addr;
 167         hpa_t shadow_addr;
 168         int level;
 169         u64 *sptep;
 170         unsigned index;
 171 };
 172
 173 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
 174         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
 175              shadow_walk_okay(&(_walker));                      \
 176              shadow_walk_next(&(_walker)))
 177
 178 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
 179
 180 static struct kmem_cache *pte_chain_cache;
 181 static struct kmem_cache *rmap_desc_cache;
 182 static struct kmem_cache *mmu_page_header_cache;
 183 static struct percpu_counter kvm_total_used_mmu_pages;
 184
 185 static u64 __read_mostly shadow_trap_nonpresent_pte;
 186 static u64 __read_mostly shadow_notrap_nonpresent_pte;
 187 static u64 __read_mostly shadow_base_present_pte;
 188 static u64 __read_mostly shadow_nx_mask;
 189 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
 190 static u64 __read_mostly shadow_user_mask;
 191 static u64 __read_mostly shadow_accessed_mask;
 192 static u64 __read_mostly shadow_dirty_mask;
 193
 194 static inline u64 rsvd_bits(int s, int e)
 195 {
 196         return ((1ULL << (e - s + 1)) - 1) << s;
 197 }
 198
 199 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
 200 {
 201         shadow_trap_nonpresent_pte = trap_pte;
 202         shadow_notrap_nonpresent_pte = notrap_pte;
 203 }
 204 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
 205
 206 void kvm_mmu_set_base_ptes(u64 base_pte)
 207 {
 208         shadow_base_present_pte = base_pte;
 209 }
 210 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
 211
 212 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
 213                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
 214 {
 215         shadow_user_mask = user_mask;
 216         shadow_accessed_mask = accessed_mask;
 217         shadow_dirty_mask = dirty_mask;
 218         shadow_nx_mask = nx_mask;
 219         shadow_x_mask = x_mask;
 220 }
 221 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
 222
 223 static bool is_write_protection(struct kvm_vcpu *vcpu)
 224 {
 225         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
 226 }
 227
 228 static int is_cpuid_PSE36(void)
 229 {
 230         return 1;
 231 }
 232
 233 static int is_nx(struct kvm_vcpu *vcpu)
 234 {
 235         return vcpu->arch.efer & EFER_NX;
 236 }
 237
 238 static int is_shadow_present_pte(u64 pte)
 239 {
 240         return pte != shadow_trap_nonpresent_pte
 241                 && pte != shadow_notrap_nonpresent_pte;
 242 }
 243
 244 static int is_large_pte(u64 pte)
 245 {
 246         return pte & PT_PAGE_SIZE_MASK;
 247 }
 248
 249 static int is_writable_pte(unsigned long pte)
 250 {
 251         return pte & PT_WRITABLE_MASK;
 252 }
 253
 254 static int is_dirty_gpte(unsigned long pte)
 255 {
 256         return pte & PT_DIRTY_MASK;
 257 }
 258
 259 static int is_rmap_spte(u64 pte)
 260 {
 261         return is_shadow_present_pte(pte);
 262 }
 263
 264 static int is_last_spte(u64 pte, int level)
 265 {
 266         if (level == PT_PAGE_TABLE_LEVEL)
 267                 return 1;
 268         if (is_large_pte(pte))
 269                 return 1;
 270         return 0;
 271 }
 272
 273 static pfn_t spte_to_pfn(u64 pte)
 274 {
 275         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
 276 }
 277
 278 static gfn_t pse36_gfn_delta(u32 gpte)
 279 {
 280         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
 281
 282         return (gpte & PT32_DIR_PSE36_MASK) << shift;
 283 }
 284
 285 static void __set_spte(u64 *sptep, u64 spte)
 286 {
 287         set_64bit(sptep, spte);
 288 }
 289
 290 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
 291 {
 292 #ifdef CONFIG_X86_64
 293         return xchg(sptep, new_spte);
 294 #else
 295         u64 old_spte;
 296
 297         do {
 298                 old_spte = *sptep;
 299         } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
 300
 301         return old_spte;
 302 #endif
 303 }
 304
 305 static bool spte_has_volatile_bits(u64 spte)
 306 {
 307         if (!shadow_accessed_mask)
 308                 return false;
 309
 310         if (!is_shadow_present_pte(spte))
 311                 return false;
 312
 313         if ((spte & shadow_accessed_mask) &&
 314               (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
 315                 return false;
 316
 317         return true;
 318 }
 319
 320 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
 321 {
 322         return (old_spte & bit_mask) && !(new_spte & bit_mask);
 323 }
 324
 325 static void update_spte(u64 *sptep, u64 new_spte)
 326 {
 327         u64 mask, old_spte = *sptep;
 328
 329         WARN_ON(!is_rmap_spte(new_spte));
 330
 331         new_spte |= old_spte & shadow_dirty_mask;
 332
 333         mask = shadow_accessed_mask;
 334         if (is_writable_pte(old_spte))
 335                 mask |= shadow_dirty_mask;
 336
 337         if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
 338                 __set_spte(sptep, new_spte);
 339         else
 340                 old_spte = __xchg_spte(sptep, new_spte);
 341
 342         if (!shadow_accessed_mask)
 343                 return;
 344
 345         if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
 346                 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
 347         if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
 348                 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
 349 }
 350
 351 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
 352                                   struct kmem_cache *base_cache, int min)
 353 {
 354         void *obj;
 355
 356         if (cache->nobjs >= min)
 357                 return 0;
 358         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 359                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
 360                 if (!obj)
 361                         return -ENOMEM;
 362                 cache->objects[cache->nobjs++] = obj;
 363         }
 364         return 0;
 365 }
 366
 367 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
 368                                   struct kmem_cache *cache)
 369 {
 370         while (mc->nobjs)
 371                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
 372 }
 373
 374 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
 375                                        int min)
 376 {
 377         struct page *page;
 378
 379         if (cache->nobjs >= min)
 380                 return 0;
 381         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 382                 page = alloc_page(GFP_KERNEL);
 383                 if (!page)
 384                         return -ENOMEM;
 385                 cache->objects[cache->nobjs++] = page_address(page);
 386         }
 387         return 0;
 388 }
 389
 390 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
 391 {
 392         while (mc->nobjs)
 393                 free_page((unsigned long)mc->objects[--mc->nobjs]);
 394 }
 395
 396 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
 397 {
 398         int r;
 399
 400         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
 401                                    pte_chain_cache, 4);
 402         if (r)
 403                 goto out;
 404         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
 405                                    rmap_desc_cache, 4 + PTE_PREFETCH_NUM);
 406         if (r)
 407                 goto out;
 408         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
 409         if (r)
 410                 goto out;
 411         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
 412                                    mmu_page_header_cache, 4);
 413 out:
 414         return r;
 415 }
 416
 417 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
 418 {
 419         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
 420         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
 421         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
 422         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
 423                                 mmu_page_header_cache);
 424 }
 425
 426 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
 427                                     size_t size)
 428 {
 429         void *p;
 430
 431         BUG_ON(!mc->nobjs);
 432         p = mc->objects[--mc->nobjs];
 433         return p;
 434 }
 435
 436 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
 437 {
 438         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
 439                                       sizeof(struct kvm_pte_chain));
 440 }
 441
 442 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
 443 {
 444         kmem_cache_free(pte_chain_cache, pc);
 445 }
 446
 447 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
 448 {
 449         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
 450                                       sizeof(struct kvm_rmap_desc));
 451 }
 452
 453 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
 454 {
 455         kmem_cache_free(rmap_desc_cache, rd);
 456 }
 457
 458 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
 459 {
 460         if (!sp->role.direct)
 461                 return sp->gfns[index];
 462
 463         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
 464 }
 465
 466 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
 467 {
 468         if (sp->role.direct)
 469                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
 470         else
 471                 sp->gfns[index] = gfn;
 472 }
 473
 474 /*
 475  * Return the pointer to the largepage write count for a given
 476  * gfn, handling slots that are not large page aligned.
 477  */
 478 static int *slot_largepage_idx(gfn_t gfn,
 479                                struct kvm_memory_slot *slot,
 480                                int level)
 481 {
 482         unsigned long idx;
 483
 484         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
 485               (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
 486         return &slot->lpage_info[level - 2][idx].write_count;
 487 }
 488
 489 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
 490 {
 491         struct kvm_memory_slot *slot;
 492         int *write_count;
 493         int i;
 494
 495         slot = gfn_to_memslot(kvm, gfn);
 496         for (i = PT_DIRECTORY_LEVEL;
 497              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 498                 write_count   = slot_largepage_idx(gfn, slot, i);
 499                 *write_count += 1;
 500         }
 501 }
 502
 503 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
 504 {
 505         struct kvm_memory_slot *slot;
 506         int *write_count;
 507         int i;
 508
 509         slot = gfn_to_memslot(kvm, gfn);
 510         for (i = PT_DIRECTORY_LEVEL;
 511              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 512                 write_count   = slot_largepage_idx(gfn, slot, i);
 513                 *write_count -= 1;
 514                 WARN_ON(*write_count < 0);
 515         }
 516 }
 517
 518 static int has_wrprotected_page(struct kvm *kvm,
 519                                 gfn_t gfn,
 520                                 int level)
 521 {
 522         struct kvm_memory_slot *slot;
 523         int *largepage_idx;
 524
 525         slot = gfn_to_memslot(kvm, gfn);
 526         if (slot) {
 527                 largepage_idx = slot_largepage_idx(gfn, slot, level);
 528                 return *largepage_idx;
 529         }
 530
 531         return 1;
 532 }
 533
 534 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
 535 {
 536         unsigned long page_size;
 537         int i, ret = 0;
 538
 539         page_size = kvm_host_page_size(kvm, gfn);
 540
 541         for (i = PT_PAGE_TABLE_LEVEL;
 542              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
 543                 if (page_size >= KVM_HPAGE_SIZE(i))
 544                         ret = i;
 545                 else
 546                         break;
 547         }
 548
 549         return ret;
 550 }
 551
 552 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
 553 {
 554         struct kvm_memory_slot *slot;
 555         int host_level, level, max_level;
 556
 557         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
 558         if (slot && slot->dirty_bitmap)
 559                 return PT_PAGE_TABLE_LEVEL;
 560
 561         host_level = host_mapping_level(vcpu->kvm, large_gfn);
 562
 563         if (host_level == PT_PAGE_TABLE_LEVEL)
 564                 return host_level;
 565
 566         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
 567                 kvm_x86_ops->get_lpage_level() : host_level;
 568
 569         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
 570                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
 571                         break;
 572
 573         return level - 1;
 574 }
 575
 576 /*
 577  * Take gfn and return the reverse mapping to it.
 578  */
 579
 580 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
 581 {
 582         struct kvm_memory_slot *slot;
 583         unsigned long idx;
 584
 585         slot = gfn_to_memslot(kvm, gfn);
 586         if (likely(level == PT_PAGE_TABLE_LEVEL))
 587                 return &slot->rmap[gfn - slot->base_gfn];
 588
 589         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
 590                 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
 591
 592         return &slot->lpage_info[level - 2][idx].rmap_pde;
 593 }
 594
 595 /*
 596  * Reverse mapping data structures:
 597  *
 598  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
 599  * that points to page_address(page).
 600  *
 601  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
 602  * containing more mappings.
 603  *
 604  * Returns the number of rmap entries before the spte was added or zero if
 605  * the spte was not added.
 606  *
 607  */
 608 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
 609 {
 610         struct kvm_mmu_page *sp;
 611         struct kvm_rmap_desc *desc;
 612         unsigned long *rmapp;
 613         int i, count = 0;
 614
 615         if (!is_rmap_spte(*spte))
 616                 return count;
 617         sp = page_header(__pa(spte));
 618         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
 619         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
 620         if (!*rmapp) {
 621                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
 622                 *rmapp = (unsigned long)spte;
 623         } else if (!(*rmapp & 1)) {
 624                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
 625                 desc = mmu_alloc_rmap_desc(vcpu);
 626                 desc->sptes[0] = (u64 *)*rmapp;
 627                 desc->sptes[1] = spte;
 628                 *rmapp = (unsigned long)desc | 1;
 629         } else {
 630                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
 631                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
 632                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
 633                         desc = desc->more;
 634                         count += RMAP_EXT;
 635                 }
 636                 if (desc->sptes[RMAP_EXT-1]) {
 637                         desc->more = mmu_alloc_rmap_desc(vcpu);
 638                         desc = desc->more;
 639                 }
 640                 for (i = 0; desc->sptes[i]; ++i)
 641                         ;
 642                 desc->sptes[i] = spte;
 643         }
 644         return count;
 645 }
 646
 647 static void rmap_desc_remove_entry(unsigned long *rmapp,
 648                                    struct kvm_rmap_desc *desc,
 649                                    int i,
 650                                    struct kvm_rmap_desc *prev_desc)
 651 {
 652         int j;
 653
 654         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
 655                 ;
 656         desc->sptes[i] = desc->sptes[j];
 657         desc->sptes[j] = NULL;
 658         if (j != 0)
 659                 return;
 660         if (!prev_desc && !desc->more)
 661                 *rmapp = (unsigned long)desc->sptes[0];
 662         else
 663                 if (prev_desc)
 664                         prev_desc->more = desc->more;
 665                 else
 666                         *rmapp = (unsigned long)desc->more | 1;
 667         mmu_free_rmap_desc(desc);
 668 }
 669
 670 static void rmap_remove(struct kvm *kvm, u64 *spte)
 671 {
 672         struct kvm_rmap_desc *desc;
 673         struct kvm_rmap_desc *prev_desc;
 674         struct kvm_mmu_page *sp;
 675         gfn_t gfn;
 676         unsigned long *rmapp;
 677         int i;
 678
 679         sp = page_header(__pa(spte));
 680         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
 681         rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
 682         if (!*rmapp) {
 683                 printk(KERN_ERR "rmap_remove: %p 0->BUG\n", spte);
 684                 BUG();
 685         } else if (!(*rmapp & 1)) {
 686                 rmap_printk("rmap_remove:  %p 1->0\n", spte);
 687                 if ((u64 *)*rmapp != spte) {
 688                         printk(KERN_ERR "rmap_remove:  %p 1->BUG\n", spte);
 689                         BUG();
 690                 }
 691                 *rmapp = 0;
 692         } else {
 693                 rmap_printk("rmap_remove:  %p many->many\n", spte);
 694                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
 695                 prev_desc = NULL;
 696                 while (desc) {
 697                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
 698                                 if (desc->sptes[i] == spte) {
 699                                         rmap_desc_remove_entry(rmapp,
 700                                                                desc, i,
 701                                                                prev_desc);
 702                                         return;
 703                                 }
 704                         prev_desc = desc;
 705                         desc = desc->more;
 706                 }
 707                 pr_err("rmap_remove: %p many->many\n", spte);
 708                 BUG();
 709         }
 710 }
 711
 712 static void set_spte_track_bits(u64 *sptep, u64 new_spte)
 713 {
 714         pfn_t pfn;
 715         u64 old_spte = *sptep;
 716
 717         if (!spte_has_volatile_bits(old_spte))
 718                 __set_spte(sptep, new_spte);
 719         else
 720                 old_spte = __xchg_spte(sptep, new_spte);
 721
 722         if (!is_rmap_spte(old_spte))
 723                 return;
 724
 725         pfn = spte_to_pfn(old_spte);
 726         if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
 727                 kvm_set_pfn_accessed(pfn);
 728         if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
 729                 kvm_set_pfn_dirty(pfn);
 730 }
 731
 732 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
 733 {
 734         set_spte_track_bits(sptep, new_spte);
 735         rmap_remove(kvm, sptep);
 736 }
 737
 738 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
 739 {
 740         struct kvm_rmap_desc *desc;
 741         u64 *prev_spte;
 742         int i;
 743
 744         if (!*rmapp)
 745                 return NULL;
 746         else if (!(*rmapp & 1)) {
 747                 if (!spte)
 748                         return (u64 *)*rmapp;
 749                 return NULL;
 750         }
 751         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
 752         prev_spte = NULL;
 753         while (desc) {
 754                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
 755                         if (prev_spte == spte)
 756                                 return desc->sptes[i];
 757                         prev_spte = desc->sptes[i];
 758                 }
 759                 desc = desc->more;
 760         }
 761         return NULL;
 762 }
 763
 764 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
 765 {
 766         unsigned long *rmapp;
 767         u64 *spte;
 768         int i, write_protected = 0;
 769
 770         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
 771
 772         spte = rmap_next(kvm, rmapp, NULL);
 773         while (spte) {
 774                 BUG_ON(!spte);
 775                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 776                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
 777                 if (is_writable_pte(*spte)) {
 778                         update_spte(spte, *spte & ~PT_WRITABLE_MASK);
 779                         write_protected = 1;
 780                 }
 781                 spte = rmap_next(kvm, rmapp, spte);
 782         }
 783
 784         /* check for huge page mappings */
 785         for (i = PT_DIRECTORY_LEVEL;
 786              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 787                 rmapp = gfn_to_rmap(kvm, gfn, i);
 788                 spte = rmap_next(kvm, rmapp, NULL);
 789                 while (spte) {
 790                         BUG_ON(!spte);
 791                         BUG_ON(!(*spte & PT_PRESENT_MASK));
 792                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
 793                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
 794                         if (is_writable_pte(*spte)) {
 795                                 drop_spte(kvm, spte,
 796                                           shadow_trap_nonpresent_pte);
 797                                 --kvm->stat.lpages;
 798                                 spte = NULL;
 799                                 write_protected = 1;
 800                         }
 801                         spte = rmap_next(kvm, rmapp, spte);
 802                 }
 803         }
 804
 805         return write_protected;
 806 }
 807
 808 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
 809                            unsigned long data)
 810 {
 811         u64 *spte;
 812         int need_tlb_flush = 0;
 813
 814         while ((spte = rmap_next(kvm, rmapp, NULL))) {
 815                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 816                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
 817                 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
 818                 need_tlb_flush = 1;
 819         }
 820         return need_tlb_flush;
 821 }
 822
 823 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
 824                              unsigned long data)
 825 {
 826         int need_flush = 0;
 827         u64 *spte, new_spte;
 828         pte_t *ptep = (pte_t *)data;
 829         pfn_t new_pfn;
 830
 831         WARN_ON(pte_huge(*ptep));
 832         new_pfn = pte_pfn(*ptep);
 833         spte = rmap_next(kvm, rmapp, NULL);
 834         while (spte) {
 835                 BUG_ON(!is_shadow_present_pte(*spte));
 836                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
 837                 need_flush = 1;
 838                 if (pte_write(*ptep)) {
 839                         drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
 840                         spte = rmap_next(kvm, rmapp, NULL);
 841                 } else {
 842                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
 843                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
 844
 845                         new_spte &= ~PT_WRITABLE_MASK;
 846                         new_spte &= ~SPTE_HOST_WRITEABLE;
 847                         new_spte &= ~shadow_accessed_mask;
 848                         set_spte_track_bits(spte, new_spte);
 849                         spte = rmap_next(kvm, rmapp, spte);
 850                 }
 851         }
 852         if (need_flush)
 853                 kvm_flush_remote_tlbs(kvm);
 854
 855         return 0;
 856 }
 857
 858 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
 859                           unsigned long data,
 860                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
 861                                          unsigned long data))
 862 {
 863         int i, j;
 864         int ret;
 865         int retval = 0;
 866         struct kvm_memslots *slots;
 867
 868         slots = kvm_memslots(kvm);
 869
 870         for (i = 0; i < slots->nmemslots; i++) {
 871                 struct kvm_memory_slot *memslot = &slots->memslots[i];
 872                 unsigned long start = memslot->userspace_addr;
 873                 unsigned long end;
 874
 875                 end = start + (memslot->npages << PAGE_SHIFT);
 876                 if (hva >= start && hva < end) {
 877                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
 878
 879                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
 880
 881                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
 882                                 unsigned long idx;
 883                                 int sh;
 884
 885                                 sh = KVM_HPAGE_GFN_SHIFT(PT_DIRECTORY_LEVEL+j);
 886                                 idx = ((memslot->base_gfn+gfn_offset) >> sh) -
 887                                         (memslot->base_gfn >> sh);
 888                                 ret |= handler(kvm,
 889                                         &memslot->lpage_info[j][idx].rmap_pde,
 890                                         data);
 891                         }
 892                         trace_kvm_age_page(hva, memslot, ret);
 893                         retval |= ret;
 894                 }
 895         }
 896
 897         return retval;
 898 }
 899
 900 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
 901 {
 902         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
 903 }
 904
 905 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
 906 {
 907         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
 908 }
 909
 910 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
 911                          unsigned long data)
 912 {
 913         u64 *spte;
 914         int young = 0;
 915
 916         /*
 917          * Emulate the accessed bit for EPT, by checking if this page has
 918          * an EPT mapping, and clearing it if it does. On the next access,
 919          * a new EPT mapping will be established.
 920          * This has some overhead, but not as much as the cost of swapping
 921          * out actively used pages or breaking up actively used hugepages.
 922          */
 923         if (!shadow_accessed_mask)
 924                 return kvm_unmap_rmapp(kvm, rmapp, data);
 925
 926         spte = rmap_next(kvm, rmapp, NULL);
 927         while (spte) {
 928                 int _young;
 929                 u64 _spte = *spte;
 930                 BUG_ON(!(_spte & PT_PRESENT_MASK));
 931                 _young = _spte & PT_ACCESSED_MASK;
 932                 if (_young) {
 933                         young = 1;
 934                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
 935                 }
 936                 spte = rmap_next(kvm, rmapp, spte);
 937         }
 938         return young;
 939 }
 940
 941 #define RMAP_RECYCLE_THRESHOLD 1000
 942
 943 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
 944 {
 945         unsigned long *rmapp;
 946         struct kvm_mmu_page *sp;
 947
 948         sp = page_header(__pa(spte));
 949
 950         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
 951
 952         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
 953         kvm_flush_remote_tlbs(vcpu->kvm);
 954 }
 955
 956 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
 957 {
 958         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
 959 }
 960
 961 #ifdef MMU_DEBUG
 962 static int is_empty_shadow_page(u64 *spt)
 963 {
 964         u64 *pos;
 965         u64 *end;
 966
 967         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
 968                 if (is_shadow_present_pte(*pos)) {
 969                         printk(KERN_ERR "%s: %p %llx\n", __func__,
 970                                pos, *pos);
 971                         return 0;
 972                 }
 973         return 1;
 974 }
 975 #endif
 976
 977 /*
 978  * This value is the sum of all of the kvm instances's
 979  * kvm->arch.n_used_mmu_pages values.  We need a global,
 980  * aggregate version in order to make the slab shrinker
 981  * faster
 982  */
 983 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
 984 {
 985         kvm->arch.n_used_mmu_pages += nr;
 986         percpu_counter_add(&kvm_total_used_mmu_pages, nr);
 987 }
 988
 989 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
 990 {
 991         ASSERT(is_empty_shadow_page(sp->spt));
 992         hlist_del(&sp->hash_link);
 993         list_del(&sp->link);
 994         __free_page(virt_to_page(sp->spt));
 995         if (!sp->role.direct)
 996                 __free_page(virt_to_page(sp->gfns));
 997         kmem_cache_free(mmu_page_header_cache, sp);
 998         kvm_mod_used_mmu_pages(kvm, -1);
 999 }
1000
1001 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1002 {
1003         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1004 }
1005
1006 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1007                                                u64 *parent_pte, int direct)
1008 {
1009         struct kvm_mmu_page *sp;
1010
1011         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
1012         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
1013         if (!direct)
1014                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
1015                                                   PAGE_SIZE);
1016         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1017         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1018         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
1019         sp->multimapped = 0;
1020         sp->parent_pte = parent_pte;
1021         kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1022         return sp;
1023 }
1024
1025 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1026                                     struct kvm_mmu_page *sp, u64 *parent_pte)
1027 {
1028         struct kvm_pte_chain *pte_chain;
1029         struct hlist_node *node;
1030         int i;
1031
1032         if (!parent_pte)
1033                 return;
1034         if (!sp->multimapped) {
1035                 u64 *old = sp->parent_pte;
1036
1037                 if (!old) {
1038                         sp->parent_pte = parent_pte;
1039                         return;
1040                 }
1041                 sp->multimapped = 1;
1042                 pte_chain = mmu_alloc_pte_chain(vcpu);
1043                 INIT_HLIST_HEAD(&sp->parent_ptes);
1044                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1045                 pte_chain->parent_ptes[0] = old;
1046         }
1047         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1048                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1049                         continue;
1050                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1051                         if (!pte_chain->parent_ptes[i]) {
1052                                 pte_chain->parent_ptes[i] = parent_pte;
1053                                 return;
1054                         }
1055         }
1056         pte_chain = mmu_alloc_pte_chain(vcpu);
1057         BUG_ON(!pte_chain);
1058         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1059         pte_chain->parent_ptes[0] = parent_pte;
1060 }
1061
1062 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1063                                        u64 *parent_pte)
1064 {
1065         struct kvm_pte_chain *pte_chain;
1066         struct hlist_node *node;
1067         int i;
1068
1069         if (!sp->multimapped) {
1070                 BUG_ON(sp->parent_pte != parent_pte);
1071                 sp->parent_pte = NULL;
1072                 return;
1073         }
1074         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1075                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1076                         if (!pte_chain->parent_ptes[i])
1077                                 break;
1078                         if (pte_chain->parent_ptes[i] != parent_pte)
1079                                 continue;
1080                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
1081                                 && pte_chain->parent_ptes[i + 1]) {
1082                                 pte_chain->parent_ptes[i]
1083                                         = pte_chain->parent_ptes[i + 1];
1084                                 ++i;
1085                         }
1086                         pte_chain->parent_ptes[i] = NULL;
1087                         if (i == 0) {
1088                                 hlist_del(&pte_chain->link);
1089                                 mmu_free_pte_chain(pte_chain);
1090                                 if (hlist_empty(&sp->parent_ptes)) {
1091                                         sp->multimapped = 0;
1092                                         sp->parent_pte = NULL;
1093                                 }
1094                         }
1095                         return;
1096                 }
1097         BUG();
1098 }
1099
1100 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1101 {
1102         struct kvm_pte_chain *pte_chain;
1103         struct hlist_node *node;
1104         struct kvm_mmu_page *parent_sp;
1105         int i;
1106
1107         if (!sp->multimapped && sp->parent_pte) {
1108                 parent_sp = page_header(__pa(sp->parent_pte));
1109                 fn(parent_sp, sp->parent_pte);
1110                 return;
1111         }
1112
1113         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1114                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1115                         u64 *spte = pte_chain->parent_ptes[i];
1116
1117                         if (!spte)
1118                                 break;
1119                         parent_sp = page_header(__pa(spte));
1120                         fn(parent_sp, spte);
1121                 }
1122 }
1123
1124 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1125 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1126 {
1127         mmu_parent_walk(sp, mark_unsync);
1128 }
1129
1130 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1131 {
1132         unsigned int index;
1133
1134         index = spte - sp->spt;
1135         if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1136                 return;
1137         if (sp->unsync_children++)
1138                 return;
1139         kvm_mmu_mark_parents_unsync(sp);
1140 }
1141
1142 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1143                                     struct kvm_mmu_page *sp)
1144 {
1145         int i;
1146
1147         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1148                 sp->spt[i] = shadow_trap_nonpresent_pte;
1149 }
1150
1151 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1152                                struct kvm_mmu_page *sp, bool clear_unsync)
1153 {
1154         return 1;
1155 }
1156
1157 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1158 {
1159 }
1160
1161 #define KVM_PAGE_ARRAY_NR 16
1162
1163 struct kvm_mmu_pages {
1164         struct mmu_page_and_offset {
1165                 struct kvm_mmu_page *sp;
1166                 unsigned int idx;
1167         } page[KVM_PAGE_ARRAY_NR];
1168         unsigned int nr;
1169 };
1170
1171 #define for_each_unsync_children(bitmap, idx)           \
1172         for (idx = find_first_bit(bitmap, 512);         \
1173              idx < 512;                                 \
1174              idx = find_next_bit(bitmap, 512, idx+1))
1175
1176 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1177                          int idx)
1178 {
1179         int i;
1180
1181         if (sp->unsync)
1182                 for (i=0; i < pvec->nr; i++)
1183                         if (pvec->page[i].sp == sp)
1184                                 return 0;
1185
1186         pvec->page[pvec->nr].sp = sp;
1187         pvec->page[pvec->nr].idx = idx;
1188         pvec->nr++;
1189         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1190 }
1191
1192 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1193                            struct kvm_mmu_pages *pvec)
1194 {
1195         int i, ret, nr_unsync_leaf = 0;
1196
1197         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1198                 struct kvm_mmu_page *child;
1199                 u64 ent = sp->spt[i];
1200
1201                 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1202                         goto clear_child_bitmap;
1203
1204                 child = page_header(ent & PT64_BASE_ADDR_MASK);
1205
1206                 if (child->unsync_children) {
1207                         if (mmu_pages_add(pvec, child, i))
1208                                 return -ENOSPC;
1209
1210                         ret = __mmu_unsync_walk(child, pvec);
1211                         if (!ret)
1212                                 goto clear_child_bitmap;
1213                         else if (ret > 0)
1214                                 nr_unsync_leaf += ret;
1215                         else
1216                                 return ret;
1217                 } else if (child->unsync) {
1218                         nr_unsync_leaf++;
1219                         if (mmu_pages_add(pvec, child, i))
1220                                 return -ENOSPC;
1221                 } else
1222                          goto clear_child_bitmap;
1223
1224                 continue;
1225
1226 clear_child_bitmap:
1227                 __clear_bit(i, sp->unsync_child_bitmap);
1228                 sp->unsync_children--;
1229                 WARN_ON((int)sp->unsync_children < 0);
1230         }
1231
1232
1233         return nr_unsync_leaf;
1234 }
1235
1236 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1237                            struct kvm_mmu_pages *pvec)
1238 {
1239         if (!sp->unsync_children)
1240                 return 0;
1241
1242         mmu_pages_add(pvec, sp, 0);
1243         return __mmu_unsync_walk(sp, pvec);
1244 }
1245
1246 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1247 {
1248         WARN_ON(!sp->unsync);
1249         trace_kvm_mmu_sync_page(sp);
1250         sp->unsync = 0;
1251         --kvm->stat.mmu_unsync;
1252 }
1253
1254 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1255                                     struct list_head *invalid_list);
1256 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1257                                     struct list_head *invalid_list);
1258
1259 #define for_each_gfn_sp(kvm, sp, gfn, pos)                              \
1260   hlist_for_each_entry(sp, pos,                                         \
1261    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1262         if ((sp)->gfn != (gfn)) {} else
1263
1264 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos)               \
1265   hlist_for_each_entry(sp, pos,                                         \
1266    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1267                 if ((sp)->gfn != (gfn) || (sp)->role.direct ||          \
1268                         (sp)->role.invalid) {} else
1269
1270 /* @sp->gfn should be write-protected at the call site */
1271 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1272                            struct list_head *invalid_list, bool clear_unsync)
1273 {
1274         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1275                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1276                 return 1;
1277         }
1278
1279         if (clear_unsync)
1280                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1281
1282         if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1283                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1284                 return 1;
1285         }
1286
1287         kvm_mmu_flush_tlb(vcpu);
1288         return 0;
1289 }
1290
1291 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1292                                    struct kvm_mmu_page *sp)
1293 {
1294         LIST_HEAD(invalid_list);
1295         int ret;
1296
1297         ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1298         if (ret)
1299                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1300
1301         return ret;
1302 }
1303
1304 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1305                          struct list_head *invalid_list)
1306 {
1307         return __kvm_sync_page(vcpu, sp, invalid_list, true);
1308 }
1309
1310 /* @gfn should be write-protected at the call site */
1311 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1312 {
1313         struct kvm_mmu_page *s;
1314         struct hlist_node *node;
1315         LIST_HEAD(invalid_list);
1316         bool flush = false;
1317
1318         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1319                 if (!s->unsync)
1320                         continue;
1321
1322                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1323                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1324                         (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1325                         kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1326                         continue;
1327                 }
1328                 kvm_unlink_unsync_page(vcpu->kvm, s);
1329                 flush = true;
1330         }
1331
1332         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1333         if (flush)
1334                 kvm_mmu_flush_tlb(vcpu);
1335 }
1336
1337 struct mmu_page_path {
1338         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1339         unsigned int idx[PT64_ROOT_LEVEL-1];
1340 };
1341
1342 #define for_each_sp(pvec, sp, parents, i)                       \
1343                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1344                         sp = pvec.page[i].sp;                   \
1345                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1346                         i = mmu_pages_next(&pvec, &parents, i))
1347
1348 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1349                           struct mmu_page_path *parents,
1350                           int i)
1351 {
1352         int n;
1353
1354         for (n = i+1; n < pvec->nr; n++) {
1355                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1356
1357                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1358                         parents->idx[0] = pvec->page[n].idx;
1359                         return n;
1360                 }
1361
1362                 parents->parent[sp->role.level-2] = sp;
1363                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1364         }
1365
1366         return n;
1367 }
1368
1369 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1370 {
1371         struct kvm_mmu_page *sp;
1372         unsigned int level = 0;
1373
1374         do {
1375                 unsigned int idx = parents->idx[level];
1376
1377                 sp = parents->parent[level];
1378                 if (!sp)
1379                         return;
1380
1381                 --sp->unsync_children;
1382                 WARN_ON((int)sp->unsync_children < 0);
1383                 __clear_bit(idx, sp->unsync_child_bitmap);
1384                 level++;
1385         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1386 }
1387
1388 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1389                                struct mmu_page_path *parents,
1390                                struct kvm_mmu_pages *pvec)
1391 {
1392         parents->parent[parent->role.level-1] = NULL;
1393         pvec->nr = 0;
1394 }
1395
1396 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1397                               struct kvm_mmu_page *parent)
1398 {
1399         int i;
1400         struct kvm_mmu_page *sp;
1401         struct mmu_page_path parents;
1402         struct kvm_mmu_pages pages;
1403         LIST_HEAD(invalid_list);
1404
1405         kvm_mmu_pages_init(parent, &parents, &pages);
1406         while (mmu_unsync_walk(parent, &pages)) {
1407                 int protected = 0;
1408
1409                 for_each_sp(pages, sp, parents, i)
1410                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1411
1412                 if (protected)
1413                         kvm_flush_remote_tlbs(vcpu->kvm);
1414
1415                 for_each_sp(pages, sp, parents, i) {
1416                         kvm_sync_page(vcpu, sp, &invalid_list);
1417                         mmu_pages_clear_parents(&parents);
1418                 }
1419                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1420                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1421                 kvm_mmu_pages_init(parent, &parents, &pages);
1422         }
1423 }
1424
1425 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1426                                              gfn_t gfn,
1427                                              gva_t gaddr,
1428                                              unsigned level,
1429                                              int direct,
1430                                              unsigned access,
1431                                              u64 *parent_pte)
1432 {
1433         union kvm_mmu_page_role role;
1434         unsigned quadrant;
1435         struct kvm_mmu_page *sp;
1436         struct hlist_node *node;
1437         bool need_sync = false;
1438
1439         role = vcpu->arch.mmu.base_role;
1440         role.level = level;
1441         role.direct = direct;
1442         if (role.direct)
1443                 role.cr4_pae = 0;
1444         role.access = access;
1445         if (!tdp_enabled && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1446                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1447                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1448                 role.quadrant = quadrant;
1449         }
1450         for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1451                 if (!need_sync && sp->unsync)
1452                         need_sync = true;
1453
1454                 if (sp->role.word != role.word)
1455                         continue;
1456
1457                 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1458                         break;
1459
1460                 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1461                 if (sp->unsync_children) {
1462                         kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1463                         kvm_mmu_mark_parents_unsync(sp);
1464                 } else if (sp->unsync)
1465                         kvm_mmu_mark_parents_unsync(sp);
1466
1467                 trace_kvm_mmu_get_page(sp, false);
1468                 return sp;
1469         }
1470         ++vcpu->kvm->stat.mmu_cache_miss;
1471         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1472         if (!sp)
1473                 return sp;
1474         sp->gfn = gfn;
1475         sp->role = role;
1476         hlist_add_head(&sp->hash_link,
1477                 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1478         if (!direct) {
1479                 if (rmap_write_protect(vcpu->kvm, gfn))
1480                         kvm_flush_remote_tlbs(vcpu->kvm);
1481                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1482                         kvm_sync_pages(vcpu, gfn);
1483
1484                 account_shadowed(vcpu->kvm, gfn);
1485         }
1486         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1487                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1488         else
1489                 nonpaging_prefetch_page(vcpu, sp);
1490         trace_kvm_mmu_get_page(sp, true);
1491         return sp;
1492 }
1493
1494 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1495                              struct kvm_vcpu *vcpu, u64 addr)
1496 {
1497         iterator->addr = addr;
1498         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1499         iterator->level = vcpu->arch.mmu.shadow_root_level;
1500         if (iterator->level == PT32E_ROOT_LEVEL) {
1501                 iterator->shadow_addr
1502                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1503                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1504                 --iterator->level;
1505                 if (!iterator->shadow_addr)
1506                         iterator->level = 0;
1507         }
1508 }
1509
1510 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1511 {
1512         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1513                 return false;
1514
1515         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1516                 if (is_large_pte(*iterator->sptep))
1517                         return false;
1518
1519         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1520         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1521         return true;
1522 }
1523
1524 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1525 {
1526         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1527         --iterator->level;
1528 }
1529
1530 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1531 {
1532         u64 spte;
1533
1534         spte = __pa(sp->spt)
1535                 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1536                 | PT_WRITABLE_MASK | PT_USER_MASK;
1537         __set_spte(sptep, spte);
1538 }
1539
1540 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1541 {
1542         if (is_large_pte(*sptep)) {
1543                 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1544                 kvm_flush_remote_tlbs(vcpu->kvm);
1545         }
1546 }
1547
1548 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1549                                    unsigned direct_access)
1550 {
1551         if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1552                 struct kvm_mmu_page *child;
1553
1554                 /*
1555                  * For the direct sp, if the guest pte's dirty bit
1556                  * changed form clean to dirty, it will corrupt the
1557                  * sp's access: allow writable in the read-only sp,
1558                  * so we should update the spte at this point to get
1559                  * a new sp with the correct access.
1560                  */
1561                 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1562                 if (child->role.access == direct_access)
1563                         return;
1564
1565                 mmu_page_remove_parent_pte(child, sptep);
1566                 __set_spte(sptep, shadow_trap_nonpresent_pte);
1567                 kvm_flush_remote_tlbs(vcpu->kvm);
1568         }
1569 }
1570
1571 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1572                                          struct kvm_mmu_page *sp)
1573 {
1574         unsigned i;
1575         u64 *pt;
1576         u64 ent;
1577
1578         pt = sp->spt;
1579
1580         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1581                 ent = pt[i];
1582
1583                 if (is_shadow_present_pte(ent)) {
1584                         if (!is_last_spte(ent, sp->role.level)) {
1585                                 ent &= PT64_BASE_ADDR_MASK;
1586                                 mmu_page_remove_parent_pte(page_header(ent),
1587                                                            &pt[i]);
1588                         } else {
1589                                 if (is_large_pte(ent))
1590                                         --kvm->stat.lpages;
1591                                 drop_spte(kvm, &pt[i],
1592                                           shadow_trap_nonpresent_pte);
1593                         }
1594                 }
1595                 pt[i] = shadow_trap_nonpresent_pte;
1596         }
1597 }
1598
1599 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1600 {
1601         mmu_page_remove_parent_pte(sp, parent_pte);
1602 }
1603
1604 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1605 {
1606         int i;
1607         struct kvm_vcpu *vcpu;
1608
1609         kvm_for_each_vcpu(i, vcpu, kvm)
1610                 vcpu->arch.last_pte_updated = NULL;
1611 }
1612
1613 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1614 {
1615         u64 *parent_pte;
1616
1617         while (sp->multimapped || sp->parent_pte) {
1618                 if (!sp->multimapped)
1619                         parent_pte = sp->parent_pte;
1620                 else {
1621                         struct kvm_pte_chain *chain;
1622
1623                         chain = container_of(sp->parent_ptes.first,
1624                                              struct kvm_pte_chain, link);
1625                         parent_pte = chain->parent_ptes[0];
1626                 }
1627                 BUG_ON(!parent_pte);
1628                 kvm_mmu_put_page(sp, parent_pte);
1629                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1630         }
1631 }
1632
1633 static int mmu_zap_unsync_children(struct kvm *kvm,
1634                                    struct kvm_mmu_page *parent,
1635                                    struct list_head *invalid_list)
1636 {
1637         int i, zapped = 0;
1638         struct mmu_page_path parents;
1639         struct kvm_mmu_pages pages;
1640
1641         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1642                 return 0;
1643
1644         kvm_mmu_pages_init(parent, &parents, &pages);
1645         while (mmu_unsync_walk(parent, &pages)) {
1646                 struct kvm_mmu_page *sp;
1647
1648                 for_each_sp(pages, sp, parents, i) {
1649                         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1650                         mmu_pages_clear_parents(&parents);
1651                         zapped++;
1652                 }
1653                 kvm_mmu_pages_init(parent, &parents, &pages);
1654         }
1655
1656         return zapped;
1657 }
1658
1659 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1660                                     struct list_head *invalid_list)
1661 {
1662         int ret;
1663
1664         trace_kvm_mmu_prepare_zap_page(sp);
1665         ++kvm->stat.mmu_shadow_zapped;
1666         ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1667         kvm_mmu_page_unlink_children(kvm, sp);
1668         kvm_mmu_unlink_parents(kvm, sp);
1669         if (!sp->role.invalid && !sp->role.direct)
1670                 unaccount_shadowed(kvm, sp->gfn);
1671         if (sp->unsync)
1672                 kvm_unlink_unsync_page(kvm, sp);
1673         if (!sp->root_count) {
1674                 /* Count self */
1675                 ret++;
1676                 list_move(&sp->link, invalid_list);
1677         } else {
1678                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1679                 kvm_reload_remote_mmus(kvm);
1680         }
1681
1682         sp->role.invalid = 1;
1683         kvm_mmu_reset_last_pte_updated(kvm);
1684         return ret;
1685 }
1686
1687 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1688                                     struct list_head *invalid_list)
1689 {
1690         struct kvm_mmu_page *sp;
1691
1692         if (list_empty(invalid_list))
1693                 return;
1694
1695         kvm_flush_remote_tlbs(kvm);
1696
1697         do {
1698                 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1699                 WARN_ON(!sp->role.invalid || sp->root_count);
1700                 kvm_mmu_free_page(kvm, sp);
1701         } while (!list_empty(invalid_list));
1702
1703 }
1704
1705 /*
1706  * Changing the number of mmu pages allocated to the vm
1707  * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1708  */
1709 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
1710 {
1711         LIST_HEAD(invalid_list);
1712         /*
1713          * If we set the number of mmu pages to be smaller be than the
1714          * number of actived pages , we must to free some mmu pages before we
1715          * change the value
1716          */
1717
1718         if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
1719                 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages &&
1720                         !list_empty(&kvm->arch.active_mmu_pages)) {
1721                         struct kvm_mmu_page *page;
1722
1723                         page = container_of(kvm->arch.active_mmu_pages.prev,
1724                                             struct kvm_mmu_page, link);
1725                         kvm_mmu_prepare_zap_page(kvm, page, &invalid_list);
1726                         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1727                 }
1728                 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
1729         }
1730
1731         kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
1732 }
1733
1734 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1735 {
1736         struct kvm_mmu_page *sp;
1737         struct hlist_node *node;
1738         LIST_HEAD(invalid_list);
1739         int r;
1740
1741         pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
1742         r = 0;
1743
1744         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1745                 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
1746                          sp->role.word);
1747                 r = 1;
1748                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1749         }
1750         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1751         return r;
1752 }
1753
1754 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1755 {
1756         struct kvm_mmu_page *sp;
1757         struct hlist_node *node;
1758         LIST_HEAD(invalid_list);
1759
1760         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1761                 pgprintk("%s: zap %llx %x\n",
1762                          __func__, gfn, sp->role.word);
1763                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1764         }
1765         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1766 }
1767
1768 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1769 {
1770         int slot = memslot_id(kvm, gfn);
1771         struct kvm_mmu_page *sp = page_header(__pa(pte));
1772
1773         __set_bit(slot, sp->slot_bitmap);
1774 }
1775
1776 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1777 {
1778         int i;
1779         u64 *pt = sp->spt;
1780
1781         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1782                 return;
1783
1784         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1785                 if (pt[i] == shadow_notrap_nonpresent_pte)
1786                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1787         }
1788 }
1789
1790 /*
1791  * The function is based on mtrr_type_lookup() in
1792  * arch/x86/kernel/cpu/mtrr/generic.c
1793  */
1794 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1795                          u64 start, u64 end)
1796 {
1797         int i;
1798         u64 base, mask;
1799         u8 prev_match, curr_match;
1800         int num_var_ranges = KVM_NR_VAR_MTRR;
1801
1802         if (!mtrr_state->enabled)
1803                 return 0xFF;
1804
1805         /* Make end inclusive end, instead of exclusive */
1806         end--;
1807
1808         /* Look in fixed ranges. Just return the type as per start */
1809         if (mtrr_state->have_fixed && (start < 0x100000)) {
1810                 int idx;
1811
1812                 if (start < 0x80000) {
1813                         idx = 0;
1814                         idx += (start >> 16);
1815                         return mtrr_state->fixed_ranges[idx];
1816                 } else if (start < 0xC0000) {
1817                         idx = 1 * 8;
1818                         idx += ((start - 0x80000) >> 14);
1819                         return mtrr_state->fixed_ranges[idx];
1820                 } else if (start < 0x1000000) {
1821                         idx = 3 * 8;
1822                         idx += ((start - 0xC0000) >> 12);
1823                         return mtrr_state->fixed_ranges[idx];
1824                 }
1825         }
1826
1827         /*
1828          * Look in variable ranges
1829          * Look of multiple ranges matching this address and pick type
1830          * as per MTRR precedence
1831          */
1832         if (!(mtrr_state->enabled & 2))
1833                 return mtrr_state->def_type;
1834
1835         prev_match = 0xFF;
1836         for (i = 0; i < num_var_ranges; ++i) {
1837                 unsigned short start_state, end_state;
1838
1839                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1840                         continue;
1841
1842                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1843                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1844                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1845                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1846
1847                 start_state = ((start & mask) == (base & mask));
1848                 end_state = ((end & mask) == (base & mask));
1849                 if (start_state != end_state)
1850                         return 0xFE;
1851
1852                 if ((start & mask) != (base & mask))
1853                         continue;
1854
1855                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1856                 if (prev_match == 0xFF) {
1857                         prev_match = curr_match;
1858                         continue;
1859                 }
1860
1861                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1862                     curr_match == MTRR_TYPE_UNCACHABLE)
1863                         return MTRR_TYPE_UNCACHABLE;
1864
1865                 if ((prev_match == MTRR_TYPE_WRBACK &&
1866                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1867                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1868                      curr_match == MTRR_TYPE_WRBACK)) {
1869                         prev_match = MTRR_TYPE_WRTHROUGH;
1870                         curr_match = MTRR_TYPE_WRTHROUGH;
1871                 }
1872
1873                 if (prev_match != curr_match)
1874                         return MTRR_TYPE_UNCACHABLE;
1875         }
1876
1877         if (prev_match != 0xFF)
1878                 return prev_match;
1879
1880         return mtrr_state->def_type;
1881 }
1882
1883 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1884 {
1885         u8 mtrr;
1886
1887         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1888                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1889         if (mtrr == 0xfe || mtrr == 0xff)
1890                 mtrr = MTRR_TYPE_WRBACK;
1891         return mtrr;
1892 }
1893 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1894
1895 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1896 {
1897         trace_kvm_mmu_unsync_page(sp);
1898         ++vcpu->kvm->stat.mmu_unsync;
1899         sp->unsync = 1;
1900
1901         kvm_mmu_mark_parents_unsync(sp);
1902         mmu_convert_notrap(sp);
1903 }
1904
1905 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1906 {
1907         struct kvm_mmu_page *s;
1908         struct hlist_node *node;
1909
1910         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1911                 if (s->unsync)
1912                         continue;
1913                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1914                 __kvm_unsync_page(vcpu, s);
1915         }
1916 }
1917
1918 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1919                                   bool can_unsync)
1920 {
1921         struct kvm_mmu_page *s;
1922         struct hlist_node *node;
1923         bool need_unsync = false;
1924
1925         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1926                 if (!can_unsync)
1927                         return 1;
1928
1929                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1930                         return 1;
1931
1932                 if (!need_unsync && !s->unsync) {
1933                         if (!oos_shadow)
1934                                 return 1;
1935                         need_unsync = true;
1936                 }
1937         }
1938         if (need_unsync)
1939                 kvm_unsync_pages(vcpu, gfn);
1940         return 0;
1941 }
1942
1943 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1944                     unsigned pte_access, int user_fault,
1945                     int write_fault, int dirty, int level,
1946                     gfn_t gfn, pfn_t pfn, bool speculative,
1947                     bool can_unsync, bool reset_host_protection)
1948 {
1949         u64 spte;
1950         int ret = 0;
1951
1952         /*
1953          * We don't set the accessed bit, since we sometimes want to see
1954          * whether the guest actually used the pte (in order to detect
1955          * demand paging).
1956          */
1957         spte = shadow_base_present_pte;
1958         if (!speculative)
1959                 spte |= shadow_accessed_mask;
1960         if (!dirty)
1961                 pte_access &= ~ACC_WRITE_MASK;
1962         if (pte_access & ACC_EXEC_MASK)
1963                 spte |= shadow_x_mask;
1964         else
1965                 spte |= shadow_nx_mask;
1966         if (pte_access & ACC_USER_MASK)
1967                 spte |= shadow_user_mask;
1968         if (level > PT_PAGE_TABLE_LEVEL)
1969                 spte |= PT_PAGE_SIZE_MASK;
1970         if (tdp_enabled)
1971                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1972                         kvm_is_mmio_pfn(pfn));
1973
1974         if (reset_host_protection)
1975                 spte |= SPTE_HOST_WRITEABLE;
1976
1977         spte |= (u64)pfn << PAGE_SHIFT;
1978
1979         if ((pte_access & ACC_WRITE_MASK)
1980             || (!tdp_enabled && write_fault && !is_write_protection(vcpu)
1981                 && !user_fault)) {
1982
1983                 if (level > PT_PAGE_TABLE_LEVEL &&
1984                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1985                         ret = 1;
1986                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1987                         goto done;
1988                 }
1989
1990                 spte |= PT_WRITABLE_MASK;
1991
1992                 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1993                         spte &= ~PT_USER_MASK;
1994
1995                 /*
1996                  * Optimization: for pte sync, if spte was writable the hash
1997                  * lookup is unnecessary (and expensive). Write protection
1998                  * is responsibility of mmu_get_page / kvm_sync_page.
1999                  * Same reasoning can be applied to dirty page accounting.
2000                  */
2001                 if (!can_unsync && is_writable_pte(*sptep))
2002                         goto set_pte;
2003
2004                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2005                         pgprintk("%s: found shadow page for %llx, marking ro\n",
2006                                  __func__, gfn);
2007                         ret = 1;
2008                         pte_access &= ~ACC_WRITE_MASK;
2009                         if (is_writable_pte(spte))
2010                                 spte &= ~PT_WRITABLE_MASK;
2011                 }
2012         }
2013
2014         if (pte_access & ACC_WRITE_MASK)
2015                 mark_page_dirty(vcpu->kvm, gfn);
2016
2017 set_pte:
2018         update_spte(sptep, spte);
2019 done:
2020         return ret;
2021 }
2022
2023 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2024                          unsigned pt_access, unsigned pte_access,
2025                          int user_fault, int write_fault, int dirty,
2026                          int *ptwrite, int level, gfn_t gfn,
2027                          pfn_t pfn, bool speculative,
2028                          bool reset_host_protection)
2029 {
2030         int was_rmapped = 0;
2031         int rmap_count;
2032
2033         pgprintk("%s: spte %llx access %x write_fault %d"
2034                  " user_fault %d gfn %llx\n",
2035                  __func__, *sptep, pt_access,
2036                  write_fault, user_fault, gfn);
2037
2038         if (is_rmap_spte(*sptep)) {
2039                 /*
2040                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2041                  * the parent of the now unreachable PTE.
2042                  */
2043                 if (level > PT_PAGE_TABLE_LEVEL &&
2044                     !is_large_pte(*sptep)) {
2045                         struct kvm_mmu_page *child;
2046                         u64 pte = *sptep;
2047
2048                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2049                         mmu_page_remove_parent_pte(child, sptep);
2050                         __set_spte(sptep, shadow_trap_nonpresent_pte);
2051                         kvm_flush_remote_tlbs(vcpu->kvm);
2052                 } else if (pfn != spte_to_pfn(*sptep)) {
2053                         pgprintk("hfn old %llx new %llx\n",
2054                                  spte_to_pfn(*sptep), pfn);
2055                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2056                         kvm_flush_remote_tlbs(vcpu->kvm);
2057                 } else
2058                         was_rmapped = 1;
2059         }
2060
2061         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2062                       dirty, level, gfn, pfn, speculative, true,
2063                       reset_host_protection)) {
2064                 if (write_fault)
2065                         *ptwrite = 1;
2066                 kvm_mmu_flush_tlb(vcpu);
2067         }
2068
2069         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2070         pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2071                  is_large_pte(*sptep)? "2MB" : "4kB",
2072                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2073                  *sptep, sptep);
2074         if (!was_rmapped && is_large_pte(*sptep))
2075                 ++vcpu->kvm->stat.lpages;
2076
2077         page_header_update_slot(vcpu->kvm, sptep, gfn);
2078         if (!was_rmapped) {
2079                 rmap_count = rmap_add(vcpu, sptep, gfn);
2080                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2081                         rmap_recycle(vcpu, sptep, gfn);
2082         }
2083         kvm_release_pfn_clean(pfn);
2084         if (speculative) {
2085                 vcpu->arch.last_pte_updated = sptep;
2086                 vcpu->arch.last_pte_gfn = gfn;
2087         }
2088 }
2089
2090 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2091 {
2092 }
2093
2094 static struct kvm_memory_slot *
2095 pte_prefetch_gfn_to_memslot(struct kvm_vcpu *vcpu, gfn_t gfn, bool no_dirty_log)
2096 {
2097         struct kvm_memory_slot *slot;
2098
2099         slot = gfn_to_memslot(vcpu->kvm, gfn);
2100         if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
2101               (no_dirty_log && slot->dirty_bitmap))
2102                 slot = NULL;
2103
2104         return slot;
2105 }
2106
2107 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2108                                      bool no_dirty_log)
2109 {
2110         struct kvm_memory_slot *slot;
2111         unsigned long hva;
2112
2113         slot = pte_prefetch_gfn_to_memslot(vcpu, gfn, no_dirty_log);
2114         if (!slot) {
2115                 get_page(bad_page);
2116                 return page_to_pfn(bad_page);
2117         }
2118
2119         hva = gfn_to_hva_memslot(slot, gfn);
2120
2121         return hva_to_pfn_atomic(vcpu->kvm, hva);
2122 }
2123
2124 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2125                                     struct kvm_mmu_page *sp,
2126                                     u64 *start, u64 *end)
2127 {
2128         struct page *pages[PTE_PREFETCH_NUM];
2129         unsigned access = sp->role.access;
2130         int i, ret;
2131         gfn_t gfn;
2132
2133         gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2134         if (!pte_prefetch_gfn_to_memslot(vcpu, gfn, access & ACC_WRITE_MASK))
2135                 return -1;
2136
2137         ret = gfn_to_page_many_atomic(vcpu->kvm, gfn, pages, end - start);
2138         if (ret <= 0)
2139                 return -1;
2140
2141         for (i = 0; i < ret; i++, gfn++, start++)
2142                 mmu_set_spte(vcpu, start, ACC_ALL,
2143                              access, 0, 0, 1, NULL,
2144                              sp->role.level, gfn,
2145                              page_to_pfn(pages[i]), true, true);
2146
2147         return 0;
2148 }
2149
2150 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2151                                   struct kvm_mmu_page *sp, u64 *sptep)
2152 {
2153         u64 *spte, *start = NULL;
2154         int i;
2155
2156         WARN_ON(!sp->role.direct);
2157
2158         i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2159         spte = sp->spt + i;
2160
2161         for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2162                 if (*spte != shadow_trap_nonpresent_pte || spte == sptep) {
2163                         if (!start)
2164                                 continue;
2165                         if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2166                                 break;
2167                         start = NULL;
2168                 } else if (!start)
2169                         start = spte;
2170         }
2171 }
2172
2173 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2174 {
2175         struct kvm_mmu_page *sp;
2176
2177         /*
2178          * Since it's no accessed bit on EPT, it's no way to
2179          * distinguish between actually accessed translations
2180          * and prefetched, so disable pte prefetch if EPT is
2181          * enabled.
2182          */
2183         if (!shadow_accessed_mask)
2184                 return;
2185
2186         sp = page_header(__pa(sptep));
2187         if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2188                 return;
2189
2190         __direct_pte_prefetch(vcpu, sp, sptep);
2191 }
2192
2193 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2194                         int level, gfn_t gfn, pfn_t pfn)
2195 {
2196         struct kvm_shadow_walk_iterator iterator;
2197         struct kvm_mmu_page *sp;
2198         int pt_write = 0;
2199         gfn_t pseudo_gfn;
2200
2201         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2202                 if (iterator.level == level) {
2203                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2204                                      0, write, 1, &pt_write,
2205                                      level, gfn, pfn, false, true);
2206                         direct_pte_prefetch(vcpu, iterator.sptep);
2207                         ++vcpu->stat.pf_fixed;
2208                         break;
2209                 }
2210
2211                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2212                         u64 base_addr = iterator.addr;
2213
2214                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2215                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2216                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2217                                               iterator.level - 1,
2218                                               1, ACC_ALL, iterator.sptep);
2219                         if (!sp) {
2220                                 pgprintk("nonpaging_map: ENOMEM\n");
2221                                 kvm_release_pfn_clean(pfn);
2222                                 return -ENOMEM;
2223                         }
2224
2225                         __set_spte(iterator.sptep,
2226                                    __pa(sp->spt)
2227                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
2228                                    | shadow_user_mask | shadow_x_mask);
2229                 }
2230         }
2231         return pt_write;
2232 }
2233
2234 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2235 {
2236         char buf[1];
2237         void __user *hva;
2238         int r;
2239
2240         /* Touch the page, so send SIGBUS */
2241         hva = (void __user *)gfn_to_hva(kvm, gfn);
2242         r = copy_from_user(buf, hva, 1);
2243 }
2244
2245 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2246 {
2247         kvm_release_pfn_clean(pfn);
2248         if (is_hwpoison_pfn(pfn)) {
2249                 kvm_send_hwpoison_signal(kvm, gfn);
2250                 return 0;
2251         } else if (is_fault_pfn(pfn))
2252                 return -EFAULT;
2253
2254         return 1;
2255 }
2256
2257 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2258 {
2259         int r;
2260         int level;
2261         pfn_t pfn;
2262         unsigned long mmu_seq;
2263
2264         level = mapping_level(vcpu, gfn);
2265
2266         /*
2267          * This path builds a PAE pagetable - so we can map 2mb pages at
2268          * maximum. Therefore check if the level is larger than that.
2269          */
2270         if (level > PT_DIRECTORY_LEVEL)
2271                 level = PT_DIRECTORY_LEVEL;
2272
2273         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2274
2275         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2276         smp_rmb();
2277         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2278
2279         /* mmio */
2280         if (is_error_pfn(pfn))
2281                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2282
2283         spin_lock(&vcpu->kvm->mmu_lock);
2284         if (mmu_notifier_retry(vcpu, mmu_seq))
2285                 goto out_unlock;
2286         kvm_mmu_free_some_pages(vcpu);
2287         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2288         spin_unlock(&vcpu->kvm->mmu_lock);
2289
2290
2291         return r;
2292
2293 out_unlock:
2294         spin_unlock(&vcpu->kvm->mmu_lock);
2295         kvm_release_pfn_clean(pfn);
2296         return 0;
2297 }
2298
2299
2300 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2301 {
2302         int i;
2303         struct kvm_mmu_page *sp;
2304         LIST_HEAD(invalid_list);
2305
2306         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2307                 return;
2308         spin_lock(&vcpu->kvm->mmu_lock);
2309         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2310                 hpa_t root = vcpu->arch.mmu.root_hpa;
2311
2312                 sp = page_header(root);
2313                 --sp->root_count;
2314                 if (!sp->root_count && sp->role.invalid) {
2315                         kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2316                         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2317                 }
2318                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2319                 spin_unlock(&vcpu->kvm->mmu_lock);
2320                 return;
2321         }
2322         for (i = 0; i < 4; ++i) {
2323                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2324
2325                 if (root) {
2326                         root &= PT64_BASE_ADDR_MASK;
2327                         sp = page_header(root);
2328                         --sp->root_count;
2329                         if (!sp->root_count && sp->role.invalid)
2330                                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2331                                                          &invalid_list);
2332                 }
2333                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2334         }
2335         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2336         spin_unlock(&vcpu->kvm->mmu_lock);
2337         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2338 }
2339
2340 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2341 {
2342         int ret = 0;
2343
2344         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2345                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2346                 ret = 1;
2347         }
2348
2349         return ret;
2350 }
2351
2352 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2353 {
2354         int i;
2355         gfn_t root_gfn;
2356         struct kvm_mmu_page *sp;
2357         int direct = 0;
2358         u64 pdptr;
2359
2360         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2361
2362         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2363                 hpa_t root = vcpu->arch.mmu.root_hpa;
2364
2365                 ASSERT(!VALID_PAGE(root));
2366                 if (mmu_check_root(vcpu, root_gfn))
2367                         return 1;
2368                 if (tdp_enabled) {
2369                         direct = 1;
2370                         root_gfn = 0;
2371                 }
2372                 spin_lock(&vcpu->kvm->mmu_lock);
2373                 kvm_mmu_free_some_pages(vcpu);
2374                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2375                                       PT64_ROOT_LEVEL, direct,
2376                                       ACC_ALL, NULL);
2377                 root = __pa(sp->spt);
2378                 ++sp->root_count;
2379                 spin_unlock(&vcpu->kvm->mmu_lock);
2380                 vcpu->arch.mmu.root_hpa = root;
2381                 return 0;
2382         }
2383         direct = !is_paging(vcpu);
2384         for (i = 0; i < 4; ++i) {
2385                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2386
2387                 ASSERT(!VALID_PAGE(root));
2388                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2389                         pdptr = kvm_pdptr_read(vcpu, i);
2390                         if (!is_present_gpte(pdptr)) {
2391                                 vcpu->arch.mmu.pae_root[i] = 0;
2392                                 continue;
2393                         }
2394                         root_gfn = pdptr >> PAGE_SHIFT;
2395                 } else if (vcpu->arch.mmu.root_level == 0)
2396                         root_gfn = 0;
2397                 if (mmu_check_root(vcpu, root_gfn))
2398                         return 1;
2399                 if (tdp_enabled) {
2400                         direct = 1;
2401                         root_gfn = i << 30;
2402                 }
2403                 spin_lock(&vcpu->kvm->mmu_lock);
2404                 kvm_mmu_free_some_pages(vcpu);
2405                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2406                                       PT32_ROOT_LEVEL, direct,
2407                                       ACC_ALL, NULL);
2408                 root = __pa(sp->spt);
2409                 ++sp->root_count;
2410                 spin_unlock(&vcpu->kvm->mmu_lock);
2411
2412                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2413         }
2414         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2415         return 0;
2416 }
2417
2418 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2419 {
2420         int i;
2421         struct kvm_mmu_page *sp;
2422
2423         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2424                 return;
2425         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2426                 hpa_t root = vcpu->arch.mmu.root_hpa;
2427                 sp = page_header(root);
2428                 mmu_sync_children(vcpu, sp);
2429                 return;
2430         }
2431         for (i = 0; i < 4; ++i) {
2432                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2433
2434                 if (root && VALID_PAGE(root)) {
2435                         root &= PT64_BASE_ADDR_MASK;
2436                         sp = page_header(root);
2437                         mmu_sync_children(vcpu, sp);
2438                 }
2439         }
2440 }
2441
2442 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2443 {
2444         spin_lock(&vcpu->kvm->mmu_lock);
2445         mmu_sync_roots(vcpu);
2446         spin_unlock(&vcpu->kvm->mmu_lock);
2447 }
2448
2449 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2450                                   u32 access, u32 *error)
2451 {
2452         if (error)
2453                 *error = 0;
2454         return vaddr;
2455 }
2456
2457 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2458                                 u32 error_code)
2459 {
2460         gfn_t gfn;
2461         int r;
2462
2463         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2464         r = mmu_topup_memory_caches(vcpu);
2465         if (r)
2466                 return r;
2467
2468         ASSERT(vcpu);
2469         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2470
2471         gfn = gva >> PAGE_SHIFT;
2472
2473         return nonpaging_map(vcpu, gva & PAGE_MASK,
2474                              error_code & PFERR_WRITE_MASK, gfn);
2475 }
2476
2477 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2478                                 u32 error_code)
2479 {
2480         pfn_t pfn;
2481         int r;
2482         int level;
2483         gfn_t gfn = gpa >> PAGE_SHIFT;
2484         unsigned long mmu_seq;
2485
2486         ASSERT(vcpu);
2487         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2488
2489         r = mmu_topup_memory_caches(vcpu);
2490         if (r)
2491                 return r;
2492
2493         level = mapping_level(vcpu, gfn);
2494
2495         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2496
2497         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2498         smp_rmb();
2499         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2500         if (is_error_pfn(pfn))
2501                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2502         spin_lock(&vcpu->kvm->mmu_lock);
2503         if (mmu_notifier_retry(vcpu, mmu_seq))
2504                 goto out_unlock;
2505         kvm_mmu_free_some_pages(vcpu);
2506         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2507                          level, gfn, pfn);
2508         spin_unlock(&vcpu->kvm->mmu_lock);
2509
2510         return r;
2511
2512 out_unlock:
2513         spin_unlock(&vcpu->kvm->mmu_lock);
2514         kvm_release_pfn_clean(pfn);
2515         return 0;
2516 }
2517
2518 static void nonpaging_free(struct kvm_vcpu *vcpu)
2519 {
2520         mmu_free_roots(vcpu);
2521 }
2522
2523 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2524 {
2525         struct kvm_mmu *context = &vcpu->arch.mmu;
2526
2527         context->new_cr3 = nonpaging_new_cr3;
2528         context->page_fault = nonpaging_page_fault;
2529         context->gva_to_gpa = nonpaging_gva_to_gpa;
2530         context->free = nonpaging_free;
2531         context->prefetch_page = nonpaging_prefetch_page;
2532         context->sync_page = nonpaging_sync_page;
2533         context->invlpg = nonpaging_invlpg;
2534         context->root_level = 0;
2535         context->shadow_root_level = PT32E_ROOT_LEVEL;
2536         context->root_hpa = INVALID_PAGE;
2537         return 0;
2538 }
2539
2540 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2541 {
2542         ++vcpu->stat.tlb_flush;
2543         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2544 }
2545
2546 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2547 {
2548         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2549         mmu_free_roots(vcpu);
2550 }
2551
2552 static void inject_page_fault(struct kvm_vcpu *vcpu,
2553                               u64 addr,
2554                               u32 err_code)
2555 {
2556         kvm_inject_page_fault(vcpu, addr, err_code);
2557 }
2558
2559 static void paging_free(struct kvm_vcpu *vcpu)
2560 {
2561         nonpaging_free(vcpu);
2562 }
2563
2564 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2565 {
2566         int bit7;
2567
2568         bit7 = (gpte >> 7) & 1;
2569         return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2570 }
2571
2572 #define PTTYPE 64
2573 #include "paging_tmpl.h"
2574 #undef PTTYPE
2575
2576 #define PTTYPE 32
2577 #include "paging_tmpl.h"
2578 #undef PTTYPE
2579
2580 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2581 {
2582         struct kvm_mmu *context = &vcpu->arch.mmu;
2583         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2584         u64 exb_bit_rsvd = 0;
2585
2586         if (!is_nx(vcpu))
2587                 exb_bit_rsvd = rsvd_bits(63, 63);
2588         switch (level) {
2589         case PT32_ROOT_LEVEL:
2590                 /* no rsvd bits for 2 level 4K page table entries */
2591                 context->rsvd_bits_mask[0][1] = 0;
2592                 context->rsvd_bits_mask[0][0] = 0;
2593                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2594
2595                 if (!is_pse(vcpu)) {
2596                         context->rsvd_bits_mask[1][1] = 0;
2597                         break;
2598                 }
2599
2600                 if (is_cpuid_PSE36())
2601                         /* 36bits PSE 4MB page */
2602                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2603                 else
2604                         /* 32 bits PSE 4MB page */
2605                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2606                 break;
2607         case PT32E_ROOT_LEVEL:
2608                 context->rsvd_bits_mask[0][2] =
2609                         rsvd_bits(maxphyaddr, 63) |
2610                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2611                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2612                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2613                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2614                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2615                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2616                         rsvd_bits(maxphyaddr, 62) |
2617                         rsvd_bits(13, 20);              /* large page */
2618                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2619                 break;
2620         case PT64_ROOT_LEVEL:
2621                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2622                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2623                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2624                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2625                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2626                         rsvd_bits(maxphyaddr, 51);
2627                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2628                         rsvd_bits(maxphyaddr, 51);
2629                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2630                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2631                         rsvd_bits(maxphyaddr, 51) |
2632                         rsvd_bits(13, 29);
2633                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2634                         rsvd_bits(maxphyaddr, 51) |
2635                         rsvd_bits(13, 20);              /* large page */
2636                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2637                 break;
2638         }
2639 }
2640
2641 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2642 {
2643         struct kvm_mmu *context = &vcpu->arch.mmu;
2644
2645         ASSERT(is_pae(vcpu));
2646         context->new_cr3 = paging_new_cr3;
2647         context->page_fault = paging64_page_fault;
2648         context->gva_to_gpa = paging64_gva_to_gpa;
2649         context->prefetch_page = paging64_prefetch_page;
2650         context->sync_page = paging64_sync_page;
2651         context->invlpg = paging64_invlpg;
2652         context->free = paging_free;
2653         context->root_level = level;
2654         context->shadow_root_level = level;
2655         context->root_hpa = INVALID_PAGE;
2656         return 0;
2657 }
2658
2659 static int paging64_init_context(struct kvm_vcpu *vcpu)
2660 {
2661         reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2662         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2663 }
2664
2665 static int paging32_init_context(struct kvm_vcpu *vcpu)
2666 {
2667         struct kvm_mmu *context = &vcpu->arch.mmu;
2668
2669         reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2670         context->new_cr3 = paging_new_cr3;
2671         context->page_fault = paging32_page_fault;
2672         context->gva_to_gpa = paging32_gva_to_gpa;
2673         context->free = paging_free;
2674         context->prefetch_page = paging32_prefetch_page;
2675         context->sync_page = paging32_sync_page;
2676         context->invlpg = paging32_invlpg;
2677         context->root_level = PT32_ROOT_LEVEL;
2678         context->shadow_root_level = PT32E_ROOT_LEVEL;
2679         context->root_hpa = INVALID_PAGE;
2680         return 0;
2681 }
2682
2683 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2684 {
2685         reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2686         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2687 }
2688
2689 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2690 {
2691         struct kvm_mmu *context = &vcpu->arch.mmu;
2692
2693         context->new_cr3 = nonpaging_new_cr3;
2694         context->page_fault = tdp_page_fault;
2695         context->free = nonpaging_free;
2696         context->prefetch_page = nonpaging_prefetch_page;
2697         context->sync_page = nonpaging_sync_page;
2698         context->invlpg = nonpaging_invlpg;
2699         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2700         context->root_hpa = INVALID_PAGE;
2701
2702         if (!is_paging(vcpu)) {
2703                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2704                 context->root_level = 0;
2705         } else if (is_long_mode(vcpu)) {
2706                 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2707                 context->gva_to_gpa = paging64_gva_to_gpa;
2708                 context->root_level = PT64_ROOT_LEVEL;
2709         } else if (is_pae(vcpu)) {
2710                 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2711                 context->gva_to_gpa = paging64_gva_to_gpa;
2712                 context->root_level = PT32E_ROOT_LEVEL;
2713         } else {
2714                 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2715                 context->gva_to_gpa = paging32_gva_to_gpa;
2716                 context->root_level = PT32_ROOT_LEVEL;
2717         }
2718
2719         return 0;
2720 }
2721
2722 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2723 {
2724         int r;
2725
2726         ASSERT(vcpu);
2727         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2728
2729         if (!is_paging(vcpu))
2730                 r = nonpaging_init_context(vcpu);
2731         else if (is_long_mode(vcpu))
2732                 r = paging64_init_context(vcpu);
2733         else if (is_pae(vcpu))
2734                 r = paging32E_init_context(vcpu);
2735         else
2736                 r = paging32_init_context(vcpu);
2737
2738         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2739         vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2740
2741         return r;
2742 }
2743
2744 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2745 {
2746         vcpu->arch.update_pte.pfn = bad_pfn;
2747
2748         if (tdp_enabled)
2749                 return init_kvm_tdp_mmu(vcpu);
2750         else
2751                 return init_kvm_softmmu(vcpu);
2752 }
2753
2754 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2755 {
2756         ASSERT(vcpu);
2757         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2758                 /* mmu.free() should set root_hpa = INVALID_PAGE */
2759                 vcpu->arch.mmu.free(vcpu);
2760 }
2761
2762 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2763 {
2764         destroy_kvm_mmu(vcpu);
2765         return init_kvm_mmu(vcpu);
2766 }
2767 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2768
2769 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2770 {
2771         int r;
2772
2773         r = mmu_topup_memory_caches(vcpu);
2774         if (r)
2775                 goto out;
2776         r = mmu_alloc_roots(vcpu);
2777         spin_lock(&vcpu->kvm->mmu_lock);
2778         mmu_sync_roots(vcpu);
2779         spin_unlock(&vcpu->kvm->mmu_lock);
2780         if (r)
2781                 goto out;
2782         /* set_cr3() should ensure TLB has been flushed */
2783         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2784 out:
2785         return r;
2786 }
2787 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2788
2789 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2790 {
2791         mmu_free_roots(vcpu);
2792 }
2793
2794 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2795                                   struct kvm_mmu_page *sp,
2796                                   u64 *spte)
2797 {
2798         u64 pte;
2799         struct kvm_mmu_page *child;
2800
2801         pte = *spte;
2802         if (is_shadow_present_pte(pte)) {
2803                 if (is_last_spte(pte, sp->role.level))
2804                         drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2805                 else {
2806                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2807                         mmu_page_remove_parent_pte(child, spte);
2808                 }
2809         }
2810         __set_spte(spte, shadow_trap_nonpresent_pte);
2811         if (is_large_pte(pte))
2812                 --vcpu->kvm->stat.lpages;
2813 }
2814
2815 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2816                                   struct kvm_mmu_page *sp,
2817                                   u64 *spte,
2818                                   const void *new)
2819 {
2820         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2821                 ++vcpu->kvm->stat.mmu_pde_zapped;
2822                 return;
2823         }
2824
2825         if (is_rsvd_bits_set(vcpu, *(u64 *)new, PT_PAGE_TABLE_LEVEL))
2826                 return;
2827
2828         ++vcpu->kvm->stat.mmu_pte_updated;
2829         if (!sp->role.cr4_pae)
2830                 paging32_update_pte(vcpu, sp, spte, new);
2831         else
2832                 paging64_update_pte(vcpu, sp, spte, new);
2833 }
2834
2835 static bool need_remote_flush(u64 old, u64 new)
2836 {
2837         if (!is_shadow_present_pte(old))
2838                 return false;
2839         if (!is_shadow_present_pte(new))
2840                 return true;
2841         if ((old ^ new) & PT64_BASE_ADDR_MASK)
2842                 return true;
2843         old ^= PT64_NX_MASK;
2844         new ^= PT64_NX_MASK;
2845         return (old & ~new & PT64_PERM_MASK) != 0;
2846 }
2847
2848 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
2849                                     bool remote_flush, bool local_flush)
2850 {
2851         if (zap_page)
2852                 return;
2853
2854         if (remote_flush)
2855                 kvm_flush_remote_tlbs(vcpu->kvm);
2856         else if (local_flush)
2857                 kvm_mmu_flush_tlb(vcpu);
2858 }
2859
2860 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2861 {
2862         u64 *spte = vcpu->arch.last_pte_updated;
2863
2864         return !!(spte && (*spte & shadow_accessed_mask));
2865 }
2866
2867 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2868                                           u64 gpte)
2869 {
2870         gfn_t gfn;
2871         pfn_t pfn;
2872
2873         if (!is_present_gpte(gpte))
2874                 return;
2875         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2876
2877         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2878         smp_rmb();
2879         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2880
2881         if (is_error_pfn(pfn)) {
2882                 kvm_release_pfn_clean(pfn);
2883                 return;
2884         }
2885         vcpu->arch.update_pte.gfn = gfn;
2886         vcpu->arch.update_pte.pfn = pfn;
2887 }
2888
2889 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2890 {
2891         u64 *spte = vcpu->arch.last_pte_updated;
2892
2893         if (spte
2894             && vcpu->arch.last_pte_gfn == gfn
2895             && shadow_accessed_mask
2896             && !(*spte & shadow_accessed_mask)
2897             && is_shadow_present_pte(*spte))
2898                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2899 }
2900
2901 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2902                        const u8 *new, int bytes,
2903                        bool guest_initiated)
2904 {
2905         gfn_t gfn = gpa >> PAGE_SHIFT;
2906         union kvm_mmu_page_role mask = { .word = 0 };
2907         struct kvm_mmu_page *sp;
2908         struct hlist_node *node;
2909         LIST_HEAD(invalid_list);
2910         u64 entry, gentry;
2911         u64 *spte;
2912         unsigned offset = offset_in_page(gpa);
2913         unsigned pte_size;
2914         unsigned page_offset;
2915         unsigned misaligned;
2916         unsigned quadrant;
2917         int level;
2918         int flooded = 0;
2919         int npte;
2920         int r;
2921         int invlpg_counter;
2922         bool remote_flush, local_flush, zap_page;
2923
2924         zap_page = remote_flush = local_flush = false;
2925
2926         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2927
2928         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2929
2930         /*
2931          * Assume that the pte write on a page table of the same type
2932          * as the current vcpu paging mode.  This is nearly always true
2933          * (might be false while changing modes).  Note it is verified later
2934          * by update_pte().
2935          */
2936         if ((is_pae(vcpu) && bytes == 4) || !new) {
2937                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2938                 if (is_pae(vcpu)) {
2939                         gpa &= ~(gpa_t)7;
2940                         bytes = 8;
2941                 }
2942                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2943                 if (r)
2944                         gentry = 0;
2945                 new = (const u8 *)&gentry;
2946         }
2947
2948         switch (bytes) {
2949         case 4:
2950                 gentry = *(const u32 *)new;
2951                 break;
2952         case 8:
2953                 gentry = *(const u64 *)new;
2954                 break;
2955         default:
2956                 gentry = 0;
2957                 break;
2958         }
2959
2960         mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2961         spin_lock(&vcpu->kvm->mmu_lock);
2962         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2963                 gentry = 0;
2964         kvm_mmu_access_page(vcpu, gfn);
2965         kvm_mmu_free_some_pages(vcpu);
2966         ++vcpu->kvm->stat.mmu_pte_write;
2967         kvm_mmu_audit(vcpu, "pre pte write");
2968         if (guest_initiated) {
2969                 if (gfn == vcpu->arch.last_pt_write_gfn
2970                     && !last_updated_pte_accessed(vcpu)) {
2971                         ++vcpu->arch.last_pt_write_count;
2972                         if (vcpu->arch.last_pt_write_count >= 3)
2973                                 flooded = 1;
2974                 } else {
2975                         vcpu->arch.last_pt_write_gfn = gfn;
2976                         vcpu->arch.last_pt_write_count = 1;
2977                         vcpu->arch.last_pte_updated = NULL;
2978                 }
2979         }
2980
2981         mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
2982         for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
2983                 pte_size = sp->role.cr4_pae ? 8 : 4;
2984                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2985                 misaligned |= bytes < 4;
2986                 if (misaligned || flooded) {
2987                         /*
2988                          * Misaligned accesses are too much trouble to fix
2989                          * up; also, they usually indicate a page is not used
2990                          * as a page table.
2991                          *
2992                          * If we're seeing too many writes to a page,
2993                          * it may no longer be a page table, or we may be
2994                          * forking, in which case it is better to unmap the
2995                          * page.
2996                          */
2997                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2998                                  gpa, bytes, sp->role.word);
2999                         zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3000                                                      &invalid_list);
3001                         ++vcpu->kvm->stat.mmu_flooded;
3002                         continue;
3003                 }
3004                 page_offset = offset;
3005                 level = sp->role.level;
3006                 npte = 1;
3007                 if (!sp->role.cr4_pae) {
3008                         page_offset <<= 1;      /* 32->64 */
3009                         /*
3010                          * A 32-bit pde maps 4MB while the shadow pdes map
3011                          * only 2MB.  So we need to double the offset again
3012                          * and zap two pdes instead of one.
3013                          */
3014                         if (level == PT32_ROOT_LEVEL) {
3015                                 page_offset &= ~7; /* kill rounding error */
3016                                 page_offset <<= 1;
3017                                 npte = 2;
3018                         }
3019                         quadrant = page_offset >> PAGE_SHIFT;
3020                         page_offset &= ~PAGE_MASK;
3021                         if (quadrant != sp->role.quadrant)
3022                                 continue;
3023                 }
3024                 local_flush = true;
3025                 spte = &sp->spt[page_offset / sizeof(*spte)];
3026                 while (npte--) {
3027                         entry = *spte;
3028                         mmu_pte_write_zap_pte(vcpu, sp, spte);
3029                         if (gentry &&
3030                               !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
3031                               & mask.word))
3032                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
3033                         if (!remote_flush && need_remote_flush(entry, *spte))
3034                                 remote_flush = true;
3035                         ++spte;
3036                 }
3037         }
3038         mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
3039         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3040         kvm_mmu_audit(vcpu, "post pte write");
3041         spin_unlock(&vcpu->kvm->mmu_lock);
3042         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
3043                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
3044                 vcpu->arch.update_pte.pfn = bad_pfn;
3045         }
3046 }
3047
3048 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
3049 {
3050         gpa_t gpa;
3051         int r;
3052
3053         if (tdp_enabled)
3054                 return 0;
3055
3056         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
3057
3058         spin_lock(&vcpu->kvm->mmu_lock);
3059         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3060         spin_unlock(&vcpu->kvm->mmu_lock);
3061         return r;
3062 }
3063 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
3064
3065 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
3066 {
3067         LIST_HEAD(invalid_list);
3068
3069         while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES &&
3070                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
3071                 struct kvm_mmu_page *sp;
3072
3073                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
3074                                   struct kvm_mmu_page, link);
3075                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3076                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3077                 ++vcpu->kvm->stat.mmu_recycled;
3078         }
3079 }
3080
3081 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
3082 {
3083         int r;
3084         enum emulation_result er;
3085
3086         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3087         if (r < 0)
3088                 goto out;
3089
3090         if (!r) {
3091                 r = 1;
3092                 goto out;
3093         }
3094
3095         r = mmu_topup_memory_caches(vcpu);
3096         if (r)
3097                 goto out;
3098
3099         er = emulate_instruction(vcpu, cr2, error_code, 0);
3100
3101         switch (er) {
3102         case EMULATE_DONE:
3103                 return 1;
3104         case EMULATE_DO_MMIO:
3105                 ++vcpu->stat.mmio_exits;
3106                 /* fall through */
3107         case EMULATE_FAIL:
3108                 return 0;
3109         default:
3110                 BUG();
3111         }
3112 out:
3113         return r;
3114 }
3115 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
3116
3117 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
3118 {
3119         vcpu->arch.mmu.invlpg(vcpu, gva);
3120         kvm_mmu_flush_tlb(vcpu);
3121         ++vcpu->stat.invlpg;
3122 }
3123 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3124
3125 void kvm_enable_tdp(void)
3126 {
3127         tdp_enabled = true;
3128 }
3129 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3130
3131 void kvm_disable_tdp(void)
3132 {
3133         tdp_enabled = false;
3134 }
3135 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3136
3137 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3138 {
3139         free_page((unsigned long)vcpu->arch.mmu.pae_root);
3140 }
3141
3142 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3143 {
3144         struct page *page;
3145         int i;
3146
3147         ASSERT(vcpu);
3148
3149         /*
3150          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3151          * Therefore we need to allocate shadow page tables in the first
3152          * 4GB of memory, which happens to fit the DMA32 zone.
3153          */
3154         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3155         if (!page)
3156                 return -ENOMEM;
3157
3158         vcpu->arch.mmu.pae_root = page_address(page);
3159         for (i = 0; i < 4; ++i)
3160                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3161
3162         return 0;
3163 }
3164
3165 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3166 {
3167         ASSERT(vcpu);
3168         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3169
3170         return alloc_mmu_pages(vcpu);
3171 }
3172
3173 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3174 {
3175         ASSERT(vcpu);
3176         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3177
3178         return init_kvm_mmu(vcpu);
3179 }
3180
3181 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3182 {
3183         ASSERT(vcpu);
3184
3185         destroy_kvm_mmu(vcpu);
3186         free_mmu_pages(vcpu);
3187         mmu_free_memory_caches(vcpu);
3188 }
3189
3190 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3191 {
3192         struct kvm_mmu_page *sp;
3193
3194         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3195                 int i;
3196                 u64 *pt;
3197
3198                 if (!test_bit(slot, sp->slot_bitmap))
3199                         continue;
3200
3201                 pt = sp->spt;
3202                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3203                         /* avoid RMW */
3204                         if (is_writable_pte(pt[i]))
3205                                 pt[i] &= ~PT_WRITABLE_MASK;
3206         }
3207         kvm_flush_remote_tlbs(kvm);
3208 }
3209
3210 void kvm_mmu_zap_all(struct kvm *kvm)
3211 {
3212         struct kvm_mmu_page *sp, *node;
3213         LIST_HEAD(invalid_list);
3214
3215         spin_lock(&kvm->mmu_lock);
3216 restart:
3217         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3218                 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3219                         goto restart;
3220
3221         kvm_mmu_commit_zap_page(kvm, &invalid_list);
3222         spin_unlock(&kvm->mmu_lock);
3223 }
3224
3225 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3226                                                struct list_head *invalid_list)
3227 {
3228         struct kvm_mmu_page *page;
3229
3230         page = container_of(kvm->arch.active_mmu_pages.prev,
3231                             struct kvm_mmu_page, link);
3232         return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3233 }
3234
3235 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3236 {
3237         struct kvm *kvm;
3238         struct kvm *kvm_freed = NULL;
3239
3240         if (nr_to_scan == 0)
3241                 goto out;
3242
3243         spin_lock(&kvm_lock);
3244
3245         list_for_each_entry(kvm, &vm_list, vm_list) {
3246                 int idx, freed_pages;
3247                 LIST_HEAD(invalid_list);
3248
3249                 idx = srcu_read_lock(&kvm->srcu);
3250                 spin_lock(&kvm->mmu_lock);
3251                 if (!kvm_freed && nr_to_scan > 0 &&
3252                     kvm->arch.n_used_mmu_pages > 0) {
3253                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3254                                                           &invalid_list);
3255                         kvm_freed = kvm;
3256                 }
3257                 nr_to_scan--;
3258
3259                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3260                 spin_unlock(&kvm->mmu_lock);
3261                 srcu_read_unlock(&kvm->srcu, idx);
3262         }
3263         if (kvm_freed)
3264                 list_move_tail(&kvm_freed->vm_list, &vm_list);
3265
3266         spin_unlock(&kvm_lock);
3267
3268 out:
3269         return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
3270 }
3271
3272 static struct shrinker mmu_shrinker = {
3273         .shrink = mmu_shrink,
3274         .seeks = DEFAULT_SEEKS * 10,
3275 };
3276
3277 static void mmu_destroy_caches(void)
3278 {
3279         if (pte_chain_cache)
3280                 kmem_cache_destroy(pte_chain_cache);
3281         if (rmap_desc_cache)
3282                 kmem_cache_destroy(rmap_desc_cache);
3283         if (mmu_page_header_cache)
3284                 kmem_cache_destroy(mmu_page_header_cache);
3285 }
3286
3287 void kvm_mmu_module_exit(void)
3288 {
3289         mmu_destroy_caches();
3290         percpu_counter_destroy(&kvm_total_used_mmu_pages);
3291         unregister_shrinker(&mmu_shrinker);
3292 }
3293
3294 int kvm_mmu_module_init(void)
3295 {
3296         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3297                                             sizeof(struct kvm_pte_chain),
3298                                             0, 0, NULL);
3299         if (!pte_chain_cache)
3300                 goto nomem;
3301         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3302                                             sizeof(struct kvm_rmap_desc),
3303                                             0, 0, NULL);
3304         if (!rmap_desc_cache)
3305                 goto nomem;
3306
3307         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3308                                                   sizeof(struct kvm_mmu_page),
3309                                                   0, 0, NULL);
3310         if (!mmu_page_header_cache)
3311                 goto nomem;
3312
3313         if (percpu_counter_init(&kvm_total_used_mmu_pages, 0))
3314                 goto nomem;
3315
3316         register_shrinker(&mmu_shrinker);
3317
3318         return 0;
3319
3320 nomem:
3321         mmu_destroy_caches();
3322         return -ENOMEM;
3323 }
3324
3325 /*
3326  * Caculate mmu pages needed for kvm.
3327  */
3328 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3329 {
3330         int i;
3331         unsigned int nr_mmu_pages;
3332         unsigned int  nr_pages = 0;
3333         struct kvm_memslots *slots;
3334
3335         slots = kvm_memslots(kvm);
3336
3337         for (i = 0; i < slots->nmemslots; i++)
3338                 nr_pages += slots->memslots[i].npages;
3339
3340         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3341         nr_mmu_pages = max(nr_mmu_pages,
3342                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3343
3344         return nr_mmu_pages;
3345 }
3346
3347 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3348                                 unsigned len)
3349 {
3350         if (len > buffer->len)
3351                 return NULL;
3352         return buffer->ptr;
3353 }
3354
3355 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3356                                 unsigned len)
3357 {
3358         void *ret;
3359
3360         ret = pv_mmu_peek_buffer(buffer, len);
3361         if (!ret)
3362                 return ret;
3363         buffer->ptr += len;
3364         buffer->len -= len;
3365         buffer->processed += len;
3366         return ret;
3367 }
3368
3369 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3370                              gpa_t addr, gpa_t value)
3371 {
3372         int bytes = 8;
3373         int r;
3374
3375         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3376                 bytes = 4;
3377
3378         r = mmu_topup_memory_caches(vcpu);
3379         if (r)
3380                 return r;
3381
3382         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3383                 return -EFAULT;
3384
3385         return 1;
3386 }
3387
3388 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3389 {
3390         (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3391         return 1;
3392 }
3393
3394 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3395 {
3396         spin_lock(&vcpu->kvm->mmu_lock);
3397         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3398         spin_unlock(&vcpu->kvm->mmu_lock);
3399         return 1;
3400 }
3401
3402 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3403                              struct kvm_pv_mmu_op_buffer *buffer)
3404 {
3405         struct kvm_mmu_op_header *header;
3406
3407         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3408         if (!header)
3409                 return 0;
3410         switch (header->op) {
3411         case KVM_MMU_OP_WRITE_PTE: {
3412                 struct kvm_mmu_op_write_pte *wpte;
3413
3414                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3415                 if (!wpte)
3416                         return 0;
3417                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3418                                         wpte->pte_val);
3419         }
3420         case KVM_MMU_OP_FLUSH_TLB: {
3421                 struct kvm_mmu_op_flush_tlb *ftlb;
3422
3423                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3424                 if (!ftlb)
3425                         return 0;
3426                 return kvm_pv_mmu_flush_tlb(vcpu);
3427         }
3428         case KVM_MMU_OP_RELEASE_PT: {
3429                 struct kvm_mmu_op_release_pt *rpt;
3430
3431                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3432                 if (!rpt)
3433                         return 0;
3434                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3435         }
3436         default: return 0;
3437         }
3438 }
3439
3440 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3441                   gpa_t addr, unsigned long *ret)
3442 {
3443         int r;
3444         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3445
3446         buffer->ptr = buffer->buf;
3447         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3448         buffer->processed = 0;
3449
3450         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3451         if (r)
3452                 goto out;
3453
3454         while (buffer->len) {
3455                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3456                 if (r < 0)
3457                         goto out;
3458                 if (r == 0)
3459                         break;
3460         }
3461
3462         r = 1;
3463 out:
3464         *ret = buffer->processed;
3465         return r;
3466 }
3467
3468 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3469 {
3470         struct kvm_shadow_walk_iterator iterator;
3471         int nr_sptes = 0;
3472
3473         spin_lock(&vcpu->kvm->mmu_lock);
3474         for_each_shadow_entry(vcpu, addr, iterator) {
3475                 sptes[iterator.level-1] = *iterator.sptep;
3476                 nr_sptes++;
3477                 if (!is_shadow_present_pte(*iterator.sptep))
3478                         break;
3479         }
3480         spin_unlock(&vcpu->kvm->mmu_lock);
3481
3482         return nr_sptes;
3483 }
3484 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3485
3486 #ifdef AUDIT
3487
3488 static const char *audit_msg;
3489
3490 typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3491
3492 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3493                             inspect_spte_fn fn)
3494 {
3495         int i;
3496
3497         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3498                 u64 ent = sp->spt[i];
3499
3500                 if (is_shadow_present_pte(ent)) {
3501                         if (!is_last_spte(ent, sp->role.level)) {
3502                                 struct kvm_mmu_page *child;
3503                                 child = page_header(ent & PT64_BASE_ADDR_MASK);
3504                                 __mmu_spte_walk(kvm, child, fn);
3505                         } else
3506                                 fn(kvm, &sp->spt[i]);
3507                 }
3508         }
3509 }
3510
3511 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3512 {
3513         int i;
3514         struct kvm_mmu_page *sp;
3515
3516         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3517                 return;
3518         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3519                 hpa_t root = vcpu->arch.mmu.root_hpa;
3520                 sp = page_header(root);
3521                 __mmu_spte_walk(vcpu->kvm, sp, fn);
3522                 return;
3523         }
3524         for (i = 0; i < 4; ++i) {
3525                 hpa_t root = vcpu->arch.mmu.pae_root[i];
3526
3527                 if (root && VALID_PAGE(root)) {
3528                         root &= PT64_BASE_ADDR_MASK;
3529                         sp = page_header(root);
3530                         __mmu_spte_walk(vcpu->kvm, sp, fn);
3531                 }
3532         }
3533         return;
3534 }
3535
3536 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3537                                 gva_t va, int level)
3538 {
3539         u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3540         int i;
3541         gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3542
3543         for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3544                 u64 *sptep = pt + i;
3545                 struct kvm_mmu_page *sp;
3546                 gfn_t gfn;
3547                 pfn_t pfn;
3548                 hpa_t hpa;
3549
3550                 sp = page_header(__pa(sptep));
3551
3552                 if (sp->unsync) {
3553                         if (level != PT_PAGE_TABLE_LEVEL) {
3554                                 printk(KERN_ERR "audit: (%s) error: unsync sp: %p level = %d\n",
3555                                                 audit_msg, sp, level);
3556                                 return;
3557                         }
3558
3559                         if (*sptep == shadow_notrap_nonpresent_pte) {
3560                                 printk(KERN_ERR "audit: (%s) error: notrap spte in unsync sp: %p\n",
3561                                                 audit_msg, sp);
3562                                 return;
3563                         }
3564                 }
3565
3566                 if (sp->role.direct && *sptep == shadow_notrap_nonpresent_pte) {
3567                         printk(KERN_ERR "audit: (%s) error: notrap spte in direct sp: %p\n",
3568                                         audit_msg, sp);
3569                         return;
3570                 }
3571
3572                 if (!is_shadow_present_pte(*sptep) ||
3573                       !is_last_spte(*sptep, level))
3574                         return;
3575
3576                 gfn = kvm_mmu_page_get_gfn(sp, sptep - sp->spt);
3577                 pfn = gfn_to_pfn_atomic(vcpu->kvm, gfn);
3578
3579                 if (is_error_pfn(pfn)) {
3580                         kvm_release_pfn_clean(pfn);
3581                         return;
3582                 }
3583
3584                 hpa =  pfn << PAGE_SHIFT;
3585
3586                 if ((*sptep & PT64_BASE_ADDR_MASK) != hpa)
3587                         printk(KERN_ERR "xx audit error: (%s) levels %d"
3588                                            " gva %lx pfn %llx hpa %llx ent %llxn",
3589                                            audit_msg, vcpu->arch.mmu.root_level,
3590                                            va, pfn, hpa, *sptep);
3591         }
3592 }
3593
3594 static void audit_mappings(struct kvm_vcpu *vcpu)
3595 {
3596         unsigned i;
3597
3598         if (vcpu->arch.mmu.root_level == 4)
3599                 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3600         else
3601                 for (i = 0; i < 4; ++i)
3602                         if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3603                                 audit_mappings_page(vcpu,
3604                                                     vcpu->arch.mmu.pae_root[i],
3605                                                     i << 30,
3606                                                     2);
3607 }
3608
3609 static int count_rmaps(struct kvm_vcpu *vcpu)
3610 {
3611         struct kvm *kvm = vcpu->kvm;
3612         struct kvm_memslots *slots;
3613         int nmaps = 0;
3614         int i, j, k, idx;
3615
3616         idx = srcu_read_lock(&kvm->srcu);
3617         slots = kvm_memslots(kvm);
3618         for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3619                 struct kvm_memory_slot *m = &slots->memslots[i];
3620                 struct kvm_rmap_desc *d;
3621
3622                 for (j = 0; j < m->npages; ++j) {
3623                         unsigned long *rmapp = &m->rmap[j];
3624
3625                         if (!*rmapp)
3626                                 continue;
3627                         if (!(*rmapp & 1)) {
3628                                 ++nmaps;
3629                                 continue;
3630                         }
3631                         d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3632                         while (d) {
3633                                 for (k = 0; k < RMAP_EXT; ++k)
3634                                         if (d->sptes[k])
3635                                                 ++nmaps;
3636                                         else
3637                                                 break;
3638                                 d = d->more;
3639                         }
3640                 }
3641         }
3642         srcu_read_unlock(&kvm->srcu, idx);
3643         return nmaps;
3644 }
3645
3646 void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3647 {
3648         unsigned long *rmapp;
3649         struct kvm_mmu_page *rev_sp;
3650         gfn_t gfn;
3651
3652
3653         rev_sp = page_header(__pa(sptep));
3654         gfn = kvm_mmu_page_get_gfn(rev_sp, sptep - rev_sp->spt);
3655
3656         if (!gfn_to_memslot(kvm, gfn)) {
3657                 if (!printk_ratelimit())
3658                         return;
3659                 printk(KERN_ERR "%s: no memslot for gfn %llx\n",
3660                                  audit_msg, gfn);
3661                 printk(KERN_ERR "%s: index %ld of sp (gfn=%llx)\n",
3662                        audit_msg, (long int)(sptep - rev_sp->spt),
3663                                 rev_sp->gfn);
3664                 dump_stack();
3665                 return;
3666         }
3667
3668         rmapp = gfn_to_rmap(kvm, gfn, rev_sp->role.level);
3669         if (!*rmapp) {
3670                 if (!printk_ratelimit())
3671                         return;
3672                 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3673                                  audit_msg, *sptep);
3674                 dump_stack();
3675         }
3676 }
3677
3678 void audit_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3679 {
3680         mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3681 }
3682
3683 static void check_mappings_rmap(struct kvm_vcpu *vcpu)
3684 {
3685         struct kvm_mmu_page *sp;
3686         int i;
3687
3688         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3689                 u64 *pt = sp->spt;
3690
3691                 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3692                         continue;
3693
3694                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3695                         if (!is_rmap_spte(pt[i]))
3696                                 continue;
3697
3698                         inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3699                 }
3700         }
3701         return;
3702 }
3703
3704 static void audit_rmap(struct kvm_vcpu *vcpu)
3705 {
3706         check_mappings_rmap(vcpu);
3707         count_rmaps(vcpu);
3708 }
3709
3710 static void audit_write_protection(struct kvm_vcpu *vcpu)
3711 {
3712         struct kvm_mmu_page *sp;
3713         struct kvm_memory_slot *slot;
3714         unsigned long *rmapp;
3715         u64 *spte;
3716
3717         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3718                 if (sp->role.direct)
3719                         continue;
3720                 if (sp->unsync)
3721                         continue;
3722                 if (sp->role.invalid)
3723                         continue;
3724
3725                 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
3726                 rmapp = &slot->rmap[sp->gfn - slot->base_gfn];
3727
3728                 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3729                 while (spte) {
3730                         if (is_writable_pte(*spte))
3731                                 printk(KERN_ERR "%s: (%s) shadow page has "
3732                                 "writable mappings: gfn %llx role %x\n",
3733                                __func__, audit_msg, sp->gfn,
3734                                sp->role.word);
3735                         spte = rmap_next(vcpu->kvm, rmapp, spte);
3736                 }
3737         }
3738 }
3739
3740 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3741 {
3742         int olddbg = dbg;
3743
3744         dbg = 0;
3745         audit_msg = msg;
3746         audit_rmap(vcpu);
3747         audit_write_protection(vcpu);
3748         if (strcmp("pre pte write", audit_msg) != 0)
3749                 audit_mappings(vcpu);
3750         audit_sptes_have_rmaps(vcpu);
3751         dbg = olddbg;
3752 }
3753
3754 #endif