2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
23 #include <linux/types.h>
24 #include <linux/string.h>
26 #include <linux/highmem.h>
27 #include <linux/module.h>
28 #include <linux/swap.h>
29 #include <linux/hugetlb.h>
30 #include <linux/compiler.h>
33 #include <asm/cmpxchg.h>
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
44 bool tdp_enabled = false;
51 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
53 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
58 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
63 #define pgprintk(x...) do { } while (0)
64 #define rmap_printk(x...) do { } while (0)
68 #if defined(MMU_DEBUG) || defined(AUDIT)
70 module_param(dbg, bool, 0644);
73 static int oos_shadow = 1;
74 module_param(oos_shadow, bool, 0644);
77 #define ASSERT(x) do { } while (0)
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
86 #define PT_FIRST_AVAIL_BITS_SHIFT 9
87 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
89 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
91 #define PT64_LEVEL_BITS 9
93 #define PT64_LEVEL_SHIFT(level) \
94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
96 #define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
99 #define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
103 #define PT32_LEVEL_BITS 10
105 #define PT32_LEVEL_SHIFT(level) \
106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
108 #define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
111 #define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
115 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
116 #define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
119 #define PT32_BASE_ADDR_MASK PAGE_MASK
120 #define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
123 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
126 #define PFERR_PRESENT_MASK (1U << 0)
127 #define PFERR_WRITE_MASK (1U << 1)
128 #define PFERR_USER_MASK (1U << 2)
129 #define PFERR_RSVD_MASK (1U << 3)
130 #define PFERR_FETCH_MASK (1U << 4)
132 #define PT_DIRECTORY_LEVEL 2
133 #define PT_PAGE_TABLE_LEVEL 1
137 #define ACC_EXEC_MASK 1
138 #define ACC_WRITE_MASK PT_WRITABLE_MASK
139 #define ACC_USER_MASK PT_USER_MASK
140 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
142 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
144 struct kvm_rmap_desc {
145 u64 *shadow_ptes[RMAP_EXT];
146 struct kvm_rmap_desc *more;
149 struct kvm_shadow_walk_iterator {
157 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
158 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
159 shadow_walk_okay(&(_walker)); \
160 shadow_walk_next(&(_walker)))
163 struct kvm_unsync_walk {
164 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
167 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
169 static struct kmem_cache *pte_chain_cache;
170 static struct kmem_cache *rmap_desc_cache;
171 static struct kmem_cache *mmu_page_header_cache;
173 static u64 __read_mostly shadow_trap_nonpresent_pte;
174 static u64 __read_mostly shadow_notrap_nonpresent_pte;
175 static u64 __read_mostly shadow_base_present_pte;
176 static u64 __read_mostly shadow_nx_mask;
177 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
178 static u64 __read_mostly shadow_user_mask;
179 static u64 __read_mostly shadow_accessed_mask;
180 static u64 __read_mostly shadow_dirty_mask;
182 static inline u64 rsvd_bits(int s, int e)
184 return ((1ULL << (e - s + 1)) - 1) << s;
187 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
189 shadow_trap_nonpresent_pte = trap_pte;
190 shadow_notrap_nonpresent_pte = notrap_pte;
192 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
194 void kvm_mmu_set_base_ptes(u64 base_pte)
196 shadow_base_present_pte = base_pte;
198 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
200 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
201 u64 dirty_mask, u64 nx_mask, u64 x_mask)
203 shadow_user_mask = user_mask;
204 shadow_accessed_mask = accessed_mask;
205 shadow_dirty_mask = dirty_mask;
206 shadow_nx_mask = nx_mask;
207 shadow_x_mask = x_mask;
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
211 static int is_write_protection(struct kvm_vcpu *vcpu)
213 return vcpu->arch.cr0 & X86_CR0_WP;
216 static int is_cpuid_PSE36(void)
221 static int is_nx(struct kvm_vcpu *vcpu)
223 return vcpu->arch.shadow_efer & EFER_NX;
226 static int is_shadow_present_pte(u64 pte)
228 return pte != shadow_trap_nonpresent_pte
229 && pte != shadow_notrap_nonpresent_pte;
232 static int is_large_pte(u64 pte)
234 return pte & PT_PAGE_SIZE_MASK;
237 static int is_writeble_pte(unsigned long pte)
239 return pte & PT_WRITABLE_MASK;
242 static int is_dirty_pte(unsigned long pte)
244 return pte & shadow_dirty_mask;
247 static int is_rmap_pte(u64 pte)
249 return is_shadow_present_pte(pte);
252 static pfn_t spte_to_pfn(u64 pte)
254 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
257 static gfn_t pse36_gfn_delta(u32 gpte)
259 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
261 return (gpte & PT32_DIR_PSE36_MASK) << shift;
264 static void set_shadow_pte(u64 *sptep, u64 spte)
267 set_64bit((unsigned long *)sptep, spte);
269 set_64bit((unsigned long long *)sptep, spte);
273 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
274 struct kmem_cache *base_cache, int min)
278 if (cache->nobjs >= min)
280 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
281 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
284 cache->objects[cache->nobjs++] = obj;
289 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
292 kfree(mc->objects[--mc->nobjs]);
295 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
300 if (cache->nobjs >= min)
302 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
303 page = alloc_page(GFP_KERNEL);
306 set_page_private(page, 0);
307 cache->objects[cache->nobjs++] = page_address(page);
312 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
315 free_page((unsigned long)mc->objects[--mc->nobjs]);
318 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
322 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
326 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
330 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
333 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
334 mmu_page_header_cache, 4);
339 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
341 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
342 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
343 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
344 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
347 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
353 p = mc->objects[--mc->nobjs];
357 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
359 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
360 sizeof(struct kvm_pte_chain));
363 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
368 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
370 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
371 sizeof(struct kvm_rmap_desc));
374 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
380 * Return the pointer to the largepage write count for a given
381 * gfn, handling slots that are not large page aligned.
383 static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
387 idx = (gfn / KVM_PAGES_PER_HPAGE) -
388 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
389 return &slot->lpage_info[idx].write_count;
392 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
396 gfn = unalias_gfn(kvm, gfn);
397 write_count = slot_largepage_idx(gfn,
398 gfn_to_memslot_unaliased(kvm, gfn));
402 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
406 gfn = unalias_gfn(kvm, gfn);
407 write_count = slot_largepage_idx(gfn,
408 gfn_to_memslot_unaliased(kvm, gfn));
410 WARN_ON(*write_count < 0);
413 static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
415 struct kvm_memory_slot *slot;
418 gfn = unalias_gfn(kvm, gfn);
419 slot = gfn_to_memslot_unaliased(kvm, gfn);
421 largepage_idx = slot_largepage_idx(gfn, slot);
422 return *largepage_idx;
428 static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
430 struct vm_area_struct *vma;
434 addr = gfn_to_hva(kvm, gfn);
435 if (kvm_is_error_hva(addr))
438 down_read(¤t->mm->mmap_sem);
439 vma = find_vma(current->mm, addr);
440 if (vma && is_vm_hugetlb_page(vma))
442 up_read(¤t->mm->mmap_sem);
447 static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
449 struct kvm_memory_slot *slot;
451 if (has_wrprotected_page(vcpu->kvm, large_gfn))
454 if (!host_largepage_backed(vcpu->kvm, large_gfn))
457 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
458 if (slot && slot->dirty_bitmap)
465 * Take gfn and return the reverse mapping to it.
466 * Note: gfn must be unaliased before this function get called
469 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
471 struct kvm_memory_slot *slot;
474 slot = gfn_to_memslot(kvm, gfn);
476 return &slot->rmap[gfn - slot->base_gfn];
478 idx = (gfn / KVM_PAGES_PER_HPAGE) -
479 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
481 return &slot->lpage_info[idx].rmap_pde;
485 * Reverse mapping data structures:
487 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
488 * that points to page_address(page).
490 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
491 * containing more mappings.
493 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
495 struct kvm_mmu_page *sp;
496 struct kvm_rmap_desc *desc;
497 unsigned long *rmapp;
500 if (!is_rmap_pte(*spte))
502 gfn = unalias_gfn(vcpu->kvm, gfn);
503 sp = page_header(__pa(spte));
504 sp->gfns[spte - sp->spt] = gfn;
505 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
507 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
508 *rmapp = (unsigned long)spte;
509 } else if (!(*rmapp & 1)) {
510 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
511 desc = mmu_alloc_rmap_desc(vcpu);
512 desc->shadow_ptes[0] = (u64 *)*rmapp;
513 desc->shadow_ptes[1] = spte;
514 *rmapp = (unsigned long)desc | 1;
516 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
517 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
518 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
520 if (desc->shadow_ptes[RMAP_EXT-1]) {
521 desc->more = mmu_alloc_rmap_desc(vcpu);
524 for (i = 0; desc->shadow_ptes[i]; ++i)
526 desc->shadow_ptes[i] = spte;
530 static void rmap_desc_remove_entry(unsigned long *rmapp,
531 struct kvm_rmap_desc *desc,
533 struct kvm_rmap_desc *prev_desc)
537 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
539 desc->shadow_ptes[i] = desc->shadow_ptes[j];
540 desc->shadow_ptes[j] = NULL;
543 if (!prev_desc && !desc->more)
544 *rmapp = (unsigned long)desc->shadow_ptes[0];
547 prev_desc->more = desc->more;
549 *rmapp = (unsigned long)desc->more | 1;
550 mmu_free_rmap_desc(desc);
553 static void rmap_remove(struct kvm *kvm, u64 *spte)
555 struct kvm_rmap_desc *desc;
556 struct kvm_rmap_desc *prev_desc;
557 struct kvm_mmu_page *sp;
559 unsigned long *rmapp;
562 if (!is_rmap_pte(*spte))
564 sp = page_header(__pa(spte));
565 pfn = spte_to_pfn(*spte);
566 if (*spte & shadow_accessed_mask)
567 kvm_set_pfn_accessed(pfn);
568 if (is_writeble_pte(*spte))
569 kvm_release_pfn_dirty(pfn);
571 kvm_release_pfn_clean(pfn);
572 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
574 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
576 } else if (!(*rmapp & 1)) {
577 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
578 if ((u64 *)*rmapp != spte) {
579 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
585 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
586 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
589 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
590 if (desc->shadow_ptes[i] == spte) {
591 rmap_desc_remove_entry(rmapp,
603 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
605 struct kvm_rmap_desc *desc;
606 struct kvm_rmap_desc *prev_desc;
612 else if (!(*rmapp & 1)) {
614 return (u64 *)*rmapp;
617 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
621 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
622 if (prev_spte == spte)
623 return desc->shadow_ptes[i];
624 prev_spte = desc->shadow_ptes[i];
631 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
633 unsigned long *rmapp;
635 int write_protected = 0;
637 gfn = unalias_gfn(kvm, gfn);
638 rmapp = gfn_to_rmap(kvm, gfn, 0);
640 spte = rmap_next(kvm, rmapp, NULL);
643 BUG_ON(!(*spte & PT_PRESENT_MASK));
644 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
645 if (is_writeble_pte(*spte)) {
646 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
649 spte = rmap_next(kvm, rmapp, spte);
651 if (write_protected) {
654 spte = rmap_next(kvm, rmapp, NULL);
655 pfn = spte_to_pfn(*spte);
656 kvm_set_pfn_dirty(pfn);
659 /* check for huge page mappings */
660 rmapp = gfn_to_rmap(kvm, gfn, 1);
661 spte = rmap_next(kvm, rmapp, NULL);
664 BUG_ON(!(*spte & PT_PRESENT_MASK));
665 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
666 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
667 if (is_writeble_pte(*spte)) {
668 rmap_remove(kvm, spte);
670 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
674 spte = rmap_next(kvm, rmapp, spte);
677 return write_protected;
680 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
683 int need_tlb_flush = 0;
685 while ((spte = rmap_next(kvm, rmapp, NULL))) {
686 BUG_ON(!(*spte & PT_PRESENT_MASK));
687 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
688 rmap_remove(kvm, spte);
689 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
692 return need_tlb_flush;
695 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
696 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
702 * If mmap_sem isn't taken, we can look the memslots with only
703 * the mmu_lock by skipping over the slots with userspace_addr == 0.
705 for (i = 0; i < kvm->nmemslots; i++) {
706 struct kvm_memory_slot *memslot = &kvm->memslots[i];
707 unsigned long start = memslot->userspace_addr;
710 /* mmu_lock protects userspace_addr */
714 end = start + (memslot->npages << PAGE_SHIFT);
715 if (hva >= start && hva < end) {
716 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
717 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
718 retval |= handler(kvm,
719 &memslot->lpage_info[
721 KVM_PAGES_PER_HPAGE].rmap_pde);
728 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
730 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
733 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
738 /* always return old for EPT */
739 if (!shadow_accessed_mask)
742 spte = rmap_next(kvm, rmapp, NULL);
746 BUG_ON(!(_spte & PT_PRESENT_MASK));
747 _young = _spte & PT_ACCESSED_MASK;
750 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
752 spte = rmap_next(kvm, rmapp, spte);
757 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
759 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
763 static int is_empty_shadow_page(u64 *spt)
768 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
769 if (is_shadow_present_pte(*pos)) {
770 printk(KERN_ERR "%s: %p %llx\n", __func__,
778 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
780 ASSERT(is_empty_shadow_page(sp->spt));
782 __free_page(virt_to_page(sp->spt));
783 __free_page(virt_to_page(sp->gfns));
785 ++kvm->arch.n_free_mmu_pages;
788 static unsigned kvm_page_table_hashfn(gfn_t gfn)
790 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
793 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
796 struct kvm_mmu_page *sp;
798 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
799 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
800 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
801 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
802 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
803 INIT_LIST_HEAD(&sp->oos_link);
804 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
806 sp->parent_pte = parent_pte;
807 --vcpu->kvm->arch.n_free_mmu_pages;
811 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
812 struct kvm_mmu_page *sp, u64 *parent_pte)
814 struct kvm_pte_chain *pte_chain;
815 struct hlist_node *node;
820 if (!sp->multimapped) {
821 u64 *old = sp->parent_pte;
824 sp->parent_pte = parent_pte;
828 pte_chain = mmu_alloc_pte_chain(vcpu);
829 INIT_HLIST_HEAD(&sp->parent_ptes);
830 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
831 pte_chain->parent_ptes[0] = old;
833 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
834 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
836 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
837 if (!pte_chain->parent_ptes[i]) {
838 pte_chain->parent_ptes[i] = parent_pte;
842 pte_chain = mmu_alloc_pte_chain(vcpu);
844 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
845 pte_chain->parent_ptes[0] = parent_pte;
848 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
851 struct kvm_pte_chain *pte_chain;
852 struct hlist_node *node;
855 if (!sp->multimapped) {
856 BUG_ON(sp->parent_pte != parent_pte);
857 sp->parent_pte = NULL;
860 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
861 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
862 if (!pte_chain->parent_ptes[i])
864 if (pte_chain->parent_ptes[i] != parent_pte)
866 while (i + 1 < NR_PTE_CHAIN_ENTRIES
867 && pte_chain->parent_ptes[i + 1]) {
868 pte_chain->parent_ptes[i]
869 = pte_chain->parent_ptes[i + 1];
872 pte_chain->parent_ptes[i] = NULL;
874 hlist_del(&pte_chain->link);
875 mmu_free_pte_chain(pte_chain);
876 if (hlist_empty(&sp->parent_ptes)) {
878 sp->parent_pte = NULL;
887 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
888 mmu_parent_walk_fn fn)
890 struct kvm_pte_chain *pte_chain;
891 struct hlist_node *node;
892 struct kvm_mmu_page *parent_sp;
895 if (!sp->multimapped && sp->parent_pte) {
896 parent_sp = page_header(__pa(sp->parent_pte));
898 mmu_parent_walk(vcpu, parent_sp, fn);
901 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
902 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
903 if (!pte_chain->parent_ptes[i])
905 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
907 mmu_parent_walk(vcpu, parent_sp, fn);
911 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
914 struct kvm_mmu_page *sp = page_header(__pa(spte));
916 index = spte - sp->spt;
917 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
918 sp->unsync_children++;
919 WARN_ON(!sp->unsync_children);
922 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
924 struct kvm_pte_chain *pte_chain;
925 struct hlist_node *node;
931 if (!sp->multimapped) {
932 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
936 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
937 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
938 if (!pte_chain->parent_ptes[i])
940 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
944 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
946 kvm_mmu_update_parents_unsync(sp);
950 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
951 struct kvm_mmu_page *sp)
953 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
954 kvm_mmu_update_parents_unsync(sp);
957 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
958 struct kvm_mmu_page *sp)
962 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
963 sp->spt[i] = shadow_trap_nonpresent_pte;
966 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
967 struct kvm_mmu_page *sp)
972 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
976 #define KVM_PAGE_ARRAY_NR 16
978 struct kvm_mmu_pages {
979 struct mmu_page_and_offset {
980 struct kvm_mmu_page *sp;
982 } page[KVM_PAGE_ARRAY_NR];
986 #define for_each_unsync_children(bitmap, idx) \
987 for (idx = find_first_bit(bitmap, 512); \
989 idx = find_next_bit(bitmap, 512, idx+1))
991 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
997 for (i=0; i < pvec->nr; i++)
998 if (pvec->page[i].sp == sp)
1001 pvec->page[pvec->nr].sp = sp;
1002 pvec->page[pvec->nr].idx = idx;
1004 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1007 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1008 struct kvm_mmu_pages *pvec)
1010 int i, ret, nr_unsync_leaf = 0;
1012 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1013 u64 ent = sp->spt[i];
1015 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1016 struct kvm_mmu_page *child;
1017 child = page_header(ent & PT64_BASE_ADDR_MASK);
1019 if (child->unsync_children) {
1020 if (mmu_pages_add(pvec, child, i))
1023 ret = __mmu_unsync_walk(child, pvec);
1025 __clear_bit(i, sp->unsync_child_bitmap);
1027 nr_unsync_leaf += ret;
1032 if (child->unsync) {
1034 if (mmu_pages_add(pvec, child, i))
1040 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1041 sp->unsync_children = 0;
1043 return nr_unsync_leaf;
1046 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1047 struct kvm_mmu_pages *pvec)
1049 if (!sp->unsync_children)
1052 mmu_pages_add(pvec, sp, 0);
1053 return __mmu_unsync_walk(sp, pvec);
1056 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1059 struct hlist_head *bucket;
1060 struct kvm_mmu_page *sp;
1061 struct hlist_node *node;
1063 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1064 index = kvm_page_table_hashfn(gfn);
1065 bucket = &kvm->arch.mmu_page_hash[index];
1066 hlist_for_each_entry(sp, node, bucket, hash_link)
1067 if (sp->gfn == gfn && !sp->role.direct
1068 && !sp->role.invalid) {
1069 pgprintk("%s: found role %x\n",
1070 __func__, sp->role.word);
1076 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1078 WARN_ON(!sp->unsync);
1080 --kvm->stat.mmu_unsync;
1083 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1085 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1087 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1088 kvm_mmu_zap_page(vcpu->kvm, sp);
1092 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1093 kvm_flush_remote_tlbs(vcpu->kvm);
1094 kvm_unlink_unsync_page(vcpu->kvm, sp);
1095 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1096 kvm_mmu_zap_page(vcpu->kvm, sp);
1100 kvm_mmu_flush_tlb(vcpu);
1104 struct mmu_page_path {
1105 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1106 unsigned int idx[PT64_ROOT_LEVEL-1];
1109 #define for_each_sp(pvec, sp, parents, i) \
1110 for (i = mmu_pages_next(&pvec, &parents, -1), \
1111 sp = pvec.page[i].sp; \
1112 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1113 i = mmu_pages_next(&pvec, &parents, i))
1115 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1116 struct mmu_page_path *parents,
1121 for (n = i+1; n < pvec->nr; n++) {
1122 struct kvm_mmu_page *sp = pvec->page[n].sp;
1124 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1125 parents->idx[0] = pvec->page[n].idx;
1129 parents->parent[sp->role.level-2] = sp;
1130 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1136 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1138 struct kvm_mmu_page *sp;
1139 unsigned int level = 0;
1142 unsigned int idx = parents->idx[level];
1144 sp = parents->parent[level];
1148 --sp->unsync_children;
1149 WARN_ON((int)sp->unsync_children < 0);
1150 __clear_bit(idx, sp->unsync_child_bitmap);
1152 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1155 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1156 struct mmu_page_path *parents,
1157 struct kvm_mmu_pages *pvec)
1159 parents->parent[parent->role.level-1] = NULL;
1163 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1164 struct kvm_mmu_page *parent)
1167 struct kvm_mmu_page *sp;
1168 struct mmu_page_path parents;
1169 struct kvm_mmu_pages pages;
1171 kvm_mmu_pages_init(parent, &parents, &pages);
1172 while (mmu_unsync_walk(parent, &pages)) {
1175 for_each_sp(pages, sp, parents, i)
1176 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1179 kvm_flush_remote_tlbs(vcpu->kvm);
1181 for_each_sp(pages, sp, parents, i) {
1182 kvm_sync_page(vcpu, sp);
1183 mmu_pages_clear_parents(&parents);
1185 cond_resched_lock(&vcpu->kvm->mmu_lock);
1186 kvm_mmu_pages_init(parent, &parents, &pages);
1190 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1198 union kvm_mmu_page_role role;
1201 struct hlist_head *bucket;
1202 struct kvm_mmu_page *sp;
1203 struct hlist_node *node, *tmp;
1205 role = vcpu->arch.mmu.base_role;
1207 role.direct = direct;
1208 role.access = access;
1209 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1210 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1211 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1212 role.quadrant = quadrant;
1214 pgprintk("%s: looking gfn %lx role %x\n", __func__,
1216 index = kvm_page_table_hashfn(gfn);
1217 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1218 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1219 if (sp->gfn == gfn) {
1221 if (kvm_sync_page(vcpu, sp))
1224 if (sp->role.word != role.word)
1227 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1228 if (sp->unsync_children) {
1229 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1230 kvm_mmu_mark_parents_unsync(vcpu, sp);
1232 pgprintk("%s: found\n", __func__);
1235 ++vcpu->kvm->stat.mmu_cache_miss;
1236 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1239 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
1242 hlist_add_head(&sp->hash_link, bucket);
1244 if (rmap_write_protect(vcpu->kvm, gfn))
1245 kvm_flush_remote_tlbs(vcpu->kvm);
1246 account_shadowed(vcpu->kvm, gfn);
1248 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1249 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1251 nonpaging_prefetch_page(vcpu, sp);
1255 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1256 struct kvm_vcpu *vcpu, u64 addr)
1258 iterator->addr = addr;
1259 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1260 iterator->level = vcpu->arch.mmu.shadow_root_level;
1261 if (iterator->level == PT32E_ROOT_LEVEL) {
1262 iterator->shadow_addr
1263 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1264 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1266 if (!iterator->shadow_addr)
1267 iterator->level = 0;
1271 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1273 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1275 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1276 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1280 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1282 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1286 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1287 struct kvm_mmu_page *sp)
1295 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1296 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1297 if (is_shadow_present_pte(pt[i]))
1298 rmap_remove(kvm, &pt[i]);
1299 pt[i] = shadow_trap_nonpresent_pte;
1304 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1307 if (is_shadow_present_pte(ent)) {
1308 if (!is_large_pte(ent)) {
1309 ent &= PT64_BASE_ADDR_MASK;
1310 mmu_page_remove_parent_pte(page_header(ent),
1314 rmap_remove(kvm, &pt[i]);
1317 pt[i] = shadow_trap_nonpresent_pte;
1321 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1323 mmu_page_remove_parent_pte(sp, parent_pte);
1326 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1330 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1332 kvm->vcpus[i]->arch.last_pte_updated = NULL;
1335 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1339 while (sp->multimapped || sp->parent_pte) {
1340 if (!sp->multimapped)
1341 parent_pte = sp->parent_pte;
1343 struct kvm_pte_chain *chain;
1345 chain = container_of(sp->parent_ptes.first,
1346 struct kvm_pte_chain, link);
1347 parent_pte = chain->parent_ptes[0];
1349 BUG_ON(!parent_pte);
1350 kvm_mmu_put_page(sp, parent_pte);
1351 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
1355 static int mmu_zap_unsync_children(struct kvm *kvm,
1356 struct kvm_mmu_page *parent)
1359 struct mmu_page_path parents;
1360 struct kvm_mmu_pages pages;
1362 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1365 kvm_mmu_pages_init(parent, &parents, &pages);
1366 while (mmu_unsync_walk(parent, &pages)) {
1367 struct kvm_mmu_page *sp;
1369 for_each_sp(pages, sp, parents, i) {
1370 kvm_mmu_zap_page(kvm, sp);
1371 mmu_pages_clear_parents(&parents);
1374 kvm_mmu_pages_init(parent, &parents, &pages);
1380 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1383 ++kvm->stat.mmu_shadow_zapped;
1384 ret = mmu_zap_unsync_children(kvm, sp);
1385 kvm_mmu_page_unlink_children(kvm, sp);
1386 kvm_mmu_unlink_parents(kvm, sp);
1387 kvm_flush_remote_tlbs(kvm);
1388 if (!sp->role.invalid && !sp->role.direct)
1389 unaccount_shadowed(kvm, sp->gfn);
1391 kvm_unlink_unsync_page(kvm, sp);
1392 if (!sp->root_count) {
1393 hlist_del(&sp->hash_link);
1394 kvm_mmu_free_page(kvm, sp);
1396 sp->role.invalid = 1;
1397 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1398 kvm_reload_remote_mmus(kvm);
1400 kvm_mmu_reset_last_pte_updated(kvm);
1405 * Changing the number of mmu pages allocated to the vm
1406 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1408 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1411 * If we set the number of mmu pages to be smaller be than the
1412 * number of actived pages , we must to free some mmu pages before we
1416 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
1418 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1419 - kvm->arch.n_free_mmu_pages;
1421 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1422 struct kvm_mmu_page *page;
1424 page = container_of(kvm->arch.active_mmu_pages.prev,
1425 struct kvm_mmu_page, link);
1426 kvm_mmu_zap_page(kvm, page);
1429 kvm->arch.n_free_mmu_pages = 0;
1432 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1433 - kvm->arch.n_alloc_mmu_pages;
1435 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1438 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1441 struct hlist_head *bucket;
1442 struct kvm_mmu_page *sp;
1443 struct hlist_node *node, *n;
1446 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1448 index = kvm_page_table_hashfn(gfn);
1449 bucket = &kvm->arch.mmu_page_hash[index];
1450 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1451 if (sp->gfn == gfn && !sp->role.direct) {
1452 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1455 if (kvm_mmu_zap_page(kvm, sp))
1461 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1464 struct hlist_head *bucket;
1465 struct kvm_mmu_page *sp;
1466 struct hlist_node *node, *nn;
1468 index = kvm_page_table_hashfn(gfn);
1469 bucket = &kvm->arch.mmu_page_hash[index];
1470 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1471 if (sp->gfn == gfn && !sp->role.direct
1472 && !sp->role.invalid) {
1473 pgprintk("%s: zap %lx %x\n",
1474 __func__, gfn, sp->role.word);
1475 kvm_mmu_zap_page(kvm, sp);
1480 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1482 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
1483 struct kvm_mmu_page *sp = page_header(__pa(pte));
1485 __set_bit(slot, sp->slot_bitmap);
1488 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1493 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1496 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1497 if (pt[i] == shadow_notrap_nonpresent_pte)
1498 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1502 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1506 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1508 if (gpa == UNMAPPED_GVA)
1511 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1517 * The function is based on mtrr_type_lookup() in
1518 * arch/x86/kernel/cpu/mtrr/generic.c
1520 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1525 u8 prev_match, curr_match;
1526 int num_var_ranges = KVM_NR_VAR_MTRR;
1528 if (!mtrr_state->enabled)
1531 /* Make end inclusive end, instead of exclusive */
1534 /* Look in fixed ranges. Just return the type as per start */
1535 if (mtrr_state->have_fixed && (start < 0x100000)) {
1538 if (start < 0x80000) {
1540 idx += (start >> 16);
1541 return mtrr_state->fixed_ranges[idx];
1542 } else if (start < 0xC0000) {
1544 idx += ((start - 0x80000) >> 14);
1545 return mtrr_state->fixed_ranges[idx];
1546 } else if (start < 0x1000000) {
1548 idx += ((start - 0xC0000) >> 12);
1549 return mtrr_state->fixed_ranges[idx];
1554 * Look in variable ranges
1555 * Look of multiple ranges matching this address and pick type
1556 * as per MTRR precedence
1558 if (!(mtrr_state->enabled & 2))
1559 return mtrr_state->def_type;
1562 for (i = 0; i < num_var_ranges; ++i) {
1563 unsigned short start_state, end_state;
1565 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1568 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1569 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1570 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1571 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1573 start_state = ((start & mask) == (base & mask));
1574 end_state = ((end & mask) == (base & mask));
1575 if (start_state != end_state)
1578 if ((start & mask) != (base & mask))
1581 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1582 if (prev_match == 0xFF) {
1583 prev_match = curr_match;
1587 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1588 curr_match == MTRR_TYPE_UNCACHABLE)
1589 return MTRR_TYPE_UNCACHABLE;
1591 if ((prev_match == MTRR_TYPE_WRBACK &&
1592 curr_match == MTRR_TYPE_WRTHROUGH) ||
1593 (prev_match == MTRR_TYPE_WRTHROUGH &&
1594 curr_match == MTRR_TYPE_WRBACK)) {
1595 prev_match = MTRR_TYPE_WRTHROUGH;
1596 curr_match = MTRR_TYPE_WRTHROUGH;
1599 if (prev_match != curr_match)
1600 return MTRR_TYPE_UNCACHABLE;
1603 if (prev_match != 0xFF)
1606 return mtrr_state->def_type;
1609 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1613 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1614 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1615 if (mtrr == 0xfe || mtrr == 0xff)
1616 mtrr = MTRR_TYPE_WRBACK;
1619 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1621 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1624 struct hlist_head *bucket;
1625 struct kvm_mmu_page *s;
1626 struct hlist_node *node, *n;
1628 index = kvm_page_table_hashfn(sp->gfn);
1629 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1630 /* don't unsync if pagetable is shadowed with multiple roles */
1631 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1632 if (s->gfn != sp->gfn || s->role.direct)
1634 if (s->role.word != sp->role.word)
1637 ++vcpu->kvm->stat.mmu_unsync;
1640 kvm_mmu_mark_parents_unsync(vcpu, sp);
1642 mmu_convert_notrap(sp);
1646 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1649 struct kvm_mmu_page *shadow;
1651 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1653 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1657 if (can_unsync && oos_shadow)
1658 return kvm_unsync_page(vcpu, shadow);
1664 static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1665 unsigned pte_access, int user_fault,
1666 int write_fault, int dirty, int largepage,
1667 gfn_t gfn, pfn_t pfn, bool speculative,
1674 * We don't set the accessed bit, since we sometimes want to see
1675 * whether the guest actually used the pte (in order to detect
1678 spte = shadow_base_present_pte | shadow_dirty_mask;
1680 spte |= shadow_accessed_mask;
1682 pte_access &= ~ACC_WRITE_MASK;
1683 if (pte_access & ACC_EXEC_MASK)
1684 spte |= shadow_x_mask;
1686 spte |= shadow_nx_mask;
1687 if (pte_access & ACC_USER_MASK)
1688 spte |= shadow_user_mask;
1690 spte |= PT_PAGE_SIZE_MASK;
1692 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1693 kvm_is_mmio_pfn(pfn));
1695 spte |= (u64)pfn << PAGE_SHIFT;
1697 if ((pte_access & ACC_WRITE_MASK)
1698 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1700 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1702 spte = shadow_trap_nonpresent_pte;
1706 spte |= PT_WRITABLE_MASK;
1709 * Optimization: for pte sync, if spte was writable the hash
1710 * lookup is unnecessary (and expensive). Write protection
1711 * is responsibility of mmu_get_page / kvm_sync_page.
1712 * Same reasoning can be applied to dirty page accounting.
1714 if (!can_unsync && is_writeble_pte(*shadow_pte))
1717 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1718 pgprintk("%s: found shadow page for %lx, marking ro\n",
1721 pte_access &= ~ACC_WRITE_MASK;
1722 if (is_writeble_pte(spte))
1723 spte &= ~PT_WRITABLE_MASK;
1727 if (pte_access & ACC_WRITE_MASK)
1728 mark_page_dirty(vcpu->kvm, gfn);
1731 set_shadow_pte(shadow_pte, spte);
1735 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1736 unsigned pt_access, unsigned pte_access,
1737 int user_fault, int write_fault, int dirty,
1738 int *ptwrite, int largepage, gfn_t gfn,
1739 pfn_t pfn, bool speculative)
1741 int was_rmapped = 0;
1742 int was_writeble = is_writeble_pte(*shadow_pte);
1744 pgprintk("%s: spte %llx access %x write_fault %d"
1745 " user_fault %d gfn %lx\n",
1746 __func__, *shadow_pte, pt_access,
1747 write_fault, user_fault, gfn);
1749 if (is_rmap_pte(*shadow_pte)) {
1751 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1752 * the parent of the now unreachable PTE.
1754 if (largepage && !is_large_pte(*shadow_pte)) {
1755 struct kvm_mmu_page *child;
1756 u64 pte = *shadow_pte;
1758 child = page_header(pte & PT64_BASE_ADDR_MASK);
1759 mmu_page_remove_parent_pte(child, shadow_pte);
1760 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1761 pgprintk("hfn old %lx new %lx\n",
1762 spte_to_pfn(*shadow_pte), pfn);
1763 rmap_remove(vcpu->kvm, shadow_pte);
1767 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
1768 dirty, largepage, gfn, pfn, speculative, true)) {
1771 kvm_x86_ops->tlb_flush(vcpu);
1774 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1775 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1776 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1777 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1778 *shadow_pte, shadow_pte);
1779 if (!was_rmapped && is_large_pte(*shadow_pte))
1780 ++vcpu->kvm->stat.lpages;
1782 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1784 rmap_add(vcpu, shadow_pte, gfn, largepage);
1785 if (!is_rmap_pte(*shadow_pte))
1786 kvm_release_pfn_clean(pfn);
1789 kvm_release_pfn_dirty(pfn);
1791 kvm_release_pfn_clean(pfn);
1794 vcpu->arch.last_pte_updated = shadow_pte;
1795 vcpu->arch.last_pte_gfn = gfn;
1799 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1803 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1804 int largepage, gfn_t gfn, pfn_t pfn)
1806 struct kvm_shadow_walk_iterator iterator;
1807 struct kvm_mmu_page *sp;
1811 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1812 if (iterator.level == PT_PAGE_TABLE_LEVEL
1813 || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
1814 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1815 0, write, 1, &pt_write,
1816 largepage, gfn, pfn, false);
1817 ++vcpu->stat.pf_fixed;
1821 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1822 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1823 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1825 1, ACC_ALL, iterator.sptep);
1827 pgprintk("nonpaging_map: ENOMEM\n");
1828 kvm_release_pfn_clean(pfn);
1832 set_shadow_pte(iterator.sptep,
1834 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1835 | shadow_user_mask | shadow_x_mask);
1841 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1846 unsigned long mmu_seq;
1848 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1849 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1853 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1855 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1858 if (is_error_pfn(pfn)) {
1859 kvm_release_pfn_clean(pfn);
1863 spin_lock(&vcpu->kvm->mmu_lock);
1864 if (mmu_notifier_retry(vcpu, mmu_seq))
1866 kvm_mmu_free_some_pages(vcpu);
1867 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
1868 spin_unlock(&vcpu->kvm->mmu_lock);
1874 spin_unlock(&vcpu->kvm->mmu_lock);
1875 kvm_release_pfn_clean(pfn);
1880 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1883 struct kvm_mmu_page *sp;
1885 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1887 spin_lock(&vcpu->kvm->mmu_lock);
1888 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1889 hpa_t root = vcpu->arch.mmu.root_hpa;
1891 sp = page_header(root);
1893 if (!sp->root_count && sp->role.invalid)
1894 kvm_mmu_zap_page(vcpu->kvm, sp);
1895 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1896 spin_unlock(&vcpu->kvm->mmu_lock);
1899 for (i = 0; i < 4; ++i) {
1900 hpa_t root = vcpu->arch.mmu.pae_root[i];
1903 root &= PT64_BASE_ADDR_MASK;
1904 sp = page_header(root);
1906 if (!sp->root_count && sp->role.invalid)
1907 kvm_mmu_zap_page(vcpu->kvm, sp);
1909 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
1911 spin_unlock(&vcpu->kvm->mmu_lock);
1912 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1915 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1919 struct kvm_mmu_page *sp;
1922 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
1924 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1925 hpa_t root = vcpu->arch.mmu.root_hpa;
1927 ASSERT(!VALID_PAGE(root));
1930 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
1931 PT64_ROOT_LEVEL, direct,
1933 root = __pa(sp->spt);
1935 vcpu->arch.mmu.root_hpa = root;
1938 direct = !is_paging(vcpu);
1941 for (i = 0; i < 4; ++i) {
1942 hpa_t root = vcpu->arch.mmu.pae_root[i];
1944 ASSERT(!VALID_PAGE(root));
1945 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1946 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1947 vcpu->arch.mmu.pae_root[i] = 0;
1950 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1951 } else if (vcpu->arch.mmu.root_level == 0)
1953 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
1954 PT32_ROOT_LEVEL, direct,
1956 root = __pa(sp->spt);
1958 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
1960 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
1963 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1966 struct kvm_mmu_page *sp;
1968 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1970 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1971 hpa_t root = vcpu->arch.mmu.root_hpa;
1972 sp = page_header(root);
1973 mmu_sync_children(vcpu, sp);
1976 for (i = 0; i < 4; ++i) {
1977 hpa_t root = vcpu->arch.mmu.pae_root[i];
1980 root &= PT64_BASE_ADDR_MASK;
1981 sp = page_header(root);
1982 mmu_sync_children(vcpu, sp);
1987 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
1989 spin_lock(&vcpu->kvm->mmu_lock);
1990 mmu_sync_roots(vcpu);
1991 spin_unlock(&vcpu->kvm->mmu_lock);
1994 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1999 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2005 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2006 r = mmu_topup_memory_caches(vcpu);
2011 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2013 gfn = gva >> PAGE_SHIFT;
2015 return nonpaging_map(vcpu, gva & PAGE_MASK,
2016 error_code & PFERR_WRITE_MASK, gfn);
2019 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2025 gfn_t gfn = gpa >> PAGE_SHIFT;
2026 unsigned long mmu_seq;
2029 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2031 r = mmu_topup_memory_caches(vcpu);
2035 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2036 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2039 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2041 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2042 if (is_error_pfn(pfn)) {
2043 kvm_release_pfn_clean(pfn);
2046 spin_lock(&vcpu->kvm->mmu_lock);
2047 if (mmu_notifier_retry(vcpu, mmu_seq))
2049 kvm_mmu_free_some_pages(vcpu);
2050 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2051 largepage, gfn, pfn);
2052 spin_unlock(&vcpu->kvm->mmu_lock);
2057 spin_unlock(&vcpu->kvm->mmu_lock);
2058 kvm_release_pfn_clean(pfn);
2062 static void nonpaging_free(struct kvm_vcpu *vcpu)
2064 mmu_free_roots(vcpu);
2067 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2069 struct kvm_mmu *context = &vcpu->arch.mmu;
2071 context->new_cr3 = nonpaging_new_cr3;
2072 context->page_fault = nonpaging_page_fault;
2073 context->gva_to_gpa = nonpaging_gva_to_gpa;
2074 context->free = nonpaging_free;
2075 context->prefetch_page = nonpaging_prefetch_page;
2076 context->sync_page = nonpaging_sync_page;
2077 context->invlpg = nonpaging_invlpg;
2078 context->root_level = 0;
2079 context->shadow_root_level = PT32E_ROOT_LEVEL;
2080 context->root_hpa = INVALID_PAGE;
2084 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2086 ++vcpu->stat.tlb_flush;
2087 kvm_x86_ops->tlb_flush(vcpu);
2090 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2092 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2093 mmu_free_roots(vcpu);
2096 static void inject_page_fault(struct kvm_vcpu *vcpu,
2100 kvm_inject_page_fault(vcpu, addr, err_code);
2103 static void paging_free(struct kvm_vcpu *vcpu)
2105 nonpaging_free(vcpu);
2108 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2112 bit7 = (gpte >> 7) & 1;
2113 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2117 #include "paging_tmpl.h"
2121 #include "paging_tmpl.h"
2124 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2126 struct kvm_mmu *context = &vcpu->arch.mmu;
2127 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2128 u64 exb_bit_rsvd = 0;
2131 exb_bit_rsvd = rsvd_bits(63, 63);
2133 case PT32_ROOT_LEVEL:
2134 /* no rsvd bits for 2 level 4K page table entries */
2135 context->rsvd_bits_mask[0][1] = 0;
2136 context->rsvd_bits_mask[0][0] = 0;
2137 if (is_cpuid_PSE36())
2138 /* 36bits PSE 4MB page */
2139 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2141 /* 32 bits PSE 4MB page */
2142 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2143 context->rsvd_bits_mask[1][0] = ~0ull;
2145 case PT32E_ROOT_LEVEL:
2146 context->rsvd_bits_mask[0][2] =
2147 rsvd_bits(maxphyaddr, 63) |
2148 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2149 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2150 rsvd_bits(maxphyaddr, 62); /* PDE */
2151 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2152 rsvd_bits(maxphyaddr, 62); /* PTE */
2153 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2154 rsvd_bits(maxphyaddr, 62) |
2155 rsvd_bits(13, 20); /* large page */
2156 context->rsvd_bits_mask[1][0] = ~0ull;
2158 case PT64_ROOT_LEVEL:
2159 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2160 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2161 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2162 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2163 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2164 rsvd_bits(maxphyaddr, 51);
2165 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2166 rsvd_bits(maxphyaddr, 51);
2167 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2168 context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
2169 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2170 rsvd_bits(maxphyaddr, 51) |
2171 rsvd_bits(13, 20); /* large page */
2172 context->rsvd_bits_mask[1][0] = ~0ull;
2177 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2179 struct kvm_mmu *context = &vcpu->arch.mmu;
2181 ASSERT(is_pae(vcpu));
2182 context->new_cr3 = paging_new_cr3;
2183 context->page_fault = paging64_page_fault;
2184 context->gva_to_gpa = paging64_gva_to_gpa;
2185 context->prefetch_page = paging64_prefetch_page;
2186 context->sync_page = paging64_sync_page;
2187 context->invlpg = paging64_invlpg;
2188 context->free = paging_free;
2189 context->root_level = level;
2190 context->shadow_root_level = level;
2191 context->root_hpa = INVALID_PAGE;
2195 static int paging64_init_context(struct kvm_vcpu *vcpu)
2197 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2198 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2201 static int paging32_init_context(struct kvm_vcpu *vcpu)
2203 struct kvm_mmu *context = &vcpu->arch.mmu;
2205 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2206 context->new_cr3 = paging_new_cr3;
2207 context->page_fault = paging32_page_fault;
2208 context->gva_to_gpa = paging32_gva_to_gpa;
2209 context->free = paging_free;
2210 context->prefetch_page = paging32_prefetch_page;
2211 context->sync_page = paging32_sync_page;
2212 context->invlpg = paging32_invlpg;
2213 context->root_level = PT32_ROOT_LEVEL;
2214 context->shadow_root_level = PT32E_ROOT_LEVEL;
2215 context->root_hpa = INVALID_PAGE;
2219 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2221 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2222 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2225 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2227 struct kvm_mmu *context = &vcpu->arch.mmu;
2229 context->new_cr3 = nonpaging_new_cr3;
2230 context->page_fault = tdp_page_fault;
2231 context->free = nonpaging_free;
2232 context->prefetch_page = nonpaging_prefetch_page;
2233 context->sync_page = nonpaging_sync_page;
2234 context->invlpg = nonpaging_invlpg;
2235 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2236 context->root_hpa = INVALID_PAGE;
2238 if (!is_paging(vcpu)) {
2239 context->gva_to_gpa = nonpaging_gva_to_gpa;
2240 context->root_level = 0;
2241 } else if (is_long_mode(vcpu)) {
2242 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2243 context->gva_to_gpa = paging64_gva_to_gpa;
2244 context->root_level = PT64_ROOT_LEVEL;
2245 } else if (is_pae(vcpu)) {
2246 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2247 context->gva_to_gpa = paging64_gva_to_gpa;
2248 context->root_level = PT32E_ROOT_LEVEL;
2250 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2251 context->gva_to_gpa = paging32_gva_to_gpa;
2252 context->root_level = PT32_ROOT_LEVEL;
2258 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2263 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2265 if (!is_paging(vcpu))
2266 r = nonpaging_init_context(vcpu);
2267 else if (is_long_mode(vcpu))
2268 r = paging64_init_context(vcpu);
2269 else if (is_pae(vcpu))
2270 r = paging32E_init_context(vcpu);
2272 r = paging32_init_context(vcpu);
2274 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2279 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2281 vcpu->arch.update_pte.pfn = bad_pfn;
2284 return init_kvm_tdp_mmu(vcpu);
2286 return init_kvm_softmmu(vcpu);
2289 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2292 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2293 vcpu->arch.mmu.free(vcpu);
2294 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2298 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2300 destroy_kvm_mmu(vcpu);
2301 return init_kvm_mmu(vcpu);
2303 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2305 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2309 r = mmu_topup_memory_caches(vcpu);
2312 spin_lock(&vcpu->kvm->mmu_lock);
2313 kvm_mmu_free_some_pages(vcpu);
2314 mmu_alloc_roots(vcpu);
2315 mmu_sync_roots(vcpu);
2316 spin_unlock(&vcpu->kvm->mmu_lock);
2317 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2318 kvm_mmu_flush_tlb(vcpu);
2322 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2324 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2326 mmu_free_roots(vcpu);
2329 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2330 struct kvm_mmu_page *sp,
2334 struct kvm_mmu_page *child;
2337 if (is_shadow_present_pte(pte)) {
2338 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2340 rmap_remove(vcpu->kvm, spte);
2342 child = page_header(pte & PT64_BASE_ADDR_MASK);
2343 mmu_page_remove_parent_pte(child, spte);
2346 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
2347 if (is_large_pte(pte))
2348 --vcpu->kvm->stat.lpages;
2351 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2352 struct kvm_mmu_page *sp,
2356 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2357 if (!vcpu->arch.update_pte.largepage ||
2358 sp->role.glevels == PT32_ROOT_LEVEL) {
2359 ++vcpu->kvm->stat.mmu_pde_zapped;
2364 ++vcpu->kvm->stat.mmu_pte_updated;
2365 if (sp->role.glevels == PT32_ROOT_LEVEL)
2366 paging32_update_pte(vcpu, sp, spte, new);
2368 paging64_update_pte(vcpu, sp, spte, new);
2371 static bool need_remote_flush(u64 old, u64 new)
2373 if (!is_shadow_present_pte(old))
2375 if (!is_shadow_present_pte(new))
2377 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2379 old ^= PT64_NX_MASK;
2380 new ^= PT64_NX_MASK;
2381 return (old & ~new & PT64_PERM_MASK) != 0;
2384 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2386 if (need_remote_flush(old, new))
2387 kvm_flush_remote_tlbs(vcpu->kvm);
2389 kvm_mmu_flush_tlb(vcpu);
2392 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2394 u64 *spte = vcpu->arch.last_pte_updated;
2396 return !!(spte && (*spte & shadow_accessed_mask));
2399 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2400 const u8 *new, int bytes)
2407 vcpu->arch.update_pte.largepage = 0;
2409 if (bytes != 4 && bytes != 8)
2413 * Assume that the pte write on a page table of the same type
2414 * as the current vcpu paging mode. This is nearly always true
2415 * (might be false while changing modes). Note it is verified later
2419 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2420 if ((bytes == 4) && (gpa % 4 == 0)) {
2421 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2424 memcpy((void *)&gpte + (gpa % 8), new, 4);
2425 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2426 memcpy((void *)&gpte, new, 8);
2429 if ((bytes == 4) && (gpa % 4 == 0))
2430 memcpy((void *)&gpte, new, 4);
2432 if (!is_present_pte(gpte))
2434 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2436 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2437 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2438 vcpu->arch.update_pte.largepage = 1;
2440 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2442 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2444 if (is_error_pfn(pfn)) {
2445 kvm_release_pfn_clean(pfn);
2448 vcpu->arch.update_pte.gfn = gfn;
2449 vcpu->arch.update_pte.pfn = pfn;
2452 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2454 u64 *spte = vcpu->arch.last_pte_updated;
2457 && vcpu->arch.last_pte_gfn == gfn
2458 && shadow_accessed_mask
2459 && !(*spte & shadow_accessed_mask)
2460 && is_shadow_present_pte(*spte))
2461 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2464 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2465 const u8 *new, int bytes,
2466 bool guest_initiated)
2468 gfn_t gfn = gpa >> PAGE_SHIFT;
2469 struct kvm_mmu_page *sp;
2470 struct hlist_node *node, *n;
2471 struct hlist_head *bucket;
2475 unsigned offset = offset_in_page(gpa);
2477 unsigned page_offset;
2478 unsigned misaligned;
2485 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2486 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2487 spin_lock(&vcpu->kvm->mmu_lock);
2488 kvm_mmu_access_page(vcpu, gfn);
2489 kvm_mmu_free_some_pages(vcpu);
2490 ++vcpu->kvm->stat.mmu_pte_write;
2491 kvm_mmu_audit(vcpu, "pre pte write");
2492 if (guest_initiated) {
2493 if (gfn == vcpu->arch.last_pt_write_gfn
2494 && !last_updated_pte_accessed(vcpu)) {
2495 ++vcpu->arch.last_pt_write_count;
2496 if (vcpu->arch.last_pt_write_count >= 3)
2499 vcpu->arch.last_pt_write_gfn = gfn;
2500 vcpu->arch.last_pt_write_count = 1;
2501 vcpu->arch.last_pte_updated = NULL;
2504 index = kvm_page_table_hashfn(gfn);
2505 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2506 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2507 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2509 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2510 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2511 misaligned |= bytes < 4;
2512 if (misaligned || flooded) {
2514 * Misaligned accesses are too much trouble to fix
2515 * up; also, they usually indicate a page is not used
2518 * If we're seeing too many writes to a page,
2519 * it may no longer be a page table, or we may be
2520 * forking, in which case it is better to unmap the
2523 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2524 gpa, bytes, sp->role.word);
2525 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2527 ++vcpu->kvm->stat.mmu_flooded;
2530 page_offset = offset;
2531 level = sp->role.level;
2533 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2534 page_offset <<= 1; /* 32->64 */
2536 * A 32-bit pde maps 4MB while the shadow pdes map
2537 * only 2MB. So we need to double the offset again
2538 * and zap two pdes instead of one.
2540 if (level == PT32_ROOT_LEVEL) {
2541 page_offset &= ~7; /* kill rounding error */
2545 quadrant = page_offset >> PAGE_SHIFT;
2546 page_offset &= ~PAGE_MASK;
2547 if (quadrant != sp->role.quadrant)
2550 spte = &sp->spt[page_offset / sizeof(*spte)];
2551 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2553 r = kvm_read_guest_atomic(vcpu->kvm,
2554 gpa & ~(u64)(pte_size - 1),
2556 new = (const void *)&gentry;
2562 mmu_pte_write_zap_pte(vcpu, sp, spte);
2564 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2565 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2569 kvm_mmu_audit(vcpu, "post pte write");
2570 spin_unlock(&vcpu->kvm->mmu_lock);
2571 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2572 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2573 vcpu->arch.update_pte.pfn = bad_pfn;
2577 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2582 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2584 spin_lock(&vcpu->kvm->mmu_lock);
2585 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2586 spin_unlock(&vcpu->kvm->mmu_lock);
2589 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2591 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2593 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
2594 struct kvm_mmu_page *sp;
2596 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2597 struct kvm_mmu_page, link);
2598 kvm_mmu_zap_page(vcpu->kvm, sp);
2599 ++vcpu->kvm->stat.mmu_recycled;
2603 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2606 enum emulation_result er;
2608 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2617 r = mmu_topup_memory_caches(vcpu);
2621 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
2626 case EMULATE_DO_MMIO:
2627 ++vcpu->stat.mmio_exits;
2630 kvm_report_emulation_failure(vcpu, "pagetable");
2638 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2640 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2642 vcpu->arch.mmu.invlpg(vcpu, gva);
2643 kvm_mmu_flush_tlb(vcpu);
2644 ++vcpu->stat.invlpg;
2646 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2648 void kvm_enable_tdp(void)
2652 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2654 void kvm_disable_tdp(void)
2656 tdp_enabled = false;
2658 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2660 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2662 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2665 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2672 if (vcpu->kvm->arch.n_requested_mmu_pages)
2673 vcpu->kvm->arch.n_free_mmu_pages =
2674 vcpu->kvm->arch.n_requested_mmu_pages;
2676 vcpu->kvm->arch.n_free_mmu_pages =
2677 vcpu->kvm->arch.n_alloc_mmu_pages;
2679 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2680 * Therefore we need to allocate shadow page tables in the first
2681 * 4GB of memory, which happens to fit the DMA32 zone.
2683 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2686 vcpu->arch.mmu.pae_root = page_address(page);
2687 for (i = 0; i < 4; ++i)
2688 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2693 free_mmu_pages(vcpu);
2697 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2700 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2702 return alloc_mmu_pages(vcpu);
2705 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2708 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2710 return init_kvm_mmu(vcpu);
2713 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2717 destroy_kvm_mmu(vcpu);
2718 free_mmu_pages(vcpu);
2719 mmu_free_memory_caches(vcpu);
2722 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2724 struct kvm_mmu_page *sp;
2726 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2730 if (!test_bit(slot, sp->slot_bitmap))
2734 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2736 if (pt[i] & PT_WRITABLE_MASK)
2737 pt[i] &= ~PT_WRITABLE_MASK;
2739 kvm_flush_remote_tlbs(kvm);
2742 void kvm_mmu_zap_all(struct kvm *kvm)
2744 struct kvm_mmu_page *sp, *node;
2746 spin_lock(&kvm->mmu_lock);
2747 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2748 if (kvm_mmu_zap_page(kvm, sp))
2749 node = container_of(kvm->arch.active_mmu_pages.next,
2750 struct kvm_mmu_page, link);
2751 spin_unlock(&kvm->mmu_lock);
2753 kvm_flush_remote_tlbs(kvm);
2756 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2758 struct kvm_mmu_page *page;
2760 page = container_of(kvm->arch.active_mmu_pages.prev,
2761 struct kvm_mmu_page, link);
2762 kvm_mmu_zap_page(kvm, page);
2765 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2768 struct kvm *kvm_freed = NULL;
2769 int cache_count = 0;
2771 spin_lock(&kvm_lock);
2773 list_for_each_entry(kvm, &vm_list, vm_list) {
2776 if (!down_read_trylock(&kvm->slots_lock))
2778 spin_lock(&kvm->mmu_lock);
2779 npages = kvm->arch.n_alloc_mmu_pages -
2780 kvm->arch.n_free_mmu_pages;
2781 cache_count += npages;
2782 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2783 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2789 spin_unlock(&kvm->mmu_lock);
2790 up_read(&kvm->slots_lock);
2793 list_move_tail(&kvm_freed->vm_list, &vm_list);
2795 spin_unlock(&kvm_lock);
2800 static struct shrinker mmu_shrinker = {
2801 .shrink = mmu_shrink,
2802 .seeks = DEFAULT_SEEKS * 10,
2805 static void mmu_destroy_caches(void)
2807 if (pte_chain_cache)
2808 kmem_cache_destroy(pte_chain_cache);
2809 if (rmap_desc_cache)
2810 kmem_cache_destroy(rmap_desc_cache);
2811 if (mmu_page_header_cache)
2812 kmem_cache_destroy(mmu_page_header_cache);
2815 void kvm_mmu_module_exit(void)
2817 mmu_destroy_caches();
2818 unregister_shrinker(&mmu_shrinker);
2821 int kvm_mmu_module_init(void)
2823 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2824 sizeof(struct kvm_pte_chain),
2826 if (!pte_chain_cache)
2828 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2829 sizeof(struct kvm_rmap_desc),
2831 if (!rmap_desc_cache)
2834 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2835 sizeof(struct kvm_mmu_page),
2837 if (!mmu_page_header_cache)
2840 register_shrinker(&mmu_shrinker);
2845 mmu_destroy_caches();
2850 * Caculate mmu pages needed for kvm.
2852 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2855 unsigned int nr_mmu_pages;
2856 unsigned int nr_pages = 0;
2858 for (i = 0; i < kvm->nmemslots; i++)
2859 nr_pages += kvm->memslots[i].npages;
2861 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2862 nr_mmu_pages = max(nr_mmu_pages,
2863 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2865 return nr_mmu_pages;
2868 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2871 if (len > buffer->len)
2876 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2881 ret = pv_mmu_peek_buffer(buffer, len);
2886 buffer->processed += len;
2890 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2891 gpa_t addr, gpa_t value)
2896 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2899 r = mmu_topup_memory_caches(vcpu);
2903 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2909 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2911 kvm_set_cr3(vcpu, vcpu->arch.cr3);
2915 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2917 spin_lock(&vcpu->kvm->mmu_lock);
2918 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2919 spin_unlock(&vcpu->kvm->mmu_lock);
2923 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2924 struct kvm_pv_mmu_op_buffer *buffer)
2926 struct kvm_mmu_op_header *header;
2928 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2931 switch (header->op) {
2932 case KVM_MMU_OP_WRITE_PTE: {
2933 struct kvm_mmu_op_write_pte *wpte;
2935 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2938 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2941 case KVM_MMU_OP_FLUSH_TLB: {
2942 struct kvm_mmu_op_flush_tlb *ftlb;
2944 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2947 return kvm_pv_mmu_flush_tlb(vcpu);
2949 case KVM_MMU_OP_RELEASE_PT: {
2950 struct kvm_mmu_op_release_pt *rpt;
2952 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2955 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2961 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2962 gpa_t addr, unsigned long *ret)
2965 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2967 buffer->ptr = buffer->buf;
2968 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2969 buffer->processed = 0;
2971 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2975 while (buffer->len) {
2976 r = kvm_pv_mmu_op_one(vcpu, buffer);
2985 *ret = buffer->processed;
2991 static const char *audit_msg;
2993 static gva_t canonicalize(gva_t gva)
2995 #ifdef CONFIG_X86_64
2996 gva = (long long)(gva << 16) >> 16;
3001 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3002 gva_t va, int level)
3004 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3006 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3008 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3011 if (ent == shadow_trap_nonpresent_pte)
3014 va = canonicalize(va);
3016 if (ent == shadow_notrap_nonpresent_pte)
3017 printk(KERN_ERR "audit: (%s) nontrapping pte"
3018 " in nonleaf level: levels %d gva %lx"
3019 " level %d pte %llx\n", audit_msg,
3020 vcpu->arch.mmu.root_level, va, level, ent);
3022 audit_mappings_page(vcpu, ent, va, level - 1);
3024 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3025 gfn_t gfn = gpa >> PAGE_SHIFT;
3026 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3027 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3029 if (is_shadow_present_pte(ent)
3030 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3031 printk(KERN_ERR "xx audit error: (%s) levels %d"
3032 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3033 audit_msg, vcpu->arch.mmu.root_level,
3035 is_shadow_present_pte(ent));
3036 else if (ent == shadow_notrap_nonpresent_pte
3037 && !is_error_hpa(hpa))
3038 printk(KERN_ERR "audit: (%s) notrap shadow,"
3039 " valid guest gva %lx\n", audit_msg, va);
3040 kvm_release_pfn_clean(pfn);
3046 static void audit_mappings(struct kvm_vcpu *vcpu)
3050 if (vcpu->arch.mmu.root_level == 4)
3051 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3053 for (i = 0; i < 4; ++i)
3054 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3055 audit_mappings_page(vcpu,
3056 vcpu->arch.mmu.pae_root[i],
3061 static int count_rmaps(struct kvm_vcpu *vcpu)
3066 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3067 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3068 struct kvm_rmap_desc *d;
3070 for (j = 0; j < m->npages; ++j) {
3071 unsigned long *rmapp = &m->rmap[j];
3075 if (!(*rmapp & 1)) {
3079 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3081 for (k = 0; k < RMAP_EXT; ++k)
3082 if (d->shadow_ptes[k])
3093 static int count_writable_mappings(struct kvm_vcpu *vcpu)
3096 struct kvm_mmu_page *sp;
3099 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3102 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3105 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3108 if (!(ent & PT_PRESENT_MASK))
3110 if (!(ent & PT_WRITABLE_MASK))
3118 static void audit_rmap(struct kvm_vcpu *vcpu)
3120 int n_rmap = count_rmaps(vcpu);
3121 int n_actual = count_writable_mappings(vcpu);
3123 if (n_rmap != n_actual)
3124 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
3125 __func__, audit_msg, n_rmap, n_actual);
3128 static void audit_write_protection(struct kvm_vcpu *vcpu)
3130 struct kvm_mmu_page *sp;
3131 struct kvm_memory_slot *slot;
3132 unsigned long *rmapp;
3135 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3136 if (sp->role.direct)
3139 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3140 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3141 rmapp = &slot->rmap[gfn - slot->base_gfn];
3143 printk(KERN_ERR "%s: (%s) shadow page has writable"
3144 " mappings: gfn %lx role %x\n",
3145 __func__, audit_msg, sp->gfn,
3150 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3157 audit_write_protection(vcpu);
3158 audit_mappings(vcpu);