2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 #include "kvm_cache_regs.h"
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30 #include <linux/hugetlb.h>
31 #include <linux/compiler.h>
32 #include <linux/srcu.h>
35 #include <asm/cmpxchg.h>
40 * When setting this variable to true it enables Two-Dimensional-Paging
41 * where the hardware walks 2 page tables:
42 * 1. the guest-virtual to guest-physical
43 * 2. while doing 1. it walks guest-physical to host-physical
44 * If the hardware supports that we don't need to do shadow paging.
46 bool tdp_enabled = false;
53 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
55 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
60 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
61 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
65 #define pgprintk(x...) do { } while (0)
66 #define rmap_printk(x...) do { } while (0)
70 #if defined(MMU_DEBUG) || defined(AUDIT)
72 module_param(dbg, bool, 0644);
75 static int oos_shadow = 1;
76 module_param(oos_shadow, bool, 0644);
79 #define ASSERT(x) do { } while (0)
83 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
84 __FILE__, __LINE__, #x); \
88 #define PT_FIRST_AVAIL_BITS_SHIFT 9
89 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
91 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
93 #define PT64_LEVEL_BITS 9
95 #define PT64_LEVEL_SHIFT(level) \
96 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
98 #define PT64_LEVEL_MASK(level) \
99 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
101 #define PT64_INDEX(address, level)\
102 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
105 #define PT32_LEVEL_BITS 10
107 #define PT32_LEVEL_SHIFT(level) \
108 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
110 #define PT32_LEVEL_MASK(level) \
111 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
112 #define PT32_LVL_OFFSET_MASK(level) \
113 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
114 * PT32_LEVEL_BITS))) - 1))
116 #define PT32_INDEX(address, level)\
117 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
120 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
121 #define PT64_DIR_BASE_ADDR_MASK \
122 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
123 #define PT64_LVL_ADDR_MASK(level) \
124 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
125 * PT64_LEVEL_BITS))) - 1))
126 #define PT64_LVL_OFFSET_MASK(level) \
127 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
128 * PT64_LEVEL_BITS))) - 1))
130 #define PT32_BASE_ADDR_MASK PAGE_MASK
131 #define PT32_DIR_BASE_ADDR_MASK \
132 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
133 #define PT32_LVL_ADDR_MASK(level) \
134 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
135 * PT32_LEVEL_BITS))) - 1))
137 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
140 #define PFERR_PRESENT_MASK (1U << 0)
141 #define PFERR_WRITE_MASK (1U << 1)
142 #define PFERR_USER_MASK (1U << 2)
143 #define PFERR_RSVD_MASK (1U << 3)
144 #define PFERR_FETCH_MASK (1U << 4)
146 #define PT_PDPE_LEVEL 3
147 #define PT_DIRECTORY_LEVEL 2
148 #define PT_PAGE_TABLE_LEVEL 1
152 #define ACC_EXEC_MASK 1
153 #define ACC_WRITE_MASK PT_WRITABLE_MASK
154 #define ACC_USER_MASK PT_USER_MASK
155 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
157 #define CREATE_TRACE_POINTS
158 #include "mmutrace.h"
160 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
162 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
164 struct kvm_rmap_desc {
165 u64 *sptes[RMAP_EXT];
166 struct kvm_rmap_desc *more;
169 struct kvm_shadow_walk_iterator {
177 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
178 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
179 shadow_walk_okay(&(_walker)); \
180 shadow_walk_next(&(_walker)))
183 struct kvm_unsync_walk {
184 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
187 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
189 static struct kmem_cache *pte_chain_cache;
190 static struct kmem_cache *rmap_desc_cache;
191 static struct kmem_cache *mmu_page_header_cache;
193 static u64 __read_mostly shadow_trap_nonpresent_pte;
194 static u64 __read_mostly shadow_notrap_nonpresent_pte;
195 static u64 __read_mostly shadow_base_present_pte;
196 static u64 __read_mostly shadow_nx_mask;
197 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
198 static u64 __read_mostly shadow_user_mask;
199 static u64 __read_mostly shadow_accessed_mask;
200 static u64 __read_mostly shadow_dirty_mask;
202 static inline u64 rsvd_bits(int s, int e)
204 return ((1ULL << (e - s + 1)) - 1) << s;
207 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
209 shadow_trap_nonpresent_pte = trap_pte;
210 shadow_notrap_nonpresent_pte = notrap_pte;
212 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
214 void kvm_mmu_set_base_ptes(u64 base_pte)
216 shadow_base_present_pte = base_pte;
218 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
220 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
221 u64 dirty_mask, u64 nx_mask, u64 x_mask)
223 shadow_user_mask = user_mask;
224 shadow_accessed_mask = accessed_mask;
225 shadow_dirty_mask = dirty_mask;
226 shadow_nx_mask = nx_mask;
227 shadow_x_mask = x_mask;
229 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
231 static int is_write_protection(struct kvm_vcpu *vcpu)
233 return vcpu->arch.cr0 & X86_CR0_WP;
236 static int is_cpuid_PSE36(void)
241 static int is_nx(struct kvm_vcpu *vcpu)
243 return vcpu->arch.shadow_efer & EFER_NX;
246 static int is_shadow_present_pte(u64 pte)
248 return pte != shadow_trap_nonpresent_pte
249 && pte != shadow_notrap_nonpresent_pte;
252 static int is_large_pte(u64 pte)
254 return pte & PT_PAGE_SIZE_MASK;
257 static int is_writeble_pte(unsigned long pte)
259 return pte & PT_WRITABLE_MASK;
262 static int is_dirty_gpte(unsigned long pte)
264 return pte & PT_DIRTY_MASK;
267 static int is_rmap_spte(u64 pte)
269 return is_shadow_present_pte(pte);
272 static int is_last_spte(u64 pte, int level)
274 if (level == PT_PAGE_TABLE_LEVEL)
276 if (is_large_pte(pte))
281 static pfn_t spte_to_pfn(u64 pte)
283 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
286 static gfn_t pse36_gfn_delta(u32 gpte)
288 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
290 return (gpte & PT32_DIR_PSE36_MASK) << shift;
293 static void __set_spte(u64 *sptep, u64 spte)
296 set_64bit((unsigned long *)sptep, spte);
298 set_64bit((unsigned long long *)sptep, spte);
302 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
303 struct kmem_cache *base_cache, int min)
307 if (cache->nobjs >= min)
309 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
310 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
313 cache->objects[cache->nobjs++] = obj;
318 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
321 kfree(mc->objects[--mc->nobjs]);
324 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
329 if (cache->nobjs >= min)
331 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
332 page = alloc_page(GFP_KERNEL);
335 set_page_private(page, 0);
336 cache->objects[cache->nobjs++] = page_address(page);
341 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
344 free_page((unsigned long)mc->objects[--mc->nobjs]);
347 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
351 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
355 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
359 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
362 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
363 mmu_page_header_cache, 4);
368 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
370 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
371 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
372 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
373 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
376 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
382 p = mc->objects[--mc->nobjs];
386 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
388 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
389 sizeof(struct kvm_pte_chain));
392 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
397 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
399 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
400 sizeof(struct kvm_rmap_desc));
403 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
409 * Return the pointer to the largepage write count for a given
410 * gfn, handling slots that are not large page aligned.
412 static int *slot_largepage_idx(gfn_t gfn,
413 struct kvm_memory_slot *slot,
418 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
419 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
420 return &slot->lpage_info[level - 2][idx].write_count;
423 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
425 struct kvm_memory_slot *slot;
429 gfn = unalias_gfn(kvm, gfn);
431 slot = gfn_to_memslot_unaliased(kvm, gfn);
432 for (i = PT_DIRECTORY_LEVEL;
433 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
434 write_count = slot_largepage_idx(gfn, slot, i);
439 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
441 struct kvm_memory_slot *slot;
445 gfn = unalias_gfn(kvm, gfn);
446 for (i = PT_DIRECTORY_LEVEL;
447 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
448 slot = gfn_to_memslot_unaliased(kvm, gfn);
449 write_count = slot_largepage_idx(gfn, slot, i);
451 WARN_ON(*write_count < 0);
455 static int has_wrprotected_page(struct kvm *kvm,
459 struct kvm_memory_slot *slot;
462 gfn = unalias_gfn(kvm, gfn);
463 slot = gfn_to_memslot_unaliased(kvm, gfn);
465 largepage_idx = slot_largepage_idx(gfn, slot, level);
466 return *largepage_idx;
472 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
474 unsigned long page_size = PAGE_SIZE;
475 struct vm_area_struct *vma;
479 addr = gfn_to_hva(kvm, gfn);
480 if (kvm_is_error_hva(addr))
481 return PT_PAGE_TABLE_LEVEL;
483 down_read(¤t->mm->mmap_sem);
484 vma = find_vma(current->mm, addr);
488 page_size = vma_kernel_pagesize(vma);
491 up_read(¤t->mm->mmap_sem);
493 for (i = PT_PAGE_TABLE_LEVEL;
494 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
495 if (page_size >= KVM_HPAGE_SIZE(i))
504 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
506 struct kvm_memory_slot *slot;
508 int level = PT_PAGE_TABLE_LEVEL;
510 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
511 if (slot && slot->dirty_bitmap)
512 return PT_PAGE_TABLE_LEVEL;
514 host_level = host_mapping_level(vcpu->kvm, large_gfn);
516 if (host_level == PT_PAGE_TABLE_LEVEL)
519 for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level)
520 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
527 * Take gfn and return the reverse mapping to it.
528 * Note: gfn must be unaliased before this function get called
531 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
533 struct kvm_memory_slot *slot;
536 slot = gfn_to_memslot(kvm, gfn);
537 if (likely(level == PT_PAGE_TABLE_LEVEL))
538 return &slot->rmap[gfn - slot->base_gfn];
540 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
541 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
543 return &slot->lpage_info[level - 2][idx].rmap_pde;
547 * Reverse mapping data structures:
549 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
550 * that points to page_address(page).
552 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
553 * containing more mappings.
555 * Returns the number of rmap entries before the spte was added or zero if
556 * the spte was not added.
559 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
561 struct kvm_mmu_page *sp;
562 struct kvm_rmap_desc *desc;
563 unsigned long *rmapp;
566 if (!is_rmap_spte(*spte))
568 gfn = unalias_gfn(vcpu->kvm, gfn);
569 sp = page_header(__pa(spte));
570 sp->gfns[spte - sp->spt] = gfn;
571 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
573 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
574 *rmapp = (unsigned long)spte;
575 } else if (!(*rmapp & 1)) {
576 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
577 desc = mmu_alloc_rmap_desc(vcpu);
578 desc->sptes[0] = (u64 *)*rmapp;
579 desc->sptes[1] = spte;
580 *rmapp = (unsigned long)desc | 1;
582 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
583 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
584 while (desc->sptes[RMAP_EXT-1] && desc->more) {
588 if (desc->sptes[RMAP_EXT-1]) {
589 desc->more = mmu_alloc_rmap_desc(vcpu);
592 for (i = 0; desc->sptes[i]; ++i)
594 desc->sptes[i] = spte;
599 static void rmap_desc_remove_entry(unsigned long *rmapp,
600 struct kvm_rmap_desc *desc,
602 struct kvm_rmap_desc *prev_desc)
606 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
608 desc->sptes[i] = desc->sptes[j];
609 desc->sptes[j] = NULL;
612 if (!prev_desc && !desc->more)
613 *rmapp = (unsigned long)desc->sptes[0];
616 prev_desc->more = desc->more;
618 *rmapp = (unsigned long)desc->more | 1;
619 mmu_free_rmap_desc(desc);
622 static void rmap_remove(struct kvm *kvm, u64 *spte)
624 struct kvm_rmap_desc *desc;
625 struct kvm_rmap_desc *prev_desc;
626 struct kvm_mmu_page *sp;
628 unsigned long *rmapp;
631 if (!is_rmap_spte(*spte))
633 sp = page_header(__pa(spte));
634 pfn = spte_to_pfn(*spte);
635 if (*spte & shadow_accessed_mask)
636 kvm_set_pfn_accessed(pfn);
637 if (is_writeble_pte(*spte))
638 kvm_set_pfn_dirty(pfn);
639 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
641 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
643 } else if (!(*rmapp & 1)) {
644 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
645 if ((u64 *)*rmapp != spte) {
646 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
652 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
653 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
656 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
657 if (desc->sptes[i] == spte) {
658 rmap_desc_remove_entry(rmapp,
666 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
671 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
673 struct kvm_rmap_desc *desc;
674 struct kvm_rmap_desc *prev_desc;
680 else if (!(*rmapp & 1)) {
682 return (u64 *)*rmapp;
685 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
689 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
690 if (prev_spte == spte)
691 return desc->sptes[i];
692 prev_spte = desc->sptes[i];
699 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
701 unsigned long *rmapp;
703 int i, write_protected = 0;
705 gfn = unalias_gfn(kvm, gfn);
706 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
708 spte = rmap_next(kvm, rmapp, NULL);
711 BUG_ON(!(*spte & PT_PRESENT_MASK));
712 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
713 if (is_writeble_pte(*spte)) {
714 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
717 spte = rmap_next(kvm, rmapp, spte);
719 if (write_protected) {
722 spte = rmap_next(kvm, rmapp, NULL);
723 pfn = spte_to_pfn(*spte);
724 kvm_set_pfn_dirty(pfn);
727 /* check for huge page mappings */
728 for (i = PT_DIRECTORY_LEVEL;
729 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
730 rmapp = gfn_to_rmap(kvm, gfn, i);
731 spte = rmap_next(kvm, rmapp, NULL);
734 BUG_ON(!(*spte & PT_PRESENT_MASK));
735 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
736 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
737 if (is_writeble_pte(*spte)) {
738 rmap_remove(kvm, spte);
740 __set_spte(spte, shadow_trap_nonpresent_pte);
744 spte = rmap_next(kvm, rmapp, spte);
748 return write_protected;
751 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
755 int need_tlb_flush = 0;
757 while ((spte = rmap_next(kvm, rmapp, NULL))) {
758 BUG_ON(!(*spte & PT_PRESENT_MASK));
759 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
760 rmap_remove(kvm, spte);
761 __set_spte(spte, shadow_trap_nonpresent_pte);
764 return need_tlb_flush;
767 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
772 pte_t *ptep = (pte_t *)data;
775 WARN_ON(pte_huge(*ptep));
776 new_pfn = pte_pfn(*ptep);
777 spte = rmap_next(kvm, rmapp, NULL);
779 BUG_ON(!is_shadow_present_pte(*spte));
780 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
782 if (pte_write(*ptep)) {
783 rmap_remove(kvm, spte);
784 __set_spte(spte, shadow_trap_nonpresent_pte);
785 spte = rmap_next(kvm, rmapp, NULL);
787 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
788 new_spte |= (u64)new_pfn << PAGE_SHIFT;
790 new_spte &= ~PT_WRITABLE_MASK;
791 new_spte &= ~SPTE_HOST_WRITEABLE;
792 if (is_writeble_pte(*spte))
793 kvm_set_pfn_dirty(spte_to_pfn(*spte));
794 __set_spte(spte, new_spte);
795 spte = rmap_next(kvm, rmapp, spte);
799 kvm_flush_remote_tlbs(kvm);
804 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
806 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
811 struct kvm_memslots *slots;
813 slots = rcu_dereference(kvm->memslots);
815 for (i = 0; i < slots->nmemslots; i++) {
816 struct kvm_memory_slot *memslot = &slots->memslots[i];
817 unsigned long start = memslot->userspace_addr;
820 end = start + (memslot->npages << PAGE_SHIFT);
821 if (hva >= start && hva < end) {
822 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
824 retval |= handler(kvm, &memslot->rmap[gfn_offset],
827 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
828 int idx = gfn_offset;
829 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
830 retval |= handler(kvm,
831 &memslot->lpage_info[j][idx].rmap_pde,
840 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
842 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
845 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
847 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
850 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
856 /* always return old for EPT */
857 if (!shadow_accessed_mask)
860 spte = rmap_next(kvm, rmapp, NULL);
864 BUG_ON(!(_spte & PT_PRESENT_MASK));
865 _young = _spte & PT_ACCESSED_MASK;
868 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
870 spte = rmap_next(kvm, rmapp, spte);
875 #define RMAP_RECYCLE_THRESHOLD 1000
877 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
879 unsigned long *rmapp;
880 struct kvm_mmu_page *sp;
882 sp = page_header(__pa(spte));
884 gfn = unalias_gfn(vcpu->kvm, gfn);
885 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
887 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
888 kvm_flush_remote_tlbs(vcpu->kvm);
891 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
893 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
897 static int is_empty_shadow_page(u64 *spt)
902 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
903 if (is_shadow_present_pte(*pos)) {
904 printk(KERN_ERR "%s: %p %llx\n", __func__,
912 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
914 ASSERT(is_empty_shadow_page(sp->spt));
916 __free_page(virt_to_page(sp->spt));
917 __free_page(virt_to_page(sp->gfns));
919 ++kvm->arch.n_free_mmu_pages;
922 static unsigned kvm_page_table_hashfn(gfn_t gfn)
924 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
927 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
930 struct kvm_mmu_page *sp;
932 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
933 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
934 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
935 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
936 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
937 INIT_LIST_HEAD(&sp->oos_link);
938 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
940 sp->parent_pte = parent_pte;
941 --vcpu->kvm->arch.n_free_mmu_pages;
945 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
946 struct kvm_mmu_page *sp, u64 *parent_pte)
948 struct kvm_pte_chain *pte_chain;
949 struct hlist_node *node;
954 if (!sp->multimapped) {
955 u64 *old = sp->parent_pte;
958 sp->parent_pte = parent_pte;
962 pte_chain = mmu_alloc_pte_chain(vcpu);
963 INIT_HLIST_HEAD(&sp->parent_ptes);
964 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
965 pte_chain->parent_ptes[0] = old;
967 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
968 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
970 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
971 if (!pte_chain->parent_ptes[i]) {
972 pte_chain->parent_ptes[i] = parent_pte;
976 pte_chain = mmu_alloc_pte_chain(vcpu);
978 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
979 pte_chain->parent_ptes[0] = parent_pte;
982 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
985 struct kvm_pte_chain *pte_chain;
986 struct hlist_node *node;
989 if (!sp->multimapped) {
990 BUG_ON(sp->parent_pte != parent_pte);
991 sp->parent_pte = NULL;
994 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
995 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
996 if (!pte_chain->parent_ptes[i])
998 if (pte_chain->parent_ptes[i] != parent_pte)
1000 while (i + 1 < NR_PTE_CHAIN_ENTRIES
1001 && pte_chain->parent_ptes[i + 1]) {
1002 pte_chain->parent_ptes[i]
1003 = pte_chain->parent_ptes[i + 1];
1006 pte_chain->parent_ptes[i] = NULL;
1008 hlist_del(&pte_chain->link);
1009 mmu_free_pte_chain(pte_chain);
1010 if (hlist_empty(&sp->parent_ptes)) {
1011 sp->multimapped = 0;
1012 sp->parent_pte = NULL;
1021 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1022 mmu_parent_walk_fn fn)
1024 struct kvm_pte_chain *pte_chain;
1025 struct hlist_node *node;
1026 struct kvm_mmu_page *parent_sp;
1029 if (!sp->multimapped && sp->parent_pte) {
1030 parent_sp = page_header(__pa(sp->parent_pte));
1031 fn(vcpu, parent_sp);
1032 mmu_parent_walk(vcpu, parent_sp, fn);
1035 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1036 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1037 if (!pte_chain->parent_ptes[i])
1039 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1040 fn(vcpu, parent_sp);
1041 mmu_parent_walk(vcpu, parent_sp, fn);
1045 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1048 struct kvm_mmu_page *sp = page_header(__pa(spte));
1050 index = spte - sp->spt;
1051 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1052 sp->unsync_children++;
1053 WARN_ON(!sp->unsync_children);
1056 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1058 struct kvm_pte_chain *pte_chain;
1059 struct hlist_node *node;
1062 if (!sp->parent_pte)
1065 if (!sp->multimapped) {
1066 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1070 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1071 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1072 if (!pte_chain->parent_ptes[i])
1074 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1078 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1080 kvm_mmu_update_parents_unsync(sp);
1084 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1085 struct kvm_mmu_page *sp)
1087 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1088 kvm_mmu_update_parents_unsync(sp);
1091 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1092 struct kvm_mmu_page *sp)
1096 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1097 sp->spt[i] = shadow_trap_nonpresent_pte;
1100 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1101 struct kvm_mmu_page *sp)
1106 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1110 #define KVM_PAGE_ARRAY_NR 16
1112 struct kvm_mmu_pages {
1113 struct mmu_page_and_offset {
1114 struct kvm_mmu_page *sp;
1116 } page[KVM_PAGE_ARRAY_NR];
1120 #define for_each_unsync_children(bitmap, idx) \
1121 for (idx = find_first_bit(bitmap, 512); \
1123 idx = find_next_bit(bitmap, 512, idx+1))
1125 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1131 for (i=0; i < pvec->nr; i++)
1132 if (pvec->page[i].sp == sp)
1135 pvec->page[pvec->nr].sp = sp;
1136 pvec->page[pvec->nr].idx = idx;
1138 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1141 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1142 struct kvm_mmu_pages *pvec)
1144 int i, ret, nr_unsync_leaf = 0;
1146 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1147 u64 ent = sp->spt[i];
1149 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1150 struct kvm_mmu_page *child;
1151 child = page_header(ent & PT64_BASE_ADDR_MASK);
1153 if (child->unsync_children) {
1154 if (mmu_pages_add(pvec, child, i))
1157 ret = __mmu_unsync_walk(child, pvec);
1159 __clear_bit(i, sp->unsync_child_bitmap);
1161 nr_unsync_leaf += ret;
1166 if (child->unsync) {
1168 if (mmu_pages_add(pvec, child, i))
1174 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1175 sp->unsync_children = 0;
1177 return nr_unsync_leaf;
1180 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1181 struct kvm_mmu_pages *pvec)
1183 if (!sp->unsync_children)
1186 mmu_pages_add(pvec, sp, 0);
1187 return __mmu_unsync_walk(sp, pvec);
1190 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1193 struct hlist_head *bucket;
1194 struct kvm_mmu_page *sp;
1195 struct hlist_node *node;
1197 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1198 index = kvm_page_table_hashfn(gfn);
1199 bucket = &kvm->arch.mmu_page_hash[index];
1200 hlist_for_each_entry(sp, node, bucket, hash_link)
1201 if (sp->gfn == gfn && !sp->role.direct
1202 && !sp->role.invalid) {
1203 pgprintk("%s: found role %x\n",
1204 __func__, sp->role.word);
1210 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1212 WARN_ON(!sp->unsync);
1214 --kvm->stat.mmu_unsync;
1217 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1219 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1221 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1222 kvm_mmu_zap_page(vcpu->kvm, sp);
1226 trace_kvm_mmu_sync_page(sp);
1227 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1228 kvm_flush_remote_tlbs(vcpu->kvm);
1229 kvm_unlink_unsync_page(vcpu->kvm, sp);
1230 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1231 kvm_mmu_zap_page(vcpu->kvm, sp);
1235 kvm_mmu_flush_tlb(vcpu);
1239 struct mmu_page_path {
1240 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1241 unsigned int idx[PT64_ROOT_LEVEL-1];
1244 #define for_each_sp(pvec, sp, parents, i) \
1245 for (i = mmu_pages_next(&pvec, &parents, -1), \
1246 sp = pvec.page[i].sp; \
1247 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1248 i = mmu_pages_next(&pvec, &parents, i))
1250 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1251 struct mmu_page_path *parents,
1256 for (n = i+1; n < pvec->nr; n++) {
1257 struct kvm_mmu_page *sp = pvec->page[n].sp;
1259 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1260 parents->idx[0] = pvec->page[n].idx;
1264 parents->parent[sp->role.level-2] = sp;
1265 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1271 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1273 struct kvm_mmu_page *sp;
1274 unsigned int level = 0;
1277 unsigned int idx = parents->idx[level];
1279 sp = parents->parent[level];
1283 --sp->unsync_children;
1284 WARN_ON((int)sp->unsync_children < 0);
1285 __clear_bit(idx, sp->unsync_child_bitmap);
1287 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1290 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1291 struct mmu_page_path *parents,
1292 struct kvm_mmu_pages *pvec)
1294 parents->parent[parent->role.level-1] = NULL;
1298 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1299 struct kvm_mmu_page *parent)
1302 struct kvm_mmu_page *sp;
1303 struct mmu_page_path parents;
1304 struct kvm_mmu_pages pages;
1306 kvm_mmu_pages_init(parent, &parents, &pages);
1307 while (mmu_unsync_walk(parent, &pages)) {
1310 for_each_sp(pages, sp, parents, i)
1311 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1314 kvm_flush_remote_tlbs(vcpu->kvm);
1316 for_each_sp(pages, sp, parents, i) {
1317 kvm_sync_page(vcpu, sp);
1318 mmu_pages_clear_parents(&parents);
1320 cond_resched_lock(&vcpu->kvm->mmu_lock);
1321 kvm_mmu_pages_init(parent, &parents, &pages);
1325 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1333 union kvm_mmu_page_role role;
1336 struct hlist_head *bucket;
1337 struct kvm_mmu_page *sp;
1338 struct hlist_node *node, *tmp;
1340 role = vcpu->arch.mmu.base_role;
1342 role.direct = direct;
1343 role.access = access;
1344 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1345 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1346 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1347 role.quadrant = quadrant;
1349 index = kvm_page_table_hashfn(gfn);
1350 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1351 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1352 if (sp->gfn == gfn) {
1354 if (kvm_sync_page(vcpu, sp))
1357 if (sp->role.word != role.word)
1360 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1361 if (sp->unsync_children) {
1362 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1363 kvm_mmu_mark_parents_unsync(vcpu, sp);
1365 trace_kvm_mmu_get_page(sp, false);
1368 ++vcpu->kvm->stat.mmu_cache_miss;
1369 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1374 hlist_add_head(&sp->hash_link, bucket);
1376 if (rmap_write_protect(vcpu->kvm, gfn))
1377 kvm_flush_remote_tlbs(vcpu->kvm);
1378 account_shadowed(vcpu->kvm, gfn);
1380 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1381 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1383 nonpaging_prefetch_page(vcpu, sp);
1384 trace_kvm_mmu_get_page(sp, true);
1388 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1389 struct kvm_vcpu *vcpu, u64 addr)
1391 iterator->addr = addr;
1392 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1393 iterator->level = vcpu->arch.mmu.shadow_root_level;
1394 if (iterator->level == PT32E_ROOT_LEVEL) {
1395 iterator->shadow_addr
1396 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1397 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1399 if (!iterator->shadow_addr)
1400 iterator->level = 0;
1404 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1406 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1409 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1410 if (is_large_pte(*iterator->sptep))
1413 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1414 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1418 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1420 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1424 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1425 struct kvm_mmu_page *sp)
1433 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1436 if (is_shadow_present_pte(ent)) {
1437 if (!is_last_spte(ent, sp->role.level)) {
1438 ent &= PT64_BASE_ADDR_MASK;
1439 mmu_page_remove_parent_pte(page_header(ent),
1442 if (is_large_pte(ent))
1444 rmap_remove(kvm, &pt[i]);
1447 pt[i] = shadow_trap_nonpresent_pte;
1451 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1453 mmu_page_remove_parent_pte(sp, parent_pte);
1456 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1459 struct kvm_vcpu *vcpu;
1461 kvm_for_each_vcpu(i, vcpu, kvm)
1462 vcpu->arch.last_pte_updated = NULL;
1465 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1469 while (sp->multimapped || sp->parent_pte) {
1470 if (!sp->multimapped)
1471 parent_pte = sp->parent_pte;
1473 struct kvm_pte_chain *chain;
1475 chain = container_of(sp->parent_ptes.first,
1476 struct kvm_pte_chain, link);
1477 parent_pte = chain->parent_ptes[0];
1479 BUG_ON(!parent_pte);
1480 kvm_mmu_put_page(sp, parent_pte);
1481 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1485 static int mmu_zap_unsync_children(struct kvm *kvm,
1486 struct kvm_mmu_page *parent)
1489 struct mmu_page_path parents;
1490 struct kvm_mmu_pages pages;
1492 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1495 kvm_mmu_pages_init(parent, &parents, &pages);
1496 while (mmu_unsync_walk(parent, &pages)) {
1497 struct kvm_mmu_page *sp;
1499 for_each_sp(pages, sp, parents, i) {
1500 kvm_mmu_zap_page(kvm, sp);
1501 mmu_pages_clear_parents(&parents);
1504 kvm_mmu_pages_init(parent, &parents, &pages);
1510 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1514 trace_kvm_mmu_zap_page(sp);
1515 ++kvm->stat.mmu_shadow_zapped;
1516 ret = mmu_zap_unsync_children(kvm, sp);
1517 kvm_mmu_page_unlink_children(kvm, sp);
1518 kvm_mmu_unlink_parents(kvm, sp);
1519 kvm_flush_remote_tlbs(kvm);
1520 if (!sp->role.invalid && !sp->role.direct)
1521 unaccount_shadowed(kvm, sp->gfn);
1523 kvm_unlink_unsync_page(kvm, sp);
1524 if (!sp->root_count) {
1525 hlist_del(&sp->hash_link);
1526 kvm_mmu_free_page(kvm, sp);
1528 sp->role.invalid = 1;
1529 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1530 kvm_reload_remote_mmus(kvm);
1532 kvm_mmu_reset_last_pte_updated(kvm);
1537 * Changing the number of mmu pages allocated to the vm
1538 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1540 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1544 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1545 used_pages = max(0, used_pages);
1548 * If we set the number of mmu pages to be smaller be than the
1549 * number of actived pages , we must to free some mmu pages before we
1553 if (used_pages > kvm_nr_mmu_pages) {
1554 while (used_pages > kvm_nr_mmu_pages) {
1555 struct kvm_mmu_page *page;
1557 page = container_of(kvm->arch.active_mmu_pages.prev,
1558 struct kvm_mmu_page, link);
1559 kvm_mmu_zap_page(kvm, page);
1562 kvm->arch.n_free_mmu_pages = 0;
1565 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1566 - kvm->arch.n_alloc_mmu_pages;
1568 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1571 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1574 struct hlist_head *bucket;
1575 struct kvm_mmu_page *sp;
1576 struct hlist_node *node, *n;
1579 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1581 index = kvm_page_table_hashfn(gfn);
1582 bucket = &kvm->arch.mmu_page_hash[index];
1583 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1584 if (sp->gfn == gfn && !sp->role.direct) {
1585 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1588 if (kvm_mmu_zap_page(kvm, sp))
1594 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1597 struct hlist_head *bucket;
1598 struct kvm_mmu_page *sp;
1599 struct hlist_node *node, *nn;
1601 index = kvm_page_table_hashfn(gfn);
1602 bucket = &kvm->arch.mmu_page_hash[index];
1603 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1604 if (sp->gfn == gfn && !sp->role.direct
1605 && !sp->role.invalid) {
1606 pgprintk("%s: zap %lx %x\n",
1607 __func__, gfn, sp->role.word);
1608 kvm_mmu_zap_page(kvm, sp);
1613 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1615 int slot = memslot_id(kvm, gfn);
1616 struct kvm_mmu_page *sp = page_header(__pa(pte));
1618 __set_bit(slot, sp->slot_bitmap);
1621 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1626 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1629 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1630 if (pt[i] == shadow_notrap_nonpresent_pte)
1631 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1635 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1639 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1641 if (gpa == UNMAPPED_GVA)
1644 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1650 * The function is based on mtrr_type_lookup() in
1651 * arch/x86/kernel/cpu/mtrr/generic.c
1653 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1658 u8 prev_match, curr_match;
1659 int num_var_ranges = KVM_NR_VAR_MTRR;
1661 if (!mtrr_state->enabled)
1664 /* Make end inclusive end, instead of exclusive */
1667 /* Look in fixed ranges. Just return the type as per start */
1668 if (mtrr_state->have_fixed && (start < 0x100000)) {
1671 if (start < 0x80000) {
1673 idx += (start >> 16);
1674 return mtrr_state->fixed_ranges[idx];
1675 } else if (start < 0xC0000) {
1677 idx += ((start - 0x80000) >> 14);
1678 return mtrr_state->fixed_ranges[idx];
1679 } else if (start < 0x1000000) {
1681 idx += ((start - 0xC0000) >> 12);
1682 return mtrr_state->fixed_ranges[idx];
1687 * Look in variable ranges
1688 * Look of multiple ranges matching this address and pick type
1689 * as per MTRR precedence
1691 if (!(mtrr_state->enabled & 2))
1692 return mtrr_state->def_type;
1695 for (i = 0; i < num_var_ranges; ++i) {
1696 unsigned short start_state, end_state;
1698 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1701 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1702 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1703 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1704 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1706 start_state = ((start & mask) == (base & mask));
1707 end_state = ((end & mask) == (base & mask));
1708 if (start_state != end_state)
1711 if ((start & mask) != (base & mask))
1714 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1715 if (prev_match == 0xFF) {
1716 prev_match = curr_match;
1720 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1721 curr_match == MTRR_TYPE_UNCACHABLE)
1722 return MTRR_TYPE_UNCACHABLE;
1724 if ((prev_match == MTRR_TYPE_WRBACK &&
1725 curr_match == MTRR_TYPE_WRTHROUGH) ||
1726 (prev_match == MTRR_TYPE_WRTHROUGH &&
1727 curr_match == MTRR_TYPE_WRBACK)) {
1728 prev_match = MTRR_TYPE_WRTHROUGH;
1729 curr_match = MTRR_TYPE_WRTHROUGH;
1732 if (prev_match != curr_match)
1733 return MTRR_TYPE_UNCACHABLE;
1736 if (prev_match != 0xFF)
1739 return mtrr_state->def_type;
1742 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1746 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1747 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1748 if (mtrr == 0xfe || mtrr == 0xff)
1749 mtrr = MTRR_TYPE_WRBACK;
1752 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1754 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1757 struct hlist_head *bucket;
1758 struct kvm_mmu_page *s;
1759 struct hlist_node *node, *n;
1761 trace_kvm_mmu_unsync_page(sp);
1762 index = kvm_page_table_hashfn(sp->gfn);
1763 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1764 /* don't unsync if pagetable is shadowed with multiple roles */
1765 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1766 if (s->gfn != sp->gfn || s->role.direct)
1768 if (s->role.word != sp->role.word)
1771 ++vcpu->kvm->stat.mmu_unsync;
1774 kvm_mmu_mark_parents_unsync(vcpu, sp);
1776 mmu_convert_notrap(sp);
1780 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1783 struct kvm_mmu_page *shadow;
1785 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1787 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1791 if (can_unsync && oos_shadow)
1792 return kvm_unsync_page(vcpu, shadow);
1798 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1799 unsigned pte_access, int user_fault,
1800 int write_fault, int dirty, int level,
1801 gfn_t gfn, pfn_t pfn, bool speculative,
1802 bool can_unsync, bool reset_host_protection)
1808 * We don't set the accessed bit, since we sometimes want to see
1809 * whether the guest actually used the pte (in order to detect
1812 spte = shadow_base_present_pte | shadow_dirty_mask;
1814 spte |= shadow_accessed_mask;
1816 pte_access &= ~ACC_WRITE_MASK;
1817 if (pte_access & ACC_EXEC_MASK)
1818 spte |= shadow_x_mask;
1820 spte |= shadow_nx_mask;
1821 if (pte_access & ACC_USER_MASK)
1822 spte |= shadow_user_mask;
1823 if (level > PT_PAGE_TABLE_LEVEL)
1824 spte |= PT_PAGE_SIZE_MASK;
1826 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1827 kvm_is_mmio_pfn(pfn));
1829 if (reset_host_protection)
1830 spte |= SPTE_HOST_WRITEABLE;
1832 spte |= (u64)pfn << PAGE_SHIFT;
1834 if ((pte_access & ACC_WRITE_MASK)
1835 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1837 if (level > PT_PAGE_TABLE_LEVEL &&
1838 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1840 spte = shadow_trap_nonpresent_pte;
1844 spte |= PT_WRITABLE_MASK;
1847 * Optimization: for pte sync, if spte was writable the hash
1848 * lookup is unnecessary (and expensive). Write protection
1849 * is responsibility of mmu_get_page / kvm_sync_page.
1850 * Same reasoning can be applied to dirty page accounting.
1852 if (!can_unsync && is_writeble_pte(*sptep))
1855 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1856 pgprintk("%s: found shadow page for %lx, marking ro\n",
1859 pte_access &= ~ACC_WRITE_MASK;
1860 if (is_writeble_pte(spte))
1861 spte &= ~PT_WRITABLE_MASK;
1865 if (pte_access & ACC_WRITE_MASK)
1866 mark_page_dirty(vcpu->kvm, gfn);
1869 __set_spte(sptep, spte);
1873 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1874 unsigned pt_access, unsigned pte_access,
1875 int user_fault, int write_fault, int dirty,
1876 int *ptwrite, int level, gfn_t gfn,
1877 pfn_t pfn, bool speculative,
1878 bool reset_host_protection)
1880 int was_rmapped = 0;
1881 int was_writeble = is_writeble_pte(*sptep);
1884 pgprintk("%s: spte %llx access %x write_fault %d"
1885 " user_fault %d gfn %lx\n",
1886 __func__, *sptep, pt_access,
1887 write_fault, user_fault, gfn);
1889 if (is_rmap_spte(*sptep)) {
1891 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1892 * the parent of the now unreachable PTE.
1894 if (level > PT_PAGE_TABLE_LEVEL &&
1895 !is_large_pte(*sptep)) {
1896 struct kvm_mmu_page *child;
1899 child = page_header(pte & PT64_BASE_ADDR_MASK);
1900 mmu_page_remove_parent_pte(child, sptep);
1901 } else if (pfn != spte_to_pfn(*sptep)) {
1902 pgprintk("hfn old %lx new %lx\n",
1903 spte_to_pfn(*sptep), pfn);
1904 rmap_remove(vcpu->kvm, sptep);
1909 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1910 dirty, level, gfn, pfn, speculative, true,
1911 reset_host_protection)) {
1914 kvm_x86_ops->tlb_flush(vcpu);
1917 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1918 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1919 is_large_pte(*sptep)? "2MB" : "4kB",
1920 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1922 if (!was_rmapped && is_large_pte(*sptep))
1923 ++vcpu->kvm->stat.lpages;
1925 page_header_update_slot(vcpu->kvm, sptep, gfn);
1927 rmap_count = rmap_add(vcpu, sptep, gfn);
1928 kvm_release_pfn_clean(pfn);
1929 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1930 rmap_recycle(vcpu, sptep, gfn);
1933 kvm_release_pfn_dirty(pfn);
1935 kvm_release_pfn_clean(pfn);
1938 vcpu->arch.last_pte_updated = sptep;
1939 vcpu->arch.last_pte_gfn = gfn;
1943 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1947 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1948 int level, gfn_t gfn, pfn_t pfn)
1950 struct kvm_shadow_walk_iterator iterator;
1951 struct kvm_mmu_page *sp;
1955 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1956 if (iterator.level == level) {
1957 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1958 0, write, 1, &pt_write,
1959 level, gfn, pfn, false, true);
1960 ++vcpu->stat.pf_fixed;
1964 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1965 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1966 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1968 1, ACC_ALL, iterator.sptep);
1970 pgprintk("nonpaging_map: ENOMEM\n");
1971 kvm_release_pfn_clean(pfn);
1975 __set_spte(iterator.sptep,
1977 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1978 | shadow_user_mask | shadow_x_mask);
1984 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1989 unsigned long mmu_seq;
1991 level = mapping_level(vcpu, gfn);
1994 * This path builds a PAE pagetable - so we can map 2mb pages at
1995 * maximum. Therefore check if the level is larger than that.
1997 if (level > PT_DIRECTORY_LEVEL)
1998 level = PT_DIRECTORY_LEVEL;
2000 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2002 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2004 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2007 if (is_error_pfn(pfn)) {
2008 kvm_release_pfn_clean(pfn);
2012 spin_lock(&vcpu->kvm->mmu_lock);
2013 if (mmu_notifier_retry(vcpu, mmu_seq))
2015 kvm_mmu_free_some_pages(vcpu);
2016 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2017 spin_unlock(&vcpu->kvm->mmu_lock);
2023 spin_unlock(&vcpu->kvm->mmu_lock);
2024 kvm_release_pfn_clean(pfn);
2029 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2032 struct kvm_mmu_page *sp;
2034 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2036 spin_lock(&vcpu->kvm->mmu_lock);
2037 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2038 hpa_t root = vcpu->arch.mmu.root_hpa;
2040 sp = page_header(root);
2042 if (!sp->root_count && sp->role.invalid)
2043 kvm_mmu_zap_page(vcpu->kvm, sp);
2044 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2045 spin_unlock(&vcpu->kvm->mmu_lock);
2048 for (i = 0; i < 4; ++i) {
2049 hpa_t root = vcpu->arch.mmu.pae_root[i];
2052 root &= PT64_BASE_ADDR_MASK;
2053 sp = page_header(root);
2055 if (!sp->root_count && sp->role.invalid)
2056 kvm_mmu_zap_page(vcpu->kvm, sp);
2058 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2060 spin_unlock(&vcpu->kvm->mmu_lock);
2061 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2064 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2068 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2069 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2076 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2080 struct kvm_mmu_page *sp;
2084 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2086 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2087 hpa_t root = vcpu->arch.mmu.root_hpa;
2089 ASSERT(!VALID_PAGE(root));
2092 if (mmu_check_root(vcpu, root_gfn))
2094 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2095 PT64_ROOT_LEVEL, direct,
2097 root = __pa(sp->spt);
2099 vcpu->arch.mmu.root_hpa = root;
2102 direct = !is_paging(vcpu);
2105 for (i = 0; i < 4; ++i) {
2106 hpa_t root = vcpu->arch.mmu.pae_root[i];
2108 ASSERT(!VALID_PAGE(root));
2109 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2110 pdptr = kvm_pdptr_read(vcpu, i);
2111 if (!is_present_gpte(pdptr)) {
2112 vcpu->arch.mmu.pae_root[i] = 0;
2115 root_gfn = pdptr >> PAGE_SHIFT;
2116 } else if (vcpu->arch.mmu.root_level == 0)
2118 if (mmu_check_root(vcpu, root_gfn))
2120 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2121 PT32_ROOT_LEVEL, direct,
2123 root = __pa(sp->spt);
2125 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2127 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2131 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2134 struct kvm_mmu_page *sp;
2136 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2138 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2139 hpa_t root = vcpu->arch.mmu.root_hpa;
2140 sp = page_header(root);
2141 mmu_sync_children(vcpu, sp);
2144 for (i = 0; i < 4; ++i) {
2145 hpa_t root = vcpu->arch.mmu.pae_root[i];
2147 if (root && VALID_PAGE(root)) {
2148 root &= PT64_BASE_ADDR_MASK;
2149 sp = page_header(root);
2150 mmu_sync_children(vcpu, sp);
2155 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2157 spin_lock(&vcpu->kvm->mmu_lock);
2158 mmu_sync_roots(vcpu);
2159 spin_unlock(&vcpu->kvm->mmu_lock);
2162 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2167 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2173 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2174 r = mmu_topup_memory_caches(vcpu);
2179 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2181 gfn = gva >> PAGE_SHIFT;
2183 return nonpaging_map(vcpu, gva & PAGE_MASK,
2184 error_code & PFERR_WRITE_MASK, gfn);
2187 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2193 gfn_t gfn = gpa >> PAGE_SHIFT;
2194 unsigned long mmu_seq;
2197 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2199 r = mmu_topup_memory_caches(vcpu);
2203 level = mapping_level(vcpu, gfn);
2205 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2207 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2209 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2210 if (is_error_pfn(pfn)) {
2211 kvm_release_pfn_clean(pfn);
2214 spin_lock(&vcpu->kvm->mmu_lock);
2215 if (mmu_notifier_retry(vcpu, mmu_seq))
2217 kvm_mmu_free_some_pages(vcpu);
2218 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2220 spin_unlock(&vcpu->kvm->mmu_lock);
2225 spin_unlock(&vcpu->kvm->mmu_lock);
2226 kvm_release_pfn_clean(pfn);
2230 static void nonpaging_free(struct kvm_vcpu *vcpu)
2232 mmu_free_roots(vcpu);
2235 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2237 struct kvm_mmu *context = &vcpu->arch.mmu;
2239 context->new_cr3 = nonpaging_new_cr3;
2240 context->page_fault = nonpaging_page_fault;
2241 context->gva_to_gpa = nonpaging_gva_to_gpa;
2242 context->free = nonpaging_free;
2243 context->prefetch_page = nonpaging_prefetch_page;
2244 context->sync_page = nonpaging_sync_page;
2245 context->invlpg = nonpaging_invlpg;
2246 context->root_level = 0;
2247 context->shadow_root_level = PT32E_ROOT_LEVEL;
2248 context->root_hpa = INVALID_PAGE;
2252 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2254 ++vcpu->stat.tlb_flush;
2255 kvm_x86_ops->tlb_flush(vcpu);
2258 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2260 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2261 mmu_free_roots(vcpu);
2264 static void inject_page_fault(struct kvm_vcpu *vcpu,
2268 kvm_inject_page_fault(vcpu, addr, err_code);
2271 static void paging_free(struct kvm_vcpu *vcpu)
2273 nonpaging_free(vcpu);
2276 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2280 bit7 = (gpte >> 7) & 1;
2281 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2285 #include "paging_tmpl.h"
2289 #include "paging_tmpl.h"
2292 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2294 struct kvm_mmu *context = &vcpu->arch.mmu;
2295 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2296 u64 exb_bit_rsvd = 0;
2299 exb_bit_rsvd = rsvd_bits(63, 63);
2301 case PT32_ROOT_LEVEL:
2302 /* no rsvd bits for 2 level 4K page table entries */
2303 context->rsvd_bits_mask[0][1] = 0;
2304 context->rsvd_bits_mask[0][0] = 0;
2305 if (is_cpuid_PSE36())
2306 /* 36bits PSE 4MB page */
2307 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2309 /* 32 bits PSE 4MB page */
2310 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2311 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2313 case PT32E_ROOT_LEVEL:
2314 context->rsvd_bits_mask[0][2] =
2315 rsvd_bits(maxphyaddr, 63) |
2316 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2317 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2318 rsvd_bits(maxphyaddr, 62); /* PDE */
2319 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2320 rsvd_bits(maxphyaddr, 62); /* PTE */
2321 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2322 rsvd_bits(maxphyaddr, 62) |
2323 rsvd_bits(13, 20); /* large page */
2324 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2326 case PT64_ROOT_LEVEL:
2327 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2328 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2329 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2330 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2331 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2332 rsvd_bits(maxphyaddr, 51);
2333 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2334 rsvd_bits(maxphyaddr, 51);
2335 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2336 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2337 rsvd_bits(maxphyaddr, 51) |
2339 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2340 rsvd_bits(maxphyaddr, 51) |
2341 rsvd_bits(13, 20); /* large page */
2342 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2347 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2349 struct kvm_mmu *context = &vcpu->arch.mmu;
2351 ASSERT(is_pae(vcpu));
2352 context->new_cr3 = paging_new_cr3;
2353 context->page_fault = paging64_page_fault;
2354 context->gva_to_gpa = paging64_gva_to_gpa;
2355 context->prefetch_page = paging64_prefetch_page;
2356 context->sync_page = paging64_sync_page;
2357 context->invlpg = paging64_invlpg;
2358 context->free = paging_free;
2359 context->root_level = level;
2360 context->shadow_root_level = level;
2361 context->root_hpa = INVALID_PAGE;
2365 static int paging64_init_context(struct kvm_vcpu *vcpu)
2367 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2368 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2371 static int paging32_init_context(struct kvm_vcpu *vcpu)
2373 struct kvm_mmu *context = &vcpu->arch.mmu;
2375 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2376 context->new_cr3 = paging_new_cr3;
2377 context->page_fault = paging32_page_fault;
2378 context->gva_to_gpa = paging32_gva_to_gpa;
2379 context->free = paging_free;
2380 context->prefetch_page = paging32_prefetch_page;
2381 context->sync_page = paging32_sync_page;
2382 context->invlpg = paging32_invlpg;
2383 context->root_level = PT32_ROOT_LEVEL;
2384 context->shadow_root_level = PT32E_ROOT_LEVEL;
2385 context->root_hpa = INVALID_PAGE;
2389 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2391 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2392 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2395 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2397 struct kvm_mmu *context = &vcpu->arch.mmu;
2399 context->new_cr3 = nonpaging_new_cr3;
2400 context->page_fault = tdp_page_fault;
2401 context->free = nonpaging_free;
2402 context->prefetch_page = nonpaging_prefetch_page;
2403 context->sync_page = nonpaging_sync_page;
2404 context->invlpg = nonpaging_invlpg;
2405 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2406 context->root_hpa = INVALID_PAGE;
2408 if (!is_paging(vcpu)) {
2409 context->gva_to_gpa = nonpaging_gva_to_gpa;
2410 context->root_level = 0;
2411 } else if (is_long_mode(vcpu)) {
2412 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2413 context->gva_to_gpa = paging64_gva_to_gpa;
2414 context->root_level = PT64_ROOT_LEVEL;
2415 } else if (is_pae(vcpu)) {
2416 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2417 context->gva_to_gpa = paging64_gva_to_gpa;
2418 context->root_level = PT32E_ROOT_LEVEL;
2420 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2421 context->gva_to_gpa = paging32_gva_to_gpa;
2422 context->root_level = PT32_ROOT_LEVEL;
2428 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2433 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2435 if (!is_paging(vcpu))
2436 r = nonpaging_init_context(vcpu);
2437 else if (is_long_mode(vcpu))
2438 r = paging64_init_context(vcpu);
2439 else if (is_pae(vcpu))
2440 r = paging32E_init_context(vcpu);
2442 r = paging32_init_context(vcpu);
2444 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2449 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2451 vcpu->arch.update_pte.pfn = bad_pfn;
2454 return init_kvm_tdp_mmu(vcpu);
2456 return init_kvm_softmmu(vcpu);
2459 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2462 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2463 vcpu->arch.mmu.free(vcpu);
2464 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2468 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2470 destroy_kvm_mmu(vcpu);
2471 return init_kvm_mmu(vcpu);
2473 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2475 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2479 r = mmu_topup_memory_caches(vcpu);
2482 spin_lock(&vcpu->kvm->mmu_lock);
2483 kvm_mmu_free_some_pages(vcpu);
2484 r = mmu_alloc_roots(vcpu);
2485 mmu_sync_roots(vcpu);
2486 spin_unlock(&vcpu->kvm->mmu_lock);
2489 /* set_cr3() should ensure TLB has been flushed */
2490 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2494 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2496 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2498 mmu_free_roots(vcpu);
2501 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2502 struct kvm_mmu_page *sp,
2506 struct kvm_mmu_page *child;
2509 if (is_shadow_present_pte(pte)) {
2510 if (is_last_spte(pte, sp->role.level))
2511 rmap_remove(vcpu->kvm, spte);
2513 child = page_header(pte & PT64_BASE_ADDR_MASK);
2514 mmu_page_remove_parent_pte(child, spte);
2517 __set_spte(spte, shadow_trap_nonpresent_pte);
2518 if (is_large_pte(pte))
2519 --vcpu->kvm->stat.lpages;
2522 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2523 struct kvm_mmu_page *sp,
2527 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2528 ++vcpu->kvm->stat.mmu_pde_zapped;
2532 ++vcpu->kvm->stat.mmu_pte_updated;
2533 if (sp->role.glevels == PT32_ROOT_LEVEL)
2534 paging32_update_pte(vcpu, sp, spte, new);
2536 paging64_update_pte(vcpu, sp, spte, new);
2539 static bool need_remote_flush(u64 old, u64 new)
2541 if (!is_shadow_present_pte(old))
2543 if (!is_shadow_present_pte(new))
2545 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2547 old ^= PT64_NX_MASK;
2548 new ^= PT64_NX_MASK;
2549 return (old & ~new & PT64_PERM_MASK) != 0;
2552 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2554 if (need_remote_flush(old, new))
2555 kvm_flush_remote_tlbs(vcpu->kvm);
2557 kvm_mmu_flush_tlb(vcpu);
2560 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2562 u64 *spte = vcpu->arch.last_pte_updated;
2564 return !!(spte && (*spte & shadow_accessed_mask));
2567 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2568 const u8 *new, int bytes)
2575 if (bytes != 4 && bytes != 8)
2579 * Assume that the pte write on a page table of the same type
2580 * as the current vcpu paging mode. This is nearly always true
2581 * (might be false while changing modes). Note it is verified later
2585 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2586 if ((bytes == 4) && (gpa % 4 == 0)) {
2587 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2590 memcpy((void *)&gpte + (gpa % 8), new, 4);
2591 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2592 memcpy((void *)&gpte, new, 8);
2595 if ((bytes == 4) && (gpa % 4 == 0))
2596 memcpy((void *)&gpte, new, 4);
2598 if (!is_present_gpte(gpte))
2600 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2602 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2604 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2606 if (is_error_pfn(pfn)) {
2607 kvm_release_pfn_clean(pfn);
2610 vcpu->arch.update_pte.gfn = gfn;
2611 vcpu->arch.update_pte.pfn = pfn;
2614 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2616 u64 *spte = vcpu->arch.last_pte_updated;
2619 && vcpu->arch.last_pte_gfn == gfn
2620 && shadow_accessed_mask
2621 && !(*spte & shadow_accessed_mask)
2622 && is_shadow_present_pte(*spte))
2623 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2626 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2627 const u8 *new, int bytes,
2628 bool guest_initiated)
2630 gfn_t gfn = gpa >> PAGE_SHIFT;
2631 struct kvm_mmu_page *sp;
2632 struct hlist_node *node, *n;
2633 struct hlist_head *bucket;
2637 unsigned offset = offset_in_page(gpa);
2639 unsigned page_offset;
2640 unsigned misaligned;
2647 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2648 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2649 spin_lock(&vcpu->kvm->mmu_lock);
2650 kvm_mmu_access_page(vcpu, gfn);
2651 kvm_mmu_free_some_pages(vcpu);
2652 ++vcpu->kvm->stat.mmu_pte_write;
2653 kvm_mmu_audit(vcpu, "pre pte write");
2654 if (guest_initiated) {
2655 if (gfn == vcpu->arch.last_pt_write_gfn
2656 && !last_updated_pte_accessed(vcpu)) {
2657 ++vcpu->arch.last_pt_write_count;
2658 if (vcpu->arch.last_pt_write_count >= 3)
2661 vcpu->arch.last_pt_write_gfn = gfn;
2662 vcpu->arch.last_pt_write_count = 1;
2663 vcpu->arch.last_pte_updated = NULL;
2666 index = kvm_page_table_hashfn(gfn);
2667 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2668 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2669 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2671 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2672 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2673 misaligned |= bytes < 4;
2674 if (misaligned || flooded) {
2676 * Misaligned accesses are too much trouble to fix
2677 * up; also, they usually indicate a page is not used
2680 * If we're seeing too many writes to a page,
2681 * it may no longer be a page table, or we may be
2682 * forking, in which case it is better to unmap the
2685 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2686 gpa, bytes, sp->role.word);
2687 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2689 ++vcpu->kvm->stat.mmu_flooded;
2692 page_offset = offset;
2693 level = sp->role.level;
2695 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2696 page_offset <<= 1; /* 32->64 */
2698 * A 32-bit pde maps 4MB while the shadow pdes map
2699 * only 2MB. So we need to double the offset again
2700 * and zap two pdes instead of one.
2702 if (level == PT32_ROOT_LEVEL) {
2703 page_offset &= ~7; /* kill rounding error */
2707 quadrant = page_offset >> PAGE_SHIFT;
2708 page_offset &= ~PAGE_MASK;
2709 if (quadrant != sp->role.quadrant)
2712 spte = &sp->spt[page_offset / sizeof(*spte)];
2713 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2715 r = kvm_read_guest_atomic(vcpu->kvm,
2716 gpa & ~(u64)(pte_size - 1),
2718 new = (const void *)&gentry;
2724 mmu_pte_write_zap_pte(vcpu, sp, spte);
2726 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2727 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2731 kvm_mmu_audit(vcpu, "post pte write");
2732 spin_unlock(&vcpu->kvm->mmu_lock);
2733 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2734 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2735 vcpu->arch.update_pte.pfn = bad_pfn;
2739 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2747 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2749 spin_lock(&vcpu->kvm->mmu_lock);
2750 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2751 spin_unlock(&vcpu->kvm->mmu_lock);
2754 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2756 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2758 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2759 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2760 struct kvm_mmu_page *sp;
2762 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2763 struct kvm_mmu_page, link);
2764 kvm_mmu_zap_page(vcpu->kvm, sp);
2765 ++vcpu->kvm->stat.mmu_recycled;
2769 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2772 enum emulation_result er;
2774 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2783 r = mmu_topup_memory_caches(vcpu);
2787 er = emulate_instruction(vcpu, cr2, error_code, 0);
2792 case EMULATE_DO_MMIO:
2793 ++vcpu->stat.mmio_exits;
2796 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2797 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2798 vcpu->run->internal.ndata = 0;
2806 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2808 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2810 vcpu->arch.mmu.invlpg(vcpu, gva);
2811 kvm_mmu_flush_tlb(vcpu);
2812 ++vcpu->stat.invlpg;
2814 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2816 void kvm_enable_tdp(void)
2820 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2822 void kvm_disable_tdp(void)
2824 tdp_enabled = false;
2826 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2828 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2830 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2833 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2841 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2842 * Therefore we need to allocate shadow page tables in the first
2843 * 4GB of memory, which happens to fit the DMA32 zone.
2845 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2848 vcpu->arch.mmu.pae_root = page_address(page);
2849 for (i = 0; i < 4; ++i)
2850 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2855 free_mmu_pages(vcpu);
2859 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2862 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2864 return alloc_mmu_pages(vcpu);
2867 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2870 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2872 return init_kvm_mmu(vcpu);
2875 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2879 destroy_kvm_mmu(vcpu);
2880 free_mmu_pages(vcpu);
2881 mmu_free_memory_caches(vcpu);
2884 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2886 struct kvm_mmu_page *sp;
2888 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2892 if (!test_bit(slot, sp->slot_bitmap))
2896 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2898 if (pt[i] & PT_WRITABLE_MASK)
2899 pt[i] &= ~PT_WRITABLE_MASK;
2901 kvm_flush_remote_tlbs(kvm);
2904 void kvm_mmu_zap_all(struct kvm *kvm)
2906 struct kvm_mmu_page *sp, *node;
2908 spin_lock(&kvm->mmu_lock);
2909 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2910 if (kvm_mmu_zap_page(kvm, sp))
2911 node = container_of(kvm->arch.active_mmu_pages.next,
2912 struct kvm_mmu_page, link);
2913 spin_unlock(&kvm->mmu_lock);
2915 kvm_flush_remote_tlbs(kvm);
2918 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2920 struct kvm_mmu_page *page;
2922 page = container_of(kvm->arch.active_mmu_pages.prev,
2923 struct kvm_mmu_page, link);
2924 kvm_mmu_zap_page(kvm, page);
2927 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2930 struct kvm *kvm_freed = NULL;
2931 int cache_count = 0;
2933 spin_lock(&kvm_lock);
2935 list_for_each_entry(kvm, &vm_list, vm_list) {
2938 idx = srcu_read_lock(&kvm->srcu);
2939 spin_lock(&kvm->mmu_lock);
2940 npages = kvm->arch.n_alloc_mmu_pages -
2941 kvm->arch.n_free_mmu_pages;
2942 cache_count += npages;
2943 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2944 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2950 spin_unlock(&kvm->mmu_lock);
2951 srcu_read_unlock(&kvm->srcu, idx);
2954 list_move_tail(&kvm_freed->vm_list, &vm_list);
2956 spin_unlock(&kvm_lock);
2961 static struct shrinker mmu_shrinker = {
2962 .shrink = mmu_shrink,
2963 .seeks = DEFAULT_SEEKS * 10,
2966 static void mmu_destroy_caches(void)
2968 if (pte_chain_cache)
2969 kmem_cache_destroy(pte_chain_cache);
2970 if (rmap_desc_cache)
2971 kmem_cache_destroy(rmap_desc_cache);
2972 if (mmu_page_header_cache)
2973 kmem_cache_destroy(mmu_page_header_cache);
2976 void kvm_mmu_module_exit(void)
2978 mmu_destroy_caches();
2979 unregister_shrinker(&mmu_shrinker);
2982 int kvm_mmu_module_init(void)
2984 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2985 sizeof(struct kvm_pte_chain),
2987 if (!pte_chain_cache)
2989 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2990 sizeof(struct kvm_rmap_desc),
2992 if (!rmap_desc_cache)
2995 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2996 sizeof(struct kvm_mmu_page),
2998 if (!mmu_page_header_cache)
3001 register_shrinker(&mmu_shrinker);
3006 mmu_destroy_caches();
3011 * Caculate mmu pages needed for kvm.
3013 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3016 unsigned int nr_mmu_pages;
3017 unsigned int nr_pages = 0;
3018 struct kvm_memslots *slots;
3020 slots = rcu_dereference(kvm->memslots);
3021 for (i = 0; i < slots->nmemslots; i++)
3022 nr_pages += slots->memslots[i].npages;
3024 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3025 nr_mmu_pages = max(nr_mmu_pages,
3026 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3028 return nr_mmu_pages;
3031 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3034 if (len > buffer->len)
3039 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3044 ret = pv_mmu_peek_buffer(buffer, len);
3049 buffer->processed += len;
3053 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3054 gpa_t addr, gpa_t value)
3059 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3062 r = mmu_topup_memory_caches(vcpu);
3066 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3072 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3074 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3078 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3080 spin_lock(&vcpu->kvm->mmu_lock);
3081 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3082 spin_unlock(&vcpu->kvm->mmu_lock);
3086 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3087 struct kvm_pv_mmu_op_buffer *buffer)
3089 struct kvm_mmu_op_header *header;
3091 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3094 switch (header->op) {
3095 case KVM_MMU_OP_WRITE_PTE: {
3096 struct kvm_mmu_op_write_pte *wpte;
3098 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3101 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3104 case KVM_MMU_OP_FLUSH_TLB: {
3105 struct kvm_mmu_op_flush_tlb *ftlb;
3107 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3110 return kvm_pv_mmu_flush_tlb(vcpu);
3112 case KVM_MMU_OP_RELEASE_PT: {
3113 struct kvm_mmu_op_release_pt *rpt;
3115 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3118 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3124 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3125 gpa_t addr, unsigned long *ret)
3128 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3130 buffer->ptr = buffer->buf;
3131 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3132 buffer->processed = 0;
3134 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3138 while (buffer->len) {
3139 r = kvm_pv_mmu_op_one(vcpu, buffer);
3148 *ret = buffer->processed;
3152 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3154 struct kvm_shadow_walk_iterator iterator;
3157 spin_lock(&vcpu->kvm->mmu_lock);
3158 for_each_shadow_entry(vcpu, addr, iterator) {
3159 sptes[iterator.level-1] = *iterator.sptep;
3161 if (!is_shadow_present_pte(*iterator.sptep))
3164 spin_unlock(&vcpu->kvm->mmu_lock);
3168 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3172 static const char *audit_msg;
3174 static gva_t canonicalize(gva_t gva)
3176 #ifdef CONFIG_X86_64
3177 gva = (long long)(gva << 16) >> 16;
3183 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3186 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3191 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3192 u64 ent = sp->spt[i];
3194 if (is_shadow_present_pte(ent)) {
3195 if (!is_last_spte(ent, sp->role.level)) {
3196 struct kvm_mmu_page *child;
3197 child = page_header(ent & PT64_BASE_ADDR_MASK);
3198 __mmu_spte_walk(kvm, child, fn);
3200 fn(kvm, sp, &sp->spt[i]);
3205 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3208 struct kvm_mmu_page *sp;
3210 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3212 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3213 hpa_t root = vcpu->arch.mmu.root_hpa;
3214 sp = page_header(root);
3215 __mmu_spte_walk(vcpu->kvm, sp, fn);
3218 for (i = 0; i < 4; ++i) {
3219 hpa_t root = vcpu->arch.mmu.pae_root[i];
3221 if (root && VALID_PAGE(root)) {
3222 root &= PT64_BASE_ADDR_MASK;
3223 sp = page_header(root);
3224 __mmu_spte_walk(vcpu->kvm, sp, fn);
3230 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3231 gva_t va, int level)
3233 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3235 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3237 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3240 if (ent == shadow_trap_nonpresent_pte)
3243 va = canonicalize(va);
3244 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3245 audit_mappings_page(vcpu, ent, va, level - 1);
3247 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3248 gfn_t gfn = gpa >> PAGE_SHIFT;
3249 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3250 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3252 if (is_error_pfn(pfn)) {
3253 kvm_release_pfn_clean(pfn);
3257 if (is_shadow_present_pte(ent)
3258 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3259 printk(KERN_ERR "xx audit error: (%s) levels %d"
3260 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3261 audit_msg, vcpu->arch.mmu.root_level,
3263 is_shadow_present_pte(ent));
3264 else if (ent == shadow_notrap_nonpresent_pte
3265 && !is_error_hpa(hpa))
3266 printk(KERN_ERR "audit: (%s) notrap shadow,"
3267 " valid guest gva %lx\n", audit_msg, va);
3268 kvm_release_pfn_clean(pfn);
3274 static void audit_mappings(struct kvm_vcpu *vcpu)
3278 if (vcpu->arch.mmu.root_level == 4)
3279 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3281 for (i = 0; i < 4; ++i)
3282 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3283 audit_mappings_page(vcpu,
3284 vcpu->arch.mmu.pae_root[i],
3289 static int count_rmaps(struct kvm_vcpu *vcpu)
3294 idx = srcu_read_lock(&kvm->srcu);
3295 slots = rcu_dereference(kvm->memslots);
3296 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3297 struct kvm_memory_slot *m = &slots->memslots[i];
3298 struct kvm_rmap_desc *d;
3300 for (j = 0; j < m->npages; ++j) {
3301 unsigned long *rmapp = &m->rmap[j];
3305 if (!(*rmapp & 1)) {
3309 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3311 for (k = 0; k < RMAP_EXT; ++k)
3320 srcu_read_unlock(&kvm->srcu, idx);
3324 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3326 unsigned long *rmapp;
3327 struct kvm_mmu_page *rev_sp;
3330 if (*sptep & PT_WRITABLE_MASK) {
3331 rev_sp = page_header(__pa(sptep));
3332 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3334 if (!gfn_to_memslot(kvm, gfn)) {
3335 if (!printk_ratelimit())
3337 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3339 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3340 audit_msg, sptep - rev_sp->spt,
3346 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3347 is_large_pte(*sptep));
3349 if (!printk_ratelimit())
3351 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3359 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3361 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3364 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3366 struct kvm_mmu_page *sp;
3369 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3372 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3375 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3378 if (!(ent & PT_PRESENT_MASK))
3380 if (!(ent & PT_WRITABLE_MASK))
3382 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3388 static void audit_rmap(struct kvm_vcpu *vcpu)
3390 check_writable_mappings_rmap(vcpu);
3394 static void audit_write_protection(struct kvm_vcpu *vcpu)
3396 struct kvm_mmu_page *sp;
3397 struct kvm_memory_slot *slot;
3398 unsigned long *rmapp;
3402 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3403 if (sp->role.direct)
3408 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3409 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3410 rmapp = &slot->rmap[gfn - slot->base_gfn];
3412 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3414 if (*spte & PT_WRITABLE_MASK)
3415 printk(KERN_ERR "%s: (%s) shadow page has "
3416 "writable mappings: gfn %lx role %x\n",
3417 __func__, audit_msg, sp->gfn,
3419 spte = rmap_next(vcpu->kvm, rmapp, spte);
3424 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3431 audit_write_protection(vcpu);
3432 if (strcmp("pre pte write", audit_msg) != 0)
3433 audit_mappings(vcpu);
3434 audit_writable_sptes_have_rmaps(vcpu);