1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
6 * machines without emulation or binary translation.
10 * Copyright (C) 2006 Qumranet, Inc.
11 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Avi Kivity <avi@qumranet.com>
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22 #include "mmu_internal.h"
25 #include "kvm_cache_regs.h"
27 #include "kvm_emulate.h"
28 #include "page_track.h"
32 #include <linux/kvm_host.h>
33 #include <linux/types.h>
34 #include <linux/string.h>
36 #include <linux/highmem.h>
37 #include <linux/moduleparam.h>
38 #include <linux/export.h>
39 #include <linux/swap.h>
40 #include <linux/hugetlb.h>
41 #include <linux/compiler.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/sched/signal.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <linux/kern_levels.h>
48 #include <linux/kstrtox.h>
49 #include <linux/kthread.h>
52 #include <asm/memtype.h>
53 #include <asm/cmpxchg.h>
55 #include <asm/set_memory.h>
60 extern bool itlb_multihit_kvm_mitigation;
62 static bool nx_hugepage_mitigation_hard_disabled;
64 int __read_mostly nx_huge_pages = -1;
65 static uint __read_mostly nx_huge_pages_recovery_period_ms;
66 #ifdef CONFIG_PREEMPT_RT
67 /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */
68 static uint __read_mostly nx_huge_pages_recovery_ratio = 0;
70 static uint __read_mostly nx_huge_pages_recovery_ratio = 60;
73 static int get_nx_huge_pages(char *buffer, const struct kernel_param *kp);
74 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp);
75 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp);
77 static const struct kernel_param_ops nx_huge_pages_ops = {
78 .set = set_nx_huge_pages,
79 .get = get_nx_huge_pages,
82 static const struct kernel_param_ops nx_huge_pages_recovery_param_ops = {
83 .set = set_nx_huge_pages_recovery_param,
84 .get = param_get_uint,
87 module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644);
88 __MODULE_PARM_TYPE(nx_huge_pages, "bool");
89 module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_param_ops,
90 &nx_huge_pages_recovery_ratio, 0644);
91 __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint");
92 module_param_cb(nx_huge_pages_recovery_period_ms, &nx_huge_pages_recovery_param_ops,
93 &nx_huge_pages_recovery_period_ms, 0644);
94 __MODULE_PARM_TYPE(nx_huge_pages_recovery_period_ms, "uint");
96 static bool __read_mostly force_flush_and_sync_on_reuse;
97 module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644);
100 * When setting this variable to true it enables Two-Dimensional-Paging
101 * where the hardware walks 2 page tables:
102 * 1. the guest-virtual to guest-physical
103 * 2. while doing 1. it walks guest-physical to host-physical
104 * If the hardware supports that we don't need to do shadow paging.
106 bool tdp_enabled = false;
108 static bool __ro_after_init tdp_mmu_allowed;
111 bool __read_mostly tdp_mmu_enabled = true;
112 module_param_named(tdp_mmu, tdp_mmu_enabled, bool, 0444);
115 static int max_huge_page_level __read_mostly;
116 static int tdp_root_level __read_mostly;
117 static int max_tdp_level __read_mostly;
119 #define PTE_PREFETCH_NUM 8
121 #include <trace/events/kvm.h>
123 /* make pte_list_desc fit well in cache lines */
124 #define PTE_LIST_EXT 14
127 * struct pte_list_desc is the core data structure used to implement a custom
128 * list for tracking a set of related SPTEs, e.g. all the SPTEs that map a
129 * given GFN when used in the context of rmaps. Using a custom list allows KVM
130 * to optimize for the common case where many GFNs will have at most a handful
131 * of SPTEs pointing at them, i.e. allows packing multiple SPTEs into a small
132 * memory footprint, which in turn improves runtime performance by exploiting
135 * A list is comprised of one or more pte_list_desc objects (descriptors).
136 * Each individual descriptor stores up to PTE_LIST_EXT SPTEs. If a descriptor
137 * is full and a new SPTEs needs to be added, a new descriptor is allocated and
138 * becomes the head of the list. This means that by definitions, all tail
139 * descriptors are full.
141 * Note, the meta data fields are deliberately placed at the start of the
142 * structure to optimize the cacheline layout; accessing the descriptor will
143 * touch only a single cacheline so long as @spte_count<=6 (or if only the
144 * descriptors metadata is accessed).
146 struct pte_list_desc {
147 struct pte_list_desc *more;
148 /* The number of PTEs stored in _this_ descriptor. */
150 /* The number of PTEs stored in all tails of this descriptor. */
152 u64 *sptes[PTE_LIST_EXT];
155 struct kvm_shadow_walk_iterator {
163 #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \
164 for (shadow_walk_init_using_root(&(_walker), (_vcpu), \
166 shadow_walk_okay(&(_walker)); \
167 shadow_walk_next(&(_walker)))
169 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
170 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
171 shadow_walk_okay(&(_walker)); \
172 shadow_walk_next(&(_walker)))
174 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
175 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
176 shadow_walk_okay(&(_walker)) && \
177 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
178 __shadow_walk_next(&(_walker), spte))
180 static struct kmem_cache *pte_list_desc_cache;
181 struct kmem_cache *mmu_page_header_cache;
182 static struct percpu_counter kvm_total_used_mmu_pages;
184 static void mmu_spte_set(u64 *sptep, u64 spte);
186 struct kvm_mmu_role_regs {
187 const unsigned long cr0;
188 const unsigned long cr4;
192 #define CREATE_TRACE_POINTS
193 #include "mmutrace.h"
196 * Yes, lot's of underscores. They're a hint that you probably shouldn't be
197 * reading from the role_regs. Once the root_role is constructed, it becomes
198 * the single source of truth for the MMU's state.
200 #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \
201 static inline bool __maybe_unused \
202 ____is_##reg##_##name(const struct kvm_mmu_role_regs *regs) \
204 return !!(regs->reg & flag); \
206 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG);
207 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP);
208 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pse, X86_CR4_PSE);
209 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE);
210 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP);
211 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smap, X86_CR4_SMAP);
212 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pke, X86_CR4_PKE);
213 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, la57, X86_CR4_LA57);
214 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, nx, EFER_NX);
215 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, lma, EFER_LMA);
218 * The MMU itself (with a valid role) is the single source of truth for the
219 * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The
220 * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1,
221 * and the vCPU may be incorrect/irrelevant.
223 #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \
224 static inline bool __maybe_unused is_##reg##_##name(struct kvm_mmu *mmu) \
226 return !!(mmu->cpu_role. base_or_ext . reg##_##name); \
228 BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp);
229 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse);
230 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep);
231 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap);
232 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke);
233 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57);
234 BUILD_MMU_ROLE_ACCESSOR(base, efer, nx);
235 BUILD_MMU_ROLE_ACCESSOR(ext, efer, lma);
237 static inline bool is_cr0_pg(struct kvm_mmu *mmu)
239 return mmu->cpu_role.base.level > 0;
242 static inline bool is_cr4_pae(struct kvm_mmu *mmu)
244 return !mmu->cpu_role.base.has_4_byte_gpte;
247 static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu)
249 struct kvm_mmu_role_regs regs = {
250 .cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS),
251 .cr4 = kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS),
252 .efer = vcpu->arch.efer,
258 static unsigned long get_guest_cr3(struct kvm_vcpu *vcpu)
260 return kvm_read_cr3(vcpu);
263 static inline unsigned long kvm_mmu_get_guest_pgd(struct kvm_vcpu *vcpu,
266 if (IS_ENABLED(CONFIG_RETPOLINE) && mmu->get_guest_pgd == get_guest_cr3)
267 return kvm_read_cr3(vcpu);
269 return mmu->get_guest_pgd(vcpu);
272 static inline bool kvm_available_flush_remote_tlbs_range(void)
274 #if IS_ENABLED(CONFIG_HYPERV)
275 return kvm_x86_ops.flush_remote_tlbs_range;
281 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index);
283 /* Flush the range of guest memory mapped by the given SPTE. */
284 static void kvm_flush_remote_tlbs_sptep(struct kvm *kvm, u64 *sptep)
286 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
287 gfn_t gfn = kvm_mmu_page_get_gfn(sp, spte_index(sptep));
289 kvm_flush_remote_tlbs_gfn(kvm, gfn, sp->role.level);
292 static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn,
295 u64 spte = make_mmio_spte(vcpu, gfn, access);
297 trace_mark_mmio_spte(sptep, gfn, spte);
298 mmu_spte_set(sptep, spte);
301 static gfn_t get_mmio_spte_gfn(u64 spte)
303 u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask;
305 gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN)
306 & shadow_nonpresent_or_rsvd_mask;
308 return gpa >> PAGE_SHIFT;
311 static unsigned get_mmio_spte_access(u64 spte)
313 return spte & shadow_mmio_access_mask;
316 static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)
318 u64 kvm_gen, spte_gen, gen;
320 gen = kvm_vcpu_memslots(vcpu)->generation;
321 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
324 kvm_gen = gen & MMIO_SPTE_GEN_MASK;
325 spte_gen = get_mmio_spte_generation(spte);
327 trace_check_mmio_spte(spte, kvm_gen, spte_gen);
328 return likely(kvm_gen == spte_gen);
331 static int is_cpuid_PSE36(void)
337 static void __set_spte(u64 *sptep, u64 spte)
339 WRITE_ONCE(*sptep, spte);
342 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
344 WRITE_ONCE(*sptep, spte);
347 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
349 return xchg(sptep, spte);
352 static u64 __get_spte_lockless(u64 *sptep)
354 return READ_ONCE(*sptep);
365 static void count_spte_clear(u64 *sptep, u64 spte)
367 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
369 if (is_shadow_present_pte(spte))
372 /* Ensure the spte is completely set before we increase the count */
374 sp->clear_spte_count++;
377 static void __set_spte(u64 *sptep, u64 spte)
379 union split_spte *ssptep, sspte;
381 ssptep = (union split_spte *)sptep;
382 sspte = (union split_spte)spte;
384 ssptep->spte_high = sspte.spte_high;
387 * If we map the spte from nonpresent to present, We should store
388 * the high bits firstly, then set present bit, so cpu can not
389 * fetch this spte while we are setting the spte.
393 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
396 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
398 union split_spte *ssptep, sspte;
400 ssptep = (union split_spte *)sptep;
401 sspte = (union split_spte)spte;
403 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
406 * If we map the spte from present to nonpresent, we should clear
407 * present bit firstly to avoid vcpu fetch the old high bits.
411 ssptep->spte_high = sspte.spte_high;
412 count_spte_clear(sptep, spte);
415 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
417 union split_spte *ssptep, sspte, orig;
419 ssptep = (union split_spte *)sptep;
420 sspte = (union split_spte)spte;
422 /* xchg acts as a barrier before the setting of the high bits */
423 orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
424 orig.spte_high = ssptep->spte_high;
425 ssptep->spte_high = sspte.spte_high;
426 count_spte_clear(sptep, spte);
432 * The idea using the light way get the spte on x86_32 guest is from
433 * gup_get_pte (mm/gup.c).
435 * An spte tlb flush may be pending, because kvm_set_pte_rmap
436 * coalesces them and we are running out of the MMU lock. Therefore
437 * we need to protect against in-progress updates of the spte.
439 * Reading the spte while an update is in progress may get the old value
440 * for the high part of the spte. The race is fine for a present->non-present
441 * change (because the high part of the spte is ignored for non-present spte),
442 * but for a present->present change we must reread the spte.
444 * All such changes are done in two steps (present->non-present and
445 * non-present->present), hence it is enough to count the number of
446 * present->non-present updates: if it changed while reading the spte,
447 * we might have hit the race. This is done using clear_spte_count.
449 static u64 __get_spte_lockless(u64 *sptep)
451 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
452 union split_spte spte, *orig = (union split_spte *)sptep;
456 count = sp->clear_spte_count;
459 spte.spte_low = orig->spte_low;
462 spte.spte_high = orig->spte_high;
465 if (unlikely(spte.spte_low != orig->spte_low ||
466 count != sp->clear_spte_count))
473 /* Rules for using mmu_spte_set:
474 * Set the sptep from nonpresent to present.
475 * Note: the sptep being assigned *must* be either not present
476 * or in a state where the hardware will not attempt to update
479 static void mmu_spte_set(u64 *sptep, u64 new_spte)
481 WARN_ON_ONCE(is_shadow_present_pte(*sptep));
482 __set_spte(sptep, new_spte);
486 * Update the SPTE (excluding the PFN), but do not track changes in its
487 * accessed/dirty status.
489 static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte)
491 u64 old_spte = *sptep;
493 WARN_ON_ONCE(!is_shadow_present_pte(new_spte));
494 check_spte_writable_invariants(new_spte);
496 if (!is_shadow_present_pte(old_spte)) {
497 mmu_spte_set(sptep, new_spte);
501 if (!spte_has_volatile_bits(old_spte))
502 __update_clear_spte_fast(sptep, new_spte);
504 old_spte = __update_clear_spte_slow(sptep, new_spte);
506 WARN_ON_ONCE(spte_to_pfn(old_spte) != spte_to_pfn(new_spte));
511 /* Rules for using mmu_spte_update:
512 * Update the state bits, it means the mapped pfn is not changed.
514 * Whenever an MMU-writable SPTE is overwritten with a read-only SPTE, remote
515 * TLBs must be flushed. Otherwise rmap_write_protect will find a read-only
516 * spte, even though the writable spte might be cached on a CPU's TLB.
518 * Returns true if the TLB needs to be flushed
520 static bool mmu_spte_update(u64 *sptep, u64 new_spte)
523 u64 old_spte = mmu_spte_update_no_track(sptep, new_spte);
525 if (!is_shadow_present_pte(old_spte))
529 * For the spte updated out of mmu-lock is safe, since
530 * we always atomically update it, see the comments in
531 * spte_has_volatile_bits().
533 if (is_mmu_writable_spte(old_spte) &&
534 !is_writable_pte(new_spte))
538 * Flush TLB when accessed/dirty states are changed in the page tables,
539 * to guarantee consistency between TLB and page tables.
542 if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) {
544 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
547 if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) {
549 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
556 * Rules for using mmu_spte_clear_track_bits:
557 * It sets the sptep from present to nonpresent, and track the
558 * state bits, it is used to clear the last level sptep.
559 * Returns the old PTE.
561 static u64 mmu_spte_clear_track_bits(struct kvm *kvm, u64 *sptep)
564 u64 old_spte = *sptep;
565 int level = sptep_to_sp(sptep)->role.level;
568 if (!is_shadow_present_pte(old_spte) ||
569 !spte_has_volatile_bits(old_spte))
570 __update_clear_spte_fast(sptep, 0ull);
572 old_spte = __update_clear_spte_slow(sptep, 0ull);
574 if (!is_shadow_present_pte(old_spte))
577 kvm_update_page_stats(kvm, level, -1);
579 pfn = spte_to_pfn(old_spte);
582 * KVM doesn't hold a reference to any pages mapped into the guest, and
583 * instead uses the mmu_notifier to ensure that KVM unmaps any pages
584 * before they are reclaimed. Sanity check that, if the pfn is backed
585 * by a refcounted page, the refcount is elevated.
587 page = kvm_pfn_to_refcounted_page(pfn);
588 WARN_ON_ONCE(page && !page_count(page));
590 if (is_accessed_spte(old_spte))
591 kvm_set_pfn_accessed(pfn);
593 if (is_dirty_spte(old_spte))
594 kvm_set_pfn_dirty(pfn);
600 * Rules for using mmu_spte_clear_no_track:
601 * Directly clear spte without caring the state bits of sptep,
602 * it is used to set the upper level spte.
604 static void mmu_spte_clear_no_track(u64 *sptep)
606 __update_clear_spte_fast(sptep, 0ull);
609 static u64 mmu_spte_get_lockless(u64 *sptep)
611 return __get_spte_lockless(sptep);
614 /* Returns the Accessed status of the PTE and resets it at the same time. */
615 static bool mmu_spte_age(u64 *sptep)
617 u64 spte = mmu_spte_get_lockless(sptep);
619 if (!is_accessed_spte(spte))
622 if (spte_ad_enabled(spte)) {
623 clear_bit((ffs(shadow_accessed_mask) - 1),
624 (unsigned long *)sptep);
627 * Capture the dirty status of the page, so that it doesn't get
628 * lost when the SPTE is marked for access tracking.
630 if (is_writable_pte(spte))
631 kvm_set_pfn_dirty(spte_to_pfn(spte));
633 spte = mark_spte_for_access_track(spte);
634 mmu_spte_update_no_track(sptep, spte);
640 static inline bool is_tdp_mmu_active(struct kvm_vcpu *vcpu)
642 return tdp_mmu_enabled && vcpu->arch.mmu->root_role.direct;
645 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
647 if (is_tdp_mmu_active(vcpu)) {
648 kvm_tdp_mmu_walk_lockless_begin();
651 * Prevent page table teardown by making any free-er wait during
652 * kvm_flush_remote_tlbs() IPI to all active vcpus.
657 * Make sure a following spte read is not reordered ahead of the write
660 smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES);
664 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
666 if (is_tdp_mmu_active(vcpu)) {
667 kvm_tdp_mmu_walk_lockless_end();
670 * Make sure the write to vcpu->mode is not reordered in front of
671 * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us
672 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
674 smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE);
679 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect)
683 /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */
684 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
685 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM);
688 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache,
689 PT64_ROOT_MAX_LEVEL);
692 if (maybe_indirect) {
693 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadowed_info_cache,
694 PT64_ROOT_MAX_LEVEL);
698 return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
699 PT64_ROOT_MAX_LEVEL);
702 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
704 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache);
705 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache);
706 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadowed_info_cache);
707 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
710 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
712 kmem_cache_free(pte_list_desc_cache, pte_list_desc);
715 static bool sp_has_gptes(struct kvm_mmu_page *sp);
717 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
719 if (sp->role.passthrough)
722 if (!sp->role.direct)
723 return sp->shadowed_translation[index] >> PAGE_SHIFT;
725 return sp->gfn + (index << ((sp->role.level - 1) * SPTE_LEVEL_BITS));
729 * For leaf SPTEs, fetch the *guest* access permissions being shadowed. Note
730 * that the SPTE itself may have a more constrained access permissions that
731 * what the guest enforces. For example, a guest may create an executable
732 * huge PTE but KVM may disallow execution to mitigate iTLB multihit.
734 static u32 kvm_mmu_page_get_access(struct kvm_mmu_page *sp, int index)
736 if (sp_has_gptes(sp))
737 return sp->shadowed_translation[index] & ACC_ALL;
740 * For direct MMUs (e.g. TDP or non-paging guests) or passthrough SPs,
741 * KVM is not shadowing any guest page tables, so the "guest access
742 * permissions" are just ACC_ALL.
744 * For direct SPs in indirect MMUs (shadow paging), i.e. when KVM
745 * is shadowing a guest huge page with small pages, the guest access
746 * permissions being shadowed are the access permissions of the huge
749 * In both cases, sp->role.access contains the correct access bits.
751 return sp->role.access;
754 static void kvm_mmu_page_set_translation(struct kvm_mmu_page *sp, int index,
755 gfn_t gfn, unsigned int access)
757 if (sp_has_gptes(sp)) {
758 sp->shadowed_translation[index] = (gfn << PAGE_SHIFT) | access;
762 WARN_ONCE(access != kvm_mmu_page_get_access(sp, index),
763 "access mismatch under %s page %llx (expected %u, got %u)\n",
764 sp->role.passthrough ? "passthrough" : "direct",
765 sp->gfn, kvm_mmu_page_get_access(sp, index), access);
767 WARN_ONCE(gfn != kvm_mmu_page_get_gfn(sp, index),
768 "gfn mismatch under %s page %llx (expected %llx, got %llx)\n",
769 sp->role.passthrough ? "passthrough" : "direct",
770 sp->gfn, kvm_mmu_page_get_gfn(sp, index), gfn);
773 static void kvm_mmu_page_set_access(struct kvm_mmu_page *sp, int index,
776 gfn_t gfn = kvm_mmu_page_get_gfn(sp, index);
778 kvm_mmu_page_set_translation(sp, index, gfn, access);
782 * Return the pointer to the large page information for a given gfn,
783 * handling slots that are not large page aligned.
785 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
786 const struct kvm_memory_slot *slot, int level)
790 idx = gfn_to_index(gfn, slot->base_gfn, level);
791 return &slot->arch.lpage_info[level - 2][idx];
795 * The most significant bit in disallow_lpage tracks whether or not memory
796 * attributes are mixed, i.e. not identical for all gfns at the current level.
797 * The lower order bits are used to refcount other cases where a hugepage is
798 * disallowed, e.g. if KVM has shadow a page table at the gfn.
800 #define KVM_LPAGE_MIXED_FLAG BIT(31)
802 static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot *slot,
803 gfn_t gfn, int count)
805 struct kvm_lpage_info *linfo;
808 for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
809 linfo = lpage_info_slot(gfn, slot, i);
811 old = linfo->disallow_lpage;
812 linfo->disallow_lpage += count;
813 WARN_ON_ONCE((old ^ linfo->disallow_lpage) & KVM_LPAGE_MIXED_FLAG);
817 void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
819 update_gfn_disallow_lpage_count(slot, gfn, 1);
822 void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
824 update_gfn_disallow_lpage_count(slot, gfn, -1);
827 static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
829 struct kvm_memslots *slots;
830 struct kvm_memory_slot *slot;
833 kvm->arch.indirect_shadow_pages++;
835 slots = kvm_memslots_for_spte_role(kvm, sp->role);
836 slot = __gfn_to_memslot(slots, gfn);
838 /* the non-leaf shadow pages are keeping readonly. */
839 if (sp->role.level > PG_LEVEL_4K)
840 return __kvm_write_track_add_gfn(kvm, slot, gfn);
842 kvm_mmu_gfn_disallow_lpage(slot, gfn);
844 if (kvm_mmu_slot_gfn_write_protect(kvm, slot, gfn, PG_LEVEL_4K))
845 kvm_flush_remote_tlbs_gfn(kvm, gfn, PG_LEVEL_4K);
848 void track_possible_nx_huge_page(struct kvm *kvm, struct kvm_mmu_page *sp)
851 * If it's possible to replace the shadow page with an NX huge page,
852 * i.e. if the shadow page is the only thing currently preventing KVM
853 * from using a huge page, add the shadow page to the list of "to be
854 * zapped for NX recovery" pages. Note, the shadow page can already be
855 * on the list if KVM is reusing an existing shadow page, i.e. if KVM
856 * links a shadow page at multiple points.
858 if (!list_empty(&sp->possible_nx_huge_page_link))
861 ++kvm->stat.nx_lpage_splits;
862 list_add_tail(&sp->possible_nx_huge_page_link,
863 &kvm->arch.possible_nx_huge_pages);
866 static void account_nx_huge_page(struct kvm *kvm, struct kvm_mmu_page *sp,
867 bool nx_huge_page_possible)
869 sp->nx_huge_page_disallowed = true;
871 if (nx_huge_page_possible)
872 track_possible_nx_huge_page(kvm, sp);
875 static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
877 struct kvm_memslots *slots;
878 struct kvm_memory_slot *slot;
881 kvm->arch.indirect_shadow_pages--;
883 slots = kvm_memslots_for_spte_role(kvm, sp->role);
884 slot = __gfn_to_memslot(slots, gfn);
885 if (sp->role.level > PG_LEVEL_4K)
886 return __kvm_write_track_remove_gfn(kvm, slot, gfn);
888 kvm_mmu_gfn_allow_lpage(slot, gfn);
891 void untrack_possible_nx_huge_page(struct kvm *kvm, struct kvm_mmu_page *sp)
893 if (list_empty(&sp->possible_nx_huge_page_link))
896 --kvm->stat.nx_lpage_splits;
897 list_del_init(&sp->possible_nx_huge_page_link);
900 static void unaccount_nx_huge_page(struct kvm *kvm, struct kvm_mmu_page *sp)
902 sp->nx_huge_page_disallowed = false;
904 untrack_possible_nx_huge_page(kvm, sp);
907 static struct kvm_memory_slot *gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu,
911 struct kvm_memory_slot *slot;
913 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
914 if (!slot || slot->flags & KVM_MEMSLOT_INVALID)
916 if (no_dirty_log && kvm_slot_dirty_track_enabled(slot))
923 * About rmap_head encoding:
925 * If the bit zero of rmap_head->val is clear, then it points to the only spte
926 * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct
927 * pte_list_desc containing more mappings.
931 * Returns the number of pointers in the rmap chain, not counting the new one.
933 static int pte_list_add(struct kvm_mmu_memory_cache *cache, u64 *spte,
934 struct kvm_rmap_head *rmap_head)
936 struct pte_list_desc *desc;
939 if (!rmap_head->val) {
940 rmap_head->val = (unsigned long)spte;
941 } else if (!(rmap_head->val & 1)) {
942 desc = kvm_mmu_memory_cache_alloc(cache);
943 desc->sptes[0] = (u64 *)rmap_head->val;
944 desc->sptes[1] = spte;
945 desc->spte_count = 2;
946 desc->tail_count = 0;
947 rmap_head->val = (unsigned long)desc | 1;
950 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
951 count = desc->tail_count + desc->spte_count;
954 * If the previous head is full, allocate a new head descriptor
955 * as tail descriptors are always kept full.
957 if (desc->spte_count == PTE_LIST_EXT) {
958 desc = kvm_mmu_memory_cache_alloc(cache);
959 desc->more = (struct pte_list_desc *)(rmap_head->val & ~1ul);
960 desc->spte_count = 0;
961 desc->tail_count = count;
962 rmap_head->val = (unsigned long)desc | 1;
964 desc->sptes[desc->spte_count++] = spte;
969 static void pte_list_desc_remove_entry(struct kvm *kvm,
970 struct kvm_rmap_head *rmap_head,
971 struct pte_list_desc *desc, int i)
973 struct pte_list_desc *head_desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
974 int j = head_desc->spte_count - 1;
977 * The head descriptor should never be empty. A new head is added only
978 * when adding an entry and the previous head is full, and heads are
979 * removed (this flow) when they become empty.
981 KVM_BUG_ON_DATA_CORRUPTION(j < 0, kvm);
984 * Replace the to-be-freed SPTE with the last valid entry from the head
985 * descriptor to ensure that tail descriptors are full at all times.
986 * Note, this also means that tail_count is stable for each descriptor.
988 desc->sptes[i] = head_desc->sptes[j];
989 head_desc->sptes[j] = NULL;
990 head_desc->spte_count--;
991 if (head_desc->spte_count)
995 * The head descriptor is empty. If there are no tail descriptors,
996 * nullify the rmap head to mark the list as empty, else point the rmap
997 * head at the next descriptor, i.e. the new head.
999 if (!head_desc->more)
1002 rmap_head->val = (unsigned long)head_desc->more | 1;
1003 mmu_free_pte_list_desc(head_desc);
1006 static void pte_list_remove(struct kvm *kvm, u64 *spte,
1007 struct kvm_rmap_head *rmap_head)
1009 struct pte_list_desc *desc;
1012 if (KVM_BUG_ON_DATA_CORRUPTION(!rmap_head->val, kvm))
1015 if (!(rmap_head->val & 1)) {
1016 if (KVM_BUG_ON_DATA_CORRUPTION((u64 *)rmap_head->val != spte, kvm))
1021 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1023 for (i = 0; i < desc->spte_count; ++i) {
1024 if (desc->sptes[i] == spte) {
1025 pte_list_desc_remove_entry(kvm, rmap_head,
1033 KVM_BUG_ON_DATA_CORRUPTION(true, kvm);
1037 static void kvm_zap_one_rmap_spte(struct kvm *kvm,
1038 struct kvm_rmap_head *rmap_head, u64 *sptep)
1040 mmu_spte_clear_track_bits(kvm, sptep);
1041 pte_list_remove(kvm, sptep, rmap_head);
1044 /* Return true if at least one SPTE was zapped, false otherwise */
1045 static bool kvm_zap_all_rmap_sptes(struct kvm *kvm,
1046 struct kvm_rmap_head *rmap_head)
1048 struct pte_list_desc *desc, *next;
1051 if (!rmap_head->val)
1054 if (!(rmap_head->val & 1)) {
1055 mmu_spte_clear_track_bits(kvm, (u64 *)rmap_head->val);
1059 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1061 for (; desc; desc = next) {
1062 for (i = 0; i < desc->spte_count; i++)
1063 mmu_spte_clear_track_bits(kvm, desc->sptes[i]);
1065 mmu_free_pte_list_desc(desc);
1068 /* rmap_head is meaningless now, remember to reset it */
1073 unsigned int pte_list_count(struct kvm_rmap_head *rmap_head)
1075 struct pte_list_desc *desc;
1077 if (!rmap_head->val)
1079 else if (!(rmap_head->val & 1))
1082 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1083 return desc->tail_count + desc->spte_count;
1086 static struct kvm_rmap_head *gfn_to_rmap(gfn_t gfn, int level,
1087 const struct kvm_memory_slot *slot)
1091 idx = gfn_to_index(gfn, slot->base_gfn, level);
1092 return &slot->arch.rmap[level - PG_LEVEL_4K][idx];
1095 static void rmap_remove(struct kvm *kvm, u64 *spte)
1097 struct kvm_memslots *slots;
1098 struct kvm_memory_slot *slot;
1099 struct kvm_mmu_page *sp;
1101 struct kvm_rmap_head *rmap_head;
1103 sp = sptep_to_sp(spte);
1104 gfn = kvm_mmu_page_get_gfn(sp, spte_index(spte));
1107 * Unlike rmap_add, rmap_remove does not run in the context of a vCPU
1108 * so we have to determine which memslots to use based on context
1109 * information in sp->role.
1111 slots = kvm_memslots_for_spte_role(kvm, sp->role);
1113 slot = __gfn_to_memslot(slots, gfn);
1114 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1116 pte_list_remove(kvm, spte, rmap_head);
1120 * Used by the following functions to iterate through the sptes linked by a
1121 * rmap. All fields are private and not assumed to be used outside.
1123 struct rmap_iterator {
1124 /* private fields */
1125 struct pte_list_desc *desc; /* holds the sptep if not NULL */
1126 int pos; /* index of the sptep */
1130 * Iteration must be started by this function. This should also be used after
1131 * removing/dropping sptes from the rmap link because in such cases the
1132 * information in the iterator may not be valid.
1134 * Returns sptep if found, NULL otherwise.
1136 static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head,
1137 struct rmap_iterator *iter)
1141 if (!rmap_head->val)
1144 if (!(rmap_head->val & 1)) {
1146 sptep = (u64 *)rmap_head->val;
1150 iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1152 sptep = iter->desc->sptes[iter->pos];
1154 BUG_ON(!is_shadow_present_pte(*sptep));
1159 * Must be used with a valid iterator: e.g. after rmap_get_first().
1161 * Returns sptep if found, NULL otherwise.
1163 static u64 *rmap_get_next(struct rmap_iterator *iter)
1168 if (iter->pos < PTE_LIST_EXT - 1) {
1170 sptep = iter->desc->sptes[iter->pos];
1175 iter->desc = iter->desc->more;
1179 /* desc->sptes[0] cannot be NULL */
1180 sptep = iter->desc->sptes[iter->pos];
1187 BUG_ON(!is_shadow_present_pte(*sptep));
1191 #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \
1192 for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \
1193 _spte_; _spte_ = rmap_get_next(_iter_))
1195 static void drop_spte(struct kvm *kvm, u64 *sptep)
1197 u64 old_spte = mmu_spte_clear_track_bits(kvm, sptep);
1199 if (is_shadow_present_pte(old_spte))
1200 rmap_remove(kvm, sptep);
1203 static void drop_large_spte(struct kvm *kvm, u64 *sptep, bool flush)
1205 struct kvm_mmu_page *sp;
1207 sp = sptep_to_sp(sptep);
1208 WARN_ON_ONCE(sp->role.level == PG_LEVEL_4K);
1210 drop_spte(kvm, sptep);
1213 kvm_flush_remote_tlbs_sptep(kvm, sptep);
1217 * Write-protect on the specified @sptep, @pt_protect indicates whether
1218 * spte write-protection is caused by protecting shadow page table.
1220 * Note: write protection is difference between dirty logging and spte
1222 * - for dirty logging, the spte can be set to writable at anytime if
1223 * its dirty bitmap is properly set.
1224 * - for spte protection, the spte can be writable only after unsync-ing
1227 * Return true if tlb need be flushed.
1229 static bool spte_write_protect(u64 *sptep, bool pt_protect)
1233 if (!is_writable_pte(spte) &&
1234 !(pt_protect && is_mmu_writable_spte(spte)))
1238 spte &= ~shadow_mmu_writable_mask;
1239 spte = spte & ~PT_WRITABLE_MASK;
1241 return mmu_spte_update(sptep, spte);
1244 static bool rmap_write_protect(struct kvm_rmap_head *rmap_head,
1248 struct rmap_iterator iter;
1251 for_each_rmap_spte(rmap_head, &iter, sptep)
1252 flush |= spte_write_protect(sptep, pt_protect);
1257 static bool spte_clear_dirty(u64 *sptep)
1261 KVM_MMU_WARN_ON(!spte_ad_enabled(spte));
1262 spte &= ~shadow_dirty_mask;
1263 return mmu_spte_update(sptep, spte);
1266 static bool spte_wrprot_for_clear_dirty(u64 *sptep)
1268 bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT,
1269 (unsigned long *)sptep);
1270 if (was_writable && !spte_ad_enabled(*sptep))
1271 kvm_set_pfn_dirty(spte_to_pfn(*sptep));
1273 return was_writable;
1277 * Gets the GFN ready for another round of dirty logging by clearing the
1278 * - D bit on ad-enabled SPTEs, and
1279 * - W bit on ad-disabled SPTEs.
1280 * Returns true iff any D or W bits were cleared.
1282 static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1283 const struct kvm_memory_slot *slot)
1286 struct rmap_iterator iter;
1289 for_each_rmap_spte(rmap_head, &iter, sptep)
1290 if (spte_ad_need_write_protect(*sptep))
1291 flush |= spte_wrprot_for_clear_dirty(sptep);
1293 flush |= spte_clear_dirty(sptep);
1299 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1300 * @kvm: kvm instance
1301 * @slot: slot to protect
1302 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1303 * @mask: indicates which pages we should protect
1305 * Used when we do not need to care about huge page mappings.
1307 static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1308 struct kvm_memory_slot *slot,
1309 gfn_t gfn_offset, unsigned long mask)
1311 struct kvm_rmap_head *rmap_head;
1313 if (tdp_mmu_enabled)
1314 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1315 slot->base_gfn + gfn_offset, mask, true);
1317 if (!kvm_memslots_have_rmaps(kvm))
1321 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1323 rmap_write_protect(rmap_head, false);
1325 /* clear the first set bit */
1331 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write
1332 * protect the page if the D-bit isn't supported.
1333 * @kvm: kvm instance
1334 * @slot: slot to clear D-bit
1335 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1336 * @mask: indicates which pages we should clear D-bit
1338 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1340 static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1341 struct kvm_memory_slot *slot,
1342 gfn_t gfn_offset, unsigned long mask)
1344 struct kvm_rmap_head *rmap_head;
1346 if (tdp_mmu_enabled)
1347 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1348 slot->base_gfn + gfn_offset, mask, false);
1350 if (!kvm_memslots_have_rmaps(kvm))
1354 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1356 __rmap_clear_dirty(kvm, rmap_head, slot);
1358 /* clear the first set bit */
1364 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1367 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1368 * enable dirty logging for them.
1370 * We need to care about huge page mappings: e.g. during dirty logging we may
1371 * have such mappings.
1373 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1374 struct kvm_memory_slot *slot,
1375 gfn_t gfn_offset, unsigned long mask)
1378 * Huge pages are NOT write protected when we start dirty logging in
1379 * initially-all-set mode; must write protect them here so that they
1380 * are split to 4K on the first write.
1382 * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn
1383 * of memslot has no such restriction, so the range can cross two large
1386 if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
1387 gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask);
1388 gfn_t end = slot->base_gfn + gfn_offset + __fls(mask);
1390 if (READ_ONCE(eager_page_split))
1391 kvm_mmu_try_split_huge_pages(kvm, slot, start, end + 1, PG_LEVEL_4K);
1393 kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M);
1395 /* Cross two large pages? */
1396 if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) !=
1397 ALIGN(end << PAGE_SHIFT, PMD_SIZE))
1398 kvm_mmu_slot_gfn_write_protect(kvm, slot, end,
1402 /* Now handle 4K PTEs. */
1403 if (kvm_x86_ops.cpu_dirty_log_size)
1404 kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask);
1406 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1409 int kvm_cpu_dirty_log_size(void)
1411 return kvm_x86_ops.cpu_dirty_log_size;
1414 bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm,
1415 struct kvm_memory_slot *slot, u64 gfn,
1418 struct kvm_rmap_head *rmap_head;
1420 bool write_protected = false;
1422 if (kvm_memslots_have_rmaps(kvm)) {
1423 for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
1424 rmap_head = gfn_to_rmap(gfn, i, slot);
1425 write_protected |= rmap_write_protect(rmap_head, true);
1429 if (tdp_mmu_enabled)
1431 kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level);
1433 return write_protected;
1436 static bool kvm_vcpu_write_protect_gfn(struct kvm_vcpu *vcpu, u64 gfn)
1438 struct kvm_memory_slot *slot;
1440 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
1441 return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K);
1444 static bool __kvm_zap_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1445 const struct kvm_memory_slot *slot)
1447 return kvm_zap_all_rmap_sptes(kvm, rmap_head);
1450 static bool kvm_zap_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1451 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1454 return __kvm_zap_rmap(kvm, rmap_head, slot);
1457 static bool kvm_set_pte_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1458 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1462 struct rmap_iterator iter;
1463 bool need_flush = false;
1467 WARN_ON_ONCE(pte_huge(pte));
1468 new_pfn = pte_pfn(pte);
1471 for_each_rmap_spte(rmap_head, &iter, sptep) {
1474 if (pte_write(pte)) {
1475 kvm_zap_one_rmap_spte(kvm, rmap_head, sptep);
1478 new_spte = kvm_mmu_changed_pte_notifier_make_spte(
1481 mmu_spte_clear_track_bits(kvm, sptep);
1482 mmu_spte_set(sptep, new_spte);
1486 if (need_flush && kvm_available_flush_remote_tlbs_range()) {
1487 kvm_flush_remote_tlbs_gfn(kvm, gfn, level);
1494 struct slot_rmap_walk_iterator {
1496 const struct kvm_memory_slot *slot;
1502 /* output fields. */
1504 struct kvm_rmap_head *rmap;
1507 /* private field. */
1508 struct kvm_rmap_head *end_rmap;
1511 static void rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator,
1514 iterator->level = level;
1515 iterator->gfn = iterator->start_gfn;
1516 iterator->rmap = gfn_to_rmap(iterator->gfn, level, iterator->slot);
1517 iterator->end_rmap = gfn_to_rmap(iterator->end_gfn, level, iterator->slot);
1520 static void slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator,
1521 const struct kvm_memory_slot *slot,
1522 int start_level, int end_level,
1523 gfn_t start_gfn, gfn_t end_gfn)
1525 iterator->slot = slot;
1526 iterator->start_level = start_level;
1527 iterator->end_level = end_level;
1528 iterator->start_gfn = start_gfn;
1529 iterator->end_gfn = end_gfn;
1531 rmap_walk_init_level(iterator, iterator->start_level);
1534 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator)
1536 return !!iterator->rmap;
1539 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator)
1541 while (++iterator->rmap <= iterator->end_rmap) {
1542 iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level));
1544 if (iterator->rmap->val)
1548 if (++iterator->level > iterator->end_level) {
1549 iterator->rmap = NULL;
1553 rmap_walk_init_level(iterator, iterator->level);
1556 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1557 _start_gfn, _end_gfn, _iter_) \
1558 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1559 _end_level_, _start_gfn, _end_gfn); \
1560 slot_rmap_walk_okay(_iter_); \
1561 slot_rmap_walk_next(_iter_))
1563 typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1564 struct kvm_memory_slot *slot, gfn_t gfn,
1565 int level, pte_t pte);
1567 static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm,
1568 struct kvm_gfn_range *range,
1569 rmap_handler_t handler)
1571 struct slot_rmap_walk_iterator iterator;
1574 for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
1575 range->start, range->end - 1, &iterator)
1576 ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn,
1577 iterator.level, range->arg.pte);
1582 bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
1586 if (kvm_memslots_have_rmaps(kvm))
1587 flush = kvm_handle_gfn_range(kvm, range, kvm_zap_rmap);
1589 if (tdp_mmu_enabled)
1590 flush = kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush);
1592 if (kvm_x86_ops.set_apic_access_page_addr &&
1593 range->slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT)
1594 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
1599 bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1603 if (kvm_memslots_have_rmaps(kvm))
1604 flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmap);
1606 if (tdp_mmu_enabled)
1607 flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range);
1612 static bool kvm_age_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1613 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1617 struct rmap_iterator iter;
1620 for_each_rmap_spte(rmap_head, &iter, sptep)
1621 young |= mmu_spte_age(sptep);
1626 static bool kvm_test_age_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1627 struct kvm_memory_slot *slot, gfn_t gfn,
1628 int level, pte_t unused)
1631 struct rmap_iterator iter;
1633 for_each_rmap_spte(rmap_head, &iter, sptep)
1634 if (is_accessed_spte(*sptep))
1639 #define RMAP_RECYCLE_THRESHOLD 1000
1641 static void __rmap_add(struct kvm *kvm,
1642 struct kvm_mmu_memory_cache *cache,
1643 const struct kvm_memory_slot *slot,
1644 u64 *spte, gfn_t gfn, unsigned int access)
1646 struct kvm_mmu_page *sp;
1647 struct kvm_rmap_head *rmap_head;
1650 sp = sptep_to_sp(spte);
1651 kvm_mmu_page_set_translation(sp, spte_index(spte), gfn, access);
1652 kvm_update_page_stats(kvm, sp->role.level, 1);
1654 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1655 rmap_count = pte_list_add(cache, spte, rmap_head);
1657 if (rmap_count > kvm->stat.max_mmu_rmap_size)
1658 kvm->stat.max_mmu_rmap_size = rmap_count;
1659 if (rmap_count > RMAP_RECYCLE_THRESHOLD) {
1660 kvm_zap_all_rmap_sptes(kvm, rmap_head);
1661 kvm_flush_remote_tlbs_gfn(kvm, gfn, sp->role.level);
1665 static void rmap_add(struct kvm_vcpu *vcpu, const struct kvm_memory_slot *slot,
1666 u64 *spte, gfn_t gfn, unsigned int access)
1668 struct kvm_mmu_memory_cache *cache = &vcpu->arch.mmu_pte_list_desc_cache;
1670 __rmap_add(vcpu->kvm, cache, slot, spte, gfn, access);
1673 bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1677 if (kvm_memslots_have_rmaps(kvm))
1678 young = kvm_handle_gfn_range(kvm, range, kvm_age_rmap);
1680 if (tdp_mmu_enabled)
1681 young |= kvm_tdp_mmu_age_gfn_range(kvm, range);
1686 bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1690 if (kvm_memslots_have_rmaps(kvm))
1691 young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmap);
1693 if (tdp_mmu_enabled)
1694 young |= kvm_tdp_mmu_test_age_gfn(kvm, range);
1699 static void kvm_mmu_check_sptes_at_free(struct kvm_mmu_page *sp)
1701 #ifdef CONFIG_KVM_PROVE_MMU
1704 for (i = 0; i < SPTE_ENT_PER_PAGE; i++) {
1705 if (KVM_MMU_WARN_ON(is_shadow_present_pte(sp->spt[i])))
1706 pr_err_ratelimited("SPTE %llx (@ %p) for gfn %llx shadow-present at free",
1707 sp->spt[i], &sp->spt[i],
1708 kvm_mmu_page_get_gfn(sp, i));
1714 * This value is the sum of all of the kvm instances's
1715 * kvm->arch.n_used_mmu_pages values. We need a global,
1716 * aggregate version in order to make the slab shrinker
1719 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, long nr)
1721 kvm->arch.n_used_mmu_pages += nr;
1722 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1725 static void kvm_account_mmu_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1727 kvm_mod_used_mmu_pages(kvm, +1);
1728 kvm_account_pgtable_pages((void *)sp->spt, +1);
1731 static void kvm_unaccount_mmu_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1733 kvm_mod_used_mmu_pages(kvm, -1);
1734 kvm_account_pgtable_pages((void *)sp->spt, -1);
1737 static void kvm_mmu_free_shadow_page(struct kvm_mmu_page *sp)
1739 kvm_mmu_check_sptes_at_free(sp);
1741 hlist_del(&sp->hash_link);
1742 list_del(&sp->link);
1743 free_page((unsigned long)sp->spt);
1744 if (!sp->role.direct)
1745 free_page((unsigned long)sp->shadowed_translation);
1746 kmem_cache_free(mmu_page_header_cache, sp);
1749 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1751 return hash_64(gfn, KVM_MMU_HASH_SHIFT);
1754 static void mmu_page_add_parent_pte(struct kvm_mmu_memory_cache *cache,
1755 struct kvm_mmu_page *sp, u64 *parent_pte)
1760 pte_list_add(cache, parent_pte, &sp->parent_ptes);
1763 static void mmu_page_remove_parent_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
1766 pte_list_remove(kvm, parent_pte, &sp->parent_ptes);
1769 static void drop_parent_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
1772 mmu_page_remove_parent_pte(kvm, sp, parent_pte);
1773 mmu_spte_clear_no_track(parent_pte);
1776 static void mark_unsync(u64 *spte);
1777 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1780 struct rmap_iterator iter;
1782 for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) {
1787 static void mark_unsync(u64 *spte)
1789 struct kvm_mmu_page *sp;
1791 sp = sptep_to_sp(spte);
1792 if (__test_and_set_bit(spte_index(spte), sp->unsync_child_bitmap))
1794 if (sp->unsync_children++)
1796 kvm_mmu_mark_parents_unsync(sp);
1799 #define KVM_PAGE_ARRAY_NR 16
1801 struct kvm_mmu_pages {
1802 struct mmu_page_and_offset {
1803 struct kvm_mmu_page *sp;
1805 } page[KVM_PAGE_ARRAY_NR];
1809 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1815 for (i=0; i < pvec->nr; i++)
1816 if (pvec->page[i].sp == sp)
1819 pvec->page[pvec->nr].sp = sp;
1820 pvec->page[pvec->nr].idx = idx;
1822 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1825 static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx)
1827 --sp->unsync_children;
1828 WARN_ON_ONCE((int)sp->unsync_children < 0);
1829 __clear_bit(idx, sp->unsync_child_bitmap);
1832 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1833 struct kvm_mmu_pages *pvec)
1835 int i, ret, nr_unsync_leaf = 0;
1837 for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1838 struct kvm_mmu_page *child;
1839 u64 ent = sp->spt[i];
1841 if (!is_shadow_present_pte(ent) || is_large_pte(ent)) {
1842 clear_unsync_child_bit(sp, i);
1846 child = spte_to_child_sp(ent);
1848 if (child->unsync_children) {
1849 if (mmu_pages_add(pvec, child, i))
1852 ret = __mmu_unsync_walk(child, pvec);
1854 clear_unsync_child_bit(sp, i);
1856 } else if (ret > 0) {
1857 nr_unsync_leaf += ret;
1860 } else if (child->unsync) {
1862 if (mmu_pages_add(pvec, child, i))
1865 clear_unsync_child_bit(sp, i);
1868 return nr_unsync_leaf;
1871 #define INVALID_INDEX (-1)
1873 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1874 struct kvm_mmu_pages *pvec)
1877 if (!sp->unsync_children)
1880 mmu_pages_add(pvec, sp, INVALID_INDEX);
1881 return __mmu_unsync_walk(sp, pvec);
1884 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1886 WARN_ON_ONCE(!sp->unsync);
1887 trace_kvm_mmu_sync_page(sp);
1889 --kvm->stat.mmu_unsync;
1892 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1893 struct list_head *invalid_list);
1894 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1895 struct list_head *invalid_list);
1897 static bool sp_has_gptes(struct kvm_mmu_page *sp)
1899 if (sp->role.direct)
1902 if (sp->role.passthrough)
1908 #define for_each_valid_sp(_kvm, _sp, _list) \
1909 hlist_for_each_entry(_sp, _list, hash_link) \
1910 if (is_obsolete_sp((_kvm), (_sp))) { \
1913 #define for_each_gfn_valid_sp_with_gptes(_kvm, _sp, _gfn) \
1914 for_each_valid_sp(_kvm, _sp, \
1915 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \
1916 if ((_sp)->gfn != (_gfn) || !sp_has_gptes(_sp)) {} else
1918 static bool kvm_sync_page_check(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1920 union kvm_mmu_page_role root_role = vcpu->arch.mmu->root_role;
1923 * Ignore various flags when verifying that it's safe to sync a shadow
1924 * page using the current MMU context.
1926 * - level: not part of the overall MMU role and will never match as the MMU's
1927 * level tracks the root level
1928 * - access: updated based on the new guest PTE
1929 * - quadrant: not part of the overall MMU role (similar to level)
1931 const union kvm_mmu_page_role sync_role_ign = {
1939 * Direct pages can never be unsync, and KVM should never attempt to
1940 * sync a shadow page for a different MMU context, e.g. if the role
1941 * differs then the memslot lookup (SMM vs. non-SMM) will be bogus, the
1942 * reserved bits checks will be wrong, etc...
1944 if (WARN_ON_ONCE(sp->role.direct || !vcpu->arch.mmu->sync_spte ||
1945 (sp->role.word ^ root_role.word) & ~sync_role_ign.word))
1951 static int kvm_sync_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, int i)
1956 return vcpu->arch.mmu->sync_spte(vcpu, sp, i);
1959 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1964 if (!kvm_sync_page_check(vcpu, sp))
1967 for (i = 0; i < SPTE_ENT_PER_PAGE; i++) {
1968 int ret = kvm_sync_spte(vcpu, sp, i);
1976 * Note, any flush is purely for KVM's correctness, e.g. when dropping
1977 * an existing SPTE or clearing W/A/D bits to ensure an mmu_notifier
1978 * unmap or dirty logging event doesn't fail to flush. The guest is
1979 * responsible for flushing the TLB to ensure any changes in protection
1980 * bits are recognized, i.e. until the guest flushes or page faults on
1981 * a relevant address, KVM is architecturally allowed to let vCPUs use
1982 * cached translations with the old protection bits.
1987 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1988 struct list_head *invalid_list)
1990 int ret = __kvm_sync_page(vcpu, sp);
1993 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1997 static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm,
1998 struct list_head *invalid_list,
2001 if (!remote_flush && list_empty(invalid_list))
2004 if (!list_empty(invalid_list))
2005 kvm_mmu_commit_zap_page(kvm, invalid_list);
2007 kvm_flush_remote_tlbs(kvm);
2011 static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp)
2013 if (sp->role.invalid)
2016 /* TDP MMU pages do not use the MMU generation. */
2017 return !is_tdp_mmu_page(sp) &&
2018 unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen);
2021 struct mmu_page_path {
2022 struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL];
2023 unsigned int idx[PT64_ROOT_MAX_LEVEL];
2026 #define for_each_sp(pvec, sp, parents, i) \
2027 for (i = mmu_pages_first(&pvec, &parents); \
2028 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
2029 i = mmu_pages_next(&pvec, &parents, i))
2031 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
2032 struct mmu_page_path *parents,
2037 for (n = i+1; n < pvec->nr; n++) {
2038 struct kvm_mmu_page *sp = pvec->page[n].sp;
2039 unsigned idx = pvec->page[n].idx;
2040 int level = sp->role.level;
2042 parents->idx[level-1] = idx;
2043 if (level == PG_LEVEL_4K)
2046 parents->parent[level-2] = sp;
2052 static int mmu_pages_first(struct kvm_mmu_pages *pvec,
2053 struct mmu_page_path *parents)
2055 struct kvm_mmu_page *sp;
2061 WARN_ON_ONCE(pvec->page[0].idx != INVALID_INDEX);
2063 sp = pvec->page[0].sp;
2064 level = sp->role.level;
2065 WARN_ON_ONCE(level == PG_LEVEL_4K);
2067 parents->parent[level-2] = sp;
2069 /* Also set up a sentinel. Further entries in pvec are all
2070 * children of sp, so this element is never overwritten.
2072 parents->parent[level-1] = NULL;
2073 return mmu_pages_next(pvec, parents, 0);
2076 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
2078 struct kvm_mmu_page *sp;
2079 unsigned int level = 0;
2082 unsigned int idx = parents->idx[level];
2083 sp = parents->parent[level];
2087 WARN_ON_ONCE(idx == INVALID_INDEX);
2088 clear_unsync_child_bit(sp, idx);
2090 } while (!sp->unsync_children);
2093 static int mmu_sync_children(struct kvm_vcpu *vcpu,
2094 struct kvm_mmu_page *parent, bool can_yield)
2097 struct kvm_mmu_page *sp;
2098 struct mmu_page_path parents;
2099 struct kvm_mmu_pages pages;
2100 LIST_HEAD(invalid_list);
2103 while (mmu_unsync_walk(parent, &pages)) {
2104 bool protected = false;
2106 for_each_sp(pages, sp, parents, i)
2107 protected |= kvm_vcpu_write_protect_gfn(vcpu, sp->gfn);
2110 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, true);
2114 for_each_sp(pages, sp, parents, i) {
2115 kvm_unlink_unsync_page(vcpu->kvm, sp);
2116 flush |= kvm_sync_page(vcpu, sp, &invalid_list) > 0;
2117 mmu_pages_clear_parents(&parents);
2119 if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) {
2120 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
2122 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
2126 cond_resched_rwlock_write(&vcpu->kvm->mmu_lock);
2131 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
2135 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
2137 atomic_set(&sp->write_flooding_count, 0);
2140 static void clear_sp_write_flooding_count(u64 *spte)
2142 __clear_sp_write_flooding_count(sptep_to_sp(spte));
2146 * The vCPU is required when finding indirect shadow pages; the shadow
2147 * page may already exist and syncing it needs the vCPU pointer in
2148 * order to read guest page tables. Direct shadow pages are never
2149 * unsync, thus @vcpu can be NULL if @role.direct is true.
2151 static struct kvm_mmu_page *kvm_mmu_find_shadow_page(struct kvm *kvm,
2152 struct kvm_vcpu *vcpu,
2154 struct hlist_head *sp_list,
2155 union kvm_mmu_page_role role)
2157 struct kvm_mmu_page *sp;
2160 LIST_HEAD(invalid_list);
2162 for_each_valid_sp(kvm, sp, sp_list) {
2163 if (sp->gfn != gfn) {
2168 if (sp->role.word != role.word) {
2170 * If the guest is creating an upper-level page, zap
2171 * unsync pages for the same gfn. While it's possible
2172 * the guest is using recursive page tables, in all
2173 * likelihood the guest has stopped using the unsync
2174 * page and is installing a completely unrelated page.
2175 * Unsync pages must not be left as is, because the new
2176 * upper-level page will be write-protected.
2178 if (role.level > PG_LEVEL_4K && sp->unsync)
2179 kvm_mmu_prepare_zap_page(kvm, sp,
2184 /* unsync and write-flooding only apply to indirect SPs. */
2185 if (sp->role.direct)
2189 if (KVM_BUG_ON(!vcpu, kvm))
2193 * The page is good, but is stale. kvm_sync_page does
2194 * get the latest guest state, but (unlike mmu_unsync_children)
2195 * it doesn't write-protect the page or mark it synchronized!
2196 * This way the validity of the mapping is ensured, but the
2197 * overhead of write protection is not incurred until the
2198 * guest invalidates the TLB mapping. This allows multiple
2199 * SPs for a single gfn to be unsync.
2201 * If the sync fails, the page is zapped. If so, break
2202 * in order to rebuild it.
2204 ret = kvm_sync_page(vcpu, sp, &invalid_list);
2208 WARN_ON_ONCE(!list_empty(&invalid_list));
2210 kvm_flush_remote_tlbs(kvm);
2213 __clear_sp_write_flooding_count(sp);
2219 ++kvm->stat.mmu_cache_miss;
2222 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2224 if (collisions > kvm->stat.max_mmu_page_hash_collisions)
2225 kvm->stat.max_mmu_page_hash_collisions = collisions;
2229 /* Caches used when allocating a new shadow page. */
2230 struct shadow_page_caches {
2231 struct kvm_mmu_memory_cache *page_header_cache;
2232 struct kvm_mmu_memory_cache *shadow_page_cache;
2233 struct kvm_mmu_memory_cache *shadowed_info_cache;
2236 static struct kvm_mmu_page *kvm_mmu_alloc_shadow_page(struct kvm *kvm,
2237 struct shadow_page_caches *caches,
2239 struct hlist_head *sp_list,
2240 union kvm_mmu_page_role role)
2242 struct kvm_mmu_page *sp;
2244 sp = kvm_mmu_memory_cache_alloc(caches->page_header_cache);
2245 sp->spt = kvm_mmu_memory_cache_alloc(caches->shadow_page_cache);
2247 sp->shadowed_translation = kvm_mmu_memory_cache_alloc(caches->shadowed_info_cache);
2249 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
2251 INIT_LIST_HEAD(&sp->possible_nx_huge_page_link);
2254 * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages()
2255 * depends on valid pages being added to the head of the list. See
2256 * comments in kvm_zap_obsolete_pages().
2258 sp->mmu_valid_gen = kvm->arch.mmu_valid_gen;
2259 list_add(&sp->link, &kvm->arch.active_mmu_pages);
2260 kvm_account_mmu_page(kvm, sp);
2264 hlist_add_head(&sp->hash_link, sp_list);
2265 if (sp_has_gptes(sp))
2266 account_shadowed(kvm, sp);
2271 /* Note, @vcpu may be NULL if @role.direct is true; see kvm_mmu_find_shadow_page. */
2272 static struct kvm_mmu_page *__kvm_mmu_get_shadow_page(struct kvm *kvm,
2273 struct kvm_vcpu *vcpu,
2274 struct shadow_page_caches *caches,
2276 union kvm_mmu_page_role role)
2278 struct hlist_head *sp_list;
2279 struct kvm_mmu_page *sp;
2280 bool created = false;
2282 sp_list = &kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)];
2284 sp = kvm_mmu_find_shadow_page(kvm, vcpu, gfn, sp_list, role);
2287 sp = kvm_mmu_alloc_shadow_page(kvm, caches, gfn, sp_list, role);
2290 trace_kvm_mmu_get_page(sp, created);
2294 static struct kvm_mmu_page *kvm_mmu_get_shadow_page(struct kvm_vcpu *vcpu,
2296 union kvm_mmu_page_role role)
2298 struct shadow_page_caches caches = {
2299 .page_header_cache = &vcpu->arch.mmu_page_header_cache,
2300 .shadow_page_cache = &vcpu->arch.mmu_shadow_page_cache,
2301 .shadowed_info_cache = &vcpu->arch.mmu_shadowed_info_cache,
2304 return __kvm_mmu_get_shadow_page(vcpu->kvm, vcpu, &caches, gfn, role);
2307 static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct,
2308 unsigned int access)
2310 struct kvm_mmu_page *parent_sp = sptep_to_sp(sptep);
2311 union kvm_mmu_page_role role;
2313 role = parent_sp->role;
2315 role.access = access;
2316 role.direct = direct;
2317 role.passthrough = 0;
2320 * If the guest has 4-byte PTEs then that means it's using 32-bit,
2321 * 2-level, non-PAE paging. KVM shadows such guests with PAE paging
2322 * (i.e. 8-byte PTEs). The difference in PTE size means that KVM must
2323 * shadow each guest page table with multiple shadow page tables, which
2324 * requires extra bookkeeping in the role.
2326 * Specifically, to shadow the guest's page directory (which covers a
2327 * 4GiB address space), KVM uses 4 PAE page directories, each mapping
2328 * 1GiB of the address space. @role.quadrant encodes which quarter of
2329 * the address space each maps.
2331 * To shadow the guest's page tables (which each map a 4MiB region), KVM
2332 * uses 2 PAE page tables, each mapping a 2MiB region. For these,
2333 * @role.quadrant encodes which half of the region they map.
2335 * Concretely, a 4-byte PDE consumes bits 31:22, while an 8-byte PDE
2336 * consumes bits 29:21. To consume bits 31:30, KVM's uses 4 shadow
2337 * PDPTEs; those 4 PAE page directories are pre-allocated and their
2338 * quadrant is assigned in mmu_alloc_root(). A 4-byte PTE consumes
2339 * bits 21:12, while an 8-byte PTE consumes bits 20:12. To consume
2340 * bit 21 in the PTE (the child here), KVM propagates that bit to the
2341 * quadrant, i.e. sets quadrant to '0' or '1'. The parent 8-byte PDE
2342 * covers bit 21 (see above), thus the quadrant is calculated from the
2343 * _least_ significant bit of the PDE index.
2345 if (role.has_4_byte_gpte) {
2346 WARN_ON_ONCE(role.level != PG_LEVEL_4K);
2347 role.quadrant = spte_index(sptep) & 1;
2353 static struct kvm_mmu_page *kvm_mmu_get_child_sp(struct kvm_vcpu *vcpu,
2354 u64 *sptep, gfn_t gfn,
2355 bool direct, unsigned int access)
2357 union kvm_mmu_page_role role;
2359 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
2360 return ERR_PTR(-EEXIST);
2362 role = kvm_mmu_child_role(sptep, direct, access);
2363 return kvm_mmu_get_shadow_page(vcpu, gfn, role);
2366 static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator,
2367 struct kvm_vcpu *vcpu, hpa_t root,
2370 iterator->addr = addr;
2371 iterator->shadow_addr = root;
2372 iterator->level = vcpu->arch.mmu->root_role.level;
2374 if (iterator->level >= PT64_ROOT_4LEVEL &&
2375 vcpu->arch.mmu->cpu_role.base.level < PT64_ROOT_4LEVEL &&
2376 !vcpu->arch.mmu->root_role.direct)
2377 iterator->level = PT32E_ROOT_LEVEL;
2379 if (iterator->level == PT32E_ROOT_LEVEL) {
2381 * prev_root is currently only used for 64-bit hosts. So only
2382 * the active root_hpa is valid here.
2384 BUG_ON(root != vcpu->arch.mmu->root.hpa);
2386 iterator->shadow_addr
2387 = vcpu->arch.mmu->pae_root[(addr >> 30) & 3];
2388 iterator->shadow_addr &= SPTE_BASE_ADDR_MASK;
2390 if (!iterator->shadow_addr)
2391 iterator->level = 0;
2395 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
2396 struct kvm_vcpu *vcpu, u64 addr)
2398 shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root.hpa,
2402 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
2404 if (iterator->level < PG_LEVEL_4K)
2407 iterator->index = SPTE_INDEX(iterator->addr, iterator->level);
2408 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
2412 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
2415 if (!is_shadow_present_pte(spte) || is_last_spte(spte, iterator->level)) {
2416 iterator->level = 0;
2420 iterator->shadow_addr = spte & SPTE_BASE_ADDR_MASK;
2424 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
2426 __shadow_walk_next(iterator, *iterator->sptep);
2429 static void __link_shadow_page(struct kvm *kvm,
2430 struct kvm_mmu_memory_cache *cache, u64 *sptep,
2431 struct kvm_mmu_page *sp, bool flush)
2435 BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
2438 * If an SPTE is present already, it must be a leaf and therefore
2439 * a large one. Drop it, and flush the TLB if needed, before
2442 if (is_shadow_present_pte(*sptep))
2443 drop_large_spte(kvm, sptep, flush);
2445 spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp));
2447 mmu_spte_set(sptep, spte);
2449 mmu_page_add_parent_pte(cache, sp, sptep);
2452 * The non-direct sub-pagetable must be updated before linking. For
2453 * L1 sp, the pagetable is updated via kvm_sync_page() in
2454 * kvm_mmu_find_shadow_page() without write-protecting the gfn,
2455 * so sp->unsync can be true or false. For higher level non-direct
2456 * sp, the pagetable is updated/synced via mmu_sync_children() in
2457 * FNAME(fetch)(), so sp->unsync_children can only be false.
2458 * WARN_ON_ONCE() if anything happens unexpectedly.
2460 if (WARN_ON_ONCE(sp->unsync_children) || sp->unsync)
2464 static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep,
2465 struct kvm_mmu_page *sp)
2467 __link_shadow_page(vcpu->kvm, &vcpu->arch.mmu_pte_list_desc_cache, sptep, sp, true);
2470 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2471 unsigned direct_access)
2473 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
2474 struct kvm_mmu_page *child;
2477 * For the direct sp, if the guest pte's dirty bit
2478 * changed form clean to dirty, it will corrupt the
2479 * sp's access: allow writable in the read-only sp,
2480 * so we should update the spte at this point to get
2481 * a new sp with the correct access.
2483 child = spte_to_child_sp(*sptep);
2484 if (child->role.access == direct_access)
2487 drop_parent_pte(vcpu->kvm, child, sptep);
2488 kvm_flush_remote_tlbs_sptep(vcpu->kvm, sptep);
2492 /* Returns the number of zapped non-leaf child shadow pages. */
2493 static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
2494 u64 *spte, struct list_head *invalid_list)
2497 struct kvm_mmu_page *child;
2500 if (is_shadow_present_pte(pte)) {
2501 if (is_last_spte(pte, sp->role.level)) {
2502 drop_spte(kvm, spte);
2504 child = spte_to_child_sp(pte);
2505 drop_parent_pte(kvm, child, spte);
2508 * Recursively zap nested TDP SPs, parentless SPs are
2509 * unlikely to be used again in the near future. This
2510 * avoids retaining a large number of stale nested SPs.
2512 if (tdp_enabled && invalid_list &&
2513 child->role.guest_mode && !child->parent_ptes.val)
2514 return kvm_mmu_prepare_zap_page(kvm, child,
2517 } else if (is_mmio_spte(pte)) {
2518 mmu_spte_clear_no_track(spte);
2523 static int kvm_mmu_page_unlink_children(struct kvm *kvm,
2524 struct kvm_mmu_page *sp,
2525 struct list_head *invalid_list)
2530 for (i = 0; i < SPTE_ENT_PER_PAGE; ++i)
2531 zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list);
2536 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
2539 struct rmap_iterator iter;
2541 while ((sptep = rmap_get_first(&sp->parent_ptes, &iter)))
2542 drop_parent_pte(kvm, sp, sptep);
2545 static int mmu_zap_unsync_children(struct kvm *kvm,
2546 struct kvm_mmu_page *parent,
2547 struct list_head *invalid_list)
2550 struct mmu_page_path parents;
2551 struct kvm_mmu_pages pages;
2553 if (parent->role.level == PG_LEVEL_4K)
2556 while (mmu_unsync_walk(parent, &pages)) {
2557 struct kvm_mmu_page *sp;
2559 for_each_sp(pages, sp, parents, i) {
2560 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2561 mmu_pages_clear_parents(&parents);
2569 static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm,
2570 struct kvm_mmu_page *sp,
2571 struct list_head *invalid_list,
2574 bool list_unstable, zapped_root = false;
2576 lockdep_assert_held_write(&kvm->mmu_lock);
2577 trace_kvm_mmu_prepare_zap_page(sp);
2578 ++kvm->stat.mmu_shadow_zapped;
2579 *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list);
2580 *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list);
2581 kvm_mmu_unlink_parents(kvm, sp);
2583 /* Zapping children means active_mmu_pages has become unstable. */
2584 list_unstable = *nr_zapped;
2586 if (!sp->role.invalid && sp_has_gptes(sp))
2587 unaccount_shadowed(kvm, sp);
2590 kvm_unlink_unsync_page(kvm, sp);
2591 if (!sp->root_count) {
2596 * Already invalid pages (previously active roots) are not on
2597 * the active page list. See list_del() in the "else" case of
2600 if (sp->role.invalid)
2601 list_add(&sp->link, invalid_list);
2603 list_move(&sp->link, invalid_list);
2604 kvm_unaccount_mmu_page(kvm, sp);
2607 * Remove the active root from the active page list, the root
2608 * will be explicitly freed when the root_count hits zero.
2610 list_del(&sp->link);
2613 * Obsolete pages cannot be used on any vCPUs, see the comment
2614 * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also
2615 * treats invalid shadow pages as being obsolete.
2617 zapped_root = !is_obsolete_sp(kvm, sp);
2620 if (sp->nx_huge_page_disallowed)
2621 unaccount_nx_huge_page(kvm, sp);
2623 sp->role.invalid = 1;
2626 * Make the request to free obsolete roots after marking the root
2627 * invalid, otherwise other vCPUs may not see it as invalid.
2630 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
2631 return list_unstable;
2634 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
2635 struct list_head *invalid_list)
2639 __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped);
2643 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2644 struct list_head *invalid_list)
2646 struct kvm_mmu_page *sp, *nsp;
2648 if (list_empty(invalid_list))
2652 * We need to make sure everyone sees our modifications to
2653 * the page tables and see changes to vcpu->mode here. The barrier
2654 * in the kvm_flush_remote_tlbs() achieves this. This pairs
2655 * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end.
2657 * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit
2658 * guest mode and/or lockless shadow page table walks.
2660 kvm_flush_remote_tlbs(kvm);
2662 list_for_each_entry_safe(sp, nsp, invalid_list, link) {
2663 WARN_ON_ONCE(!sp->role.invalid || sp->root_count);
2664 kvm_mmu_free_shadow_page(sp);
2668 static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm,
2669 unsigned long nr_to_zap)
2671 unsigned long total_zapped = 0;
2672 struct kvm_mmu_page *sp, *tmp;
2673 LIST_HEAD(invalid_list);
2677 if (list_empty(&kvm->arch.active_mmu_pages))
2681 list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) {
2683 * Don't zap active root pages, the page itself can't be freed
2684 * and zapping it will just force vCPUs to realloc and reload.
2689 unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list,
2691 total_zapped += nr_zapped;
2692 if (total_zapped >= nr_to_zap)
2699 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2701 kvm->stat.mmu_recycled += total_zapped;
2702 return total_zapped;
2705 static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm)
2707 if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages)
2708 return kvm->arch.n_max_mmu_pages -
2709 kvm->arch.n_used_mmu_pages;
2714 static int make_mmu_pages_available(struct kvm_vcpu *vcpu)
2716 unsigned long avail = kvm_mmu_available_pages(vcpu->kvm);
2718 if (likely(avail >= KVM_MIN_FREE_MMU_PAGES))
2721 kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail);
2724 * Note, this check is intentionally soft, it only guarantees that one
2725 * page is available, while the caller may end up allocating as many as
2726 * four pages, e.g. for PAE roots or for 5-level paging. Temporarily
2727 * exceeding the (arbitrary by default) limit will not harm the host,
2728 * being too aggressive may unnecessarily kill the guest, and getting an
2729 * exact count is far more trouble than it's worth, especially in the
2732 if (!kvm_mmu_available_pages(vcpu->kvm))
2738 * Changing the number of mmu pages allocated to the vm
2739 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2741 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages)
2743 write_lock(&kvm->mmu_lock);
2745 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2746 kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages -
2749 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2752 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2754 write_unlock(&kvm->mmu_lock);
2757 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2759 struct kvm_mmu_page *sp;
2760 LIST_HEAD(invalid_list);
2764 write_lock(&kvm->mmu_lock);
2765 for_each_gfn_valid_sp_with_gptes(kvm, sp, gfn) {
2767 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2769 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2770 write_unlock(&kvm->mmu_lock);
2775 static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2780 if (vcpu->arch.mmu->root_role.direct)
2783 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2785 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2790 static void kvm_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
2792 trace_kvm_mmu_unsync_page(sp);
2793 ++kvm->stat.mmu_unsync;
2796 kvm_mmu_mark_parents_unsync(sp);
2800 * Attempt to unsync any shadow pages that can be reached by the specified gfn,
2801 * KVM is creating a writable mapping for said gfn. Returns 0 if all pages
2802 * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must
2803 * be write-protected.
2805 int mmu_try_to_unsync_pages(struct kvm *kvm, const struct kvm_memory_slot *slot,
2806 gfn_t gfn, bool can_unsync, bool prefetch)
2808 struct kvm_mmu_page *sp;
2809 bool locked = false;
2812 * Force write-protection if the page is being tracked. Note, the page
2813 * track machinery is used to write-protect upper-level shadow pages,
2814 * i.e. this guards the role.level == 4K assertion below!
2816 if (kvm_gfn_is_write_tracked(kvm, slot, gfn))
2820 * The page is not write-tracked, mark existing shadow pages unsync
2821 * unless KVM is synchronizing an unsync SP (can_unsync = false). In
2822 * that case, KVM must complete emulation of the guest TLB flush before
2823 * allowing shadow pages to become unsync (writable by the guest).
2825 for_each_gfn_valid_sp_with_gptes(kvm, sp, gfn) {
2836 * TDP MMU page faults require an additional spinlock as they
2837 * run with mmu_lock held for read, not write, and the unsync
2838 * logic is not thread safe. Take the spinklock regardless of
2839 * the MMU type to avoid extra conditionals/parameters, there's
2840 * no meaningful penalty if mmu_lock is held for write.
2844 spin_lock(&kvm->arch.mmu_unsync_pages_lock);
2847 * Recheck after taking the spinlock, a different vCPU
2848 * may have since marked the page unsync. A false
2849 * negative on the unprotected check above is not
2850 * possible as clearing sp->unsync _must_ hold mmu_lock
2851 * for write, i.e. unsync cannot transition from 1->0
2852 * while this CPU holds mmu_lock for read (or write).
2854 if (READ_ONCE(sp->unsync))
2858 WARN_ON_ONCE(sp->role.level != PG_LEVEL_4K);
2859 kvm_unsync_page(kvm, sp);
2862 spin_unlock(&kvm->arch.mmu_unsync_pages_lock);
2865 * We need to ensure that the marking of unsync pages is visible
2866 * before the SPTE is updated to allow writes because
2867 * kvm_mmu_sync_roots() checks the unsync flags without holding
2868 * the MMU lock and so can race with this. If the SPTE was updated
2869 * before the page had been marked as unsync-ed, something like the
2870 * following could happen:
2873 * ---------------------------------------------------------------------
2874 * 1.2 Host updates SPTE
2876 * 2.1 Guest writes a GPTE for GVA X.
2877 * (GPTE being in the guest page table shadowed
2878 * by the SP from CPU 1.)
2879 * This reads SPTE during the page table walk.
2880 * Since SPTE.W is read as 1, there is no
2883 * 2.2 Guest issues TLB flush.
2884 * That causes a VM Exit.
2886 * 2.3 Walking of unsync pages sees sp->unsync is
2887 * false and skips the page.
2889 * 2.4 Guest accesses GVA X.
2890 * Since the mapping in the SP was not updated,
2891 * so the old mapping for GVA X incorrectly
2895 * (sp->unsync = true)
2897 * The write barrier below ensures that 1.1 happens before 1.2 and thus
2898 * the situation in 2.4 does not arise. It pairs with the read barrier
2899 * in is_unsync_root(), placed between 2.1's load of SPTE.W and 2.3.
2906 static int mmu_set_spte(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot,
2907 u64 *sptep, unsigned int pte_access, gfn_t gfn,
2908 kvm_pfn_t pfn, struct kvm_page_fault *fault)
2910 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
2911 int level = sp->role.level;
2912 int was_rmapped = 0;
2913 int ret = RET_PF_FIXED;
2918 /* Prefetching always gets a writable pfn. */
2919 bool host_writable = !fault || fault->map_writable;
2920 bool prefetch = !fault || fault->prefetch;
2921 bool write_fault = fault && fault->write;
2923 if (unlikely(is_noslot_pfn(pfn))) {
2924 vcpu->stat.pf_mmio_spte_created++;
2925 mark_mmio_spte(vcpu, sptep, gfn, pte_access);
2926 return RET_PF_EMULATE;
2929 if (is_shadow_present_pte(*sptep)) {
2931 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2932 * the parent of the now unreachable PTE.
2934 if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) {
2935 struct kvm_mmu_page *child;
2938 child = spte_to_child_sp(pte);
2939 drop_parent_pte(vcpu->kvm, child, sptep);
2941 } else if (pfn != spte_to_pfn(*sptep)) {
2942 drop_spte(vcpu->kvm, sptep);
2948 wrprot = make_spte(vcpu, sp, slot, pte_access, gfn, pfn, *sptep, prefetch,
2949 true, host_writable, &spte);
2951 if (*sptep == spte) {
2952 ret = RET_PF_SPURIOUS;
2954 flush |= mmu_spte_update(sptep, spte);
2955 trace_kvm_mmu_set_spte(level, gfn, sptep);
2960 ret = RET_PF_EMULATE;
2964 kvm_flush_remote_tlbs_gfn(vcpu->kvm, gfn, level);
2967 WARN_ON_ONCE(ret == RET_PF_SPURIOUS);
2968 rmap_add(vcpu, slot, sptep, gfn, pte_access);
2970 /* Already rmapped but the pte_access bits may have changed. */
2971 kvm_mmu_page_set_access(sp, spte_index(sptep), pte_access);
2977 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2978 struct kvm_mmu_page *sp,
2979 u64 *start, u64 *end)
2981 struct page *pages[PTE_PREFETCH_NUM];
2982 struct kvm_memory_slot *slot;
2983 unsigned int access = sp->role.access;
2987 gfn = kvm_mmu_page_get_gfn(sp, spte_index(start));
2988 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK);
2992 ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start);
2996 for (i = 0; i < ret; i++, gfn++, start++) {
2997 mmu_set_spte(vcpu, slot, start, access, gfn,
2998 page_to_pfn(pages[i]), NULL);
3005 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
3006 struct kvm_mmu_page *sp, u64 *sptep)
3008 u64 *spte, *start = NULL;
3011 WARN_ON_ONCE(!sp->role.direct);
3013 i = spte_index(sptep) & ~(PTE_PREFETCH_NUM - 1);
3016 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
3017 if (is_shadow_present_pte(*spte) || spte == sptep) {
3020 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
3027 direct_pte_prefetch_many(vcpu, sp, start, spte);
3030 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
3032 struct kvm_mmu_page *sp;
3034 sp = sptep_to_sp(sptep);
3037 * Without accessed bits, there's no way to distinguish between
3038 * actually accessed translations and prefetched, so disable pte
3039 * prefetch if accessed bits aren't available.
3041 if (sp_ad_disabled(sp))
3044 if (sp->role.level > PG_LEVEL_4K)
3048 * If addresses are being invalidated, skip prefetching to avoid
3049 * accidentally prefetching those addresses.
3051 if (unlikely(vcpu->kvm->mmu_invalidate_in_progress))
3054 __direct_pte_prefetch(vcpu, sp, sptep);
3058 * Lookup the mapping level for @gfn in the current mm.
3060 * WARNING! Use of host_pfn_mapping_level() requires the caller and the end
3061 * consumer to be tied into KVM's handlers for MMU notifier events!
3063 * There are several ways to safely use this helper:
3065 * - Check mmu_invalidate_retry_gfn() after grabbing the mapping level, before
3066 * consuming it. In this case, mmu_lock doesn't need to be held during the
3067 * lookup, but it does need to be held while checking the MMU notifier.
3069 * - Hold mmu_lock AND ensure there is no in-progress MMU notifier invalidation
3070 * event for the hva. This can be done by explicit checking the MMU notifier
3071 * or by ensuring that KVM already has a valid mapping that covers the hva.
3073 * - Do not use the result to install new mappings, e.g. use the host mapping
3074 * level only to decide whether or not to zap an entry. In this case, it's
3075 * not required to hold mmu_lock (though it's highly likely the caller will
3076 * want to hold mmu_lock anyways, e.g. to modify SPTEs).
3078 * Note! The lookup can still race with modifications to host page tables, but
3079 * the above "rules" ensure KVM will not _consume_ the result of the walk if a
3080 * race with the primary MMU occurs.
3082 static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn,
3083 const struct kvm_memory_slot *slot)
3085 int level = PG_LEVEL_4K;
3087 unsigned long flags;
3094 * Note, using the already-retrieved memslot and __gfn_to_hva_memslot()
3095 * is not solely for performance, it's also necessary to avoid the
3096 * "writable" check in __gfn_to_hva_many(), which will always fail on
3097 * read-only memslots due to gfn_to_hva() assuming writes. Earlier
3098 * page fault steps have already verified the guest isn't writing a
3099 * read-only memslot.
3101 hva = __gfn_to_hva_memslot(slot, gfn);
3104 * Disable IRQs to prevent concurrent tear down of host page tables,
3105 * e.g. if the primary MMU promotes a P*D to a huge page and then frees
3106 * the original page table.
3108 local_irq_save(flags);
3111 * Read each entry once. As above, a non-leaf entry can be promoted to
3112 * a huge page _during_ this walk. Re-reading the entry could send the
3113 * walk into the weeks, e.g. p*d_large() returns false (sees the old
3114 * value) and then p*d_offset() walks into the target huge page instead
3115 * of the old page table (sees the new value).
3117 pgd = READ_ONCE(*pgd_offset(kvm->mm, hva));
3121 p4d = READ_ONCE(*p4d_offset(&pgd, hva));
3122 if (p4d_none(p4d) || !p4d_present(p4d))
3125 pud = READ_ONCE(*pud_offset(&p4d, hva));
3126 if (pud_none(pud) || !pud_present(pud))
3129 if (pud_large(pud)) {
3130 level = PG_LEVEL_1G;
3134 pmd = READ_ONCE(*pmd_offset(&pud, hva));
3135 if (pmd_none(pmd) || !pmd_present(pmd))
3139 level = PG_LEVEL_2M;
3142 local_irq_restore(flags);
3146 static int __kvm_mmu_max_mapping_level(struct kvm *kvm,
3147 const struct kvm_memory_slot *slot,
3148 gfn_t gfn, int max_level, bool is_private)
3150 struct kvm_lpage_info *linfo;
3153 max_level = min(max_level, max_huge_page_level);
3154 for ( ; max_level > PG_LEVEL_4K; max_level--) {
3155 linfo = lpage_info_slot(gfn, slot, max_level);
3156 if (!linfo->disallow_lpage)
3163 if (max_level == PG_LEVEL_4K)
3166 host_level = host_pfn_mapping_level(kvm, gfn, slot);
3167 return min(host_level, max_level);
3170 int kvm_mmu_max_mapping_level(struct kvm *kvm,
3171 const struct kvm_memory_slot *slot, gfn_t gfn,
3174 bool is_private = kvm_slot_can_be_private(slot) &&
3175 kvm_mem_is_private(kvm, gfn);
3177 return __kvm_mmu_max_mapping_level(kvm, slot, gfn, max_level, is_private);
3180 void kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3182 struct kvm_memory_slot *slot = fault->slot;
3185 fault->huge_page_disallowed = fault->exec && fault->nx_huge_page_workaround_enabled;
3187 if (unlikely(fault->max_level == PG_LEVEL_4K))
3190 if (is_error_noslot_pfn(fault->pfn))
3193 if (kvm_slot_dirty_track_enabled(slot))
3197 * Enforce the iTLB multihit workaround after capturing the requested
3198 * level, which will be used to do precise, accurate accounting.
3200 fault->req_level = __kvm_mmu_max_mapping_level(vcpu->kvm, slot,
3201 fault->gfn, fault->max_level,
3203 if (fault->req_level == PG_LEVEL_4K || fault->huge_page_disallowed)
3207 * mmu_invalidate_retry() was successful and mmu_lock is held, so
3208 * the pmd can't be split from under us.
3210 fault->goal_level = fault->req_level;
3211 mask = KVM_PAGES_PER_HPAGE(fault->goal_level) - 1;
3212 VM_BUG_ON((fault->gfn & mask) != (fault->pfn & mask));
3213 fault->pfn &= ~mask;
3216 void disallowed_hugepage_adjust(struct kvm_page_fault *fault, u64 spte, int cur_level)
3218 if (cur_level > PG_LEVEL_4K &&
3219 cur_level == fault->goal_level &&
3220 is_shadow_present_pte(spte) &&
3221 !is_large_pte(spte) &&
3222 spte_to_child_sp(spte)->nx_huge_page_disallowed) {
3224 * A small SPTE exists for this pfn, but FNAME(fetch),
3225 * direct_map(), or kvm_tdp_mmu_map() would like to create a
3226 * large PTE instead: just force them to go down another level,
3227 * patching back for them into pfn the next 9 bits of the
3230 u64 page_mask = KVM_PAGES_PER_HPAGE(cur_level) -
3231 KVM_PAGES_PER_HPAGE(cur_level - 1);
3232 fault->pfn |= fault->gfn & page_mask;
3233 fault->goal_level--;
3237 static int direct_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3239 struct kvm_shadow_walk_iterator it;
3240 struct kvm_mmu_page *sp;
3242 gfn_t base_gfn = fault->gfn;
3244 kvm_mmu_hugepage_adjust(vcpu, fault);
3246 trace_kvm_mmu_spte_requested(fault);
3247 for_each_shadow_entry(vcpu, fault->addr, it) {
3249 * We cannot overwrite existing page tables with an NX
3250 * large page, as the leaf could be executable.
3252 if (fault->nx_huge_page_workaround_enabled)
3253 disallowed_hugepage_adjust(fault, *it.sptep, it.level);
3255 base_gfn = gfn_round_for_level(fault->gfn, it.level);
3256 if (it.level == fault->goal_level)
3259 sp = kvm_mmu_get_child_sp(vcpu, it.sptep, base_gfn, true, ACC_ALL);
3260 if (sp == ERR_PTR(-EEXIST))
3263 link_shadow_page(vcpu, it.sptep, sp);
3264 if (fault->huge_page_disallowed)
3265 account_nx_huge_page(vcpu->kvm, sp,
3266 fault->req_level >= it.level);
3269 if (WARN_ON_ONCE(it.level != fault->goal_level))
3272 ret = mmu_set_spte(vcpu, fault->slot, it.sptep, ACC_ALL,
3273 base_gfn, fault->pfn, fault);
3274 if (ret == RET_PF_SPURIOUS)
3277 direct_pte_prefetch(vcpu, it.sptep);
3281 static void kvm_send_hwpoison_signal(struct kvm_memory_slot *slot, gfn_t gfn)
3283 unsigned long hva = gfn_to_hva_memslot(slot, gfn);
3285 send_sig_mceerr(BUS_MCEERR_AR, (void __user *)hva, PAGE_SHIFT, current);
3288 static int kvm_handle_error_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3290 if (is_sigpending_pfn(fault->pfn)) {
3291 kvm_handle_signal_exit(vcpu);
3296 * Do not cache the mmio info caused by writing the readonly gfn
3297 * into the spte otherwise read access on readonly gfn also can
3298 * caused mmio page fault and treat it as mmio access.
3300 if (fault->pfn == KVM_PFN_ERR_RO_FAULT)
3301 return RET_PF_EMULATE;
3303 if (fault->pfn == KVM_PFN_ERR_HWPOISON) {
3304 kvm_send_hwpoison_signal(fault->slot, fault->gfn);
3305 return RET_PF_RETRY;
3311 static int kvm_handle_noslot_fault(struct kvm_vcpu *vcpu,
3312 struct kvm_page_fault *fault,
3313 unsigned int access)
3315 gva_t gva = fault->is_tdp ? 0 : fault->addr;
3317 vcpu_cache_mmio_info(vcpu, gva, fault->gfn,
3318 access & shadow_mmio_access_mask);
3321 * If MMIO caching is disabled, emulate immediately without
3322 * touching the shadow page tables as attempting to install an
3323 * MMIO SPTE will just be an expensive nop.
3325 if (unlikely(!enable_mmio_caching))
3326 return RET_PF_EMULATE;
3329 * Do not create an MMIO SPTE for a gfn greater than host.MAXPHYADDR,
3330 * any guest that generates such gfns is running nested and is being
3331 * tricked by L0 userspace (you can observe gfn > L1.MAXPHYADDR if and
3332 * only if L1's MAXPHYADDR is inaccurate with respect to the
3335 if (unlikely(fault->gfn > kvm_mmu_max_gfn()))
3336 return RET_PF_EMULATE;
3338 return RET_PF_CONTINUE;
3341 static bool page_fault_can_be_fast(struct kvm_page_fault *fault)
3344 * Page faults with reserved bits set, i.e. faults on MMIO SPTEs, only
3345 * reach the common page fault handler if the SPTE has an invalid MMIO
3346 * generation number. Refreshing the MMIO generation needs to go down
3347 * the slow path. Note, EPT Misconfigs do NOT set the PRESENT flag!
3353 * #PF can be fast if:
3355 * 1. The shadow page table entry is not present and A/D bits are
3356 * disabled _by KVM_, which could mean that the fault is potentially
3357 * caused by access tracking (if enabled). If A/D bits are enabled
3358 * by KVM, but disabled by L1 for L2, KVM is forced to disable A/D
3359 * bits for L2 and employ access tracking, but the fast page fault
3360 * mechanism only supports direct MMUs.
3361 * 2. The shadow page table entry is present, the access is a write,
3362 * and no reserved bits are set (MMIO SPTEs cannot be "fixed"), i.e.
3363 * the fault was caused by a write-protection violation. If the
3364 * SPTE is MMU-writable (determined later), the fault can be fixed
3365 * by setting the Writable bit, which can be done out of mmu_lock.
3367 if (!fault->present)
3368 return !kvm_ad_enabled();
3371 * Note, instruction fetches and writes are mutually exclusive, ignore
3374 return fault->write;
3378 * Returns true if the SPTE was fixed successfully. Otherwise,
3379 * someone else modified the SPTE from its original value.
3381 static bool fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu,
3382 struct kvm_page_fault *fault,
3383 u64 *sptep, u64 old_spte, u64 new_spte)
3386 * Theoretically we could also set dirty bit (and flush TLB) here in
3387 * order to eliminate unnecessary PML logging. See comments in
3388 * set_spte. But fast_page_fault is very unlikely to happen with PML
3389 * enabled, so we do not do this. This might result in the same GPA
3390 * to be logged in PML buffer again when the write really happens, and
3391 * eventually to be called by mark_page_dirty twice. But it's also no
3392 * harm. This also avoids the TLB flush needed after setting dirty bit
3393 * so non-PML cases won't be impacted.
3395 * Compare with set_spte where instead shadow_dirty_mask is set.
3397 if (!try_cmpxchg64(sptep, &old_spte, new_spte))
3400 if (is_writable_pte(new_spte) && !is_writable_pte(old_spte))
3401 mark_page_dirty_in_slot(vcpu->kvm, fault->slot, fault->gfn);
3406 static bool is_access_allowed(struct kvm_page_fault *fault, u64 spte)
3409 return is_executable_pte(spte);
3412 return is_writable_pte(spte);
3414 /* Fault was on Read access */
3415 return spte & PT_PRESENT_MASK;
3419 * Returns the last level spte pointer of the shadow page walk for the given
3420 * gpa, and sets *spte to the spte value. This spte may be non-preset. If no
3421 * walk could be performed, returns NULL and *spte does not contain valid data.
3424 * - Must be called between walk_shadow_page_lockless_{begin,end}.
3425 * - The returned sptep must not be used after walk_shadow_page_lockless_end.
3427 static u64 *fast_pf_get_last_sptep(struct kvm_vcpu *vcpu, gpa_t gpa, u64 *spte)
3429 struct kvm_shadow_walk_iterator iterator;
3433 for_each_shadow_entry_lockless(vcpu, gpa, iterator, old_spte) {
3434 sptep = iterator.sptep;
3442 * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS.
3444 static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3446 struct kvm_mmu_page *sp;
3447 int ret = RET_PF_INVALID;
3450 uint retry_count = 0;
3452 if (!page_fault_can_be_fast(fault))
3455 walk_shadow_page_lockless_begin(vcpu);
3460 if (tdp_mmu_enabled)
3461 sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3463 sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3466 * It's entirely possible for the mapping to have been zapped
3467 * by a different task, but the root page should always be
3468 * available as the vCPU holds a reference to its root(s).
3470 if (WARN_ON_ONCE(!sptep))
3471 spte = REMOVED_SPTE;
3473 if (!is_shadow_present_pte(spte))
3476 sp = sptep_to_sp(sptep);
3477 if (!is_last_spte(spte, sp->role.level))
3481 * Check whether the memory access that caused the fault would
3482 * still cause it if it were to be performed right now. If not,
3483 * then this is a spurious fault caused by TLB lazily flushed,
3484 * or some other CPU has already fixed the PTE after the
3485 * current CPU took the fault.
3487 * Need not check the access of upper level table entries since
3488 * they are always ACC_ALL.
3490 if (is_access_allowed(fault, spte)) {
3491 ret = RET_PF_SPURIOUS;
3498 * KVM only supports fixing page faults outside of MMU lock for
3499 * direct MMUs, nested MMUs are always indirect, and KVM always
3500 * uses A/D bits for non-nested MMUs. Thus, if A/D bits are
3501 * enabled, the SPTE can't be an access-tracked SPTE.
3503 if (unlikely(!kvm_ad_enabled()) && is_access_track_spte(spte))
3504 new_spte = restore_acc_track_spte(new_spte);
3507 * To keep things simple, only SPTEs that are MMU-writable can
3508 * be made fully writable outside of mmu_lock, e.g. only SPTEs
3509 * that were write-protected for dirty-logging or access
3510 * tracking are handled here. Don't bother checking if the
3511 * SPTE is writable to prioritize running with A/D bits enabled.
3512 * The is_access_allowed() check above handles the common case
3513 * of the fault being spurious, and the SPTE is known to be
3514 * shadow-present, i.e. except for access tracking restoration
3515 * making the new SPTE writable, the check is wasteful.
3517 if (fault->write && is_mmu_writable_spte(spte)) {
3518 new_spte |= PT_WRITABLE_MASK;
3521 * Do not fix write-permission on the large spte when
3522 * dirty logging is enabled. Since we only dirty the
3523 * first page into the dirty-bitmap in
3524 * fast_pf_fix_direct_spte(), other pages are missed
3525 * if its slot has dirty logging enabled.
3527 * Instead, we let the slow page fault path create a
3528 * normal spte to fix the access.
3530 if (sp->role.level > PG_LEVEL_4K &&
3531 kvm_slot_dirty_track_enabled(fault->slot))
3535 /* Verify that the fault can be handled in the fast path */
3536 if (new_spte == spte ||
3537 !is_access_allowed(fault, new_spte))
3541 * Currently, fast page fault only works for direct mapping
3542 * since the gfn is not stable for indirect shadow page. See
3543 * Documentation/virt/kvm/locking.rst to get more detail.
3545 if (fast_pf_fix_direct_spte(vcpu, fault, sptep, spte, new_spte)) {
3550 if (++retry_count > 4) {
3551 pr_warn_once("Fast #PF retrying more than 4 times.\n");
3557 trace_fast_page_fault(vcpu, fault, sptep, spte, ret);
3558 walk_shadow_page_lockless_end(vcpu);
3560 if (ret != RET_PF_INVALID)
3561 vcpu->stat.pf_fast++;
3566 static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa,
3567 struct list_head *invalid_list)
3569 struct kvm_mmu_page *sp;
3571 if (!VALID_PAGE(*root_hpa))
3574 sp = root_to_sp(*root_hpa);
3575 if (WARN_ON_ONCE(!sp))
3578 if (is_tdp_mmu_page(sp))
3579 kvm_tdp_mmu_put_root(kvm, sp);
3580 else if (!--sp->root_count && sp->role.invalid)
3581 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
3583 *root_hpa = INVALID_PAGE;
3586 /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */
3587 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
3588 ulong roots_to_free)
3591 LIST_HEAD(invalid_list);
3592 bool free_active_root;
3594 WARN_ON_ONCE(roots_to_free & ~KVM_MMU_ROOTS_ALL);
3596 BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG);
3598 /* Before acquiring the MMU lock, see if we need to do any real work. */
3599 free_active_root = (roots_to_free & KVM_MMU_ROOT_CURRENT)
3600 && VALID_PAGE(mmu->root.hpa);
3602 if (!free_active_root) {
3603 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3604 if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) &&
3605 VALID_PAGE(mmu->prev_roots[i].hpa))
3608 if (i == KVM_MMU_NUM_PREV_ROOTS)
3612 write_lock(&kvm->mmu_lock);
3614 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3615 if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i))
3616 mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa,
3619 if (free_active_root) {
3620 if (kvm_mmu_is_dummy_root(mmu->root.hpa)) {
3621 /* Nothing to cleanup for dummy roots. */
3622 } else if (root_to_sp(mmu->root.hpa)) {
3623 mmu_free_root_page(kvm, &mmu->root.hpa, &invalid_list);
3624 } else if (mmu->pae_root) {
3625 for (i = 0; i < 4; ++i) {
3626 if (!IS_VALID_PAE_ROOT(mmu->pae_root[i]))
3629 mmu_free_root_page(kvm, &mmu->pae_root[i],
3631 mmu->pae_root[i] = INVALID_PAE_ROOT;
3634 mmu->root.hpa = INVALID_PAGE;
3638 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3639 write_unlock(&kvm->mmu_lock);
3641 EXPORT_SYMBOL_GPL(kvm_mmu_free_roots);
3643 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu)
3645 unsigned long roots_to_free = 0;
3646 struct kvm_mmu_page *sp;
3651 * This should not be called while L2 is active, L2 can't invalidate
3652 * _only_ its own roots, e.g. INVVPID unconditionally exits.
3654 WARN_ON_ONCE(mmu->root_role.guest_mode);
3656 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
3657 root_hpa = mmu->prev_roots[i].hpa;
3658 if (!VALID_PAGE(root_hpa))
3661 sp = root_to_sp(root_hpa);
3662 if (!sp || sp->role.guest_mode)
3663 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
3666 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
3668 EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots);
3670 static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, int quadrant,
3673 union kvm_mmu_page_role role = vcpu->arch.mmu->root_role;
3674 struct kvm_mmu_page *sp;
3677 role.quadrant = quadrant;
3679 WARN_ON_ONCE(quadrant && !role.has_4_byte_gpte);
3680 WARN_ON_ONCE(role.direct && role.has_4_byte_gpte);
3682 sp = kvm_mmu_get_shadow_page(vcpu, gfn, role);
3685 return __pa(sp->spt);
3688 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
3690 struct kvm_mmu *mmu = vcpu->arch.mmu;
3691 u8 shadow_root_level = mmu->root_role.level;
3696 write_lock(&vcpu->kvm->mmu_lock);
3697 r = make_mmu_pages_available(vcpu);
3701 if (tdp_mmu_enabled) {
3702 root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu);
3703 mmu->root.hpa = root;
3704 } else if (shadow_root_level >= PT64_ROOT_4LEVEL) {
3705 root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level);
3706 mmu->root.hpa = root;
3707 } else if (shadow_root_level == PT32E_ROOT_LEVEL) {
3708 if (WARN_ON_ONCE(!mmu->pae_root)) {
3713 for (i = 0; i < 4; ++i) {
3714 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3716 root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 0,
3718 mmu->pae_root[i] = root | PT_PRESENT_MASK |
3721 mmu->root.hpa = __pa(mmu->pae_root);
3723 WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level);
3728 /* root.pgd is ignored for direct MMUs. */
3731 write_unlock(&vcpu->kvm->mmu_lock);
3735 static int mmu_first_shadow_root_alloc(struct kvm *kvm)
3737 struct kvm_memslots *slots;
3738 struct kvm_memory_slot *slot;
3742 * Check if this is the first shadow root being allocated before
3745 if (kvm_shadow_root_allocated(kvm))
3748 mutex_lock(&kvm->slots_arch_lock);
3750 /* Recheck, under the lock, whether this is the first shadow root. */
3751 if (kvm_shadow_root_allocated(kvm))
3755 * Check if anything actually needs to be allocated, e.g. all metadata
3756 * will be allocated upfront if TDP is disabled.
3758 if (kvm_memslots_have_rmaps(kvm) &&
3759 kvm_page_track_write_tracking_enabled(kvm))
3762 for (i = 0; i < kvm_arch_nr_memslot_as_ids(kvm); i++) {
3763 slots = __kvm_memslots(kvm, i);
3764 kvm_for_each_memslot(slot, bkt, slots) {
3766 * Both of these functions are no-ops if the target is
3767 * already allocated, so unconditionally calling both
3768 * is safe. Intentionally do NOT free allocations on
3769 * failure to avoid having to track which allocations
3770 * were made now versus when the memslot was created.
3771 * The metadata is guaranteed to be freed when the slot
3772 * is freed, and will be kept/used if userspace retries
3773 * KVM_RUN instead of killing the VM.
3775 r = memslot_rmap_alloc(slot, slot->npages);
3778 r = kvm_page_track_write_tracking_alloc(slot);
3785 * Ensure that shadow_root_allocated becomes true strictly after
3786 * all the related pointers are set.
3789 smp_store_release(&kvm->arch.shadow_root_allocated, true);
3792 mutex_unlock(&kvm->slots_arch_lock);
3796 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
3798 struct kvm_mmu *mmu = vcpu->arch.mmu;
3799 u64 pdptrs[4], pm_mask;
3800 gfn_t root_gfn, root_pgd;
3804 root_pgd = kvm_mmu_get_guest_pgd(vcpu, mmu);
3805 root_gfn = (root_pgd & __PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
3807 if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) {
3808 mmu->root.hpa = kvm_mmu_get_dummy_root();
3813 * On SVM, reading PDPTRs might access guest memory, which might fault
3814 * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock.
3816 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3817 for (i = 0; i < 4; ++i) {
3818 pdptrs[i] = mmu->get_pdptr(vcpu, i);
3819 if (!(pdptrs[i] & PT_PRESENT_MASK))
3822 if (!kvm_vcpu_is_visible_gfn(vcpu, pdptrs[i] >> PAGE_SHIFT))
3827 r = mmu_first_shadow_root_alloc(vcpu->kvm);
3831 write_lock(&vcpu->kvm->mmu_lock);
3832 r = make_mmu_pages_available(vcpu);
3837 * Do we shadow a long mode page table? If so we need to
3838 * write-protect the guests page table root.
3840 if (mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
3841 root = mmu_alloc_root(vcpu, root_gfn, 0,
3842 mmu->root_role.level);
3843 mmu->root.hpa = root;
3847 if (WARN_ON_ONCE(!mmu->pae_root)) {
3853 * We shadow a 32 bit page table. This may be a legacy 2-level
3854 * or a PAE 3-level page table. In either case we need to be aware that
3855 * the shadow page table may be a PAE or a long mode page table.
3857 pm_mask = PT_PRESENT_MASK | shadow_me_value;
3858 if (mmu->root_role.level >= PT64_ROOT_4LEVEL) {
3859 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
3861 if (WARN_ON_ONCE(!mmu->pml4_root)) {
3865 mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask;
3867 if (mmu->root_role.level == PT64_ROOT_5LEVEL) {
3868 if (WARN_ON_ONCE(!mmu->pml5_root)) {
3872 mmu->pml5_root[0] = __pa(mmu->pml4_root) | pm_mask;
3876 for (i = 0; i < 4; ++i) {
3877 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3879 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3880 if (!(pdptrs[i] & PT_PRESENT_MASK)) {
3881 mmu->pae_root[i] = INVALID_PAE_ROOT;
3884 root_gfn = pdptrs[i] >> PAGE_SHIFT;
3888 * If shadowing 32-bit non-PAE page tables, each PAE page
3889 * directory maps one quarter of the guest's non-PAE page
3890 * directory. Othwerise each PAE page direct shadows one guest
3891 * PAE page directory so that quadrant should be 0.
3893 quadrant = (mmu->cpu_role.base.level == PT32_ROOT_LEVEL) ? i : 0;
3895 root = mmu_alloc_root(vcpu, root_gfn, quadrant, PT32_ROOT_LEVEL);
3896 mmu->pae_root[i] = root | pm_mask;
3899 if (mmu->root_role.level == PT64_ROOT_5LEVEL)
3900 mmu->root.hpa = __pa(mmu->pml5_root);
3901 else if (mmu->root_role.level == PT64_ROOT_4LEVEL)
3902 mmu->root.hpa = __pa(mmu->pml4_root);
3904 mmu->root.hpa = __pa(mmu->pae_root);
3907 mmu->root.pgd = root_pgd;
3909 write_unlock(&vcpu->kvm->mmu_lock);
3914 static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu)
3916 struct kvm_mmu *mmu = vcpu->arch.mmu;
3917 bool need_pml5 = mmu->root_role.level > PT64_ROOT_4LEVEL;
3918 u64 *pml5_root = NULL;
3919 u64 *pml4_root = NULL;
3923 * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP
3924 * tables are allocated and initialized at root creation as there is no
3925 * equivalent level in the guest's NPT to shadow. Allocate the tables
3926 * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare.
3928 if (mmu->root_role.direct ||
3929 mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL ||
3930 mmu->root_role.level < PT64_ROOT_4LEVEL)
3934 * NPT, the only paging mode that uses this horror, uses a fixed number
3935 * of levels for the shadow page tables, e.g. all MMUs are 4-level or
3936 * all MMus are 5-level. Thus, this can safely require that pml5_root
3937 * is allocated if the other roots are valid and pml5 is needed, as any
3938 * prior MMU would also have required pml5.
3940 if (mmu->pae_root && mmu->pml4_root && (!need_pml5 || mmu->pml5_root))
3944 * The special roots should always be allocated in concert. Yell and
3945 * bail if KVM ends up in a state where only one of the roots is valid.
3947 if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root ||
3948 (need_pml5 && mmu->pml5_root)))
3952 * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and
3953 * doesn't need to be decrypted.
3955 pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3959 #ifdef CONFIG_X86_64
3960 pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3965 pml5_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3971 mmu->pae_root = pae_root;
3972 mmu->pml4_root = pml4_root;
3973 mmu->pml5_root = pml5_root;
3977 #ifdef CONFIG_X86_64
3979 free_page((unsigned long)pml4_root);
3981 free_page((unsigned long)pae_root);
3986 static bool is_unsync_root(hpa_t root)
3988 struct kvm_mmu_page *sp;
3990 if (!VALID_PAGE(root) || kvm_mmu_is_dummy_root(root))
3994 * The read barrier orders the CPU's read of SPTE.W during the page table
3995 * walk before the reads of sp->unsync/sp->unsync_children here.
3997 * Even if another CPU was marking the SP as unsync-ed simultaneously,
3998 * any guest page table changes are not guaranteed to be visible anyway
3999 * until this VCPU issues a TLB flush strictly after those changes are
4000 * made. We only need to ensure that the other CPU sets these flags
4001 * before any actual changes to the page tables are made. The comments
4002 * in mmu_try_to_unsync_pages() describe what could go wrong if this
4003 * requirement isn't satisfied.
4006 sp = root_to_sp(root);
4009 * PAE roots (somewhat arbitrarily) aren't backed by shadow pages, the
4010 * PDPTEs for a given PAE root need to be synchronized individually.
4012 if (WARN_ON_ONCE(!sp))
4015 if (sp->unsync || sp->unsync_children)
4021 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
4024 struct kvm_mmu_page *sp;
4026 if (vcpu->arch.mmu->root_role.direct)
4029 if (!VALID_PAGE(vcpu->arch.mmu->root.hpa))
4032 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
4034 if (vcpu->arch.mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
4035 hpa_t root = vcpu->arch.mmu->root.hpa;
4037 if (!is_unsync_root(root))
4040 sp = root_to_sp(root);
4042 write_lock(&vcpu->kvm->mmu_lock);
4043 mmu_sync_children(vcpu, sp, true);
4044 write_unlock(&vcpu->kvm->mmu_lock);
4048 write_lock(&vcpu->kvm->mmu_lock);
4050 for (i = 0; i < 4; ++i) {
4051 hpa_t root = vcpu->arch.mmu->pae_root[i];
4053 if (IS_VALID_PAE_ROOT(root)) {
4054 sp = spte_to_child_sp(root);
4055 mmu_sync_children(vcpu, sp, true);
4059 write_unlock(&vcpu->kvm->mmu_lock);
4062 void kvm_mmu_sync_prev_roots(struct kvm_vcpu *vcpu)
4064 unsigned long roots_to_free = 0;
4067 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
4068 if (is_unsync_root(vcpu->arch.mmu->prev_roots[i].hpa))
4069 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
4071 /* sync prev_roots by simply freeing them */
4072 kvm_mmu_free_roots(vcpu->kvm, vcpu->arch.mmu, roots_to_free);
4075 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
4076 gpa_t vaddr, u64 access,
4077 struct x86_exception *exception)
4080 exception->error_code = 0;
4081 return kvm_translate_gpa(vcpu, mmu, vaddr, access, exception);
4084 static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct)
4087 * A nested guest cannot use the MMIO cache if it is using nested
4088 * page tables, because cr2 is a nGPA while the cache stores GPAs.
4090 if (mmu_is_nested(vcpu))
4094 return vcpu_match_mmio_gpa(vcpu, addr);
4096 return vcpu_match_mmio_gva(vcpu, addr);
4100 * Return the level of the lowest level SPTE added to sptes.
4101 * That SPTE may be non-present.
4103 * Must be called between walk_shadow_page_lockless_{begin,end}.
4105 static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level)
4107 struct kvm_shadow_walk_iterator iterator;
4111 for (shadow_walk_init(&iterator, vcpu, addr),
4112 *root_level = iterator.level;
4113 shadow_walk_okay(&iterator);
4114 __shadow_walk_next(&iterator, spte)) {
4115 leaf = iterator.level;
4116 spte = mmu_spte_get_lockless(iterator.sptep);
4124 /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */
4125 static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep)
4127 u64 sptes[PT64_ROOT_MAX_LEVEL + 1];
4128 struct rsvd_bits_validate *rsvd_check;
4129 int root, leaf, level;
4130 bool reserved = false;
4132 walk_shadow_page_lockless_begin(vcpu);
4134 if (is_tdp_mmu_active(vcpu))
4135 leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root);
4137 leaf = get_walk(vcpu, addr, sptes, &root);
4139 walk_shadow_page_lockless_end(vcpu);
4141 if (unlikely(leaf < 0)) {
4146 *sptep = sptes[leaf];
4149 * Skip reserved bits checks on the terminal leaf if it's not a valid
4150 * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by
4151 * design, always have reserved bits set. The purpose of the checks is
4152 * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs.
4154 if (!is_shadow_present_pte(sptes[leaf]))
4157 rsvd_check = &vcpu->arch.mmu->shadow_zero_check;
4159 for (level = root; level >= leaf; level--)
4160 reserved |= is_rsvd_spte(rsvd_check, sptes[level], level);
4163 pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n",
4165 for (level = root; level >= leaf; level--)
4166 pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx",
4167 sptes[level], level,
4168 get_rsvd_bits(rsvd_check, sptes[level], level));
4174 static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct)
4179 if (mmio_info_in_cache(vcpu, addr, direct))
4180 return RET_PF_EMULATE;
4182 reserved = get_mmio_spte(vcpu, addr, &spte);
4183 if (WARN_ON_ONCE(reserved))
4186 if (is_mmio_spte(spte)) {
4187 gfn_t gfn = get_mmio_spte_gfn(spte);
4188 unsigned int access = get_mmio_spte_access(spte);
4190 if (!check_mmio_spte(vcpu, spte))
4191 return RET_PF_INVALID;
4196 trace_handle_mmio_page_fault(addr, gfn, access);
4197 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
4198 return RET_PF_EMULATE;
4202 * If the page table is zapped by other cpus, let CPU fault again on
4205 return RET_PF_RETRY;
4208 static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu,
4209 struct kvm_page_fault *fault)
4211 if (unlikely(fault->rsvd))
4214 if (!fault->present || !fault->write)
4218 * guest is writing the page which is write tracked which can
4219 * not be fixed by page fault handler.
4221 if (kvm_gfn_is_write_tracked(vcpu->kvm, fault->slot, fault->gfn))
4227 static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr)
4229 struct kvm_shadow_walk_iterator iterator;
4232 walk_shadow_page_lockless_begin(vcpu);
4233 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte)
4234 clear_sp_write_flooding_count(iterator.sptep);
4235 walk_shadow_page_lockless_end(vcpu);
4238 static u32 alloc_apf_token(struct kvm_vcpu *vcpu)
4240 /* make sure the token value is not 0 */
4241 u32 id = vcpu->arch.apf.id;
4244 vcpu->arch.apf.id = 1;
4246 return (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
4249 static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
4252 struct kvm_arch_async_pf arch;
4254 arch.token = alloc_apf_token(vcpu);
4256 arch.direct_map = vcpu->arch.mmu->root_role.direct;
4257 arch.cr3 = kvm_mmu_get_guest_pgd(vcpu, vcpu->arch.mmu);
4259 return kvm_setup_async_pf(vcpu, cr2_or_gpa,
4260 kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch);
4263 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
4267 if ((vcpu->arch.mmu->root_role.direct != work->arch.direct_map) ||
4271 r = kvm_mmu_reload(vcpu);
4275 if (!vcpu->arch.mmu->root_role.direct &&
4276 work->arch.cr3 != kvm_mmu_get_guest_pgd(vcpu, vcpu->arch.mmu))
4279 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true, NULL);
4282 static inline u8 kvm_max_level_for_order(int order)
4284 BUILD_BUG_ON(KVM_MAX_HUGEPAGE_LEVEL > PG_LEVEL_1G);
4286 KVM_MMU_WARN_ON(order != KVM_HPAGE_GFN_SHIFT(PG_LEVEL_1G) &&
4287 order != KVM_HPAGE_GFN_SHIFT(PG_LEVEL_2M) &&
4288 order != KVM_HPAGE_GFN_SHIFT(PG_LEVEL_4K));
4290 if (order >= KVM_HPAGE_GFN_SHIFT(PG_LEVEL_1G))
4293 if (order >= KVM_HPAGE_GFN_SHIFT(PG_LEVEL_2M))
4299 static void kvm_mmu_prepare_memory_fault_exit(struct kvm_vcpu *vcpu,
4300 struct kvm_page_fault *fault)
4302 kvm_prepare_memory_fault_exit(vcpu, fault->gfn << PAGE_SHIFT,
4303 PAGE_SIZE, fault->write, fault->exec,
4307 static int kvm_faultin_pfn_private(struct kvm_vcpu *vcpu,
4308 struct kvm_page_fault *fault)
4312 if (!kvm_slot_can_be_private(fault->slot)) {
4313 kvm_mmu_prepare_memory_fault_exit(vcpu, fault);
4317 r = kvm_gmem_get_pfn(vcpu->kvm, fault->slot, fault->gfn, &fault->pfn,
4320 kvm_mmu_prepare_memory_fault_exit(vcpu, fault);
4324 fault->max_level = min(kvm_max_level_for_order(max_order),
4326 fault->map_writable = !(fault->slot->flags & KVM_MEM_READONLY);
4328 return RET_PF_CONTINUE;
4331 static int __kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4333 struct kvm_memory_slot *slot = fault->slot;
4337 * Retry the page fault if the gfn hit a memslot that is being deleted
4338 * or moved. This ensures any existing SPTEs for the old memslot will
4339 * be zapped before KVM inserts a new MMIO SPTE for the gfn.
4341 if (slot && (slot->flags & KVM_MEMSLOT_INVALID))
4342 return RET_PF_RETRY;
4344 if (!kvm_is_visible_memslot(slot)) {
4345 /* Don't expose private memslots to L2. */
4346 if (is_guest_mode(vcpu)) {
4348 fault->pfn = KVM_PFN_NOSLOT;
4349 fault->map_writable = false;
4350 return RET_PF_CONTINUE;
4353 * If the APIC access page exists but is disabled, go directly
4354 * to emulation without caching the MMIO access or creating a
4355 * MMIO SPTE. That way the cache doesn't need to be purged
4356 * when the AVIC is re-enabled.
4358 if (slot && slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT &&
4359 !kvm_apicv_activated(vcpu->kvm))
4360 return RET_PF_EMULATE;
4363 if (fault->is_private != kvm_mem_is_private(vcpu->kvm, fault->gfn)) {
4364 kvm_mmu_prepare_memory_fault_exit(vcpu, fault);
4368 if (fault->is_private)
4369 return kvm_faultin_pfn_private(vcpu, fault);
4372 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, false, &async,
4373 fault->write, &fault->map_writable,
4376 return RET_PF_CONTINUE; /* *pfn has correct page already */
4378 if (!fault->prefetch && kvm_can_do_async_pf(vcpu)) {
4379 trace_kvm_try_async_get_page(fault->addr, fault->gfn);
4380 if (kvm_find_async_pf_gfn(vcpu, fault->gfn)) {
4381 trace_kvm_async_pf_repeated_fault(fault->addr, fault->gfn);
4382 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
4383 return RET_PF_RETRY;
4384 } else if (kvm_arch_setup_async_pf(vcpu, fault->addr, fault->gfn)) {
4385 return RET_PF_RETRY;
4390 * Allow gup to bail on pending non-fatal signals when it's also allowed
4391 * to wait for IO. Note, gup always bails if it is unable to quickly
4392 * get a page and a fatal signal, i.e. SIGKILL, is pending.
4394 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, true, NULL,
4395 fault->write, &fault->map_writable,
4397 return RET_PF_CONTINUE;
4400 static int kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault,
4401 unsigned int access)
4405 fault->mmu_seq = vcpu->kvm->mmu_invalidate_seq;
4409 * Check for a relevant mmu_notifier invalidation event before getting
4410 * the pfn from the primary MMU, and before acquiring mmu_lock.
4412 * For mmu_lock, if there is an in-progress invalidation and the kernel
4413 * allows preemption, the invalidation task may drop mmu_lock and yield
4414 * in response to mmu_lock being contended, which is *very* counter-
4415 * productive as this vCPU can't actually make forward progress until
4416 * the invalidation completes.
4418 * Retrying now can also avoid unnessary lock contention in the primary
4419 * MMU, as the primary MMU doesn't necessarily hold a single lock for
4420 * the duration of the invalidation, i.e. faulting in a conflicting pfn
4421 * can cause the invalidation to take longer by holding locks that are
4422 * needed to complete the invalidation.
4424 * Do the pre-check even for non-preemtible kernels, i.e. even if KVM
4425 * will never yield mmu_lock in response to contention, as this vCPU is
4426 * *guaranteed* to need to retry, i.e. waiting until mmu_lock is held
4427 * to detect retry guarantees the worst case latency for the vCPU.
4430 mmu_invalidate_retry_gfn_unsafe(vcpu->kvm, fault->mmu_seq, fault->gfn))
4431 return RET_PF_RETRY;
4433 ret = __kvm_faultin_pfn(vcpu, fault);
4434 if (ret != RET_PF_CONTINUE)
4437 if (unlikely(is_error_pfn(fault->pfn)))
4438 return kvm_handle_error_pfn(vcpu, fault);
4440 if (unlikely(!fault->slot))
4441 return kvm_handle_noslot_fault(vcpu, fault, access);
4444 * Check again for a relevant mmu_notifier invalidation event purely to
4445 * avoid contending mmu_lock. Most invalidations will be detected by
4446 * the previous check, but checking is extremely cheap relative to the
4447 * overall cost of failing to detect the invalidation until after
4448 * mmu_lock is acquired.
4450 if (mmu_invalidate_retry_gfn_unsafe(vcpu->kvm, fault->mmu_seq, fault->gfn)) {
4451 kvm_release_pfn_clean(fault->pfn);
4452 return RET_PF_RETRY;
4455 return RET_PF_CONTINUE;
4459 * Returns true if the page fault is stale and needs to be retried, i.e. if the
4460 * root was invalidated by a memslot update or a relevant mmu_notifier fired.
4462 static bool is_page_fault_stale(struct kvm_vcpu *vcpu,
4463 struct kvm_page_fault *fault)
4465 struct kvm_mmu_page *sp = root_to_sp(vcpu->arch.mmu->root.hpa);
4467 /* Special roots, e.g. pae_root, are not backed by shadow pages. */
4468 if (sp && is_obsolete_sp(vcpu->kvm, sp))
4472 * Roots without an associated shadow page are considered invalid if
4473 * there is a pending request to free obsolete roots. The request is
4474 * only a hint that the current root _may_ be obsolete and needs to be
4475 * reloaded, e.g. if the guest frees a PGD that KVM is tracking as a
4476 * previous root, then __kvm_mmu_prepare_zap_page() signals all vCPUs
4477 * to reload even if no vCPU is actively using the root.
4479 if (!sp && kvm_test_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
4483 * Check for a relevant mmu_notifier invalidation event one last time
4484 * now that mmu_lock is held, as the "unsafe" checks performed without
4485 * holding mmu_lock can get false negatives.
4487 return fault->slot &&
4488 mmu_invalidate_retry_gfn(vcpu->kvm, fault->mmu_seq, fault->gfn);
4491 static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4495 /* Dummy roots are used only for shadowing bad guest roots. */
4496 if (WARN_ON_ONCE(kvm_mmu_is_dummy_root(vcpu->arch.mmu->root.hpa)))
4497 return RET_PF_RETRY;
4499 if (page_fault_handle_page_track(vcpu, fault))
4500 return RET_PF_EMULATE;
4502 r = fast_page_fault(vcpu, fault);
4503 if (r != RET_PF_INVALID)
4506 r = mmu_topup_memory_caches(vcpu, false);
4510 r = kvm_faultin_pfn(vcpu, fault, ACC_ALL);
4511 if (r != RET_PF_CONTINUE)
4515 write_lock(&vcpu->kvm->mmu_lock);
4517 if (is_page_fault_stale(vcpu, fault))
4520 r = make_mmu_pages_available(vcpu);
4524 r = direct_map(vcpu, fault);
4527 write_unlock(&vcpu->kvm->mmu_lock);
4528 kvm_release_pfn_clean(fault->pfn);
4532 static int nonpaging_page_fault(struct kvm_vcpu *vcpu,
4533 struct kvm_page_fault *fault)
4535 /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */
4536 fault->max_level = PG_LEVEL_2M;
4537 return direct_page_fault(vcpu, fault);
4540 int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code,
4541 u64 fault_address, char *insn, int insn_len)
4544 u32 flags = vcpu->arch.apf.host_apf_flags;
4546 #ifndef CONFIG_X86_64
4547 /* A 64-bit CR2 should be impossible on 32-bit KVM. */
4548 if (WARN_ON_ONCE(fault_address >> 32))
4552 vcpu->arch.l1tf_flush_l1d = true;
4554 trace_kvm_page_fault(vcpu, fault_address, error_code);
4556 if (kvm_event_needs_reinjection(vcpu))
4557 kvm_mmu_unprotect_page_virt(vcpu, fault_address);
4558 r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn,
4560 } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) {
4561 vcpu->arch.apf.host_apf_flags = 0;
4562 local_irq_disable();
4563 kvm_async_pf_task_wait_schedule(fault_address);
4566 WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags);
4571 EXPORT_SYMBOL_GPL(kvm_handle_page_fault);
4573 #ifdef CONFIG_X86_64
4574 static int kvm_tdp_mmu_page_fault(struct kvm_vcpu *vcpu,
4575 struct kvm_page_fault *fault)
4579 if (page_fault_handle_page_track(vcpu, fault))
4580 return RET_PF_EMULATE;
4582 r = fast_page_fault(vcpu, fault);
4583 if (r != RET_PF_INVALID)
4586 r = mmu_topup_memory_caches(vcpu, false);
4590 r = kvm_faultin_pfn(vcpu, fault, ACC_ALL);
4591 if (r != RET_PF_CONTINUE)
4595 read_lock(&vcpu->kvm->mmu_lock);
4597 if (is_page_fault_stale(vcpu, fault))
4600 r = kvm_tdp_mmu_map(vcpu, fault);
4603 read_unlock(&vcpu->kvm->mmu_lock);
4604 kvm_release_pfn_clean(fault->pfn);
4609 bool __kvm_mmu_honors_guest_mtrrs(bool vm_has_noncoherent_dma)
4612 * If host MTRRs are ignored (shadow_memtype_mask is non-zero), and the
4613 * VM has non-coherent DMA (DMA doesn't snoop CPU caches), KVM's ABI is
4614 * to honor the memtype from the guest's MTRRs so that guest accesses
4615 * to memory that is DMA'd aren't cached against the guest's wishes.
4617 * Note, KVM may still ultimately ignore guest MTRRs for certain PFNs,
4618 * e.g. KVM will force UC memtype for host MMIO.
4620 return vm_has_noncoherent_dma && shadow_memtype_mask;
4623 int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4626 * If the guest's MTRRs may be used to compute the "real" memtype,
4627 * restrict the mapping level to ensure KVM uses a consistent memtype
4628 * across the entire mapping.
4630 if (kvm_mmu_honors_guest_mtrrs(vcpu->kvm)) {
4631 for ( ; fault->max_level > PG_LEVEL_4K; --fault->max_level) {
4632 int page_num = KVM_PAGES_PER_HPAGE(fault->max_level);
4633 gfn_t base = gfn_round_for_level(fault->gfn,
4636 if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num))
4641 #ifdef CONFIG_X86_64
4642 if (tdp_mmu_enabled)
4643 return kvm_tdp_mmu_page_fault(vcpu, fault);
4646 return direct_page_fault(vcpu, fault);
4649 static void nonpaging_init_context(struct kvm_mmu *context)
4651 context->page_fault = nonpaging_page_fault;
4652 context->gva_to_gpa = nonpaging_gva_to_gpa;
4653 context->sync_spte = NULL;
4656 static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd,
4657 union kvm_mmu_page_role role)
4659 struct kvm_mmu_page *sp;
4661 if (!VALID_PAGE(root->hpa))
4664 if (!role.direct && pgd != root->pgd)
4667 sp = root_to_sp(root->hpa);
4668 if (WARN_ON_ONCE(!sp))
4671 return role.word == sp->role.word;
4675 * Find out if a previously cached root matching the new pgd/role is available,
4676 * and insert the current root as the MRU in the cache.
4677 * If a matching root is found, it is assigned to kvm_mmu->root and
4679 * If no match is found, kvm_mmu->root is left invalid, the LRU root is
4680 * evicted to make room for the current root, and false is returned.
4682 static bool cached_root_find_and_keep_current(struct kvm *kvm, struct kvm_mmu *mmu,
4684 union kvm_mmu_page_role new_role)
4688 if (is_root_usable(&mmu->root, new_pgd, new_role))
4691 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
4693 * The swaps end up rotating the cache like this:
4694 * C 0 1 2 3 (on entry to the function)
4698 * 3 C 0 1 2 (on exit from the loop)
4700 swap(mmu->root, mmu->prev_roots[i]);
4701 if (is_root_usable(&mmu->root, new_pgd, new_role))
4705 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4710 * Find out if a previously cached root matching the new pgd/role is available.
4711 * On entry, mmu->root is invalid.
4712 * If a matching root is found, it is assigned to kvm_mmu->root, the LRU entry
4713 * of the cache becomes invalid, and true is returned.
4714 * If no match is found, kvm_mmu->root is left invalid and false is returned.
4716 static bool cached_root_find_without_current(struct kvm *kvm, struct kvm_mmu *mmu,
4718 union kvm_mmu_page_role new_role)
4722 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
4723 if (is_root_usable(&mmu->prev_roots[i], new_pgd, new_role))
4729 swap(mmu->root, mmu->prev_roots[i]);
4730 /* Bubble up the remaining roots. */
4731 for (; i < KVM_MMU_NUM_PREV_ROOTS - 1; i++)
4732 mmu->prev_roots[i] = mmu->prev_roots[i + 1];
4733 mmu->prev_roots[i].hpa = INVALID_PAGE;
4737 static bool fast_pgd_switch(struct kvm *kvm, struct kvm_mmu *mmu,
4738 gpa_t new_pgd, union kvm_mmu_page_role new_role)
4741 * Limit reuse to 64-bit hosts+VMs without "special" roots in order to
4742 * avoid having to deal with PDPTEs and other complexities.
4744 if (VALID_PAGE(mmu->root.hpa) && !root_to_sp(mmu->root.hpa))
4745 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4747 if (VALID_PAGE(mmu->root.hpa))
4748 return cached_root_find_and_keep_current(kvm, mmu, new_pgd, new_role);
4750 return cached_root_find_without_current(kvm, mmu, new_pgd, new_role);
4753 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd)
4755 struct kvm_mmu *mmu = vcpu->arch.mmu;
4756 union kvm_mmu_page_role new_role = mmu->root_role;
4759 * Return immediately if no usable root was found, kvm_mmu_reload()
4760 * will establish a valid root prior to the next VM-Enter.
4762 if (!fast_pgd_switch(vcpu->kvm, mmu, new_pgd, new_role))
4766 * It's possible that the cached previous root page is obsolete because
4767 * of a change in the MMU generation number. However, changing the
4768 * generation number is accompanied by KVM_REQ_MMU_FREE_OBSOLETE_ROOTS,
4769 * which will free the root set here and allocate a new one.
4771 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
4773 if (force_flush_and_sync_on_reuse) {
4774 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
4775 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
4779 * The last MMIO access's GVA and GPA are cached in the VCPU. When
4780 * switching to a new CR3, that GVA->GPA mapping may no longer be
4781 * valid. So clear any cached MMIO info even when we don't need to sync
4782 * the shadow page tables.
4784 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
4787 * If this is a direct root page, it doesn't have a write flooding
4788 * count. Otherwise, clear the write flooding count.
4790 if (!new_role.direct) {
4791 struct kvm_mmu_page *sp = root_to_sp(vcpu->arch.mmu->root.hpa);
4793 if (!WARN_ON_ONCE(!sp))
4794 __clear_sp_write_flooding_count(sp);
4797 EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd);
4799 static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
4800 unsigned int access)
4802 if (unlikely(is_mmio_spte(*sptep))) {
4803 if (gfn != get_mmio_spte_gfn(*sptep)) {
4804 mmu_spte_clear_no_track(sptep);
4808 mark_mmio_spte(vcpu, sptep, gfn, access);
4815 #define PTTYPE_EPT 18 /* arbitrary */
4816 #define PTTYPE PTTYPE_EPT
4817 #include "paging_tmpl.h"
4821 #include "paging_tmpl.h"
4825 #include "paging_tmpl.h"
4828 static void __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check,
4829 u64 pa_bits_rsvd, int level, bool nx,
4830 bool gbpages, bool pse, bool amd)
4832 u64 gbpages_bit_rsvd = 0;
4833 u64 nonleaf_bit8_rsvd = 0;
4836 rsvd_check->bad_mt_xwr = 0;
4839 gbpages_bit_rsvd = rsvd_bits(7, 7);
4841 if (level == PT32E_ROOT_LEVEL)
4842 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62);
4844 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4846 /* Note, NX doesn't exist in PDPTEs, this is handled below. */
4848 high_bits_rsvd |= rsvd_bits(63, 63);
4851 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
4852 * leaf entries) on AMD CPUs only.
4855 nonleaf_bit8_rsvd = rsvd_bits(8, 8);
4858 case PT32_ROOT_LEVEL:
4859 /* no rsvd bits for 2 level 4K page table entries */
4860 rsvd_check->rsvd_bits_mask[0][1] = 0;
4861 rsvd_check->rsvd_bits_mask[0][0] = 0;
4862 rsvd_check->rsvd_bits_mask[1][0] =
4863 rsvd_check->rsvd_bits_mask[0][0];
4866 rsvd_check->rsvd_bits_mask[1][1] = 0;
4870 if (is_cpuid_PSE36())
4871 /* 36bits PSE 4MB page */
4872 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
4874 /* 32 bits PSE 4MB page */
4875 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
4877 case PT32E_ROOT_LEVEL:
4878 rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) |
4881 rsvd_bits(1, 2); /* PDPTE */
4882 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */
4883 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */
4884 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4885 rsvd_bits(13, 20); /* large page */
4886 rsvd_check->rsvd_bits_mask[1][0] =
4887 rsvd_check->rsvd_bits_mask[0][0];
4889 case PT64_ROOT_5LEVEL:
4890 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd |
4893 rsvd_check->rsvd_bits_mask[1][4] =
4894 rsvd_check->rsvd_bits_mask[0][4];
4896 case PT64_ROOT_4LEVEL:
4897 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd |
4900 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd |
4902 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd;
4903 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4904 rsvd_check->rsvd_bits_mask[1][3] =
4905 rsvd_check->rsvd_bits_mask[0][3];
4906 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd |
4909 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4910 rsvd_bits(13, 20); /* large page */
4911 rsvd_check->rsvd_bits_mask[1][0] =
4912 rsvd_check->rsvd_bits_mask[0][0];
4917 static void reset_guest_rsvds_bits_mask(struct kvm_vcpu *vcpu,
4918 struct kvm_mmu *context)
4920 __reset_rsvds_bits_mask(&context->guest_rsvd_check,
4921 vcpu->arch.reserved_gpa_bits,
4922 context->cpu_role.base.level, is_efer_nx(context),
4923 guest_can_use(vcpu, X86_FEATURE_GBPAGES),
4924 is_cr4_pse(context),
4925 guest_cpuid_is_amd_or_hygon(vcpu));
4928 static void __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check,
4929 u64 pa_bits_rsvd, bool execonly,
4930 int huge_page_level)
4932 u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4933 u64 large_1g_rsvd = 0, large_2m_rsvd = 0;
4936 if (huge_page_level < PG_LEVEL_1G)
4937 large_1g_rsvd = rsvd_bits(7, 7);
4938 if (huge_page_level < PG_LEVEL_2M)
4939 large_2m_rsvd = rsvd_bits(7, 7);
4941 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7);
4942 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7);
4943 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6) | large_1g_rsvd;
4944 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6) | large_2m_rsvd;
4945 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4948 rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4];
4949 rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3];
4950 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29) | large_1g_rsvd;
4951 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20) | large_2m_rsvd;
4952 rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0];
4954 bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */
4955 bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */
4956 bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */
4957 bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */
4958 bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */
4960 /* bits 0..2 must not be 100 unless VMX capabilities allow it */
4961 bad_mt_xwr |= REPEAT_BYTE(1ull << 4);
4963 rsvd_check->bad_mt_xwr = bad_mt_xwr;
4966 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
4967 struct kvm_mmu *context, bool execonly, int huge_page_level)
4969 __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check,
4970 vcpu->arch.reserved_gpa_bits, execonly,
4974 static inline u64 reserved_hpa_bits(void)
4976 return rsvd_bits(shadow_phys_bits, 63);
4980 * the page table on host is the shadow page table for the page
4981 * table in guest or amd nested guest, its mmu features completely
4982 * follow the features in guest.
4984 static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
4985 struct kvm_mmu *context)
4987 /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */
4989 /* KVM doesn't use 2-level page tables for the shadow MMU. */
4990 bool is_pse = false;
4991 struct rsvd_bits_validate *shadow_zero_check;
4994 WARN_ON_ONCE(context->root_role.level < PT32E_ROOT_LEVEL);
4996 shadow_zero_check = &context->shadow_zero_check;
4997 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
4998 context->root_role.level,
4999 context->root_role.efer_nx,
5000 guest_can_use(vcpu, X86_FEATURE_GBPAGES),
5003 if (!shadow_me_mask)
5006 for (i = context->root_role.level; --i >= 0;) {
5008 * So far shadow_me_value is a constant during KVM's life
5009 * time. Bits in shadow_me_value are allowed to be set.
5010 * Bits in shadow_me_mask but not in shadow_me_value are
5011 * not allowed to be set.
5013 shadow_zero_check->rsvd_bits_mask[0][i] |= shadow_me_mask;
5014 shadow_zero_check->rsvd_bits_mask[1][i] |= shadow_me_mask;
5015 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_value;
5016 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_value;
5021 static inline bool boot_cpu_is_amd(void)
5023 WARN_ON_ONCE(!tdp_enabled);
5024 return shadow_x_mask == 0;
5028 * the direct page table on host, use as much mmu features as
5029 * possible, however, kvm currently does not do execution-protection.
5031 static void reset_tdp_shadow_zero_bits_mask(struct kvm_mmu *context)
5033 struct rsvd_bits_validate *shadow_zero_check;
5036 shadow_zero_check = &context->shadow_zero_check;
5038 if (boot_cpu_is_amd())
5039 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
5040 context->root_role.level, true,
5041 boot_cpu_has(X86_FEATURE_GBPAGES),
5044 __reset_rsvds_bits_mask_ept(shadow_zero_check,
5045 reserved_hpa_bits(), false,
5046 max_huge_page_level);
5048 if (!shadow_me_mask)
5051 for (i = context->root_role.level; --i >= 0;) {
5052 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask;
5053 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask;
5058 * as the comments in reset_shadow_zero_bits_mask() except it
5059 * is the shadow page table for intel nested guest.
5062 reset_ept_shadow_zero_bits_mask(struct kvm_mmu *context, bool execonly)
5064 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
5065 reserved_hpa_bits(), execonly,
5066 max_huge_page_level);
5069 #define BYTE_MASK(access) \
5070 ((1 & (access) ? 2 : 0) | \
5071 (2 & (access) ? 4 : 0) | \
5072 (3 & (access) ? 8 : 0) | \
5073 (4 & (access) ? 16 : 0) | \
5074 (5 & (access) ? 32 : 0) | \
5075 (6 & (access) ? 64 : 0) | \
5076 (7 & (access) ? 128 : 0))
5079 static void update_permission_bitmask(struct kvm_mmu *mmu, bool ept)
5083 const u8 x = BYTE_MASK(ACC_EXEC_MASK);
5084 const u8 w = BYTE_MASK(ACC_WRITE_MASK);
5085 const u8 u = BYTE_MASK(ACC_USER_MASK);
5087 bool cr4_smep = is_cr4_smep(mmu);
5088 bool cr4_smap = is_cr4_smap(mmu);
5089 bool cr0_wp = is_cr0_wp(mmu);
5090 bool efer_nx = is_efer_nx(mmu);
5092 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
5093 unsigned pfec = byte << 1;
5096 * Each "*f" variable has a 1 bit for each UWX value
5097 * that causes a fault with the given PFEC.
5100 /* Faults from writes to non-writable pages */
5101 u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0;
5102 /* Faults from user mode accesses to supervisor pages */
5103 u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0;
5104 /* Faults from fetches of non-executable pages*/
5105 u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0;
5106 /* Faults from kernel mode fetches of user pages */
5108 /* Faults from kernel mode accesses of user pages */
5112 /* Faults from kernel mode accesses to user pages */
5113 u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u;
5115 /* Not really needed: !nx will cause pte.nx to fault */
5119 /* Allow supervisor writes if !cr0.wp */
5121 wf = (pfec & PFERR_USER_MASK) ? wf : 0;
5123 /* Disallow supervisor fetches of user code if cr4.smep */
5125 smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0;
5128 * SMAP:kernel-mode data accesses from user-mode
5129 * mappings should fault. A fault is considered
5130 * as a SMAP violation if all of the following
5131 * conditions are true:
5132 * - X86_CR4_SMAP is set in CR4
5133 * - A user page is accessed
5134 * - The access is not a fetch
5135 * - The access is supervisor mode
5136 * - If implicit supervisor access or X86_EFLAGS_AC is clear
5138 * Here, we cover the first four conditions.
5139 * The fifth is computed dynamically in permission_fault();
5140 * PFERR_RSVD_MASK bit will be set in PFEC if the access is
5141 * *not* subject to SMAP restrictions.
5144 smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf;
5147 mmu->permissions[byte] = ff | uf | wf | smepf | smapf;
5152 * PKU is an additional mechanism by which the paging controls access to
5153 * user-mode addresses based on the value in the PKRU register. Protection
5154 * key violations are reported through a bit in the page fault error code.
5155 * Unlike other bits of the error code, the PK bit is not known at the
5156 * call site of e.g. gva_to_gpa; it must be computed directly in
5157 * permission_fault based on two bits of PKRU, on some machine state (CR4,
5158 * CR0, EFER, CPL), and on other bits of the error code and the page tables.
5160 * In particular the following conditions come from the error code, the
5161 * page tables and the machine state:
5162 * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1
5163 * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch)
5164 * - PK is always zero if U=0 in the page tables
5165 * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access.
5167 * The PKRU bitmask caches the result of these four conditions. The error
5168 * code (minus the P bit) and the page table's U bit form an index into the
5169 * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed
5170 * with the two bits of the PKRU register corresponding to the protection key.
5171 * For the first three conditions above the bits will be 00, thus masking
5172 * away both AD and WD. For all reads or if the last condition holds, WD
5173 * only will be masked away.
5175 static void update_pkru_bitmask(struct kvm_mmu *mmu)
5182 if (!is_cr4_pke(mmu))
5185 wp = is_cr0_wp(mmu);
5187 for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) {
5188 unsigned pfec, pkey_bits;
5189 bool check_pkey, check_write, ff, uf, wf, pte_user;
5192 ff = pfec & PFERR_FETCH_MASK;
5193 uf = pfec & PFERR_USER_MASK;
5194 wf = pfec & PFERR_WRITE_MASK;
5196 /* PFEC.RSVD is replaced by ACC_USER_MASK. */
5197 pte_user = pfec & PFERR_RSVD_MASK;
5200 * Only need to check the access which is not an
5201 * instruction fetch and is to a user page.
5203 check_pkey = (!ff && pte_user);
5205 * write access is controlled by PKRU if it is a
5206 * user access or CR0.WP = 1.
5208 check_write = check_pkey && wf && (uf || wp);
5210 /* PKRU.AD stops both read and write access. */
5211 pkey_bits = !!check_pkey;
5212 /* PKRU.WD stops write access. */
5213 pkey_bits |= (!!check_write) << 1;
5215 mmu->pkru_mask |= (pkey_bits & 3) << pfec;
5219 static void reset_guest_paging_metadata(struct kvm_vcpu *vcpu,
5220 struct kvm_mmu *mmu)
5222 if (!is_cr0_pg(mmu))
5225 reset_guest_rsvds_bits_mask(vcpu, mmu);
5226 update_permission_bitmask(mmu, false);
5227 update_pkru_bitmask(mmu);
5230 static void paging64_init_context(struct kvm_mmu *context)
5232 context->page_fault = paging64_page_fault;
5233 context->gva_to_gpa = paging64_gva_to_gpa;
5234 context->sync_spte = paging64_sync_spte;
5237 static void paging32_init_context(struct kvm_mmu *context)
5239 context->page_fault = paging32_page_fault;
5240 context->gva_to_gpa = paging32_gva_to_gpa;
5241 context->sync_spte = paging32_sync_spte;
5244 static union kvm_cpu_role kvm_calc_cpu_role(struct kvm_vcpu *vcpu,
5245 const struct kvm_mmu_role_regs *regs)
5247 union kvm_cpu_role role = {0};
5249 role.base.access = ACC_ALL;
5250 role.base.smm = is_smm(vcpu);
5251 role.base.guest_mode = is_guest_mode(vcpu);
5254 if (!____is_cr0_pg(regs)) {
5255 role.base.direct = 1;
5259 role.base.efer_nx = ____is_efer_nx(regs);
5260 role.base.cr0_wp = ____is_cr0_wp(regs);
5261 role.base.smep_andnot_wp = ____is_cr4_smep(regs) && !____is_cr0_wp(regs);
5262 role.base.smap_andnot_wp = ____is_cr4_smap(regs) && !____is_cr0_wp(regs);
5263 role.base.has_4_byte_gpte = !____is_cr4_pae(regs);
5265 if (____is_efer_lma(regs))
5266 role.base.level = ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL
5268 else if (____is_cr4_pae(regs))
5269 role.base.level = PT32E_ROOT_LEVEL;
5271 role.base.level = PT32_ROOT_LEVEL;
5273 role.ext.cr4_smep = ____is_cr4_smep(regs);
5274 role.ext.cr4_smap = ____is_cr4_smap(regs);
5275 role.ext.cr4_pse = ____is_cr4_pse(regs);
5277 /* PKEY and LA57 are active iff long mode is active. */
5278 role.ext.cr4_pke = ____is_efer_lma(regs) && ____is_cr4_pke(regs);
5279 role.ext.cr4_la57 = ____is_efer_lma(regs) && ____is_cr4_la57(regs);
5280 role.ext.efer_lma = ____is_efer_lma(regs);
5284 void __kvm_mmu_refresh_passthrough_bits(struct kvm_vcpu *vcpu,
5285 struct kvm_mmu *mmu)
5287 const bool cr0_wp = kvm_is_cr0_bit_set(vcpu, X86_CR0_WP);
5289 BUILD_BUG_ON((KVM_MMU_CR0_ROLE_BITS & KVM_POSSIBLE_CR0_GUEST_BITS) != X86_CR0_WP);
5290 BUILD_BUG_ON((KVM_MMU_CR4_ROLE_BITS & KVM_POSSIBLE_CR4_GUEST_BITS));
5292 if (is_cr0_wp(mmu) == cr0_wp)
5295 mmu->cpu_role.base.cr0_wp = cr0_wp;
5296 reset_guest_paging_metadata(vcpu, mmu);
5299 static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu)
5301 /* tdp_root_level is architecture forced level, use it if nonzero */
5303 return tdp_root_level;
5305 /* Use 5-level TDP if and only if it's useful/necessary. */
5306 if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48)
5309 return max_tdp_level;
5312 static union kvm_mmu_page_role
5313 kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu,
5314 union kvm_cpu_role cpu_role)
5316 union kvm_mmu_page_role role = {0};
5318 role.access = ACC_ALL;
5320 role.efer_nx = true;
5321 role.smm = cpu_role.base.smm;
5322 role.guest_mode = cpu_role.base.guest_mode;
5323 role.ad_disabled = !kvm_ad_enabled();
5324 role.level = kvm_mmu_get_tdp_level(vcpu);
5326 role.has_4_byte_gpte = false;
5331 static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu,
5332 union kvm_cpu_role cpu_role)
5334 struct kvm_mmu *context = &vcpu->arch.root_mmu;
5335 union kvm_mmu_page_role root_role = kvm_calc_tdp_mmu_root_page_role(vcpu, cpu_role);
5337 if (cpu_role.as_u64 == context->cpu_role.as_u64 &&
5338 root_role.word == context->root_role.word)
5341 context->cpu_role.as_u64 = cpu_role.as_u64;
5342 context->root_role.word = root_role.word;
5343 context->page_fault = kvm_tdp_page_fault;
5344 context->sync_spte = NULL;
5345 context->get_guest_pgd = get_guest_cr3;
5346 context->get_pdptr = kvm_pdptr_read;
5347 context->inject_page_fault = kvm_inject_page_fault;
5349 if (!is_cr0_pg(context))
5350 context->gva_to_gpa = nonpaging_gva_to_gpa;
5351 else if (is_cr4_pae(context))
5352 context->gva_to_gpa = paging64_gva_to_gpa;
5354 context->gva_to_gpa = paging32_gva_to_gpa;
5356 reset_guest_paging_metadata(vcpu, context);
5357 reset_tdp_shadow_zero_bits_mask(context);
5360 static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context,
5361 union kvm_cpu_role cpu_role,
5362 union kvm_mmu_page_role root_role)
5364 if (cpu_role.as_u64 == context->cpu_role.as_u64 &&
5365 root_role.word == context->root_role.word)
5368 context->cpu_role.as_u64 = cpu_role.as_u64;
5369 context->root_role.word = root_role.word;
5371 if (!is_cr0_pg(context))
5372 nonpaging_init_context(context);
5373 else if (is_cr4_pae(context))
5374 paging64_init_context(context);
5376 paging32_init_context(context);
5378 reset_guest_paging_metadata(vcpu, context);
5379 reset_shadow_zero_bits_mask(vcpu, context);
5382 static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu,
5383 union kvm_cpu_role cpu_role)
5385 struct kvm_mmu *context = &vcpu->arch.root_mmu;
5386 union kvm_mmu_page_role root_role;
5388 root_role = cpu_role.base;
5390 /* KVM uses PAE paging whenever the guest isn't using 64-bit paging. */
5391 root_role.level = max_t(u32, root_role.level, PT32E_ROOT_LEVEL);
5394 * KVM forces EFER.NX=1 when TDP is disabled, reflect it in the MMU role.
5395 * KVM uses NX when TDP is disabled to handle a variety of scenarios,
5396 * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and
5397 * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0.
5398 * The iTLB multi-hit workaround can be toggled at any time, so assume
5399 * NX can be used by any non-nested shadow MMU to avoid having to reset
5402 root_role.efer_nx = true;
5404 shadow_mmu_init_context(vcpu, context, cpu_role, root_role);
5407 void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0,
5408 unsigned long cr4, u64 efer, gpa_t nested_cr3)
5410 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
5411 struct kvm_mmu_role_regs regs = {
5413 .cr4 = cr4 & ~X86_CR4_PKE,
5416 union kvm_cpu_role cpu_role = kvm_calc_cpu_role(vcpu, ®s);
5417 union kvm_mmu_page_role root_role;
5419 /* NPT requires CR0.PG=1. */
5420 WARN_ON_ONCE(cpu_role.base.direct);
5422 root_role = cpu_role.base;
5423 root_role.level = kvm_mmu_get_tdp_level(vcpu);
5424 if (root_role.level == PT64_ROOT_5LEVEL &&
5425 cpu_role.base.level == PT64_ROOT_4LEVEL)
5426 root_role.passthrough = 1;
5428 shadow_mmu_init_context(vcpu, context, cpu_role, root_role);
5429 kvm_mmu_new_pgd(vcpu, nested_cr3);
5431 EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu);
5433 static union kvm_cpu_role
5434 kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty,
5435 bool execonly, u8 level)
5437 union kvm_cpu_role role = {0};
5440 * KVM does not support SMM transfer monitors, and consequently does not
5441 * support the "entry to SMM" control either. role.base.smm is always 0.
5443 WARN_ON_ONCE(is_smm(vcpu));
5444 role.base.level = level;
5445 role.base.has_4_byte_gpte = false;
5446 role.base.direct = false;
5447 role.base.ad_disabled = !accessed_dirty;
5448 role.base.guest_mode = true;
5449 role.base.access = ACC_ALL;
5452 role.ext.execonly = execonly;
5458 void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly,
5459 int huge_page_level, bool accessed_dirty,
5462 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
5463 u8 level = vmx_eptp_page_walk_level(new_eptp);
5464 union kvm_cpu_role new_mode =
5465 kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty,
5468 if (new_mode.as_u64 != context->cpu_role.as_u64) {
5469 /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */
5470 context->cpu_role.as_u64 = new_mode.as_u64;
5471 context->root_role.word = new_mode.base.word;
5473 context->page_fault = ept_page_fault;
5474 context->gva_to_gpa = ept_gva_to_gpa;
5475 context->sync_spte = ept_sync_spte;
5477 update_permission_bitmask(context, true);
5478 context->pkru_mask = 0;
5479 reset_rsvds_bits_mask_ept(vcpu, context, execonly, huge_page_level);
5480 reset_ept_shadow_zero_bits_mask(context, execonly);
5483 kvm_mmu_new_pgd(vcpu, new_eptp);
5485 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu);
5487 static void init_kvm_softmmu(struct kvm_vcpu *vcpu,
5488 union kvm_cpu_role cpu_role)
5490 struct kvm_mmu *context = &vcpu->arch.root_mmu;
5492 kvm_init_shadow_mmu(vcpu, cpu_role);
5494 context->get_guest_pgd = get_guest_cr3;
5495 context->get_pdptr = kvm_pdptr_read;
5496 context->inject_page_fault = kvm_inject_page_fault;
5499 static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu,
5500 union kvm_cpu_role new_mode)
5502 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
5504 if (new_mode.as_u64 == g_context->cpu_role.as_u64)
5507 g_context->cpu_role.as_u64 = new_mode.as_u64;
5508 g_context->get_guest_pgd = get_guest_cr3;
5509 g_context->get_pdptr = kvm_pdptr_read;
5510 g_context->inject_page_fault = kvm_inject_page_fault;
5513 * L2 page tables are never shadowed, so there is no need to sync
5516 g_context->sync_spte = NULL;
5519 * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using
5520 * L1's nested page tables (e.g. EPT12). The nested translation
5521 * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using
5522 * L2's page tables as the first level of translation and L1's
5523 * nested page tables as the second level of translation. Basically
5524 * the gva_to_gpa functions between mmu and nested_mmu are swapped.
5526 if (!is_paging(vcpu))
5527 g_context->gva_to_gpa = nonpaging_gva_to_gpa;
5528 else if (is_long_mode(vcpu))
5529 g_context->gva_to_gpa = paging64_gva_to_gpa;
5530 else if (is_pae(vcpu))
5531 g_context->gva_to_gpa = paging64_gva_to_gpa;
5533 g_context->gva_to_gpa = paging32_gva_to_gpa;
5535 reset_guest_paging_metadata(vcpu, g_context);
5538 void kvm_init_mmu(struct kvm_vcpu *vcpu)
5540 struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu);
5541 union kvm_cpu_role cpu_role = kvm_calc_cpu_role(vcpu, ®s);
5543 if (mmu_is_nested(vcpu))
5544 init_kvm_nested_mmu(vcpu, cpu_role);
5545 else if (tdp_enabled)
5546 init_kvm_tdp_mmu(vcpu, cpu_role);
5548 init_kvm_softmmu(vcpu, cpu_role);
5550 EXPORT_SYMBOL_GPL(kvm_init_mmu);
5552 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu)
5555 * Invalidate all MMU roles to force them to reinitialize as CPUID
5556 * information is factored into reserved bit calculations.
5558 * Correctly handling multiple vCPU models with respect to paging and
5559 * physical address properties) in a single VM would require tracking
5560 * all relevant CPUID information in kvm_mmu_page_role. That is very
5561 * undesirable as it would increase the memory requirements for
5562 * gfn_write_track (see struct kvm_mmu_page_role comments). For now
5563 * that problem is swept under the rug; KVM's CPUID API is horrific and
5564 * it's all but impossible to solve it without introducing a new API.
5566 vcpu->arch.root_mmu.root_role.word = 0;
5567 vcpu->arch.guest_mmu.root_role.word = 0;
5568 vcpu->arch.nested_mmu.root_role.word = 0;
5569 vcpu->arch.root_mmu.cpu_role.ext.valid = 0;
5570 vcpu->arch.guest_mmu.cpu_role.ext.valid = 0;
5571 vcpu->arch.nested_mmu.cpu_role.ext.valid = 0;
5572 kvm_mmu_reset_context(vcpu);
5575 * Changing guest CPUID after KVM_RUN is forbidden, see the comment in
5576 * kvm_arch_vcpu_ioctl().
5578 KVM_BUG_ON(kvm_vcpu_has_run(vcpu), vcpu->kvm);
5581 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
5583 kvm_mmu_unload(vcpu);
5586 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
5588 int kvm_mmu_load(struct kvm_vcpu *vcpu)
5592 r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->root_role.direct);
5595 r = mmu_alloc_special_roots(vcpu);
5598 if (vcpu->arch.mmu->root_role.direct)
5599 r = mmu_alloc_direct_roots(vcpu);
5601 r = mmu_alloc_shadow_roots(vcpu);
5605 kvm_mmu_sync_roots(vcpu);
5607 kvm_mmu_load_pgd(vcpu);
5610 * Flush any TLB entries for the new root, the provenance of the root
5611 * is unknown. Even if KVM ensures there are no stale TLB entries
5612 * for a freed root, in theory another hypervisor could have left
5613 * stale entries. Flushing on alloc also allows KVM to skip the TLB
5614 * flush when freeing a root (see kvm_tdp_mmu_put_root()).
5616 static_call(kvm_x86_flush_tlb_current)(vcpu);
5621 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
5623 struct kvm *kvm = vcpu->kvm;
5625 kvm_mmu_free_roots(kvm, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL);
5626 WARN_ON_ONCE(VALID_PAGE(vcpu->arch.root_mmu.root.hpa));
5627 kvm_mmu_free_roots(kvm, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL);
5628 WARN_ON_ONCE(VALID_PAGE(vcpu->arch.guest_mmu.root.hpa));
5629 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
5632 static bool is_obsolete_root(struct kvm *kvm, hpa_t root_hpa)
5634 struct kvm_mmu_page *sp;
5636 if (!VALID_PAGE(root_hpa))
5640 * When freeing obsolete roots, treat roots as obsolete if they don't
5641 * have an associated shadow page, as it's impossible to determine if
5642 * such roots are fresh or stale. This does mean KVM will get false
5643 * positives and free roots that don't strictly need to be freed, but
5644 * such false positives are relatively rare:
5646 * (a) only PAE paging and nested NPT have roots without shadow pages
5647 * (or any shadow paging flavor with a dummy root, see note below)
5648 * (b) remote reloads due to a memslot update obsoletes _all_ roots
5649 * (c) KVM doesn't track previous roots for PAE paging, and the guest
5650 * is unlikely to zap an in-use PGD.
5652 * Note! Dummy roots are unique in that they are obsoleted by memslot
5653 * _creation_! See also FNAME(fetch).
5655 sp = root_to_sp(root_hpa);
5656 return !sp || is_obsolete_sp(kvm, sp);
5659 static void __kvm_mmu_free_obsolete_roots(struct kvm *kvm, struct kvm_mmu *mmu)
5661 unsigned long roots_to_free = 0;
5664 if (is_obsolete_root(kvm, mmu->root.hpa))
5665 roots_to_free |= KVM_MMU_ROOT_CURRENT;
5667 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5668 if (is_obsolete_root(kvm, mmu->prev_roots[i].hpa))
5669 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
5673 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
5676 void kvm_mmu_free_obsolete_roots(struct kvm_vcpu *vcpu)
5678 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.root_mmu);
5679 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.guest_mmu);
5682 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
5689 * Assume that the pte write on a page table of the same type
5690 * as the current vcpu paging mode since we update the sptes only
5691 * when they have the same mode.
5693 if (is_pae(vcpu) && *bytes == 4) {
5694 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
5699 if (*bytes == 4 || *bytes == 8) {
5700 r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes);
5709 * If we're seeing too many writes to a page, it may no longer be a page table,
5710 * or we may be forking, in which case it is better to unmap the page.
5712 static bool detect_write_flooding(struct kvm_mmu_page *sp)
5715 * Skip write-flooding detected for the sp whose level is 1, because
5716 * it can become unsync, then the guest page is not write-protected.
5718 if (sp->role.level == PG_LEVEL_4K)
5721 atomic_inc(&sp->write_flooding_count);
5722 return atomic_read(&sp->write_flooding_count) >= 3;
5726 * Misaligned accesses are too much trouble to fix up; also, they usually
5727 * indicate a page is not used as a page table.
5729 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
5732 unsigned offset, pte_size, misaligned;
5734 offset = offset_in_page(gpa);
5735 pte_size = sp->role.has_4_byte_gpte ? 4 : 8;
5738 * Sometimes, the OS only writes the last one bytes to update status
5739 * bits, for example, in linux, andb instruction is used in clear_bit().
5741 if (!(offset & (pte_size - 1)) && bytes == 1)
5744 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
5745 misaligned |= bytes < 4;
5750 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
5752 unsigned page_offset, quadrant;
5756 page_offset = offset_in_page(gpa);
5757 level = sp->role.level;
5759 if (sp->role.has_4_byte_gpte) {
5760 page_offset <<= 1; /* 32->64 */
5762 * A 32-bit pde maps 4MB while the shadow pdes map
5763 * only 2MB. So we need to double the offset again
5764 * and zap two pdes instead of one.
5766 if (level == PT32_ROOT_LEVEL) {
5767 page_offset &= ~7; /* kill rounding error */
5771 quadrant = page_offset >> PAGE_SHIFT;
5772 page_offset &= ~PAGE_MASK;
5773 if (quadrant != sp->role.quadrant)
5777 spte = &sp->spt[page_offset / sizeof(*spte)];
5781 void kvm_mmu_track_write(struct kvm_vcpu *vcpu, gpa_t gpa, const u8 *new,
5784 gfn_t gfn = gpa >> PAGE_SHIFT;
5785 struct kvm_mmu_page *sp;
5786 LIST_HEAD(invalid_list);
5787 u64 entry, gentry, *spte;
5792 * If we don't have indirect shadow pages, it means no page is
5793 * write-protected, so we can exit simply.
5795 if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
5798 write_lock(&vcpu->kvm->mmu_lock);
5800 gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes);
5802 ++vcpu->kvm->stat.mmu_pte_write;
5804 for_each_gfn_valid_sp_with_gptes(vcpu->kvm, sp, gfn) {
5805 if (detect_write_misaligned(sp, gpa, bytes) ||
5806 detect_write_flooding(sp)) {
5807 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
5808 ++vcpu->kvm->stat.mmu_flooded;
5812 spte = get_written_sptes(sp, gpa, &npte);
5818 mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL);
5819 if (gentry && sp->role.level != PG_LEVEL_4K)
5820 ++vcpu->kvm->stat.mmu_pde_zapped;
5821 if (is_shadow_present_pte(entry))
5826 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
5827 write_unlock(&vcpu->kvm->mmu_lock);
5830 int noinline kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
5831 void *insn, int insn_len)
5833 int r, emulation_type = EMULTYPE_PF;
5834 bool direct = vcpu->arch.mmu->root_role.direct;
5837 * IMPLICIT_ACCESS is a KVM-defined flag used to correctly perform SMAP
5838 * checks when emulating instructions that triggers implicit access.
5839 * WARN if hardware generates a fault with an error code that collides
5840 * with the KVM-defined value. Clear the flag and continue on, i.e.
5841 * don't terminate the VM, as KVM can't possibly be relying on a flag
5842 * that KVM doesn't know about.
5844 if (WARN_ON_ONCE(error_code & PFERR_IMPLICIT_ACCESS))
5845 error_code &= ~PFERR_IMPLICIT_ACCESS;
5847 if (WARN_ON_ONCE(!VALID_PAGE(vcpu->arch.mmu->root.hpa)))
5848 return RET_PF_RETRY;
5851 if (unlikely(error_code & PFERR_RSVD_MASK)) {
5852 r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct);
5853 if (r == RET_PF_EMULATE)
5857 if (r == RET_PF_INVALID) {
5858 r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa,
5859 lower_32_bits(error_code), false,
5861 if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm))
5867 if (r != RET_PF_EMULATE)
5871 * Before emulating the instruction, check if the error code
5872 * was due to a RO violation while translating the guest page.
5873 * This can occur when using nested virtualization with nested
5874 * paging in both guests. If true, we simply unprotect the page
5875 * and resume the guest.
5877 if (vcpu->arch.mmu->root_role.direct &&
5878 (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) {
5879 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa));
5884 * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still
5885 * optimistically try to just unprotect the page and let the processor
5886 * re-execute the instruction that caused the page fault. Do not allow
5887 * retrying MMIO emulation, as it's not only pointless but could also
5888 * cause us to enter an infinite loop because the processor will keep
5889 * faulting on the non-existent MMIO address. Retrying an instruction
5890 * from a nested guest is also pointless and dangerous as we are only
5891 * explicitly shadowing L1's page tables, i.e. unprotecting something
5892 * for L1 isn't going to magically fix whatever issue cause L2 to fail.
5894 if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu))
5895 emulation_type |= EMULTYPE_ALLOW_RETRY_PF;
5897 return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn,
5900 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
5902 static void __kvm_mmu_invalidate_addr(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
5903 u64 addr, hpa_t root_hpa)
5905 struct kvm_shadow_walk_iterator iterator;
5907 vcpu_clear_mmio_info(vcpu, addr);
5910 * Walking and synchronizing SPTEs both assume they are operating in
5911 * the context of the current MMU, and would need to be reworked if
5912 * this is ever used to sync the guest_mmu, e.g. to emulate INVEPT.
5914 if (WARN_ON_ONCE(mmu != vcpu->arch.mmu))
5917 if (!VALID_PAGE(root_hpa))
5920 write_lock(&vcpu->kvm->mmu_lock);
5921 for_each_shadow_entry_using_root(vcpu, root_hpa, addr, iterator) {
5922 struct kvm_mmu_page *sp = sptep_to_sp(iterator.sptep);
5925 int ret = kvm_sync_spte(vcpu, sp, iterator.index);
5928 mmu_page_zap_pte(vcpu->kvm, sp, iterator.sptep, NULL);
5930 kvm_flush_remote_tlbs_sptep(vcpu->kvm, iterator.sptep);
5933 if (!sp->unsync_children)
5936 write_unlock(&vcpu->kvm->mmu_lock);
5939 void kvm_mmu_invalidate_addr(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
5940 u64 addr, unsigned long roots)
5944 WARN_ON_ONCE(roots & ~KVM_MMU_ROOTS_ALL);
5946 /* It's actually a GPA for vcpu->arch.guest_mmu. */
5947 if (mmu != &vcpu->arch.guest_mmu) {
5948 /* INVLPG on a non-canonical address is a NOP according to the SDM. */
5949 if (is_noncanonical_address(addr, vcpu))
5952 static_call(kvm_x86_flush_tlb_gva)(vcpu, addr);
5955 if (!mmu->sync_spte)
5958 if (roots & KVM_MMU_ROOT_CURRENT)
5959 __kvm_mmu_invalidate_addr(vcpu, mmu, addr, mmu->root.hpa);
5961 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5962 if (roots & KVM_MMU_ROOT_PREVIOUS(i))
5963 __kvm_mmu_invalidate_addr(vcpu, mmu, addr, mmu->prev_roots[i].hpa);
5966 EXPORT_SYMBOL_GPL(kvm_mmu_invalidate_addr);
5968 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
5971 * INVLPG is required to invalidate any global mappings for the VA,
5972 * irrespective of PCID. Blindly sync all roots as it would take
5973 * roughly the same amount of work/time to determine whether any of the
5974 * previous roots have a global mapping.
5976 * Mappings not reachable via the current or previous cached roots will
5977 * be synced when switching to that new cr3, so nothing needs to be
5978 * done here for them.
5980 kvm_mmu_invalidate_addr(vcpu, vcpu->arch.walk_mmu, gva, KVM_MMU_ROOTS_ALL);
5981 ++vcpu->stat.invlpg;
5983 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
5986 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid)
5988 struct kvm_mmu *mmu = vcpu->arch.mmu;
5989 unsigned long roots = 0;
5992 if (pcid == kvm_get_active_pcid(vcpu))
5993 roots |= KVM_MMU_ROOT_CURRENT;
5995 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5996 if (VALID_PAGE(mmu->prev_roots[i].hpa) &&
5997 pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd))
5998 roots |= KVM_MMU_ROOT_PREVIOUS(i);
6002 kvm_mmu_invalidate_addr(vcpu, mmu, gva, roots);
6003 ++vcpu->stat.invlpg;
6006 * Mappings not reachable via the current cr3 or the prev_roots will be
6007 * synced when switching to that cr3, so nothing needs to be done here
6012 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
6013 int tdp_max_root_level, int tdp_huge_page_level)
6015 tdp_enabled = enable_tdp;
6016 tdp_root_level = tdp_forced_root_level;
6017 max_tdp_level = tdp_max_root_level;
6019 #ifdef CONFIG_X86_64
6020 tdp_mmu_enabled = tdp_mmu_allowed && tdp_enabled;
6023 * max_huge_page_level reflects KVM's MMU capabilities irrespective
6024 * of kernel support, e.g. KVM may be capable of using 1GB pages when
6025 * the kernel is not. But, KVM never creates a page size greater than
6026 * what is used by the kernel for any given HVA, i.e. the kernel's
6027 * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust().
6030 max_huge_page_level = tdp_huge_page_level;
6031 else if (boot_cpu_has(X86_FEATURE_GBPAGES))
6032 max_huge_page_level = PG_LEVEL_1G;
6034 max_huge_page_level = PG_LEVEL_2M;
6036 EXPORT_SYMBOL_GPL(kvm_configure_mmu);
6038 /* The return value indicates if tlb flush on all vcpus is needed. */
6039 typedef bool (*slot_rmaps_handler) (struct kvm *kvm,
6040 struct kvm_rmap_head *rmap_head,
6041 const struct kvm_memory_slot *slot);
6043 static __always_inline bool __walk_slot_rmaps(struct kvm *kvm,
6044 const struct kvm_memory_slot *slot,
6045 slot_rmaps_handler fn,
6046 int start_level, int end_level,
6047 gfn_t start_gfn, gfn_t end_gfn,
6048 bool flush_on_yield, bool flush)
6050 struct slot_rmap_walk_iterator iterator;
6052 lockdep_assert_held_write(&kvm->mmu_lock);
6054 for_each_slot_rmap_range(slot, start_level, end_level, start_gfn,
6055 end_gfn, &iterator) {
6057 flush |= fn(kvm, iterator.rmap, slot);
6059 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
6060 if (flush && flush_on_yield) {
6061 kvm_flush_remote_tlbs_range(kvm, start_gfn,
6062 iterator.gfn - start_gfn + 1);
6065 cond_resched_rwlock_write(&kvm->mmu_lock);
6072 static __always_inline bool walk_slot_rmaps(struct kvm *kvm,
6073 const struct kvm_memory_slot *slot,
6074 slot_rmaps_handler fn,
6075 int start_level, int end_level,
6076 bool flush_on_yield)
6078 return __walk_slot_rmaps(kvm, slot, fn, start_level, end_level,
6079 slot->base_gfn, slot->base_gfn + slot->npages - 1,
6080 flush_on_yield, false);
6083 static __always_inline bool walk_slot_rmaps_4k(struct kvm *kvm,
6084 const struct kvm_memory_slot *slot,
6085 slot_rmaps_handler fn,
6086 bool flush_on_yield)
6088 return walk_slot_rmaps(kvm, slot, fn, PG_LEVEL_4K, PG_LEVEL_4K, flush_on_yield);
6091 static void free_mmu_pages(struct kvm_mmu *mmu)
6093 if (!tdp_enabled && mmu->pae_root)
6094 set_memory_encrypted((unsigned long)mmu->pae_root, 1);
6095 free_page((unsigned long)mmu->pae_root);
6096 free_page((unsigned long)mmu->pml4_root);
6097 free_page((unsigned long)mmu->pml5_root);
6100 static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
6105 mmu->root.hpa = INVALID_PAGE;
6107 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
6108 mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID;
6110 /* vcpu->arch.guest_mmu isn't used when !tdp_enabled. */
6111 if (!tdp_enabled && mmu == &vcpu->arch.guest_mmu)
6115 * When using PAE paging, the four PDPTEs are treated as 'root' pages,
6116 * while the PDP table is a per-vCPU construct that's allocated at MMU
6117 * creation. When emulating 32-bit mode, cr3 is only 32 bits even on
6118 * x86_64. Therefore we need to allocate the PDP table in the first
6119 * 4GB of memory, which happens to fit the DMA32 zone. TDP paging
6120 * generally doesn't use PAE paging and can skip allocating the PDP
6121 * table. The main exception, handled here, is SVM's 32-bit NPT. The
6122 * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit
6123 * KVM; that horror is handled on-demand by mmu_alloc_special_roots().
6125 if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL)
6128 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32);
6132 mmu->pae_root = page_address(page);
6135 * CR3 is only 32 bits when PAE paging is used, thus it's impossible to
6136 * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so
6137 * that KVM's writes and the CPU's reads get along. Note, this is
6138 * only necessary when using shadow paging, as 64-bit NPT can get at
6139 * the C-bit even when shadowing 32-bit NPT, and SME isn't supported
6140 * by 32-bit kernels (when KVM itself uses 32-bit NPT).
6143 set_memory_decrypted((unsigned long)mmu->pae_root, 1);
6145 WARN_ON_ONCE(shadow_me_value);
6147 for (i = 0; i < 4; ++i)
6148 mmu->pae_root[i] = INVALID_PAE_ROOT;
6153 int kvm_mmu_create(struct kvm_vcpu *vcpu)
6157 vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache;
6158 vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO;
6160 vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache;
6161 vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO;
6163 vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO;
6165 vcpu->arch.mmu = &vcpu->arch.root_mmu;
6166 vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
6168 ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu);
6172 ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu);
6174 goto fail_allocate_root;
6178 free_mmu_pages(&vcpu->arch.guest_mmu);
6182 #define BATCH_ZAP_PAGES 10
6183 static void kvm_zap_obsolete_pages(struct kvm *kvm)
6185 struct kvm_mmu_page *sp, *node;
6186 int nr_zapped, batch = 0;
6190 list_for_each_entry_safe_reverse(sp, node,
6191 &kvm->arch.active_mmu_pages, link) {
6193 * No obsolete valid page exists before a newly created page
6194 * since active_mmu_pages is a FIFO list.
6196 if (!is_obsolete_sp(kvm, sp))
6200 * Invalid pages should never land back on the list of active
6201 * pages. Skip the bogus page, otherwise we'll get stuck in an
6202 * infinite loop if the page gets put back on the list (again).
6204 if (WARN_ON_ONCE(sp->role.invalid))
6208 * No need to flush the TLB since we're only zapping shadow
6209 * pages with an obsolete generation number and all vCPUS have
6210 * loaded a new root, i.e. the shadow pages being zapped cannot
6211 * be in active use by the guest.
6213 if (batch >= BATCH_ZAP_PAGES &&
6214 cond_resched_rwlock_write(&kvm->mmu_lock)) {
6219 unstable = __kvm_mmu_prepare_zap_page(kvm, sp,
6220 &kvm->arch.zapped_obsolete_pages, &nr_zapped);
6228 * Kick all vCPUs (via remote TLB flush) before freeing the page tables
6229 * to ensure KVM is not in the middle of a lockless shadow page table
6230 * walk, which may reference the pages. The remote TLB flush itself is
6231 * not required and is simply a convenient way to kick vCPUs as needed.
6232 * KVM performs a local TLB flush when allocating a new root (see
6233 * kvm_mmu_load()), and the reload in the caller ensure no vCPUs are
6234 * running with an obsolete MMU.
6236 kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages);
6240 * Fast invalidate all shadow pages and use lock-break technique
6241 * to zap obsolete pages.
6243 * It's required when memslot is being deleted or VM is being
6244 * destroyed, in these cases, we should ensure that KVM MMU does
6245 * not use any resource of the being-deleted slot or all slots
6246 * after calling the function.
6248 static void kvm_mmu_zap_all_fast(struct kvm *kvm)
6250 lockdep_assert_held(&kvm->slots_lock);
6252 write_lock(&kvm->mmu_lock);
6253 trace_kvm_mmu_zap_all_fast(kvm);
6256 * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is
6257 * held for the entire duration of zapping obsolete pages, it's
6258 * impossible for there to be multiple invalid generations associated
6259 * with *valid* shadow pages at any given time, i.e. there is exactly
6260 * one valid generation and (at most) one invalid generation.
6262 kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1;
6265 * In order to ensure all vCPUs drop their soon-to-be invalid roots,
6266 * invalidating TDP MMU roots must be done while holding mmu_lock for
6267 * write and in the same critical section as making the reload request,
6268 * e.g. before kvm_zap_obsolete_pages() could drop mmu_lock and yield.
6270 if (tdp_mmu_enabled)
6271 kvm_tdp_mmu_invalidate_all_roots(kvm);
6274 * Notify all vcpus to reload its shadow page table and flush TLB.
6275 * Then all vcpus will switch to new shadow page table with the new
6278 * Note: we need to do this under the protection of mmu_lock,
6279 * otherwise, vcpu would purge shadow page but miss tlb flush.
6281 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
6283 kvm_zap_obsolete_pages(kvm);
6285 write_unlock(&kvm->mmu_lock);
6288 * Zap the invalidated TDP MMU roots, all SPTEs must be dropped before
6289 * returning to the caller, e.g. if the zap is in response to a memslot
6290 * deletion, mmu_notifier callbacks will be unable to reach the SPTEs
6291 * associated with the deleted memslot once the update completes, and
6292 * Deferring the zap until the final reference to the root is put would
6293 * lead to use-after-free.
6295 if (tdp_mmu_enabled)
6296 kvm_tdp_mmu_zap_invalidated_roots(kvm);
6299 static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
6301 return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
6304 void kvm_mmu_init_vm(struct kvm *kvm)
6306 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6307 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
6308 INIT_LIST_HEAD(&kvm->arch.possible_nx_huge_pages);
6309 spin_lock_init(&kvm->arch.mmu_unsync_pages_lock);
6311 if (tdp_mmu_enabled)
6312 kvm_mmu_init_tdp_mmu(kvm);
6314 kvm->arch.split_page_header_cache.kmem_cache = mmu_page_header_cache;
6315 kvm->arch.split_page_header_cache.gfp_zero = __GFP_ZERO;
6317 kvm->arch.split_shadow_page_cache.gfp_zero = __GFP_ZERO;
6319 kvm->arch.split_desc_cache.kmem_cache = pte_list_desc_cache;
6320 kvm->arch.split_desc_cache.gfp_zero = __GFP_ZERO;
6323 static void mmu_free_vm_memory_caches(struct kvm *kvm)
6325 kvm_mmu_free_memory_cache(&kvm->arch.split_desc_cache);
6326 kvm_mmu_free_memory_cache(&kvm->arch.split_page_header_cache);
6327 kvm_mmu_free_memory_cache(&kvm->arch.split_shadow_page_cache);
6330 void kvm_mmu_uninit_vm(struct kvm *kvm)
6332 if (tdp_mmu_enabled)
6333 kvm_mmu_uninit_tdp_mmu(kvm);
6335 mmu_free_vm_memory_caches(kvm);
6338 static bool kvm_rmap_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
6340 const struct kvm_memory_slot *memslot;
6341 struct kvm_memslots *slots;
6342 struct kvm_memslot_iter iter;
6347 if (!kvm_memslots_have_rmaps(kvm))
6350 for (i = 0; i < kvm_arch_nr_memslot_as_ids(kvm); i++) {
6351 slots = __kvm_memslots(kvm, i);
6353 kvm_for_each_memslot_in_gfn_range(&iter, slots, gfn_start, gfn_end) {
6354 memslot = iter.slot;
6355 start = max(gfn_start, memslot->base_gfn);
6356 end = min(gfn_end, memslot->base_gfn + memslot->npages);
6357 if (WARN_ON_ONCE(start >= end))
6360 flush = __walk_slot_rmaps(kvm, memslot, __kvm_zap_rmap,
6361 PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
6362 start, end - 1, true, flush);
6370 * Invalidate (zap) SPTEs that cover GFNs from gfn_start and up to gfn_end
6371 * (not including it)
6373 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
6377 if (WARN_ON_ONCE(gfn_end <= gfn_start))
6380 write_lock(&kvm->mmu_lock);
6382 kvm_mmu_invalidate_begin(kvm);
6384 kvm_mmu_invalidate_range_add(kvm, gfn_start, gfn_end);
6386 flush = kvm_rmap_zap_gfn_range(kvm, gfn_start, gfn_end);
6388 if (tdp_mmu_enabled)
6389 flush = kvm_tdp_mmu_zap_leafs(kvm, gfn_start, gfn_end, flush);
6392 kvm_flush_remote_tlbs_range(kvm, gfn_start, gfn_end - gfn_start);
6394 kvm_mmu_invalidate_end(kvm);
6396 write_unlock(&kvm->mmu_lock);
6399 static bool slot_rmap_write_protect(struct kvm *kvm,
6400 struct kvm_rmap_head *rmap_head,
6401 const struct kvm_memory_slot *slot)
6403 return rmap_write_protect(rmap_head, false);
6406 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
6407 const struct kvm_memory_slot *memslot,
6410 if (kvm_memslots_have_rmaps(kvm)) {
6411 write_lock(&kvm->mmu_lock);
6412 walk_slot_rmaps(kvm, memslot, slot_rmap_write_protect,
6413 start_level, KVM_MAX_HUGEPAGE_LEVEL, false);
6414 write_unlock(&kvm->mmu_lock);
6417 if (tdp_mmu_enabled) {
6418 read_lock(&kvm->mmu_lock);
6419 kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level);
6420 read_unlock(&kvm->mmu_lock);
6424 static inline bool need_topup(struct kvm_mmu_memory_cache *cache, int min)
6426 return kvm_mmu_memory_cache_nr_free_objects(cache) < min;
6429 static bool need_topup_split_caches_or_resched(struct kvm *kvm)
6431 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock))
6435 * In the worst case, SPLIT_DESC_CACHE_MIN_NR_OBJECTS descriptors are needed
6436 * to split a single huge page. Calculating how many are actually needed
6437 * is possible but not worth the complexity.
6439 return need_topup(&kvm->arch.split_desc_cache, SPLIT_DESC_CACHE_MIN_NR_OBJECTS) ||
6440 need_topup(&kvm->arch.split_page_header_cache, 1) ||
6441 need_topup(&kvm->arch.split_shadow_page_cache, 1);
6444 static int topup_split_caches(struct kvm *kvm)
6447 * Allocating rmap list entries when splitting huge pages for nested
6448 * MMUs is uncommon as KVM needs to use a list if and only if there is
6449 * more than one rmap entry for a gfn, i.e. requires an L1 gfn to be
6450 * aliased by multiple L2 gfns and/or from multiple nested roots with
6451 * different roles. Aliasing gfns when using TDP is atypical for VMMs;
6452 * a few gfns are often aliased during boot, e.g. when remapping BIOS,
6453 * but aliasing rarely occurs post-boot or for many gfns. If there is
6454 * only one rmap entry, rmap->val points directly at that one entry and
6455 * doesn't need to allocate a list. Buffer the cache by the default
6456 * capacity so that KVM doesn't have to drop mmu_lock to topup if KVM
6457 * encounters an aliased gfn or two.
6459 const int capacity = SPLIT_DESC_CACHE_MIN_NR_OBJECTS +
6460 KVM_ARCH_NR_OBJS_PER_MEMORY_CACHE;
6463 lockdep_assert_held(&kvm->slots_lock);
6465 r = __kvm_mmu_topup_memory_cache(&kvm->arch.split_desc_cache, capacity,
6466 SPLIT_DESC_CACHE_MIN_NR_OBJECTS);
6470 r = kvm_mmu_topup_memory_cache(&kvm->arch.split_page_header_cache, 1);
6474 return kvm_mmu_topup_memory_cache(&kvm->arch.split_shadow_page_cache, 1);
6477 static struct kvm_mmu_page *shadow_mmu_get_sp_for_split(struct kvm *kvm, u64 *huge_sptep)
6479 struct kvm_mmu_page *huge_sp = sptep_to_sp(huge_sptep);
6480 struct shadow_page_caches caches = {};
6481 union kvm_mmu_page_role role;
6482 unsigned int access;
6485 gfn = kvm_mmu_page_get_gfn(huge_sp, spte_index(huge_sptep));
6486 access = kvm_mmu_page_get_access(huge_sp, spte_index(huge_sptep));
6489 * Note, huge page splitting always uses direct shadow pages, regardless
6490 * of whether the huge page itself is mapped by a direct or indirect
6491 * shadow page, since the huge page region itself is being directly
6492 * mapped with smaller pages.
6494 role = kvm_mmu_child_role(huge_sptep, /*direct=*/true, access);
6496 /* Direct SPs do not require a shadowed_info_cache. */
6497 caches.page_header_cache = &kvm->arch.split_page_header_cache;
6498 caches.shadow_page_cache = &kvm->arch.split_shadow_page_cache;
6500 /* Safe to pass NULL for vCPU since requesting a direct SP. */
6501 return __kvm_mmu_get_shadow_page(kvm, NULL, &caches, gfn, role);
6504 static void shadow_mmu_split_huge_page(struct kvm *kvm,
6505 const struct kvm_memory_slot *slot,
6509 struct kvm_mmu_memory_cache *cache = &kvm->arch.split_desc_cache;
6510 u64 huge_spte = READ_ONCE(*huge_sptep);
6511 struct kvm_mmu_page *sp;
6517 sp = shadow_mmu_get_sp_for_split(kvm, huge_sptep);
6519 for (index = 0; index < SPTE_ENT_PER_PAGE; index++) {
6520 sptep = &sp->spt[index];
6521 gfn = kvm_mmu_page_get_gfn(sp, index);
6524 * The SP may already have populated SPTEs, e.g. if this huge
6525 * page is aliased by multiple sptes with the same access
6526 * permissions. These entries are guaranteed to map the same
6527 * gfn-to-pfn translation since the SP is direct, so no need to
6530 * However, if a given SPTE points to a lower level page table,
6531 * that lower level page table may only be partially populated.
6532 * Installing such SPTEs would effectively unmap a potion of the
6533 * huge page. Unmapping guest memory always requires a TLB flush
6534 * since a subsequent operation on the unmapped regions would
6535 * fail to detect the need to flush.
6537 if (is_shadow_present_pte(*sptep)) {
6538 flush |= !is_last_spte(*sptep, sp->role.level);
6542 spte = make_huge_page_split_spte(kvm, huge_spte, sp->role, index);
6543 mmu_spte_set(sptep, spte);
6544 __rmap_add(kvm, cache, slot, sptep, gfn, sp->role.access);
6547 __link_shadow_page(kvm, cache, huge_sptep, sp, flush);
6550 static int shadow_mmu_try_split_huge_page(struct kvm *kvm,
6551 const struct kvm_memory_slot *slot,
6554 struct kvm_mmu_page *huge_sp = sptep_to_sp(huge_sptep);
6559 /* Grab information for the tracepoint before dropping the MMU lock. */
6560 gfn = kvm_mmu_page_get_gfn(huge_sp, spte_index(huge_sptep));
6561 level = huge_sp->role.level;
6564 if (kvm_mmu_available_pages(kvm) <= KVM_MIN_FREE_MMU_PAGES) {
6569 if (need_topup_split_caches_or_resched(kvm)) {
6570 write_unlock(&kvm->mmu_lock);
6573 * If the topup succeeds, return -EAGAIN to indicate that the
6574 * rmap iterator should be restarted because the MMU lock was
6577 r = topup_split_caches(kvm) ?: -EAGAIN;
6578 write_lock(&kvm->mmu_lock);
6582 shadow_mmu_split_huge_page(kvm, slot, huge_sptep);
6585 trace_kvm_mmu_split_huge_page(gfn, spte, level, r);
6589 static bool shadow_mmu_try_split_huge_pages(struct kvm *kvm,
6590 struct kvm_rmap_head *rmap_head,
6591 const struct kvm_memory_slot *slot)
6593 struct rmap_iterator iter;
6594 struct kvm_mmu_page *sp;
6599 for_each_rmap_spte(rmap_head, &iter, huge_sptep) {
6600 sp = sptep_to_sp(huge_sptep);
6602 /* TDP MMU is enabled, so rmap only contains nested MMU SPs. */
6603 if (WARN_ON_ONCE(!sp->role.guest_mode))
6606 /* The rmaps should never contain non-leaf SPTEs. */
6607 if (WARN_ON_ONCE(!is_large_pte(*huge_sptep)))
6610 /* SPs with level >PG_LEVEL_4K should never by unsync. */
6611 if (WARN_ON_ONCE(sp->unsync))
6614 /* Don't bother splitting huge pages on invalid SPs. */
6615 if (sp->role.invalid)
6618 r = shadow_mmu_try_split_huge_page(kvm, slot, huge_sptep);
6621 * The split succeeded or needs to be retried because the MMU
6622 * lock was dropped. Either way, restart the iterator to get it
6623 * back into a consistent state.
6625 if (!r || r == -EAGAIN)
6628 /* The split failed and shouldn't be retried (e.g. -ENOMEM). */
6635 static void kvm_shadow_mmu_try_split_huge_pages(struct kvm *kvm,
6636 const struct kvm_memory_slot *slot,
6637 gfn_t start, gfn_t end,
6643 * Split huge pages starting with KVM_MAX_HUGEPAGE_LEVEL and working
6644 * down to the target level. This ensures pages are recursively split
6645 * all the way to the target level. There's no need to split pages
6646 * already at the target level.
6648 for (level = KVM_MAX_HUGEPAGE_LEVEL; level > target_level; level--)
6649 __walk_slot_rmaps(kvm, slot, shadow_mmu_try_split_huge_pages,
6650 level, level, start, end - 1, true, false);
6653 /* Must be called with the mmu_lock held in write-mode. */
6654 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
6655 const struct kvm_memory_slot *memslot,
6659 if (!tdp_mmu_enabled)
6662 if (kvm_memslots_have_rmaps(kvm))
6663 kvm_shadow_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level);
6665 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level, false);
6668 * A TLB flush is unnecessary at this point for the same reasons as in
6669 * kvm_mmu_slot_try_split_huge_pages().
6673 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
6674 const struct kvm_memory_slot *memslot,
6677 u64 start = memslot->base_gfn;
6678 u64 end = start + memslot->npages;
6680 if (!tdp_mmu_enabled)
6683 if (kvm_memslots_have_rmaps(kvm)) {
6684 write_lock(&kvm->mmu_lock);
6685 kvm_shadow_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level);
6686 write_unlock(&kvm->mmu_lock);
6689 read_lock(&kvm->mmu_lock);
6690 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level, true);
6691 read_unlock(&kvm->mmu_lock);
6694 * No TLB flush is necessary here. KVM will flush TLBs after
6695 * write-protecting and/or clearing dirty on the newly split SPTEs to
6696 * ensure that guest writes are reflected in the dirty log before the
6697 * ioctl to enable dirty logging on this memslot completes. Since the
6698 * split SPTEs retain the write and dirty bits of the huge SPTE, it is
6699 * safe for KVM to decide if a TLB flush is necessary based on the split
6704 static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,
6705 struct kvm_rmap_head *rmap_head,
6706 const struct kvm_memory_slot *slot)
6709 struct rmap_iterator iter;
6710 int need_tlb_flush = 0;
6711 struct kvm_mmu_page *sp;
6714 for_each_rmap_spte(rmap_head, &iter, sptep) {
6715 sp = sptep_to_sp(sptep);
6718 * We cannot do huge page mapping for indirect shadow pages,
6719 * which are found on the last rmap (level = 1) when not using
6720 * tdp; such shadow pages are synced with the page table in
6721 * the guest, and the guest page table is using 4K page size
6722 * mapping if the indirect sp has level = 1.
6724 if (sp->role.direct &&
6725 sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn,
6727 kvm_zap_one_rmap_spte(kvm, rmap_head, sptep);
6729 if (kvm_available_flush_remote_tlbs_range())
6730 kvm_flush_remote_tlbs_sptep(kvm, sptep);
6738 return need_tlb_flush;
6741 static void kvm_rmap_zap_collapsible_sptes(struct kvm *kvm,
6742 const struct kvm_memory_slot *slot)
6745 * Note, use KVM_MAX_HUGEPAGE_LEVEL - 1 since there's no need to zap
6746 * pages that are already mapped at the maximum hugepage level.
6748 if (walk_slot_rmaps(kvm, slot, kvm_mmu_zap_collapsible_spte,
6749 PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL - 1, true))
6750 kvm_flush_remote_tlbs_memslot(kvm, slot);
6753 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
6754 const struct kvm_memory_slot *slot)
6756 if (kvm_memslots_have_rmaps(kvm)) {
6757 write_lock(&kvm->mmu_lock);
6758 kvm_rmap_zap_collapsible_sptes(kvm, slot);
6759 write_unlock(&kvm->mmu_lock);
6762 if (tdp_mmu_enabled) {
6763 read_lock(&kvm->mmu_lock);
6764 kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot);
6765 read_unlock(&kvm->mmu_lock);
6769 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
6770 const struct kvm_memory_slot *memslot)
6772 if (kvm_memslots_have_rmaps(kvm)) {
6773 write_lock(&kvm->mmu_lock);
6775 * Clear dirty bits only on 4k SPTEs since the legacy MMU only
6776 * support dirty logging at a 4k granularity.
6778 walk_slot_rmaps_4k(kvm, memslot, __rmap_clear_dirty, false);
6779 write_unlock(&kvm->mmu_lock);
6782 if (tdp_mmu_enabled) {
6783 read_lock(&kvm->mmu_lock);
6784 kvm_tdp_mmu_clear_dirty_slot(kvm, memslot);
6785 read_unlock(&kvm->mmu_lock);
6789 * The caller will flush the TLBs after this function returns.
6791 * It's also safe to flush TLBs out of mmu lock here as currently this
6792 * function is only used for dirty logging, in which case flushing TLB
6793 * out of mmu lock also guarantees no dirty pages will be lost in
6798 static void kvm_mmu_zap_all(struct kvm *kvm)
6800 struct kvm_mmu_page *sp, *node;
6801 LIST_HEAD(invalid_list);
6804 write_lock(&kvm->mmu_lock);
6806 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) {
6807 if (WARN_ON_ONCE(sp->role.invalid))
6809 if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign))
6811 if (cond_resched_rwlock_write(&kvm->mmu_lock))
6815 kvm_mmu_commit_zap_page(kvm, &invalid_list);
6817 if (tdp_mmu_enabled)
6818 kvm_tdp_mmu_zap_all(kvm);
6820 write_unlock(&kvm->mmu_lock);
6823 void kvm_arch_flush_shadow_all(struct kvm *kvm)
6825 kvm_mmu_zap_all(kvm);
6828 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
6829 struct kvm_memory_slot *slot)
6831 kvm_mmu_zap_all_fast(kvm);
6834 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen)
6836 WARN_ON_ONCE(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS);
6838 gen &= MMIO_SPTE_GEN_MASK;
6841 * Generation numbers are incremented in multiples of the number of
6842 * address spaces in order to provide unique generations across all
6843 * address spaces. Strip what is effectively the address space
6844 * modifier prior to checking for a wrap of the MMIO generation so
6845 * that a wrap in any address space is detected.
6847 gen &= ~((u64)kvm_arch_nr_memslot_as_ids(kvm) - 1);
6850 * The very rare case: if the MMIO generation number has wrapped,
6851 * zap all shadow pages.
6853 if (unlikely(gen == 0)) {
6854 kvm_debug_ratelimited("zapping shadow pages for mmio generation wraparound\n");
6855 kvm_mmu_zap_all_fast(kvm);
6859 static unsigned long mmu_shrink_scan(struct shrinker *shrink,
6860 struct shrink_control *sc)
6863 int nr_to_scan = sc->nr_to_scan;
6864 unsigned long freed = 0;
6866 mutex_lock(&kvm_lock);
6868 list_for_each_entry(kvm, &vm_list, vm_list) {
6870 LIST_HEAD(invalid_list);
6873 * Never scan more than sc->nr_to_scan VM instances.
6874 * Will not hit this condition practically since we do not try
6875 * to shrink more than one VM and it is very unlikely to see
6876 * !n_used_mmu_pages so many times.
6881 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
6882 * here. We may skip a VM instance errorneosly, but we do not
6883 * want to shrink a VM that only started to populate its MMU
6886 if (!kvm->arch.n_used_mmu_pages &&
6887 !kvm_has_zapped_obsolete_pages(kvm))
6890 idx = srcu_read_lock(&kvm->srcu);
6891 write_lock(&kvm->mmu_lock);
6893 if (kvm_has_zapped_obsolete_pages(kvm)) {
6894 kvm_mmu_commit_zap_page(kvm,
6895 &kvm->arch.zapped_obsolete_pages);
6899 freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan);
6902 write_unlock(&kvm->mmu_lock);
6903 srcu_read_unlock(&kvm->srcu, idx);
6906 * unfair on small ones
6907 * per-vm shrinkers cry out
6908 * sadness comes quickly
6910 list_move_tail(&kvm->vm_list, &vm_list);
6914 mutex_unlock(&kvm_lock);
6918 static unsigned long mmu_shrink_count(struct shrinker *shrink,
6919 struct shrink_control *sc)
6921 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
6924 static struct shrinker *mmu_shrinker;
6926 static void mmu_destroy_caches(void)
6928 kmem_cache_destroy(pte_list_desc_cache);
6929 kmem_cache_destroy(mmu_page_header_cache);
6932 static int get_nx_huge_pages(char *buffer, const struct kernel_param *kp)
6934 if (nx_hugepage_mitigation_hard_disabled)
6935 return sysfs_emit(buffer, "never\n");
6937 return param_get_bool(buffer, kp);
6940 static bool get_nx_auto_mode(void)
6942 /* Return true when CPU has the bug, and mitigations are ON */
6943 return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off();
6946 static void __set_nx_huge_pages(bool val)
6948 nx_huge_pages = itlb_multihit_kvm_mitigation = val;
6951 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp)
6953 bool old_val = nx_huge_pages;
6956 if (nx_hugepage_mitigation_hard_disabled)
6959 /* In "auto" mode deploy workaround only if CPU has the bug. */
6960 if (sysfs_streq(val, "off")) {
6962 } else if (sysfs_streq(val, "force")) {
6964 } else if (sysfs_streq(val, "auto")) {
6965 new_val = get_nx_auto_mode();
6966 } else if (sysfs_streq(val, "never")) {
6969 mutex_lock(&kvm_lock);
6970 if (!list_empty(&vm_list)) {
6971 mutex_unlock(&kvm_lock);
6974 nx_hugepage_mitigation_hard_disabled = true;
6975 mutex_unlock(&kvm_lock);
6976 } else if (kstrtobool(val, &new_val) < 0) {
6980 __set_nx_huge_pages(new_val);
6982 if (new_val != old_val) {
6985 mutex_lock(&kvm_lock);
6987 list_for_each_entry(kvm, &vm_list, vm_list) {
6988 mutex_lock(&kvm->slots_lock);
6989 kvm_mmu_zap_all_fast(kvm);
6990 mutex_unlock(&kvm->slots_lock);
6992 wake_up_process(kvm->arch.nx_huge_page_recovery_thread);
6994 mutex_unlock(&kvm_lock);
7001 * nx_huge_pages needs to be resolved to true/false when kvm.ko is loaded, as
7002 * its default value of -1 is technically undefined behavior for a boolean.
7003 * Forward the module init call to SPTE code so that it too can handle module
7004 * params that need to be resolved/snapshot.
7006 void __init kvm_mmu_x86_module_init(void)
7008 if (nx_huge_pages == -1)
7009 __set_nx_huge_pages(get_nx_auto_mode());
7012 * Snapshot userspace's desire to enable the TDP MMU. Whether or not the
7013 * TDP MMU is actually enabled is determined in kvm_configure_mmu()
7014 * when the vendor module is loaded.
7016 tdp_mmu_allowed = tdp_mmu_enabled;
7018 kvm_mmu_spte_module_init();
7022 * The bulk of the MMU initialization is deferred until the vendor module is
7023 * loaded as many of the masks/values may be modified by VMX or SVM, i.e. need
7024 * to be reset when a potentially different vendor module is loaded.
7026 int kvm_mmu_vendor_module_init(void)
7031 * MMU roles use union aliasing which is, generally speaking, an
7032 * undefined behavior. However, we supposedly know how compilers behave
7033 * and the current status quo is unlikely to change. Guardians below are
7034 * supposed to let us know if the assumption becomes false.
7036 BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32));
7037 BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32));
7038 BUILD_BUG_ON(sizeof(union kvm_cpu_role) != sizeof(u64));
7040 kvm_mmu_reset_all_pte_masks();
7042 pte_list_desc_cache = kmem_cache_create("pte_list_desc",
7043 sizeof(struct pte_list_desc),
7044 0, SLAB_ACCOUNT, NULL);
7045 if (!pte_list_desc_cache)
7048 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
7049 sizeof(struct kvm_mmu_page),
7050 0, SLAB_ACCOUNT, NULL);
7051 if (!mmu_page_header_cache)
7054 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL))
7057 mmu_shrinker = shrinker_alloc(0, "x86-mmu");
7061 mmu_shrinker->count_objects = mmu_shrink_count;
7062 mmu_shrinker->scan_objects = mmu_shrink_scan;
7063 mmu_shrinker->seeks = DEFAULT_SEEKS * 10;
7065 shrinker_register(mmu_shrinker);
7070 percpu_counter_destroy(&kvm_total_used_mmu_pages);
7072 mmu_destroy_caches();
7076 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
7078 kvm_mmu_unload(vcpu);
7079 free_mmu_pages(&vcpu->arch.root_mmu);
7080 free_mmu_pages(&vcpu->arch.guest_mmu);
7081 mmu_free_memory_caches(vcpu);
7084 void kvm_mmu_vendor_module_exit(void)
7086 mmu_destroy_caches();
7087 percpu_counter_destroy(&kvm_total_used_mmu_pages);
7088 shrinker_free(mmu_shrinker);
7092 * Calculate the effective recovery period, accounting for '0' meaning "let KVM
7093 * select a halving time of 1 hour". Returns true if recovery is enabled.
7095 static bool calc_nx_huge_pages_recovery_period(uint *period)
7098 * Use READ_ONCE to get the params, this may be called outside of the
7099 * param setters, e.g. by the kthread to compute its next timeout.
7101 bool enabled = READ_ONCE(nx_huge_pages);
7102 uint ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
7104 if (!enabled || !ratio)
7107 *period = READ_ONCE(nx_huge_pages_recovery_period_ms);
7109 /* Make sure the period is not less than one second. */
7110 ratio = min(ratio, 3600u);
7111 *period = 60 * 60 * 1000 / ratio;
7116 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp)
7118 bool was_recovery_enabled, is_recovery_enabled;
7119 uint old_period, new_period;
7122 if (nx_hugepage_mitigation_hard_disabled)
7125 was_recovery_enabled = calc_nx_huge_pages_recovery_period(&old_period);
7127 err = param_set_uint(val, kp);
7131 is_recovery_enabled = calc_nx_huge_pages_recovery_period(&new_period);
7133 if (is_recovery_enabled &&
7134 (!was_recovery_enabled || old_period > new_period)) {
7137 mutex_lock(&kvm_lock);
7139 list_for_each_entry(kvm, &vm_list, vm_list)
7140 wake_up_process(kvm->arch.nx_huge_page_recovery_thread);
7142 mutex_unlock(&kvm_lock);
7148 static void kvm_recover_nx_huge_pages(struct kvm *kvm)
7150 unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits;
7151 struct kvm_memory_slot *slot;
7153 struct kvm_mmu_page *sp;
7155 LIST_HEAD(invalid_list);
7159 rcu_idx = srcu_read_lock(&kvm->srcu);
7160 write_lock(&kvm->mmu_lock);
7163 * Zapping TDP MMU shadow pages, including the remote TLB flush, must
7164 * be done under RCU protection, because the pages are freed via RCU
7169 ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
7170 to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0;
7171 for ( ; to_zap; --to_zap) {
7172 if (list_empty(&kvm->arch.possible_nx_huge_pages))
7176 * We use a separate list instead of just using active_mmu_pages
7177 * because the number of shadow pages that be replaced with an
7178 * NX huge page is expected to be relatively small compared to
7179 * the total number of shadow pages. And because the TDP MMU
7180 * doesn't use active_mmu_pages.
7182 sp = list_first_entry(&kvm->arch.possible_nx_huge_pages,
7183 struct kvm_mmu_page,
7184 possible_nx_huge_page_link);
7185 WARN_ON_ONCE(!sp->nx_huge_page_disallowed);
7186 WARN_ON_ONCE(!sp->role.direct);
7189 * Unaccount and do not attempt to recover any NX Huge Pages
7190 * that are being dirty tracked, as they would just be faulted
7191 * back in as 4KiB pages. The NX Huge Pages in this slot will be
7192 * recovered, along with all the other huge pages in the slot,
7193 * when dirty logging is disabled.
7195 * Since gfn_to_memslot() is relatively expensive, it helps to
7196 * skip it if it the test cannot possibly return true. On the
7197 * other hand, if any memslot has logging enabled, chances are
7198 * good that all of them do, in which case unaccount_nx_huge_page()
7199 * is much cheaper than zapping the page.
7201 * If a memslot update is in progress, reading an incorrect value
7202 * of kvm->nr_memslots_dirty_logging is not a problem: if it is
7203 * becoming zero, gfn_to_memslot() will be done unnecessarily; if
7204 * it is becoming nonzero, the page will be zapped unnecessarily.
7205 * Either way, this only affects efficiency in racy situations,
7206 * and not correctness.
7209 if (atomic_read(&kvm->nr_memslots_dirty_logging)) {
7210 struct kvm_memslots *slots;
7212 slots = kvm_memslots_for_spte_role(kvm, sp->role);
7213 slot = __gfn_to_memslot(slots, sp->gfn);
7214 WARN_ON_ONCE(!slot);
7217 if (slot && kvm_slot_dirty_track_enabled(slot))
7218 unaccount_nx_huge_page(kvm, sp);
7219 else if (is_tdp_mmu_page(sp))
7220 flush |= kvm_tdp_mmu_zap_sp(kvm, sp);
7222 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
7223 WARN_ON_ONCE(sp->nx_huge_page_disallowed);
7225 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
7226 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
7229 cond_resched_rwlock_write(&kvm->mmu_lock);
7235 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
7239 write_unlock(&kvm->mmu_lock);
7240 srcu_read_unlock(&kvm->srcu, rcu_idx);
7243 static long get_nx_huge_page_recovery_timeout(u64 start_time)
7248 enabled = calc_nx_huge_pages_recovery_period(&period);
7250 return enabled ? start_time + msecs_to_jiffies(period) - get_jiffies_64()
7251 : MAX_SCHEDULE_TIMEOUT;
7254 static int kvm_nx_huge_page_recovery_worker(struct kvm *kvm, uintptr_t data)
7257 long remaining_time;
7260 start_time = get_jiffies_64();
7261 remaining_time = get_nx_huge_page_recovery_timeout(start_time);
7263 set_current_state(TASK_INTERRUPTIBLE);
7264 while (!kthread_should_stop() && remaining_time > 0) {
7265 schedule_timeout(remaining_time);
7266 remaining_time = get_nx_huge_page_recovery_timeout(start_time);
7267 set_current_state(TASK_INTERRUPTIBLE);
7270 set_current_state(TASK_RUNNING);
7272 if (kthread_should_stop())
7275 kvm_recover_nx_huge_pages(kvm);
7279 int kvm_mmu_post_init_vm(struct kvm *kvm)
7283 if (nx_hugepage_mitigation_hard_disabled)
7286 err = kvm_vm_create_worker_thread(kvm, kvm_nx_huge_page_recovery_worker, 0,
7287 "kvm-nx-lpage-recovery",
7288 &kvm->arch.nx_huge_page_recovery_thread);
7290 kthread_unpark(kvm->arch.nx_huge_page_recovery_thread);
7295 void kvm_mmu_pre_destroy_vm(struct kvm *kvm)
7297 if (kvm->arch.nx_huge_page_recovery_thread)
7298 kthread_stop(kvm->arch.nx_huge_page_recovery_thread);
7301 #ifdef CONFIG_KVM_GENERIC_MEMORY_ATTRIBUTES
7302 bool kvm_arch_pre_set_memory_attributes(struct kvm *kvm,
7303 struct kvm_gfn_range *range)
7306 * Zap SPTEs even if the slot can't be mapped PRIVATE. KVM x86 only
7307 * supports KVM_MEMORY_ATTRIBUTE_PRIVATE, and so it *seems* like KVM
7308 * can simply ignore such slots. But if userspace is making memory
7309 * PRIVATE, then KVM must prevent the guest from accessing the memory
7310 * as shared. And if userspace is making memory SHARED and this point
7311 * is reached, then at least one page within the range was previously
7312 * PRIVATE, i.e. the slot's possible hugepage ranges are changing.
7313 * Zapping SPTEs in this case ensures KVM will reassess whether or not
7314 * a hugepage can be used for affected ranges.
7316 if (WARN_ON_ONCE(!kvm_arch_has_private_mem(kvm)))
7319 return kvm_unmap_gfn_range(kvm, range);
7322 static bool hugepage_test_mixed(struct kvm_memory_slot *slot, gfn_t gfn,
7325 return lpage_info_slot(gfn, slot, level)->disallow_lpage & KVM_LPAGE_MIXED_FLAG;
7328 static void hugepage_clear_mixed(struct kvm_memory_slot *slot, gfn_t gfn,
7331 lpage_info_slot(gfn, slot, level)->disallow_lpage &= ~KVM_LPAGE_MIXED_FLAG;
7334 static void hugepage_set_mixed(struct kvm_memory_slot *slot, gfn_t gfn,
7337 lpage_info_slot(gfn, slot, level)->disallow_lpage |= KVM_LPAGE_MIXED_FLAG;
7340 static bool hugepage_has_attrs(struct kvm *kvm, struct kvm_memory_slot *slot,
7341 gfn_t gfn, int level, unsigned long attrs)
7343 const unsigned long start = gfn;
7344 const unsigned long end = start + KVM_PAGES_PER_HPAGE(level);
7346 if (level == PG_LEVEL_2M)
7347 return kvm_range_has_memory_attributes(kvm, start, end, attrs);
7349 for (gfn = start; gfn < end; gfn += KVM_PAGES_PER_HPAGE(level - 1)) {
7350 if (hugepage_test_mixed(slot, gfn, level - 1) ||
7351 attrs != kvm_get_memory_attributes(kvm, gfn))
7357 bool kvm_arch_post_set_memory_attributes(struct kvm *kvm,
7358 struct kvm_gfn_range *range)
7360 unsigned long attrs = range->arg.attributes;
7361 struct kvm_memory_slot *slot = range->slot;
7364 lockdep_assert_held_write(&kvm->mmu_lock);
7365 lockdep_assert_held(&kvm->slots_lock);
7368 * Calculate which ranges can be mapped with hugepages even if the slot
7369 * can't map memory PRIVATE. KVM mustn't create a SHARED hugepage over
7370 * a range that has PRIVATE GFNs, and conversely converting a range to
7371 * SHARED may now allow hugepages.
7373 if (WARN_ON_ONCE(!kvm_arch_has_private_mem(kvm)))
7377 * The sequence matters here: upper levels consume the result of lower
7380 for (level = PG_LEVEL_2M; level <= KVM_MAX_HUGEPAGE_LEVEL; level++) {
7381 gfn_t nr_pages = KVM_PAGES_PER_HPAGE(level);
7382 gfn_t gfn = gfn_round_for_level(range->start, level);
7384 /* Process the head page if it straddles the range. */
7385 if (gfn != range->start || gfn + nr_pages > range->end) {
7387 * Skip mixed tracking if the aligned gfn isn't covered
7388 * by the memslot, KVM can't use a hugepage due to the
7389 * misaligned address regardless of memory attributes.
7391 if (gfn >= slot->base_gfn) {
7392 if (hugepage_has_attrs(kvm, slot, gfn, level, attrs))
7393 hugepage_clear_mixed(slot, gfn, level);
7395 hugepage_set_mixed(slot, gfn, level);
7401 * Pages entirely covered by the range are guaranteed to have
7402 * only the attributes which were just set.
7404 for ( ; gfn + nr_pages <= range->end; gfn += nr_pages)
7405 hugepage_clear_mixed(slot, gfn, level);
7408 * Process the last tail page if it straddles the range and is
7409 * contained by the memslot. Like the head page, KVM can't
7410 * create a hugepage if the slot size is misaligned.
7412 if (gfn < range->end &&
7413 (gfn + nr_pages) <= (slot->base_gfn + slot->npages)) {
7414 if (hugepage_has_attrs(kvm, slot, gfn, level, attrs))
7415 hugepage_clear_mixed(slot, gfn, level);
7417 hugepage_set_mixed(slot, gfn, level);
7423 void kvm_mmu_init_memslot_memory_attributes(struct kvm *kvm,
7424 struct kvm_memory_slot *slot)
7428 if (!kvm_arch_has_private_mem(kvm))
7431 for (level = PG_LEVEL_2M; level <= KVM_MAX_HUGEPAGE_LEVEL; level++) {
7433 * Don't bother tracking mixed attributes for pages that can't
7434 * be huge due to alignment, i.e. process only pages that are
7435 * entirely contained by the memslot.
7437 gfn_t end = gfn_round_for_level(slot->base_gfn + slot->npages, level);
7438 gfn_t start = gfn_round_for_level(slot->base_gfn, level);
7439 gfn_t nr_pages = KVM_PAGES_PER_HPAGE(level);
7442 if (start < slot->base_gfn)
7446 * Unlike setting attributes, every potential hugepage needs to
7447 * be manually checked as the attributes may already be mixed.
7449 for (gfn = start; gfn < end; gfn += nr_pages) {
7450 unsigned long attrs = kvm_get_memory_attributes(kvm, gfn);
7452 if (hugepage_has_attrs(kvm, slot, gfn, level, attrs))
7453 hugepage_clear_mixed(slot, gfn, level);
7455 hugepage_set_mixed(slot, gfn, level);