1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * This module enables machines with Intel VT-x extensions to run virtual
6 * machines without emulation or binary translation.
10 * Copyright (C) 2006 Qumranet, Inc.
11 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Avi Kivity <avi@qumranet.com>
21 #include "mmu_internal.h"
24 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
30 #include <linux/kvm_host.h>
31 #include <linux/types.h>
32 #include <linux/string.h>
34 #include <linux/highmem.h>
35 #include <linux/moduleparam.h>
36 #include <linux/export.h>
37 #include <linux/swap.h>
38 #include <linux/hugetlb.h>
39 #include <linux/compiler.h>
40 #include <linux/srcu.h>
41 #include <linux/slab.h>
42 #include <linux/sched/signal.h>
43 #include <linux/uaccess.h>
44 #include <linux/hash.h>
45 #include <linux/kern_levels.h>
46 #include <linux/kthread.h>
49 #include <asm/memtype.h>
50 #include <asm/cmpxchg.h>
52 #include <asm/set_memory.h>
54 #include <asm/kvm_page_track.h>
57 extern bool itlb_multihit_kvm_mitigation;
59 int __read_mostly nx_huge_pages = -1;
60 static uint __read_mostly nx_huge_pages_recovery_period_ms;
61 #ifdef CONFIG_PREEMPT_RT
62 /* Recovery can cause latency spikes, disable it for PREEMPT_RT. */
63 static uint __read_mostly nx_huge_pages_recovery_ratio = 0;
65 static uint __read_mostly nx_huge_pages_recovery_ratio = 60;
68 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp);
69 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp);
71 static const struct kernel_param_ops nx_huge_pages_ops = {
72 .set = set_nx_huge_pages,
73 .get = param_get_bool,
76 static const struct kernel_param_ops nx_huge_pages_recovery_param_ops = {
77 .set = set_nx_huge_pages_recovery_param,
78 .get = param_get_uint,
81 module_param_cb(nx_huge_pages, &nx_huge_pages_ops, &nx_huge_pages, 0644);
82 __MODULE_PARM_TYPE(nx_huge_pages, "bool");
83 module_param_cb(nx_huge_pages_recovery_ratio, &nx_huge_pages_recovery_param_ops,
84 &nx_huge_pages_recovery_ratio, 0644);
85 __MODULE_PARM_TYPE(nx_huge_pages_recovery_ratio, "uint");
86 module_param_cb(nx_huge_pages_recovery_period_ms, &nx_huge_pages_recovery_param_ops,
87 &nx_huge_pages_recovery_period_ms, 0644);
88 __MODULE_PARM_TYPE(nx_huge_pages_recovery_period_ms, "uint");
90 static bool __read_mostly force_flush_and_sync_on_reuse;
91 module_param_named(flush_on_reuse, force_flush_and_sync_on_reuse, bool, 0644);
94 * When setting this variable to true it enables Two-Dimensional-Paging
95 * where the hardware walks 2 page tables:
96 * 1. the guest-virtual to guest-physical
97 * 2. while doing 1. it walks guest-physical to host-physical
98 * If the hardware supports that we don't need to do shadow paging.
100 bool tdp_enabled = false;
102 bool __ro_after_init tdp_mmu_allowed;
105 bool __read_mostly tdp_mmu_enabled = true;
106 module_param_named(tdp_mmu, tdp_mmu_enabled, bool, 0444);
109 static int max_huge_page_level __read_mostly;
110 static int tdp_root_level __read_mostly;
111 static int max_tdp_level __read_mostly;
115 module_param(dbg, bool, 0644);
118 #define PTE_PREFETCH_NUM 8
120 #include <trace/events/kvm.h>
122 /* make pte_list_desc fit well in cache lines */
123 #define PTE_LIST_EXT 14
126 * Slight optimization of cacheline layout, by putting `more' and `spte_count'
127 * at the start; then accessing it will only use one single cacheline for
128 * either full (entries==PTE_LIST_EXT) case or entries<=6.
130 struct pte_list_desc {
131 struct pte_list_desc *more;
133 * Stores number of entries stored in the pte_list_desc. No need to be
134 * u64 but just for easier alignment. When PTE_LIST_EXT, means full.
137 u64 *sptes[PTE_LIST_EXT];
140 struct kvm_shadow_walk_iterator {
148 #define for_each_shadow_entry_using_root(_vcpu, _root, _addr, _walker) \
149 for (shadow_walk_init_using_root(&(_walker), (_vcpu), \
151 shadow_walk_okay(&(_walker)); \
152 shadow_walk_next(&(_walker)))
154 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
155 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
156 shadow_walk_okay(&(_walker)); \
157 shadow_walk_next(&(_walker)))
159 #define for_each_shadow_entry_lockless(_vcpu, _addr, _walker, spte) \
160 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
161 shadow_walk_okay(&(_walker)) && \
162 ({ spte = mmu_spte_get_lockless(_walker.sptep); 1; }); \
163 __shadow_walk_next(&(_walker), spte))
165 static struct kmem_cache *pte_list_desc_cache;
166 struct kmem_cache *mmu_page_header_cache;
167 static struct percpu_counter kvm_total_used_mmu_pages;
169 static void mmu_spte_set(u64 *sptep, u64 spte);
171 struct kvm_mmu_role_regs {
172 const unsigned long cr0;
173 const unsigned long cr4;
177 #define CREATE_TRACE_POINTS
178 #include "mmutrace.h"
181 * Yes, lot's of underscores. They're a hint that you probably shouldn't be
182 * reading from the role_regs. Once the root_role is constructed, it becomes
183 * the single source of truth for the MMU's state.
185 #define BUILD_MMU_ROLE_REGS_ACCESSOR(reg, name, flag) \
186 static inline bool __maybe_unused \
187 ____is_##reg##_##name(const struct kvm_mmu_role_regs *regs) \
189 return !!(regs->reg & flag); \
191 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, pg, X86_CR0_PG);
192 BUILD_MMU_ROLE_REGS_ACCESSOR(cr0, wp, X86_CR0_WP);
193 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pse, X86_CR4_PSE);
194 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pae, X86_CR4_PAE);
195 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smep, X86_CR4_SMEP);
196 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, smap, X86_CR4_SMAP);
197 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, pke, X86_CR4_PKE);
198 BUILD_MMU_ROLE_REGS_ACCESSOR(cr4, la57, X86_CR4_LA57);
199 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, nx, EFER_NX);
200 BUILD_MMU_ROLE_REGS_ACCESSOR(efer, lma, EFER_LMA);
203 * The MMU itself (with a valid role) is the single source of truth for the
204 * MMU. Do not use the regs used to build the MMU/role, nor the vCPU. The
205 * regs don't account for dependencies, e.g. clearing CR4 bits if CR0.PG=1,
206 * and the vCPU may be incorrect/irrelevant.
208 #define BUILD_MMU_ROLE_ACCESSOR(base_or_ext, reg, name) \
209 static inline bool __maybe_unused is_##reg##_##name(struct kvm_mmu *mmu) \
211 return !!(mmu->cpu_role. base_or_ext . reg##_##name); \
213 BUILD_MMU_ROLE_ACCESSOR(base, cr0, wp);
214 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pse);
215 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smep);
216 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, smap);
217 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, pke);
218 BUILD_MMU_ROLE_ACCESSOR(ext, cr4, la57);
219 BUILD_MMU_ROLE_ACCESSOR(base, efer, nx);
220 BUILD_MMU_ROLE_ACCESSOR(ext, efer, lma);
222 static inline bool is_cr0_pg(struct kvm_mmu *mmu)
224 return mmu->cpu_role.base.level > 0;
227 static inline bool is_cr4_pae(struct kvm_mmu *mmu)
229 return !mmu->cpu_role.base.has_4_byte_gpte;
232 static struct kvm_mmu_role_regs vcpu_to_role_regs(struct kvm_vcpu *vcpu)
234 struct kvm_mmu_role_regs regs = {
235 .cr0 = kvm_read_cr0_bits(vcpu, KVM_MMU_CR0_ROLE_BITS),
236 .cr4 = kvm_read_cr4_bits(vcpu, KVM_MMU_CR4_ROLE_BITS),
237 .efer = vcpu->arch.efer,
243 static inline bool kvm_available_flush_tlb_with_range(void)
245 return kvm_x86_ops.tlb_remote_flush_with_range;
248 static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm,
249 struct kvm_tlb_range *range)
253 if (range && kvm_x86_ops.tlb_remote_flush_with_range)
254 ret = static_call(kvm_x86_tlb_remote_flush_with_range)(kvm, range);
257 kvm_flush_remote_tlbs(kvm);
260 void kvm_flush_remote_tlbs_with_address(struct kvm *kvm,
261 u64 start_gfn, u64 pages)
263 struct kvm_tlb_range range;
265 range.start_gfn = start_gfn;
268 kvm_flush_remote_tlbs_with_range(kvm, &range);
271 static void mark_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, u64 gfn,
274 u64 spte = make_mmio_spte(vcpu, gfn, access);
276 trace_mark_mmio_spte(sptep, gfn, spte);
277 mmu_spte_set(sptep, spte);
280 static gfn_t get_mmio_spte_gfn(u64 spte)
282 u64 gpa = spte & shadow_nonpresent_or_rsvd_lower_gfn_mask;
284 gpa |= (spte >> SHADOW_NONPRESENT_OR_RSVD_MASK_LEN)
285 & shadow_nonpresent_or_rsvd_mask;
287 return gpa >> PAGE_SHIFT;
290 static unsigned get_mmio_spte_access(u64 spte)
292 return spte & shadow_mmio_access_mask;
295 static bool check_mmio_spte(struct kvm_vcpu *vcpu, u64 spte)
297 u64 kvm_gen, spte_gen, gen;
299 gen = kvm_vcpu_memslots(vcpu)->generation;
300 if (unlikely(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS))
303 kvm_gen = gen & MMIO_SPTE_GEN_MASK;
304 spte_gen = get_mmio_spte_generation(spte);
306 trace_check_mmio_spte(spte, kvm_gen, spte_gen);
307 return likely(kvm_gen == spte_gen);
310 static int is_cpuid_PSE36(void)
316 static void __set_spte(u64 *sptep, u64 spte)
318 WRITE_ONCE(*sptep, spte);
321 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
323 WRITE_ONCE(*sptep, spte);
326 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
328 return xchg(sptep, spte);
331 static u64 __get_spte_lockless(u64 *sptep)
333 return READ_ONCE(*sptep);
344 static void count_spte_clear(u64 *sptep, u64 spte)
346 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
348 if (is_shadow_present_pte(spte))
351 /* Ensure the spte is completely set before we increase the count */
353 sp->clear_spte_count++;
356 static void __set_spte(u64 *sptep, u64 spte)
358 union split_spte *ssptep, sspte;
360 ssptep = (union split_spte *)sptep;
361 sspte = (union split_spte)spte;
363 ssptep->spte_high = sspte.spte_high;
366 * If we map the spte from nonpresent to present, We should store
367 * the high bits firstly, then set present bit, so cpu can not
368 * fetch this spte while we are setting the spte.
372 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
375 static void __update_clear_spte_fast(u64 *sptep, u64 spte)
377 union split_spte *ssptep, sspte;
379 ssptep = (union split_spte *)sptep;
380 sspte = (union split_spte)spte;
382 WRITE_ONCE(ssptep->spte_low, sspte.spte_low);
385 * If we map the spte from present to nonpresent, we should clear
386 * present bit firstly to avoid vcpu fetch the old high bits.
390 ssptep->spte_high = sspte.spte_high;
391 count_spte_clear(sptep, spte);
394 static u64 __update_clear_spte_slow(u64 *sptep, u64 spte)
396 union split_spte *ssptep, sspte, orig;
398 ssptep = (union split_spte *)sptep;
399 sspte = (union split_spte)spte;
401 /* xchg acts as a barrier before the setting of the high bits */
402 orig.spte_low = xchg(&ssptep->spte_low, sspte.spte_low);
403 orig.spte_high = ssptep->spte_high;
404 ssptep->spte_high = sspte.spte_high;
405 count_spte_clear(sptep, spte);
411 * The idea using the light way get the spte on x86_32 guest is from
412 * gup_get_pte (mm/gup.c).
414 * An spte tlb flush may be pending, because kvm_set_pte_rmap
415 * coalesces them and we are running out of the MMU lock. Therefore
416 * we need to protect against in-progress updates of the spte.
418 * Reading the spte while an update is in progress may get the old value
419 * for the high part of the spte. The race is fine for a present->non-present
420 * change (because the high part of the spte is ignored for non-present spte),
421 * but for a present->present change we must reread the spte.
423 * All such changes are done in two steps (present->non-present and
424 * non-present->present), hence it is enough to count the number of
425 * present->non-present updates: if it changed while reading the spte,
426 * we might have hit the race. This is done using clear_spte_count.
428 static u64 __get_spte_lockless(u64 *sptep)
430 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
431 union split_spte spte, *orig = (union split_spte *)sptep;
435 count = sp->clear_spte_count;
438 spte.spte_low = orig->spte_low;
441 spte.spte_high = orig->spte_high;
444 if (unlikely(spte.spte_low != orig->spte_low ||
445 count != sp->clear_spte_count))
452 /* Rules for using mmu_spte_set:
453 * Set the sptep from nonpresent to present.
454 * Note: the sptep being assigned *must* be either not present
455 * or in a state where the hardware will not attempt to update
458 static void mmu_spte_set(u64 *sptep, u64 new_spte)
460 WARN_ON(is_shadow_present_pte(*sptep));
461 __set_spte(sptep, new_spte);
465 * Update the SPTE (excluding the PFN), but do not track changes in its
466 * accessed/dirty status.
468 static u64 mmu_spte_update_no_track(u64 *sptep, u64 new_spte)
470 u64 old_spte = *sptep;
472 WARN_ON(!is_shadow_present_pte(new_spte));
473 check_spte_writable_invariants(new_spte);
475 if (!is_shadow_present_pte(old_spte)) {
476 mmu_spte_set(sptep, new_spte);
480 if (!spte_has_volatile_bits(old_spte))
481 __update_clear_spte_fast(sptep, new_spte);
483 old_spte = __update_clear_spte_slow(sptep, new_spte);
485 WARN_ON(spte_to_pfn(old_spte) != spte_to_pfn(new_spte));
490 /* Rules for using mmu_spte_update:
491 * Update the state bits, it means the mapped pfn is not changed.
493 * Whenever an MMU-writable SPTE is overwritten with a read-only SPTE, remote
494 * TLBs must be flushed. Otherwise rmap_write_protect will find a read-only
495 * spte, even though the writable spte might be cached on a CPU's TLB.
497 * Returns true if the TLB needs to be flushed
499 static bool mmu_spte_update(u64 *sptep, u64 new_spte)
502 u64 old_spte = mmu_spte_update_no_track(sptep, new_spte);
504 if (!is_shadow_present_pte(old_spte))
508 * For the spte updated out of mmu-lock is safe, since
509 * we always atomically update it, see the comments in
510 * spte_has_volatile_bits().
512 if (is_mmu_writable_spte(old_spte) &&
513 !is_writable_pte(new_spte))
517 * Flush TLB when accessed/dirty states are changed in the page tables,
518 * to guarantee consistency between TLB and page tables.
521 if (is_accessed_spte(old_spte) && !is_accessed_spte(new_spte)) {
523 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
526 if (is_dirty_spte(old_spte) && !is_dirty_spte(new_spte)) {
528 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
535 * Rules for using mmu_spte_clear_track_bits:
536 * It sets the sptep from present to nonpresent, and track the
537 * state bits, it is used to clear the last level sptep.
538 * Returns the old PTE.
540 static u64 mmu_spte_clear_track_bits(struct kvm *kvm, u64 *sptep)
543 u64 old_spte = *sptep;
544 int level = sptep_to_sp(sptep)->role.level;
547 if (!is_shadow_present_pte(old_spte) ||
548 !spte_has_volatile_bits(old_spte))
549 __update_clear_spte_fast(sptep, 0ull);
551 old_spte = __update_clear_spte_slow(sptep, 0ull);
553 if (!is_shadow_present_pte(old_spte))
556 kvm_update_page_stats(kvm, level, -1);
558 pfn = spte_to_pfn(old_spte);
561 * KVM doesn't hold a reference to any pages mapped into the guest, and
562 * instead uses the mmu_notifier to ensure that KVM unmaps any pages
563 * before they are reclaimed. Sanity check that, if the pfn is backed
564 * by a refcounted page, the refcount is elevated.
566 page = kvm_pfn_to_refcounted_page(pfn);
567 WARN_ON(page && !page_count(page));
569 if (is_accessed_spte(old_spte))
570 kvm_set_pfn_accessed(pfn);
572 if (is_dirty_spte(old_spte))
573 kvm_set_pfn_dirty(pfn);
579 * Rules for using mmu_spte_clear_no_track:
580 * Directly clear spte without caring the state bits of sptep,
581 * it is used to set the upper level spte.
583 static void mmu_spte_clear_no_track(u64 *sptep)
585 __update_clear_spte_fast(sptep, 0ull);
588 static u64 mmu_spte_get_lockless(u64 *sptep)
590 return __get_spte_lockless(sptep);
593 /* Returns the Accessed status of the PTE and resets it at the same time. */
594 static bool mmu_spte_age(u64 *sptep)
596 u64 spte = mmu_spte_get_lockless(sptep);
598 if (!is_accessed_spte(spte))
601 if (spte_ad_enabled(spte)) {
602 clear_bit((ffs(shadow_accessed_mask) - 1),
603 (unsigned long *)sptep);
606 * Capture the dirty status of the page, so that it doesn't get
607 * lost when the SPTE is marked for access tracking.
609 if (is_writable_pte(spte))
610 kvm_set_pfn_dirty(spte_to_pfn(spte));
612 spte = mark_spte_for_access_track(spte);
613 mmu_spte_update_no_track(sptep, spte);
619 static inline bool is_tdp_mmu_active(struct kvm_vcpu *vcpu)
621 return tdp_mmu_enabled && vcpu->arch.mmu->root_role.direct;
624 static void walk_shadow_page_lockless_begin(struct kvm_vcpu *vcpu)
626 if (is_tdp_mmu_active(vcpu)) {
627 kvm_tdp_mmu_walk_lockless_begin();
630 * Prevent page table teardown by making any free-er wait during
631 * kvm_flush_remote_tlbs() IPI to all active vcpus.
636 * Make sure a following spte read is not reordered ahead of the write
639 smp_store_mb(vcpu->mode, READING_SHADOW_PAGE_TABLES);
643 static void walk_shadow_page_lockless_end(struct kvm_vcpu *vcpu)
645 if (is_tdp_mmu_active(vcpu)) {
646 kvm_tdp_mmu_walk_lockless_end();
649 * Make sure the write to vcpu->mode is not reordered in front of
650 * reads to sptes. If it does, kvm_mmu_commit_zap_page() can see us
651 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
653 smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE);
658 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu, bool maybe_indirect)
662 /* 1 rmap, 1 parent PTE per level, and the prefetched rmaps. */
663 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache,
664 1 + PT64_ROOT_MAX_LEVEL + PTE_PREFETCH_NUM);
667 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadow_page_cache,
668 PT64_ROOT_MAX_LEVEL);
671 if (maybe_indirect) {
672 r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_shadowed_info_cache,
673 PT64_ROOT_MAX_LEVEL);
677 return kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
678 PT64_ROOT_MAX_LEVEL);
681 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
683 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_pte_list_desc_cache);
684 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadow_page_cache);
685 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_shadowed_info_cache);
686 kvm_mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
689 static void mmu_free_pte_list_desc(struct pte_list_desc *pte_list_desc)
691 kmem_cache_free(pte_list_desc_cache, pte_list_desc);
694 static bool sp_has_gptes(struct kvm_mmu_page *sp);
696 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
698 if (sp->role.passthrough)
701 if (!sp->role.direct)
702 return sp->shadowed_translation[index] >> PAGE_SHIFT;
704 return sp->gfn + (index << ((sp->role.level - 1) * SPTE_LEVEL_BITS));
708 * For leaf SPTEs, fetch the *guest* access permissions being shadowed. Note
709 * that the SPTE itself may have a more constrained access permissions that
710 * what the guest enforces. For example, a guest may create an executable
711 * huge PTE but KVM may disallow execution to mitigate iTLB multihit.
713 static u32 kvm_mmu_page_get_access(struct kvm_mmu_page *sp, int index)
715 if (sp_has_gptes(sp))
716 return sp->shadowed_translation[index] & ACC_ALL;
719 * For direct MMUs (e.g. TDP or non-paging guests) or passthrough SPs,
720 * KVM is not shadowing any guest page tables, so the "guest access
721 * permissions" are just ACC_ALL.
723 * For direct SPs in indirect MMUs (shadow paging), i.e. when KVM
724 * is shadowing a guest huge page with small pages, the guest access
725 * permissions being shadowed are the access permissions of the huge
728 * In both cases, sp->role.access contains the correct access bits.
730 return sp->role.access;
733 static void kvm_mmu_page_set_translation(struct kvm_mmu_page *sp, int index,
734 gfn_t gfn, unsigned int access)
736 if (sp_has_gptes(sp)) {
737 sp->shadowed_translation[index] = (gfn << PAGE_SHIFT) | access;
741 WARN_ONCE(access != kvm_mmu_page_get_access(sp, index),
742 "access mismatch under %s page %llx (expected %u, got %u)\n",
743 sp->role.passthrough ? "passthrough" : "direct",
744 sp->gfn, kvm_mmu_page_get_access(sp, index), access);
746 WARN_ONCE(gfn != kvm_mmu_page_get_gfn(sp, index),
747 "gfn mismatch under %s page %llx (expected %llx, got %llx)\n",
748 sp->role.passthrough ? "passthrough" : "direct",
749 sp->gfn, kvm_mmu_page_get_gfn(sp, index), gfn);
752 static void kvm_mmu_page_set_access(struct kvm_mmu_page *sp, int index,
755 gfn_t gfn = kvm_mmu_page_get_gfn(sp, index);
757 kvm_mmu_page_set_translation(sp, index, gfn, access);
761 * Return the pointer to the large page information for a given gfn,
762 * handling slots that are not large page aligned.
764 static struct kvm_lpage_info *lpage_info_slot(gfn_t gfn,
765 const struct kvm_memory_slot *slot, int level)
769 idx = gfn_to_index(gfn, slot->base_gfn, level);
770 return &slot->arch.lpage_info[level - 2][idx];
773 static void update_gfn_disallow_lpage_count(const struct kvm_memory_slot *slot,
774 gfn_t gfn, int count)
776 struct kvm_lpage_info *linfo;
779 for (i = PG_LEVEL_2M; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
780 linfo = lpage_info_slot(gfn, slot, i);
781 linfo->disallow_lpage += count;
782 WARN_ON(linfo->disallow_lpage < 0);
786 void kvm_mmu_gfn_disallow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
788 update_gfn_disallow_lpage_count(slot, gfn, 1);
791 void kvm_mmu_gfn_allow_lpage(const struct kvm_memory_slot *slot, gfn_t gfn)
793 update_gfn_disallow_lpage_count(slot, gfn, -1);
796 static void account_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
798 struct kvm_memslots *slots;
799 struct kvm_memory_slot *slot;
802 kvm->arch.indirect_shadow_pages++;
804 slots = kvm_memslots_for_spte_role(kvm, sp->role);
805 slot = __gfn_to_memslot(slots, gfn);
807 /* the non-leaf shadow pages are keeping readonly. */
808 if (sp->role.level > PG_LEVEL_4K)
809 return kvm_slot_page_track_add_page(kvm, slot, gfn,
810 KVM_PAGE_TRACK_WRITE);
812 kvm_mmu_gfn_disallow_lpage(slot, gfn);
814 if (kvm_mmu_slot_gfn_write_protect(kvm, slot, gfn, PG_LEVEL_4K))
815 kvm_flush_remote_tlbs_with_address(kvm, gfn, 1);
818 void track_possible_nx_huge_page(struct kvm *kvm, struct kvm_mmu_page *sp)
821 * If it's possible to replace the shadow page with an NX huge page,
822 * i.e. if the shadow page is the only thing currently preventing KVM
823 * from using a huge page, add the shadow page to the list of "to be
824 * zapped for NX recovery" pages. Note, the shadow page can already be
825 * on the list if KVM is reusing an existing shadow page, i.e. if KVM
826 * links a shadow page at multiple points.
828 if (!list_empty(&sp->possible_nx_huge_page_link))
831 ++kvm->stat.nx_lpage_splits;
832 list_add_tail(&sp->possible_nx_huge_page_link,
833 &kvm->arch.possible_nx_huge_pages);
836 static void account_nx_huge_page(struct kvm *kvm, struct kvm_mmu_page *sp,
837 bool nx_huge_page_possible)
839 sp->nx_huge_page_disallowed = true;
841 if (nx_huge_page_possible)
842 track_possible_nx_huge_page(kvm, sp);
845 static void unaccount_shadowed(struct kvm *kvm, struct kvm_mmu_page *sp)
847 struct kvm_memslots *slots;
848 struct kvm_memory_slot *slot;
851 kvm->arch.indirect_shadow_pages--;
853 slots = kvm_memslots_for_spte_role(kvm, sp->role);
854 slot = __gfn_to_memslot(slots, gfn);
855 if (sp->role.level > PG_LEVEL_4K)
856 return kvm_slot_page_track_remove_page(kvm, slot, gfn,
857 KVM_PAGE_TRACK_WRITE);
859 kvm_mmu_gfn_allow_lpage(slot, gfn);
862 void untrack_possible_nx_huge_page(struct kvm *kvm, struct kvm_mmu_page *sp)
864 if (list_empty(&sp->possible_nx_huge_page_link))
867 --kvm->stat.nx_lpage_splits;
868 list_del_init(&sp->possible_nx_huge_page_link);
871 static void unaccount_nx_huge_page(struct kvm *kvm, struct kvm_mmu_page *sp)
873 sp->nx_huge_page_disallowed = false;
875 untrack_possible_nx_huge_page(kvm, sp);
878 static struct kvm_memory_slot *
879 gfn_to_memslot_dirty_bitmap(struct kvm_vcpu *vcpu, gfn_t gfn,
882 struct kvm_memory_slot *slot;
884 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
885 if (!slot || slot->flags & KVM_MEMSLOT_INVALID)
887 if (no_dirty_log && kvm_slot_dirty_track_enabled(slot))
894 * About rmap_head encoding:
896 * If the bit zero of rmap_head->val is clear, then it points to the only spte
897 * in this rmap chain. Otherwise, (rmap_head->val & ~1) points to a struct
898 * pte_list_desc containing more mappings.
902 * Returns the number of pointers in the rmap chain, not counting the new one.
904 static int pte_list_add(struct kvm_mmu_memory_cache *cache, u64 *spte,
905 struct kvm_rmap_head *rmap_head)
907 struct pte_list_desc *desc;
910 if (!rmap_head->val) {
911 rmap_printk("%p %llx 0->1\n", spte, *spte);
912 rmap_head->val = (unsigned long)spte;
913 } else if (!(rmap_head->val & 1)) {
914 rmap_printk("%p %llx 1->many\n", spte, *spte);
915 desc = kvm_mmu_memory_cache_alloc(cache);
916 desc->sptes[0] = (u64 *)rmap_head->val;
917 desc->sptes[1] = spte;
918 desc->spte_count = 2;
919 rmap_head->val = (unsigned long)desc | 1;
922 rmap_printk("%p %llx many->many\n", spte, *spte);
923 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
924 while (desc->spte_count == PTE_LIST_EXT) {
925 count += PTE_LIST_EXT;
927 desc->more = kvm_mmu_memory_cache_alloc(cache);
929 desc->spte_count = 0;
934 count += desc->spte_count;
935 desc->sptes[desc->spte_count++] = spte;
941 pte_list_desc_remove_entry(struct kvm_rmap_head *rmap_head,
942 struct pte_list_desc *desc, int i,
943 struct pte_list_desc *prev_desc)
945 int j = desc->spte_count - 1;
947 desc->sptes[i] = desc->sptes[j];
948 desc->sptes[j] = NULL;
950 if (desc->spte_count)
952 if (!prev_desc && !desc->more)
956 prev_desc->more = desc->more;
958 rmap_head->val = (unsigned long)desc->more | 1;
959 mmu_free_pte_list_desc(desc);
962 static void pte_list_remove(u64 *spte, struct kvm_rmap_head *rmap_head)
964 struct pte_list_desc *desc;
965 struct pte_list_desc *prev_desc;
968 if (!rmap_head->val) {
969 pr_err("%s: %p 0->BUG\n", __func__, spte);
971 } else if (!(rmap_head->val & 1)) {
972 rmap_printk("%p 1->0\n", spte);
973 if ((u64 *)rmap_head->val != spte) {
974 pr_err("%s: %p 1->BUG\n", __func__, spte);
979 rmap_printk("%p many->many\n", spte);
980 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
983 for (i = 0; i < desc->spte_count; ++i) {
984 if (desc->sptes[i] == spte) {
985 pte_list_desc_remove_entry(rmap_head,
993 pr_err("%s: %p many->many\n", __func__, spte);
998 static void kvm_zap_one_rmap_spte(struct kvm *kvm,
999 struct kvm_rmap_head *rmap_head, u64 *sptep)
1001 mmu_spte_clear_track_bits(kvm, sptep);
1002 pte_list_remove(sptep, rmap_head);
1005 /* Return true if at least one SPTE was zapped, false otherwise */
1006 static bool kvm_zap_all_rmap_sptes(struct kvm *kvm,
1007 struct kvm_rmap_head *rmap_head)
1009 struct pte_list_desc *desc, *next;
1012 if (!rmap_head->val)
1015 if (!(rmap_head->val & 1)) {
1016 mmu_spte_clear_track_bits(kvm, (u64 *)rmap_head->val);
1020 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1022 for (; desc; desc = next) {
1023 for (i = 0; i < desc->spte_count; i++)
1024 mmu_spte_clear_track_bits(kvm, desc->sptes[i]);
1026 mmu_free_pte_list_desc(desc);
1029 /* rmap_head is meaningless now, remember to reset it */
1034 unsigned int pte_list_count(struct kvm_rmap_head *rmap_head)
1036 struct pte_list_desc *desc;
1037 unsigned int count = 0;
1039 if (!rmap_head->val)
1041 else if (!(rmap_head->val & 1))
1044 desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1047 count += desc->spte_count;
1054 static struct kvm_rmap_head *gfn_to_rmap(gfn_t gfn, int level,
1055 const struct kvm_memory_slot *slot)
1059 idx = gfn_to_index(gfn, slot->base_gfn, level);
1060 return &slot->arch.rmap[level - PG_LEVEL_4K][idx];
1063 static bool rmap_can_add(struct kvm_vcpu *vcpu)
1065 struct kvm_mmu_memory_cache *mc;
1067 mc = &vcpu->arch.mmu_pte_list_desc_cache;
1068 return kvm_mmu_memory_cache_nr_free_objects(mc);
1071 static void rmap_remove(struct kvm *kvm, u64 *spte)
1073 struct kvm_memslots *slots;
1074 struct kvm_memory_slot *slot;
1075 struct kvm_mmu_page *sp;
1077 struct kvm_rmap_head *rmap_head;
1079 sp = sptep_to_sp(spte);
1080 gfn = kvm_mmu_page_get_gfn(sp, spte_index(spte));
1083 * Unlike rmap_add, rmap_remove does not run in the context of a vCPU
1084 * so we have to determine which memslots to use based on context
1085 * information in sp->role.
1087 slots = kvm_memslots_for_spte_role(kvm, sp->role);
1089 slot = __gfn_to_memslot(slots, gfn);
1090 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1092 pte_list_remove(spte, rmap_head);
1096 * Used by the following functions to iterate through the sptes linked by a
1097 * rmap. All fields are private and not assumed to be used outside.
1099 struct rmap_iterator {
1100 /* private fields */
1101 struct pte_list_desc *desc; /* holds the sptep if not NULL */
1102 int pos; /* index of the sptep */
1106 * Iteration must be started by this function. This should also be used after
1107 * removing/dropping sptes from the rmap link because in such cases the
1108 * information in the iterator may not be valid.
1110 * Returns sptep if found, NULL otherwise.
1112 static u64 *rmap_get_first(struct kvm_rmap_head *rmap_head,
1113 struct rmap_iterator *iter)
1117 if (!rmap_head->val)
1120 if (!(rmap_head->val & 1)) {
1122 sptep = (u64 *)rmap_head->val;
1126 iter->desc = (struct pte_list_desc *)(rmap_head->val & ~1ul);
1128 sptep = iter->desc->sptes[iter->pos];
1130 BUG_ON(!is_shadow_present_pte(*sptep));
1135 * Must be used with a valid iterator: e.g. after rmap_get_first().
1137 * Returns sptep if found, NULL otherwise.
1139 static u64 *rmap_get_next(struct rmap_iterator *iter)
1144 if (iter->pos < PTE_LIST_EXT - 1) {
1146 sptep = iter->desc->sptes[iter->pos];
1151 iter->desc = iter->desc->more;
1155 /* desc->sptes[0] cannot be NULL */
1156 sptep = iter->desc->sptes[iter->pos];
1163 BUG_ON(!is_shadow_present_pte(*sptep));
1167 #define for_each_rmap_spte(_rmap_head_, _iter_, _spte_) \
1168 for (_spte_ = rmap_get_first(_rmap_head_, _iter_); \
1169 _spte_; _spte_ = rmap_get_next(_iter_))
1171 static void drop_spte(struct kvm *kvm, u64 *sptep)
1173 u64 old_spte = mmu_spte_clear_track_bits(kvm, sptep);
1175 if (is_shadow_present_pte(old_spte))
1176 rmap_remove(kvm, sptep);
1179 static void drop_large_spte(struct kvm *kvm, u64 *sptep, bool flush)
1181 struct kvm_mmu_page *sp;
1183 sp = sptep_to_sp(sptep);
1184 WARN_ON(sp->role.level == PG_LEVEL_4K);
1186 drop_spte(kvm, sptep);
1189 kvm_flush_remote_tlbs_with_address(kvm, sp->gfn,
1190 KVM_PAGES_PER_HPAGE(sp->role.level));
1194 * Write-protect on the specified @sptep, @pt_protect indicates whether
1195 * spte write-protection is caused by protecting shadow page table.
1197 * Note: write protection is difference between dirty logging and spte
1199 * - for dirty logging, the spte can be set to writable at anytime if
1200 * its dirty bitmap is properly set.
1201 * - for spte protection, the spte can be writable only after unsync-ing
1204 * Return true if tlb need be flushed.
1206 static bool spte_write_protect(u64 *sptep, bool pt_protect)
1210 if (!is_writable_pte(spte) &&
1211 !(pt_protect && is_mmu_writable_spte(spte)))
1214 rmap_printk("spte %p %llx\n", sptep, *sptep);
1217 spte &= ~shadow_mmu_writable_mask;
1218 spte = spte & ~PT_WRITABLE_MASK;
1220 return mmu_spte_update(sptep, spte);
1223 static bool rmap_write_protect(struct kvm_rmap_head *rmap_head,
1227 struct rmap_iterator iter;
1230 for_each_rmap_spte(rmap_head, &iter, sptep)
1231 flush |= spte_write_protect(sptep, pt_protect);
1236 static bool spte_clear_dirty(u64 *sptep)
1240 rmap_printk("spte %p %llx\n", sptep, *sptep);
1242 MMU_WARN_ON(!spte_ad_enabled(spte));
1243 spte &= ~shadow_dirty_mask;
1244 return mmu_spte_update(sptep, spte);
1247 static bool spte_wrprot_for_clear_dirty(u64 *sptep)
1249 bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT,
1250 (unsigned long *)sptep);
1251 if (was_writable && !spte_ad_enabled(*sptep))
1252 kvm_set_pfn_dirty(spte_to_pfn(*sptep));
1254 return was_writable;
1258 * Gets the GFN ready for another round of dirty logging by clearing the
1259 * - D bit on ad-enabled SPTEs, and
1260 * - W bit on ad-disabled SPTEs.
1261 * Returns true iff any D or W bits were cleared.
1263 static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1264 const struct kvm_memory_slot *slot)
1267 struct rmap_iterator iter;
1270 for_each_rmap_spte(rmap_head, &iter, sptep)
1271 if (spte_ad_need_write_protect(*sptep))
1272 flush |= spte_wrprot_for_clear_dirty(sptep);
1274 flush |= spte_clear_dirty(sptep);
1280 * kvm_mmu_write_protect_pt_masked - write protect selected PT level pages
1281 * @kvm: kvm instance
1282 * @slot: slot to protect
1283 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1284 * @mask: indicates which pages we should protect
1286 * Used when we do not need to care about huge page mappings.
1288 static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
1289 struct kvm_memory_slot *slot,
1290 gfn_t gfn_offset, unsigned long mask)
1292 struct kvm_rmap_head *rmap_head;
1294 if (tdp_mmu_enabled)
1295 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1296 slot->base_gfn + gfn_offset, mask, true);
1298 if (!kvm_memslots_have_rmaps(kvm))
1302 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1304 rmap_write_protect(rmap_head, false);
1306 /* clear the first set bit */
1312 * kvm_mmu_clear_dirty_pt_masked - clear MMU D-bit for PT level pages, or write
1313 * protect the page if the D-bit isn't supported.
1314 * @kvm: kvm instance
1315 * @slot: slot to clear D-bit
1316 * @gfn_offset: start of the BITS_PER_LONG pages we care about
1317 * @mask: indicates which pages we should clear D-bit
1319 * Used for PML to re-log the dirty GPAs after userspace querying dirty_bitmap.
1321 static void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1322 struct kvm_memory_slot *slot,
1323 gfn_t gfn_offset, unsigned long mask)
1325 struct kvm_rmap_head *rmap_head;
1327 if (tdp_mmu_enabled)
1328 kvm_tdp_mmu_clear_dirty_pt_masked(kvm, slot,
1329 slot->base_gfn + gfn_offset, mask, false);
1331 if (!kvm_memslots_have_rmaps(kvm))
1335 rmap_head = gfn_to_rmap(slot->base_gfn + gfn_offset + __ffs(mask),
1337 __rmap_clear_dirty(kvm, rmap_head, slot);
1339 /* clear the first set bit */
1345 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1348 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1349 * enable dirty logging for them.
1351 * We need to care about huge page mappings: e.g. during dirty logging we may
1352 * have such mappings.
1354 void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1355 struct kvm_memory_slot *slot,
1356 gfn_t gfn_offset, unsigned long mask)
1359 * Huge pages are NOT write protected when we start dirty logging in
1360 * initially-all-set mode; must write protect them here so that they
1361 * are split to 4K on the first write.
1363 * The gfn_offset is guaranteed to be aligned to 64, but the base_gfn
1364 * of memslot has no such restriction, so the range can cross two large
1367 if (kvm_dirty_log_manual_protect_and_init_set(kvm)) {
1368 gfn_t start = slot->base_gfn + gfn_offset + __ffs(mask);
1369 gfn_t end = slot->base_gfn + gfn_offset + __fls(mask);
1371 if (READ_ONCE(eager_page_split))
1372 kvm_mmu_try_split_huge_pages(kvm, slot, start, end, PG_LEVEL_4K);
1374 kvm_mmu_slot_gfn_write_protect(kvm, slot, start, PG_LEVEL_2M);
1376 /* Cross two large pages? */
1377 if (ALIGN(start << PAGE_SHIFT, PMD_SIZE) !=
1378 ALIGN(end << PAGE_SHIFT, PMD_SIZE))
1379 kvm_mmu_slot_gfn_write_protect(kvm, slot, end,
1383 /* Now handle 4K PTEs. */
1384 if (kvm_x86_ops.cpu_dirty_log_size)
1385 kvm_mmu_clear_dirty_pt_masked(kvm, slot, gfn_offset, mask);
1387 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1390 int kvm_cpu_dirty_log_size(void)
1392 return kvm_x86_ops.cpu_dirty_log_size;
1395 bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm,
1396 struct kvm_memory_slot *slot, u64 gfn,
1399 struct kvm_rmap_head *rmap_head;
1401 bool write_protected = false;
1403 if (kvm_memslots_have_rmaps(kvm)) {
1404 for (i = min_level; i <= KVM_MAX_HUGEPAGE_LEVEL; ++i) {
1405 rmap_head = gfn_to_rmap(gfn, i, slot);
1406 write_protected |= rmap_write_protect(rmap_head, true);
1410 if (tdp_mmu_enabled)
1412 kvm_tdp_mmu_write_protect_gfn(kvm, slot, gfn, min_level);
1414 return write_protected;
1417 static bool kvm_vcpu_write_protect_gfn(struct kvm_vcpu *vcpu, u64 gfn)
1419 struct kvm_memory_slot *slot;
1421 slot = kvm_vcpu_gfn_to_memslot(vcpu, gfn);
1422 return kvm_mmu_slot_gfn_write_protect(vcpu->kvm, slot, gfn, PG_LEVEL_4K);
1425 static bool __kvm_zap_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1426 const struct kvm_memory_slot *slot)
1428 return kvm_zap_all_rmap_sptes(kvm, rmap_head);
1431 static bool kvm_zap_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1432 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1435 return __kvm_zap_rmap(kvm, rmap_head, slot);
1438 static bool kvm_set_pte_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1439 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1443 struct rmap_iterator iter;
1444 bool need_flush = false;
1448 WARN_ON(pte_huge(pte));
1449 new_pfn = pte_pfn(pte);
1452 for_each_rmap_spte(rmap_head, &iter, sptep) {
1453 rmap_printk("spte %p %llx gfn %llx (%d)\n",
1454 sptep, *sptep, gfn, level);
1458 if (pte_write(pte)) {
1459 kvm_zap_one_rmap_spte(kvm, rmap_head, sptep);
1462 new_spte = kvm_mmu_changed_pte_notifier_make_spte(
1465 mmu_spte_clear_track_bits(kvm, sptep);
1466 mmu_spte_set(sptep, new_spte);
1470 if (need_flush && kvm_available_flush_tlb_with_range()) {
1471 kvm_flush_remote_tlbs_with_address(kvm, gfn, 1);
1478 struct slot_rmap_walk_iterator {
1480 const struct kvm_memory_slot *slot;
1486 /* output fields. */
1488 struct kvm_rmap_head *rmap;
1491 /* private field. */
1492 struct kvm_rmap_head *end_rmap;
1496 rmap_walk_init_level(struct slot_rmap_walk_iterator *iterator, int level)
1498 iterator->level = level;
1499 iterator->gfn = iterator->start_gfn;
1500 iterator->rmap = gfn_to_rmap(iterator->gfn, level, iterator->slot);
1501 iterator->end_rmap = gfn_to_rmap(iterator->end_gfn, level, iterator->slot);
1505 slot_rmap_walk_init(struct slot_rmap_walk_iterator *iterator,
1506 const struct kvm_memory_slot *slot, int start_level,
1507 int end_level, gfn_t start_gfn, gfn_t end_gfn)
1509 iterator->slot = slot;
1510 iterator->start_level = start_level;
1511 iterator->end_level = end_level;
1512 iterator->start_gfn = start_gfn;
1513 iterator->end_gfn = end_gfn;
1515 rmap_walk_init_level(iterator, iterator->start_level);
1518 static bool slot_rmap_walk_okay(struct slot_rmap_walk_iterator *iterator)
1520 return !!iterator->rmap;
1523 static void slot_rmap_walk_next(struct slot_rmap_walk_iterator *iterator)
1525 while (++iterator->rmap <= iterator->end_rmap) {
1526 iterator->gfn += (1UL << KVM_HPAGE_GFN_SHIFT(iterator->level));
1528 if (iterator->rmap->val)
1532 if (++iterator->level > iterator->end_level) {
1533 iterator->rmap = NULL;
1537 rmap_walk_init_level(iterator, iterator->level);
1540 #define for_each_slot_rmap_range(_slot_, _start_level_, _end_level_, \
1541 _start_gfn, _end_gfn, _iter_) \
1542 for (slot_rmap_walk_init(_iter_, _slot_, _start_level_, \
1543 _end_level_, _start_gfn, _end_gfn); \
1544 slot_rmap_walk_okay(_iter_); \
1545 slot_rmap_walk_next(_iter_))
1547 typedef bool (*rmap_handler_t)(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1548 struct kvm_memory_slot *slot, gfn_t gfn,
1549 int level, pte_t pte);
1551 static __always_inline bool kvm_handle_gfn_range(struct kvm *kvm,
1552 struct kvm_gfn_range *range,
1553 rmap_handler_t handler)
1555 struct slot_rmap_walk_iterator iterator;
1558 for_each_slot_rmap_range(range->slot, PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
1559 range->start, range->end - 1, &iterator)
1560 ret |= handler(kvm, iterator.rmap, range->slot, iterator.gfn,
1561 iterator.level, range->pte);
1566 bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
1570 if (kvm_memslots_have_rmaps(kvm))
1571 flush = kvm_handle_gfn_range(kvm, range, kvm_zap_rmap);
1573 if (tdp_mmu_enabled)
1574 flush = kvm_tdp_mmu_unmap_gfn_range(kvm, range, flush);
1579 bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1583 if (kvm_memslots_have_rmaps(kvm))
1584 flush = kvm_handle_gfn_range(kvm, range, kvm_set_pte_rmap);
1586 if (tdp_mmu_enabled)
1587 flush |= kvm_tdp_mmu_set_spte_gfn(kvm, range);
1592 static bool kvm_age_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1593 struct kvm_memory_slot *slot, gfn_t gfn, int level,
1597 struct rmap_iterator iter;
1600 for_each_rmap_spte(rmap_head, &iter, sptep)
1601 young |= mmu_spte_age(sptep);
1606 static bool kvm_test_age_rmap(struct kvm *kvm, struct kvm_rmap_head *rmap_head,
1607 struct kvm_memory_slot *slot, gfn_t gfn,
1608 int level, pte_t unused)
1611 struct rmap_iterator iter;
1613 for_each_rmap_spte(rmap_head, &iter, sptep)
1614 if (is_accessed_spte(*sptep))
1619 #define RMAP_RECYCLE_THRESHOLD 1000
1621 static void __rmap_add(struct kvm *kvm,
1622 struct kvm_mmu_memory_cache *cache,
1623 const struct kvm_memory_slot *slot,
1624 u64 *spte, gfn_t gfn, unsigned int access)
1626 struct kvm_mmu_page *sp;
1627 struct kvm_rmap_head *rmap_head;
1630 sp = sptep_to_sp(spte);
1631 kvm_mmu_page_set_translation(sp, spte_index(spte), gfn, access);
1632 kvm_update_page_stats(kvm, sp->role.level, 1);
1634 rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
1635 rmap_count = pte_list_add(cache, spte, rmap_head);
1637 if (rmap_count > kvm->stat.max_mmu_rmap_size)
1638 kvm->stat.max_mmu_rmap_size = rmap_count;
1639 if (rmap_count > RMAP_RECYCLE_THRESHOLD) {
1640 kvm_zap_all_rmap_sptes(kvm, rmap_head);
1641 kvm_flush_remote_tlbs_with_address(
1642 kvm, sp->gfn, KVM_PAGES_PER_HPAGE(sp->role.level));
1646 static void rmap_add(struct kvm_vcpu *vcpu, const struct kvm_memory_slot *slot,
1647 u64 *spte, gfn_t gfn, unsigned int access)
1649 struct kvm_mmu_memory_cache *cache = &vcpu->arch.mmu_pte_list_desc_cache;
1651 __rmap_add(vcpu->kvm, cache, slot, spte, gfn, access);
1654 bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1658 if (kvm_memslots_have_rmaps(kvm))
1659 young = kvm_handle_gfn_range(kvm, range, kvm_age_rmap);
1661 if (tdp_mmu_enabled)
1662 young |= kvm_tdp_mmu_age_gfn_range(kvm, range);
1667 bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
1671 if (kvm_memslots_have_rmaps(kvm))
1672 young = kvm_handle_gfn_range(kvm, range, kvm_test_age_rmap);
1674 if (tdp_mmu_enabled)
1675 young |= kvm_tdp_mmu_test_age_gfn(kvm, range);
1681 static int is_empty_shadow_page(u64 *spt)
1686 for (pos = spt, end = pos + SPTE_ENT_PER_PAGE; pos != end; pos++)
1687 if (is_shadow_present_pte(*pos)) {
1688 printk(KERN_ERR "%s: %p %llx\n", __func__,
1697 * This value is the sum of all of the kvm instances's
1698 * kvm->arch.n_used_mmu_pages values. We need a global,
1699 * aggregate version in order to make the slab shrinker
1702 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, long nr)
1704 kvm->arch.n_used_mmu_pages += nr;
1705 percpu_counter_add(&kvm_total_used_mmu_pages, nr);
1708 static void kvm_account_mmu_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1710 kvm_mod_used_mmu_pages(kvm, +1);
1711 kvm_account_pgtable_pages((void *)sp->spt, +1);
1714 static void kvm_unaccount_mmu_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1716 kvm_mod_used_mmu_pages(kvm, -1);
1717 kvm_account_pgtable_pages((void *)sp->spt, -1);
1720 static void kvm_mmu_free_shadow_page(struct kvm_mmu_page *sp)
1722 MMU_WARN_ON(!is_empty_shadow_page(sp->spt));
1723 hlist_del(&sp->hash_link);
1724 list_del(&sp->link);
1725 free_page((unsigned long)sp->spt);
1726 if (!sp->role.direct)
1727 free_page((unsigned long)sp->shadowed_translation);
1728 kmem_cache_free(mmu_page_header_cache, sp);
1731 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1733 return hash_64(gfn, KVM_MMU_HASH_SHIFT);
1736 static void mmu_page_add_parent_pte(struct kvm_mmu_memory_cache *cache,
1737 struct kvm_mmu_page *sp, u64 *parent_pte)
1742 pte_list_add(cache, parent_pte, &sp->parent_ptes);
1745 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1748 pte_list_remove(parent_pte, &sp->parent_ptes);
1751 static void drop_parent_pte(struct kvm_mmu_page *sp,
1754 mmu_page_remove_parent_pte(sp, parent_pte);
1755 mmu_spte_clear_no_track(parent_pte);
1758 static void mark_unsync(u64 *spte);
1759 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1762 struct rmap_iterator iter;
1764 for_each_rmap_spte(&sp->parent_ptes, &iter, sptep) {
1769 static void mark_unsync(u64 *spte)
1771 struct kvm_mmu_page *sp;
1773 sp = sptep_to_sp(spte);
1774 if (__test_and_set_bit(spte_index(spte), sp->unsync_child_bitmap))
1776 if (sp->unsync_children++)
1778 kvm_mmu_mark_parents_unsync(sp);
1781 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1782 struct kvm_mmu_page *sp)
1787 #define KVM_PAGE_ARRAY_NR 16
1789 struct kvm_mmu_pages {
1790 struct mmu_page_and_offset {
1791 struct kvm_mmu_page *sp;
1793 } page[KVM_PAGE_ARRAY_NR];
1797 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1803 for (i=0; i < pvec->nr; i++)
1804 if (pvec->page[i].sp == sp)
1807 pvec->page[pvec->nr].sp = sp;
1808 pvec->page[pvec->nr].idx = idx;
1810 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1813 static inline void clear_unsync_child_bit(struct kvm_mmu_page *sp, int idx)
1815 --sp->unsync_children;
1816 WARN_ON((int)sp->unsync_children < 0);
1817 __clear_bit(idx, sp->unsync_child_bitmap);
1820 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1821 struct kvm_mmu_pages *pvec)
1823 int i, ret, nr_unsync_leaf = 0;
1825 for_each_set_bit(i, sp->unsync_child_bitmap, 512) {
1826 struct kvm_mmu_page *child;
1827 u64 ent = sp->spt[i];
1829 if (!is_shadow_present_pte(ent) || is_large_pte(ent)) {
1830 clear_unsync_child_bit(sp, i);
1834 child = spte_to_child_sp(ent);
1836 if (child->unsync_children) {
1837 if (mmu_pages_add(pvec, child, i))
1840 ret = __mmu_unsync_walk(child, pvec);
1842 clear_unsync_child_bit(sp, i);
1844 } else if (ret > 0) {
1845 nr_unsync_leaf += ret;
1848 } else if (child->unsync) {
1850 if (mmu_pages_add(pvec, child, i))
1853 clear_unsync_child_bit(sp, i);
1856 return nr_unsync_leaf;
1859 #define INVALID_INDEX (-1)
1861 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1862 struct kvm_mmu_pages *pvec)
1865 if (!sp->unsync_children)
1868 mmu_pages_add(pvec, sp, INVALID_INDEX);
1869 return __mmu_unsync_walk(sp, pvec);
1872 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1874 WARN_ON(!sp->unsync);
1875 trace_kvm_mmu_sync_page(sp);
1877 --kvm->stat.mmu_unsync;
1880 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1881 struct list_head *invalid_list);
1882 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1883 struct list_head *invalid_list);
1885 static bool sp_has_gptes(struct kvm_mmu_page *sp)
1887 if (sp->role.direct)
1890 if (sp->role.passthrough)
1896 #define for_each_valid_sp(_kvm, _sp, _list) \
1897 hlist_for_each_entry(_sp, _list, hash_link) \
1898 if (is_obsolete_sp((_kvm), (_sp))) { \
1901 #define for_each_gfn_valid_sp_with_gptes(_kvm, _sp, _gfn) \
1902 for_each_valid_sp(_kvm, _sp, \
1903 &(_kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(_gfn)]) \
1904 if ((_sp)->gfn != (_gfn) || !sp_has_gptes(_sp)) {} else
1906 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1907 struct list_head *invalid_list)
1909 int ret = vcpu->arch.mmu->sync_page(vcpu, sp);
1912 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1916 static bool kvm_mmu_remote_flush_or_zap(struct kvm *kvm,
1917 struct list_head *invalid_list,
1920 if (!remote_flush && list_empty(invalid_list))
1923 if (!list_empty(invalid_list))
1924 kvm_mmu_commit_zap_page(kvm, invalid_list);
1926 kvm_flush_remote_tlbs(kvm);
1930 static bool is_obsolete_sp(struct kvm *kvm, struct kvm_mmu_page *sp)
1932 if (sp->role.invalid)
1935 /* TDP MMU pages do not use the MMU generation. */
1936 return !is_tdp_mmu_page(sp) &&
1937 unlikely(sp->mmu_valid_gen != kvm->arch.mmu_valid_gen);
1940 struct mmu_page_path {
1941 struct kvm_mmu_page *parent[PT64_ROOT_MAX_LEVEL];
1942 unsigned int idx[PT64_ROOT_MAX_LEVEL];
1945 #define for_each_sp(pvec, sp, parents, i) \
1946 for (i = mmu_pages_first(&pvec, &parents); \
1947 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1948 i = mmu_pages_next(&pvec, &parents, i))
1950 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1951 struct mmu_page_path *parents,
1956 for (n = i+1; n < pvec->nr; n++) {
1957 struct kvm_mmu_page *sp = pvec->page[n].sp;
1958 unsigned idx = pvec->page[n].idx;
1959 int level = sp->role.level;
1961 parents->idx[level-1] = idx;
1962 if (level == PG_LEVEL_4K)
1965 parents->parent[level-2] = sp;
1971 static int mmu_pages_first(struct kvm_mmu_pages *pvec,
1972 struct mmu_page_path *parents)
1974 struct kvm_mmu_page *sp;
1980 WARN_ON(pvec->page[0].idx != INVALID_INDEX);
1982 sp = pvec->page[0].sp;
1983 level = sp->role.level;
1984 WARN_ON(level == PG_LEVEL_4K);
1986 parents->parent[level-2] = sp;
1988 /* Also set up a sentinel. Further entries in pvec are all
1989 * children of sp, so this element is never overwritten.
1991 parents->parent[level-1] = NULL;
1992 return mmu_pages_next(pvec, parents, 0);
1995 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1997 struct kvm_mmu_page *sp;
1998 unsigned int level = 0;
2001 unsigned int idx = parents->idx[level];
2002 sp = parents->parent[level];
2006 WARN_ON(idx == INVALID_INDEX);
2007 clear_unsync_child_bit(sp, idx);
2009 } while (!sp->unsync_children);
2012 static int mmu_sync_children(struct kvm_vcpu *vcpu,
2013 struct kvm_mmu_page *parent, bool can_yield)
2016 struct kvm_mmu_page *sp;
2017 struct mmu_page_path parents;
2018 struct kvm_mmu_pages pages;
2019 LIST_HEAD(invalid_list);
2022 while (mmu_unsync_walk(parent, &pages)) {
2023 bool protected = false;
2025 for_each_sp(pages, sp, parents, i)
2026 protected |= kvm_vcpu_write_protect_gfn(vcpu, sp->gfn);
2029 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, true);
2033 for_each_sp(pages, sp, parents, i) {
2034 kvm_unlink_unsync_page(vcpu->kvm, sp);
2035 flush |= kvm_sync_page(vcpu, sp, &invalid_list) > 0;
2036 mmu_pages_clear_parents(&parents);
2038 if (need_resched() || rwlock_needbreak(&vcpu->kvm->mmu_lock)) {
2039 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
2041 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
2045 cond_resched_rwlock_write(&vcpu->kvm->mmu_lock);
2050 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
2054 static void __clear_sp_write_flooding_count(struct kvm_mmu_page *sp)
2056 atomic_set(&sp->write_flooding_count, 0);
2059 static void clear_sp_write_flooding_count(u64 *spte)
2061 __clear_sp_write_flooding_count(sptep_to_sp(spte));
2065 * The vCPU is required when finding indirect shadow pages; the shadow
2066 * page may already exist and syncing it needs the vCPU pointer in
2067 * order to read guest page tables. Direct shadow pages are never
2068 * unsync, thus @vcpu can be NULL if @role.direct is true.
2070 static struct kvm_mmu_page *kvm_mmu_find_shadow_page(struct kvm *kvm,
2071 struct kvm_vcpu *vcpu,
2073 struct hlist_head *sp_list,
2074 union kvm_mmu_page_role role)
2076 struct kvm_mmu_page *sp;
2079 LIST_HEAD(invalid_list);
2081 for_each_valid_sp(kvm, sp, sp_list) {
2082 if (sp->gfn != gfn) {
2087 if (sp->role.word != role.word) {
2089 * If the guest is creating an upper-level page, zap
2090 * unsync pages for the same gfn. While it's possible
2091 * the guest is using recursive page tables, in all
2092 * likelihood the guest has stopped using the unsync
2093 * page and is installing a completely unrelated page.
2094 * Unsync pages must not be left as is, because the new
2095 * upper-level page will be write-protected.
2097 if (role.level > PG_LEVEL_4K && sp->unsync)
2098 kvm_mmu_prepare_zap_page(kvm, sp,
2103 /* unsync and write-flooding only apply to indirect SPs. */
2104 if (sp->role.direct)
2108 if (KVM_BUG_ON(!vcpu, kvm))
2112 * The page is good, but is stale. kvm_sync_page does
2113 * get the latest guest state, but (unlike mmu_unsync_children)
2114 * it doesn't write-protect the page or mark it synchronized!
2115 * This way the validity of the mapping is ensured, but the
2116 * overhead of write protection is not incurred until the
2117 * guest invalidates the TLB mapping. This allows multiple
2118 * SPs for a single gfn to be unsync.
2120 * If the sync fails, the page is zapped. If so, break
2121 * in order to rebuild it.
2123 ret = kvm_sync_page(vcpu, sp, &invalid_list);
2127 WARN_ON(!list_empty(&invalid_list));
2129 kvm_flush_remote_tlbs(kvm);
2132 __clear_sp_write_flooding_count(sp);
2138 ++kvm->stat.mmu_cache_miss;
2141 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2143 if (collisions > kvm->stat.max_mmu_page_hash_collisions)
2144 kvm->stat.max_mmu_page_hash_collisions = collisions;
2148 /* Caches used when allocating a new shadow page. */
2149 struct shadow_page_caches {
2150 struct kvm_mmu_memory_cache *page_header_cache;
2151 struct kvm_mmu_memory_cache *shadow_page_cache;
2152 struct kvm_mmu_memory_cache *shadowed_info_cache;
2155 static struct kvm_mmu_page *kvm_mmu_alloc_shadow_page(struct kvm *kvm,
2156 struct shadow_page_caches *caches,
2158 struct hlist_head *sp_list,
2159 union kvm_mmu_page_role role)
2161 struct kvm_mmu_page *sp;
2163 sp = kvm_mmu_memory_cache_alloc(caches->page_header_cache);
2164 sp->spt = kvm_mmu_memory_cache_alloc(caches->shadow_page_cache);
2166 sp->shadowed_translation = kvm_mmu_memory_cache_alloc(caches->shadowed_info_cache);
2168 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
2170 INIT_LIST_HEAD(&sp->possible_nx_huge_page_link);
2173 * active_mmu_pages must be a FIFO list, as kvm_zap_obsolete_pages()
2174 * depends on valid pages being added to the head of the list. See
2175 * comments in kvm_zap_obsolete_pages().
2177 sp->mmu_valid_gen = kvm->arch.mmu_valid_gen;
2178 list_add(&sp->link, &kvm->arch.active_mmu_pages);
2179 kvm_account_mmu_page(kvm, sp);
2183 hlist_add_head(&sp->hash_link, sp_list);
2184 if (sp_has_gptes(sp))
2185 account_shadowed(kvm, sp);
2190 /* Note, @vcpu may be NULL if @role.direct is true; see kvm_mmu_find_shadow_page. */
2191 static struct kvm_mmu_page *__kvm_mmu_get_shadow_page(struct kvm *kvm,
2192 struct kvm_vcpu *vcpu,
2193 struct shadow_page_caches *caches,
2195 union kvm_mmu_page_role role)
2197 struct hlist_head *sp_list;
2198 struct kvm_mmu_page *sp;
2199 bool created = false;
2201 sp_list = &kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)];
2203 sp = kvm_mmu_find_shadow_page(kvm, vcpu, gfn, sp_list, role);
2206 sp = kvm_mmu_alloc_shadow_page(kvm, caches, gfn, sp_list, role);
2209 trace_kvm_mmu_get_page(sp, created);
2213 static struct kvm_mmu_page *kvm_mmu_get_shadow_page(struct kvm_vcpu *vcpu,
2215 union kvm_mmu_page_role role)
2217 struct shadow_page_caches caches = {
2218 .page_header_cache = &vcpu->arch.mmu_page_header_cache,
2219 .shadow_page_cache = &vcpu->arch.mmu_shadow_page_cache,
2220 .shadowed_info_cache = &vcpu->arch.mmu_shadowed_info_cache,
2223 return __kvm_mmu_get_shadow_page(vcpu->kvm, vcpu, &caches, gfn, role);
2226 static union kvm_mmu_page_role kvm_mmu_child_role(u64 *sptep, bool direct,
2227 unsigned int access)
2229 struct kvm_mmu_page *parent_sp = sptep_to_sp(sptep);
2230 union kvm_mmu_page_role role;
2232 role = parent_sp->role;
2234 role.access = access;
2235 role.direct = direct;
2236 role.passthrough = 0;
2239 * If the guest has 4-byte PTEs then that means it's using 32-bit,
2240 * 2-level, non-PAE paging. KVM shadows such guests with PAE paging
2241 * (i.e. 8-byte PTEs). The difference in PTE size means that KVM must
2242 * shadow each guest page table with multiple shadow page tables, which
2243 * requires extra bookkeeping in the role.
2245 * Specifically, to shadow the guest's page directory (which covers a
2246 * 4GiB address space), KVM uses 4 PAE page directories, each mapping
2247 * 1GiB of the address space. @role.quadrant encodes which quarter of
2248 * the address space each maps.
2250 * To shadow the guest's page tables (which each map a 4MiB region), KVM
2251 * uses 2 PAE page tables, each mapping a 2MiB region. For these,
2252 * @role.quadrant encodes which half of the region they map.
2254 * Concretely, a 4-byte PDE consumes bits 31:22, while an 8-byte PDE
2255 * consumes bits 29:21. To consume bits 31:30, KVM's uses 4 shadow
2256 * PDPTEs; those 4 PAE page directories are pre-allocated and their
2257 * quadrant is assigned in mmu_alloc_root(). A 4-byte PTE consumes
2258 * bits 21:12, while an 8-byte PTE consumes bits 20:12. To consume
2259 * bit 21 in the PTE (the child here), KVM propagates that bit to the
2260 * quadrant, i.e. sets quadrant to '0' or '1'. The parent 8-byte PDE
2261 * covers bit 21 (see above), thus the quadrant is calculated from the
2262 * _least_ significant bit of the PDE index.
2264 if (role.has_4_byte_gpte) {
2265 WARN_ON_ONCE(role.level != PG_LEVEL_4K);
2266 role.quadrant = spte_index(sptep) & 1;
2272 static struct kvm_mmu_page *kvm_mmu_get_child_sp(struct kvm_vcpu *vcpu,
2273 u64 *sptep, gfn_t gfn,
2274 bool direct, unsigned int access)
2276 union kvm_mmu_page_role role;
2278 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
2279 return ERR_PTR(-EEXIST);
2281 role = kvm_mmu_child_role(sptep, direct, access);
2282 return kvm_mmu_get_shadow_page(vcpu, gfn, role);
2285 static void shadow_walk_init_using_root(struct kvm_shadow_walk_iterator *iterator,
2286 struct kvm_vcpu *vcpu, hpa_t root,
2289 iterator->addr = addr;
2290 iterator->shadow_addr = root;
2291 iterator->level = vcpu->arch.mmu->root_role.level;
2293 if (iterator->level >= PT64_ROOT_4LEVEL &&
2294 vcpu->arch.mmu->cpu_role.base.level < PT64_ROOT_4LEVEL &&
2295 !vcpu->arch.mmu->root_role.direct)
2296 iterator->level = PT32E_ROOT_LEVEL;
2298 if (iterator->level == PT32E_ROOT_LEVEL) {
2300 * prev_root is currently only used for 64-bit hosts. So only
2301 * the active root_hpa is valid here.
2303 BUG_ON(root != vcpu->arch.mmu->root.hpa);
2305 iterator->shadow_addr
2306 = vcpu->arch.mmu->pae_root[(addr >> 30) & 3];
2307 iterator->shadow_addr &= SPTE_BASE_ADDR_MASK;
2309 if (!iterator->shadow_addr)
2310 iterator->level = 0;
2314 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
2315 struct kvm_vcpu *vcpu, u64 addr)
2317 shadow_walk_init_using_root(iterator, vcpu, vcpu->arch.mmu->root.hpa,
2321 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
2323 if (iterator->level < PG_LEVEL_4K)
2326 iterator->index = SPTE_INDEX(iterator->addr, iterator->level);
2327 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
2331 static void __shadow_walk_next(struct kvm_shadow_walk_iterator *iterator,
2334 if (!is_shadow_present_pte(spte) || is_last_spte(spte, iterator->level)) {
2335 iterator->level = 0;
2339 iterator->shadow_addr = spte & SPTE_BASE_ADDR_MASK;
2343 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
2345 __shadow_walk_next(iterator, *iterator->sptep);
2348 static void __link_shadow_page(struct kvm *kvm,
2349 struct kvm_mmu_memory_cache *cache, u64 *sptep,
2350 struct kvm_mmu_page *sp, bool flush)
2354 BUILD_BUG_ON(VMX_EPT_WRITABLE_MASK != PT_WRITABLE_MASK);
2357 * If an SPTE is present already, it must be a leaf and therefore
2358 * a large one. Drop it, and flush the TLB if needed, before
2361 if (is_shadow_present_pte(*sptep))
2362 drop_large_spte(kvm, sptep, flush);
2364 spte = make_nonleaf_spte(sp->spt, sp_ad_disabled(sp));
2366 mmu_spte_set(sptep, spte);
2368 mmu_page_add_parent_pte(cache, sp, sptep);
2371 * The non-direct sub-pagetable must be updated before linking. For
2372 * L1 sp, the pagetable is updated via kvm_sync_page() in
2373 * kvm_mmu_find_shadow_page() without write-protecting the gfn,
2374 * so sp->unsync can be true or false. For higher level non-direct
2375 * sp, the pagetable is updated/synced via mmu_sync_children() in
2376 * FNAME(fetch)(), so sp->unsync_children can only be false.
2377 * WARN_ON_ONCE() if anything happens unexpectedly.
2379 if (WARN_ON_ONCE(sp->unsync_children) || sp->unsync)
2383 static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep,
2384 struct kvm_mmu_page *sp)
2386 __link_shadow_page(vcpu->kvm, &vcpu->arch.mmu_pte_list_desc_cache, sptep, sp, true);
2389 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2390 unsigned direct_access)
2392 if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
2393 struct kvm_mmu_page *child;
2396 * For the direct sp, if the guest pte's dirty bit
2397 * changed form clean to dirty, it will corrupt the
2398 * sp's access: allow writable in the read-only sp,
2399 * so we should update the spte at this point to get
2400 * a new sp with the correct access.
2402 child = spte_to_child_sp(*sptep);
2403 if (child->role.access == direct_access)
2406 drop_parent_pte(child, sptep);
2407 kvm_flush_remote_tlbs_with_address(vcpu->kvm, child->gfn, 1);
2411 /* Returns the number of zapped non-leaf child shadow pages. */
2412 static int mmu_page_zap_pte(struct kvm *kvm, struct kvm_mmu_page *sp,
2413 u64 *spte, struct list_head *invalid_list)
2416 struct kvm_mmu_page *child;
2419 if (is_shadow_present_pte(pte)) {
2420 if (is_last_spte(pte, sp->role.level)) {
2421 drop_spte(kvm, spte);
2423 child = spte_to_child_sp(pte);
2424 drop_parent_pte(child, spte);
2427 * Recursively zap nested TDP SPs, parentless SPs are
2428 * unlikely to be used again in the near future. This
2429 * avoids retaining a large number of stale nested SPs.
2431 if (tdp_enabled && invalid_list &&
2432 child->role.guest_mode && !child->parent_ptes.val)
2433 return kvm_mmu_prepare_zap_page(kvm, child,
2436 } else if (is_mmio_spte(pte)) {
2437 mmu_spte_clear_no_track(spte);
2442 static int kvm_mmu_page_unlink_children(struct kvm *kvm,
2443 struct kvm_mmu_page *sp,
2444 struct list_head *invalid_list)
2449 for (i = 0; i < SPTE_ENT_PER_PAGE; ++i)
2450 zapped += mmu_page_zap_pte(kvm, sp, sp->spt + i, invalid_list);
2455 static void kvm_mmu_unlink_parents(struct kvm_mmu_page *sp)
2458 struct rmap_iterator iter;
2460 while ((sptep = rmap_get_first(&sp->parent_ptes, &iter)))
2461 drop_parent_pte(sp, sptep);
2464 static int mmu_zap_unsync_children(struct kvm *kvm,
2465 struct kvm_mmu_page *parent,
2466 struct list_head *invalid_list)
2469 struct mmu_page_path parents;
2470 struct kvm_mmu_pages pages;
2472 if (parent->role.level == PG_LEVEL_4K)
2475 while (mmu_unsync_walk(parent, &pages)) {
2476 struct kvm_mmu_page *sp;
2478 for_each_sp(pages, sp, parents, i) {
2479 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
2480 mmu_pages_clear_parents(&parents);
2488 static bool __kvm_mmu_prepare_zap_page(struct kvm *kvm,
2489 struct kvm_mmu_page *sp,
2490 struct list_head *invalid_list,
2493 bool list_unstable, zapped_root = false;
2495 lockdep_assert_held_write(&kvm->mmu_lock);
2496 trace_kvm_mmu_prepare_zap_page(sp);
2497 ++kvm->stat.mmu_shadow_zapped;
2498 *nr_zapped = mmu_zap_unsync_children(kvm, sp, invalid_list);
2499 *nr_zapped += kvm_mmu_page_unlink_children(kvm, sp, invalid_list);
2500 kvm_mmu_unlink_parents(sp);
2502 /* Zapping children means active_mmu_pages has become unstable. */
2503 list_unstable = *nr_zapped;
2505 if (!sp->role.invalid && sp_has_gptes(sp))
2506 unaccount_shadowed(kvm, sp);
2509 kvm_unlink_unsync_page(kvm, sp);
2510 if (!sp->root_count) {
2515 * Already invalid pages (previously active roots) are not on
2516 * the active page list. See list_del() in the "else" case of
2519 if (sp->role.invalid)
2520 list_add(&sp->link, invalid_list);
2522 list_move(&sp->link, invalid_list);
2523 kvm_unaccount_mmu_page(kvm, sp);
2526 * Remove the active root from the active page list, the root
2527 * will be explicitly freed when the root_count hits zero.
2529 list_del(&sp->link);
2532 * Obsolete pages cannot be used on any vCPUs, see the comment
2533 * in kvm_mmu_zap_all_fast(). Note, is_obsolete_sp() also
2534 * treats invalid shadow pages as being obsolete.
2536 zapped_root = !is_obsolete_sp(kvm, sp);
2539 if (sp->nx_huge_page_disallowed)
2540 unaccount_nx_huge_page(kvm, sp);
2542 sp->role.invalid = 1;
2545 * Make the request to free obsolete roots after marking the root
2546 * invalid, otherwise other vCPUs may not see it as invalid.
2549 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
2550 return list_unstable;
2553 static bool kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
2554 struct list_head *invalid_list)
2558 __kvm_mmu_prepare_zap_page(kvm, sp, invalid_list, &nr_zapped);
2562 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
2563 struct list_head *invalid_list)
2565 struct kvm_mmu_page *sp, *nsp;
2567 if (list_empty(invalid_list))
2571 * We need to make sure everyone sees our modifications to
2572 * the page tables and see changes to vcpu->mode here. The barrier
2573 * in the kvm_flush_remote_tlbs() achieves this. This pairs
2574 * with vcpu_enter_guest and walk_shadow_page_lockless_begin/end.
2576 * In addition, kvm_flush_remote_tlbs waits for all vcpus to exit
2577 * guest mode and/or lockless shadow page table walks.
2579 kvm_flush_remote_tlbs(kvm);
2581 list_for_each_entry_safe(sp, nsp, invalid_list, link) {
2582 WARN_ON(!sp->role.invalid || sp->root_count);
2583 kvm_mmu_free_shadow_page(sp);
2587 static unsigned long kvm_mmu_zap_oldest_mmu_pages(struct kvm *kvm,
2588 unsigned long nr_to_zap)
2590 unsigned long total_zapped = 0;
2591 struct kvm_mmu_page *sp, *tmp;
2592 LIST_HEAD(invalid_list);
2596 if (list_empty(&kvm->arch.active_mmu_pages))
2600 list_for_each_entry_safe_reverse(sp, tmp, &kvm->arch.active_mmu_pages, link) {
2602 * Don't zap active root pages, the page itself can't be freed
2603 * and zapping it will just force vCPUs to realloc and reload.
2608 unstable = __kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list,
2610 total_zapped += nr_zapped;
2611 if (total_zapped >= nr_to_zap)
2618 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2620 kvm->stat.mmu_recycled += total_zapped;
2621 return total_zapped;
2624 static inline unsigned long kvm_mmu_available_pages(struct kvm *kvm)
2626 if (kvm->arch.n_max_mmu_pages > kvm->arch.n_used_mmu_pages)
2627 return kvm->arch.n_max_mmu_pages -
2628 kvm->arch.n_used_mmu_pages;
2633 static int make_mmu_pages_available(struct kvm_vcpu *vcpu)
2635 unsigned long avail = kvm_mmu_available_pages(vcpu->kvm);
2637 if (likely(avail >= KVM_MIN_FREE_MMU_PAGES))
2640 kvm_mmu_zap_oldest_mmu_pages(vcpu->kvm, KVM_REFILL_PAGES - avail);
2643 * Note, this check is intentionally soft, it only guarantees that one
2644 * page is available, while the caller may end up allocating as many as
2645 * four pages, e.g. for PAE roots or for 5-level paging. Temporarily
2646 * exceeding the (arbitrary by default) limit will not harm the host,
2647 * being too aggressive may unnecessarily kill the guest, and getting an
2648 * exact count is far more trouble than it's worth, especially in the
2651 if (!kvm_mmu_available_pages(vcpu->kvm))
2657 * Changing the number of mmu pages allocated to the vm
2658 * Note: if goal_nr_mmu_pages is too small, you will get dead lock
2660 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long goal_nr_mmu_pages)
2662 write_lock(&kvm->mmu_lock);
2664 if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
2665 kvm_mmu_zap_oldest_mmu_pages(kvm, kvm->arch.n_used_mmu_pages -
2668 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
2671 kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
2673 write_unlock(&kvm->mmu_lock);
2676 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
2678 struct kvm_mmu_page *sp;
2679 LIST_HEAD(invalid_list);
2682 pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
2684 write_lock(&kvm->mmu_lock);
2685 for_each_gfn_valid_sp_with_gptes(kvm, sp, gfn) {
2686 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
2689 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
2691 kvm_mmu_commit_zap_page(kvm, &invalid_list);
2692 write_unlock(&kvm->mmu_lock);
2697 static int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2702 if (vcpu->arch.mmu->root_role.direct)
2705 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2707 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2712 static void kvm_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
2714 trace_kvm_mmu_unsync_page(sp);
2715 ++kvm->stat.mmu_unsync;
2718 kvm_mmu_mark_parents_unsync(sp);
2722 * Attempt to unsync any shadow pages that can be reached by the specified gfn,
2723 * KVM is creating a writable mapping for said gfn. Returns 0 if all pages
2724 * were marked unsync (or if there is no shadow page), -EPERM if the SPTE must
2725 * be write-protected.
2727 int mmu_try_to_unsync_pages(struct kvm *kvm, const struct kvm_memory_slot *slot,
2728 gfn_t gfn, bool can_unsync, bool prefetch)
2730 struct kvm_mmu_page *sp;
2731 bool locked = false;
2734 * Force write-protection if the page is being tracked. Note, the page
2735 * track machinery is used to write-protect upper-level shadow pages,
2736 * i.e. this guards the role.level == 4K assertion below!
2738 if (kvm_slot_page_track_is_active(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE))
2742 * The page is not write-tracked, mark existing shadow pages unsync
2743 * unless KVM is synchronizing an unsync SP (can_unsync = false). In
2744 * that case, KVM must complete emulation of the guest TLB flush before
2745 * allowing shadow pages to become unsync (writable by the guest).
2747 for_each_gfn_valid_sp_with_gptes(kvm, sp, gfn) {
2758 * TDP MMU page faults require an additional spinlock as they
2759 * run with mmu_lock held for read, not write, and the unsync
2760 * logic is not thread safe. Take the spinklock regardless of
2761 * the MMU type to avoid extra conditionals/parameters, there's
2762 * no meaningful penalty if mmu_lock is held for write.
2766 spin_lock(&kvm->arch.mmu_unsync_pages_lock);
2769 * Recheck after taking the spinlock, a different vCPU
2770 * may have since marked the page unsync. A false
2771 * positive on the unprotected check above is not
2772 * possible as clearing sp->unsync _must_ hold mmu_lock
2773 * for write, i.e. unsync cannot transition from 0->1
2774 * while this CPU holds mmu_lock for read (or write).
2776 if (READ_ONCE(sp->unsync))
2780 WARN_ON(sp->role.level != PG_LEVEL_4K);
2781 kvm_unsync_page(kvm, sp);
2784 spin_unlock(&kvm->arch.mmu_unsync_pages_lock);
2787 * We need to ensure that the marking of unsync pages is visible
2788 * before the SPTE is updated to allow writes because
2789 * kvm_mmu_sync_roots() checks the unsync flags without holding
2790 * the MMU lock and so can race with this. If the SPTE was updated
2791 * before the page had been marked as unsync-ed, something like the
2792 * following could happen:
2795 * ---------------------------------------------------------------------
2796 * 1.2 Host updates SPTE
2798 * 2.1 Guest writes a GPTE for GVA X.
2799 * (GPTE being in the guest page table shadowed
2800 * by the SP from CPU 1.)
2801 * This reads SPTE during the page table walk.
2802 * Since SPTE.W is read as 1, there is no
2805 * 2.2 Guest issues TLB flush.
2806 * That causes a VM Exit.
2808 * 2.3 Walking of unsync pages sees sp->unsync is
2809 * false and skips the page.
2811 * 2.4 Guest accesses GVA X.
2812 * Since the mapping in the SP was not updated,
2813 * so the old mapping for GVA X incorrectly
2817 * (sp->unsync = true)
2819 * The write barrier below ensures that 1.1 happens before 1.2 and thus
2820 * the situation in 2.4 does not arise. It pairs with the read barrier
2821 * in is_unsync_root(), placed between 2.1's load of SPTE.W and 2.3.
2828 static int mmu_set_spte(struct kvm_vcpu *vcpu, struct kvm_memory_slot *slot,
2829 u64 *sptep, unsigned int pte_access, gfn_t gfn,
2830 kvm_pfn_t pfn, struct kvm_page_fault *fault)
2832 struct kvm_mmu_page *sp = sptep_to_sp(sptep);
2833 int level = sp->role.level;
2834 int was_rmapped = 0;
2835 int ret = RET_PF_FIXED;
2840 /* Prefetching always gets a writable pfn. */
2841 bool host_writable = !fault || fault->map_writable;
2842 bool prefetch = !fault || fault->prefetch;
2843 bool write_fault = fault && fault->write;
2845 pgprintk("%s: spte %llx write_fault %d gfn %llx\n", __func__,
2846 *sptep, write_fault, gfn);
2848 if (unlikely(is_noslot_pfn(pfn))) {
2849 vcpu->stat.pf_mmio_spte_created++;
2850 mark_mmio_spte(vcpu, sptep, gfn, pte_access);
2851 return RET_PF_EMULATE;
2854 if (is_shadow_present_pte(*sptep)) {
2856 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2857 * the parent of the now unreachable PTE.
2859 if (level > PG_LEVEL_4K && !is_large_pte(*sptep)) {
2860 struct kvm_mmu_page *child;
2863 child = spte_to_child_sp(pte);
2864 drop_parent_pte(child, sptep);
2866 } else if (pfn != spte_to_pfn(*sptep)) {
2867 pgprintk("hfn old %llx new %llx\n",
2868 spte_to_pfn(*sptep), pfn);
2869 drop_spte(vcpu->kvm, sptep);
2875 wrprot = make_spte(vcpu, sp, slot, pte_access, gfn, pfn, *sptep, prefetch,
2876 true, host_writable, &spte);
2878 if (*sptep == spte) {
2879 ret = RET_PF_SPURIOUS;
2881 flush |= mmu_spte_update(sptep, spte);
2882 trace_kvm_mmu_set_spte(level, gfn, sptep);
2887 ret = RET_PF_EMULATE;
2891 kvm_flush_remote_tlbs_with_address(vcpu->kvm, gfn,
2892 KVM_PAGES_PER_HPAGE(level));
2894 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2897 WARN_ON_ONCE(ret == RET_PF_SPURIOUS);
2898 rmap_add(vcpu, slot, sptep, gfn, pte_access);
2900 /* Already rmapped but the pte_access bits may have changed. */
2901 kvm_mmu_page_set_access(sp, spte_index(sptep), pte_access);
2907 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2908 struct kvm_mmu_page *sp,
2909 u64 *start, u64 *end)
2911 struct page *pages[PTE_PREFETCH_NUM];
2912 struct kvm_memory_slot *slot;
2913 unsigned int access = sp->role.access;
2917 gfn = kvm_mmu_page_get_gfn(sp, spte_index(start));
2918 slot = gfn_to_memslot_dirty_bitmap(vcpu, gfn, access & ACC_WRITE_MASK);
2922 ret = gfn_to_page_many_atomic(slot, gfn, pages, end - start);
2926 for (i = 0; i < ret; i++, gfn++, start++) {
2927 mmu_set_spte(vcpu, slot, start, access, gfn,
2928 page_to_pfn(pages[i]), NULL);
2935 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2936 struct kvm_mmu_page *sp, u64 *sptep)
2938 u64 *spte, *start = NULL;
2941 WARN_ON(!sp->role.direct);
2943 i = spte_index(sptep) & ~(PTE_PREFETCH_NUM - 1);
2946 for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2947 if (is_shadow_present_pte(*spte) || spte == sptep) {
2950 if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2957 direct_pte_prefetch_many(vcpu, sp, start, spte);
2960 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2962 struct kvm_mmu_page *sp;
2964 sp = sptep_to_sp(sptep);
2967 * Without accessed bits, there's no way to distinguish between
2968 * actually accessed translations and prefetched, so disable pte
2969 * prefetch if accessed bits aren't available.
2971 if (sp_ad_disabled(sp))
2974 if (sp->role.level > PG_LEVEL_4K)
2978 * If addresses are being invalidated, skip prefetching to avoid
2979 * accidentally prefetching those addresses.
2981 if (unlikely(vcpu->kvm->mmu_invalidate_in_progress))
2984 __direct_pte_prefetch(vcpu, sp, sptep);
2988 * Lookup the mapping level for @gfn in the current mm.
2990 * WARNING! Use of host_pfn_mapping_level() requires the caller and the end
2991 * consumer to be tied into KVM's handlers for MMU notifier events!
2993 * There are several ways to safely use this helper:
2995 * - Check mmu_invalidate_retry_hva() after grabbing the mapping level, before
2996 * consuming it. In this case, mmu_lock doesn't need to be held during the
2997 * lookup, but it does need to be held while checking the MMU notifier.
2999 * - Hold mmu_lock AND ensure there is no in-progress MMU notifier invalidation
3000 * event for the hva. This can be done by explicit checking the MMU notifier
3001 * or by ensuring that KVM already has a valid mapping that covers the hva.
3003 * - Do not use the result to install new mappings, e.g. use the host mapping
3004 * level only to decide whether or not to zap an entry. In this case, it's
3005 * not required to hold mmu_lock (though it's highly likely the caller will
3006 * want to hold mmu_lock anyways, e.g. to modify SPTEs).
3008 * Note! The lookup can still race with modifications to host page tables, but
3009 * the above "rules" ensure KVM will not _consume_ the result of the walk if a
3010 * race with the primary MMU occurs.
3012 static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn,
3013 const struct kvm_memory_slot *slot)
3015 int level = PG_LEVEL_4K;
3017 unsigned long flags;
3024 * Note, using the already-retrieved memslot and __gfn_to_hva_memslot()
3025 * is not solely for performance, it's also necessary to avoid the
3026 * "writable" check in __gfn_to_hva_many(), which will always fail on
3027 * read-only memslots due to gfn_to_hva() assuming writes. Earlier
3028 * page fault steps have already verified the guest isn't writing a
3029 * read-only memslot.
3031 hva = __gfn_to_hva_memslot(slot, gfn);
3034 * Disable IRQs to prevent concurrent tear down of host page tables,
3035 * e.g. if the primary MMU promotes a P*D to a huge page and then frees
3036 * the original page table.
3038 local_irq_save(flags);
3041 * Read each entry once. As above, a non-leaf entry can be promoted to
3042 * a huge page _during_ this walk. Re-reading the entry could send the
3043 * walk into the weeks, e.g. p*d_large() returns false (sees the old
3044 * value) and then p*d_offset() walks into the target huge page instead
3045 * of the old page table (sees the new value).
3047 pgd = READ_ONCE(*pgd_offset(kvm->mm, hva));
3051 p4d = READ_ONCE(*p4d_offset(&pgd, hva));
3052 if (p4d_none(p4d) || !p4d_present(p4d))
3055 pud = READ_ONCE(*pud_offset(&p4d, hva));
3056 if (pud_none(pud) || !pud_present(pud))
3059 if (pud_large(pud)) {
3060 level = PG_LEVEL_1G;
3064 pmd = READ_ONCE(*pmd_offset(&pud, hva));
3065 if (pmd_none(pmd) || !pmd_present(pmd))
3069 level = PG_LEVEL_2M;
3072 local_irq_restore(flags);
3076 int kvm_mmu_max_mapping_level(struct kvm *kvm,
3077 const struct kvm_memory_slot *slot, gfn_t gfn,
3080 struct kvm_lpage_info *linfo;
3083 max_level = min(max_level, max_huge_page_level);
3084 for ( ; max_level > PG_LEVEL_4K; max_level--) {
3085 linfo = lpage_info_slot(gfn, slot, max_level);
3086 if (!linfo->disallow_lpage)
3090 if (max_level == PG_LEVEL_4K)
3093 host_level = host_pfn_mapping_level(kvm, gfn, slot);
3094 return min(host_level, max_level);
3097 void kvm_mmu_hugepage_adjust(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3099 struct kvm_memory_slot *slot = fault->slot;
3102 fault->huge_page_disallowed = fault->exec && fault->nx_huge_page_workaround_enabled;
3104 if (unlikely(fault->max_level == PG_LEVEL_4K))
3107 if (is_error_noslot_pfn(fault->pfn))
3110 if (kvm_slot_dirty_track_enabled(slot))
3114 * Enforce the iTLB multihit workaround after capturing the requested
3115 * level, which will be used to do precise, accurate accounting.
3117 fault->req_level = kvm_mmu_max_mapping_level(vcpu->kvm, slot,
3118 fault->gfn, fault->max_level);
3119 if (fault->req_level == PG_LEVEL_4K || fault->huge_page_disallowed)
3123 * mmu_invalidate_retry() was successful and mmu_lock is held, so
3124 * the pmd can't be split from under us.
3126 fault->goal_level = fault->req_level;
3127 mask = KVM_PAGES_PER_HPAGE(fault->goal_level) - 1;
3128 VM_BUG_ON((fault->gfn & mask) != (fault->pfn & mask));
3129 fault->pfn &= ~mask;
3132 void disallowed_hugepage_adjust(struct kvm_page_fault *fault, u64 spte, int cur_level)
3134 if (cur_level > PG_LEVEL_4K &&
3135 cur_level == fault->goal_level &&
3136 is_shadow_present_pte(spte) &&
3137 !is_large_pte(spte) &&
3138 spte_to_child_sp(spte)->nx_huge_page_disallowed) {
3140 * A small SPTE exists for this pfn, but FNAME(fetch),
3141 * direct_map(), or kvm_tdp_mmu_map() would like to create a
3142 * large PTE instead: just force them to go down another level,
3143 * patching back for them into pfn the next 9 bits of the
3146 u64 page_mask = KVM_PAGES_PER_HPAGE(cur_level) -
3147 KVM_PAGES_PER_HPAGE(cur_level - 1);
3148 fault->pfn |= fault->gfn & page_mask;
3149 fault->goal_level--;
3153 static int direct_map(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3155 struct kvm_shadow_walk_iterator it;
3156 struct kvm_mmu_page *sp;
3158 gfn_t base_gfn = fault->gfn;
3160 kvm_mmu_hugepage_adjust(vcpu, fault);
3162 trace_kvm_mmu_spte_requested(fault);
3163 for_each_shadow_entry(vcpu, fault->addr, it) {
3165 * We cannot overwrite existing page tables with an NX
3166 * large page, as the leaf could be executable.
3168 if (fault->nx_huge_page_workaround_enabled)
3169 disallowed_hugepage_adjust(fault, *it.sptep, it.level);
3171 base_gfn = fault->gfn & ~(KVM_PAGES_PER_HPAGE(it.level) - 1);
3172 if (it.level == fault->goal_level)
3175 sp = kvm_mmu_get_child_sp(vcpu, it.sptep, base_gfn, true, ACC_ALL);
3176 if (sp == ERR_PTR(-EEXIST))
3179 link_shadow_page(vcpu, it.sptep, sp);
3180 if (fault->huge_page_disallowed)
3181 account_nx_huge_page(vcpu->kvm, sp,
3182 fault->req_level >= it.level);
3185 if (WARN_ON_ONCE(it.level != fault->goal_level))
3188 ret = mmu_set_spte(vcpu, fault->slot, it.sptep, ACC_ALL,
3189 base_gfn, fault->pfn, fault);
3190 if (ret == RET_PF_SPURIOUS)
3193 direct_pte_prefetch(vcpu, it.sptep);
3197 static void kvm_send_hwpoison_signal(struct kvm_memory_slot *slot, gfn_t gfn)
3199 unsigned long hva = gfn_to_hva_memslot(slot, gfn);
3201 send_sig_mceerr(BUS_MCEERR_AR, (void __user *)hva, PAGE_SHIFT, current);
3204 static int kvm_handle_error_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3206 if (is_sigpending_pfn(fault->pfn)) {
3207 kvm_handle_signal_exit(vcpu);
3212 * Do not cache the mmio info caused by writing the readonly gfn
3213 * into the spte otherwise read access on readonly gfn also can
3214 * caused mmio page fault and treat it as mmio access.
3216 if (fault->pfn == KVM_PFN_ERR_RO_FAULT)
3217 return RET_PF_EMULATE;
3219 if (fault->pfn == KVM_PFN_ERR_HWPOISON) {
3220 kvm_send_hwpoison_signal(fault->slot, fault->gfn);
3221 return RET_PF_RETRY;
3227 static int kvm_handle_noslot_fault(struct kvm_vcpu *vcpu,
3228 struct kvm_page_fault *fault,
3229 unsigned int access)
3231 gva_t gva = fault->is_tdp ? 0 : fault->addr;
3233 vcpu_cache_mmio_info(vcpu, gva, fault->gfn,
3234 access & shadow_mmio_access_mask);
3237 * If MMIO caching is disabled, emulate immediately without
3238 * touching the shadow page tables as attempting to install an
3239 * MMIO SPTE will just be an expensive nop.
3241 if (unlikely(!enable_mmio_caching))
3242 return RET_PF_EMULATE;
3245 * Do not create an MMIO SPTE for a gfn greater than host.MAXPHYADDR,
3246 * any guest that generates such gfns is running nested and is being
3247 * tricked by L0 userspace (you can observe gfn > L1.MAXPHYADDR if and
3248 * only if L1's MAXPHYADDR is inaccurate with respect to the
3251 if (unlikely(fault->gfn > kvm_mmu_max_gfn()))
3252 return RET_PF_EMULATE;
3254 return RET_PF_CONTINUE;
3257 static bool page_fault_can_be_fast(struct kvm_page_fault *fault)
3260 * Page faults with reserved bits set, i.e. faults on MMIO SPTEs, only
3261 * reach the common page fault handler if the SPTE has an invalid MMIO
3262 * generation number. Refreshing the MMIO generation needs to go down
3263 * the slow path. Note, EPT Misconfigs do NOT set the PRESENT flag!
3269 * #PF can be fast if:
3271 * 1. The shadow page table entry is not present and A/D bits are
3272 * disabled _by KVM_, which could mean that the fault is potentially
3273 * caused by access tracking (if enabled). If A/D bits are enabled
3274 * by KVM, but disabled by L1 for L2, KVM is forced to disable A/D
3275 * bits for L2 and employ access tracking, but the fast page fault
3276 * mechanism only supports direct MMUs.
3277 * 2. The shadow page table entry is present, the access is a write,
3278 * and no reserved bits are set (MMIO SPTEs cannot be "fixed"), i.e.
3279 * the fault was caused by a write-protection violation. If the
3280 * SPTE is MMU-writable (determined later), the fault can be fixed
3281 * by setting the Writable bit, which can be done out of mmu_lock.
3283 if (!fault->present)
3284 return !kvm_ad_enabled();
3287 * Note, instruction fetches and writes are mutually exclusive, ignore
3290 return fault->write;
3294 * Returns true if the SPTE was fixed successfully. Otherwise,
3295 * someone else modified the SPTE from its original value.
3298 fast_pf_fix_direct_spte(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault,
3299 u64 *sptep, u64 old_spte, u64 new_spte)
3302 * Theoretically we could also set dirty bit (and flush TLB) here in
3303 * order to eliminate unnecessary PML logging. See comments in
3304 * set_spte. But fast_page_fault is very unlikely to happen with PML
3305 * enabled, so we do not do this. This might result in the same GPA
3306 * to be logged in PML buffer again when the write really happens, and
3307 * eventually to be called by mark_page_dirty twice. But it's also no
3308 * harm. This also avoids the TLB flush needed after setting dirty bit
3309 * so non-PML cases won't be impacted.
3311 * Compare with set_spte where instead shadow_dirty_mask is set.
3313 if (!try_cmpxchg64(sptep, &old_spte, new_spte))
3316 if (is_writable_pte(new_spte) && !is_writable_pte(old_spte))
3317 mark_page_dirty_in_slot(vcpu->kvm, fault->slot, fault->gfn);
3322 static bool is_access_allowed(struct kvm_page_fault *fault, u64 spte)
3325 return is_executable_pte(spte);
3328 return is_writable_pte(spte);
3330 /* Fault was on Read access */
3331 return spte & PT_PRESENT_MASK;
3335 * Returns the last level spte pointer of the shadow page walk for the given
3336 * gpa, and sets *spte to the spte value. This spte may be non-preset. If no
3337 * walk could be performed, returns NULL and *spte does not contain valid data.
3340 * - Must be called between walk_shadow_page_lockless_{begin,end}.
3341 * - The returned sptep must not be used after walk_shadow_page_lockless_end.
3343 static u64 *fast_pf_get_last_sptep(struct kvm_vcpu *vcpu, gpa_t gpa, u64 *spte)
3345 struct kvm_shadow_walk_iterator iterator;
3349 for_each_shadow_entry_lockless(vcpu, gpa, iterator, old_spte) {
3350 sptep = iterator.sptep;
3358 * Returns one of RET_PF_INVALID, RET_PF_FIXED or RET_PF_SPURIOUS.
3360 static int fast_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
3362 struct kvm_mmu_page *sp;
3363 int ret = RET_PF_INVALID;
3366 uint retry_count = 0;
3368 if (!page_fault_can_be_fast(fault))
3371 walk_shadow_page_lockless_begin(vcpu);
3376 if (tdp_mmu_enabled)
3377 sptep = kvm_tdp_mmu_fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3379 sptep = fast_pf_get_last_sptep(vcpu, fault->addr, &spte);
3381 if (!is_shadow_present_pte(spte))
3384 sp = sptep_to_sp(sptep);
3385 if (!is_last_spte(spte, sp->role.level))
3389 * Check whether the memory access that caused the fault would
3390 * still cause it if it were to be performed right now. If not,
3391 * then this is a spurious fault caused by TLB lazily flushed,
3392 * or some other CPU has already fixed the PTE after the
3393 * current CPU took the fault.
3395 * Need not check the access of upper level table entries since
3396 * they are always ACC_ALL.
3398 if (is_access_allowed(fault, spte)) {
3399 ret = RET_PF_SPURIOUS;
3406 * KVM only supports fixing page faults outside of MMU lock for
3407 * direct MMUs, nested MMUs are always indirect, and KVM always
3408 * uses A/D bits for non-nested MMUs. Thus, if A/D bits are
3409 * enabled, the SPTE can't be an access-tracked SPTE.
3411 if (unlikely(!kvm_ad_enabled()) && is_access_track_spte(spte))
3412 new_spte = restore_acc_track_spte(new_spte);
3415 * To keep things simple, only SPTEs that are MMU-writable can
3416 * be made fully writable outside of mmu_lock, e.g. only SPTEs
3417 * that were write-protected for dirty-logging or access
3418 * tracking are handled here. Don't bother checking if the
3419 * SPTE is writable to prioritize running with A/D bits enabled.
3420 * The is_access_allowed() check above handles the common case
3421 * of the fault being spurious, and the SPTE is known to be
3422 * shadow-present, i.e. except for access tracking restoration
3423 * making the new SPTE writable, the check is wasteful.
3425 if (fault->write && is_mmu_writable_spte(spte)) {
3426 new_spte |= PT_WRITABLE_MASK;
3429 * Do not fix write-permission on the large spte when
3430 * dirty logging is enabled. Since we only dirty the
3431 * first page into the dirty-bitmap in
3432 * fast_pf_fix_direct_spte(), other pages are missed
3433 * if its slot has dirty logging enabled.
3435 * Instead, we let the slow page fault path create a
3436 * normal spte to fix the access.
3438 if (sp->role.level > PG_LEVEL_4K &&
3439 kvm_slot_dirty_track_enabled(fault->slot))
3443 /* Verify that the fault can be handled in the fast path */
3444 if (new_spte == spte ||
3445 !is_access_allowed(fault, new_spte))
3449 * Currently, fast page fault only works for direct mapping
3450 * since the gfn is not stable for indirect shadow page. See
3451 * Documentation/virt/kvm/locking.rst to get more detail.
3453 if (fast_pf_fix_direct_spte(vcpu, fault, sptep, spte, new_spte)) {
3458 if (++retry_count > 4) {
3459 printk_once(KERN_WARNING
3460 "kvm: Fast #PF retrying more than 4 times.\n");
3466 trace_fast_page_fault(vcpu, fault, sptep, spte, ret);
3467 walk_shadow_page_lockless_end(vcpu);
3469 if (ret != RET_PF_INVALID)
3470 vcpu->stat.pf_fast++;
3475 static void mmu_free_root_page(struct kvm *kvm, hpa_t *root_hpa,
3476 struct list_head *invalid_list)
3478 struct kvm_mmu_page *sp;
3480 if (!VALID_PAGE(*root_hpa))
3484 * The "root" may be a special root, e.g. a PAE entry, treat it as a
3485 * SPTE to ensure any non-PA bits are dropped.
3487 sp = spte_to_child_sp(*root_hpa);
3491 if (is_tdp_mmu_page(sp))
3492 kvm_tdp_mmu_put_root(kvm, sp, false);
3493 else if (!--sp->root_count && sp->role.invalid)
3494 kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
3496 *root_hpa = INVALID_PAGE;
3499 /* roots_to_free must be some combination of the KVM_MMU_ROOT_* flags */
3500 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
3501 ulong roots_to_free)
3504 LIST_HEAD(invalid_list);
3505 bool free_active_root;
3507 BUILD_BUG_ON(KVM_MMU_NUM_PREV_ROOTS >= BITS_PER_LONG);
3509 /* Before acquiring the MMU lock, see if we need to do any real work. */
3510 free_active_root = (roots_to_free & KVM_MMU_ROOT_CURRENT)
3511 && VALID_PAGE(mmu->root.hpa);
3513 if (!free_active_root) {
3514 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3515 if ((roots_to_free & KVM_MMU_ROOT_PREVIOUS(i)) &&
3516 VALID_PAGE(mmu->prev_roots[i].hpa))
3519 if (i == KVM_MMU_NUM_PREV_ROOTS)
3523 write_lock(&kvm->mmu_lock);
3525 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3526 if (roots_to_free & KVM_MMU_ROOT_PREVIOUS(i))
3527 mmu_free_root_page(kvm, &mmu->prev_roots[i].hpa,
3530 if (free_active_root) {
3531 if (to_shadow_page(mmu->root.hpa)) {
3532 mmu_free_root_page(kvm, &mmu->root.hpa, &invalid_list);
3533 } else if (mmu->pae_root) {
3534 for (i = 0; i < 4; ++i) {
3535 if (!IS_VALID_PAE_ROOT(mmu->pae_root[i]))
3538 mmu_free_root_page(kvm, &mmu->pae_root[i],
3540 mmu->pae_root[i] = INVALID_PAE_ROOT;
3543 mmu->root.hpa = INVALID_PAGE;
3547 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3548 write_unlock(&kvm->mmu_lock);
3550 EXPORT_SYMBOL_GPL(kvm_mmu_free_roots);
3552 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu)
3554 unsigned long roots_to_free = 0;
3559 * This should not be called while L2 is active, L2 can't invalidate
3560 * _only_ its own roots, e.g. INVVPID unconditionally exits.
3562 WARN_ON_ONCE(mmu->root_role.guest_mode);
3564 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
3565 root_hpa = mmu->prev_roots[i].hpa;
3566 if (!VALID_PAGE(root_hpa))
3569 if (!to_shadow_page(root_hpa) ||
3570 to_shadow_page(root_hpa)->role.guest_mode)
3571 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
3574 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
3576 EXPORT_SYMBOL_GPL(kvm_mmu_free_guest_mode_roots);
3579 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
3583 if (!kvm_vcpu_is_visible_gfn(vcpu, root_gfn)) {
3584 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3591 static hpa_t mmu_alloc_root(struct kvm_vcpu *vcpu, gfn_t gfn, int quadrant,
3594 union kvm_mmu_page_role role = vcpu->arch.mmu->root_role;
3595 struct kvm_mmu_page *sp;
3598 role.quadrant = quadrant;
3600 WARN_ON_ONCE(quadrant && !role.has_4_byte_gpte);
3601 WARN_ON_ONCE(role.direct && role.has_4_byte_gpte);
3603 sp = kvm_mmu_get_shadow_page(vcpu, gfn, role);
3606 return __pa(sp->spt);
3609 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
3611 struct kvm_mmu *mmu = vcpu->arch.mmu;
3612 u8 shadow_root_level = mmu->root_role.level;
3617 write_lock(&vcpu->kvm->mmu_lock);
3618 r = make_mmu_pages_available(vcpu);
3622 if (tdp_mmu_enabled) {
3623 root = kvm_tdp_mmu_get_vcpu_root_hpa(vcpu);
3624 mmu->root.hpa = root;
3625 } else if (shadow_root_level >= PT64_ROOT_4LEVEL) {
3626 root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level);
3627 mmu->root.hpa = root;
3628 } else if (shadow_root_level == PT32E_ROOT_LEVEL) {
3629 if (WARN_ON_ONCE(!mmu->pae_root)) {
3634 for (i = 0; i < 4; ++i) {
3635 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3637 root = mmu_alloc_root(vcpu, i << (30 - PAGE_SHIFT), 0,
3639 mmu->pae_root[i] = root | PT_PRESENT_MASK |
3642 mmu->root.hpa = __pa(mmu->pae_root);
3644 WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level);
3649 /* root.pgd is ignored for direct MMUs. */
3652 write_unlock(&vcpu->kvm->mmu_lock);
3656 static int mmu_first_shadow_root_alloc(struct kvm *kvm)
3658 struct kvm_memslots *slots;
3659 struct kvm_memory_slot *slot;
3663 * Check if this is the first shadow root being allocated before
3666 if (kvm_shadow_root_allocated(kvm))
3669 mutex_lock(&kvm->slots_arch_lock);
3671 /* Recheck, under the lock, whether this is the first shadow root. */
3672 if (kvm_shadow_root_allocated(kvm))
3676 * Check if anything actually needs to be allocated, e.g. all metadata
3677 * will be allocated upfront if TDP is disabled.
3679 if (kvm_memslots_have_rmaps(kvm) &&
3680 kvm_page_track_write_tracking_enabled(kvm))
3683 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
3684 slots = __kvm_memslots(kvm, i);
3685 kvm_for_each_memslot(slot, bkt, slots) {
3687 * Both of these functions are no-ops if the target is
3688 * already allocated, so unconditionally calling both
3689 * is safe. Intentionally do NOT free allocations on
3690 * failure to avoid having to track which allocations
3691 * were made now versus when the memslot was created.
3692 * The metadata is guaranteed to be freed when the slot
3693 * is freed, and will be kept/used if userspace retries
3694 * KVM_RUN instead of killing the VM.
3696 r = memslot_rmap_alloc(slot, slot->npages);
3699 r = kvm_page_track_write_tracking_alloc(slot);
3706 * Ensure that shadow_root_allocated becomes true strictly after
3707 * all the related pointers are set.
3710 smp_store_release(&kvm->arch.shadow_root_allocated, true);
3713 mutex_unlock(&kvm->slots_arch_lock);
3717 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
3719 struct kvm_mmu *mmu = vcpu->arch.mmu;
3720 u64 pdptrs[4], pm_mask;
3721 gfn_t root_gfn, root_pgd;
3725 root_pgd = mmu->get_guest_pgd(vcpu);
3726 root_gfn = root_pgd >> PAGE_SHIFT;
3728 if (mmu_check_root(vcpu, root_gfn))
3732 * On SVM, reading PDPTRs might access guest memory, which might fault
3733 * and thus might sleep. Grab the PDPTRs before acquiring mmu_lock.
3735 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3736 for (i = 0; i < 4; ++i) {
3737 pdptrs[i] = mmu->get_pdptr(vcpu, i);
3738 if (!(pdptrs[i] & PT_PRESENT_MASK))
3741 if (mmu_check_root(vcpu, pdptrs[i] >> PAGE_SHIFT))
3746 r = mmu_first_shadow_root_alloc(vcpu->kvm);
3750 write_lock(&vcpu->kvm->mmu_lock);
3751 r = make_mmu_pages_available(vcpu);
3756 * Do we shadow a long mode page table? If so we need to
3757 * write-protect the guests page table root.
3759 if (mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
3760 root = mmu_alloc_root(vcpu, root_gfn, 0,
3761 mmu->root_role.level);
3762 mmu->root.hpa = root;
3766 if (WARN_ON_ONCE(!mmu->pae_root)) {
3772 * We shadow a 32 bit page table. This may be a legacy 2-level
3773 * or a PAE 3-level page table. In either case we need to be aware that
3774 * the shadow page table may be a PAE or a long mode page table.
3776 pm_mask = PT_PRESENT_MASK | shadow_me_value;
3777 if (mmu->root_role.level >= PT64_ROOT_4LEVEL) {
3778 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
3780 if (WARN_ON_ONCE(!mmu->pml4_root)) {
3784 mmu->pml4_root[0] = __pa(mmu->pae_root) | pm_mask;
3786 if (mmu->root_role.level == PT64_ROOT_5LEVEL) {
3787 if (WARN_ON_ONCE(!mmu->pml5_root)) {
3791 mmu->pml5_root[0] = __pa(mmu->pml4_root) | pm_mask;
3795 for (i = 0; i < 4; ++i) {
3796 WARN_ON_ONCE(IS_VALID_PAE_ROOT(mmu->pae_root[i]));
3798 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) {
3799 if (!(pdptrs[i] & PT_PRESENT_MASK)) {
3800 mmu->pae_root[i] = INVALID_PAE_ROOT;
3803 root_gfn = pdptrs[i] >> PAGE_SHIFT;
3807 * If shadowing 32-bit non-PAE page tables, each PAE page
3808 * directory maps one quarter of the guest's non-PAE page
3809 * directory. Othwerise each PAE page direct shadows one guest
3810 * PAE page directory so that quadrant should be 0.
3812 quadrant = (mmu->cpu_role.base.level == PT32_ROOT_LEVEL) ? i : 0;
3814 root = mmu_alloc_root(vcpu, root_gfn, quadrant, PT32_ROOT_LEVEL);
3815 mmu->pae_root[i] = root | pm_mask;
3818 if (mmu->root_role.level == PT64_ROOT_5LEVEL)
3819 mmu->root.hpa = __pa(mmu->pml5_root);
3820 else if (mmu->root_role.level == PT64_ROOT_4LEVEL)
3821 mmu->root.hpa = __pa(mmu->pml4_root);
3823 mmu->root.hpa = __pa(mmu->pae_root);
3826 mmu->root.pgd = root_pgd;
3828 write_unlock(&vcpu->kvm->mmu_lock);
3833 static int mmu_alloc_special_roots(struct kvm_vcpu *vcpu)
3835 struct kvm_mmu *mmu = vcpu->arch.mmu;
3836 bool need_pml5 = mmu->root_role.level > PT64_ROOT_4LEVEL;
3837 u64 *pml5_root = NULL;
3838 u64 *pml4_root = NULL;
3842 * When shadowing 32-bit or PAE NPT with 64-bit NPT, the PML4 and PDP
3843 * tables are allocated and initialized at root creation as there is no
3844 * equivalent level in the guest's NPT to shadow. Allocate the tables
3845 * on demand, as running a 32-bit L1 VMM on 64-bit KVM is very rare.
3847 if (mmu->root_role.direct ||
3848 mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL ||
3849 mmu->root_role.level < PT64_ROOT_4LEVEL)
3853 * NPT, the only paging mode that uses this horror, uses a fixed number
3854 * of levels for the shadow page tables, e.g. all MMUs are 4-level or
3855 * all MMus are 5-level. Thus, this can safely require that pml5_root
3856 * is allocated if the other roots are valid and pml5 is needed, as any
3857 * prior MMU would also have required pml5.
3859 if (mmu->pae_root && mmu->pml4_root && (!need_pml5 || mmu->pml5_root))
3863 * The special roots should always be allocated in concert. Yell and
3864 * bail if KVM ends up in a state where only one of the roots is valid.
3866 if (WARN_ON_ONCE(!tdp_enabled || mmu->pae_root || mmu->pml4_root ||
3867 (need_pml5 && mmu->pml5_root)))
3871 * Unlike 32-bit NPT, the PDP table doesn't need to be in low mem, and
3872 * doesn't need to be decrypted.
3874 pae_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3878 #ifdef CONFIG_X86_64
3879 pml4_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3884 pml5_root = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
3890 mmu->pae_root = pae_root;
3891 mmu->pml4_root = pml4_root;
3892 mmu->pml5_root = pml5_root;
3896 #ifdef CONFIG_X86_64
3898 free_page((unsigned long)pml4_root);
3900 free_page((unsigned long)pae_root);
3905 static bool is_unsync_root(hpa_t root)
3907 struct kvm_mmu_page *sp;
3909 if (!VALID_PAGE(root))
3913 * The read barrier orders the CPU's read of SPTE.W during the page table
3914 * walk before the reads of sp->unsync/sp->unsync_children here.
3916 * Even if another CPU was marking the SP as unsync-ed simultaneously,
3917 * any guest page table changes are not guaranteed to be visible anyway
3918 * until this VCPU issues a TLB flush strictly after those changes are
3919 * made. We only need to ensure that the other CPU sets these flags
3920 * before any actual changes to the page tables are made. The comments
3921 * in mmu_try_to_unsync_pages() describe what could go wrong if this
3922 * requirement isn't satisfied.
3925 sp = to_shadow_page(root);
3928 * PAE roots (somewhat arbitrarily) aren't backed by shadow pages, the
3929 * PDPTEs for a given PAE root need to be synchronized individually.
3931 if (WARN_ON_ONCE(!sp))
3934 if (sp->unsync || sp->unsync_children)
3940 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
3943 struct kvm_mmu_page *sp;
3945 if (vcpu->arch.mmu->root_role.direct)
3948 if (!VALID_PAGE(vcpu->arch.mmu->root.hpa))
3951 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
3953 if (vcpu->arch.mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) {
3954 hpa_t root = vcpu->arch.mmu->root.hpa;
3955 sp = to_shadow_page(root);
3957 if (!is_unsync_root(root))
3960 write_lock(&vcpu->kvm->mmu_lock);
3961 mmu_sync_children(vcpu, sp, true);
3962 write_unlock(&vcpu->kvm->mmu_lock);
3966 write_lock(&vcpu->kvm->mmu_lock);
3968 for (i = 0; i < 4; ++i) {
3969 hpa_t root = vcpu->arch.mmu->pae_root[i];
3971 if (IS_VALID_PAE_ROOT(root)) {
3972 sp = spte_to_child_sp(root);
3973 mmu_sync_children(vcpu, sp, true);
3977 write_unlock(&vcpu->kvm->mmu_lock);
3980 void kvm_mmu_sync_prev_roots(struct kvm_vcpu *vcpu)
3982 unsigned long roots_to_free = 0;
3985 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
3986 if (is_unsync_root(vcpu->arch.mmu->prev_roots[i].hpa))
3987 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
3989 /* sync prev_roots by simply freeing them */
3990 kvm_mmu_free_roots(vcpu->kvm, vcpu->arch.mmu, roots_to_free);
3993 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
3994 gpa_t vaddr, u64 access,
3995 struct x86_exception *exception)
3998 exception->error_code = 0;
3999 return kvm_translate_gpa(vcpu, mmu, vaddr, access, exception);
4002 static bool mmio_info_in_cache(struct kvm_vcpu *vcpu, u64 addr, bool direct)
4005 * A nested guest cannot use the MMIO cache if it is using nested
4006 * page tables, because cr2 is a nGPA while the cache stores GPAs.
4008 if (mmu_is_nested(vcpu))
4012 return vcpu_match_mmio_gpa(vcpu, addr);
4014 return vcpu_match_mmio_gva(vcpu, addr);
4018 * Return the level of the lowest level SPTE added to sptes.
4019 * That SPTE may be non-present.
4021 * Must be called between walk_shadow_page_lockless_{begin,end}.
4023 static int get_walk(struct kvm_vcpu *vcpu, u64 addr, u64 *sptes, int *root_level)
4025 struct kvm_shadow_walk_iterator iterator;
4029 for (shadow_walk_init(&iterator, vcpu, addr),
4030 *root_level = iterator.level;
4031 shadow_walk_okay(&iterator);
4032 __shadow_walk_next(&iterator, spte)) {
4033 leaf = iterator.level;
4034 spte = mmu_spte_get_lockless(iterator.sptep);
4042 /* return true if reserved bit(s) are detected on a valid, non-MMIO SPTE. */
4043 static bool get_mmio_spte(struct kvm_vcpu *vcpu, u64 addr, u64 *sptep)
4045 u64 sptes[PT64_ROOT_MAX_LEVEL + 1];
4046 struct rsvd_bits_validate *rsvd_check;
4047 int root, leaf, level;
4048 bool reserved = false;
4050 walk_shadow_page_lockless_begin(vcpu);
4052 if (is_tdp_mmu_active(vcpu))
4053 leaf = kvm_tdp_mmu_get_walk(vcpu, addr, sptes, &root);
4055 leaf = get_walk(vcpu, addr, sptes, &root);
4057 walk_shadow_page_lockless_end(vcpu);
4059 if (unlikely(leaf < 0)) {
4064 *sptep = sptes[leaf];
4067 * Skip reserved bits checks on the terminal leaf if it's not a valid
4068 * SPTE. Note, this also (intentionally) skips MMIO SPTEs, which, by
4069 * design, always have reserved bits set. The purpose of the checks is
4070 * to detect reserved bits on non-MMIO SPTEs. i.e. buggy SPTEs.
4072 if (!is_shadow_present_pte(sptes[leaf]))
4075 rsvd_check = &vcpu->arch.mmu->shadow_zero_check;
4077 for (level = root; level >= leaf; level--)
4078 reserved |= is_rsvd_spte(rsvd_check, sptes[level], level);
4081 pr_err("%s: reserved bits set on MMU-present spte, addr 0x%llx, hierarchy:\n",
4083 for (level = root; level >= leaf; level--)
4084 pr_err("------ spte = 0x%llx level = %d, rsvd bits = 0x%llx",
4085 sptes[level], level,
4086 get_rsvd_bits(rsvd_check, sptes[level], level));
4092 static int handle_mmio_page_fault(struct kvm_vcpu *vcpu, u64 addr, bool direct)
4097 if (mmio_info_in_cache(vcpu, addr, direct))
4098 return RET_PF_EMULATE;
4100 reserved = get_mmio_spte(vcpu, addr, &spte);
4101 if (WARN_ON(reserved))
4104 if (is_mmio_spte(spte)) {
4105 gfn_t gfn = get_mmio_spte_gfn(spte);
4106 unsigned int access = get_mmio_spte_access(spte);
4108 if (!check_mmio_spte(vcpu, spte))
4109 return RET_PF_INVALID;
4114 trace_handle_mmio_page_fault(addr, gfn, access);
4115 vcpu_cache_mmio_info(vcpu, addr, gfn, access);
4116 return RET_PF_EMULATE;
4120 * If the page table is zapped by other cpus, let CPU fault again on
4123 return RET_PF_RETRY;
4126 static bool page_fault_handle_page_track(struct kvm_vcpu *vcpu,
4127 struct kvm_page_fault *fault)
4129 if (unlikely(fault->rsvd))
4132 if (!fault->present || !fault->write)
4136 * guest is writing the page which is write tracked which can
4137 * not be fixed by page fault handler.
4139 if (kvm_slot_page_track_is_active(vcpu->kvm, fault->slot, fault->gfn, KVM_PAGE_TRACK_WRITE))
4145 static void shadow_page_table_clear_flood(struct kvm_vcpu *vcpu, gva_t addr)
4147 struct kvm_shadow_walk_iterator iterator;
4150 walk_shadow_page_lockless_begin(vcpu);
4151 for_each_shadow_entry_lockless(vcpu, addr, iterator, spte)
4152 clear_sp_write_flooding_count(iterator.sptep);
4153 walk_shadow_page_lockless_end(vcpu);
4156 static u32 alloc_apf_token(struct kvm_vcpu *vcpu)
4158 /* make sure the token value is not 0 */
4159 u32 id = vcpu->arch.apf.id;
4162 vcpu->arch.apf.id = 1;
4164 return (vcpu->arch.apf.id++ << 12) | vcpu->vcpu_id;
4167 static bool kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
4170 struct kvm_arch_async_pf arch;
4172 arch.token = alloc_apf_token(vcpu);
4174 arch.direct_map = vcpu->arch.mmu->root_role.direct;
4175 arch.cr3 = vcpu->arch.mmu->get_guest_pgd(vcpu);
4177 return kvm_setup_async_pf(vcpu, cr2_or_gpa,
4178 kvm_vcpu_gfn_to_hva(vcpu, gfn), &arch);
4181 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
4185 if ((vcpu->arch.mmu->root_role.direct != work->arch.direct_map) ||
4189 r = kvm_mmu_reload(vcpu);
4193 if (!vcpu->arch.mmu->root_role.direct &&
4194 work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
4197 kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
4200 static int __kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4202 struct kvm_memory_slot *slot = fault->slot;
4206 * Retry the page fault if the gfn hit a memslot that is being deleted
4207 * or moved. This ensures any existing SPTEs for the old memslot will
4208 * be zapped before KVM inserts a new MMIO SPTE for the gfn.
4210 if (slot && (slot->flags & KVM_MEMSLOT_INVALID))
4211 return RET_PF_RETRY;
4213 if (!kvm_is_visible_memslot(slot)) {
4214 /* Don't expose private memslots to L2. */
4215 if (is_guest_mode(vcpu)) {
4217 fault->pfn = KVM_PFN_NOSLOT;
4218 fault->map_writable = false;
4219 return RET_PF_CONTINUE;
4222 * If the APIC access page exists but is disabled, go directly
4223 * to emulation without caching the MMIO access or creating a
4224 * MMIO SPTE. That way the cache doesn't need to be purged
4225 * when the AVIC is re-enabled.
4227 if (slot && slot->id == APIC_ACCESS_PAGE_PRIVATE_MEMSLOT &&
4228 !kvm_apicv_activated(vcpu->kvm))
4229 return RET_PF_EMULATE;
4233 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, false, &async,
4234 fault->write, &fault->map_writable,
4237 return RET_PF_CONTINUE; /* *pfn has correct page already */
4239 if (!fault->prefetch && kvm_can_do_async_pf(vcpu)) {
4240 trace_kvm_try_async_get_page(fault->addr, fault->gfn);
4241 if (kvm_find_async_pf_gfn(vcpu, fault->gfn)) {
4242 trace_kvm_async_pf_repeated_fault(fault->addr, fault->gfn);
4243 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
4244 return RET_PF_RETRY;
4245 } else if (kvm_arch_setup_async_pf(vcpu, fault->addr, fault->gfn)) {
4246 return RET_PF_RETRY;
4251 * Allow gup to bail on pending non-fatal signals when it's also allowed
4252 * to wait for IO. Note, gup always bails if it is unable to quickly
4253 * get a page and a fatal signal, i.e. SIGKILL, is pending.
4255 fault->pfn = __gfn_to_pfn_memslot(slot, fault->gfn, false, true, NULL,
4256 fault->write, &fault->map_writable,
4258 return RET_PF_CONTINUE;
4261 static int kvm_faultin_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault,
4262 unsigned int access)
4266 fault->mmu_seq = vcpu->kvm->mmu_invalidate_seq;
4269 ret = __kvm_faultin_pfn(vcpu, fault);
4270 if (ret != RET_PF_CONTINUE)
4273 if (unlikely(is_error_pfn(fault->pfn)))
4274 return kvm_handle_error_pfn(vcpu, fault);
4276 if (unlikely(!fault->slot))
4277 return kvm_handle_noslot_fault(vcpu, fault, access);
4279 return RET_PF_CONTINUE;
4283 * Returns true if the page fault is stale and needs to be retried, i.e. if the
4284 * root was invalidated by a memslot update or a relevant mmu_notifier fired.
4286 static bool is_page_fault_stale(struct kvm_vcpu *vcpu,
4287 struct kvm_page_fault *fault)
4289 struct kvm_mmu_page *sp = to_shadow_page(vcpu->arch.mmu->root.hpa);
4291 /* Special roots, e.g. pae_root, are not backed by shadow pages. */
4292 if (sp && is_obsolete_sp(vcpu->kvm, sp))
4296 * Roots without an associated shadow page are considered invalid if
4297 * there is a pending request to free obsolete roots. The request is
4298 * only a hint that the current root _may_ be obsolete and needs to be
4299 * reloaded, e.g. if the guest frees a PGD that KVM is tracking as a
4300 * previous root, then __kvm_mmu_prepare_zap_page() signals all vCPUs
4301 * to reload even if no vCPU is actively using the root.
4303 if (!sp && kvm_test_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
4306 return fault->slot &&
4307 mmu_invalidate_retry_hva(vcpu->kvm, fault->mmu_seq, fault->hva);
4310 static int direct_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4314 if (page_fault_handle_page_track(vcpu, fault))
4315 return RET_PF_EMULATE;
4317 r = fast_page_fault(vcpu, fault);
4318 if (r != RET_PF_INVALID)
4321 r = mmu_topup_memory_caches(vcpu, false);
4325 r = kvm_faultin_pfn(vcpu, fault, ACC_ALL);
4326 if (r != RET_PF_CONTINUE)
4330 write_lock(&vcpu->kvm->mmu_lock);
4332 if (is_page_fault_stale(vcpu, fault))
4335 r = make_mmu_pages_available(vcpu);
4339 r = direct_map(vcpu, fault);
4342 write_unlock(&vcpu->kvm->mmu_lock);
4343 kvm_release_pfn_clean(fault->pfn);
4347 static int nonpaging_page_fault(struct kvm_vcpu *vcpu,
4348 struct kvm_page_fault *fault)
4350 pgprintk("%s: gva %lx error %x\n", __func__, fault->addr, fault->error_code);
4352 /* This path builds a PAE pagetable, we can map 2mb pages at maximum. */
4353 fault->max_level = PG_LEVEL_2M;
4354 return direct_page_fault(vcpu, fault);
4357 int kvm_handle_page_fault(struct kvm_vcpu *vcpu, u64 error_code,
4358 u64 fault_address, char *insn, int insn_len)
4361 u32 flags = vcpu->arch.apf.host_apf_flags;
4363 #ifndef CONFIG_X86_64
4364 /* A 64-bit CR2 should be impossible on 32-bit KVM. */
4365 if (WARN_ON_ONCE(fault_address >> 32))
4369 vcpu->arch.l1tf_flush_l1d = true;
4371 trace_kvm_page_fault(vcpu, fault_address, error_code);
4373 if (kvm_event_needs_reinjection(vcpu))
4374 kvm_mmu_unprotect_page_virt(vcpu, fault_address);
4375 r = kvm_mmu_page_fault(vcpu, fault_address, error_code, insn,
4377 } else if (flags & KVM_PV_REASON_PAGE_NOT_PRESENT) {
4378 vcpu->arch.apf.host_apf_flags = 0;
4379 local_irq_disable();
4380 kvm_async_pf_task_wait_schedule(fault_address);
4383 WARN_ONCE(1, "Unexpected host async PF flags: %x\n", flags);
4388 EXPORT_SYMBOL_GPL(kvm_handle_page_fault);
4390 #ifdef CONFIG_X86_64
4391 static int kvm_tdp_mmu_page_fault(struct kvm_vcpu *vcpu,
4392 struct kvm_page_fault *fault)
4396 if (page_fault_handle_page_track(vcpu, fault))
4397 return RET_PF_EMULATE;
4399 r = fast_page_fault(vcpu, fault);
4400 if (r != RET_PF_INVALID)
4403 r = mmu_topup_memory_caches(vcpu, false);
4407 r = kvm_faultin_pfn(vcpu, fault, ACC_ALL);
4408 if (r != RET_PF_CONTINUE)
4412 read_lock(&vcpu->kvm->mmu_lock);
4414 if (is_page_fault_stale(vcpu, fault))
4417 r = kvm_tdp_mmu_map(vcpu, fault);
4420 read_unlock(&vcpu->kvm->mmu_lock);
4421 kvm_release_pfn_clean(fault->pfn);
4426 int kvm_tdp_page_fault(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault)
4429 * If the guest's MTRRs may be used to compute the "real" memtype,
4430 * restrict the mapping level to ensure KVM uses a consistent memtype
4431 * across the entire mapping. If the host MTRRs are ignored by TDP
4432 * (shadow_memtype_mask is non-zero), and the VM has non-coherent DMA
4433 * (DMA doesn't snoop CPU caches), KVM's ABI is to honor the memtype
4434 * from the guest's MTRRs so that guest accesses to memory that is
4435 * DMA'd aren't cached against the guest's wishes.
4437 * Note, KVM may still ultimately ignore guest MTRRs for certain PFNs,
4438 * e.g. KVM will force UC memtype for host MMIO.
4440 if (shadow_memtype_mask && kvm_arch_has_noncoherent_dma(vcpu->kvm)) {
4441 for ( ; fault->max_level > PG_LEVEL_4K; --fault->max_level) {
4442 int page_num = KVM_PAGES_PER_HPAGE(fault->max_level);
4443 gfn_t base = fault->gfn & ~(page_num - 1);
4445 if (kvm_mtrr_check_gfn_range_consistency(vcpu, base, page_num))
4450 #ifdef CONFIG_X86_64
4451 if (tdp_mmu_enabled)
4452 return kvm_tdp_mmu_page_fault(vcpu, fault);
4455 return direct_page_fault(vcpu, fault);
4458 static void nonpaging_init_context(struct kvm_mmu *context)
4460 context->page_fault = nonpaging_page_fault;
4461 context->gva_to_gpa = nonpaging_gva_to_gpa;
4462 context->sync_page = nonpaging_sync_page;
4463 context->invlpg = NULL;
4466 static inline bool is_root_usable(struct kvm_mmu_root_info *root, gpa_t pgd,
4467 union kvm_mmu_page_role role)
4469 return (role.direct || pgd == root->pgd) &&
4470 VALID_PAGE(root->hpa) &&
4471 role.word == to_shadow_page(root->hpa)->role.word;
4475 * Find out if a previously cached root matching the new pgd/role is available,
4476 * and insert the current root as the MRU in the cache.
4477 * If a matching root is found, it is assigned to kvm_mmu->root and
4479 * If no match is found, kvm_mmu->root is left invalid, the LRU root is
4480 * evicted to make room for the current root, and false is returned.
4482 static bool cached_root_find_and_keep_current(struct kvm *kvm, struct kvm_mmu *mmu,
4484 union kvm_mmu_page_role new_role)
4488 if (is_root_usable(&mmu->root, new_pgd, new_role))
4491 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
4493 * The swaps end up rotating the cache like this:
4494 * C 0 1 2 3 (on entry to the function)
4498 * 3 C 0 1 2 (on exit from the loop)
4500 swap(mmu->root, mmu->prev_roots[i]);
4501 if (is_root_usable(&mmu->root, new_pgd, new_role))
4505 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4510 * Find out if a previously cached root matching the new pgd/role is available.
4511 * On entry, mmu->root is invalid.
4512 * If a matching root is found, it is assigned to kvm_mmu->root, the LRU entry
4513 * of the cache becomes invalid, and true is returned.
4514 * If no match is found, kvm_mmu->root is left invalid and false is returned.
4516 static bool cached_root_find_without_current(struct kvm *kvm, struct kvm_mmu *mmu,
4518 union kvm_mmu_page_role new_role)
4522 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
4523 if (is_root_usable(&mmu->prev_roots[i], new_pgd, new_role))
4529 swap(mmu->root, mmu->prev_roots[i]);
4530 /* Bubble up the remaining roots. */
4531 for (; i < KVM_MMU_NUM_PREV_ROOTS - 1; i++)
4532 mmu->prev_roots[i] = mmu->prev_roots[i + 1];
4533 mmu->prev_roots[i].hpa = INVALID_PAGE;
4537 static bool fast_pgd_switch(struct kvm *kvm, struct kvm_mmu *mmu,
4538 gpa_t new_pgd, union kvm_mmu_page_role new_role)
4541 * For now, limit the caching to 64-bit hosts+VMs in order to avoid
4542 * having to deal with PDPTEs. We may add support for 32-bit hosts/VMs
4543 * later if necessary.
4545 if (VALID_PAGE(mmu->root.hpa) && !to_shadow_page(mmu->root.hpa))
4546 kvm_mmu_free_roots(kvm, mmu, KVM_MMU_ROOT_CURRENT);
4548 if (VALID_PAGE(mmu->root.hpa))
4549 return cached_root_find_and_keep_current(kvm, mmu, new_pgd, new_role);
4551 return cached_root_find_without_current(kvm, mmu, new_pgd, new_role);
4554 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd)
4556 struct kvm_mmu *mmu = vcpu->arch.mmu;
4557 union kvm_mmu_page_role new_role = mmu->root_role;
4559 if (!fast_pgd_switch(vcpu->kvm, mmu, new_pgd, new_role)) {
4560 /* kvm_mmu_ensure_valid_pgd will set up a new root. */
4565 * It's possible that the cached previous root page is obsolete because
4566 * of a change in the MMU generation number. However, changing the
4567 * generation number is accompanied by KVM_REQ_MMU_FREE_OBSOLETE_ROOTS,
4568 * which will free the root set here and allocate a new one.
4570 kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
4572 if (force_flush_and_sync_on_reuse) {
4573 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
4574 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
4578 * The last MMIO access's GVA and GPA are cached in the VCPU. When
4579 * switching to a new CR3, that GVA->GPA mapping may no longer be
4580 * valid. So clear any cached MMIO info even when we don't need to sync
4581 * the shadow page tables.
4583 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
4586 * If this is a direct root page, it doesn't have a write flooding
4587 * count. Otherwise, clear the write flooding count.
4589 if (!new_role.direct)
4590 __clear_sp_write_flooding_count(
4591 to_shadow_page(vcpu->arch.mmu->root.hpa));
4593 EXPORT_SYMBOL_GPL(kvm_mmu_new_pgd);
4595 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
4597 return kvm_read_cr3(vcpu);
4600 static bool sync_mmio_spte(struct kvm_vcpu *vcpu, u64 *sptep, gfn_t gfn,
4601 unsigned int access)
4603 if (unlikely(is_mmio_spte(*sptep))) {
4604 if (gfn != get_mmio_spte_gfn(*sptep)) {
4605 mmu_spte_clear_no_track(sptep);
4609 mark_mmio_spte(vcpu, sptep, gfn, access);
4616 #define PTTYPE_EPT 18 /* arbitrary */
4617 #define PTTYPE PTTYPE_EPT
4618 #include "paging_tmpl.h"
4622 #include "paging_tmpl.h"
4626 #include "paging_tmpl.h"
4630 __reset_rsvds_bits_mask(struct rsvd_bits_validate *rsvd_check,
4631 u64 pa_bits_rsvd, int level, bool nx, bool gbpages,
4634 u64 gbpages_bit_rsvd = 0;
4635 u64 nonleaf_bit8_rsvd = 0;
4638 rsvd_check->bad_mt_xwr = 0;
4641 gbpages_bit_rsvd = rsvd_bits(7, 7);
4643 if (level == PT32E_ROOT_LEVEL)
4644 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 62);
4646 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4648 /* Note, NX doesn't exist in PDPTEs, this is handled below. */
4650 high_bits_rsvd |= rsvd_bits(63, 63);
4653 * Non-leaf PML4Es and PDPEs reserve bit 8 (which would be the G bit for
4654 * leaf entries) on AMD CPUs only.
4657 nonleaf_bit8_rsvd = rsvd_bits(8, 8);
4660 case PT32_ROOT_LEVEL:
4661 /* no rsvd bits for 2 level 4K page table entries */
4662 rsvd_check->rsvd_bits_mask[0][1] = 0;
4663 rsvd_check->rsvd_bits_mask[0][0] = 0;
4664 rsvd_check->rsvd_bits_mask[1][0] =
4665 rsvd_check->rsvd_bits_mask[0][0];
4668 rsvd_check->rsvd_bits_mask[1][1] = 0;
4672 if (is_cpuid_PSE36())
4673 /* 36bits PSE 4MB page */
4674 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
4676 /* 32 bits PSE 4MB page */
4677 rsvd_check->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
4679 case PT32E_ROOT_LEVEL:
4680 rsvd_check->rsvd_bits_mask[0][2] = rsvd_bits(63, 63) |
4683 rsvd_bits(1, 2); /* PDPTE */
4684 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd; /* PDE */
4685 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd; /* PTE */
4686 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4687 rsvd_bits(13, 20); /* large page */
4688 rsvd_check->rsvd_bits_mask[1][0] =
4689 rsvd_check->rsvd_bits_mask[0][0];
4691 case PT64_ROOT_5LEVEL:
4692 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd |
4695 rsvd_check->rsvd_bits_mask[1][4] =
4696 rsvd_check->rsvd_bits_mask[0][4];
4698 case PT64_ROOT_4LEVEL:
4699 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd |
4702 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd |
4704 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd;
4705 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4706 rsvd_check->rsvd_bits_mask[1][3] =
4707 rsvd_check->rsvd_bits_mask[0][3];
4708 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd |
4711 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd |
4712 rsvd_bits(13, 20); /* large page */
4713 rsvd_check->rsvd_bits_mask[1][0] =
4714 rsvd_check->rsvd_bits_mask[0][0];
4719 static bool guest_can_use_gbpages(struct kvm_vcpu *vcpu)
4722 * If TDP is enabled, let the guest use GBPAGES if they're supported in
4723 * hardware. The hardware page walker doesn't let KVM disable GBPAGES,
4724 * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA
4725 * walk for performance and complexity reasons. Not to mention KVM
4726 * _can't_ solve the problem because GVA->GPA walks aren't visible to
4727 * KVM once a TDP translation is installed. Mimic hardware behavior so
4728 * that KVM's is at least consistent, i.e. doesn't randomly inject #PF.
4730 return tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) :
4731 guest_cpuid_has(vcpu, X86_FEATURE_GBPAGES);
4734 static void reset_guest_rsvds_bits_mask(struct kvm_vcpu *vcpu,
4735 struct kvm_mmu *context)
4737 __reset_rsvds_bits_mask(&context->guest_rsvd_check,
4738 vcpu->arch.reserved_gpa_bits,
4739 context->cpu_role.base.level, is_efer_nx(context),
4740 guest_can_use_gbpages(vcpu),
4741 is_cr4_pse(context),
4742 guest_cpuid_is_amd_or_hygon(vcpu));
4746 __reset_rsvds_bits_mask_ept(struct rsvd_bits_validate *rsvd_check,
4747 u64 pa_bits_rsvd, bool execonly, int huge_page_level)
4749 u64 high_bits_rsvd = pa_bits_rsvd & rsvd_bits(0, 51);
4750 u64 large_1g_rsvd = 0, large_2m_rsvd = 0;
4753 if (huge_page_level < PG_LEVEL_1G)
4754 large_1g_rsvd = rsvd_bits(7, 7);
4755 if (huge_page_level < PG_LEVEL_2M)
4756 large_2m_rsvd = rsvd_bits(7, 7);
4758 rsvd_check->rsvd_bits_mask[0][4] = high_bits_rsvd | rsvd_bits(3, 7);
4759 rsvd_check->rsvd_bits_mask[0][3] = high_bits_rsvd | rsvd_bits(3, 7);
4760 rsvd_check->rsvd_bits_mask[0][2] = high_bits_rsvd | rsvd_bits(3, 6) | large_1g_rsvd;
4761 rsvd_check->rsvd_bits_mask[0][1] = high_bits_rsvd | rsvd_bits(3, 6) | large_2m_rsvd;
4762 rsvd_check->rsvd_bits_mask[0][0] = high_bits_rsvd;
4765 rsvd_check->rsvd_bits_mask[1][4] = rsvd_check->rsvd_bits_mask[0][4];
4766 rsvd_check->rsvd_bits_mask[1][3] = rsvd_check->rsvd_bits_mask[0][3];
4767 rsvd_check->rsvd_bits_mask[1][2] = high_bits_rsvd | rsvd_bits(12, 29) | large_1g_rsvd;
4768 rsvd_check->rsvd_bits_mask[1][1] = high_bits_rsvd | rsvd_bits(12, 20) | large_2m_rsvd;
4769 rsvd_check->rsvd_bits_mask[1][0] = rsvd_check->rsvd_bits_mask[0][0];
4771 bad_mt_xwr = 0xFFull << (2 * 8); /* bits 3..5 must not be 2 */
4772 bad_mt_xwr |= 0xFFull << (3 * 8); /* bits 3..5 must not be 3 */
4773 bad_mt_xwr |= 0xFFull << (7 * 8); /* bits 3..5 must not be 7 */
4774 bad_mt_xwr |= REPEAT_BYTE(1ull << 2); /* bits 0..2 must not be 010 */
4775 bad_mt_xwr |= REPEAT_BYTE(1ull << 6); /* bits 0..2 must not be 110 */
4777 /* bits 0..2 must not be 100 unless VMX capabilities allow it */
4778 bad_mt_xwr |= REPEAT_BYTE(1ull << 4);
4780 rsvd_check->bad_mt_xwr = bad_mt_xwr;
4783 static void reset_rsvds_bits_mask_ept(struct kvm_vcpu *vcpu,
4784 struct kvm_mmu *context, bool execonly, int huge_page_level)
4786 __reset_rsvds_bits_mask_ept(&context->guest_rsvd_check,
4787 vcpu->arch.reserved_gpa_bits, execonly,
4791 static inline u64 reserved_hpa_bits(void)
4793 return rsvd_bits(shadow_phys_bits, 63);
4797 * the page table on host is the shadow page table for the page
4798 * table in guest or amd nested guest, its mmu features completely
4799 * follow the features in guest.
4801 static void reset_shadow_zero_bits_mask(struct kvm_vcpu *vcpu,
4802 struct kvm_mmu *context)
4804 /* @amd adds a check on bit of SPTEs, which KVM shouldn't use anyways. */
4806 /* KVM doesn't use 2-level page tables for the shadow MMU. */
4807 bool is_pse = false;
4808 struct rsvd_bits_validate *shadow_zero_check;
4811 WARN_ON_ONCE(context->root_role.level < PT32E_ROOT_LEVEL);
4813 shadow_zero_check = &context->shadow_zero_check;
4814 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
4815 context->root_role.level,
4816 context->root_role.efer_nx,
4817 guest_can_use_gbpages(vcpu), is_pse, is_amd);
4819 if (!shadow_me_mask)
4822 for (i = context->root_role.level; --i >= 0;) {
4824 * So far shadow_me_value is a constant during KVM's life
4825 * time. Bits in shadow_me_value are allowed to be set.
4826 * Bits in shadow_me_mask but not in shadow_me_value are
4827 * not allowed to be set.
4829 shadow_zero_check->rsvd_bits_mask[0][i] |= shadow_me_mask;
4830 shadow_zero_check->rsvd_bits_mask[1][i] |= shadow_me_mask;
4831 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_value;
4832 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_value;
4837 static inline bool boot_cpu_is_amd(void)
4839 WARN_ON_ONCE(!tdp_enabled);
4840 return shadow_x_mask == 0;
4844 * the direct page table on host, use as much mmu features as
4845 * possible, however, kvm currently does not do execution-protection.
4848 reset_tdp_shadow_zero_bits_mask(struct kvm_mmu *context)
4850 struct rsvd_bits_validate *shadow_zero_check;
4853 shadow_zero_check = &context->shadow_zero_check;
4855 if (boot_cpu_is_amd())
4856 __reset_rsvds_bits_mask(shadow_zero_check, reserved_hpa_bits(),
4857 context->root_role.level, true,
4858 boot_cpu_has(X86_FEATURE_GBPAGES),
4861 __reset_rsvds_bits_mask_ept(shadow_zero_check,
4862 reserved_hpa_bits(), false,
4863 max_huge_page_level);
4865 if (!shadow_me_mask)
4868 for (i = context->root_role.level; --i >= 0;) {
4869 shadow_zero_check->rsvd_bits_mask[0][i] &= ~shadow_me_mask;
4870 shadow_zero_check->rsvd_bits_mask[1][i] &= ~shadow_me_mask;
4875 * as the comments in reset_shadow_zero_bits_mask() except it
4876 * is the shadow page table for intel nested guest.
4879 reset_ept_shadow_zero_bits_mask(struct kvm_mmu *context, bool execonly)
4881 __reset_rsvds_bits_mask_ept(&context->shadow_zero_check,
4882 reserved_hpa_bits(), execonly,
4883 max_huge_page_level);
4886 #define BYTE_MASK(access) \
4887 ((1 & (access) ? 2 : 0) | \
4888 (2 & (access) ? 4 : 0) | \
4889 (3 & (access) ? 8 : 0) | \
4890 (4 & (access) ? 16 : 0) | \
4891 (5 & (access) ? 32 : 0) | \
4892 (6 & (access) ? 64 : 0) | \
4893 (7 & (access) ? 128 : 0))
4896 static void update_permission_bitmask(struct kvm_mmu *mmu, bool ept)
4900 const u8 x = BYTE_MASK(ACC_EXEC_MASK);
4901 const u8 w = BYTE_MASK(ACC_WRITE_MASK);
4902 const u8 u = BYTE_MASK(ACC_USER_MASK);
4904 bool cr4_smep = is_cr4_smep(mmu);
4905 bool cr4_smap = is_cr4_smap(mmu);
4906 bool cr0_wp = is_cr0_wp(mmu);
4907 bool efer_nx = is_efer_nx(mmu);
4909 for (byte = 0; byte < ARRAY_SIZE(mmu->permissions); ++byte) {
4910 unsigned pfec = byte << 1;
4913 * Each "*f" variable has a 1 bit for each UWX value
4914 * that causes a fault with the given PFEC.
4917 /* Faults from writes to non-writable pages */
4918 u8 wf = (pfec & PFERR_WRITE_MASK) ? (u8)~w : 0;
4919 /* Faults from user mode accesses to supervisor pages */
4920 u8 uf = (pfec & PFERR_USER_MASK) ? (u8)~u : 0;
4921 /* Faults from fetches of non-executable pages*/
4922 u8 ff = (pfec & PFERR_FETCH_MASK) ? (u8)~x : 0;
4923 /* Faults from kernel mode fetches of user pages */
4925 /* Faults from kernel mode accesses of user pages */
4929 /* Faults from kernel mode accesses to user pages */
4930 u8 kf = (pfec & PFERR_USER_MASK) ? 0 : u;
4932 /* Not really needed: !nx will cause pte.nx to fault */
4936 /* Allow supervisor writes if !cr0.wp */
4938 wf = (pfec & PFERR_USER_MASK) ? wf : 0;
4940 /* Disallow supervisor fetches of user code if cr4.smep */
4942 smepf = (pfec & PFERR_FETCH_MASK) ? kf : 0;
4945 * SMAP:kernel-mode data accesses from user-mode
4946 * mappings should fault. A fault is considered
4947 * as a SMAP violation if all of the following
4948 * conditions are true:
4949 * - X86_CR4_SMAP is set in CR4
4950 * - A user page is accessed
4951 * - The access is not a fetch
4952 * - The access is supervisor mode
4953 * - If implicit supervisor access or X86_EFLAGS_AC is clear
4955 * Here, we cover the first four conditions.
4956 * The fifth is computed dynamically in permission_fault();
4957 * PFERR_RSVD_MASK bit will be set in PFEC if the access is
4958 * *not* subject to SMAP restrictions.
4961 smapf = (pfec & (PFERR_RSVD_MASK|PFERR_FETCH_MASK)) ? 0 : kf;
4964 mmu->permissions[byte] = ff | uf | wf | smepf | smapf;
4969 * PKU is an additional mechanism by which the paging controls access to
4970 * user-mode addresses based on the value in the PKRU register. Protection
4971 * key violations are reported through a bit in the page fault error code.
4972 * Unlike other bits of the error code, the PK bit is not known at the
4973 * call site of e.g. gva_to_gpa; it must be computed directly in
4974 * permission_fault based on two bits of PKRU, on some machine state (CR4,
4975 * CR0, EFER, CPL), and on other bits of the error code and the page tables.
4977 * In particular the following conditions come from the error code, the
4978 * page tables and the machine state:
4979 * - PK is always zero unless CR4.PKE=1 and EFER.LMA=1
4980 * - PK is always zero if RSVD=1 (reserved bit set) or F=1 (instruction fetch)
4981 * - PK is always zero if U=0 in the page tables
4982 * - PKRU.WD is ignored if CR0.WP=0 and the access is a supervisor access.
4984 * The PKRU bitmask caches the result of these four conditions. The error
4985 * code (minus the P bit) and the page table's U bit form an index into the
4986 * PKRU bitmask. Two bits of the PKRU bitmask are then extracted and ANDed
4987 * with the two bits of the PKRU register corresponding to the protection key.
4988 * For the first three conditions above the bits will be 00, thus masking
4989 * away both AD and WD. For all reads or if the last condition holds, WD
4990 * only will be masked away.
4992 static void update_pkru_bitmask(struct kvm_mmu *mmu)
4999 if (!is_cr4_pke(mmu))
5002 wp = is_cr0_wp(mmu);
5004 for (bit = 0; bit < ARRAY_SIZE(mmu->permissions); ++bit) {
5005 unsigned pfec, pkey_bits;
5006 bool check_pkey, check_write, ff, uf, wf, pte_user;
5009 ff = pfec & PFERR_FETCH_MASK;
5010 uf = pfec & PFERR_USER_MASK;
5011 wf = pfec & PFERR_WRITE_MASK;
5013 /* PFEC.RSVD is replaced by ACC_USER_MASK. */
5014 pte_user = pfec & PFERR_RSVD_MASK;
5017 * Only need to check the access which is not an
5018 * instruction fetch and is to a user page.
5020 check_pkey = (!ff && pte_user);
5022 * write access is controlled by PKRU if it is a
5023 * user access or CR0.WP = 1.
5025 check_write = check_pkey && wf && (uf || wp);
5027 /* PKRU.AD stops both read and write access. */
5028 pkey_bits = !!check_pkey;
5029 /* PKRU.WD stops write access. */
5030 pkey_bits |= (!!check_write) << 1;
5032 mmu->pkru_mask |= (pkey_bits & 3) << pfec;
5036 static void reset_guest_paging_metadata(struct kvm_vcpu *vcpu,
5037 struct kvm_mmu *mmu)
5039 if (!is_cr0_pg(mmu))
5042 reset_guest_rsvds_bits_mask(vcpu, mmu);
5043 update_permission_bitmask(mmu, false);
5044 update_pkru_bitmask(mmu);
5047 static void paging64_init_context(struct kvm_mmu *context)
5049 context->page_fault = paging64_page_fault;
5050 context->gva_to_gpa = paging64_gva_to_gpa;
5051 context->sync_page = paging64_sync_page;
5052 context->invlpg = paging64_invlpg;
5055 static void paging32_init_context(struct kvm_mmu *context)
5057 context->page_fault = paging32_page_fault;
5058 context->gva_to_gpa = paging32_gva_to_gpa;
5059 context->sync_page = paging32_sync_page;
5060 context->invlpg = paging32_invlpg;
5063 static union kvm_cpu_role
5064 kvm_calc_cpu_role(struct kvm_vcpu *vcpu, const struct kvm_mmu_role_regs *regs)
5066 union kvm_cpu_role role = {0};
5068 role.base.access = ACC_ALL;
5069 role.base.smm = is_smm(vcpu);
5070 role.base.guest_mode = is_guest_mode(vcpu);
5073 if (!____is_cr0_pg(regs)) {
5074 role.base.direct = 1;
5078 role.base.efer_nx = ____is_efer_nx(regs);
5079 role.base.cr0_wp = ____is_cr0_wp(regs);
5080 role.base.smep_andnot_wp = ____is_cr4_smep(regs) && !____is_cr0_wp(regs);
5081 role.base.smap_andnot_wp = ____is_cr4_smap(regs) && !____is_cr0_wp(regs);
5082 role.base.has_4_byte_gpte = !____is_cr4_pae(regs);
5084 if (____is_efer_lma(regs))
5085 role.base.level = ____is_cr4_la57(regs) ? PT64_ROOT_5LEVEL
5087 else if (____is_cr4_pae(regs))
5088 role.base.level = PT32E_ROOT_LEVEL;
5090 role.base.level = PT32_ROOT_LEVEL;
5092 role.ext.cr4_smep = ____is_cr4_smep(regs);
5093 role.ext.cr4_smap = ____is_cr4_smap(regs);
5094 role.ext.cr4_pse = ____is_cr4_pse(regs);
5096 /* PKEY and LA57 are active iff long mode is active. */
5097 role.ext.cr4_pke = ____is_efer_lma(regs) && ____is_cr4_pke(regs);
5098 role.ext.cr4_la57 = ____is_efer_lma(regs) && ____is_cr4_la57(regs);
5099 role.ext.efer_lma = ____is_efer_lma(regs);
5103 static inline int kvm_mmu_get_tdp_level(struct kvm_vcpu *vcpu)
5105 /* tdp_root_level is architecture forced level, use it if nonzero */
5107 return tdp_root_level;
5109 /* Use 5-level TDP if and only if it's useful/necessary. */
5110 if (max_tdp_level == 5 && cpuid_maxphyaddr(vcpu) <= 48)
5113 return max_tdp_level;
5116 static union kvm_mmu_page_role
5117 kvm_calc_tdp_mmu_root_page_role(struct kvm_vcpu *vcpu,
5118 union kvm_cpu_role cpu_role)
5120 union kvm_mmu_page_role role = {0};
5122 role.access = ACC_ALL;
5124 role.efer_nx = true;
5125 role.smm = cpu_role.base.smm;
5126 role.guest_mode = cpu_role.base.guest_mode;
5127 role.ad_disabled = !kvm_ad_enabled();
5128 role.level = kvm_mmu_get_tdp_level(vcpu);
5130 role.has_4_byte_gpte = false;
5135 static void init_kvm_tdp_mmu(struct kvm_vcpu *vcpu,
5136 union kvm_cpu_role cpu_role)
5138 struct kvm_mmu *context = &vcpu->arch.root_mmu;
5139 union kvm_mmu_page_role root_role = kvm_calc_tdp_mmu_root_page_role(vcpu, cpu_role);
5141 if (cpu_role.as_u64 == context->cpu_role.as_u64 &&
5142 root_role.word == context->root_role.word)
5145 context->cpu_role.as_u64 = cpu_role.as_u64;
5146 context->root_role.word = root_role.word;
5147 context->page_fault = kvm_tdp_page_fault;
5148 context->sync_page = nonpaging_sync_page;
5149 context->invlpg = NULL;
5150 context->get_guest_pgd = get_cr3;
5151 context->get_pdptr = kvm_pdptr_read;
5152 context->inject_page_fault = kvm_inject_page_fault;
5154 if (!is_cr0_pg(context))
5155 context->gva_to_gpa = nonpaging_gva_to_gpa;
5156 else if (is_cr4_pae(context))
5157 context->gva_to_gpa = paging64_gva_to_gpa;
5159 context->gva_to_gpa = paging32_gva_to_gpa;
5161 reset_guest_paging_metadata(vcpu, context);
5162 reset_tdp_shadow_zero_bits_mask(context);
5165 static void shadow_mmu_init_context(struct kvm_vcpu *vcpu, struct kvm_mmu *context,
5166 union kvm_cpu_role cpu_role,
5167 union kvm_mmu_page_role root_role)
5169 if (cpu_role.as_u64 == context->cpu_role.as_u64 &&
5170 root_role.word == context->root_role.word)
5173 context->cpu_role.as_u64 = cpu_role.as_u64;
5174 context->root_role.word = root_role.word;
5176 if (!is_cr0_pg(context))
5177 nonpaging_init_context(context);
5178 else if (is_cr4_pae(context))
5179 paging64_init_context(context);
5181 paging32_init_context(context);
5183 reset_guest_paging_metadata(vcpu, context);
5184 reset_shadow_zero_bits_mask(vcpu, context);
5187 static void kvm_init_shadow_mmu(struct kvm_vcpu *vcpu,
5188 union kvm_cpu_role cpu_role)
5190 struct kvm_mmu *context = &vcpu->arch.root_mmu;
5191 union kvm_mmu_page_role root_role;
5193 root_role = cpu_role.base;
5195 /* KVM uses PAE paging whenever the guest isn't using 64-bit paging. */
5196 root_role.level = max_t(u32, root_role.level, PT32E_ROOT_LEVEL);
5199 * KVM forces EFER.NX=1 when TDP is disabled, reflect it in the MMU role.
5200 * KVM uses NX when TDP is disabled to handle a variety of scenarios,
5201 * notably for huge SPTEs if iTLB multi-hit mitigation is enabled and
5202 * to generate correct permissions for CR0.WP=0/CR4.SMEP=1/EFER.NX=0.
5203 * The iTLB multi-hit workaround can be toggled at any time, so assume
5204 * NX can be used by any non-nested shadow MMU to avoid having to reset
5207 root_role.efer_nx = true;
5209 shadow_mmu_init_context(vcpu, context, cpu_role, root_role);
5212 void kvm_init_shadow_npt_mmu(struct kvm_vcpu *vcpu, unsigned long cr0,
5213 unsigned long cr4, u64 efer, gpa_t nested_cr3)
5215 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
5216 struct kvm_mmu_role_regs regs = {
5218 .cr4 = cr4 & ~X86_CR4_PKE,
5221 union kvm_cpu_role cpu_role = kvm_calc_cpu_role(vcpu, ®s);
5222 union kvm_mmu_page_role root_role;
5224 /* NPT requires CR0.PG=1. */
5225 WARN_ON_ONCE(cpu_role.base.direct);
5227 root_role = cpu_role.base;
5228 root_role.level = kvm_mmu_get_tdp_level(vcpu);
5229 if (root_role.level == PT64_ROOT_5LEVEL &&
5230 cpu_role.base.level == PT64_ROOT_4LEVEL)
5231 root_role.passthrough = 1;
5233 shadow_mmu_init_context(vcpu, context, cpu_role, root_role);
5234 kvm_mmu_new_pgd(vcpu, nested_cr3);
5236 EXPORT_SYMBOL_GPL(kvm_init_shadow_npt_mmu);
5238 static union kvm_cpu_role
5239 kvm_calc_shadow_ept_root_page_role(struct kvm_vcpu *vcpu, bool accessed_dirty,
5240 bool execonly, u8 level)
5242 union kvm_cpu_role role = {0};
5245 * KVM does not support SMM transfer monitors, and consequently does not
5246 * support the "entry to SMM" control either. role.base.smm is always 0.
5248 WARN_ON_ONCE(is_smm(vcpu));
5249 role.base.level = level;
5250 role.base.has_4_byte_gpte = false;
5251 role.base.direct = false;
5252 role.base.ad_disabled = !accessed_dirty;
5253 role.base.guest_mode = true;
5254 role.base.access = ACC_ALL;
5257 role.ext.execonly = execonly;
5263 void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly,
5264 int huge_page_level, bool accessed_dirty,
5267 struct kvm_mmu *context = &vcpu->arch.guest_mmu;
5268 u8 level = vmx_eptp_page_walk_level(new_eptp);
5269 union kvm_cpu_role new_mode =
5270 kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty,
5273 if (new_mode.as_u64 != context->cpu_role.as_u64) {
5274 /* EPT, and thus nested EPT, does not consume CR0, CR4, nor EFER. */
5275 context->cpu_role.as_u64 = new_mode.as_u64;
5276 context->root_role.word = new_mode.base.word;
5278 context->page_fault = ept_page_fault;
5279 context->gva_to_gpa = ept_gva_to_gpa;
5280 context->sync_page = ept_sync_page;
5281 context->invlpg = ept_invlpg;
5283 update_permission_bitmask(context, true);
5284 context->pkru_mask = 0;
5285 reset_rsvds_bits_mask_ept(vcpu, context, execonly, huge_page_level);
5286 reset_ept_shadow_zero_bits_mask(context, execonly);
5289 kvm_mmu_new_pgd(vcpu, new_eptp);
5291 EXPORT_SYMBOL_GPL(kvm_init_shadow_ept_mmu);
5293 static void init_kvm_softmmu(struct kvm_vcpu *vcpu,
5294 union kvm_cpu_role cpu_role)
5296 struct kvm_mmu *context = &vcpu->arch.root_mmu;
5298 kvm_init_shadow_mmu(vcpu, cpu_role);
5300 context->get_guest_pgd = get_cr3;
5301 context->get_pdptr = kvm_pdptr_read;
5302 context->inject_page_fault = kvm_inject_page_fault;
5305 static void init_kvm_nested_mmu(struct kvm_vcpu *vcpu,
5306 union kvm_cpu_role new_mode)
5308 struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
5310 if (new_mode.as_u64 == g_context->cpu_role.as_u64)
5313 g_context->cpu_role.as_u64 = new_mode.as_u64;
5314 g_context->get_guest_pgd = get_cr3;
5315 g_context->get_pdptr = kvm_pdptr_read;
5316 g_context->inject_page_fault = kvm_inject_page_fault;
5319 * L2 page tables are never shadowed, so there is no need to sync
5322 g_context->invlpg = NULL;
5325 * Note that arch.mmu->gva_to_gpa translates l2_gpa to l1_gpa using
5326 * L1's nested page tables (e.g. EPT12). The nested translation
5327 * of l2_gva to l1_gpa is done by arch.nested_mmu.gva_to_gpa using
5328 * L2's page tables as the first level of translation and L1's
5329 * nested page tables as the second level of translation. Basically
5330 * the gva_to_gpa functions between mmu and nested_mmu are swapped.
5332 if (!is_paging(vcpu))
5333 g_context->gva_to_gpa = nonpaging_gva_to_gpa;
5334 else if (is_long_mode(vcpu))
5335 g_context->gva_to_gpa = paging64_gva_to_gpa;
5336 else if (is_pae(vcpu))
5337 g_context->gva_to_gpa = paging64_gva_to_gpa;
5339 g_context->gva_to_gpa = paging32_gva_to_gpa;
5341 reset_guest_paging_metadata(vcpu, g_context);
5344 void kvm_init_mmu(struct kvm_vcpu *vcpu)
5346 struct kvm_mmu_role_regs regs = vcpu_to_role_regs(vcpu);
5347 union kvm_cpu_role cpu_role = kvm_calc_cpu_role(vcpu, ®s);
5349 if (mmu_is_nested(vcpu))
5350 init_kvm_nested_mmu(vcpu, cpu_role);
5351 else if (tdp_enabled)
5352 init_kvm_tdp_mmu(vcpu, cpu_role);
5354 init_kvm_softmmu(vcpu, cpu_role);
5356 EXPORT_SYMBOL_GPL(kvm_init_mmu);
5358 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu)
5361 * Invalidate all MMU roles to force them to reinitialize as CPUID
5362 * information is factored into reserved bit calculations.
5364 * Correctly handling multiple vCPU models with respect to paging and
5365 * physical address properties) in a single VM would require tracking
5366 * all relevant CPUID information in kvm_mmu_page_role. That is very
5367 * undesirable as it would increase the memory requirements for
5368 * gfn_track (see struct kvm_mmu_page_role comments). For now that
5369 * problem is swept under the rug; KVM's CPUID API is horrific and
5370 * it's all but impossible to solve it without introducing a new API.
5372 vcpu->arch.root_mmu.root_role.word = 0;
5373 vcpu->arch.guest_mmu.root_role.word = 0;
5374 vcpu->arch.nested_mmu.root_role.word = 0;
5375 vcpu->arch.root_mmu.cpu_role.ext.valid = 0;
5376 vcpu->arch.guest_mmu.cpu_role.ext.valid = 0;
5377 vcpu->arch.nested_mmu.cpu_role.ext.valid = 0;
5378 kvm_mmu_reset_context(vcpu);
5381 * Changing guest CPUID after KVM_RUN is forbidden, see the comment in
5382 * kvm_arch_vcpu_ioctl().
5384 KVM_BUG_ON(vcpu->arch.last_vmentry_cpu != -1, vcpu->kvm);
5387 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
5389 kvm_mmu_unload(vcpu);
5392 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
5394 int kvm_mmu_load(struct kvm_vcpu *vcpu)
5398 r = mmu_topup_memory_caches(vcpu, !vcpu->arch.mmu->root_role.direct);
5401 r = mmu_alloc_special_roots(vcpu);
5404 if (vcpu->arch.mmu->root_role.direct)
5405 r = mmu_alloc_direct_roots(vcpu);
5407 r = mmu_alloc_shadow_roots(vcpu);
5411 kvm_mmu_sync_roots(vcpu);
5413 kvm_mmu_load_pgd(vcpu);
5416 * Flush any TLB entries for the new root, the provenance of the root
5417 * is unknown. Even if KVM ensures there are no stale TLB entries
5418 * for a freed root, in theory another hypervisor could have left
5419 * stale entries. Flushing on alloc also allows KVM to skip the TLB
5420 * flush when freeing a root (see kvm_tdp_mmu_put_root()).
5422 static_call(kvm_x86_flush_tlb_current)(vcpu);
5427 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
5429 struct kvm *kvm = vcpu->kvm;
5431 kvm_mmu_free_roots(kvm, &vcpu->arch.root_mmu, KVM_MMU_ROOTS_ALL);
5432 WARN_ON(VALID_PAGE(vcpu->arch.root_mmu.root.hpa));
5433 kvm_mmu_free_roots(kvm, &vcpu->arch.guest_mmu, KVM_MMU_ROOTS_ALL);
5434 WARN_ON(VALID_PAGE(vcpu->arch.guest_mmu.root.hpa));
5435 vcpu_clear_mmio_info(vcpu, MMIO_GVA_ANY);
5438 static bool is_obsolete_root(struct kvm *kvm, hpa_t root_hpa)
5440 struct kvm_mmu_page *sp;
5442 if (!VALID_PAGE(root_hpa))
5446 * When freeing obsolete roots, treat roots as obsolete if they don't
5447 * have an associated shadow page. This does mean KVM will get false
5448 * positives and free roots that don't strictly need to be freed, but
5449 * such false positives are relatively rare:
5451 * (a) only PAE paging and nested NPT has roots without shadow pages
5452 * (b) remote reloads due to a memslot update obsoletes _all_ roots
5453 * (c) KVM doesn't track previous roots for PAE paging, and the guest
5454 * is unlikely to zap an in-use PGD.
5456 sp = to_shadow_page(root_hpa);
5457 return !sp || is_obsolete_sp(kvm, sp);
5460 static void __kvm_mmu_free_obsolete_roots(struct kvm *kvm, struct kvm_mmu *mmu)
5462 unsigned long roots_to_free = 0;
5465 if (is_obsolete_root(kvm, mmu->root.hpa))
5466 roots_to_free |= KVM_MMU_ROOT_CURRENT;
5468 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5469 if (is_obsolete_root(kvm, mmu->prev_roots[i].hpa))
5470 roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
5474 kvm_mmu_free_roots(kvm, mmu, roots_to_free);
5477 void kvm_mmu_free_obsolete_roots(struct kvm_vcpu *vcpu)
5479 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.root_mmu);
5480 __kvm_mmu_free_obsolete_roots(vcpu->kvm, &vcpu->arch.guest_mmu);
5483 static u64 mmu_pte_write_fetch_gpte(struct kvm_vcpu *vcpu, gpa_t *gpa,
5490 * Assume that the pte write on a page table of the same type
5491 * as the current vcpu paging mode since we update the sptes only
5492 * when they have the same mode.
5494 if (is_pae(vcpu) && *bytes == 4) {
5495 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
5500 if (*bytes == 4 || *bytes == 8) {
5501 r = kvm_vcpu_read_guest_atomic(vcpu, *gpa, &gentry, *bytes);
5510 * If we're seeing too many writes to a page, it may no longer be a page table,
5511 * or we may be forking, in which case it is better to unmap the page.
5513 static bool detect_write_flooding(struct kvm_mmu_page *sp)
5516 * Skip write-flooding detected for the sp whose level is 1, because
5517 * it can become unsync, then the guest page is not write-protected.
5519 if (sp->role.level == PG_LEVEL_4K)
5522 atomic_inc(&sp->write_flooding_count);
5523 return atomic_read(&sp->write_flooding_count) >= 3;
5527 * Misaligned accesses are too much trouble to fix up; also, they usually
5528 * indicate a page is not used as a page table.
5530 static bool detect_write_misaligned(struct kvm_mmu_page *sp, gpa_t gpa,
5533 unsigned offset, pte_size, misaligned;
5535 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
5536 gpa, bytes, sp->role.word);
5538 offset = offset_in_page(gpa);
5539 pte_size = sp->role.has_4_byte_gpte ? 4 : 8;
5542 * Sometimes, the OS only writes the last one bytes to update status
5543 * bits, for example, in linux, andb instruction is used in clear_bit().
5545 if (!(offset & (pte_size - 1)) && bytes == 1)
5548 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
5549 misaligned |= bytes < 4;
5554 static u64 *get_written_sptes(struct kvm_mmu_page *sp, gpa_t gpa, int *nspte)
5556 unsigned page_offset, quadrant;
5560 page_offset = offset_in_page(gpa);
5561 level = sp->role.level;
5563 if (sp->role.has_4_byte_gpte) {
5564 page_offset <<= 1; /* 32->64 */
5566 * A 32-bit pde maps 4MB while the shadow pdes map
5567 * only 2MB. So we need to double the offset again
5568 * and zap two pdes instead of one.
5570 if (level == PT32_ROOT_LEVEL) {
5571 page_offset &= ~7; /* kill rounding error */
5575 quadrant = page_offset >> PAGE_SHIFT;
5576 page_offset &= ~PAGE_MASK;
5577 if (quadrant != sp->role.quadrant)
5581 spte = &sp->spt[page_offset / sizeof(*spte)];
5585 static void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
5586 const u8 *new, int bytes,
5587 struct kvm_page_track_notifier_node *node)
5589 gfn_t gfn = gpa >> PAGE_SHIFT;
5590 struct kvm_mmu_page *sp;
5591 LIST_HEAD(invalid_list);
5592 u64 entry, gentry, *spte;
5597 * If we don't have indirect shadow pages, it means no page is
5598 * write-protected, so we can exit simply.
5600 if (!READ_ONCE(vcpu->kvm->arch.indirect_shadow_pages))
5603 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
5605 write_lock(&vcpu->kvm->mmu_lock);
5607 gentry = mmu_pte_write_fetch_gpte(vcpu, &gpa, &bytes);
5609 ++vcpu->kvm->stat.mmu_pte_write;
5611 for_each_gfn_valid_sp_with_gptes(vcpu->kvm, sp, gfn) {
5612 if (detect_write_misaligned(sp, gpa, bytes) ||
5613 detect_write_flooding(sp)) {
5614 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
5615 ++vcpu->kvm->stat.mmu_flooded;
5619 spte = get_written_sptes(sp, gpa, &npte);
5625 mmu_page_zap_pte(vcpu->kvm, sp, spte, NULL);
5626 if (gentry && sp->role.level != PG_LEVEL_4K)
5627 ++vcpu->kvm->stat.mmu_pde_zapped;
5628 if (is_shadow_present_pte(entry))
5633 kvm_mmu_remote_flush_or_zap(vcpu->kvm, &invalid_list, flush);
5634 write_unlock(&vcpu->kvm->mmu_lock);
5637 int noinline kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
5638 void *insn, int insn_len)
5640 int r, emulation_type = EMULTYPE_PF;
5641 bool direct = vcpu->arch.mmu->root_role.direct;
5643 if (WARN_ON(!VALID_PAGE(vcpu->arch.mmu->root.hpa)))
5644 return RET_PF_RETRY;
5647 if (unlikely(error_code & PFERR_RSVD_MASK)) {
5648 r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct);
5649 if (r == RET_PF_EMULATE)
5653 if (r == RET_PF_INVALID) {
5654 r = kvm_mmu_do_page_fault(vcpu, cr2_or_gpa,
5655 lower_32_bits(error_code), false);
5656 if (KVM_BUG_ON(r == RET_PF_INVALID, vcpu->kvm))
5662 if (r != RET_PF_EMULATE)
5666 * Before emulating the instruction, check if the error code
5667 * was due to a RO violation while translating the guest page.
5668 * This can occur when using nested virtualization with nested
5669 * paging in both guests. If true, we simply unprotect the page
5670 * and resume the guest.
5672 if (vcpu->arch.mmu->root_role.direct &&
5673 (error_code & PFERR_NESTED_GUEST_PAGE) == PFERR_NESTED_GUEST_PAGE) {
5674 kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2_or_gpa));
5679 * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still
5680 * optimistically try to just unprotect the page and let the processor
5681 * re-execute the instruction that caused the page fault. Do not allow
5682 * retrying MMIO emulation, as it's not only pointless but could also
5683 * cause us to enter an infinite loop because the processor will keep
5684 * faulting on the non-existent MMIO address. Retrying an instruction
5685 * from a nested guest is also pointless and dangerous as we are only
5686 * explicitly shadowing L1's page tables, i.e. unprotecting something
5687 * for L1 isn't going to magically fix whatever issue cause L2 to fail.
5689 if (!mmio_info_in_cache(vcpu, cr2_or_gpa, direct) && !is_guest_mode(vcpu))
5690 emulation_type |= EMULTYPE_ALLOW_RETRY_PF;
5692 return x86_emulate_instruction(vcpu, cr2_or_gpa, emulation_type, insn,
5695 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
5697 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
5698 gva_t gva, hpa_t root_hpa)
5702 /* It's actually a GPA for vcpu->arch.guest_mmu. */
5703 if (mmu != &vcpu->arch.guest_mmu) {
5704 /* INVLPG on a non-canonical address is a NOP according to the SDM. */
5705 if (is_noncanonical_address(gva, vcpu))
5708 static_call(kvm_x86_flush_tlb_gva)(vcpu, gva);
5714 if (root_hpa == INVALID_PAGE) {
5715 mmu->invlpg(vcpu, gva, mmu->root.hpa);
5718 * INVLPG is required to invalidate any global mappings for the VA,
5719 * irrespective of PCID. Since it would take us roughly similar amount
5720 * of work to determine whether any of the prev_root mappings of the VA
5721 * is marked global, or to just sync it blindly, so we might as well
5722 * just always sync it.
5724 * Mappings not reachable via the current cr3 or the prev_roots will be
5725 * synced when switching to that cr3, so nothing needs to be done here
5728 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
5729 if (VALID_PAGE(mmu->prev_roots[i].hpa))
5730 mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa);
5732 mmu->invlpg(vcpu, gva, root_hpa);
5736 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
5738 kvm_mmu_invalidate_gva(vcpu, vcpu->arch.walk_mmu, gva, INVALID_PAGE);
5739 ++vcpu->stat.invlpg;
5741 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
5744 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid)
5746 struct kvm_mmu *mmu = vcpu->arch.mmu;
5747 bool tlb_flush = false;
5750 if (pcid == kvm_get_active_pcid(vcpu)) {
5752 mmu->invlpg(vcpu, gva, mmu->root.hpa);
5756 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++) {
5757 if (VALID_PAGE(mmu->prev_roots[i].hpa) &&
5758 pcid == kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd)) {
5760 mmu->invlpg(vcpu, gva, mmu->prev_roots[i].hpa);
5766 static_call(kvm_x86_flush_tlb_gva)(vcpu, gva);
5768 ++vcpu->stat.invlpg;
5771 * Mappings not reachable via the current cr3 or the prev_roots will be
5772 * synced when switching to that cr3, so nothing needs to be done here
5777 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
5778 int tdp_max_root_level, int tdp_huge_page_level)
5780 tdp_enabled = enable_tdp;
5781 tdp_root_level = tdp_forced_root_level;
5782 max_tdp_level = tdp_max_root_level;
5784 #ifdef CONFIG_X86_64
5785 tdp_mmu_enabled = tdp_mmu_allowed && tdp_enabled;
5788 * max_huge_page_level reflects KVM's MMU capabilities irrespective
5789 * of kernel support, e.g. KVM may be capable of using 1GB pages when
5790 * the kernel is not. But, KVM never creates a page size greater than
5791 * what is used by the kernel for any given HVA, i.e. the kernel's
5792 * capabilities are ultimately consulted by kvm_mmu_hugepage_adjust().
5795 max_huge_page_level = tdp_huge_page_level;
5796 else if (boot_cpu_has(X86_FEATURE_GBPAGES))
5797 max_huge_page_level = PG_LEVEL_1G;
5799 max_huge_page_level = PG_LEVEL_2M;
5801 EXPORT_SYMBOL_GPL(kvm_configure_mmu);
5803 /* The return value indicates if tlb flush on all vcpus is needed. */
5804 typedef bool (*slot_level_handler) (struct kvm *kvm,
5805 struct kvm_rmap_head *rmap_head,
5806 const struct kvm_memory_slot *slot);
5808 /* The caller should hold mmu-lock before calling this function. */
5809 static __always_inline bool
5810 slot_handle_level_range(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5811 slot_level_handler fn, int start_level, int end_level,
5812 gfn_t start_gfn, gfn_t end_gfn, bool flush_on_yield,
5815 struct slot_rmap_walk_iterator iterator;
5817 for_each_slot_rmap_range(memslot, start_level, end_level, start_gfn,
5818 end_gfn, &iterator) {
5820 flush |= fn(kvm, iterator.rmap, memslot);
5822 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
5823 if (flush && flush_on_yield) {
5824 kvm_flush_remote_tlbs_with_address(kvm,
5826 iterator.gfn - start_gfn + 1);
5829 cond_resched_rwlock_write(&kvm->mmu_lock);
5836 static __always_inline bool
5837 slot_handle_level(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5838 slot_level_handler fn, int start_level, int end_level,
5839 bool flush_on_yield)
5841 return slot_handle_level_range(kvm, memslot, fn, start_level,
5842 end_level, memslot->base_gfn,
5843 memslot->base_gfn + memslot->npages - 1,
5844 flush_on_yield, false);
5847 static __always_inline bool
5848 slot_handle_level_4k(struct kvm *kvm, const struct kvm_memory_slot *memslot,
5849 slot_level_handler fn, bool flush_on_yield)
5851 return slot_handle_level(kvm, memslot, fn, PG_LEVEL_4K,
5852 PG_LEVEL_4K, flush_on_yield);
5855 static void free_mmu_pages(struct kvm_mmu *mmu)
5857 if (!tdp_enabled && mmu->pae_root)
5858 set_memory_encrypted((unsigned long)mmu->pae_root, 1);
5859 free_page((unsigned long)mmu->pae_root);
5860 free_page((unsigned long)mmu->pml4_root);
5861 free_page((unsigned long)mmu->pml5_root);
5864 static int __kvm_mmu_create(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu)
5869 mmu->root.hpa = INVALID_PAGE;
5871 for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
5872 mmu->prev_roots[i] = KVM_MMU_ROOT_INFO_INVALID;
5874 /* vcpu->arch.guest_mmu isn't used when !tdp_enabled. */
5875 if (!tdp_enabled && mmu == &vcpu->arch.guest_mmu)
5879 * When using PAE paging, the four PDPTEs are treated as 'root' pages,
5880 * while the PDP table is a per-vCPU construct that's allocated at MMU
5881 * creation. When emulating 32-bit mode, cr3 is only 32 bits even on
5882 * x86_64. Therefore we need to allocate the PDP table in the first
5883 * 4GB of memory, which happens to fit the DMA32 zone. TDP paging
5884 * generally doesn't use PAE paging and can skip allocating the PDP
5885 * table. The main exception, handled here, is SVM's 32-bit NPT. The
5886 * other exception is for shadowing L1's 32-bit or PAE NPT on 64-bit
5887 * KVM; that horror is handled on-demand by mmu_alloc_special_roots().
5889 if (tdp_enabled && kvm_mmu_get_tdp_level(vcpu) > PT32E_ROOT_LEVEL)
5892 page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_DMA32);
5896 mmu->pae_root = page_address(page);
5899 * CR3 is only 32 bits when PAE paging is used, thus it's impossible to
5900 * get the CPU to treat the PDPTEs as encrypted. Decrypt the page so
5901 * that KVM's writes and the CPU's reads get along. Note, this is
5902 * only necessary when using shadow paging, as 64-bit NPT can get at
5903 * the C-bit even when shadowing 32-bit NPT, and SME isn't supported
5904 * by 32-bit kernels (when KVM itself uses 32-bit NPT).
5907 set_memory_decrypted((unsigned long)mmu->pae_root, 1);
5909 WARN_ON_ONCE(shadow_me_value);
5911 for (i = 0; i < 4; ++i)
5912 mmu->pae_root[i] = INVALID_PAE_ROOT;
5917 int kvm_mmu_create(struct kvm_vcpu *vcpu)
5921 vcpu->arch.mmu_pte_list_desc_cache.kmem_cache = pte_list_desc_cache;
5922 vcpu->arch.mmu_pte_list_desc_cache.gfp_zero = __GFP_ZERO;
5924 vcpu->arch.mmu_page_header_cache.kmem_cache = mmu_page_header_cache;
5925 vcpu->arch.mmu_page_header_cache.gfp_zero = __GFP_ZERO;
5927 vcpu->arch.mmu_shadow_page_cache.gfp_zero = __GFP_ZERO;
5929 vcpu->arch.mmu = &vcpu->arch.root_mmu;
5930 vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
5932 ret = __kvm_mmu_create(vcpu, &vcpu->arch.guest_mmu);
5936 ret = __kvm_mmu_create(vcpu, &vcpu->arch.root_mmu);
5938 goto fail_allocate_root;
5942 free_mmu_pages(&vcpu->arch.guest_mmu);
5946 #define BATCH_ZAP_PAGES 10
5947 static void kvm_zap_obsolete_pages(struct kvm *kvm)
5949 struct kvm_mmu_page *sp, *node;
5950 int nr_zapped, batch = 0;
5954 list_for_each_entry_safe_reverse(sp, node,
5955 &kvm->arch.active_mmu_pages, link) {
5957 * No obsolete valid page exists before a newly created page
5958 * since active_mmu_pages is a FIFO list.
5960 if (!is_obsolete_sp(kvm, sp))
5964 * Invalid pages should never land back on the list of active
5965 * pages. Skip the bogus page, otherwise we'll get stuck in an
5966 * infinite loop if the page gets put back on the list (again).
5968 if (WARN_ON(sp->role.invalid))
5972 * No need to flush the TLB since we're only zapping shadow
5973 * pages with an obsolete generation number and all vCPUS have
5974 * loaded a new root, i.e. the shadow pages being zapped cannot
5975 * be in active use by the guest.
5977 if (batch >= BATCH_ZAP_PAGES &&
5978 cond_resched_rwlock_write(&kvm->mmu_lock)) {
5983 unstable = __kvm_mmu_prepare_zap_page(kvm, sp,
5984 &kvm->arch.zapped_obsolete_pages, &nr_zapped);
5992 * Kick all vCPUs (via remote TLB flush) before freeing the page tables
5993 * to ensure KVM is not in the middle of a lockless shadow page table
5994 * walk, which may reference the pages. The remote TLB flush itself is
5995 * not required and is simply a convenient way to kick vCPUs as needed.
5996 * KVM performs a local TLB flush when allocating a new root (see
5997 * kvm_mmu_load()), and the reload in the caller ensure no vCPUs are
5998 * running with an obsolete MMU.
6000 kvm_mmu_commit_zap_page(kvm, &kvm->arch.zapped_obsolete_pages);
6004 * Fast invalidate all shadow pages and use lock-break technique
6005 * to zap obsolete pages.
6007 * It's required when memslot is being deleted or VM is being
6008 * destroyed, in these cases, we should ensure that KVM MMU does
6009 * not use any resource of the being-deleted slot or all slots
6010 * after calling the function.
6012 static void kvm_mmu_zap_all_fast(struct kvm *kvm)
6014 lockdep_assert_held(&kvm->slots_lock);
6016 write_lock(&kvm->mmu_lock);
6017 trace_kvm_mmu_zap_all_fast(kvm);
6020 * Toggle mmu_valid_gen between '0' and '1'. Because slots_lock is
6021 * held for the entire duration of zapping obsolete pages, it's
6022 * impossible for there to be multiple invalid generations associated
6023 * with *valid* shadow pages at any given time, i.e. there is exactly
6024 * one valid generation and (at most) one invalid generation.
6026 kvm->arch.mmu_valid_gen = kvm->arch.mmu_valid_gen ? 0 : 1;
6029 * In order to ensure all vCPUs drop their soon-to-be invalid roots,
6030 * invalidating TDP MMU roots must be done while holding mmu_lock for
6031 * write and in the same critical section as making the reload request,
6032 * e.g. before kvm_zap_obsolete_pages() could drop mmu_lock and yield.
6034 if (tdp_mmu_enabled)
6035 kvm_tdp_mmu_invalidate_all_roots(kvm);
6038 * Notify all vcpus to reload its shadow page table and flush TLB.
6039 * Then all vcpus will switch to new shadow page table with the new
6042 * Note: we need to do this under the protection of mmu_lock,
6043 * otherwise, vcpu would purge shadow page but miss tlb flush.
6045 kvm_make_all_cpus_request(kvm, KVM_REQ_MMU_FREE_OBSOLETE_ROOTS);
6047 kvm_zap_obsolete_pages(kvm);
6049 write_unlock(&kvm->mmu_lock);
6052 * Zap the invalidated TDP MMU roots, all SPTEs must be dropped before
6053 * returning to the caller, e.g. if the zap is in response to a memslot
6054 * deletion, mmu_notifier callbacks will be unable to reach the SPTEs
6055 * associated with the deleted memslot once the update completes, and
6056 * Deferring the zap until the final reference to the root is put would
6057 * lead to use-after-free.
6059 if (tdp_mmu_enabled)
6060 kvm_tdp_mmu_zap_invalidated_roots(kvm);
6063 static bool kvm_has_zapped_obsolete_pages(struct kvm *kvm)
6065 return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
6068 static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm,
6069 struct kvm_memory_slot *slot,
6070 struct kvm_page_track_notifier_node *node)
6072 kvm_mmu_zap_all_fast(kvm);
6075 int kvm_mmu_init_vm(struct kvm *kvm)
6077 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
6080 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6081 INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
6082 INIT_LIST_HEAD(&kvm->arch.possible_nx_huge_pages);
6083 spin_lock_init(&kvm->arch.mmu_unsync_pages_lock);
6085 if (tdp_mmu_enabled) {
6086 r = kvm_mmu_init_tdp_mmu(kvm);
6091 node->track_write = kvm_mmu_pte_write;
6092 node->track_flush_slot = kvm_mmu_invalidate_zap_pages_in_memslot;
6093 kvm_page_track_register_notifier(kvm, node);
6095 kvm->arch.split_page_header_cache.kmem_cache = mmu_page_header_cache;
6096 kvm->arch.split_page_header_cache.gfp_zero = __GFP_ZERO;
6098 kvm->arch.split_shadow_page_cache.gfp_zero = __GFP_ZERO;
6100 kvm->arch.split_desc_cache.kmem_cache = pte_list_desc_cache;
6101 kvm->arch.split_desc_cache.gfp_zero = __GFP_ZERO;
6106 static void mmu_free_vm_memory_caches(struct kvm *kvm)
6108 kvm_mmu_free_memory_cache(&kvm->arch.split_desc_cache);
6109 kvm_mmu_free_memory_cache(&kvm->arch.split_page_header_cache);
6110 kvm_mmu_free_memory_cache(&kvm->arch.split_shadow_page_cache);
6113 void kvm_mmu_uninit_vm(struct kvm *kvm)
6115 struct kvm_page_track_notifier_node *node = &kvm->arch.mmu_sp_tracker;
6117 kvm_page_track_unregister_notifier(kvm, node);
6119 if (tdp_mmu_enabled)
6120 kvm_mmu_uninit_tdp_mmu(kvm);
6122 mmu_free_vm_memory_caches(kvm);
6125 static bool kvm_rmap_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
6127 const struct kvm_memory_slot *memslot;
6128 struct kvm_memslots *slots;
6129 struct kvm_memslot_iter iter;
6134 if (!kvm_memslots_have_rmaps(kvm))
6137 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
6138 slots = __kvm_memslots(kvm, i);
6140 kvm_for_each_memslot_in_gfn_range(&iter, slots, gfn_start, gfn_end) {
6141 memslot = iter.slot;
6142 start = max(gfn_start, memslot->base_gfn);
6143 end = min(gfn_end, memslot->base_gfn + memslot->npages);
6144 if (WARN_ON_ONCE(start >= end))
6147 flush = slot_handle_level_range(kvm, memslot, __kvm_zap_rmap,
6148 PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL,
6149 start, end - 1, true, flush);
6157 * Invalidate (zap) SPTEs that cover GFNs from gfn_start and up to gfn_end
6158 * (not including it)
6160 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
6165 if (WARN_ON_ONCE(gfn_end <= gfn_start))
6168 write_lock(&kvm->mmu_lock);
6170 kvm_mmu_invalidate_begin(kvm, 0, -1ul);
6172 flush = kvm_rmap_zap_gfn_range(kvm, gfn_start, gfn_end);
6174 if (tdp_mmu_enabled) {
6175 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++)
6176 flush = kvm_tdp_mmu_zap_leafs(kvm, i, gfn_start,
6177 gfn_end, true, flush);
6181 kvm_flush_remote_tlbs_with_address(kvm, gfn_start,
6182 gfn_end - gfn_start);
6184 kvm_mmu_invalidate_end(kvm, 0, -1ul);
6186 write_unlock(&kvm->mmu_lock);
6189 static bool slot_rmap_write_protect(struct kvm *kvm,
6190 struct kvm_rmap_head *rmap_head,
6191 const struct kvm_memory_slot *slot)
6193 return rmap_write_protect(rmap_head, false);
6196 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
6197 const struct kvm_memory_slot *memslot,
6200 if (kvm_memslots_have_rmaps(kvm)) {
6201 write_lock(&kvm->mmu_lock);
6202 slot_handle_level(kvm, memslot, slot_rmap_write_protect,
6203 start_level, KVM_MAX_HUGEPAGE_LEVEL, false);
6204 write_unlock(&kvm->mmu_lock);
6207 if (tdp_mmu_enabled) {
6208 read_lock(&kvm->mmu_lock);
6209 kvm_tdp_mmu_wrprot_slot(kvm, memslot, start_level);
6210 read_unlock(&kvm->mmu_lock);
6214 static inline bool need_topup(struct kvm_mmu_memory_cache *cache, int min)
6216 return kvm_mmu_memory_cache_nr_free_objects(cache) < min;
6219 static bool need_topup_split_caches_or_resched(struct kvm *kvm)
6221 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock))
6225 * In the worst case, SPLIT_DESC_CACHE_MIN_NR_OBJECTS descriptors are needed
6226 * to split a single huge page. Calculating how many are actually needed
6227 * is possible but not worth the complexity.
6229 return need_topup(&kvm->arch.split_desc_cache, SPLIT_DESC_CACHE_MIN_NR_OBJECTS) ||
6230 need_topup(&kvm->arch.split_page_header_cache, 1) ||
6231 need_topup(&kvm->arch.split_shadow_page_cache, 1);
6234 static int topup_split_caches(struct kvm *kvm)
6237 * Allocating rmap list entries when splitting huge pages for nested
6238 * MMUs is uncommon as KVM needs to use a list if and only if there is
6239 * more than one rmap entry for a gfn, i.e. requires an L1 gfn to be
6240 * aliased by multiple L2 gfns and/or from multiple nested roots with
6241 * different roles. Aliasing gfns when using TDP is atypical for VMMs;
6242 * a few gfns are often aliased during boot, e.g. when remapping BIOS,
6243 * but aliasing rarely occurs post-boot or for many gfns. If there is
6244 * only one rmap entry, rmap->val points directly at that one entry and
6245 * doesn't need to allocate a list. Buffer the cache by the default
6246 * capacity so that KVM doesn't have to drop mmu_lock to topup if KVM
6247 * encounters an aliased gfn or two.
6249 const int capacity = SPLIT_DESC_CACHE_MIN_NR_OBJECTS +
6250 KVM_ARCH_NR_OBJS_PER_MEMORY_CACHE;
6253 lockdep_assert_held(&kvm->slots_lock);
6255 r = __kvm_mmu_topup_memory_cache(&kvm->arch.split_desc_cache, capacity,
6256 SPLIT_DESC_CACHE_MIN_NR_OBJECTS);
6260 r = kvm_mmu_topup_memory_cache(&kvm->arch.split_page_header_cache, 1);
6264 return kvm_mmu_topup_memory_cache(&kvm->arch.split_shadow_page_cache, 1);
6267 static struct kvm_mmu_page *shadow_mmu_get_sp_for_split(struct kvm *kvm, u64 *huge_sptep)
6269 struct kvm_mmu_page *huge_sp = sptep_to_sp(huge_sptep);
6270 struct shadow_page_caches caches = {};
6271 union kvm_mmu_page_role role;
6272 unsigned int access;
6275 gfn = kvm_mmu_page_get_gfn(huge_sp, spte_index(huge_sptep));
6276 access = kvm_mmu_page_get_access(huge_sp, spte_index(huge_sptep));
6279 * Note, huge page splitting always uses direct shadow pages, regardless
6280 * of whether the huge page itself is mapped by a direct or indirect
6281 * shadow page, since the huge page region itself is being directly
6282 * mapped with smaller pages.
6284 role = kvm_mmu_child_role(huge_sptep, /*direct=*/true, access);
6286 /* Direct SPs do not require a shadowed_info_cache. */
6287 caches.page_header_cache = &kvm->arch.split_page_header_cache;
6288 caches.shadow_page_cache = &kvm->arch.split_shadow_page_cache;
6290 /* Safe to pass NULL for vCPU since requesting a direct SP. */
6291 return __kvm_mmu_get_shadow_page(kvm, NULL, &caches, gfn, role);
6294 static void shadow_mmu_split_huge_page(struct kvm *kvm,
6295 const struct kvm_memory_slot *slot,
6299 struct kvm_mmu_memory_cache *cache = &kvm->arch.split_desc_cache;
6300 u64 huge_spte = READ_ONCE(*huge_sptep);
6301 struct kvm_mmu_page *sp;
6307 sp = shadow_mmu_get_sp_for_split(kvm, huge_sptep);
6309 for (index = 0; index < SPTE_ENT_PER_PAGE; index++) {
6310 sptep = &sp->spt[index];
6311 gfn = kvm_mmu_page_get_gfn(sp, index);
6314 * The SP may already have populated SPTEs, e.g. if this huge
6315 * page is aliased by multiple sptes with the same access
6316 * permissions. These entries are guaranteed to map the same
6317 * gfn-to-pfn translation since the SP is direct, so no need to
6320 * However, if a given SPTE points to a lower level page table,
6321 * that lower level page table may only be partially populated.
6322 * Installing such SPTEs would effectively unmap a potion of the
6323 * huge page. Unmapping guest memory always requires a TLB flush
6324 * since a subsequent operation on the unmapped regions would
6325 * fail to detect the need to flush.
6327 if (is_shadow_present_pte(*sptep)) {
6328 flush |= !is_last_spte(*sptep, sp->role.level);
6332 spte = make_huge_page_split_spte(kvm, huge_spte, sp->role, index);
6333 mmu_spte_set(sptep, spte);
6334 __rmap_add(kvm, cache, slot, sptep, gfn, sp->role.access);
6337 __link_shadow_page(kvm, cache, huge_sptep, sp, flush);
6340 static int shadow_mmu_try_split_huge_page(struct kvm *kvm,
6341 const struct kvm_memory_slot *slot,
6344 struct kvm_mmu_page *huge_sp = sptep_to_sp(huge_sptep);
6349 /* Grab information for the tracepoint before dropping the MMU lock. */
6350 gfn = kvm_mmu_page_get_gfn(huge_sp, spte_index(huge_sptep));
6351 level = huge_sp->role.level;
6354 if (kvm_mmu_available_pages(kvm) <= KVM_MIN_FREE_MMU_PAGES) {
6359 if (need_topup_split_caches_or_resched(kvm)) {
6360 write_unlock(&kvm->mmu_lock);
6363 * If the topup succeeds, return -EAGAIN to indicate that the
6364 * rmap iterator should be restarted because the MMU lock was
6367 r = topup_split_caches(kvm) ?: -EAGAIN;
6368 write_lock(&kvm->mmu_lock);
6372 shadow_mmu_split_huge_page(kvm, slot, huge_sptep);
6375 trace_kvm_mmu_split_huge_page(gfn, spte, level, r);
6379 static bool shadow_mmu_try_split_huge_pages(struct kvm *kvm,
6380 struct kvm_rmap_head *rmap_head,
6381 const struct kvm_memory_slot *slot)
6383 struct rmap_iterator iter;
6384 struct kvm_mmu_page *sp;
6389 for_each_rmap_spte(rmap_head, &iter, huge_sptep) {
6390 sp = sptep_to_sp(huge_sptep);
6392 /* TDP MMU is enabled, so rmap only contains nested MMU SPs. */
6393 if (WARN_ON_ONCE(!sp->role.guest_mode))
6396 /* The rmaps should never contain non-leaf SPTEs. */
6397 if (WARN_ON_ONCE(!is_large_pte(*huge_sptep)))
6400 /* SPs with level >PG_LEVEL_4K should never by unsync. */
6401 if (WARN_ON_ONCE(sp->unsync))
6404 /* Don't bother splitting huge pages on invalid SPs. */
6405 if (sp->role.invalid)
6408 r = shadow_mmu_try_split_huge_page(kvm, slot, huge_sptep);
6411 * The split succeeded or needs to be retried because the MMU
6412 * lock was dropped. Either way, restart the iterator to get it
6413 * back into a consistent state.
6415 if (!r || r == -EAGAIN)
6418 /* The split failed and shouldn't be retried (e.g. -ENOMEM). */
6425 static void kvm_shadow_mmu_try_split_huge_pages(struct kvm *kvm,
6426 const struct kvm_memory_slot *slot,
6427 gfn_t start, gfn_t end,
6433 * Split huge pages starting with KVM_MAX_HUGEPAGE_LEVEL and working
6434 * down to the target level. This ensures pages are recursively split
6435 * all the way to the target level. There's no need to split pages
6436 * already at the target level.
6438 for (level = KVM_MAX_HUGEPAGE_LEVEL; level > target_level; level--) {
6439 slot_handle_level_range(kvm, slot, shadow_mmu_try_split_huge_pages,
6440 level, level, start, end - 1, true, false);
6444 /* Must be called with the mmu_lock held in write-mode. */
6445 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
6446 const struct kvm_memory_slot *memslot,
6450 if (!tdp_mmu_enabled)
6453 if (kvm_memslots_have_rmaps(kvm))
6454 kvm_shadow_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level);
6456 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level, false);
6459 * A TLB flush is unnecessary at this point for the same resons as in
6460 * kvm_mmu_slot_try_split_huge_pages().
6464 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
6465 const struct kvm_memory_slot *memslot,
6468 u64 start = memslot->base_gfn;
6469 u64 end = start + memslot->npages;
6471 if (!tdp_mmu_enabled)
6474 if (kvm_memslots_have_rmaps(kvm)) {
6475 write_lock(&kvm->mmu_lock);
6476 kvm_shadow_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level);
6477 write_unlock(&kvm->mmu_lock);
6480 read_lock(&kvm->mmu_lock);
6481 kvm_tdp_mmu_try_split_huge_pages(kvm, memslot, start, end, target_level, true);
6482 read_unlock(&kvm->mmu_lock);
6485 * No TLB flush is necessary here. KVM will flush TLBs after
6486 * write-protecting and/or clearing dirty on the newly split SPTEs to
6487 * ensure that guest writes are reflected in the dirty log before the
6488 * ioctl to enable dirty logging on this memslot completes. Since the
6489 * split SPTEs retain the write and dirty bits of the huge SPTE, it is
6490 * safe for KVM to decide if a TLB flush is necessary based on the split
6495 static bool kvm_mmu_zap_collapsible_spte(struct kvm *kvm,
6496 struct kvm_rmap_head *rmap_head,
6497 const struct kvm_memory_slot *slot)
6500 struct rmap_iterator iter;
6501 int need_tlb_flush = 0;
6502 struct kvm_mmu_page *sp;
6505 for_each_rmap_spte(rmap_head, &iter, sptep) {
6506 sp = sptep_to_sp(sptep);
6509 * We cannot do huge page mapping for indirect shadow pages,
6510 * which are found on the last rmap (level = 1) when not using
6511 * tdp; such shadow pages are synced with the page table in
6512 * the guest, and the guest page table is using 4K page size
6513 * mapping if the indirect sp has level = 1.
6515 if (sp->role.direct &&
6516 sp->role.level < kvm_mmu_max_mapping_level(kvm, slot, sp->gfn,
6518 kvm_zap_one_rmap_spte(kvm, rmap_head, sptep);
6520 if (kvm_available_flush_tlb_with_range())
6521 kvm_flush_remote_tlbs_with_address(kvm, sp->gfn,
6522 KVM_PAGES_PER_HPAGE(sp->role.level));
6530 return need_tlb_flush;
6533 static void kvm_rmap_zap_collapsible_sptes(struct kvm *kvm,
6534 const struct kvm_memory_slot *slot)
6537 * Note, use KVM_MAX_HUGEPAGE_LEVEL - 1 since there's no need to zap
6538 * pages that are already mapped at the maximum hugepage level.
6540 if (slot_handle_level(kvm, slot, kvm_mmu_zap_collapsible_spte,
6541 PG_LEVEL_4K, KVM_MAX_HUGEPAGE_LEVEL - 1, true))
6542 kvm_arch_flush_remote_tlbs_memslot(kvm, slot);
6545 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
6546 const struct kvm_memory_slot *slot)
6548 if (kvm_memslots_have_rmaps(kvm)) {
6549 write_lock(&kvm->mmu_lock);
6550 kvm_rmap_zap_collapsible_sptes(kvm, slot);
6551 write_unlock(&kvm->mmu_lock);
6554 if (tdp_mmu_enabled) {
6555 read_lock(&kvm->mmu_lock);
6556 kvm_tdp_mmu_zap_collapsible_sptes(kvm, slot);
6557 read_unlock(&kvm->mmu_lock);
6561 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm,
6562 const struct kvm_memory_slot *memslot)
6565 * All current use cases for flushing the TLBs for a specific memslot
6566 * related to dirty logging, and many do the TLB flush out of mmu_lock.
6567 * The interaction between the various operations on memslot must be
6568 * serialized by slots_locks to ensure the TLB flush from one operation
6569 * is observed by any other operation on the same memslot.
6571 lockdep_assert_held(&kvm->slots_lock);
6572 kvm_flush_remote_tlbs_with_address(kvm, memslot->base_gfn,
6576 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
6577 const struct kvm_memory_slot *memslot)
6579 if (kvm_memslots_have_rmaps(kvm)) {
6580 write_lock(&kvm->mmu_lock);
6582 * Clear dirty bits only on 4k SPTEs since the legacy MMU only
6583 * support dirty logging at a 4k granularity.
6585 slot_handle_level_4k(kvm, memslot, __rmap_clear_dirty, false);
6586 write_unlock(&kvm->mmu_lock);
6589 if (tdp_mmu_enabled) {
6590 read_lock(&kvm->mmu_lock);
6591 kvm_tdp_mmu_clear_dirty_slot(kvm, memslot);
6592 read_unlock(&kvm->mmu_lock);
6596 * The caller will flush the TLBs after this function returns.
6598 * It's also safe to flush TLBs out of mmu lock here as currently this
6599 * function is only used for dirty logging, in which case flushing TLB
6600 * out of mmu lock also guarantees no dirty pages will be lost in
6605 void kvm_mmu_zap_all(struct kvm *kvm)
6607 struct kvm_mmu_page *sp, *node;
6608 LIST_HEAD(invalid_list);
6611 write_lock(&kvm->mmu_lock);
6613 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) {
6614 if (WARN_ON(sp->role.invalid))
6616 if (__kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list, &ign))
6618 if (cond_resched_rwlock_write(&kvm->mmu_lock))
6622 kvm_mmu_commit_zap_page(kvm, &invalid_list);
6624 if (tdp_mmu_enabled)
6625 kvm_tdp_mmu_zap_all(kvm);
6627 write_unlock(&kvm->mmu_lock);
6630 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen)
6632 WARN_ON(gen & KVM_MEMSLOT_GEN_UPDATE_IN_PROGRESS);
6634 gen &= MMIO_SPTE_GEN_MASK;
6637 * Generation numbers are incremented in multiples of the number of
6638 * address spaces in order to provide unique generations across all
6639 * address spaces. Strip what is effectively the address space
6640 * modifier prior to checking for a wrap of the MMIO generation so
6641 * that a wrap in any address space is detected.
6643 gen &= ~((u64)KVM_ADDRESS_SPACE_NUM - 1);
6646 * The very rare case: if the MMIO generation number has wrapped,
6647 * zap all shadow pages.
6649 if (unlikely(gen == 0)) {
6650 kvm_debug_ratelimited("kvm: zapping shadow pages for mmio generation wraparound\n");
6651 kvm_mmu_zap_all_fast(kvm);
6655 static unsigned long
6656 mmu_shrink_scan(struct shrinker *shrink, struct shrink_control *sc)
6659 int nr_to_scan = sc->nr_to_scan;
6660 unsigned long freed = 0;
6662 mutex_lock(&kvm_lock);
6664 list_for_each_entry(kvm, &vm_list, vm_list) {
6666 LIST_HEAD(invalid_list);
6669 * Never scan more than sc->nr_to_scan VM instances.
6670 * Will not hit this condition practically since we do not try
6671 * to shrink more than one VM and it is very unlikely to see
6672 * !n_used_mmu_pages so many times.
6677 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
6678 * here. We may skip a VM instance errorneosly, but we do not
6679 * want to shrink a VM that only started to populate its MMU
6682 if (!kvm->arch.n_used_mmu_pages &&
6683 !kvm_has_zapped_obsolete_pages(kvm))
6686 idx = srcu_read_lock(&kvm->srcu);
6687 write_lock(&kvm->mmu_lock);
6689 if (kvm_has_zapped_obsolete_pages(kvm)) {
6690 kvm_mmu_commit_zap_page(kvm,
6691 &kvm->arch.zapped_obsolete_pages);
6695 freed = kvm_mmu_zap_oldest_mmu_pages(kvm, sc->nr_to_scan);
6698 write_unlock(&kvm->mmu_lock);
6699 srcu_read_unlock(&kvm->srcu, idx);
6702 * unfair on small ones
6703 * per-vm shrinkers cry out
6704 * sadness comes quickly
6706 list_move_tail(&kvm->vm_list, &vm_list);
6710 mutex_unlock(&kvm_lock);
6714 static unsigned long
6715 mmu_shrink_count(struct shrinker *shrink, struct shrink_control *sc)
6717 return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
6720 static struct shrinker mmu_shrinker = {
6721 .count_objects = mmu_shrink_count,
6722 .scan_objects = mmu_shrink_scan,
6723 .seeks = DEFAULT_SEEKS * 10,
6726 static void mmu_destroy_caches(void)
6728 kmem_cache_destroy(pte_list_desc_cache);
6729 kmem_cache_destroy(mmu_page_header_cache);
6732 static bool get_nx_auto_mode(void)
6734 /* Return true when CPU has the bug, and mitigations are ON */
6735 return boot_cpu_has_bug(X86_BUG_ITLB_MULTIHIT) && !cpu_mitigations_off();
6738 static void __set_nx_huge_pages(bool val)
6740 nx_huge_pages = itlb_multihit_kvm_mitigation = val;
6743 static int set_nx_huge_pages(const char *val, const struct kernel_param *kp)
6745 bool old_val = nx_huge_pages;
6748 /* In "auto" mode deploy workaround only if CPU has the bug. */
6749 if (sysfs_streq(val, "off"))
6751 else if (sysfs_streq(val, "force"))
6753 else if (sysfs_streq(val, "auto"))
6754 new_val = get_nx_auto_mode();
6755 else if (strtobool(val, &new_val) < 0)
6758 __set_nx_huge_pages(new_val);
6760 if (new_val != old_val) {
6763 mutex_lock(&kvm_lock);
6765 list_for_each_entry(kvm, &vm_list, vm_list) {
6766 mutex_lock(&kvm->slots_lock);
6767 kvm_mmu_zap_all_fast(kvm);
6768 mutex_unlock(&kvm->slots_lock);
6770 wake_up_process(kvm->arch.nx_huge_page_recovery_thread);
6772 mutex_unlock(&kvm_lock);
6779 * nx_huge_pages needs to be resolved to true/false when kvm.ko is loaded, as
6780 * its default value of -1 is technically undefined behavior for a boolean.
6781 * Forward the module init call to SPTE code so that it too can handle module
6782 * params that need to be resolved/snapshot.
6784 void __init kvm_mmu_x86_module_init(void)
6786 if (nx_huge_pages == -1)
6787 __set_nx_huge_pages(get_nx_auto_mode());
6790 * Snapshot userspace's desire to enable the TDP MMU. Whether or not the
6791 * TDP MMU is actually enabled is determined in kvm_configure_mmu()
6792 * when the vendor module is loaded.
6794 tdp_mmu_allowed = tdp_mmu_enabled;
6796 kvm_mmu_spte_module_init();
6800 * The bulk of the MMU initialization is deferred until the vendor module is
6801 * loaded as many of the masks/values may be modified by VMX or SVM, i.e. need
6802 * to be reset when a potentially different vendor module is loaded.
6804 int kvm_mmu_vendor_module_init(void)
6809 * MMU roles use union aliasing which is, generally speaking, an
6810 * undefined behavior. However, we supposedly know how compilers behave
6811 * and the current status quo is unlikely to change. Guardians below are
6812 * supposed to let us know if the assumption becomes false.
6814 BUILD_BUG_ON(sizeof(union kvm_mmu_page_role) != sizeof(u32));
6815 BUILD_BUG_ON(sizeof(union kvm_mmu_extended_role) != sizeof(u32));
6816 BUILD_BUG_ON(sizeof(union kvm_cpu_role) != sizeof(u64));
6818 kvm_mmu_reset_all_pte_masks();
6820 pte_list_desc_cache = kmem_cache_create("pte_list_desc",
6821 sizeof(struct pte_list_desc),
6822 0, SLAB_ACCOUNT, NULL);
6823 if (!pte_list_desc_cache)
6826 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
6827 sizeof(struct kvm_mmu_page),
6828 0, SLAB_ACCOUNT, NULL);
6829 if (!mmu_page_header_cache)
6832 if (percpu_counter_init(&kvm_total_used_mmu_pages, 0, GFP_KERNEL))
6835 ret = register_shrinker(&mmu_shrinker, "x86-mmu");
6842 percpu_counter_destroy(&kvm_total_used_mmu_pages);
6844 mmu_destroy_caches();
6848 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
6850 kvm_mmu_unload(vcpu);
6851 free_mmu_pages(&vcpu->arch.root_mmu);
6852 free_mmu_pages(&vcpu->arch.guest_mmu);
6853 mmu_free_memory_caches(vcpu);
6856 void kvm_mmu_vendor_module_exit(void)
6858 mmu_destroy_caches();
6859 percpu_counter_destroy(&kvm_total_used_mmu_pages);
6860 unregister_shrinker(&mmu_shrinker);
6864 * Calculate the effective recovery period, accounting for '0' meaning "let KVM
6865 * select a halving time of 1 hour". Returns true if recovery is enabled.
6867 static bool calc_nx_huge_pages_recovery_period(uint *period)
6870 * Use READ_ONCE to get the params, this may be called outside of the
6871 * param setters, e.g. by the kthread to compute its next timeout.
6873 bool enabled = READ_ONCE(nx_huge_pages);
6874 uint ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
6876 if (!enabled || !ratio)
6879 *period = READ_ONCE(nx_huge_pages_recovery_period_ms);
6881 /* Make sure the period is not less than one second. */
6882 ratio = min(ratio, 3600u);
6883 *period = 60 * 60 * 1000 / ratio;
6888 static int set_nx_huge_pages_recovery_param(const char *val, const struct kernel_param *kp)
6890 bool was_recovery_enabled, is_recovery_enabled;
6891 uint old_period, new_period;
6894 was_recovery_enabled = calc_nx_huge_pages_recovery_period(&old_period);
6896 err = param_set_uint(val, kp);
6900 is_recovery_enabled = calc_nx_huge_pages_recovery_period(&new_period);
6902 if (is_recovery_enabled &&
6903 (!was_recovery_enabled || old_period > new_period)) {
6906 mutex_lock(&kvm_lock);
6908 list_for_each_entry(kvm, &vm_list, vm_list)
6909 wake_up_process(kvm->arch.nx_huge_page_recovery_thread);
6911 mutex_unlock(&kvm_lock);
6917 static void kvm_recover_nx_huge_pages(struct kvm *kvm)
6919 unsigned long nx_lpage_splits = kvm->stat.nx_lpage_splits;
6920 struct kvm_memory_slot *slot;
6922 struct kvm_mmu_page *sp;
6924 LIST_HEAD(invalid_list);
6928 rcu_idx = srcu_read_lock(&kvm->srcu);
6929 write_lock(&kvm->mmu_lock);
6932 * Zapping TDP MMU shadow pages, including the remote TLB flush, must
6933 * be done under RCU protection, because the pages are freed via RCU
6938 ratio = READ_ONCE(nx_huge_pages_recovery_ratio);
6939 to_zap = ratio ? DIV_ROUND_UP(nx_lpage_splits, ratio) : 0;
6940 for ( ; to_zap; --to_zap) {
6941 if (list_empty(&kvm->arch.possible_nx_huge_pages))
6945 * We use a separate list instead of just using active_mmu_pages
6946 * because the number of shadow pages that be replaced with an
6947 * NX huge page is expected to be relatively small compared to
6948 * the total number of shadow pages. And because the TDP MMU
6949 * doesn't use active_mmu_pages.
6951 sp = list_first_entry(&kvm->arch.possible_nx_huge_pages,
6952 struct kvm_mmu_page,
6953 possible_nx_huge_page_link);
6954 WARN_ON_ONCE(!sp->nx_huge_page_disallowed);
6955 WARN_ON_ONCE(!sp->role.direct);
6958 * Unaccount and do not attempt to recover any NX Huge Pages
6959 * that are being dirty tracked, as they would just be faulted
6960 * back in as 4KiB pages. The NX Huge Pages in this slot will be
6961 * recovered, along with all the other huge pages in the slot,
6962 * when dirty logging is disabled.
6964 * Since gfn_to_memslot() is relatively expensive, it helps to
6965 * skip it if it the test cannot possibly return true. On the
6966 * other hand, if any memslot has logging enabled, chances are
6967 * good that all of them do, in which case unaccount_nx_huge_page()
6968 * is much cheaper than zapping the page.
6970 * If a memslot update is in progress, reading an incorrect value
6971 * of kvm->nr_memslots_dirty_logging is not a problem: if it is
6972 * becoming zero, gfn_to_memslot() will be done unnecessarily; if
6973 * it is becoming nonzero, the page will be zapped unnecessarily.
6974 * Either way, this only affects efficiency in racy situations,
6975 * and not correctness.
6978 if (atomic_read(&kvm->nr_memslots_dirty_logging)) {
6979 slot = gfn_to_memslot(kvm, sp->gfn);
6980 WARN_ON_ONCE(!slot);
6983 if (slot && kvm_slot_dirty_track_enabled(slot))
6984 unaccount_nx_huge_page(kvm, sp);
6985 else if (is_tdp_mmu_page(sp))
6986 flush |= kvm_tdp_mmu_zap_sp(kvm, sp);
6988 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
6989 WARN_ON_ONCE(sp->nx_huge_page_disallowed);
6991 if (need_resched() || rwlock_needbreak(&kvm->mmu_lock)) {
6992 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
6995 cond_resched_rwlock_write(&kvm->mmu_lock);
7001 kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush);
7005 write_unlock(&kvm->mmu_lock);
7006 srcu_read_unlock(&kvm->srcu, rcu_idx);
7009 static long get_nx_huge_page_recovery_timeout(u64 start_time)
7014 enabled = calc_nx_huge_pages_recovery_period(&period);
7016 return enabled ? start_time + msecs_to_jiffies(period) - get_jiffies_64()
7017 : MAX_SCHEDULE_TIMEOUT;
7020 static int kvm_nx_huge_page_recovery_worker(struct kvm *kvm, uintptr_t data)
7023 long remaining_time;
7026 start_time = get_jiffies_64();
7027 remaining_time = get_nx_huge_page_recovery_timeout(start_time);
7029 set_current_state(TASK_INTERRUPTIBLE);
7030 while (!kthread_should_stop() && remaining_time > 0) {
7031 schedule_timeout(remaining_time);
7032 remaining_time = get_nx_huge_page_recovery_timeout(start_time);
7033 set_current_state(TASK_INTERRUPTIBLE);
7036 set_current_state(TASK_RUNNING);
7038 if (kthread_should_stop())
7041 kvm_recover_nx_huge_pages(kvm);
7045 int kvm_mmu_post_init_vm(struct kvm *kvm)
7049 err = kvm_vm_create_worker_thread(kvm, kvm_nx_huge_page_recovery_worker, 0,
7050 "kvm-nx-lpage-recovery",
7051 &kvm->arch.nx_huge_page_recovery_thread);
7053 kthread_unpark(kvm->arch.nx_huge_page_recovery_thread);
7058 void kvm_mmu_pre_destroy_vm(struct kvm *kvm)
7060 if (kvm->arch.nx_huge_page_recovery_thread)
7061 kthread_stop(kvm->arch.nx_huge_page_recovery_thread);