1 #ifndef __KVM_X86_LAPIC_H
2 #define __KVM_X86_LAPIC_H
6 #include <linux/kvm_host.h>
8 #define KVM_APIC_INIT 0
9 #define KVM_APIC_SIPI 1
10 #define KVM_APIC_LVT_NUM 6
12 #define KVM_APIC_SHORT_MASK 0xc0000
13 #define KVM_APIC_DEST_MASK 0x800
17 s64 period; /* unit: ns */
21 u64 expired_tscdeadline;
22 atomic_t pending; /* accumulated triggered timers */
26 unsigned long base_address;
27 struct kvm_io_device dev;
28 struct kvm_timer lapic_timer;
30 struct kvm_vcpu *vcpu;
33 bool lvt0_in_nmi_mode;
34 /* Number of bits set in ISR. */
36 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
37 int highest_isr_cache;
39 * APIC register page. The layout matches the register layout seen by
40 * the guest 1:1, because it is accessed by the vmx microcode.
41 * Note: Only one register, the TPR, is used by the microcode.
45 struct gfn_to_hva_cache vapic_cache;
46 unsigned long pending_events;
47 unsigned int sipi_vector;
52 int kvm_create_lapic(struct kvm_vcpu *vcpu);
53 void kvm_free_lapic(struct kvm_vcpu *vcpu);
55 int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
56 int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
57 int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
58 void kvm_apic_accept_events(struct kvm_vcpu *vcpu);
59 void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event);
60 u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
61 void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
62 void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
63 void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
64 u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
65 void kvm_apic_set_version(struct kvm_vcpu *vcpu);
66 int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val);
67 int kvm_lapic_reg_read(struct kvm_lapic *apic, u32 offset, int len,
69 bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
70 int short_hand, unsigned int dest, int dest_mode);
72 void __kvm_apic_update_irr(u32 *pir, void *regs);
73 void kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir);
74 int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
75 struct dest_map *dest_map);
76 int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
78 bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
79 struct kvm_lapic_irq *irq, int *r, struct dest_map *dest_map);
81 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
82 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
83 void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
84 struct kvm_lapic_state *s);
85 int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
87 u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
88 void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
90 void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset);
91 void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector);
93 int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
94 void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
95 void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
97 int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
98 int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
100 int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
101 int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
103 static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
105 return vcpu->arch.hyperv.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
108 int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data);
109 void kvm_lapic_init(void);
111 #define VEC_POS(v) ((v) & (32 - 1))
112 #define REG_POS(v) (((v) >> 5) << 4)
114 static inline void kvm_lapic_set_vector(int vec, void *bitmap)
116 set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
119 static inline void kvm_lapic_set_irr(int vec, struct kvm_lapic *apic)
121 kvm_lapic_set_vector(vec, apic->regs + APIC_IRR);
123 * irr_pending must be true if any interrupt is pending; set it after
124 * APIC_IRR to avoid race with apic_clear_irr
126 apic->irr_pending = true;
129 static inline u32 kvm_lapic_get_reg(struct kvm_lapic *apic, int reg_off)
131 return *((u32 *) (apic->regs + reg_off));
134 static inline void kvm_lapic_set_reg(struct kvm_lapic *apic, int reg_off, u32 val)
136 *((u32 *) (apic->regs + reg_off)) = val;
139 extern struct static_key kvm_no_apic_vcpu;
141 static inline bool lapic_in_kernel(struct kvm_vcpu *vcpu)
143 if (static_key_false(&kvm_no_apic_vcpu))
144 return vcpu->arch.apic;
148 extern struct static_key_deferred apic_hw_disabled;
150 static inline int kvm_apic_hw_enabled(struct kvm_lapic *apic)
152 if (static_key_false(&apic_hw_disabled.key))
153 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE;
154 return MSR_IA32_APICBASE_ENABLE;
157 extern struct static_key_deferred apic_sw_disabled;
159 static inline bool kvm_apic_sw_enabled(struct kvm_lapic *apic)
161 if (static_key_false(&apic_sw_disabled.key))
162 return apic->sw_enabled;
166 static inline bool kvm_apic_present(struct kvm_vcpu *vcpu)
168 return lapic_in_kernel(vcpu) && kvm_apic_hw_enabled(vcpu->arch.apic);
171 static inline int kvm_lapic_enabled(struct kvm_vcpu *vcpu)
173 return kvm_apic_present(vcpu) && kvm_apic_sw_enabled(vcpu->arch.apic);
176 static inline int apic_x2apic_mode(struct kvm_lapic *apic)
178 return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
181 static inline bool kvm_vcpu_apicv_active(struct kvm_vcpu *vcpu)
183 return vcpu->arch.apic && vcpu->arch.apicv_active;
186 static inline bool kvm_apic_has_events(struct kvm_vcpu *vcpu)
188 return lapic_in_kernel(vcpu) && vcpu->arch.apic->pending_events;
191 static inline bool kvm_lowest_prio_delivery(struct kvm_lapic_irq *irq)
193 return (irq->delivery_mode == APIC_DM_LOWEST ||
194 irq->msi_redir_hint);
197 static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu)
199 return lapic_in_kernel(vcpu) && test_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
202 static inline int kvm_apic_id(struct kvm_lapic *apic)
204 return (kvm_lapic_get_reg(apic, APIC_ID) >> 24) & 0xff;
207 bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);
209 void wait_lapic_expire(struct kvm_vcpu *vcpu);
211 bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
212 struct kvm_vcpu **dest_vcpu);
213 int kvm_vector_to_index(u32 vector, u32 dest_vcpus,
214 const unsigned long *bitmap, u32 bitmap_size);