2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
29 #include <linux/bitops.h>
32 #include <linux/kvm_host.h>
34 static void pic_lock(struct kvm_pic *s)
39 static void pic_unlock(struct kvm_pic *s)
41 struct kvm *kvm = s->kvm;
42 unsigned acks = s->pending_acks;
43 bool wakeup = s->wakeup_needed;
44 struct kvm_vcpu *vcpu;
47 s->wakeup_needed = false;
49 spin_unlock(&s->lock);
52 kvm_notify_acked_irq(kvm, SELECT_PIC(__ffs(acks)),
58 vcpu = s->kvm->vcpus[0];
64 static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
66 s->isr &= ~(1 << irq);
67 s->isr_ack |= (1 << irq);
70 void kvm_pic_clear_isr_ack(struct kvm *kvm)
72 struct kvm_pic *s = pic_irqchip(kvm);
73 s->pics[0].isr_ack = 0xff;
74 s->pics[1].isr_ack = 0xff;
78 * set irq level. If an edge is detected, then the IRR is set to 1
80 static inline void pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
84 if (s->elcr & mask) /* level triggered */
92 else /* edge triggered */
94 if ((s->last_irr & mask) == 0)
102 * return the highest priority found in mask (highest = smallest
103 * number). Return 8 if no irq
105 static inline int get_priority(struct kvm_kpic_state *s, int mask)
111 while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)
117 * return the pic wanted interrupt. return -1 if none
119 static int pic_get_irq(struct kvm_kpic_state *s)
121 int mask, cur_priority, priority;
123 mask = s->irr & ~s->imr;
124 priority = get_priority(s, mask);
128 * compute current priority. If special fully nested mode on the
129 * master, the IRQ coming from the slave is not taken into account
130 * for the priority computation.
133 if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])
135 cur_priority = get_priority(s, mask);
136 if (priority < cur_priority)
138 * higher priority found: an irq should be generated
140 return (priority + s->priority_add) & 7;
146 * raise irq to CPU if necessary. must be called every time the active
149 static void pic_update_irq(struct kvm_pic *s)
153 irq2 = pic_get_irq(&s->pics[1]);
156 * if irq request by slave pic, signal master PIC
158 pic_set_irq1(&s->pics[0], 2, 1);
159 pic_set_irq1(&s->pics[0], 2, 0);
161 irq = pic_get_irq(&s->pics[0]);
163 s->irq_request(s->irq_request_opaque, 1);
165 s->irq_request(s->irq_request_opaque, 0);
168 void kvm_pic_update_irq(struct kvm_pic *s)
175 void kvm_pic_set_irq(void *opaque, int irq, int level)
177 struct kvm_pic *s = opaque;
180 if (irq >= 0 && irq < PIC_NUM_PINS) {
181 pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
188 * acknowledge interrupt 'irq'
190 static inline void pic_intack(struct kvm_kpic_state *s, int irq)
194 if (s->rotate_on_auto_eoi)
195 s->priority_add = (irq + 1) & 7;
196 pic_clear_isr(s, irq);
199 * We don't clear a level sensitive interrupt here
201 if (!(s->elcr & (1 << irq)))
202 s->irr &= ~(1 << irq);
205 int kvm_pic_read_irq(struct kvm *kvm)
207 int irq, irq2, intno;
208 struct kvm_pic *s = pic_irqchip(kvm);
211 irq = pic_get_irq(&s->pics[0]);
213 pic_intack(&s->pics[0], irq);
215 irq2 = pic_get_irq(&s->pics[1]);
217 pic_intack(&s->pics[1], irq2);
220 * spurious IRQ on slave controller
223 intno = s->pics[1].irq_base + irq2;
226 intno = s->pics[0].irq_base + irq;
229 * spurious IRQ on host controller
232 intno = s->pics[0].irq_base + irq;
236 kvm_notify_acked_irq(kvm, SELECT_PIC(irq), irq);
241 void kvm_pic_reset(struct kvm_kpic_state *s)
244 struct kvm *kvm = s->pics_state->irq_request_opaque;
245 struct kvm_vcpu *vcpu0 = kvm->vcpus[0];
247 if (s == &s->pics_state->pics[0])
252 for (irq = 0; irq < PIC_NUM_PINS/2; irq++) {
253 if (vcpu0 && kvm_apic_accept_pic_intr(vcpu0))
254 if (s->irr & (1 << irq) || s->isr & (1 << irq)) {
256 s->pics_state->pending_acks |= 1 << n;
266 s->read_reg_select = 0;
271 s->rotate_on_auto_eoi = 0;
272 s->special_fully_nested_mode = 0;
276 static void pic_ioport_write(void *opaque, u32 addr, u32 val)
278 struct kvm_kpic_state *s = opaque;
279 int priority, cmd, irq;
284 kvm_pic_reset(s); /* init */
286 * deassert a pending interrupt
288 s->pics_state->irq_request(s->pics_state->
289 irq_request_opaque, 0);
293 printk(KERN_ERR "single mode not supported");
296 "level sensitive irq not supported");
297 } else if (val & 0x08) {
301 s->read_reg_select = val & 1;
303 s->special_mask = (val >> 5) & 1;
309 s->rotate_on_auto_eoi = cmd >> 2;
311 case 1: /* end of interrupt */
313 priority = get_priority(s, s->isr);
315 irq = (priority + s->priority_add) & 7;
316 pic_clear_isr(s, irq);
318 s->priority_add = (irq + 1) & 7;
319 pic_update_irq(s->pics_state);
324 pic_clear_isr(s, irq);
325 pic_update_irq(s->pics_state);
328 s->priority_add = (val + 1) & 7;
329 pic_update_irq(s->pics_state);
333 s->priority_add = (irq + 1) & 7;
334 pic_clear_isr(s, irq);
335 pic_update_irq(s->pics_state);
338 break; /* no operation */
342 switch (s->init_state) {
343 case 0: /* normal mode */
345 pic_update_irq(s->pics_state);
348 s->irq_base = val & 0xf8;
358 s->special_fully_nested_mode = (val >> 4) & 1;
359 s->auto_eoi = (val >> 1) & 1;
365 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1)
369 ret = pic_get_irq(s);
372 s->pics_state->pics[0].isr &= ~(1 << 2);
373 s->pics_state->pics[0].irr &= ~(1 << 2);
375 s->irr &= ~(1 << ret);
376 pic_clear_isr(s, ret);
377 if (addr1 >> 7 || ret != 2)
378 pic_update_irq(s->pics_state);
381 pic_update_irq(s->pics_state);
387 static u32 pic_ioport_read(void *opaque, u32 addr1)
389 struct kvm_kpic_state *s = opaque;
396 ret = pic_poll_read(s, addr1);
400 if (s->read_reg_select)
409 static void elcr_ioport_write(void *opaque, u32 addr, u32 val)
411 struct kvm_kpic_state *s = opaque;
412 s->elcr = val & s->elcr_mask;
415 static u32 elcr_ioport_read(void *opaque, u32 addr1)
417 struct kvm_kpic_state *s = opaque;
421 static int picdev_in_range(struct kvm_io_device *this, gpa_t addr,
422 int len, int is_write)
437 static void picdev_write(struct kvm_io_device *this,
438 gpa_t addr, int len, const void *val)
440 struct kvm_pic *s = this->private;
441 unsigned char data = *(unsigned char *)val;
444 if (printk_ratelimit())
445 printk(KERN_ERR "PIC: non byte write\n");
454 pic_ioport_write(&s->pics[addr >> 7], addr, data);
458 elcr_ioport_write(&s->pics[addr & 1], addr, data);
464 static void picdev_read(struct kvm_io_device *this,
465 gpa_t addr, int len, void *val)
467 struct kvm_pic *s = this->private;
468 unsigned char data = 0;
471 if (printk_ratelimit())
472 printk(KERN_ERR "PIC: non byte read\n");
481 data = pic_ioport_read(&s->pics[addr >> 7], addr);
485 data = elcr_ioport_read(&s->pics[addr & 1], addr);
488 *(unsigned char *)val = data;
493 * callback when PIC0 irq status changed
495 static void pic_irq_request(void *opaque, int level)
497 struct kvm *kvm = opaque;
498 struct kvm_vcpu *vcpu = kvm->vcpus[0];
499 struct kvm_pic *s = pic_irqchip(kvm);
500 int irq = pic_get_irq(&s->pics[0]);
503 if (vcpu && level && (s->pics[0].isr_ack & (1 << irq))) {
504 s->pics[0].isr_ack &= ~(1 << irq);
505 s->wakeup_needed = true;
509 struct kvm_pic *kvm_create_pic(struct kvm *kvm)
512 s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
515 spin_lock_init(&s->lock);
517 s->pics[0].elcr_mask = 0xf8;
518 s->pics[1].elcr_mask = 0xde;
519 s->irq_request = pic_irq_request;
520 s->irq_request_opaque = kvm;
521 s->pics[0].pics_state = s;
522 s->pics[1].pics_state = s;
525 * Initialize PIO device
527 s->dev.read = picdev_read;
528 s->dev.write = picdev_write;
529 s->dev.in_range = picdev_in_range;
531 kvm_io_bus_register_dev(&kvm->pio_bus, &s->dev);