2 * 8253/8254 interval timer emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2006 Intel Corporation
6 * Copyright (c) 2007 Keir Fraser, XenSource Inc
7 * Copyright (c) 2008 Intel Corporation
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 * Sheng Yang <sheng.yang@intel.com>
29 * Based on QEMU and Xen.
32 #include <linux/kvm_host.h>
38 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
40 #define mod_64(x, y) ((x) % (y))
43 #define RW_STATE_LSB 1
44 #define RW_STATE_MSB 2
45 #define RW_STATE_WORD0 3
46 #define RW_STATE_WORD1 4
48 /* Compute with 96 bit intermediate result: (a*b)/c */
49 static u64 muldiv64(u64 a, u32 b, u32 c)
60 rl = (u64)u.l.low * (u64)b;
61 rh = (u64)u.l.high * (u64)b;
63 res.l.high = div64_u64(rh, c);
64 res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
68 static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
70 struct kvm_kpit_channel_state *c =
71 &kvm->arch.vpit->pit_state.channels[channel];
73 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
79 /* XXX: just disable/enable counting */
85 /* Restart counting on rising edge. */
87 c->count_load_time = ktime_get();
94 static int pit_get_gate(struct kvm *kvm, int channel)
96 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
98 return kvm->arch.vpit->pit_state.channels[channel].gate;
101 static int pit_get_count(struct kvm *kvm, int channel)
103 struct kvm_kpit_channel_state *c =
104 &kvm->arch.vpit->pit_state.channels[channel];
108 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
110 t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
111 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
118 counter = (c->count - d) & 0xffff;
121 /* XXX: may be incorrect for odd counts */
122 counter = c->count - (mod_64((2 * d), c->count));
125 counter = c->count - mod_64(d, c->count);
131 static int pit_get_out(struct kvm *kvm, int channel)
133 struct kvm_kpit_channel_state *c =
134 &kvm->arch.vpit->pit_state.channels[channel];
138 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
140 t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
141 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
146 out = (d >= c->count);
149 out = (d < c->count);
152 out = ((mod_64(d, c->count) == 0) && (d != 0));
155 out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
159 out = (d == c->count);
166 static void pit_latch_count(struct kvm *kvm, int channel)
168 struct kvm_kpit_channel_state *c =
169 &kvm->arch.vpit->pit_state.channels[channel];
171 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
173 if (!c->count_latched) {
174 c->latched_count = pit_get_count(kvm, channel);
175 c->count_latched = c->rw_mode;
179 static void pit_latch_status(struct kvm *kvm, int channel)
181 struct kvm_kpit_channel_state *c =
182 &kvm->arch.vpit->pit_state.channels[channel];
184 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
186 if (!c->status_latched) {
187 /* TODO: Return NULL COUNT (bit 6). */
188 c->status = ((pit_get_out(kvm, channel) << 7) |
192 c->status_latched = 1;
196 static int __pit_timer_fn(struct kvm_kpit_state *ps)
198 struct kvm_vcpu *vcpu0 = ps->pit->kvm->vcpus[0];
199 struct kvm_kpit_timer *pt = &ps->pit_timer;
201 if (!atomic_inc_and_test(&pt->pending))
202 set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests);
205 atomic_set(&pt->pending, 1);
207 if (vcpu0 && waitqueue_active(&vcpu0->wq))
208 wake_up_interruptible(&vcpu0->wq);
210 hrtimer_add_expires_ns(&pt->timer, pt->period);
212 ps->channels[0].count_load_time = ktime_get();
214 return (pt->period == 0 ? 0 : 1);
217 int pit_has_pending_timer(struct kvm_vcpu *vcpu)
219 struct kvm_pit *pit = vcpu->kvm->arch.vpit;
221 if (pit && vcpu->vcpu_id == 0 && pit->pit_state.irq_ack)
222 return atomic_read(&pit->pit_state.pit_timer.pending);
226 static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
228 struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
230 spin_lock(&ps->inject_lock);
231 if (atomic_dec_return(&ps->pit_timer.pending) < 0)
232 atomic_inc(&ps->pit_timer.pending);
234 spin_unlock(&ps->inject_lock);
237 static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
239 struct kvm_kpit_state *ps;
240 int restart_timer = 0;
242 ps = container_of(data, struct kvm_kpit_state, pit_timer.timer);
244 restart_timer = __pit_timer_fn(ps);
247 return HRTIMER_RESTART;
249 return HRTIMER_NORESTART;
252 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
254 struct kvm_pit *pit = vcpu->kvm->arch.vpit;
255 struct hrtimer *timer;
257 if (vcpu->vcpu_id != 0 || !pit)
260 timer = &pit->pit_state.pit_timer.timer;
261 if (hrtimer_cancel(timer))
262 hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
265 static void destroy_pit_timer(struct kvm_kpit_timer *pt)
267 pr_debug("pit: execute del timer!\n");
268 hrtimer_cancel(&pt->timer);
271 static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
273 struct kvm_kpit_timer *pt = &ps->pit_timer;
276 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
278 pr_debug("pit: create pit timer, interval is %llu nsec\n", interval);
280 /* TODO The new value only affected after the retriggered */
281 hrtimer_cancel(&pt->timer);
282 pt->period = (is_period == 0) ? 0 : interval;
283 pt->timer.function = pit_timer_fn;
284 atomic_set(&pt->pending, 0);
287 hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval),
291 static void pit_load_count(struct kvm *kvm, int channel, u32 val)
293 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
295 WARN_ON(!mutex_is_locked(&ps->lock));
297 pr_debug("pit: load_count val is %d, channel is %d\n", val, channel);
300 * Though spec said the state of 8254 is undefined after power-up,
301 * seems some tricky OS like Windows XP depends on IRQ0 interrupt
303 * So here setting initialize rate for it, and not a specific number
308 ps->channels[channel].count_load_time = ktime_get();
309 ps->channels[channel].count = val;
314 /* Two types of timer
315 * mode 1 is one shot, mode 2 is period, otherwise del timer */
316 switch (ps->channels[0].mode) {
318 /* FIXME: enhance mode 4 precision */
320 create_pit_timer(ps, val, 0);
324 create_pit_timer(ps, val, 1);
327 destroy_pit_timer(&ps->pit_timer);
331 void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val)
333 mutex_lock(&kvm->arch.vpit->pit_state.lock);
334 pit_load_count(kvm, channel, val);
335 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
338 static void pit_ioport_write(struct kvm_io_device *this,
339 gpa_t addr, int len, const void *data)
341 struct kvm_pit *pit = (struct kvm_pit *)this->private;
342 struct kvm_kpit_state *pit_state = &pit->pit_state;
343 struct kvm *kvm = pit->kvm;
345 struct kvm_kpit_channel_state *s;
346 u32 val = *(u32 *) data;
349 addr &= KVM_PIT_CHANNEL_MASK;
351 mutex_lock(&pit_state->lock);
354 pr_debug("pit: write addr is 0x%x, len is %d, val is 0x%x\n",
355 (unsigned int)addr, len, val);
360 /* Read-Back Command. */
361 for (channel = 0; channel < 3; channel++) {
362 s = &pit_state->channels[channel];
363 if (val & (2 << channel)) {
365 pit_latch_count(kvm, channel);
367 pit_latch_status(kvm, channel);
371 /* Select Counter <channel>. */
372 s = &pit_state->channels[channel];
373 access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
375 pit_latch_count(kvm, channel);
378 s->read_state = access;
379 s->write_state = access;
380 s->mode = (val >> 1) & 7;
388 s = &pit_state->channels[addr];
389 switch (s->write_state) {
392 pit_load_count(kvm, addr, val);
395 pit_load_count(kvm, addr, val << 8);
398 s->write_latch = val;
399 s->write_state = RW_STATE_WORD1;
402 pit_load_count(kvm, addr, s->write_latch | (val << 8));
403 s->write_state = RW_STATE_WORD0;
408 mutex_unlock(&pit_state->lock);
411 static void pit_ioport_read(struct kvm_io_device *this,
412 gpa_t addr, int len, void *data)
414 struct kvm_pit *pit = (struct kvm_pit *)this->private;
415 struct kvm_kpit_state *pit_state = &pit->pit_state;
416 struct kvm *kvm = pit->kvm;
418 struct kvm_kpit_channel_state *s;
420 addr &= KVM_PIT_CHANNEL_MASK;
421 s = &pit_state->channels[addr];
423 mutex_lock(&pit_state->lock);
425 if (s->status_latched) {
426 s->status_latched = 0;
428 } else if (s->count_latched) {
429 switch (s->count_latched) {
432 ret = s->latched_count & 0xff;
433 s->count_latched = 0;
436 ret = s->latched_count >> 8;
437 s->count_latched = 0;
440 ret = s->latched_count & 0xff;
441 s->count_latched = RW_STATE_MSB;
445 switch (s->read_state) {
448 count = pit_get_count(kvm, addr);
452 count = pit_get_count(kvm, addr);
453 ret = (count >> 8) & 0xff;
456 count = pit_get_count(kvm, addr);
458 s->read_state = RW_STATE_WORD1;
461 count = pit_get_count(kvm, addr);
462 ret = (count >> 8) & 0xff;
463 s->read_state = RW_STATE_WORD0;
468 if (len > sizeof(ret))
470 memcpy(data, (char *)&ret, len);
472 mutex_unlock(&pit_state->lock);
475 static int pit_in_range(struct kvm_io_device *this, gpa_t addr,
476 int len, int is_write)
478 return ((addr >= KVM_PIT_BASE_ADDRESS) &&
479 (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
482 static void speaker_ioport_write(struct kvm_io_device *this,
483 gpa_t addr, int len, const void *data)
485 struct kvm_pit *pit = (struct kvm_pit *)this->private;
486 struct kvm_kpit_state *pit_state = &pit->pit_state;
487 struct kvm *kvm = pit->kvm;
488 u32 val = *(u32 *) data;
490 mutex_lock(&pit_state->lock);
491 pit_state->speaker_data_on = (val >> 1) & 1;
492 pit_set_gate(kvm, 2, val & 1);
493 mutex_unlock(&pit_state->lock);
496 static void speaker_ioport_read(struct kvm_io_device *this,
497 gpa_t addr, int len, void *data)
499 struct kvm_pit *pit = (struct kvm_pit *)this->private;
500 struct kvm_kpit_state *pit_state = &pit->pit_state;
501 struct kvm *kvm = pit->kvm;
502 unsigned int refresh_clock;
505 /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
506 refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
508 mutex_lock(&pit_state->lock);
509 ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
510 (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
511 if (len > sizeof(ret))
513 memcpy(data, (char *)&ret, len);
514 mutex_unlock(&pit_state->lock);
517 static int speaker_in_range(struct kvm_io_device *this, gpa_t addr,
518 int len, int is_write)
520 return (addr == KVM_SPEAKER_BASE_ADDRESS);
523 void kvm_pit_reset(struct kvm_pit *pit)
526 struct kvm_kpit_channel_state *c;
528 mutex_lock(&pit->pit_state.lock);
529 for (i = 0; i < 3; i++) {
530 c = &pit->pit_state.channels[i];
533 pit_load_count(pit->kvm, i, 0);
535 mutex_unlock(&pit->pit_state.lock);
537 atomic_set(&pit->pit_state.pit_timer.pending, 0);
538 pit->pit_state.irq_ack = 1;
541 static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask)
543 struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier);
546 atomic_set(&pit->pit_state.pit_timer.pending, 0);
547 pit->pit_state.irq_ack = 1;
551 struct kvm_pit *kvm_create_pit(struct kvm *kvm)
554 struct kvm_kpit_state *pit_state;
556 pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
560 pit->irq_source_id = kvm_request_irq_source_id(kvm);
561 if (pit->irq_source_id < 0) {
566 mutex_init(&pit->pit_state.lock);
567 mutex_lock(&pit->pit_state.lock);
568 spin_lock_init(&pit->pit_state.inject_lock);
570 /* Initialize PIO device */
571 pit->dev.read = pit_ioport_read;
572 pit->dev.write = pit_ioport_write;
573 pit->dev.in_range = pit_in_range;
574 pit->dev.private = pit;
575 kvm_io_bus_register_dev(&kvm->pio_bus, &pit->dev);
577 pit->speaker_dev.read = speaker_ioport_read;
578 pit->speaker_dev.write = speaker_ioport_write;
579 pit->speaker_dev.in_range = speaker_in_range;
580 pit->speaker_dev.private = pit;
581 kvm_io_bus_register_dev(&kvm->pio_bus, &pit->speaker_dev);
583 kvm->arch.vpit = pit;
586 pit_state = &pit->pit_state;
587 pit_state->pit = pit;
588 hrtimer_init(&pit_state->pit_timer.timer,
589 CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
590 pit_state->irq_ack_notifier.gsi = 0;
591 pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
592 kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
593 pit_state->pit_timer.reinject = true;
594 mutex_unlock(&pit->pit_state.lock);
598 pit->mask_notifier.func = pit_mask_notifer;
599 kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
604 void kvm_free_pit(struct kvm *kvm)
606 struct hrtimer *timer;
608 if (kvm->arch.vpit) {
609 kvm_unregister_irq_mask_notifier(kvm, 0,
610 &kvm->arch.vpit->mask_notifier);
611 mutex_lock(&kvm->arch.vpit->pit_state.lock);
612 timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
613 hrtimer_cancel(timer);
614 kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id);
615 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
616 kfree(kvm->arch.vpit);
620 static void __inject_pit_timer_intr(struct kvm *kvm)
622 struct kvm_vcpu *vcpu;
625 mutex_lock(&kvm->lock);
626 kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1);
627 kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0);
628 mutex_unlock(&kvm->lock);
631 * Provides NMI watchdog support via Virtual Wire mode.
632 * The route is: PIT -> PIC -> LVT0 in NMI mode.
634 * Note: Our Virtual Wire implementation is simplified, only
635 * propagating PIT interrupts to all VCPUs when they have set
636 * LVT0 to NMI delivery. Other PIC interrupts are just sent to
637 * VCPU0, and only if its LVT0 is in EXTINT mode.
639 if (kvm->arch.vapics_in_nmi_mode > 0)
640 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
641 vcpu = kvm->vcpus[i];
643 kvm_apic_nmi_wd_deliver(vcpu);
647 void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu)
649 struct kvm_pit *pit = vcpu->kvm->arch.vpit;
650 struct kvm *kvm = vcpu->kvm;
651 struct kvm_kpit_state *ps;
655 ps = &pit->pit_state;
657 /* Try to inject pending interrupts when
658 * last one has been acked.
660 spin_lock(&ps->inject_lock);
661 if (atomic_read(&ps->pit_timer.pending) && ps->irq_ack) {
665 spin_unlock(&ps->inject_lock);
667 __inject_pit_timer_intr(kvm);