2 * umip.c Emulation for instruction protected by the Intel User-Mode
3 * Instruction Prevention feature
5 * Copyright (c) 2017, Intel Corporation.
6 * Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
9 #include <linux/uaccess.h>
11 #include <asm/traps.h>
13 #include <asm/insn-eval.h>
14 #include <linux/ratelimit.h>
17 #define pr_fmt(fmt) "umip: " fmt
19 /** DOC: Emulation for User-Mode Instruction Prevention (UMIP)
21 * The feature User-Mode Instruction Prevention present in recent Intel
22 * processor prevents a group of instructions (sgdt, sidt, sldt, smsw, and str)
23 * from being executed with CPL > 0. Otherwise, a general protection fault is
26 * Rather than relaying to the user space the general protection fault caused by
27 * the UMIP-protected instructions (in the form of a SIGSEGV signal), it can be
28 * trapped and emulate the result of such instructions to provide dummy values.
29 * This allows to both conserve the current kernel behavior and not reveal the
30 * system resources that UMIP intends to protect (i.e., the locations of the
31 * global descriptor and interrupt descriptor tables, the segment selectors of
32 * the local descriptor table, the value of the task state register and the
33 * contents of the CR0 register).
35 * This emulation is needed because certain applications (e.g., WineHQ and
36 * DOSEMU2) rely on this subset of instructions to function.
38 * The instructions protected by UMIP can be split in two groups. Those which
39 * return a kernel memory address (sgdt and sidt) and those which return a
40 * value (sldt, str and smsw).
42 * For the instructions that return a kernel memory address, applications
43 * such as WineHQ rely on the result being located in the kernel memory space,
44 * not the actual location of the table. The result is emulated as a hard-coded
45 * value that, lies close to the top of the kernel memory. The limit for the GDT
46 * and the IDT are set to zero.
48 * Given that sldt and str are not commonly used in programs that run on WineHQ
49 * or DOSEMU2, they are not emulated.
51 * The instruction smsw is emulated to return the value that the register CR0
52 * has at boot time as set in the head_32.
54 * Also, emulation is provided only for 32-bit processes; 64-bit processes
55 * that attempt to use the instructions that UMIP protects will receive the
56 * SIGSEGV signal issued as a consequence of the general protection fault.
58 * Care is taken to appropriately emulate the results when segmentation is
59 * used. That is, rather than relying on USER_DS and USER_CS, the function
60 * insn_get_addr_ref() inspects the segment descriptor pointed by the
61 * registers in pt_regs. This ensures that we correctly obtain the segment
62 * base address and the address and operand sizes even if the user space
63 * application uses a local descriptor table.
66 #define UMIP_DUMMY_GDT_BASE 0xfffe0000
67 #define UMIP_DUMMY_IDT_BASE 0xffff0000
70 * The SGDT and SIDT instructions store the contents of the global descriptor
71 * table and interrupt table registers, respectively. The destination is a
72 * memory operand of X+2 bytes. X bytes are used to store the base address of
73 * the table and 2 bytes are used to store the limit. In 32-bit processes, the
74 * only processes for which emulation is provided, X has a value of 4.
76 #define UMIP_GDT_IDT_BASE_SIZE 4
77 #define UMIP_GDT_IDT_LIMIT_SIZE 2
79 #define UMIP_INST_SGDT 0 /* 0F 01 /0 */
80 #define UMIP_INST_SIDT 1 /* 0F 01 /1 */
81 #define UMIP_INST_SMSW 2 /* 0F 01 /4 */
82 #define UMIP_INST_SLDT 3 /* 0F 00 /0 */
83 #define UMIP_INST_STR 4 /* 0F 00 /1 */
86 * identify_insn() - Identify a UMIP-protected instruction
87 * @insn: Instruction structure with opcode and ModRM byte.
89 * From the opcode and ModRM.reg in @insn identify, if any, a UMIP-protected
90 * instruction that can be emulated.
94 * On success, a constant identifying a specific UMIP-protected instruction that
97 * -EINVAL on error or when not an UMIP-protected instruction that can be
100 static int identify_insn(struct insn *insn)
102 /* By getting modrm we also get the opcode. */
103 insn_get_modrm(insn);
105 if (!insn->modrm.nbytes)
108 /* All the instructions of interest start with 0x0f. */
109 if (insn->opcode.bytes[0] != 0xf)
112 if (insn->opcode.bytes[1] == 0x1) {
113 switch (X86_MODRM_REG(insn->modrm.value)) {
115 return UMIP_INST_SGDT;
117 return UMIP_INST_SIDT;
119 return UMIP_INST_SMSW;
123 } else if (insn->opcode.bytes[1] == 0x0) {
124 if (X86_MODRM_REG(insn->modrm.value) == 0)
125 return UMIP_INST_SLDT;
126 else if (X86_MODRM_REG(insn->modrm.value) == 1)
127 return UMIP_INST_STR;
136 * emulate_umip_insn() - Emulate UMIP instructions and return dummy values
137 * @insn: Instruction structure with operands
138 * @umip_inst: A constant indicating the instruction to emulate
139 * @data: Buffer into which the dummy result is stored
140 * @data_size: Size of the emulated result
142 * Emulate an instruction protected by UMIP and provide a dummy result. The
143 * result of the emulation is saved in @data. The size of the results depends
144 * on both the instruction and type of operand (register vs memory address).
145 * The size of the result is updated in @data_size. Caller is responsible
146 * of providing a @data buffer of at least UMIP_GDT_IDT_BASE_SIZE +
147 * UMIP_GDT_IDT_LIMIT_SIZE bytes.
151 * 0 on success, -EINVAL on error while emulating.
153 static int emulate_umip_insn(struct insn *insn, int umip_inst,
154 unsigned char *data, int *data_size)
156 unsigned long dummy_base_addr, dummy_value;
157 unsigned short dummy_limit = 0;
159 if (!data || !data_size || !insn)
162 * These two instructions return the base address and limit of the
163 * global and interrupt descriptor table, respectively. According to the
164 * Intel Software Development manual, the base address can be 24-bit,
165 * 32-bit or 64-bit. Limit is always 16-bit. If the operand size is
166 * 16-bit, the returned value of the base address is supposed to be a
167 * zero-extended 24-byte number. However, it seems that a 32-byte number
168 * is always returned irrespective of the operand size.
170 if (umip_inst == UMIP_INST_SGDT || umip_inst == UMIP_INST_SIDT) {
171 /* SGDT and SIDT do not use registers operands. */
172 if (X86_MODRM_MOD(insn->modrm.value) == 3)
175 if (umip_inst == UMIP_INST_SGDT)
176 dummy_base_addr = UMIP_DUMMY_GDT_BASE;
178 dummy_base_addr = UMIP_DUMMY_IDT_BASE;
180 *data_size = UMIP_GDT_IDT_LIMIT_SIZE + UMIP_GDT_IDT_BASE_SIZE;
182 memcpy(data + 2, &dummy_base_addr, UMIP_GDT_IDT_BASE_SIZE);
183 memcpy(data, &dummy_limit, UMIP_GDT_IDT_LIMIT_SIZE);
185 } else if (umip_inst == UMIP_INST_SMSW) {
186 dummy_value = CR0_STATE;
189 * Even though the CR0 register has 4 bytes, the number
190 * of bytes to be copied in the result buffer is determined
191 * by whether the operand is a register or a memory location.
192 * If operand is a register, return as many bytes as the operand
193 * size. If operand is memory, return only the two least
194 * siginificant bytes of CR0.
196 if (X86_MODRM_MOD(insn->modrm.value) == 3)
197 *data_size = insn->opnd_bytes;
201 memcpy(data, &dummy_value, *data_size);
202 /* STR and SLDT are not emulated */
211 * force_sig_info_umip_fault() - Force a SIGSEGV with SEGV_MAPERR
212 * @addr: Address that caused the signal
213 * @regs: Register set containing the instruction pointer
215 * Force a SIGSEGV signal with SEGV_MAPERR as the error code. This function is
216 * intended to be used to provide a segmentation fault when the result of the
217 * UMIP emulation could not be copied to the user space memory.
221 static void force_sig_info_umip_fault(void __user *addr, struct pt_regs *regs)
224 struct task_struct *tsk = current;
226 tsk->thread.cr2 = (unsigned long)addr;
227 tsk->thread.error_code = X86_PF_USER | X86_PF_WRITE;
228 tsk->thread.trap_nr = X86_TRAP_PF;
230 info.si_signo = SIGSEGV;
232 info.si_code = SEGV_MAPERR;
234 force_sig_info(SIGSEGV, &info, tsk);
236 if (!(show_unhandled_signals && unhandled_signal(tsk, SIGSEGV)))
239 pr_err_ratelimited("%s[%d] umip emulation segfault ip:%lx sp:%lx error:%x in %lx\n",
240 tsk->comm, task_pid_nr(tsk), regs->ip,
241 regs->sp, X86_PF_USER | X86_PF_WRITE,
246 * fixup_umip_exception() - Fixup a general protection fault caused by UMIP
247 * @regs: Registers as saved when entering the #GP handler
249 * The instructions sgdt, sidt, str, smsw, sldt cause a general protection
250 * fault if executed with CPL > 0 (i.e., from user space). If the offending
251 * user-space process is not in long mode, this function fixes the exception
252 * up and provides dummy results for sgdt, sidt and smsw; str and sldt are not
253 * fixed up. Also long mode user-space processes are not fixed up.
255 * If operands are memory addresses, results are copied to user-space memory as
256 * indicated by the instruction pointed by eIP using the registers indicated in
257 * the instruction operands. If operands are registers, results are copied into
258 * the context that was saved when entering kernel mode.
262 * True if emulation was successful; false if not.
264 bool fixup_umip_exception(struct pt_regs *regs)
266 int not_copied, nr_copied, reg_offset, dummy_data_size, umip_inst;
267 unsigned long seg_base = 0, *reg_addr;
268 /* 10 bytes is the maximum size of the result of UMIP instructions */
269 unsigned char dummy_data[10] = { 0 };
270 unsigned char buf[MAX_INSN_SIZE];
279 * If not in user-space long mode, a custom code segment could be in
280 * use. This is true in protected mode (if the process defined a local
281 * descriptor table), or virtual-8086 mode. In most of the cases
282 * seg_base will be zero as in USER_CS.
284 if (!user_64bit_mode(regs))
285 seg_base = insn_get_seg_base(regs, INAT_SEG_REG_CS);
290 not_copied = copy_from_user(buf, (void __user *)(seg_base + regs->ip),
292 nr_copied = sizeof(buf) - not_copied;
295 * The copy_from_user above could have failed if user code is protected
296 * by a memory protection key. Give up on emulation in such a case.
297 * Should we issue a page fault?
302 insn_init(&insn, buf, nr_copied, user_64bit_mode(regs));
305 * Override the default operand and address sizes with what is specified
306 * in the code segment descriptor. The instruction decoder only sets
307 * the address size it to either 4 or 8 address bytes and does nothing
308 * for the operand bytes. This OK for most of the cases, but we could
309 * have special cases where, for instance, a 16-bit code segment
310 * descriptor is used.
311 * If there is an address override prefix, the instruction decoder
312 * correctly updates these values, even for 16-bit defaults.
314 seg_defs = insn_get_code_seg_params(regs);
315 if (seg_defs == -EINVAL)
318 insn.addr_bytes = INSN_CODE_SEG_ADDR_SZ(seg_defs);
319 insn.opnd_bytes = INSN_CODE_SEG_OPND_SZ(seg_defs);
321 insn_get_length(&insn);
322 if (nr_copied < insn.length)
325 umip_inst = identify_insn(&insn);
329 /* Do not emulate SLDT, STR or user long mode processes. */
330 if (umip_inst == UMIP_INST_STR || umip_inst == UMIP_INST_SLDT || user_64bit_mode(regs))
333 if (emulate_umip_insn(&insn, umip_inst, dummy_data, &dummy_data_size))
337 * If operand is a register, write result to the copy of the register
338 * value that was pushed to the stack when entering into kernel mode.
339 * Upon exit, the value we write will be restored to the actual hardware
342 if (X86_MODRM_MOD(insn.modrm.value) == 3) {
343 reg_offset = insn_get_modrm_rm_off(&insn, regs);
346 * Negative values are usually errors. In memory addressing,
347 * the exception is -EDOM. Since we expect a register operand,
348 * all negative values are errors.
353 reg_addr = (unsigned long *)((unsigned long)regs + reg_offset);
354 memcpy(reg_addr, dummy_data, dummy_data_size);
356 uaddr = insn_get_addr_ref(&insn, regs);
357 if ((unsigned long)uaddr == -1L)
360 nr_copied = copy_to_user(uaddr, dummy_data, dummy_data_size);
363 * If copy fails, send a signal and tell caller that
364 * fault was fixed up.
366 force_sig_info_umip_fault(uaddr, regs);
371 /* increase IP to let the program keep going */
372 regs->ip += insn.length;