2 * Copyright (C) 1995 Linus Torvalds
4 * Pentium III FXSR, SSE support
5 * Gareth Hughes <gareth@valinux.com>, May 2000
10 * CPU hotplug support - ashok.raj@intel.com
14 * This file handles the architecture-dependent parts of process handling..
17 #include <linux/cpu.h>
18 #include <linux/errno.h>
19 #include <linux/sched.h>
20 #include <linux/sched/task.h>
21 #include <linux/sched/task_stack.h>
23 #include <linux/kernel.h>
25 #include <linux/elfcore.h>
26 #include <linux/smp.h>
27 #include <linux/slab.h>
28 #include <linux/user.h>
29 #include <linux/interrupt.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include <linux/ptrace.h>
33 #include <linux/notifier.h>
34 #include <linux/kprobes.h>
35 #include <linux/kdebug.h>
36 #include <linux/prctl.h>
37 #include <linux/uaccess.h>
39 #include <linux/ftrace.h>
40 #include <linux/syscalls.h>
42 #include <asm/pgtable.h>
43 #include <asm/processor.h>
44 #include <asm/fpu/internal.h>
45 #include <asm/mmu_context.h>
46 #include <asm/prctl.h>
48 #include <asm/proto.h>
50 #include <asm/syscalls.h>
51 #include <asm/debugreg.h>
52 #include <asm/switch_to.h>
53 #include <asm/xen/hypervisor.h>
55 #include <asm/intel_rdt_sched.h>
56 #include <asm/unistd.h>
57 #ifdef CONFIG_IA32_EMULATION
58 /* Not included via unistd.h */
59 #include <asm/unistd_32_ia32.h>
62 __visible DEFINE_PER_CPU(unsigned long, rsp_scratch);
64 /* Prints also some state that isn't saved in the pt_regs */
65 void __show_regs(struct pt_regs *regs, int all)
67 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;
68 unsigned long d0, d1, d2, d3, d6, d7;
69 unsigned int fsindex, gsindex;
70 unsigned int ds, cs, es;
74 if (regs->orig_ax != -1)
75 pr_cont(" ORIG_RAX: %016lx\n", regs->orig_ax);
79 printk(KERN_DEFAULT "RAX: %016lx RBX: %016lx RCX: %016lx\n",
80 regs->ax, regs->bx, regs->cx);
81 printk(KERN_DEFAULT "RDX: %016lx RSI: %016lx RDI: %016lx\n",
82 regs->dx, regs->si, regs->di);
83 printk(KERN_DEFAULT "RBP: %016lx R08: %016lx R09: %016lx\n",
84 regs->bp, regs->r8, regs->r9);
85 printk(KERN_DEFAULT "R10: %016lx R11: %016lx R12: %016lx\n",
86 regs->r10, regs->r11, regs->r12);
87 printk(KERN_DEFAULT "R13: %016lx R14: %016lx R15: %016lx\n",
88 regs->r13, regs->r14, regs->r15);
93 asm("movl %%ds,%0" : "=r" (ds));
94 asm("movl %%cs,%0" : "=r" (cs));
95 asm("movl %%es,%0" : "=r" (es));
96 asm("movl %%fs,%0" : "=r" (fsindex));
97 asm("movl %%gs,%0" : "=r" (gsindex));
99 rdmsrl(MSR_FS_BASE, fs);
100 rdmsrl(MSR_GS_BASE, gs);
101 rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
108 printk(KERN_DEFAULT "FS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n",
109 fs, fsindex, gs, gsindex, shadowgs);
110 printk(KERN_DEFAULT "CS: %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds,
112 printk(KERN_DEFAULT "CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3,
122 /* Only print out debug registers if they are in their non-default state. */
123 if (!((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) &&
124 (d6 == DR6_RESERVED) && (d7 == 0x400))) {
125 printk(KERN_DEFAULT "DR0: %016lx DR1: %016lx DR2: %016lx\n",
127 printk(KERN_DEFAULT "DR3: %016lx DR6: %016lx DR7: %016lx\n",
131 if (boot_cpu_has(X86_FEATURE_OSPKE))
132 printk(KERN_DEFAULT "PKRU: %08x\n", read_pkru());
135 void release_thread(struct task_struct *dead_task)
138 #ifdef CONFIG_MODIFY_LDT_SYSCALL
139 if (dead_task->mm->context.ldt) {
140 pr_warn("WARNING: dead process %s still has LDT? <%p/%d>\n",
142 dead_task->mm->context.ldt->entries,
143 dead_task->mm->context.ldt->nr_entries);
150 enum which_selector {
156 * Saves the FS or GS base for an outgoing thread if FSGSBASE extensions are
157 * not available. The goal is to be reasonably fast on non-FSGSBASE systems.
158 * It's forcibly inlined because it'll generate better code and this function
161 static __always_inline void save_base_legacy(struct task_struct *prev_p,
162 unsigned short selector,
163 enum which_selector which)
165 if (likely(selector == 0)) {
167 * On Intel (without X86_BUG_NULL_SEG), the segment base could
168 * be the pre-existing saved base or it could be zero. On AMD
169 * (with X86_BUG_NULL_SEG), the segment base could be almost
172 * This branch is very hot (it's hit twice on almost every
173 * context switch between 64-bit programs), and avoiding
174 * the RDMSR helps a lot, so we just assume that whatever
175 * value is already saved is correct. This matches historical
176 * Linux behavior, so it won't break existing applications.
178 * To avoid leaking state, on non-X86_BUG_NULL_SEG CPUs, if we
179 * report that the base is zero, it needs to actually be zero:
180 * see the corresponding logic in load_seg_legacy.
184 * If the selector is 1, 2, or 3, then the base is zero on
185 * !X86_BUG_NULL_SEG CPUs and could be anything on
186 * X86_BUG_NULL_SEG CPUs. In the latter case, Linux
187 * has never attempted to preserve the base across context
190 * If selector > 3, then it refers to a real segment, and
191 * saving the base isn't necessary.
194 prev_p->thread.fsbase = 0;
196 prev_p->thread.gsbase = 0;
200 static __always_inline void save_fsgs(struct task_struct *task)
202 savesegment(fs, task->thread.fsindex);
203 savesegment(gs, task->thread.gsindex);
204 save_base_legacy(task, task->thread.fsindex, FS);
205 save_base_legacy(task, task->thread.gsindex, GS);
208 static __always_inline void loadseg(enum which_selector which,
212 loadsegment(fs, sel);
217 static __always_inline void load_seg_legacy(unsigned short prev_index,
218 unsigned long prev_base,
219 unsigned short next_index,
220 unsigned long next_base,
221 enum which_selector which)
223 if (likely(next_index <= 3)) {
225 * The next task is using 64-bit TLS, is not using this
226 * segment at all, or is having fun with arcane CPU features.
228 if (next_base == 0) {
230 * Nasty case: on AMD CPUs, we need to forcibly zero
233 if (static_cpu_has_bug(X86_BUG_NULL_SEG)) {
234 loadseg(which, __USER_DS);
235 loadseg(which, next_index);
238 * We could try to exhaustively detect cases
239 * under which we can skip the segment load,
240 * but there's really only one case that matters
241 * for performance: if both the previous and
242 * next states are fully zeroed, we can skip
245 * (This assumes that prev_base == 0 has no
246 * false positives. This is the case on
249 if (likely(prev_index | next_index | prev_base))
250 loadseg(which, next_index);
253 if (prev_index != next_index)
254 loadseg(which, next_index);
255 wrmsrl(which == FS ? MSR_FS_BASE : MSR_KERNEL_GS_BASE,
260 * The next task is using a real segment. Loading the selector
263 loadseg(which, next_index);
267 int copy_thread_tls(unsigned long clone_flags, unsigned long sp,
268 unsigned long arg, struct task_struct *p, unsigned long tls)
271 struct pt_regs *childregs;
272 struct fork_frame *fork_frame;
273 struct inactive_task_frame *frame;
274 struct task_struct *me = current;
276 childregs = task_pt_regs(p);
277 fork_frame = container_of(childregs, struct fork_frame, regs);
278 frame = &fork_frame->frame;
280 frame->ret_addr = (unsigned long) ret_from_fork;
281 p->thread.sp = (unsigned long) fork_frame;
282 p->thread.io_bitmap_ptr = NULL;
284 savesegment(gs, p->thread.gsindex);
285 p->thread.gsbase = p->thread.gsindex ? 0 : me->thread.gsbase;
286 savesegment(fs, p->thread.fsindex);
287 p->thread.fsbase = p->thread.fsindex ? 0 : me->thread.fsbase;
288 savesegment(es, p->thread.es);
289 savesegment(ds, p->thread.ds);
290 memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
292 if (unlikely(p->flags & PF_KTHREAD)) {
294 memset(childregs, 0, sizeof(struct pt_regs));
295 frame->bx = sp; /* function */
300 *childregs = *current_pt_regs();
307 if (unlikely(test_tsk_thread_flag(me, TIF_IO_BITMAP))) {
308 p->thread.io_bitmap_ptr = kmemdup(me->thread.io_bitmap_ptr,
309 IO_BITMAP_BYTES, GFP_KERNEL);
310 if (!p->thread.io_bitmap_ptr) {
311 p->thread.io_bitmap_max = 0;
314 set_tsk_thread_flag(p, TIF_IO_BITMAP);
318 * Set a new TLS for the child thread?
320 if (clone_flags & CLONE_SETTLS) {
321 #ifdef CONFIG_IA32_EMULATION
322 if (in_ia32_syscall())
323 err = do_set_thread_area(p, -1,
324 (struct user_desc __user *)tls, 0);
327 err = do_arch_prctl_64(p, ARCH_SET_FS, tls);
333 if (err && p->thread.io_bitmap_ptr) {
334 kfree(p->thread.io_bitmap_ptr);
335 p->thread.io_bitmap_max = 0;
342 start_thread_common(struct pt_regs *regs, unsigned long new_ip,
343 unsigned long new_sp,
344 unsigned int _cs, unsigned int _ss, unsigned int _ds)
346 WARN_ON_ONCE(regs != current_pt_regs());
348 if (static_cpu_has(X86_BUG_NULL_SEG)) {
349 /* Loading zero below won't clear the base. */
350 loadsegment(fs, __USER_DS);
351 load_gs_index(__USER_DS);
355 loadsegment(es, _ds);
356 loadsegment(ds, _ds);
363 regs->flags = X86_EFLAGS_IF;
368 start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
370 start_thread_common(regs, new_ip, new_sp,
371 __USER_CS, __USER_DS, 0);
375 void compat_start_thread(struct pt_regs *regs, u32 new_ip, u32 new_sp)
377 start_thread_common(regs, new_ip, new_sp,
378 test_thread_flag(TIF_X32)
379 ? __USER_CS : __USER32_CS,
380 __USER_DS, __USER_DS);
385 * switch_to(x,y) should switch tasks from x to y.
387 * This could still be optimized:
388 * - fold all the options into a flag word and test it with a single test.
389 * - could test fs/gs bitsliced
391 * Kprobes not supported here. Set the probe on schedule instead.
392 * Function graph tracer not supported too.
394 __visible __notrace_funcgraph struct task_struct *
395 __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
397 struct thread_struct *prev = &prev_p->thread;
398 struct thread_struct *next = &next_p->thread;
399 struct fpu *prev_fpu = &prev->fpu;
400 struct fpu *next_fpu = &next->fpu;
401 int cpu = smp_processor_id();
402 struct tss_struct *tss = &per_cpu(cpu_tss, cpu);
404 WARN_ON_ONCE(IS_ENABLED(CONFIG_DEBUG_ENTRY) &&
405 this_cpu_read(irq_count) != -1);
407 switch_fpu_prepare(prev_fpu, cpu);
409 /* We must save %fs and %gs before load_TLS() because
410 * %fs and %gs may be cleared by load_TLS().
412 * (e.g. xen_load_tls())
417 * Load TLS before restoring any segments so that segment loads
418 * reference the correct GDT entries.
423 * Leave lazy mode, flushing any hypercalls made here. This
424 * must be done after loading TLS entries in the GDT but before
425 * loading segments that might reference them, and and it must
426 * be done before fpu__restore(), so the TS bit is up to
429 arch_end_context_switch(next_p);
433 * Reading them only returns the selectors, but writing them (if
434 * nonzero) loads the full descriptor from the GDT or LDT. The
435 * LDT for next is loaded in switch_mm, and the GDT is loaded
438 * We therefore need to write new values to the segment
439 * registers on every context switch unless both the new and old
442 * Note that we don't need to do anything for CS and SS, as
443 * those are saved and restored as part of pt_regs.
445 savesegment(es, prev->es);
446 if (unlikely(next->es | prev->es))
447 loadsegment(es, next->es);
449 savesegment(ds, prev->ds);
450 if (unlikely(next->ds | prev->ds))
451 loadsegment(ds, next->ds);
453 load_seg_legacy(prev->fsindex, prev->fsbase,
454 next->fsindex, next->fsbase, FS);
455 load_seg_legacy(prev->gsindex, prev->gsbase,
456 next->gsindex, next->gsbase, GS);
458 switch_fpu_finish(next_fpu, cpu);
461 * Switch the PDA and FPU contexts.
463 this_cpu_write(current_task, next_p);
469 * Now maybe reload the debug registers and handle I/O bitmaps
471 if (unlikely(task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT ||
472 task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV))
473 __switch_to_xtra(prev_p, next_p, tss);
477 * On Xen PV, IOPL bits in pt_regs->flags have no effect, and
478 * current_pt_regs()->flags may not match the current task's
479 * intended IOPL. We need to switch it manually.
481 if (unlikely(static_cpu_has(X86_FEATURE_XENPV) &&
482 prev->iopl != next->iopl))
483 xen_set_iopl_mask(next->iopl);
486 if (static_cpu_has_bug(X86_BUG_SYSRET_SS_ATTRS)) {
488 * AMD CPUs have a misfeature: SYSRET sets the SS selector but
489 * does not update the cached descriptor. As a result, if we
490 * do SYSRET while SS is NULL, we'll end up in user mode with
491 * SS apparently equal to __USER_DS but actually unusable.
493 * The straightforward workaround would be to fix it up just
494 * before SYSRET, but that would slow down the system call
495 * fast paths. Instead, we ensure that SS is never NULL in
496 * system call context. We do this by replacing NULL SS
497 * selectors at every context switch. SYSCALL sets up a valid
498 * SS, so the only way to get NULL is to re-enter the kernel
499 * from CPL 3 through an interrupt. Since that can't happen
500 * in the same task as a running syscall, we are guaranteed to
501 * context switch between every interrupt vector entry and a
504 * We read SS first because SS reads are much faster than
505 * writes. Out of caution, we force SS to __KERNEL_DS even if
506 * it previously had a different non-NULL value.
508 unsigned short ss_sel;
509 savesegment(ss, ss_sel);
510 if (ss_sel != __KERNEL_DS)
511 loadsegment(ss, __KERNEL_DS);
514 /* Load the Intel cache allocation PQR MSR. */
515 intel_rdt_sched_in();
520 void set_personality_64bit(void)
522 /* inherit personality from parent */
524 /* Make sure to be in 64bit mode */
525 clear_thread_flag(TIF_IA32);
526 clear_thread_flag(TIF_ADDR32);
527 clear_thread_flag(TIF_X32);
528 /* Pretend that this comes from a 64bit execve */
529 task_pt_regs(current)->orig_ax = __NR_execve;
531 /* Ensure the corresponding mm is not marked. */
533 current->mm->context.ia32_compat = 0;
535 /* TBD: overwrites user setup. Should have two bits.
536 But 64bit processes have always behaved this way,
537 so it's not too bad. The main problem is just that
538 32bit childs are affected again. */
539 current->personality &= ~READ_IMPLIES_EXEC;
542 static void __set_personality_x32(void)
544 #ifdef CONFIG_X86_X32
545 clear_thread_flag(TIF_IA32);
546 set_thread_flag(TIF_X32);
548 current->mm->context.ia32_compat = TIF_X32;
549 current->personality &= ~READ_IMPLIES_EXEC;
551 * in_compat_syscall() uses the presence of the x32 syscall bit
552 * flag to determine compat status. The x86 mmap() code relies on
553 * the syscall bitness so set x32 syscall bit right here to make
554 * in_compat_syscall() work during exec().
556 * Pretend to come from a x32 execve.
558 task_pt_regs(current)->orig_ax = __NR_x32_execve | __X32_SYSCALL_BIT;
559 current->thread.status &= ~TS_COMPAT;
563 static void __set_personality_ia32(void)
565 #ifdef CONFIG_IA32_EMULATION
566 set_thread_flag(TIF_IA32);
567 clear_thread_flag(TIF_X32);
569 current->mm->context.ia32_compat = TIF_IA32;
570 current->personality |= force_personality32;
571 /* Prepare the first "return" to user space */
572 task_pt_regs(current)->orig_ax = __NR_ia32_execve;
573 current->thread.status |= TS_COMPAT;
577 void set_personality_ia32(bool x32)
579 /* Make sure to be in 32bit mode */
580 set_thread_flag(TIF_ADDR32);
583 __set_personality_x32();
585 __set_personality_ia32();
587 EXPORT_SYMBOL_GPL(set_personality_ia32);
589 #ifdef CONFIG_CHECKPOINT_RESTORE
590 static long prctl_map_vdso(const struct vdso_image *image, unsigned long addr)
594 ret = map_vdso_once(image, addr);
598 return (long)image->size;
602 long do_arch_prctl_64(struct task_struct *task, int option, unsigned long arg2)
605 int doit = task == current;
610 if (arg2 >= TASK_SIZE_MAX)
613 task->thread.gsindex = 0;
614 task->thread.gsbase = arg2;
617 ret = wrmsrl_safe(MSR_KERNEL_GS_BASE, arg2);
622 /* Not strictly needed for fs, but do it for symmetry
624 if (arg2 >= TASK_SIZE_MAX)
627 task->thread.fsindex = 0;
628 task->thread.fsbase = arg2;
630 /* set the selector to 0 to not confuse __switch_to */
632 ret = wrmsrl_safe(MSR_FS_BASE, arg2);
640 rdmsrl(MSR_FS_BASE, base);
642 base = task->thread.fsbase;
643 ret = put_user(base, (unsigned long __user *)arg2);
650 rdmsrl(MSR_KERNEL_GS_BASE, base);
652 base = task->thread.gsbase;
653 ret = put_user(base, (unsigned long __user *)arg2);
657 #ifdef CONFIG_CHECKPOINT_RESTORE
658 # ifdef CONFIG_X86_X32_ABI
659 case ARCH_MAP_VDSO_X32:
660 return prctl_map_vdso(&vdso_image_x32, arg2);
662 # if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
663 case ARCH_MAP_VDSO_32:
664 return prctl_map_vdso(&vdso_image_32, arg2);
666 case ARCH_MAP_VDSO_64:
667 return prctl_map_vdso(&vdso_image_64, arg2);
678 SYSCALL_DEFINE2(arch_prctl, int, option, unsigned long, arg2)
682 ret = do_arch_prctl_64(current, option, arg2);
684 ret = do_arch_prctl_common(current, option, arg2);
689 #ifdef CONFIG_IA32_EMULATION
690 COMPAT_SYSCALL_DEFINE2(arch_prctl, int, option, unsigned long, arg2)
692 return do_arch_prctl_common(current, option, arg2);
696 unsigned long KSTK_ESP(struct task_struct *task)
698 return task_pt_regs(task)->sp;