1 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
3 #include <linux/errno.h>
4 #include <linux/kernel.h>
7 #include <linux/prctl.h>
8 #include <linux/slab.h>
9 #include <linux/sched.h>
10 #include <linux/init.h>
11 #include <linux/export.h>
13 #include <linux/tick.h>
14 #include <linux/random.h>
15 #include <linux/user-return-notifier.h>
16 #include <linux/dmi.h>
17 #include <linux/utsname.h>
18 #include <linux/stackprotector.h>
19 #include <linux/tick.h>
20 #include <linux/cpuidle.h>
21 #include <trace/events/power.h>
22 #include <linux/hw_breakpoint.h>
25 #include <asm/syscalls.h>
27 #include <asm/uaccess.h>
28 #include <asm/mwait.h>
29 #include <asm/fpu/internal.h>
30 #include <asm/debugreg.h>
32 #include <asm/tlbflush.h>
35 #include <asm/switch_to.h>
38 * per-CPU TSS segments. Threads are completely 'soft' on Linux,
39 * no more per-task TSS's. The TSS size is kept cacheline-aligned
40 * so they are allowed to end up in the .data..cacheline_aligned
41 * section. Since TSS's are completely CPU-local, we want them
42 * on exact cacheline boundaries, to eliminate cacheline ping-pong.
44 __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss) = {
46 .sp0 = TOP_OF_INIT_STACK,
50 .io_bitmap_base = INVALID_IO_BITMAP_OFFSET,
55 * Note that the .io_bitmap member must be extra-big. This is because
56 * the CPU will access an additional byte beyond the end of the IO
57 * permission bitmap. The extra byte must be all 1 bits, and must
58 * be within the limit.
60 .io_bitmap = { [0 ... IO_BITMAP_LONGS] = ~0 },
63 .SYSENTER_stack_canary = STACK_END_MAGIC,
66 EXPORT_PER_CPU_SYMBOL(cpu_tss);
69 static DEFINE_PER_CPU(unsigned char, is_idle);
70 static ATOMIC_NOTIFIER_HEAD(idle_notifier);
72 void idle_notifier_register(struct notifier_block *n)
74 atomic_notifier_chain_register(&idle_notifier, n);
76 EXPORT_SYMBOL_GPL(idle_notifier_register);
78 void idle_notifier_unregister(struct notifier_block *n)
80 atomic_notifier_chain_unregister(&idle_notifier, n);
82 EXPORT_SYMBOL_GPL(idle_notifier_unregister);
86 * this gets called so that we can store lazy state into memory and copy the
87 * current task into the new thread.
89 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
91 memcpy(dst, src, arch_task_struct_size);
93 dst->thread.vm86 = NULL;
96 return fpu__copy(&dst->thread.fpu, &src->thread.fpu);
100 * Free current thread data structures etc..
102 void exit_thread(struct task_struct *tsk)
104 struct thread_struct *t = &tsk->thread;
105 unsigned long *bp = t->io_bitmap_ptr;
106 struct fpu *fpu = &t->fpu;
109 struct tss_struct *tss = &per_cpu(cpu_tss, get_cpu());
111 t->io_bitmap_ptr = NULL;
112 clear_thread_flag(TIF_IO_BITMAP);
114 * Careful, clear this in the TSS too:
116 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
117 t->io_bitmap_max = 0;
127 void flush_thread(void)
129 struct task_struct *tsk = current;
131 flush_ptrace_hw_breakpoint(tsk);
132 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
134 fpu__clear(&tsk->thread.fpu);
137 static void hard_disable_TSC(void)
139 cr4_set_bits(X86_CR4_TSD);
142 void disable_TSC(void)
145 if (!test_and_set_thread_flag(TIF_NOTSC))
147 * Must flip the CPU state synchronously with
148 * TIF_NOTSC in the current running context.
154 static void hard_enable_TSC(void)
156 cr4_clear_bits(X86_CR4_TSD);
159 static void enable_TSC(void)
162 if (test_and_clear_thread_flag(TIF_NOTSC))
164 * Must flip the CPU state synchronously with
165 * TIF_NOTSC in the current running context.
171 int get_tsc_mode(unsigned long adr)
175 if (test_thread_flag(TIF_NOTSC))
176 val = PR_TSC_SIGSEGV;
180 return put_user(val, (unsigned int __user *)adr);
183 int set_tsc_mode(unsigned int val)
185 if (val == PR_TSC_SIGSEGV)
187 else if (val == PR_TSC_ENABLE)
195 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
196 struct tss_struct *tss)
198 struct thread_struct *prev, *next;
200 prev = &prev_p->thread;
201 next = &next_p->thread;
203 if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
204 test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
205 unsigned long debugctl = get_debugctlmsr();
207 debugctl &= ~DEBUGCTLMSR_BTF;
208 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
209 debugctl |= DEBUGCTLMSR_BTF;
211 update_debugctlmsr(debugctl);
214 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
215 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
216 /* prev and next are different */
217 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
223 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
225 * Copy the relevant range of the IO bitmap.
226 * Normally this is 128 bytes or less:
228 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
229 max(prev->io_bitmap_max, next->io_bitmap_max));
230 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
232 * Clear any possible leftover bits:
234 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
236 propagate_user_return_notify(prev_p, next_p);
240 * Idle related variables and functions
242 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
243 EXPORT_SYMBOL(boot_option_idle_override);
245 static void (*x86_idle)(void);
248 static inline void play_dead(void)
255 void enter_idle(void)
257 this_cpu_write(is_idle, 1);
258 atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
261 static void __exit_idle(void)
263 if (x86_test_and_clear_bit_percpu(0, is_idle) == 0)
265 atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
268 /* Called from interrupts to signify idle end */
271 /* idle loop has pid 0 */
278 void arch_cpu_idle_enter(void)
280 tsc_verify_tsc_adjust();
285 void arch_cpu_idle_exit(void)
290 void arch_cpu_idle_dead(void)
296 * Called from the generic idle code.
298 void arch_cpu_idle(void)
304 * We use this if we don't have any better idle routine..
306 void __cpuidle default_idle(void)
308 trace_cpu_idle_rcuidle(1, smp_processor_id());
310 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
312 #ifdef CONFIG_APM_MODULE
313 EXPORT_SYMBOL(default_idle);
317 bool xen_set_default_idle(void)
319 bool ret = !!x86_idle;
321 x86_idle = default_idle;
326 void stop_this_cpu(void *dummy)
332 set_cpu_online(smp_processor_id(), false);
333 disable_local_APIC();
334 mcheck_cpu_clear(this_cpu_ptr(&cpu_info));
340 bool amd_e400_c1e_detected;
341 EXPORT_SYMBOL(amd_e400_c1e_detected);
343 static cpumask_var_t amd_e400_c1e_mask;
345 void amd_e400_remove_cpu(int cpu)
347 if (amd_e400_c1e_mask != NULL)
348 cpumask_clear_cpu(cpu, amd_e400_c1e_mask);
352 * AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
353 * pending message MSR. If we detect C1E, then we handle it the same
354 * way as C3 power states (local apic timer and TSC stop)
356 static void amd_e400_idle(void)
358 if (!amd_e400_c1e_detected) {
361 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
363 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
364 amd_e400_c1e_detected = true;
365 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
366 mark_tsc_unstable("TSC halt in AMD C1E");
367 pr_info("System has AMD C1E enabled\n");
371 if (amd_e400_c1e_detected) {
372 int cpu = smp_processor_id();
374 if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
375 cpumask_set_cpu(cpu, amd_e400_c1e_mask);
376 /* Force broadcast so ACPI can not interfere. */
377 tick_broadcast_force();
378 pr_info("Switch to broadcast mode on CPU%d\n", cpu);
380 tick_broadcast_enter();
385 * The switch back from broadcast mode needs to be
386 * called with interrupts disabled.
389 tick_broadcast_exit();
396 * Intel Core2 and older machines prefer MWAIT over HALT for C1.
397 * We can't rely on cpuidle installing MWAIT, because it will not load
398 * on systems that support only C1 -- so the boot default must be MWAIT.
400 * Some AMD machines are the opposite, they depend on using HALT.
402 * So for default C1, which is used during boot until cpuidle loads,
403 * use MWAIT-C1 on Intel HW that has it, else use HALT.
405 static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c)
407 if (c->x86_vendor != X86_VENDOR_INTEL)
410 if (!cpu_has(c, X86_FEATURE_MWAIT) || static_cpu_has_bug(X86_BUG_MONITOR))
417 * MONITOR/MWAIT with no hints, used for default C1 state. This invokes MWAIT
418 * with interrupts enabled and no flags, which is backwards compatible with the
419 * original MWAIT implementation.
421 static __cpuidle void mwait_idle(void)
423 if (!current_set_polling_and_test()) {
424 trace_cpu_idle_rcuidle(1, smp_processor_id());
425 if (this_cpu_has(X86_BUG_CLFLUSH_MONITOR)) {
427 clflush((void *)¤t_thread_info()->flags);
431 __monitor((void *)¤t_thread_info()->flags, 0, 0);
436 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
440 __current_clr_polling();
443 void select_idle_routine(const struct cpuinfo_x86 *c)
446 if (boot_option_idle_override == IDLE_POLL && smp_num_siblings > 1)
447 pr_warn_once("WARNING: polling idle and HT enabled, performance may degrade\n");
449 if (x86_idle || boot_option_idle_override == IDLE_POLL)
452 if (cpu_has_bug(c, X86_BUG_AMD_APIC_C1E)) {
453 /* E400: APIC timer interrupt does not wake up CPU from C1e */
454 pr_info("using AMD E400 aware idle routine\n");
455 x86_idle = amd_e400_idle;
456 } else if (prefer_mwait_c1_over_halt(c)) {
457 pr_info("using mwait in idle threads\n");
458 x86_idle = mwait_idle;
460 x86_idle = default_idle;
463 void __init init_amd_e400_c1e_mask(void)
465 /* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
466 if (x86_idle == amd_e400_idle)
467 zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL);
470 static int __init idle_setup(char *str)
475 if (!strcmp(str, "poll")) {
476 pr_info("using polling idle threads\n");
477 boot_option_idle_override = IDLE_POLL;
478 cpu_idle_poll_ctrl(true);
479 } else if (!strcmp(str, "halt")) {
481 * When the boot option of idle=halt is added, halt is
482 * forced to be used for CPU idle. In such case CPU C2/C3
483 * won't be used again.
484 * To continue to load the CPU idle driver, don't touch
485 * the boot_option_idle_override.
487 x86_idle = default_idle;
488 boot_option_idle_override = IDLE_HALT;
489 } else if (!strcmp(str, "nomwait")) {
491 * If the boot option of "idle=nomwait" is added,
492 * it means that mwait will be disabled for CPU C2/C3
493 * states. In such case it won't touch the variable
494 * of boot_option_idle_override.
496 boot_option_idle_override = IDLE_NOMWAIT;
502 early_param("idle", idle_setup);
504 unsigned long arch_align_stack(unsigned long sp)
506 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
507 sp -= get_random_int() % 8192;
511 unsigned long arch_randomize_brk(struct mm_struct *mm)
513 return randomize_page(mm->brk, 0x02000000);
517 * Return saved PC of a blocked thread.
518 * What is this good for? it will be always the scheduler or ret_from_fork.
520 unsigned long thread_saved_pc(struct task_struct *tsk)
522 struct inactive_task_frame *frame =
523 (struct inactive_task_frame *) READ_ONCE(tsk->thread.sp);
524 return READ_ONCE_NOCHECK(frame->ret_addr);
528 * Called from fs/proc with a reference on @p to find the function
529 * which called into schedule(). This needs to be done carefully
530 * because the task might wake up and we might look at a stack
533 unsigned long get_wchan(struct task_struct *p)
535 unsigned long start, bottom, top, sp, fp, ip, ret = 0;
538 if (!p || p == current || p->state == TASK_RUNNING)
541 if (!try_get_task_stack(p))
544 start = (unsigned long)task_stack_page(p);
549 * Layout of the stack page:
551 * ----------- topmax = start + THREAD_SIZE - sizeof(unsigned long)
553 * ----------- top = topmax - TOP_OF_KERNEL_STACK_PADDING
555 * ----------- bottom = start
557 * The tasks stack pointer points at the location where the
558 * framepointer is stored. The data on the stack is:
559 * ... IP FP ... IP FP
561 * We need to read FP and IP, so we need to adjust the upper
562 * bound by another unsigned long.
564 top = start + THREAD_SIZE - TOP_OF_KERNEL_STACK_PADDING;
565 top -= 2 * sizeof(unsigned long);
568 sp = READ_ONCE(p->thread.sp);
569 if (sp < bottom || sp > top)
572 fp = READ_ONCE_NOCHECK(((struct inactive_task_frame *)sp)->bp);
574 if (fp < bottom || fp > top)
576 ip = READ_ONCE_NOCHECK(*(unsigned long *)(fp + sizeof(unsigned long)));
577 if (!in_sched_functions(ip)) {
581 fp = READ_ONCE_NOCHECK(*(unsigned long *)fp);
582 } while (count++ < 16 && p->state != TASK_RUNNING);