1 #include <linux/errno.h>
2 #include <linux/kernel.h>
5 #include <linux/prctl.h>
6 #include <linux/slab.h>
7 #include <linux/sched.h>
8 #include <linux/module.h>
10 #include <linux/clockchips.h>
11 #include <linux/random.h>
12 #include <linux/user-return-notifier.h>
13 #include <linux/dmi.h>
14 #include <linux/utsname.h>
15 #include <trace/events/power.h>
16 #include <linux/hw_breakpoint.h>
17 #include <asm/system.h>
19 #include <asm/syscalls.h>
21 #include <asm/uaccess.h>
23 #include <asm/debugreg.h>
25 unsigned long idle_halt;
26 EXPORT_SYMBOL(idle_halt);
27 unsigned long idle_nomwait;
28 EXPORT_SYMBOL(idle_nomwait);
30 struct kmem_cache *task_xstate_cachep;
32 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
35 if (src->thread.xstate) {
36 dst->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
38 if (!dst->thread.xstate)
40 WARN_ON((unsigned long)dst->thread.xstate & 15);
41 memcpy(dst->thread.xstate, src->thread.xstate, xstate_size);
46 void free_thread_xstate(struct task_struct *tsk)
48 if (tsk->thread.xstate) {
49 kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
50 tsk->thread.xstate = NULL;
54 void free_thread_info(struct thread_info *ti)
56 free_thread_xstate(ti->task);
57 free_pages((unsigned long)ti, get_order(THREAD_SIZE));
60 void arch_task_cache_init(void)
63 kmem_cache_create("task_xstate", xstate_size,
64 __alignof__(union thread_xstate),
65 SLAB_PANIC | SLAB_NOTRACK, NULL);
69 * Free current thread data structures etc..
71 void exit_thread(void)
73 struct task_struct *me = current;
74 struct thread_struct *t = &me->thread;
75 unsigned long *bp = t->io_bitmap_ptr;
78 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
80 t->io_bitmap_ptr = NULL;
81 clear_thread_flag(TIF_IO_BITMAP);
83 * Careful, clear this in the TSS too:
85 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
92 void show_regs(struct pt_regs *regs)
95 show_trace(NULL, regs, (unsigned long *)kernel_stack_pointer(regs),
99 void show_regs_common(void)
101 const char *board, *product;
103 board = dmi_get_system_info(DMI_BOARD_NAME);
106 product = dmi_get_system_info(DMI_PRODUCT_NAME);
110 printk(KERN_CONT "\n");
111 printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s %s/%s\n",
112 current->pid, current->comm, print_tainted(),
113 init_utsname()->release,
114 (int)strcspn(init_utsname()->version, " "),
115 init_utsname()->version, board, product);
118 void flush_thread(void)
120 struct task_struct *tsk = current;
122 flush_ptrace_hw_breakpoint(tsk);
123 memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
125 * Forget coprocessor state..
127 tsk->fpu_counter = 0;
132 static void hard_disable_TSC(void)
134 write_cr4(read_cr4() | X86_CR4_TSD);
137 void disable_TSC(void)
140 if (!test_and_set_thread_flag(TIF_NOTSC))
142 * Must flip the CPU state synchronously with
143 * TIF_NOTSC in the current running context.
149 static void hard_enable_TSC(void)
151 write_cr4(read_cr4() & ~X86_CR4_TSD);
154 static void enable_TSC(void)
157 if (test_and_clear_thread_flag(TIF_NOTSC))
159 * Must flip the CPU state synchronously with
160 * TIF_NOTSC in the current running context.
166 int get_tsc_mode(unsigned long adr)
170 if (test_thread_flag(TIF_NOTSC))
171 val = PR_TSC_SIGSEGV;
175 return put_user(val, (unsigned int __user *)adr);
178 int set_tsc_mode(unsigned int val)
180 if (val == PR_TSC_SIGSEGV)
182 else if (val == PR_TSC_ENABLE)
190 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
191 struct tss_struct *tss)
193 struct thread_struct *prev, *next;
195 prev = &prev_p->thread;
196 next = &next_p->thread;
198 if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
199 test_tsk_thread_flag(next_p, TIF_NOTSC)) {
200 /* prev and next are different */
201 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
207 if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
209 * Copy the relevant range of the IO bitmap.
210 * Normally this is 128 bytes or less:
212 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
213 max(prev->io_bitmap_max, next->io_bitmap_max));
214 } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
216 * Clear any possible leftover bits:
218 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
220 propagate_user_return_notify(prev_p, next_p);
223 int sys_fork(struct pt_regs *regs)
225 return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
229 * This is trivial, and on the face of it looks like it
230 * could equally well be done in user mode.
232 * Not so, for quite unobvious reasons - register pressure.
233 * In user mode vfork() cannot have a stack frame, and if
234 * done by calling the "clone()" system call directly, you
235 * do not have enough call-clobbered registers to hold all
236 * the information you need.
238 int sys_vfork(struct pt_regs *regs)
240 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
245 sys_clone(unsigned long clone_flags, unsigned long newsp,
246 void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
250 return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
254 * This gets run with %si containing the
255 * function to call, and %di containing
258 extern void kernel_thread_helper(void);
261 * Create a kernel thread
263 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
267 memset(®s, 0, sizeof(regs));
269 regs.si = (unsigned long) fn;
270 regs.di = (unsigned long) arg;
275 regs.fs = __KERNEL_PERCPU;
276 regs.gs = __KERNEL_STACK_CANARY;
278 regs.ss = __KERNEL_DS;
282 regs.ip = (unsigned long) kernel_thread_helper;
283 regs.cs = __KERNEL_CS | get_kernel_rpl();
284 regs.flags = X86_EFLAGS_IF | 0x2;
286 /* Ok, create the new process.. */
287 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
289 EXPORT_SYMBOL(kernel_thread);
292 * sys_execve() executes a new program.
294 long sys_execve(char __user *name, char __user * __user *argv,
295 char __user * __user *envp, struct pt_regs *regs)
300 filename = getname(name);
301 error = PTR_ERR(filename);
302 if (IS_ERR(filename))
304 error = do_execve(filename, argv, envp, regs);
308 /* Make sure we don't return using sysenter.. */
309 set_thread_flag(TIF_IRET);
318 * Idle related variables and functions
320 unsigned long boot_option_idle_override = 0;
321 EXPORT_SYMBOL(boot_option_idle_override);
324 * Powermanagement idle function, if any..
326 void (*pm_idle)(void);
327 EXPORT_SYMBOL(pm_idle);
331 * This halt magic was a workaround for ancient floppy DMA
332 * wreckage. It should be safe to remove.
334 static int hlt_counter;
335 void disable_hlt(void)
339 EXPORT_SYMBOL(disable_hlt);
341 void enable_hlt(void)
345 EXPORT_SYMBOL(enable_hlt);
347 static inline int hlt_use_halt(void)
349 return (!hlt_counter && boot_cpu_data.hlt_works_ok);
352 static inline int hlt_use_halt(void)
359 * We use this if we don't have any better
362 void default_idle(void)
364 if (hlt_use_halt()) {
365 trace_power_start(POWER_CSTATE, 1);
366 current_thread_info()->status &= ~TS_POLLING;
368 * TS_POLLING-cleared state must be visible before we
374 safe_halt(); /* enables interrupts racelessly */
377 current_thread_info()->status |= TS_POLLING;
380 /* loop is done by the caller */
384 #ifdef CONFIG_APM_MODULE
385 EXPORT_SYMBOL(default_idle);
388 void stop_this_cpu(void *dummy)
394 set_cpu_online(smp_processor_id(), false);
395 disable_local_APIC();
398 if (hlt_works(smp_processor_id()))
403 static void do_nothing(void *unused)
408 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
409 * pm_idle and update to new pm_idle value. Required while changing pm_idle
410 * handler on SMP systems.
412 * Caller must have changed pm_idle to the new value before the call. Old
413 * pm_idle value will not be used by any CPU after the return of this function.
415 void cpu_idle_wait(void)
418 /* kick all the CPUs so that they exit out of pm_idle */
419 smp_call_function(do_nothing, NULL, 1);
421 EXPORT_SYMBOL_GPL(cpu_idle_wait);
424 * This uses new MONITOR/MWAIT instructions on P4 processors with PNI,
425 * which can obviate IPI to trigger checking of need_resched.
426 * We execute MONITOR against need_resched and enter optimized wait state
427 * through MWAIT. Whenever someone changes need_resched, we would be woken
428 * up from MWAIT (without an IPI).
430 * New with Core Duo processors, MWAIT can take some hints based on CPU
433 void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
435 trace_power_start(POWER_CSTATE, (ax>>4)+1);
436 if (!need_resched()) {
437 if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
438 clflush((void *)¤t_thread_info()->flags);
440 __monitor((void *)¤t_thread_info()->flags, 0, 0);
447 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
448 static void mwait_idle(void)
450 if (!need_resched()) {
451 trace_power_start(POWER_CSTATE, 1);
452 if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
453 clflush((void *)¤t_thread_info()->flags);
455 __monitor((void *)¤t_thread_info()->flags, 0, 0);
466 * On SMP it's slightly faster (but much more power-consuming!)
467 * to poll the ->work.need_resched flag instead of waiting for the
468 * cross-CPU IPI to arrive. Use this option with caution.
470 static void poll_idle(void)
472 trace_power_start(POWER_CSTATE, 0);
474 while (!need_resched())
480 * mwait selection logic:
482 * It depends on the CPU. For AMD CPUs that support MWAIT this is
483 * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
484 * then depend on a clock divisor and current Pstate of the core. If
485 * all cores of a processor are in halt state (C1) the processor can
486 * enter the C1E (C1 enhanced) state. If mwait is used this will never
489 * idle=mwait overrides this decision and forces the usage of mwait.
491 static int __cpuinitdata force_mwait;
493 #define MWAIT_INFO 0x05
494 #define MWAIT_ECX_EXTENDED_INFO 0x01
495 #define MWAIT_EDX_C1 0xf0
497 static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
499 u32 eax, ebx, ecx, edx;
504 if (c->cpuid_level < MWAIT_INFO)
507 cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
508 /* Check, whether EDX has extended info about MWAIT */
509 if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
513 * edx enumeratios MONITOR/MWAIT extensions. Check, whether
516 return (edx & MWAIT_EDX_C1);
520 * Check for AMD CPUs, which have potentially C1E support
522 static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
524 if (c->x86_vendor != X86_VENDOR_AMD)
530 /* Family 0x0f models < rev F do not have C1E */
531 if (c->x86 == 0x0f && c->x86_model < 0x40)
537 static cpumask_var_t c1e_mask;
538 static int c1e_detected;
540 void c1e_remove_cpu(int cpu)
542 if (c1e_mask != NULL)
543 cpumask_clear_cpu(cpu, c1e_mask);
547 * C1E aware idle routine. We check for C1E active in the interrupt
548 * pending message MSR. If we detect C1E, then we handle it the same
549 * way as C3 power states (local apic timer and TSC stop)
551 static void c1e_idle(void)
559 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
560 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
562 if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
563 mark_tsc_unstable("TSC halt in AMD C1E");
564 printk(KERN_INFO "System has AMD C1E enabled\n");
565 set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);
570 int cpu = smp_processor_id();
572 if (!cpumask_test_cpu(cpu, c1e_mask)) {
573 cpumask_set_cpu(cpu, c1e_mask);
575 * Force broadcast so ACPI can not interfere.
577 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
579 printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
582 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
587 * The switch back from broadcast mode needs to be
588 * called with interrupts disabled.
591 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
597 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
600 if (pm_idle == poll_idle && smp_num_siblings > 1) {
601 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
602 " performance may degrade.\n");
608 if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
610 * One CPU supports mwait => All CPUs supports mwait
612 printk(KERN_INFO "using mwait in idle threads.\n");
613 pm_idle = mwait_idle;
614 } else if (check_c1e_idle(c)) {
615 printk(KERN_INFO "using C1E aware idle routine\n");
618 pm_idle = default_idle;
621 void __init init_c1e_mask(void)
623 /* If we're using c1e_idle, we need to allocate c1e_mask. */
624 if (pm_idle == c1e_idle)
625 zalloc_cpumask_var(&c1e_mask, GFP_KERNEL);
628 static int __init idle_setup(char *str)
633 if (!strcmp(str, "poll")) {
634 printk("using polling idle threads.\n");
636 } else if (!strcmp(str, "mwait"))
638 else if (!strcmp(str, "halt")) {
640 * When the boot option of idle=halt is added, halt is
641 * forced to be used for CPU idle. In such case CPU C2/C3
642 * won't be used again.
643 * To continue to load the CPU idle driver, don't touch
644 * the boot_option_idle_override.
646 pm_idle = default_idle;
649 } else if (!strcmp(str, "nomwait")) {
651 * If the boot option of "idle=nomwait" is added,
652 * it means that mwait will be disabled for CPU C2/C3
653 * states. In such case it won't touch the variable
654 * of boot_option_idle_override.
661 boot_option_idle_override = 1;
664 early_param("idle", idle_setup);
666 unsigned long arch_align_stack(unsigned long sp)
668 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
669 sp -= get_random_int() % 8192;
673 unsigned long arch_randomize_brk(struct mm_struct *mm)
675 unsigned long range_end = mm->brk + 0x02000000;
676 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;