arch/x86/kernel/numaq_32.c

   1 /*
   2  * Written by: Patricia Gaughen, IBM Corporation
   3  *
   4  * Copyright (C) 2002, IBM Corp.
   5  *
   6  * All rights reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  16  * NON INFRINGEMENT.  See the GNU General Public License for more
  17  * details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  * Send feedback to <gone@us.ibm.com>
  24  */
  25
  26 #include <linux/mm.h>
  27 #include <linux/bootmem.h>
  28 #include <linux/mmzone.h>
  29 #include <linux/module.h>
  30 #include <linux/nodemask.h>
  31 #include <asm/numaq.h>
  32 #include <asm/topology.h>
  33 #include <asm/processor.h>
  34 #include <asm/genapic.h>
  35 #include <asm/e820.h>
  36 #include <asm/setup.h>
  37
  38 #define MB_TO_PAGES(addr) ((addr) << (20 - PAGE_SHIFT))
  39
  40 /*
  41  * Function: smp_dump_qct()
  42  *
  43  * Description: gets memory layout from the quad config table.  This
  44  * function also updates node_online_map with the nodes (quads) present.
  45  */
  46 static void __init smp_dump_qct(void)
  47 {
  48         int node;
  49         struct eachquadmem *eq;
  50         struct sys_cfg_data *scd =
  51                 (struct sys_cfg_data *)__va(SYS_CFG_DATA_PRIV_ADDR);
  52
  53         nodes_clear(node_online_map);
  54         for_each_node(node) {
  55                 if (scd->quads_present31_0 & (1 << node)) {
  56                         node_set_online(node);
  57                         eq = &scd->eq[node];
  58                         /* Convert to pages */
  59                         node_start_pfn[node] = MB_TO_PAGES(
  60                                 eq->hi_shrd_mem_start - eq->priv_mem_size);
  61                         node_end_pfn[node] = MB_TO_PAGES(
  62                                 eq->hi_shrd_mem_start + eq->hi_shrd_mem_size);
  63
  64                         e820_register_active_regions(node, node_start_pfn[node],
  65                                                         node_end_pfn[node]);
  66                         memory_present(node,
  67                                 node_start_pfn[node], node_end_pfn[node]);
  68                         node_remap_size[node] = node_memmap_size_bytes(node,
  69                                                         node_start_pfn[node],
  70                                                         node_end_pfn[node]);
  71                 }
  72         }
  73 }
  74
  75
  76 void __cpuinit numaq_tsc_disable(void)
  77 {
  78         if (!found_numaq)
  79                 return;
  80
  81         if (num_online_nodes() > 1) {
  82                 printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
  83                 setup_clear_cpu_cap(X86_FEATURE_TSC);
  84         }
  85 }
  86
  87 static int __init numaq_pre_time_init(void)
  88 {
  89         numaq_tsc_disable();
  90         return 0;
  91 }
  92
  93 int found_numaq;
  94 /*
  95  * Have to match translation table entries to main table entries by counter
  96  * hence the mpc_record variable .... can't see a less disgusting way of
  97  * doing this ....
  98  */
  99 struct mpc_config_translation {
 100         unsigned char mpc_type;
 101         unsigned char trans_len;
 102         unsigned char trans_type;
 103         unsigned char trans_quad;
 104         unsigned char trans_global;
 105         unsigned char trans_local;
 106         unsigned short trans_reserved;
 107 };
 108
 109 /* x86_quirks member */
 110 static int mpc_record;
 111 static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY]
 112     __cpuinitdata;
 113
 114 static inline int generate_logical_apicid(int quad, int phys_apicid)
 115 {
 116         return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
 117 }
 118
 119 /* x86_quirks member */
 120 static int mpc_apic_id(struct mpc_cpu *m)
 121 {
 122         int quad = translation_table[mpc_record]->trans_quad;
 123         int logical_apicid = generate_logical_apicid(quad, m->apicid);
 124
 125         printk(KERN_DEBUG "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n",
 126                m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8,
 127                (m->cpufeature & CPU_MODEL_MASK) >> 4,
 128                m->apicver, quad, logical_apicid);
 129         return logical_apicid;
 130 }
 131
 132 int mp_bus_id_to_node[MAX_MP_BUSSES];
 133
 134 int mp_bus_id_to_local[MAX_MP_BUSSES];
 135
 136 /* x86_quirks member */
 137 static void mpc_oem_bus_info(struct mpc_bus *m, char *name)
 138 {
 139         int quad = translation_table[mpc_record]->trans_quad;
 140         int local = translation_table[mpc_record]->trans_local;
 141
 142         mp_bus_id_to_node[m->busid] = quad;
 143         mp_bus_id_to_local[m->busid] = local;
 144         printk(KERN_INFO "Bus #%d is %s (node %d)\n",
 145                m->busid, name, quad);
 146 }
 147
 148 int quad_local_to_mp_bus_id [NR_CPUS/4][4];
 149
 150 /* x86_quirks member */
 151 static void mpc_oem_pci_bus(struct mpc_bus *m)
 152 {
 153         int quad = translation_table[mpc_record]->trans_quad;
 154         int local = translation_table[mpc_record]->trans_local;
 155
 156         quad_local_to_mp_bus_id[quad][local] = m->busid;
 157 }
 158
 159 static void __init MP_translation_info(struct mpc_config_translation *m)
 160 {
 161         printk(KERN_INFO
 162                "Translation: record %d, type %d, quad %d, global %d, local %d\n",
 163                mpc_record, m->trans_type, m->trans_quad, m->trans_global,
 164                m->trans_local);
 165
 166         if (mpc_record >= MAX_MPC_ENTRY)
 167                 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
 168         else
 169                 translation_table[mpc_record] = m;      /* stash this for later */
 170         if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
 171                 node_set_online(m->trans_quad);
 172 }
 173
 174 static int __init mpf_checksum(unsigned char *mp, int len)
 175 {
 176         int sum = 0;
 177
 178         while (len--)
 179                 sum += *mp++;
 180
 181         return sum & 0xFF;
 182 }
 183
 184 /*
 185  * Read/parse the MPC oem tables
 186  */
 187
 188 static void __init smp_read_mpc_oem(struct mpc_oemtable *oemtable,
 189                                     unsigned short oemsize)
 190 {
 191         int count = sizeof(*oemtable);  /* the header size */
 192         unsigned char *oemptr = ((unsigned char *)oemtable) + count;
 193
 194         mpc_record = 0;
 195         printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n",
 196                oemtable);
 197         if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) {
 198                 printk(KERN_WARNING
 199                        "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
 200                        oemtable->signature[0], oemtable->signature[1],
 201                        oemtable->signature[2], oemtable->signature[3]);
 202                 return;
 203         }
 204         if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) {
 205                 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
 206                 return;
 207         }
 208         while (count < oemtable->length) {
 209                 switch (*oemptr) {
 210                 case MP_TRANSLATION:
 211                         {
 212                                 struct mpc_config_translation *m =
 213                                     (struct mpc_config_translation *)oemptr;
 214                                 MP_translation_info(m);
 215                                 oemptr += sizeof(*m);
 216                                 count += sizeof(*m);
 217                                 ++mpc_record;
 218                                 break;
 219                         }
 220                 default:
 221                         {
 222                                 printk(KERN_WARNING
 223                                        "Unrecognised OEM table entry type! - %d\n",
 224                                        (int)*oemptr);
 225                                 return;
 226                         }
 227                 }
 228         }
 229 }
 230
 231 static int __init numaq_setup_ioapic_ids(void)
 232 {
 233         /* so can skip it */
 234         return 1;
 235 }
 236
 237 static int __init numaq_update_genapic(void)
 238 {
 239         apic->wakeup_cpu = wakeup_secondary_cpu_via_nmi;
 240
 241         return 0;
 242 }
 243
 244 static struct x86_quirks numaq_x86_quirks __initdata = {
 245         .arch_pre_time_init     = numaq_pre_time_init,
 246         .arch_time_init         = NULL,
 247         .arch_pre_intr_init     = NULL,
 248         .arch_memory_setup      = NULL,
 249         .arch_intr_init         = NULL,
 250         .arch_trap_init         = NULL,
 251         .mach_get_smp_config    = NULL,
 252         .mach_find_smp_config   = NULL,
 253         .mpc_record             = &mpc_record,
 254         .mpc_apic_id            = mpc_apic_id,
 255         .mpc_oem_bus_info       = mpc_oem_bus_info,
 256         .mpc_oem_pci_bus        = mpc_oem_pci_bus,
 257         .smp_read_mpc_oem       = smp_read_mpc_oem,
 258         .setup_ioapic_ids       = numaq_setup_ioapic_ids,
 259         .update_genapic         = numaq_update_genapic,
 260 };
 261
 262 void numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
 263 {
 264         if (strncmp(oem, "IBM NUMA", 8))
 265                 printk("Warning!  Not a NUMA-Q system!\n");
 266         else
 267                 found_numaq = 1;
 268 }
 269
 270 static __init void early_check_numaq(void)
 271 {
 272         /*
 273          * Find possible boot-time SMP configuration:
 274          */
 275         early_find_smp_config();
 276         /*
 277          * get boot-time SMP configuration:
 278          */
 279         if (smp_found_config)
 280                 early_get_smp_config();
 281
 282         if (found_numaq)
 283                 x86_quirks = &numaq_x86_quirks;
 284 }
 285
 286 int __init get_memcfg_numaq(void)
 287 {
 288         early_check_numaq();
 289         if (!found_numaq)
 290                 return 0;
 291         smp_dump_qct();
 292         return 1;
 293 }
 294
 295 /*
 296  * APIC driver for the IBM NUMAQ chipset.
 297  */
 298 #define APIC_DEFINITION 1
 299 #include <linux/threads.h>
 300 #include <linux/cpumask.h>
 301 #include <asm/mpspec.h>
 302 #include <asm/genapic.h>
 303 #include <asm/fixmap.h>
 304 #include <asm/apicdef.h>
 305 #include <linux/kernel.h>
 306 #include <linux/string.h>
 307 #include <linux/init.h>
 308 #include <linux/numa.h>
 309 #include <linux/smp.h>
 310 #include <asm/numaq.h>
 311 #include <asm/io.h>
 312 #include <linux/mmzone.h>
 313 #include <linux/nodemask.h>
 314
 315 #define NUMAQ_APIC_DFR_VALUE    (APIC_DFR_CLUSTER)
 316
 317 static inline unsigned int numaq_get_apic_id(unsigned long x)
 318 {
 319         return (x >> 24) & 0x0F;
 320 }
 321
 322 void default_send_IPI_mask_sequence(const struct cpumask *mask, int vector);
 323 void default_send_IPI_mask_allbutself(const struct cpumask *mask, int vector);
 324
 325 static inline void numaq_send_IPI_mask(const struct cpumask *mask, int vector)
 326 {
 327         default_send_IPI_mask_sequence(mask, vector);
 328 }
 329
 330 static inline void numaq_send_IPI_allbutself(int vector)
 331 {
 332         default_send_IPI_mask_allbutself(cpu_online_mask, vector);
 333 }
 334
 335 static inline void numaq_send_IPI_all(int vector)
 336 {
 337         numaq_send_IPI_mask(cpu_online_mask, vector);
 338 }
 339
 340 extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
 341
 342 #define NUMAQ_TRAMPOLINE_PHYS_LOW (0x8)
 343 #define NUMAQ_TRAMPOLINE_PHYS_HIGH (0xa)
 344
 345 /*
 346  * Because we use NMIs rather than the INIT-STARTUP sequence to
 347  * bootstrap the CPUs, the APIC may be in a weird state. Kick it:
 348  */
 349 static inline void numaq_smp_callin_clear_local_apic(void)
 350 {
 351         clear_local_APIC();
 352 }
 353
 354 static inline void
 355 numaq_store_NMI_vector(unsigned short *high, unsigned short *low)
 356 {
 357         printk("Storing NMI vector\n");
 358         *high =
 359           *((volatile unsigned short *)phys_to_virt(NUMAQ_TRAMPOLINE_PHYS_HIGH));
 360         *low =
 361           *((volatile unsigned short *)phys_to_virt(NUMAQ_TRAMPOLINE_PHYS_LOW));
 362 }
 363
 364 static inline const cpumask_t *numaq_target_cpus(void)
 365 {
 366         return &CPU_MASK_ALL;
 367 }
 368
 369 static inline unsigned long
 370 numaq_check_apicid_used(physid_mask_t bitmap, int apicid)
 371 {
 372         return physid_isset(apicid, bitmap);
 373 }
 374
 375 static inline unsigned long numaq_check_apicid_present(int bit)
 376 {
 377         return physid_isset(bit, phys_cpu_present_map);
 378 }
 379
 380 #define apicid_cluster(apicid) (apicid & 0xF0)
 381
 382 static inline int numaq_apic_id_registered(void)
 383 {
 384         return 1;
 385 }
 386
 387 static inline void numaq_init_apic_ldr(void)
 388 {
 389         /* Already done in NUMA-Q firmware */
 390 }
 391
 392 static inline void numaq_setup_apic_routing(void)
 393 {
 394         printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
 395                 "NUMA-Q", nr_ioapics);
 396 }
 397
 398 /*
 399  * Skip adding the timer int on secondary nodes, which causes
 400  * a small but painful rift in the time-space continuum.
 401  */
 402 static inline int numaq_multi_timer_check(int apic, int irq)
 403 {
 404         return apic != 0 && irq == 0;
 405 }
 406
 407 static inline physid_mask_t numaq_ioapic_phys_id_map(physid_mask_t phys_map)
 408 {
 409         /* We don't have a good way to do this yet - hack */
 410         return physids_promote(0xFUL);
 411 }
 412
 413 /* Mapping from cpu number to logical apicid */
 414 extern u8 cpu_2_logical_apicid[];
 415
 416 static inline int numaq_cpu_to_logical_apicid(int cpu)
 417 {
 418         if (cpu >= nr_cpu_ids)
 419                 return BAD_APICID;
 420         return (int)cpu_2_logical_apicid[cpu];
 421 }
 422
 423 /*
 424  * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
 425  * cpu to APIC ID relation to properly interact with the intelligent
 426  * mode of the cluster controller.
 427  */
 428 static inline int numaq_cpu_present_to_apicid(int mps_cpu)
 429 {
 430         if (mps_cpu < 60)
 431                 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
 432         else
 433                 return BAD_APICID;
 434 }
 435
 436 static inline int numaq_apicid_to_node(int logical_apicid)
 437 {
 438         return logical_apicid >> 4;
 439 }
 440
 441 static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid)
 442 {
 443         int node = numaq_apicid_to_node(logical_apicid);
 444         int cpu = __ffs(logical_apicid & 0xf);
 445
 446         return physid_mask_of_physid(cpu + 4*node);
 447 }
 448
 449 extern void *xquad_portio;
 450
 451 static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid)
 452 {
 453         return 1;
 454 }
 455
 456 /*
 457  * We use physical apicids here, not logical, so just return the default
 458  * physical broadcast to stop people from breaking us
 459  */
 460 static inline unsigned int numaq_cpu_mask_to_apicid(const cpumask_t *cpumask)
 461 {
 462         return 0x0F;
 463 }
 464
 465 static inline unsigned int
 466 numaq_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
 467                              const struct cpumask *andmask)
 468 {
 469         return 0x0F;
 470 }
 471
 472 /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
 473 static inline int numaq_phys_pkg_id(int cpuid_apic, int index_msb)
 474 {
 475         return cpuid_apic >> index_msb;
 476 }
 477 static int __numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
 478 {
 479         numaq_mps_oem_check(mpc, oem, productid);
 480         return found_numaq;
 481 }
 482
 483 static int probe_numaq(void)
 484 {
 485         /* already know from get_memcfg_numaq() */
 486         return found_numaq;
 487 }
 488
 489 static void numaq_vector_allocation_domain(int cpu, cpumask_t *retmask)
 490 {
 491         /* Careful. Some cpus do not strictly honor the set of cpus
 492          * specified in the interrupt destination when using lowest
 493          * priority interrupt delivery mode.
 494          *
 495          * In particular there was a hyperthreading cpu observed to
 496          * deliver interrupts to the wrong hyperthread when only one
 497          * hyperthread was specified in the interrupt desitination.
 498          */
 499         *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
 500 }
 501
 502 static void numaq_setup_portio_remap(void)
 503 {
 504         int num_quads = num_online_nodes();
 505
 506         if (num_quads <= 1)
 507                 return;
 508
 509         printk("Remapping cross-quad port I/O for %d quads\n", num_quads);
 510         xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
 511         printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
 512                 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
 513 }
 514
 515 struct genapic apic_numaq = {
 516
 517         .name                           = "NUMAQ",
 518         .probe                          = probe_numaq,
 519         .acpi_madt_oem_check            = NULL,
 520         .apic_id_registered             = numaq_apic_id_registered,
 521
 522         .irq_delivery_mode              = dest_LowestPrio,
 523         /* physical delivery on LOCAL quad: */
 524         .irq_dest_mode                  = 0,
 525
 526         .target_cpus                    = numaq_target_cpus,
 527         .disable_esr                    = 1,
 528         .dest_logical                   = APIC_DEST_LOGICAL,
 529         .check_apicid_used              = numaq_check_apicid_used,
 530         .check_apicid_present           = numaq_check_apicid_present,
 531
 532         .vector_allocation_domain       = numaq_vector_allocation_domain,
 533         .init_apic_ldr                  = numaq_init_apic_ldr,
 534
 535         .ioapic_phys_id_map             = numaq_ioapic_phys_id_map,
 536         .setup_apic_routing             = numaq_setup_apic_routing,
 537         .multi_timer_check              = numaq_multi_timer_check,
 538         .apicid_to_node                 = numaq_apicid_to_node,
 539         .cpu_to_logical_apicid          = numaq_cpu_to_logical_apicid,
 540         .cpu_present_to_apicid          = numaq_cpu_present_to_apicid,
 541         .apicid_to_cpu_present          = numaq_apicid_to_cpu_present,
 542         .setup_portio_remap             = numaq_setup_portio_remap,
 543         .check_phys_apicid_present      = numaq_check_phys_apicid_present,
 544         .enable_apic_mode               = NULL,
 545         .phys_pkg_id                    = numaq_phys_pkg_id,
 546         .mps_oem_check                  = __numaq_mps_oem_check,
 547
 548         .get_apic_id                    = numaq_get_apic_id,
 549         .set_apic_id                    = NULL,
 550         .apic_id_mask                   = 0x0F << 24,
 551
 552         .cpu_mask_to_apicid             = numaq_cpu_mask_to_apicid,
 553         .cpu_mask_to_apicid_and         = numaq_cpu_mask_to_apicid_and,
 554
 555         .send_IPI_mask                  = numaq_send_IPI_mask,
 556         .send_IPI_mask_allbutself       = NULL,
 557         .send_IPI_allbutself            = numaq_send_IPI_allbutself,
 558         .send_IPI_all                   = numaq_send_IPI_all,
 559         .send_IPI_self                  = NULL,
 560
 561         .wakeup_cpu                     = NULL,
 562         .trampoline_phys_low            = NUMAQ_TRAMPOLINE_PHYS_LOW,
 563         .trampoline_phys_high           = NUMAQ_TRAMPOLINE_PHYS_HIGH,
 564
 565         /* We don't do anything here because we use NMI's to boot instead */
 566         .wait_for_init_deassert         = NULL,
 567
 568         .smp_callin_clear_local_apic    = numaq_smp_callin_clear_local_apic,
 569         .store_NMI_vector               = numaq_store_NMI_vector,
 570         .inquire_remote_apic            = NULL,
 571 };