2 * xsave/xrstor support.
4 * Author: Suresh Siddha <suresh.b.siddha@intel.com>
6 #include <linux/compat.h>
8 #include <asm/fpu/api.h>
9 #include <asm/fpu/internal.h>
10 #include <asm/sigframe.h>
11 #include <asm/tlbflush.h>
13 static const char *xfeature_names[] =
15 "x87 floating point registers" ,
18 "MPX bounds registers" ,
23 "unknown xstate feature" ,
27 * Mask of xstate features supported by the CPU and the kernel:
29 u64 xfeatures_mask __read_mostly;
32 * Represents init state for the supported extended state.
34 struct xsave_struct init_xstate_ctx;
36 static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32;
37 static unsigned int xstate_offsets[XFEATURES_NR_MAX], xstate_sizes[XFEATURES_NR_MAX];
38 static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
40 /* The number of supported xfeatures in xfeatures_mask: */
41 static unsigned int xfeatures_nr;
44 * Return whether the system supports a given xfeature.
46 * Also return the name of the (most advanced) feature that the caller requested:
48 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
50 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
52 if (unlikely(feature_name)) {
53 long xfeature_idx, max_idx;
56 * So we use FLS here to be able to print the most advanced
57 * feature that was requested but is missing. So if a driver
58 * asks about "XSTATE_SSE | XSTATE_YMM" we'll print the
59 * missing AVX feature - this is the most informative message
62 if (xfeatures_missing)
63 xfeatures_print = xfeatures_missing;
65 xfeatures_print = xfeatures_needed;
67 xfeature_idx = fls64(xfeatures_print)-1;
68 max_idx = ARRAY_SIZE(xfeature_names)-1;
69 xfeature_idx = min(xfeature_idx, max_idx);
71 *feature_name = xfeature_names[xfeature_idx];
74 if (xfeatures_missing)
79 EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
82 * When executing XSAVEOPT (optimized XSAVE), if a processor implementation
83 * detects that an FPU state component is still (or is again) in its
84 * initialized state, it may clear the corresponding bit in the header.xfeatures
85 * field, and can skip the writeout of registers to the corresponding memory layout.
87 * This means that when the bit is zero, the state component might still contain
88 * some previous - non-initialized register state.
90 * Before writing xstate information to user-space we sanitize those components,
91 * to always ensure that the memory layout of a feature will be in the init state
92 * if the corresponding header bit is zero. This is to ensure that user-space doesn't
93 * see some stale state in the memory layout during signal handling, debugging etc.
95 void __fpstate_sanitize_xstate(struct task_struct *tsk)
97 struct i387_fxsave_struct *fx = &tsk->thread.fpu.state.fxsave;
104 xfeatures = tsk->thread.fpu.state.xsave.header.xfeatures;
107 * None of the feature bits are in init state. So nothing else
108 * to do for us, as the memory layout is up to date.
110 if ((xfeatures & xfeatures_mask) == xfeatures_mask)
114 * FP is in init state
116 if (!(xfeatures & XSTATE_FP)) {
123 memset(&fx->st_space[0], 0, 128);
127 * SSE is in init state
129 if (!(xfeatures & XSTATE_SSE))
130 memset(&fx->xmm_space[0], 0, 256);
133 * First two features are FPU and SSE, which above we handled
134 * in a special way already:
137 xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
140 * Update all the remaining memory layouts according to their
141 * standard xstate layout, if their header bit is in the init
145 if (xfeatures & 0x1) {
146 int offset = xstate_offsets[feature_bit];
147 int size = xstate_sizes[feature_bit];
149 memcpy((void *)fx + offset,
150 (void *)&init_xstate_ctx + offset,
160 * Check for the presence of extended state information in the
161 * user fpstate pointer in the sigcontext.
163 static inline int check_for_xstate(struct i387_fxsave_struct __user *buf,
164 void __user *fpstate,
165 struct _fpx_sw_bytes *fx_sw)
167 int min_xstate_size = sizeof(struct i387_fxsave_struct) +
168 sizeof(struct xstate_header);
171 if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw)))
174 /* Check for the first magic field and other error scenarios. */
175 if (fx_sw->magic1 != FP_XSTATE_MAGIC1 ||
176 fx_sw->xstate_size < min_xstate_size ||
177 fx_sw->xstate_size > xstate_size ||
178 fx_sw->xstate_size > fx_sw->extended_size)
182 * Check for the presence of second magic word at the end of memory
183 * layout. This detects the case where the user just copied the legacy
184 * fpstate layout with out copying the extended state information
185 * in the memory layout.
187 if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size))
188 || magic2 != FP_XSTATE_MAGIC2)
195 * Signal frame handlers.
197 static inline int save_fsave_header(struct task_struct *tsk, void __user *buf)
200 struct xsave_struct *xsave = &tsk->thread.fpu.state.xsave;
201 struct user_i387_ia32_struct env;
202 struct _fpstate_ia32 __user *fp = buf;
204 convert_from_fxsr(&env, tsk);
206 if (__copy_to_user(buf, &env, sizeof(env)) ||
207 __put_user(xsave->i387.swd, &fp->status) ||
208 __put_user(X86_FXSR_MAGIC, &fp->magic))
211 struct i387_fsave_struct __user *fp = buf;
213 if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status))
220 static inline int save_xstate_epilog(void __user *buf, int ia32_frame)
222 struct xsave_struct __user *x = buf;
223 struct _fpx_sw_bytes *sw_bytes;
227 /* Setup the bytes not touched by the [f]xsave and reserved for SW. */
228 sw_bytes = ia32_frame ? &fx_sw_reserved_ia32 : &fx_sw_reserved;
229 err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes));
234 err |= __put_user(FP_XSTATE_MAGIC2, (__u32 *)(buf + xstate_size));
237 * Read the xfeatures which we copied (directly from the cpu or
238 * from the state in task struct) to the user buffers.
240 err |= __get_user(xfeatures, (__u32 *)&x->header.xfeatures);
243 * For legacy compatible, we always set FP/SSE bits in the bit
244 * vector while saving the state to the user context. This will
245 * enable us capturing any changes(during sigreturn) to
246 * the FP/SSE bits by the legacy applications which don't touch
247 * xfeatures in the xsave header.
249 * xsave aware apps can change the xfeatures in the xsave
250 * header as well as change any contents in the memory layout.
251 * xrestore as part of sigreturn will capture all the changes.
253 xfeatures |= XSTATE_FPSSE;
255 err |= __put_user(xfeatures, (__u32 *)&x->header.xfeatures);
260 static inline int save_user_xstate(struct xsave_struct __user *buf)
265 err = xsave_user(buf);
267 err = fxsave_user((struct i387_fxsave_struct __user *) buf);
269 err = fsave_user((struct i387_fsave_struct __user *) buf);
271 if (unlikely(err) && __clear_user(buf, xstate_size))
277 * Save the fpu, extended register state to the user signal frame.
279 * 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save
281 * 'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'.
283 * buf == buf_fx for 64-bit frames and 32-bit fsave frame.
284 * buf != buf_fx for 32-bit frames with fxstate.
286 * If the fpu, extended register state is live, save the state directly
287 * to the user frame pointed by the aligned pointer 'buf_fx'. Otherwise,
288 * copy the thread's fpu state to the user frame starting at 'buf_fx'.
290 * If this is a 32-bit frame with fxstate, put a fsave header before
291 * the aligned state at 'buf_fx'.
293 * For [f]xsave state, update the SW reserved fields in the [f]xsave frame
294 * indicating the absence/presence of the extended state to the user.
296 int save_xstate_sig(void __user *buf, void __user *buf_fx, int size)
298 struct xsave_struct *xsave = ¤t->thread.fpu.state.xsave;
299 struct task_struct *tsk = current;
300 int ia32_fxstate = (buf != buf_fx);
302 ia32_fxstate &= (config_enabled(CONFIG_X86_32) ||
303 config_enabled(CONFIG_IA32_EMULATION));
305 if (!access_ok(VERIFY_WRITE, buf, size))
308 if (!static_cpu_has(X86_FEATURE_FPU))
309 return fpregs_soft_get(current, NULL, 0,
310 sizeof(struct user_i387_ia32_struct), NULL,
311 (struct _fpstate_ia32 __user *) buf) ? -1 : 1;
313 if (user_has_fpu()) {
314 /* Save the live register state to the user directly. */
315 if (save_user_xstate(buf_fx))
317 /* Update the thread's fxstate to save the fsave header. */
319 fpu_fxsave(&tsk->thread.fpu);
321 fpstate_sanitize_xstate(tsk);
322 if (__copy_to_user(buf_fx, xsave, xstate_size))
326 /* Save the fsave header for the 32-bit frames. */
327 if ((ia32_fxstate || !use_fxsr()) && save_fsave_header(tsk, buf))
330 if (use_fxsr() && save_xstate_epilog(buf_fx, ia32_fxstate))
337 sanitize_restored_xstate(struct task_struct *tsk,
338 struct user_i387_ia32_struct *ia32_env,
339 u64 xfeatures, int fx_only)
341 struct xsave_struct *xsave = &tsk->thread.fpu.state.xsave;
342 struct xstate_header *header = &xsave->header;
345 /* These bits must be zero. */
346 memset(header->reserved, 0, 48);
349 * Init the state that is not present in the memory
350 * layout and not enabled by the OS.
353 header->xfeatures = XSTATE_FPSSE;
355 header->xfeatures &= (xfeatures_mask & xfeatures);
360 * mscsr reserved bits must be masked to zero for security
363 xsave->i387.mxcsr &= mxcsr_feature_mask;
365 convert_to_fxsr(tsk, ia32_env);
370 * Restore the extended state if present. Otherwise, restore the FP/SSE state.
372 static inline int restore_user_xstate(void __user *buf, u64 xbv, int fx_only)
375 if ((unsigned long)buf % 64 || fx_only) {
376 u64 init_bv = xfeatures_mask & ~XSTATE_FPSSE;
377 xrstor_state(&init_xstate_ctx, init_bv);
378 return fxrstor_user(buf);
380 u64 init_bv = xfeatures_mask & ~xbv;
381 if (unlikely(init_bv))
382 xrstor_state(&init_xstate_ctx, init_bv);
383 return xrestore_user(buf, xbv);
385 } else if (use_fxsr()) {
386 return fxrstor_user(buf);
388 return frstor_user(buf);
391 int __restore_xstate_sig(void __user *buf, void __user *buf_fx, int size)
393 int ia32_fxstate = (buf != buf_fx);
394 struct task_struct *tsk = current;
395 struct fpu *fpu = &tsk->thread.fpu;
396 int state_size = xstate_size;
400 ia32_fxstate &= (config_enabled(CONFIG_X86_32) ||
401 config_enabled(CONFIG_IA32_EMULATION));
404 fpu_reset_state(fpu);
408 if (!access_ok(VERIFY_READ, buf, size))
411 fpu__activate_curr(fpu);
413 if (!static_cpu_has(X86_FEATURE_FPU))
414 return fpregs_soft_set(current, NULL,
415 0, sizeof(struct user_i387_ia32_struct),
419 struct _fpx_sw_bytes fx_sw_user;
420 if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) {
422 * Couldn't find the extended state information in the
423 * memory layout. Restore just the FP/SSE and init all
424 * the other extended state.
426 state_size = sizeof(struct i387_fxsave_struct);
429 state_size = fx_sw_user.xstate_size;
430 xfeatures = fx_sw_user.xfeatures;
436 * For 32-bit frames with fxstate, copy the user state to the
437 * thread's fpu state, reconstruct fxstate from the fsave
438 * header. Sanitize the copied state etc.
440 struct fpu *fpu = &tsk->thread.fpu;
441 struct user_i387_ia32_struct env;
445 * Drop the current fpu which clears fpu->fpstate_active. This ensures
446 * that any context-switch during the copy of the new state,
447 * avoids the intermediate state from getting restored/saved.
448 * Thus avoiding the new restored state from getting corrupted.
449 * We will be ready to restore/save the state only after
450 * fpu->fpstate_active is again set.
454 if (__copy_from_user(&fpu->state.xsave, buf_fx, state_size) ||
455 __copy_from_user(&env, buf, sizeof(env))) {
459 sanitize_restored_xstate(tsk, &env, xfeatures, fx_only);
462 fpu->fpstate_active = 1;
463 if (use_eager_fpu()) {
472 * For 64-bit frames and 32-bit fsave frames, restore the user
473 * state to the registers directly (with exceptions handled).
476 if (restore_user_xstate(buf_fx, xfeatures, fx_only)) {
477 fpu_reset_state(fpu);
486 * Prepare the SW reserved portion of the fxsave memory layout, indicating
487 * the presence of the extended state information in the memory layout
488 * pointed by the fpstate pointer in the sigcontext.
489 * This will be saved when ever the FP and extended state context is
490 * saved on the user stack during the signal handler delivery to the user.
492 static void prepare_fx_sw_frame(void)
494 int fsave_header_size = sizeof(struct i387_fsave_struct);
495 int size = xstate_size + FP_XSTATE_MAGIC2_SIZE;
497 if (config_enabled(CONFIG_X86_32))
498 size += fsave_header_size;
500 fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1;
501 fx_sw_reserved.extended_size = size;
502 fx_sw_reserved.xfeatures = xfeatures_mask;
503 fx_sw_reserved.xstate_size = xstate_size;
505 if (config_enabled(CONFIG_IA32_EMULATION)) {
506 fx_sw_reserved_ia32 = fx_sw_reserved;
507 fx_sw_reserved_ia32.extended_size += fsave_header_size;
512 * Enable the extended processor state save/restore feature.
513 * Called once per CPU onlining.
515 void fpu__init_cpu_xstate(void)
517 if (!cpu_has_xsave || !xfeatures_mask)
520 cr4_set_bits(X86_CR4_OSXSAVE);
521 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
525 * Record the offsets and sizes of different state managed by the xsave
528 static void __init setup_xstate_features(void)
530 int eax, ebx, ecx, edx, leaf = 0x2;
532 xfeatures_nr = fls64(xfeatures_mask);
535 cpuid_count(XSTATE_CPUID, leaf, &eax, &ebx, &ecx, &edx);
540 xstate_offsets[leaf] = ebx;
541 xstate_sizes[leaf] = eax;
547 static void print_xstate_feature(u64 xstate_mask)
549 const char *feature_name;
551 if (cpu_has_xfeatures(xstate_mask, &feature_name))
552 pr_info("x86/fpu: Supporting XSAVE feature 0x%02Lx: '%s'\n", xstate_mask, feature_name);
556 * Print out all the supported xstate features:
558 static void print_xstate_features(void)
560 print_xstate_feature(XSTATE_FP);
561 print_xstate_feature(XSTATE_SSE);
562 print_xstate_feature(XSTATE_YMM);
563 print_xstate_feature(XSTATE_BNDREGS);
564 print_xstate_feature(XSTATE_BNDCSR);
565 print_xstate_feature(XSTATE_OPMASK);
566 print_xstate_feature(XSTATE_ZMM_Hi256);
567 print_xstate_feature(XSTATE_Hi16_ZMM);
571 * This function sets up offsets and sizes of all extended states in
572 * xsave area. This supports both standard format and compacted format
573 * of the xsave aread.
578 void setup_xstate_comp(void)
580 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
584 * The FP xstates and SSE xstates are legacy states. They are always
585 * in the fixed offsets in the xsave area in either compacted form
588 xstate_comp_offsets[0] = 0;
589 xstate_comp_offsets[1] = offsetof(struct i387_fxsave_struct, xmm_space);
591 if (!cpu_has_xsaves) {
592 for (i = 2; i < xfeatures_nr; i++) {
593 if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
594 xstate_comp_offsets[i] = xstate_offsets[i];
595 xstate_comp_sizes[i] = xstate_sizes[i];
601 xstate_comp_offsets[2] = FXSAVE_SIZE + XSAVE_HDR_SIZE;
603 for (i = 2; i < xfeatures_nr; i++) {
604 if (test_bit(i, (unsigned long *)&xfeatures_mask))
605 xstate_comp_sizes[i] = xstate_sizes[i];
607 xstate_comp_sizes[i] = 0;
610 xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
611 + xstate_comp_sizes[i-1];
617 * setup the xstate image representing the init state
619 static void setup_init_fpu_buf(void)
621 static int on_boot_cpu = 1;
630 setup_xstate_features();
631 print_xstate_features();
633 if (cpu_has_xsaves) {
634 init_xstate_ctx.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
635 init_xstate_ctx.header.xfeatures = xfeatures_mask;
639 * Init all the features state with header_bv being 0x0
641 xrstor_state_booting(&init_xstate_ctx, -1);
644 * Dump the init state again. This is to identify the init state
645 * of any feature which is not represented by all zero's.
647 xsave_state_booting(&init_xstate_ctx);
651 * Calculate total size of enabled xstates in XCR0/xfeatures_mask.
653 static void __init init_xstate_size(void)
655 unsigned int eax, ebx, ecx, edx;
658 if (!cpu_has_xsaves) {
659 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
664 xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
665 for (i = 2; i < 64; i++) {
666 if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
667 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
674 * Enable and initialize the xsave feature.
675 * Called once per system bootup.
677 * ( Not marked __init because of false positive section warnings. )
679 void fpu__init_system_xstate(void)
681 unsigned int eax, ebx, ecx, edx;
682 static bool on_boot_cpu = 1;
688 if (!cpu_has_xsave) {
689 pr_info("x86/fpu: Legacy x87 FPU detected.\n");
693 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
694 WARN(1, "x86/fpu: XSTATE_CPUID missing!\n");
698 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
699 xfeatures_mask = eax + ((u64)edx << 32);
701 if ((xfeatures_mask & XSTATE_FPSSE) != XSTATE_FPSSE) {
702 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
707 * Support only the state known to OS.
709 xfeatures_mask = xfeatures_mask & XCNTXT_MASK;
711 /* Enable xstate instructions to be able to continue with initialization: */
712 fpu__init_cpu_xstate();
715 * Recompute the context size for enabled features
719 update_regset_xstate_info(xstate_size, xfeatures_mask);
720 prepare_fx_sw_frame();
721 setup_init_fpu_buf();
723 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is 0x%x bytes, using '%s' format.\n",
726 cpu_has_xsaves ? "compacted" : "standard");
730 * Restore minimal FPU state after suspend:
732 void fpu__resume_cpu(void)
735 * Restore XCR0 on xsave capable CPUs:
738 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
742 * Given the xsave area and a state inside, this function returns the
743 * address of the state.
745 * This is the API that is called to get xstate address in either
746 * standard format or compacted format of xsave area.
749 * xsave: base address of the xsave area;
750 * xstate: state which is defined in xsave.h (e.g. XSTATE_FP, XSTATE_SSE,
753 * address of the state in the xsave area.
755 void *get_xsave_addr(struct xsave_struct *xsave, int xstate)
757 int feature = fls64(xstate) - 1;
758 if (!test_bit(feature, (unsigned long *)&xfeatures_mask))
761 return (void *)xsave + xstate_comp_offsets[feature];
763 EXPORT_SYMBOL_GPL(get_xsave_addr);