2 * xsave/xrstor support.
4 * Author: Suresh Siddha <suresh.b.siddha@intel.com>
6 #include <linux/compat.h>
8 #include <linux/pkeys.h>
10 #include <asm/fpu/api.h>
11 #include <asm/fpu/internal.h>
12 #include <asm/fpu/signal.h>
13 #include <asm/fpu/regset.h>
15 #include <asm/tlbflush.h>
18 * Although we spell it out in here, the Processor Trace
19 * xfeature is completely unused. We use other mechanisms
20 * to save/restore PT state in Linux.
22 static const char *xfeature_names[] =
24 "x87 floating point registers" ,
27 "MPX bounds registers" ,
32 "Processor Trace (unused)" ,
33 "Protection Keys User registers",
34 "unknown xstate feature" ,
38 * Mask of xstate features supported by the CPU and the kernel:
40 u64 xfeatures_mask __read_mostly;
42 static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
43 static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
44 static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
47 * Clear all of the X86_FEATURE_* bits that are unavailable
48 * when the CPU has no XSAVE support.
50 void fpu__xstate_clear_all_cpu_caps(void)
52 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
53 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
54 setup_clear_cpu_cap(X86_FEATURE_XSAVEC);
55 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
56 setup_clear_cpu_cap(X86_FEATURE_AVX);
57 setup_clear_cpu_cap(X86_FEATURE_AVX2);
58 setup_clear_cpu_cap(X86_FEATURE_AVX512F);
59 setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
60 setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
61 setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
62 setup_clear_cpu_cap(X86_FEATURE_AVX512DQ);
63 setup_clear_cpu_cap(X86_FEATURE_AVX512BW);
64 setup_clear_cpu_cap(X86_FEATURE_AVX512VL);
65 setup_clear_cpu_cap(X86_FEATURE_MPX);
66 setup_clear_cpu_cap(X86_FEATURE_XGETBV1);
67 setup_clear_cpu_cap(X86_FEATURE_PKU);
71 * Return whether the system supports a given xfeature.
73 * Also return the name of the (most advanced) feature that the caller requested:
75 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
77 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
79 if (unlikely(feature_name)) {
80 long xfeature_idx, max_idx;
83 * So we use FLS here to be able to print the most advanced
84 * feature that was requested but is missing. So if a driver
85 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the
86 * missing AVX feature - this is the most informative message
89 if (xfeatures_missing)
90 xfeatures_print = xfeatures_missing;
92 xfeatures_print = xfeatures_needed;
94 xfeature_idx = fls64(xfeatures_print)-1;
95 max_idx = ARRAY_SIZE(xfeature_names)-1;
96 xfeature_idx = min(xfeature_idx, max_idx);
98 *feature_name = xfeature_names[xfeature_idx];
101 if (xfeatures_missing)
106 EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
109 * When executing XSAVEOPT (or other optimized XSAVE instructions), if
110 * a processor implementation detects that an FPU state component is still
111 * (or is again) in its initialized state, it may clear the corresponding
112 * bit in the header.xfeatures field, and can skip the writeout of registers
113 * to the corresponding memory layout.
115 * This means that when the bit is zero, the state component might still contain
116 * some previous - non-initialized register state.
118 * Before writing xstate information to user-space we sanitize those components,
119 * to always ensure that the memory layout of a feature will be in the init state
120 * if the corresponding header bit is zero. This is to ensure that user-space doesn't
121 * see some stale state in the memory layout during signal handling, debugging etc.
123 void fpstate_sanitize_xstate(struct fpu *fpu)
125 struct fxregs_state *fx = &fpu->state.fxsave;
132 xfeatures = fpu->state.xsave.header.xfeatures;
135 * None of the feature bits are in init state. So nothing else
136 * to do for us, as the memory layout is up to date.
138 if ((xfeatures & xfeatures_mask) == xfeatures_mask)
142 * FP is in init state
144 if (!(xfeatures & XFEATURE_MASK_FP)) {
151 memset(&fx->st_space[0], 0, 128);
155 * SSE is in init state
157 if (!(xfeatures & XFEATURE_MASK_SSE))
158 memset(&fx->xmm_space[0], 0, 256);
161 * First two features are FPU and SSE, which above we handled
162 * in a special way already:
165 xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
168 * Update all the remaining memory layouts according to their
169 * standard xstate layout, if their header bit is in the init
173 if (xfeatures & 0x1) {
174 int offset = xstate_offsets[feature_bit];
175 int size = xstate_sizes[feature_bit];
177 memcpy((void *)fx + offset,
178 (void *)&init_fpstate.xsave + offset,
188 * Enable the extended processor state save/restore feature.
189 * Called once per CPU onlining.
191 void fpu__init_cpu_xstate(void)
193 if (!cpu_has_xsave || !xfeatures_mask)
196 cr4_set_bits(X86_CR4_OSXSAVE);
197 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
201 * Note that in the future we will likely need a pair of
202 * functions here: one for user xstates and the other for
203 * system xstates. For now, they are the same.
205 static int xfeature_enabled(enum xfeature xfeature)
207 return !!(xfeatures_mask & (1UL << xfeature));
211 * Record the offsets and sizes of various xstates contained
212 * in the XSAVE state memory layout.
214 static void __init setup_xstate_features(void)
216 u32 eax, ebx, ecx, edx, i;
217 /* start at the beginnning of the "extended state" */
218 unsigned int last_good_offset = offsetof(struct xregs_state,
219 extended_state_area);
221 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
222 if (!xfeature_enabled(i))
225 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
226 xstate_offsets[i] = ebx;
227 xstate_sizes[i] = eax;
229 * In our xstate size checks, we assume that the
230 * highest-numbered xstate feature has the
231 * highest offset in the buffer. Ensure it does.
233 WARN_ONCE(last_good_offset > xstate_offsets[i],
234 "x86/fpu: misordered xstate at %d\n", last_good_offset);
235 last_good_offset = xstate_offsets[i];
237 printk(KERN_INFO "x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n", i, ebx, i, eax);
241 static void __init print_xstate_feature(u64 xstate_mask)
243 const char *feature_name;
245 if (cpu_has_xfeatures(xstate_mask, &feature_name))
246 pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name);
250 * Print out all the supported xstate features:
252 static void __init print_xstate_features(void)
254 print_xstate_feature(XFEATURE_MASK_FP);
255 print_xstate_feature(XFEATURE_MASK_SSE);
256 print_xstate_feature(XFEATURE_MASK_YMM);
257 print_xstate_feature(XFEATURE_MASK_BNDREGS);
258 print_xstate_feature(XFEATURE_MASK_BNDCSR);
259 print_xstate_feature(XFEATURE_MASK_OPMASK);
260 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
261 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
262 print_xstate_feature(XFEATURE_MASK_PKRU);
266 * This function sets up offsets and sizes of all extended states in
267 * xsave area. This supports both standard format and compacted format
268 * of the xsave aread.
270 static void __init setup_xstate_comp(void)
272 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
276 * The FP xstates and SSE xstates are legacy states. They are always
277 * in the fixed offsets in the xsave area in either compacted form
280 xstate_comp_offsets[0] = 0;
281 xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
283 if (!cpu_has_xsaves) {
284 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
285 if (xfeature_enabled(i)) {
286 xstate_comp_offsets[i] = xstate_offsets[i];
287 xstate_comp_sizes[i] = xstate_sizes[i];
293 xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] =
294 FXSAVE_SIZE + XSAVE_HDR_SIZE;
296 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
297 if (xfeature_enabled(i))
298 xstate_comp_sizes[i] = xstate_sizes[i];
300 xstate_comp_sizes[i] = 0;
302 if (i > FIRST_EXTENDED_XFEATURE)
303 xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
304 + xstate_comp_sizes[i-1];
310 * setup the xstate image representing the init state
312 static void __init setup_init_fpu_buf(void)
314 static int on_boot_cpu __initdata = 1;
316 WARN_ON_FPU(!on_boot_cpu);
322 setup_xstate_features();
323 print_xstate_features();
325 if (cpu_has_xsaves) {
326 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
327 init_fpstate.xsave.header.xfeatures = xfeatures_mask;
331 * Init all the features state with header_bv being 0x0
333 copy_kernel_to_xregs_booting(&init_fpstate.xsave);
336 * Dump the init state again. This is to identify the init state
337 * of any feature which is not represented by all zero's.
339 copy_xregs_to_kernel_booting(&init_fpstate.xsave);
342 static int xfeature_is_supervisor(int xfeature_nr)
345 * We currently do not support supervisor states, but if
346 * we did, we could find out like this.
348 * SDM says: If state component i is a user state component,
349 * ECX[0] return 0; if state component i is a supervisor
350 * state component, ECX[0] returns 1.
351 u32 eax, ebx, ecx, edx;
352 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx;
358 static int xfeature_is_user(int xfeature_nr)
360 return !xfeature_is_supervisor(xfeature_nr);
365 * This check is important because it is easy to get XSTATE_*
366 * confused with XSTATE_BIT_*.
368 #define CHECK_XFEATURE(nr) do { \
369 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \
370 WARN_ON(nr >= XFEATURE_MAX); \
374 * We could cache this like xstate_size[], but we only use
375 * it here, so it would be a waste of space.
377 static int xfeature_is_aligned(int xfeature_nr)
379 u32 eax, ebx, ecx, edx;
381 CHECK_XFEATURE(xfeature_nr);
382 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
384 * The value returned by ECX[1] indicates the alignment
385 * of state component i when the compacted format
386 * of the extended region of an XSAVE area is used
391 static int xfeature_uncompacted_offset(int xfeature_nr)
393 u32 eax, ebx, ecx, edx;
395 CHECK_XFEATURE(xfeature_nr);
396 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
400 static int xfeature_size(int xfeature_nr)
402 u32 eax, ebx, ecx, edx;
404 CHECK_XFEATURE(xfeature_nr);
405 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
410 * 'XSAVES' implies two different things:
411 * 1. saving of supervisor/system state
412 * 2. using the compacted format
414 * Use this function when dealing with the compacted format so
415 * that it is obvious which aspect of 'XSAVES' is being handled
416 * by the calling code.
418 static int using_compacted_format(void)
420 return cpu_has_xsaves;
423 static void __xstate_dump_leaves(void)
426 u32 eax, ebx, ecx, edx;
427 static int should_dump = 1;
433 * Dump out a few leaves past the ones that we support
434 * just in case there are some goodies up there
436 for (i = 0; i < XFEATURE_MAX + 10; i++) {
437 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
438 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
439 XSTATE_CPUID, i, eax, ebx, ecx, edx);
443 #define XSTATE_WARN_ON(x) do { \
444 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \
445 __xstate_dump_leaves(); \
449 #define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \
450 if ((nr == nr_macro) && \
451 WARN_ONCE(sz != sizeof(__struct), \
452 "%s: struct is %zu bytes, cpu state %d bytes\n", \
453 __stringify(nr_macro), sizeof(__struct), sz)) { \
454 __xstate_dump_leaves(); \
459 * We have a C struct for each 'xstate'. We need to ensure
460 * that our software representation matches what the CPU
461 * tells us about the state's size.
463 static void check_xstate_against_struct(int nr)
466 * Ask the CPU for the size of the state.
468 int sz = xfeature_size(nr);
470 * Match each CPU state with the corresponding software
473 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct);
474 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state);
475 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state);
476 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state);
477 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
478 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state);
479 XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state);
482 * Make *SURE* to add any feature numbers in below if
483 * there are "holes" in the xsave state component
486 if ((nr < XFEATURE_YMM) ||
487 (nr >= XFEATURE_MAX) ||
488 (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR)) {
489 WARN_ONCE(1, "no structure for xstate: %d\n", nr);
495 * This essentially double-checks what the cpu told us about
496 * how large the XSAVE buffer needs to be. We are recalculating
499 static void do_extra_xstate_size_checks(void)
501 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
504 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
505 if (!xfeature_enabled(i))
508 check_xstate_against_struct(i);
510 * Supervisor state components can be managed only by
511 * XSAVES, which is compacted-format only.
513 if (!using_compacted_format())
514 XSTATE_WARN_ON(xfeature_is_supervisor(i));
516 /* Align from the end of the previous feature */
517 if (xfeature_is_aligned(i))
518 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64);
520 * The offset of a given state in the non-compacted
521 * format is given to us in a CPUID leaf. We check
522 * them for being ordered (increasing offsets) in
523 * setup_xstate_features().
525 if (!using_compacted_format())
526 paranoid_xstate_size = xfeature_uncompacted_offset(i);
528 * The compacted-format offset always depends on where
529 * the previous state ended.
531 paranoid_xstate_size += xfeature_size(i);
533 XSTATE_WARN_ON(paranoid_xstate_size != xstate_size);
537 * Calculate total size of enabled xstates in XCR0/xfeatures_mask.
539 * Note the SDM's wording here. "sub-function 0" only enumerates
540 * the size of the *user* states. If we use it to size a buffer
541 * that we use 'XSAVES' on, we could potentially overflow the
542 * buffer because 'XSAVES' saves system states too.
544 * Note that we do not currently set any bits on IA32_XSS so
545 * 'XCR0 | IA32_XSS == XCR0' for now.
547 static unsigned int __init calculate_xstate_size(void)
549 unsigned int eax, ebx, ecx, edx;
550 unsigned int calculated_xstate_size;
552 if (!cpu_has_xsaves) {
554 * - CPUID function 0DH, sub-function 0:
555 * EBX enumerates the size (in bytes) required by
556 * the XSAVE instruction for an XSAVE area
557 * containing all the *user* state components
558 * corresponding to bits currently set in XCR0.
560 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
561 calculated_xstate_size = ebx;
564 * - CPUID function 0DH, sub-function 1:
565 * EBX enumerates the size (in bytes) required by
566 * the XSAVES instruction for an XSAVE area
567 * containing all the state components
568 * corresponding to bits currently set in
571 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
572 calculated_xstate_size = ebx;
574 return calculated_xstate_size;
578 * Will the runtime-enumerated 'xstate_size' fit in the init
579 * task's statically-allocated buffer?
581 static bool is_supported_xstate_size(unsigned int test_xstate_size)
583 if (test_xstate_size <= sizeof(union fpregs_state))
586 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n",
587 sizeof(union fpregs_state), test_xstate_size);
591 static int init_xstate_size(void)
593 /* Recompute the context size for enabled features: */
594 unsigned int possible_xstate_size = calculate_xstate_size();
596 /* Ensure we have the space to store all enabled: */
597 if (!is_supported_xstate_size(possible_xstate_size))
601 * The size is OK, we are definitely going to use xsave,
602 * make it known to the world that we need more space.
604 xstate_size = possible_xstate_size;
605 do_extra_xstate_size_checks();
610 * We enabled the XSAVE hardware, but something went wrong and
611 * we can not use it. Disable it.
613 static void fpu__init_disable_system_xstate(void)
616 cr4_clear_bits(X86_CR4_OSXSAVE);
617 fpu__xstate_clear_all_cpu_caps();
621 * Enable and initialize the xsave feature.
622 * Called once per system bootup.
624 void __init fpu__init_system_xstate(void)
626 unsigned int eax, ebx, ecx, edx;
627 static int on_boot_cpu __initdata = 1;
630 WARN_ON_FPU(!on_boot_cpu);
633 if (!cpu_has_xsave) {
634 pr_info("x86/fpu: Legacy x87 FPU detected.\n");
638 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
643 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
644 xfeatures_mask = eax + ((u64)edx << 32);
646 if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
647 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
651 xfeatures_mask &= fpu__get_supported_xfeatures_mask();
653 /* Enable xstate instructions to be able to continue with initialization: */
654 fpu__init_cpu_xstate();
655 err = init_xstate_size();
657 /* something went wrong, boot without any XSAVE support */
658 fpu__init_disable_system_xstate();
662 update_regset_xstate_info(xstate_size, xfeatures_mask);
663 fpu__init_prepare_fx_sw_frame();
664 setup_init_fpu_buf();
667 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
670 cpu_has_xsaves ? "compacted" : "standard");
674 * Restore minimal FPU state after suspend:
676 void fpu__resume_cpu(void)
679 * Restore XCR0 on xsave capable CPUs:
682 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
686 * Given an xstate feature mask, calculate where in the xsave
687 * buffer the state is. Callers should ensure that the buffer
690 * Note: does not work for compacted buffers.
692 void *__raw_xsave_addr(struct xregs_state *xsave, int xstate_feature_mask)
694 int feature_nr = fls64(xstate_feature_mask) - 1;
696 return (void *)xsave + xstate_comp_offsets[feature_nr];
699 * Given the xsave area and a state inside, this function returns the
700 * address of the state.
702 * This is the API that is called to get xstate address in either
703 * standard format or compacted format of xsave area.
705 * Note that if there is no data for the field in the xsave buffer
706 * this will return NULL.
709 * xstate: the thread's storage area for all FPU data
710 * xstate_feature: state which is defined in xsave.h (e.g.
711 * XFEATURE_MASK_FP, XFEATURE_MASK_SSE, etc...)
713 * address of the state in the xsave area, or NULL if the
714 * field is not present in the xsave buffer.
716 void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)
719 * Do we even *have* xsave state?
721 if (!boot_cpu_has(X86_FEATURE_XSAVE))
725 * We should not ever be requesting features that we
726 * have not enabled. Remember that pcntxt_mask is
727 * what we write to the XCR0 register.
729 WARN_ONCE(!(xfeatures_mask & xstate_feature),
730 "get of unsupported state");
732 * This assumes the last 'xsave*' instruction to
733 * have requested that 'xstate_feature' be saved.
734 * If it did not, we might be seeing and old value
735 * of the field in the buffer.
737 * This can happen because the last 'xsave' did not
738 * request that this feature be saved (unlikely)
739 * or because the "init optimization" caused it
742 if (!(xsave->header.xfeatures & xstate_feature))
745 return __raw_xsave_addr(xsave, xstate_feature);
747 EXPORT_SYMBOL_GPL(get_xsave_addr);
750 * This wraps up the common operations that need to occur when retrieving
751 * data from xsave state. It first ensures that the current task was
752 * using the FPU and retrieves the data in to a buffer. It then calculates
753 * the offset of the requested field in the buffer.
755 * This function is safe to call whether the FPU is in use or not.
757 * Note that this only works on the current task.
760 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP,
761 * XFEATURE_MASK_SSE, etc...)
763 * address of the state in the xsave area or NULL if the state
764 * is not present or is in its 'init state'.
766 const void *get_xsave_field_ptr(int xsave_state)
768 struct fpu *fpu = ¤t->thread.fpu;
770 if (!fpu->fpstate_active)
773 * fpu__save() takes the CPU's xstate registers
774 * and saves them off to the 'fpu memory buffer.
778 return get_xsave_addr(&fpu->state.xsave, xsave_state);
783 * Set xfeatures (aka XSTATE_BV) bit for a feature that we want
784 * to take out of its "init state". This will ensure that an
785 * XRSTOR actually restores the state.
787 static void fpu__xfeature_set_non_init(struct xregs_state *xsave,
788 int xstate_feature_mask)
790 xsave->header.xfeatures |= xstate_feature_mask;
794 * This function is safe to call whether the FPU is in use or not.
796 * Note that this only works on the current task.
799 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP,
800 * XFEATURE_MASK_SSE, etc...)
801 * @xsave_state_ptr: a pointer to a copy of the state that you would
802 * like written in to the current task's FPU xsave state. This pointer
803 * must not be located in the current tasks's xsave area.
805 * address of the state in the xsave area or NULL if the state
806 * is not present or is in its 'init state'.
808 static void fpu__xfeature_set_state(int xstate_feature_mask,
809 void *xstate_feature_src, size_t len)
811 struct xregs_state *xsave = ¤t->thread.fpu.state.xsave;
812 struct fpu *fpu = ¤t->thread.fpu;
815 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
816 WARN_ONCE(1, "%s() attempted with no xsave support", __func__);
821 * Tell the FPU code that we need the FPU state to be in
822 * 'fpu' (not in the registers), and that we need it to
823 * be stable while we write to it.
825 fpu__current_fpstate_write_begin();
828 * This method *WILL* *NOT* work for compact-format
829 * buffers. If the 'xstate_feature_mask' is unset in
830 * xcomp_bv then we may need to move other feature state
831 * "up" in the buffer.
833 if (xsave->header.xcomp_bv & xstate_feature_mask) {
838 /* find the location in the xsave buffer of the desired state */
839 dst = __raw_xsave_addr(&fpu->state.xsave, xstate_feature_mask);
842 * Make sure that the pointer being passed in did not
843 * come from the xsave buffer itself.
845 WARN_ONCE(xstate_feature_src == dst, "set from xsave buffer itself");
847 /* put the caller-provided data in the location */
848 memcpy(dst, xstate_feature_src, len);
851 * Mark the xfeature so that the CPU knows there is state
854 fpu__xfeature_set_non_init(xsave, xstate_feature_mask);
857 * We are done writing to the 'fpu'. Reenable preeption
858 * and (possibly) move the fpstate back in to the fpregs.
860 fpu__current_fpstate_write_end();
863 #define NR_VALID_PKRU_BITS (CONFIG_NR_PROTECTION_KEYS * 2)
864 #define PKRU_VALID_MASK (NR_VALID_PKRU_BITS - 1)
867 * This will go out and modify the XSAVE buffer so that PKRU is
868 * set to a particular state for access to 'pkey'.
870 * PKRU state does affect kernel access to user memory. We do
871 * not modfiy PKRU *itself* here, only the XSAVE state that will
872 * be restored in to PKRU when we return back to userspace.
874 int arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
875 unsigned long init_val)
877 struct xregs_state *xsave = &tsk->thread.fpu.state.xsave;
878 struct pkru_state *old_pkru_state;
879 struct pkru_state new_pkru_state;
880 int pkey_shift = (pkey * PKRU_BITS_PER_PKEY);
881 u32 new_pkru_bits = 0;
884 * This check implies XSAVE support. OSPKE only gets
885 * set if we enable XSAVE and we enable PKU in XCR0.
887 if (!boot_cpu_has(X86_FEATURE_OSPKE))
890 /* Set the bits we need in PKRU */
891 if (init_val & PKEY_DISABLE_ACCESS)
892 new_pkru_bits |= PKRU_AD_BIT;
893 if (init_val & PKEY_DISABLE_WRITE)
894 new_pkru_bits |= PKRU_WD_BIT;
896 /* Shift the bits in to the correct place in PKRU for pkey. */
897 new_pkru_bits <<= pkey_shift;
899 /* Locate old copy of the state in the xsave buffer */
900 old_pkru_state = get_xsave_addr(xsave, XFEATURE_MASK_PKRU);
903 * When state is not in the buffer, it is in the init
904 * state, set it manually. Otherwise, copy out the old
908 new_pkru_state.pkru = 0;
910 new_pkru_state.pkru = old_pkru_state->pkru;
912 /* mask off any old bits in place */
913 new_pkru_state.pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift);
914 /* Set the newly-requested bits */
915 new_pkru_state.pkru |= new_pkru_bits;
918 * We could theoretically live without zeroing pkru.pad.
919 * The current XSAVE feature state definition says that
920 * only bytes 0->3 are used. But we do not want to
921 * chance leaking kernel stack out to userspace in case a
922 * memcpy() of the whole xsave buffer was done.
924 * They're in the same cacheline anyway.
926 new_pkru_state.pad = 0;
928 fpu__xfeature_set_state(XFEATURE_MASK_PKRU, &new_pkru_state,
929 sizeof(new_pkru_state));