2 * Intel CPU Microcode Update Driver for Linux
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
7 * Intel CPU microcode early update for Linux
9 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
10 * H Peter Anvin" <hpa@zytor.com>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
19 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
20 * printk calls into no_printk().
24 #define pr_fmt(fmt) "microcode: " fmt
26 #include <linux/earlycpio.h>
27 #include <linux/firmware.h>
28 #include <linux/uaccess.h>
29 #include <linux/vmalloc.h>
30 #include <linux/initrd.h>
31 #include <linux/kernel.h>
32 #include <linux/slab.h>
33 #include <linux/cpu.h>
36 #include <asm/microcode_intel.h>
37 #include <asm/processor.h>
38 #include <asm/tlbflush.h>
39 #include <asm/setup.h>
43 * Temporary microcode blobs pointers storage. We note here the pointers to
44 * microcode blobs we've got from whatever storage (detached initrd, builtin).
45 * Later on, we put those into final storage mc_saved_data.mc_saved.
47 static unsigned long mc_tmp_ptrs[MAX_UCODE_COUNT];
49 static struct mc_saved_data {
50 unsigned int num_saved;
51 struct microcode_intel **mc_saved;
54 /* Microcode blobs within the initrd. 0 if builtin. */
55 static struct ucode_blobs {
60 static enum ucode_state
61 load_microcode_early(struct microcode_intel **saved,
62 unsigned int num_saved, struct ucode_cpu_info *uci)
64 struct microcode_intel *ucode_ptr, *new_mc = NULL;
65 struct microcode_header_intel *mc_hdr;
68 new_rev = uci->cpu_sig.rev;
70 for (i = 0; i < num_saved; i++) {
72 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
74 ret = has_newer_microcode(ucode_ptr,
81 new_rev = mc_hdr->rev;
88 uci->mc = (struct microcode_intel *)new_mc;
93 copy_ptrs(struct microcode_intel **mc_saved, unsigned long *mc_ptrs,
94 unsigned long off, int num_saved)
98 for (i = 0; i < num_saved; i++)
99 mc_saved[i] = (struct microcode_intel *)(mc_ptrs[i] + off);
104 microcode_phys(struct microcode_intel **mc_saved_tmp, struct mc_saved_data *mcs)
107 struct microcode_intel ***mc_saved;
109 mc_saved = (struct microcode_intel ***)__pa_nodebug(&mcs->mc_saved);
111 for (i = 0; i < mcs->num_saved; i++) {
112 struct microcode_intel *p;
114 p = *(struct microcode_intel **)__pa_nodebug(mcs->mc_saved + i);
115 mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
120 static enum ucode_state
121 load_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
122 unsigned long offset, struct ucode_cpu_info *uci)
124 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
125 unsigned int count = mcs->num_saved;
127 if (!mcs->mc_saved) {
128 copy_ptrs(mc_saved_tmp, mc_ptrs, offset, count);
130 return load_microcode_early(mc_saved_tmp, count, uci);
133 microcode_phys(mc_saved_tmp, mcs);
134 return load_microcode_early(mc_saved_tmp, count, uci);
136 return load_microcode_early(mcs->mc_saved, count, uci);
142 * Given CPU signature and a microcode patch, this function finds if the
143 * microcode patch has matching family and model with the CPU.
145 static enum ucode_state
146 matching_model_microcode(struct microcode_header_intel *mc_header,
149 unsigned int fam, model;
150 unsigned int fam_ucode, model_ucode;
151 struct extended_sigtable *ext_header;
152 unsigned long total_size = get_totalsize(mc_header);
153 unsigned long data_size = get_datasize(mc_header);
155 struct extended_signature *ext_sig;
157 fam = x86_family(sig);
158 model = x86_model(sig);
160 fam_ucode = x86_family(mc_header->sig);
161 model_ucode = x86_model(mc_header->sig);
163 if (fam == fam_ucode && model == model_ucode)
166 /* Look for ext. headers: */
167 if (total_size <= data_size + MC_HEADER_SIZE)
170 ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
171 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
172 ext_sigcount = ext_header->count;
174 for (i = 0; i < ext_sigcount; i++) {
175 fam_ucode = x86_family(ext_sig->sig);
176 model_ucode = x86_model(ext_sig->sig);
178 if (fam == fam_ucode && model == model_ucode)
187 save_microcode(struct mc_saved_data *mcs,
188 struct microcode_intel **mc_saved_src,
189 unsigned int num_saved)
192 struct microcode_intel **saved_ptr;
199 * Copy new microcode data.
201 saved_ptr = kcalloc(num_saved, sizeof(struct microcode_intel *), GFP_KERNEL);
205 for (i = 0; i < num_saved; i++) {
206 struct microcode_header_intel *mc_hdr;
207 struct microcode_intel *mc;
210 if (!mc_saved_src[i]) {
215 mc = mc_saved_src[i];
217 size = get_totalsize(mc_hdr);
219 saved_ptr[i] = kmemdup(mc, size, GFP_KERNEL);
227 * Point to newly saved microcode.
229 mcs->mc_saved = saved_ptr;
230 mcs->num_saved = num_saved;
235 for (j = 0; j <= i; j++)
243 * A microcode patch in ucode_ptr is saved into mc_saved
244 * - if it has matching signature and newer revision compared to an existing
246 * - or if it is a newly discovered microcode patch.
248 * The microcode patch should have matching model with CPU.
250 * Returns: The updated number @num_saved of saved microcode patches.
252 static unsigned int _save_mc(struct microcode_intel **mc_saved,
253 u8 *ucode_ptr, unsigned int num_saved)
255 struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
256 unsigned int sig, pf;
259 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
261 for (i = 0; i < num_saved; i++) {
262 mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
263 sig = mc_saved_hdr->sig;
264 pf = mc_saved_hdr->pf;
266 if (!find_matching_signature(ucode_ptr, sig, pf))
271 if (mc_hdr->rev <= mc_saved_hdr->rev)
275 * Found an older ucode saved earlier. Replace it with
278 mc_saved[i] = (struct microcode_intel *)ucode_ptr;
282 /* Newly detected microcode, save it to memory. */
283 if (i >= num_saved && !found)
284 mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
290 * Get microcode matching with BSP's model. Only CPUs with the same model as
291 * BSP can stay in the platform.
293 static enum ucode_state __init
294 get_matching_model_microcode(unsigned long start, void *data, size_t size,
295 struct mc_saved_data *mcs, unsigned long *mc_ptrs,
296 struct ucode_cpu_info *uci)
298 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
299 struct microcode_header_intel *mc_header;
300 unsigned int num_saved = mcs->num_saved;
301 enum ucode_state state = UCODE_OK;
302 unsigned int leftover = size;
303 u8 *ucode_ptr = data;
304 unsigned int mc_size;
307 while (leftover && num_saved < ARRAY_SIZE(mc_saved_tmp)) {
309 if (leftover < sizeof(mc_header))
312 mc_header = (struct microcode_header_intel *)ucode_ptr;
314 mc_size = get_totalsize(mc_header);
315 if (!mc_size || mc_size > leftover ||
316 microcode_sanity_check(ucode_ptr, 0) < 0)
322 * Since APs with same family and model as the BSP may boot in
323 * the platform, we need to find and save microcode patches
324 * with the same family and model as the BSP.
326 if (matching_model_microcode(mc_header, uci->cpu_sig.sig) != UCODE_OK) {
327 ucode_ptr += mc_size;
331 num_saved = _save_mc(mc_saved_tmp, ucode_ptr, num_saved);
333 ucode_ptr += mc_size;
342 state = UCODE_NFOUND;
346 for (i = 0; i < num_saved; i++)
347 mc_ptrs[i] = (unsigned long)mc_saved_tmp[i] - start;
349 mcs->num_saved = num_saved;
354 static int collect_cpu_info_early(struct ucode_cpu_info *uci)
357 unsigned int family, model;
358 struct cpu_signature csig;
359 unsigned int eax, ebx, ecx, edx;
365 memset(uci, 0, sizeof(*uci));
369 native_cpuid(&eax, &ebx, &ecx, &edx);
372 family = x86_family(csig.sig);
373 model = x86_model(csig.sig);
375 if ((model >= 5) || (family > 6)) {
376 /* get processor flags from MSR 0x17 */
377 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
378 csig.pf = 1 << ((val[1] >> 18) & 7);
380 native_wrmsrl(MSR_IA32_UCODE_REV, 0);
382 /* As documented in the SDM: Do a CPUID 1 here */
385 /* get the current revision from MSR 0x8B */
386 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
396 static void show_saved_mc(void)
400 unsigned int sig, pf, rev, total_size, data_size, date;
401 struct ucode_cpu_info uci;
403 if (!mc_saved_data.num_saved) {
404 pr_debug("no microcode data saved.\n");
407 pr_debug("Total microcode saved: %d\n", mc_saved_data.num_saved);
409 collect_cpu_info_early(&uci);
411 sig = uci.cpu_sig.sig;
413 rev = uci.cpu_sig.rev;
414 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
416 for (i = 0; i < mc_saved_data.num_saved; i++) {
417 struct microcode_header_intel *mc_saved_header;
418 struct extended_sigtable *ext_header;
420 struct extended_signature *ext_sig;
422 mc_saved_header = (struct microcode_header_intel *)
423 mc_saved_data.mc_saved[i];
424 sig = mc_saved_header->sig;
425 pf = mc_saved_header->pf;
426 rev = mc_saved_header->rev;
427 total_size = get_totalsize(mc_saved_header);
428 data_size = get_datasize(mc_saved_header);
429 date = mc_saved_header->date;
431 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",
432 i, sig, pf, rev, total_size,
435 (date >> 16) & 0xff);
437 /* Look for ext. headers: */
438 if (total_size <= data_size + MC_HEADER_SIZE)
441 ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
442 ext_sigcount = ext_header->count;
443 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
445 for (j = 0; j < ext_sigcount; j++) {
449 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
459 #ifdef CONFIG_HOTPLUG_CPU
460 static DEFINE_MUTEX(x86_cpu_microcode_mutex);
462 * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
463 * hot added or resumes.
465 * Please make sure this mc should be a valid microcode patch before calling
468 int save_mc_for_early(u8 *mc)
470 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
471 unsigned int mc_saved_count_init;
472 unsigned int num_saved;
473 struct microcode_intel **mc_saved;
478 * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
481 mutex_lock(&x86_cpu_microcode_mutex);
483 mc_saved_count_init = mc_saved_data.num_saved;
484 num_saved = mc_saved_data.num_saved;
485 mc_saved = mc_saved_data.mc_saved;
487 if (mc_saved && num_saved)
488 memcpy(mc_saved_tmp, mc_saved,
489 num_saved * sizeof(struct microcode_intel *));
491 * Save the microcode patch mc in mc_save_tmp structure if it's a newer
494 num_saved = _save_mc(mc_saved_tmp, mc, num_saved);
497 * Save the mc_save_tmp in global mc_saved_data.
499 ret = save_microcode(&mc_saved_data, mc_saved_tmp, num_saved);
501 pr_err("Cannot save microcode patch.\n");
508 * Free old saved microcode data.
511 for (i = 0; i < mc_saved_count_init; i++)
517 mutex_unlock(&x86_cpu_microcode_mutex);
521 EXPORT_SYMBOL_GPL(save_mc_for_early);
524 static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
527 unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
530 native_cpuid(&eax, &ebx, &ecx, &edx);
532 sprintf(name, "intel-ucode/%02x-%02x-%02x",
533 x86_family(eax), x86_model(eax), x86_stepping(eax));
535 return get_builtin_firmware(cp, name);
542 * Print ucode update info.
545 print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
547 pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
551 (date >> 16) & 0xff);
556 static int delay_ucode_info;
557 static int current_mc_date;
560 * Print early updated ucode info after printk works. This is delayed info dump.
562 void show_ucode_info_early(void)
564 struct ucode_cpu_info uci;
566 if (delay_ucode_info) {
567 collect_cpu_info_early(&uci);
568 print_ucode_info(&uci, current_mc_date);
569 delay_ucode_info = 0;
574 * At this point, we can not call printk() yet. Keep microcode patch number in
575 * mc_saved_data.mc_saved and delay printing microcode info in
576 * show_ucode_info_early() until printk() works.
578 static void print_ucode(struct ucode_cpu_info *uci)
580 struct microcode_intel *mc;
581 int *delay_ucode_info_p;
582 int *current_mc_date_p;
588 delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
589 current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date);
591 *delay_ucode_info_p = 1;
592 *current_mc_date_p = mc->hdr.date;
597 * Flush global tlb. We only do this in x86_64 where paging has been enabled
598 * already and PGE should be enabled as well.
600 static inline void flush_tlb_early(void)
602 __native_flush_tlb_global_irq_disabled();
605 static inline void print_ucode(struct ucode_cpu_info *uci)
607 struct microcode_intel *mc;
613 print_ucode_info(uci, mc->hdr.date);
617 static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
619 struct microcode_intel *mc;
626 /* write microcode via MSR 0x79 */
627 native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
628 native_wrmsrl(MSR_IA32_UCODE_REV, 0);
630 /* As documented in the SDM: Do a CPUID 1 here */
633 /* get the current revision from MSR 0x8B */
634 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
635 if (val[1] != mc->hdr.rev)
639 /* Flush global tlb. This is precaution. */
642 uci->cpu_sig.rev = val[1];
647 print_ucode_info(uci, mc->hdr.date);
653 * This function converts microcode patch offsets previously stored in
654 * mc_tmp_ptrs to pointers and stores the pointers in mc_saved_data.
656 int __init save_microcode_in_initrd_intel(void)
658 struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
659 unsigned int count = mc_saved_data.num_saved;
660 unsigned long offset = 0;
667 * We have found a valid initrd but it might've been relocated in the
668 * meantime so get its updated address.
670 if (IS_ENABLED(CONFIG_BLK_DEV_INITRD) && blobs.valid)
671 offset = initrd_start;
673 copy_ptrs(mc_saved, mc_tmp_ptrs, offset, count);
675 ret = save_microcode(&mc_saved_data, mc_saved, count);
677 pr_err("Cannot save microcode patches from initrd.\n");
684 static __init enum ucode_state
685 __scan_microcode_initrd(struct cpio_data *cd, struct ucode_blobs *blbp)
687 #ifdef CONFIG_BLK_DEV_INITRD
689 static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
690 char *p = IS_ENABLED(CONFIG_X86_32) ? (char *)__pa_nodebug(ucode_name)
692 # ifdef CONFIG_X86_32
693 unsigned long start = 0, size;
694 struct boot_params *params;
696 params = (struct boot_params *)__pa_nodebug(&boot_params);
697 size = params->hdr.ramdisk_size;
700 * Set start only if we have an initrd image. We cannot use initrd_start
701 * because it is not set that early yet.
703 start = (size ? params->hdr.ramdisk_image : 0);
705 # else /* CONFIG_X86_64 */
706 unsigned long start = 0, size;
708 size = (u64)boot_params.ext_ramdisk_size << 32;
709 size |= boot_params.hdr.ramdisk_size;
712 start = (u64)boot_params.ext_ramdisk_image << 32;
713 start |= boot_params.hdr.ramdisk_image;
715 start += PAGE_OFFSET;
719 *cd = find_cpio_data(p, (void *)start, size, &offset);
726 #endif /* CONFIG_BLK_DEV_INITRD */
730 static __init enum ucode_state
731 scan_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
732 struct ucode_cpu_info *uci, struct ucode_blobs *blbp)
734 struct cpio_data cd = { NULL, 0, "" };
735 enum ucode_state ret;
737 /* try built-in microcode first */
738 if (load_builtin_intel_microcode(&cd))
740 * Invalidate blobs as we might've gotten an initrd too,
741 * supplied by the boot loader, by mistake or simply forgotten
742 * there. That's fine, we ignore it since we've found builtin
747 ret = __scan_microcode_initrd(&cd, blbp);
752 return get_matching_model_microcode(blbp->start, cd.data, cd.size,
757 _load_ucode_intel_bsp(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
758 struct ucode_blobs *blbp)
760 struct ucode_cpu_info uci;
761 enum ucode_state ret;
763 collect_cpu_info_early(&uci);
765 ret = scan_microcode(mcs, mc_ptrs, &uci, blbp);
769 ret = load_microcode(mcs, mc_ptrs, blbp->start, &uci);
773 apply_microcode_early(&uci, true);
776 void __init load_ucode_intel_bsp(void)
778 struct ucode_blobs *blobs_p;
779 struct mc_saved_data *mcs;
783 mcs = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
784 ptrs = (unsigned long *)__pa_nodebug(&mc_tmp_ptrs);
785 blobs_p = (struct ucode_blobs *)__pa_nodebug(&blobs);
787 mcs = &mc_saved_data;
792 _load_ucode_intel_bsp(mcs, ptrs, blobs_p);
795 void load_ucode_intel_ap(void)
797 struct ucode_blobs *blobs_p;
798 struct mc_saved_data *mcs;
799 struct ucode_cpu_info uci;
800 enum ucode_state ret;
804 mcs = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
805 ptrs = (unsigned long *)__pa_nodebug(mc_tmp_ptrs);
806 blobs_p = (struct ucode_blobs *)__pa_nodebug(&blobs);
808 mcs = &mc_saved_data;
814 * If there is no valid ucode previously saved in memory, no need to
815 * update ucode on this AP.
820 collect_cpu_info_early(&uci);
821 ret = load_microcode(mcs, ptrs, blobs_p->start, &uci);
825 apply_microcode_early(&uci, true);
828 void reload_ucode_intel(void)
830 struct ucode_cpu_info uci;
831 enum ucode_state ret;
833 if (!mc_saved_data.num_saved)
836 collect_cpu_info_early(&uci);
838 ret = load_microcode_early(mc_saved_data.mc_saved,
839 mc_saved_data.num_saved, &uci);
843 apply_microcode_early(&uci, false);
846 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
848 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
851 memset(csig, 0, sizeof(*csig));
853 csig->sig = cpuid_eax(0x00000001);
855 if ((c->x86_model >= 5) || (c->x86 > 6)) {
856 /* get processor flags from MSR 0x17 */
857 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
858 csig->pf = 1 << ((val[1] >> 18) & 7);
861 csig->rev = c->microcode;
862 pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
863 cpu_num, csig->sig, csig->pf, csig->rev);
869 * return 0 - no update found
870 * return 1 - found update
872 static int get_matching_mc(struct microcode_intel *mc, int cpu)
874 struct cpu_signature cpu_sig;
875 unsigned int csig, cpf, crev;
877 collect_cpu_info(cpu, &cpu_sig);
883 return has_newer_microcode(mc, csig, cpf, crev);
886 static int apply_microcode_intel(int cpu)
888 struct microcode_intel *mc;
889 struct ucode_cpu_info *uci;
890 struct cpuinfo_x86 *c;
893 /* We should bind the task to the CPU */
894 if (WARN_ON(raw_smp_processor_id() != cpu))
897 uci = ucode_cpu_info + cpu;
903 * Microcode on this CPU could be updated earlier. Only apply the
904 * microcode patch in mc when it is newer than the one on this
907 if (!get_matching_mc(mc, cpu))
910 /* write microcode via MSR 0x79 */
911 wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
912 wrmsrl(MSR_IA32_UCODE_REV, 0);
914 /* As documented in the SDM: Do a CPUID 1 here */
917 /* get the current revision from MSR 0x8B */
918 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
920 if (val[1] != mc->hdr.rev) {
921 pr_err("CPU%d update to revision 0x%x failed\n",
926 pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
928 mc->hdr.date & 0xffff,
930 (mc->hdr.date >> 16) & 0xff);
934 uci->cpu_sig.rev = val[1];
935 c->microcode = val[1];
940 static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
941 int (*get_ucode_data)(void *, const void *, size_t))
943 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
944 u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
945 int new_rev = uci->cpu_sig.rev;
946 unsigned int leftover = size;
947 enum ucode_state state = UCODE_OK;
948 unsigned int curr_mc_size = 0;
949 unsigned int csig, cpf;
952 struct microcode_header_intel mc_header;
953 unsigned int mc_size;
955 if (leftover < sizeof(mc_header)) {
956 pr_err("error! Truncated header in microcode data file\n");
960 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
963 mc_size = get_totalsize(&mc_header);
964 if (!mc_size || mc_size > leftover) {
965 pr_err("error! Bad data in microcode data file\n");
969 /* For performance reasons, reuse mc area when possible */
970 if (!mc || mc_size > curr_mc_size) {
972 mc = vmalloc(mc_size);
975 curr_mc_size = mc_size;
978 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
979 microcode_sanity_check(mc, 1) < 0) {
983 csig = uci->cpu_sig.sig;
984 cpf = uci->cpu_sig.pf;
985 if (has_newer_microcode(mc, csig, cpf, new_rev)) {
987 new_rev = mc_header.rev;
989 mc = NULL; /* trigger new vmalloc */
992 ucode_ptr += mc_size;
1000 state = UCODE_ERROR;
1005 state = UCODE_NFOUND;
1010 uci->mc = (struct microcode_intel *)new_mc;
1013 * If early loading microcode is supported, save this mc into
1014 * permanent memory. So it will be loaded early when a CPU is hot added
1017 save_mc_for_early(new_mc);
1019 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
1020 cpu, new_rev, uci->cpu_sig.rev);
1025 static int get_ucode_fw(void *to, const void *from, size_t n)
1027 memcpy(to, from, n);
1031 static enum ucode_state request_microcode_fw(int cpu, struct device *device,
1035 struct cpuinfo_x86 *c = &cpu_data(cpu);
1036 const struct firmware *firmware;
1037 enum ucode_state ret;
1039 sprintf(name, "intel-ucode/%02x-%02x-%02x",
1040 c->x86, c->x86_model, c->x86_mask);
1042 if (request_firmware_direct(&firmware, name, device)) {
1043 pr_debug("data file %s load failed\n", name);
1044 return UCODE_NFOUND;
1047 ret = generic_load_microcode(cpu, (void *)firmware->data,
1048 firmware->size, &get_ucode_fw);
1050 release_firmware(firmware);
1055 static int get_ucode_user(void *to, const void *from, size_t n)
1057 return copy_from_user(to, from, n);
1060 static enum ucode_state
1061 request_microcode_user(int cpu, const void __user *buf, size_t size)
1063 return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
1066 static void microcode_fini_cpu(int cpu)
1068 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
1074 static struct microcode_ops microcode_intel_ops = {
1075 .request_microcode_user = request_microcode_user,
1076 .request_microcode_fw = request_microcode_fw,
1077 .collect_cpu_info = collect_cpu_info,
1078 .apply_microcode = apply_microcode_intel,
1079 .microcode_fini_cpu = microcode_fini_cpu,
1082 struct microcode_ops * __init init_intel_microcode(void)
1084 struct cpuinfo_x86 *c = &boot_cpu_data;
1086 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
1087 cpu_has(c, X86_FEATURE_IA64)) {
1088 pr_err("Intel CPU family 0x%x not supported\n", c->x86);
1092 return µcode_intel_ops;