percpu: Resolve ambiguities in __get_cpu_var/cpumask_var_t
[linux-2.6-block.git] / arch / x86 / kernel / apic / x2apic_cluster.c
1 #include <linux/threads.h>
2 #include <linux/cpumask.h>
3 #include <linux/string.h>
4 #include <linux/kernel.h>
5 #include <linux/ctype.h>
6 #include <linux/dmar.h>
7 #include <linux/cpu.h>
8
9 #include <asm/smp.h>
10 #include <asm/x2apic.h>
11
12 static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
13 static DEFINE_PER_CPU(cpumask_var_t, cpus_in_cluster);
14 static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
15
16 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
17 {
18         return x2apic_enabled();
19 }
20
21 static inline u32 x2apic_cluster(int cpu)
22 {
23         return per_cpu(x86_cpu_to_logical_apicid, cpu) >> 16;
24 }
25
26 static void
27 __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
28 {
29         struct cpumask *cpus_in_cluster_ptr;
30         struct cpumask *ipi_mask_ptr;
31         unsigned int cpu, this_cpu;
32         unsigned long flags;
33         u32 dest;
34
35         x2apic_wrmsr_fence();
36
37         local_irq_save(flags);
38
39         this_cpu = smp_processor_id();
40
41         /*
42          * We are to modify mask, so we need an own copy
43          * and be sure it's manipulated with irq off.
44          */
45         ipi_mask_ptr = this_cpu_cpumask_var_ptr(ipi_mask);
46
47         /*
48          * The idea is to send one IPI per cluster.
49          */
50         for_each_cpu(cpu, ipi_mask_ptr) {
51                 unsigned long i;
52
53                 cpus_in_cluster_ptr = per_cpu(cpus_in_cluster, cpu);
54                 dest = 0;
55
56                 /* Collect cpus in cluster. */
57                 for_each_cpu_and(i, ipi_mask_ptr, cpus_in_cluster_ptr) {
58                         if (apic_dest == APIC_DEST_ALLINC || i != this_cpu)
59                                 dest |= per_cpu(x86_cpu_to_logical_apicid, i);
60                 }
61
62                 if (!dest)
63                         continue;
64
65                 __x2apic_send_IPI_dest(dest, vector, apic->dest_logical);
66                 /*
67                  * Cluster sibling cpus should be discared now so
68                  * we would not send IPI them second time.
69                  */
70                 cpumask_andnot(ipi_mask_ptr, ipi_mask_ptr, cpus_in_cluster_ptr);
71         }
72
73         local_irq_restore(flags);
74 }
75
76 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
77 {
78         __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
79 }
80
81 static void
82 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
83 {
84         __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
85 }
86
87 static void x2apic_send_IPI_allbutself(int vector)
88 {
89         __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
90 }
91
92 static void x2apic_send_IPI_all(int vector)
93 {
94         __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
95 }
96
97 static int
98 x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
99                               const struct cpumask *andmask,
100                               unsigned int *apicid)
101 {
102         u32 dest = 0;
103         u16 cluster;
104         int i;
105
106         for_each_cpu_and(i, cpumask, andmask) {
107                 if (!cpumask_test_cpu(i, cpu_online_mask))
108                         continue;
109                 dest = per_cpu(x86_cpu_to_logical_apicid, i);
110                 cluster = x2apic_cluster(i);
111                 break;
112         }
113
114         if (!dest)
115                 return -EINVAL;
116
117         for_each_cpu_and(i, cpumask, andmask) {
118                 if (!cpumask_test_cpu(i, cpu_online_mask))
119                         continue;
120                 if (cluster != x2apic_cluster(i))
121                         continue;
122                 dest |= per_cpu(x86_cpu_to_logical_apicid, i);
123         }
124
125         *apicid = dest;
126
127         return 0;
128 }
129
130 static void init_x2apic_ldr(void)
131 {
132         unsigned int this_cpu = smp_processor_id();
133         unsigned int cpu;
134
135         per_cpu(x86_cpu_to_logical_apicid, this_cpu) = apic_read(APIC_LDR);
136
137         __cpu_set(this_cpu, per_cpu(cpus_in_cluster, this_cpu));
138         for_each_online_cpu(cpu) {
139                 if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
140                         continue;
141                 __cpu_set(this_cpu, per_cpu(cpus_in_cluster, cpu));
142                 __cpu_set(cpu, per_cpu(cpus_in_cluster, this_cpu));
143         }
144 }
145
146  /*
147   * At CPU state changes, update the x2apic cluster sibling info.
148   */
149 static int
150 update_clusterinfo(struct notifier_block *nfb, unsigned long action, void *hcpu)
151 {
152         unsigned int this_cpu = (unsigned long)hcpu;
153         unsigned int cpu;
154         int err = 0;
155
156         switch (action) {
157         case CPU_UP_PREPARE:
158                 if (!zalloc_cpumask_var(&per_cpu(cpus_in_cluster, this_cpu),
159                                         GFP_KERNEL)) {
160                         err = -ENOMEM;
161                 } else if (!zalloc_cpumask_var(&per_cpu(ipi_mask, this_cpu),
162                                                GFP_KERNEL)) {
163                         free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));
164                         err = -ENOMEM;
165                 }
166                 break;
167         case CPU_UP_CANCELED:
168         case CPU_UP_CANCELED_FROZEN:
169         case CPU_DEAD:
170                 for_each_online_cpu(cpu) {
171                         if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
172                                 continue;
173                         __cpu_clear(this_cpu, per_cpu(cpus_in_cluster, cpu));
174                         __cpu_clear(cpu, per_cpu(cpus_in_cluster, this_cpu));
175                 }
176                 free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));
177                 free_cpumask_var(per_cpu(ipi_mask, this_cpu));
178                 break;
179         }
180
181         return notifier_from_errno(err);
182 }
183
184 static struct notifier_block __refdata x2apic_cpu_notifier = {
185         .notifier_call = update_clusterinfo,
186 };
187
188 static int x2apic_init_cpu_notifier(void)
189 {
190         int cpu = smp_processor_id();
191
192         zalloc_cpumask_var(&per_cpu(cpus_in_cluster, cpu), GFP_KERNEL);
193         zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL);
194
195         BUG_ON(!per_cpu(cpus_in_cluster, cpu) || !per_cpu(ipi_mask, cpu));
196
197         __cpu_set(cpu, per_cpu(cpus_in_cluster, cpu));
198         register_hotcpu_notifier(&x2apic_cpu_notifier);
199         return 1;
200 }
201
202 static int x2apic_cluster_probe(void)
203 {
204         if (x2apic_mode)
205                 return x2apic_init_cpu_notifier();
206         else
207                 return 0;
208 }
209
210 static const struct cpumask *x2apic_cluster_target_cpus(void)
211 {
212         return cpu_all_mask;
213 }
214
215 /*
216  * Each x2apic cluster is an allocation domain.
217  */
218 static void cluster_vector_allocation_domain(int cpu, struct cpumask *retmask,
219                                              const struct cpumask *mask)
220 {
221         /*
222          * To minimize vector pressure, default case of boot, device bringup
223          * etc will use a single cpu for the interrupt destination.
224          *
225          * On explicit migration requests coming from irqbalance etc,
226          * interrupts will be routed to the x2apic cluster (cluster-id
227          * derived from the first cpu in the mask) members specified
228          * in the mask.
229          */
230         if (mask == x2apic_cluster_target_cpus())
231                 cpumask_copy(retmask, cpumask_of(cpu));
232         else
233                 cpumask_and(retmask, mask, per_cpu(cpus_in_cluster, cpu));
234 }
235
236 static struct apic apic_x2apic_cluster = {
237
238         .name                           = "cluster x2apic",
239         .probe                          = x2apic_cluster_probe,
240         .acpi_madt_oem_check            = x2apic_acpi_madt_oem_check,
241         .apic_id_valid                  = x2apic_apic_id_valid,
242         .apic_id_registered             = x2apic_apic_id_registered,
243
244         .irq_delivery_mode              = dest_LowestPrio,
245         .irq_dest_mode                  = 1, /* logical */
246
247         .target_cpus                    = x2apic_cluster_target_cpus,
248         .disable_esr                    = 0,
249         .dest_logical                   = APIC_DEST_LOGICAL,
250         .check_apicid_used              = NULL,
251
252         .vector_allocation_domain       = cluster_vector_allocation_domain,
253         .init_apic_ldr                  = init_x2apic_ldr,
254
255         .ioapic_phys_id_map             = NULL,
256         .setup_apic_routing             = NULL,
257         .cpu_present_to_apicid          = default_cpu_present_to_apicid,
258         .apicid_to_cpu_present          = NULL,
259         .check_phys_apicid_present      = default_check_phys_apicid_present,
260         .phys_pkg_id                    = x2apic_phys_pkg_id,
261
262         .get_apic_id                    = x2apic_get_apic_id,
263         .set_apic_id                    = x2apic_set_apic_id,
264         .apic_id_mask                   = 0xFFFFFFFFu,
265
266         .cpu_mask_to_apicid_and         = x2apic_cpu_mask_to_apicid_and,
267
268         .send_IPI_mask                  = x2apic_send_IPI_mask,
269         .send_IPI_mask_allbutself       = x2apic_send_IPI_mask_allbutself,
270         .send_IPI_allbutself            = x2apic_send_IPI_allbutself,
271         .send_IPI_all                   = x2apic_send_IPI_all,
272         .send_IPI_self                  = x2apic_send_IPI_self,
273
274         .wait_for_init_deassert         = false,
275         .inquire_remote_apic            = NULL,
276
277         .read                           = native_apic_msr_read,
278         .write                          = native_apic_msr_write,
279         .eoi_write                      = native_apic_msr_eoi_write,
280         .icr_read                       = native_x2apic_icr_read,
281         .icr_write                      = native_x2apic_icr_write,
282         .wait_icr_idle                  = native_x2apic_wait_icr_idle,
283         .safe_wait_icr_idle             = native_safe_x2apic_wait_icr_idle,
284 };
285
286 apic_driver(apic_x2apic_cluster);