1 #ifndef __ASM_X86_XSAVE_H
2 #define __ASM_X86_XSAVE_H
4 #include <linux/types.h>
5 #include <asm/processor.h>
7 #define XSTATE_CPUID 0x0000000d
10 #define XSTATE_SSE 0x2
11 #define XSTATE_YMM 0x4
12 #define XSTATE_BNDREGS 0x8
13 #define XSTATE_BNDCSR 0x10
14 #define XSTATE_OPMASK 0x20
15 #define XSTATE_ZMM_Hi256 0x40
16 #define XSTATE_Hi16_ZMM 0x80
18 #define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
19 /* Bit 63 of XCR0 is reserved for future expansion */
20 #define XSTATE_EXTEND_MASK (~(XSTATE_FPSSE | (1ULL << 63)))
22 #define FXSAVE_SIZE 512
24 #define XSAVE_HDR_SIZE 64
25 #define XSAVE_HDR_OFFSET FXSAVE_SIZE
27 #define XSAVE_YMM_SIZE 256
28 #define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
30 /* Supported features which support lazy state saving */
31 #define XSTATE_LAZY (XSTATE_FP | XSTATE_SSE | XSTATE_YMM \
32 | XSTATE_OPMASK | XSTATE_ZMM_Hi256 | XSTATE_Hi16_ZMM)
34 /* Supported features which require eager state saving */
35 #define XSTATE_EAGER (XSTATE_BNDREGS | XSTATE_BNDCSR)
37 /* All currently supported features */
38 #define XCNTXT_MASK (XSTATE_LAZY | XSTATE_EAGER)
41 #define REX_PREFIX "0x48, "
46 extern unsigned int xstate_size;
47 extern u64 pcntxt_mask;
48 extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
49 extern struct xsave_struct *init_xstate_buf;
51 extern void xsave_init(void);
52 extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
53 extern int init_fpu(struct task_struct *child);
55 static inline int fpu_xrstor_checking(struct xsave_struct *fx)
59 asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
61 ".section .fixup,\"ax\"\n"
62 "3: movl $-1,%[err]\n"
67 : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
73 static inline int xsave_user(struct xsave_struct __user *buf)
78 * Clear the xsave header first, so that reserved fields are
79 * initialized to zero.
81 err = __clear_user(&buf->xsave_hdr, sizeof(buf->xsave_hdr));
85 __asm__ __volatile__(ASM_STAC "\n"
86 "1: .byte " REX_PREFIX "0x0f,0xae,0x27\n"
88 ".section .fixup,\"ax\"\n"
89 "3: movl $-1,%[err]\n"
94 : "D" (buf), "a" (-1), "d" (-1), "0" (0)
99 static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)
102 struct xsave_struct *xstate = ((__force struct xsave_struct *)buf);
104 u32 hmask = mask >> 32;
106 __asm__ __volatile__(ASM_STAC "\n"
107 "1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n"
109 ".section .fixup,\"ax\"\n"
110 "3: movl $-1,%[err]\n"
115 : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)
116 : "memory"); /* memory required? */
120 static inline void xrstor_state(struct xsave_struct *fx, u64 mask)
123 u32 hmask = mask >> 32;
125 asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
126 : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
130 static inline void xsave_state(struct xsave_struct *fx, u64 mask)
133 u32 hmask = mask >> 32;
135 asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x27\n\t"
136 : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
140 static inline void fpu_xsave(struct fpu *fpu)
142 /* This, however, we can work around by forcing the compiler to select
143 an addressing mode that doesn't require extended registers. */
145 ".byte " REX_PREFIX "0x0f,0xae,0x27",
146 ".byte " REX_PREFIX "0x0f,0xae,0x37",
147 X86_FEATURE_XSAVEOPT,
148 [fx] "D" (&fpu->state->xsave), "a" (-1), "d" (-1) :