1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This header defines architecture specific interfaces, x86 version
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
11 #include <linux/types.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
19 #include <linux/kvm.h>
20 #include <linux/kvm_para.h>
21 #include <linux/kvm_types.h>
22 #include <linux/perf_event.h>
23 #include <linux/pvclock_gtod.h>
24 #include <linux/clocksource.h>
25 #include <linux/irqbypass.h>
26 #include <linux/hyperv.h>
29 #include <asm/pvclock-abi.h>
32 #include <asm/msr-index.h>
34 #include <asm/kvm_page_track.h>
35 #include <asm/kvm_vcpu_regs.h>
36 #include <asm/hyperv-tlfs.h>
38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
40 #define KVM_MAX_VCPUS 288
41 #define KVM_SOFT_MAX_VCPUS 240
42 #define KVM_MAX_VCPU_ID 1023
43 #define KVM_USER_MEM_SLOTS 509
44 /* memory slots that are not exposed to userspace */
45 #define KVM_PRIVATE_MEM_SLOTS 3
46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
48 #define KVM_HALT_POLL_NS_DEFAULT 200000
50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
52 /* x86-specific vcpu->requests bit members */
53 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
54 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
55 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
56 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
57 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
58 #define KVM_REQ_LOAD_CR3 KVM_ARCH_REQ(5)
59 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
60 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
61 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
62 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
63 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
64 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
65 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
66 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
67 #define KVM_REQ_MCLOCK_INPROGRESS \
68 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
69 #define KVM_REQ_SCAN_IOAPIC \
70 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
71 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
72 #define KVM_REQ_APIC_PAGE_RELOAD \
73 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
74 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
75 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
76 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
77 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
78 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
79 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
80 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24)
82 #define CR0_RESERVED_BITS \
83 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
84 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
85 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
87 #define CR4_RESERVED_BITS \
88 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
89 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
90 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
91 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
92 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
93 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
95 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
99 #define INVALID_PAGE (~(hpa_t)0)
100 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
102 #define UNMAPPED_GVA (~(gpa_t)0)
104 /* KVM Hugepage definitions for x86 */
106 PT_PAGE_TABLE_LEVEL = 1,
107 PT_DIRECTORY_LEVEL = 2,
109 /* set max level to the biggest one */
110 PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL,
112 #define KVM_NR_PAGE_SIZES (PT_MAX_HUGEPAGE_LEVEL - \
113 PT_PAGE_TABLE_LEVEL + 1)
114 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
115 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
116 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
117 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
118 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
120 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
122 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
123 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
124 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
127 #define KVM_PERMILLE_MMU_PAGES 20
128 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
129 #define KVM_MMU_HASH_SHIFT 12
130 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
131 #define KVM_MIN_FREE_MMU_PAGES 5
132 #define KVM_REFILL_PAGES 25
133 #define KVM_MAX_CPUID_ENTRIES 80
134 #define KVM_NR_FIXED_MTRR_REGION 88
135 #define KVM_NR_VAR_MTRR 8
137 #define ASYNC_PF_PER_VCPU 64
140 VCPU_REGS_RAX = __VCPU_REGS_RAX,
141 VCPU_REGS_RCX = __VCPU_REGS_RCX,
142 VCPU_REGS_RDX = __VCPU_REGS_RDX,
143 VCPU_REGS_RBX = __VCPU_REGS_RBX,
144 VCPU_REGS_RSP = __VCPU_REGS_RSP,
145 VCPU_REGS_RBP = __VCPU_REGS_RBP,
146 VCPU_REGS_RSI = __VCPU_REGS_RSI,
147 VCPU_REGS_RDI = __VCPU_REGS_RDI,
149 VCPU_REGS_R8 = __VCPU_REGS_R8,
150 VCPU_REGS_R9 = __VCPU_REGS_R9,
151 VCPU_REGS_R10 = __VCPU_REGS_R10,
152 VCPU_REGS_R11 = __VCPU_REGS_R11,
153 VCPU_REGS_R12 = __VCPU_REGS_R12,
154 VCPU_REGS_R13 = __VCPU_REGS_R13,
155 VCPU_REGS_R14 = __VCPU_REGS_R14,
156 VCPU_REGS_R15 = __VCPU_REGS_R15,
163 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
180 #include <asm/kvm_emulate.h>
182 #define KVM_NR_MEM_OBJS 40
184 #define KVM_NR_DB_REGS 4
186 #define DR6_BD (1 << 13)
187 #define DR6_BS (1 << 14)
188 #define DR6_BT (1 << 15)
189 #define DR6_RTM (1 << 16)
190 #define DR6_FIXED_1 0xfffe0ff0
191 #define DR6_INIT 0xffff0ff0
192 #define DR6_VOLATILE 0x0001e00f
194 #define DR7_BP_EN_MASK 0x000000ff
195 #define DR7_GE (1 << 9)
196 #define DR7_GD (1 << 13)
197 #define DR7_FIXED_1 0x00000400
198 #define DR7_VOLATILE 0xffff2bff
200 #define PFERR_PRESENT_BIT 0
201 #define PFERR_WRITE_BIT 1
202 #define PFERR_USER_BIT 2
203 #define PFERR_RSVD_BIT 3
204 #define PFERR_FETCH_BIT 4
205 #define PFERR_PK_BIT 5
206 #define PFERR_GUEST_FINAL_BIT 32
207 #define PFERR_GUEST_PAGE_BIT 33
209 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
210 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
211 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
212 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
213 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
214 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
215 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
216 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
218 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
222 /* apic attention bits */
223 #define KVM_APIC_CHECK_VAPIC 0
225 * The following bit is set with PV-EOI, unset on EOI.
226 * We detect PV-EOI changes by guest by comparing
227 * this bit with PV-EOI in guest memory.
228 * See the implementation in apic_update_pv_eoi.
230 #define KVM_APIC_PV_EOI_PENDING 1
232 struct kvm_kernel_irq_routing_entry;
235 * We don't want allocation failures within the mmu code, so we preallocate
236 * enough memory for a single page fault in a cache.
238 struct kvm_mmu_memory_cache {
240 void *objects[KVM_NR_MEM_OBJS];
244 * the pages used as guest page table on soft mmu are tracked by
245 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
246 * by indirect shadow page can not be more than 15 bits.
248 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access,
249 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
251 union kvm_mmu_page_role {
255 unsigned gpte_is_8_bytes:1;
262 unsigned smep_andnot_wp:1;
263 unsigned smap_andnot_wp:1;
264 unsigned ad_disabled:1;
265 unsigned guest_mode:1;
269 * This is left at the top of the word so that
270 * kvm_memslots_for_spte_role can extract it with a
271 * simple shift. While there is room, give it a whole
272 * byte so it is also faster to load it from memory.
278 union kvm_mmu_extended_role {
280 * This structure complements kvm_mmu_page_role caching everything needed for
281 * MMU configuration. If nothing in both these structures changed, MMU
282 * re-configuration can be skipped. @valid bit is set on first usage so we don't
283 * treat all-zero structure as valid data.
287 unsigned int valid:1;
288 unsigned int execonly:1;
289 unsigned int cr0_pg:1;
290 unsigned int cr4_pae:1;
291 unsigned int cr4_pse:1;
292 unsigned int cr4_pke:1;
293 unsigned int cr4_smap:1;
294 unsigned int cr4_smep:1;
295 unsigned int cr4_la57:1;
296 unsigned int maxphyaddr:6;
303 union kvm_mmu_page_role base;
304 union kvm_mmu_extended_role ext;
308 struct kvm_rmap_head {
312 struct kvm_mmu_page {
313 struct list_head link;
314 struct hlist_node hash_link;
320 * The following two entries are used to key the shadow page in the
323 union kvm_mmu_page_role role;
327 /* hold the gfn of each spte inside spt */
329 int root_count; /* Currently serving as active root */
330 unsigned int unsync_children;
331 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
332 DECLARE_BITMAP(unsync_child_bitmap, 512);
336 * Used out of the mmu-lock to avoid reading spte values while an
337 * update is in progress; see the comments in __get_spte_lockless().
339 int clear_spte_count;
342 /* Number of writes since the last time traversal visited this page. */
343 atomic_t write_flooding_count;
346 struct kvm_pio_request {
347 unsigned long linear_rip;
354 #define PT64_ROOT_MAX_LEVEL 5
356 struct rsvd_bits_validate {
357 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
361 struct kvm_mmu_root_info {
366 #define KVM_MMU_ROOT_INFO_INVALID \
367 ((struct kvm_mmu_root_info) { .cr3 = INVALID_PAGE, .hpa = INVALID_PAGE })
369 #define KVM_MMU_NUM_PREV_ROOTS 3
372 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
373 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
377 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
378 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
379 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
380 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
382 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
383 struct x86_exception *fault);
384 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
385 struct x86_exception *exception);
386 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
387 struct x86_exception *exception);
388 int (*sync_page)(struct kvm_vcpu *vcpu,
389 struct kvm_mmu_page *sp);
390 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
391 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
392 u64 *spte, const void *pte);
395 union kvm_mmu_role mmu_role;
397 u8 shadow_root_level;
400 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
403 * Bitmap; bit set = permission fault
404 * Byte index: page fault error code [4:1]
405 * Bit index: pte permissions in ACC_* format
410 * The pkru_mask indicates if protection key checks are needed. It
411 * consists of 16 domains indexed by page fault error code bits [4:1],
412 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
413 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
421 * check zero bits on shadow page table entries, these
422 * bits include not only hardware reserved bits but also
423 * the bits spte never used.
425 struct rsvd_bits_validate shadow_zero_check;
427 struct rsvd_bits_validate guest_rsvd_check;
429 /* Can have large pages at levels 2..last_nonleaf_level-1. */
430 u8 last_nonleaf_level;
434 u64 pdptrs[4]; /* pae */
437 struct kvm_tlb_range {
452 struct perf_event *perf_event;
453 struct kvm_vcpu *vcpu;
457 unsigned nr_arch_gp_counters;
458 unsigned nr_arch_fixed_counters;
459 unsigned available_event_types;
464 u64 counter_bitmask[2];
465 u64 global_ctrl_mask;
466 u64 global_ovf_ctrl_mask;
469 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
470 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
471 struct irq_work irq_work;
478 KVM_DEBUGREG_BP_ENABLED = 1,
479 KVM_DEBUGREG_WONT_EXIT = 2,
480 KVM_DEBUGREG_RELOAD = 4,
483 struct kvm_mtrr_range {
486 struct list_head node;
490 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
491 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
494 struct list_head head;
497 /* Hyper-V SynIC timer */
498 struct kvm_vcpu_hv_stimer {
499 struct hrtimer timer;
501 union hv_stimer_config config;
504 struct hv_message msg;
508 /* Hyper-V synthetic interrupt controller (SynIC)*/
509 struct kvm_vcpu_hv_synic {
514 atomic64_t sint[HV_SYNIC_SINT_COUNT];
515 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
516 DECLARE_BITMAP(auto_eoi_bitmap, 256);
517 DECLARE_BITMAP(vec_bitmap, 256);
519 bool dont_zero_synic_pages;
522 /* Hyper-V per vcpu emulation context */
527 struct kvm_vcpu_hv_synic synic;
528 struct kvm_hyperv_exit exit;
529 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
530 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
534 struct kvm_vcpu_arch {
536 * rip and regs accesses must go through
537 * kvm_{register,rip}_{read,write} functions.
539 unsigned long regs[NR_VCPU_REGS];
544 unsigned long cr0_guest_owned_bits;
548 unsigned long cr4_guest_owned_bits;
554 struct kvm_lapic *apic; /* kernel irqchip context */
556 bool load_eoi_exitmap_pending;
557 DECLARE_BITMAP(ioapic_handled_vectors, 256);
558 unsigned long apic_attention;
559 int32_t apic_arb_prio;
561 u64 ia32_misc_enable_msr;
564 bool tpr_access_reporting;
566 u64 microcode_version;
567 u64 arch_capabilities;
570 * Paging state of the vcpu
572 * If the vcpu runs in guest mode with two level paging this still saves
573 * the paging mode of the l1 guest. This context is always used to
578 /* Non-nested MMU for L1 */
579 struct kvm_mmu root_mmu;
581 /* L1 MMU when running nested */
582 struct kvm_mmu guest_mmu;
585 * Paging state of an L2 guest (used for nested npt)
587 * This context will save all necessary information to walk page tables
588 * of the an L2 guest. This context is only initialized for page table
589 * walking and not for faulting since we never handle l2 page faults on
592 struct kvm_mmu nested_mmu;
595 * Pointer to the mmu context currently used for
596 * gva_to_gpa translations.
598 struct kvm_mmu *walk_mmu;
600 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
601 struct kvm_mmu_memory_cache mmu_page_cache;
602 struct kvm_mmu_memory_cache mmu_page_header_cache;
605 * QEMU userspace and the guest each have their own FPU state.
606 * In vcpu_run, we switch between the user and guest FPU contexts.
607 * While running a VCPU, the VCPU thread will have the guest FPU
610 * Note that while the PKRU state lives inside the fpu registers,
611 * it is switched out separately at VMENTER and VMEXIT time. The
612 * "guest_fpu" state here contains the guest FPU context, with the
615 struct fpu *user_fpu;
616 struct fpu *guest_fpu;
619 u64 guest_supported_xcr0;
620 u32 guest_xstate_size;
622 struct kvm_pio_request pio;
625 u8 event_exit_inst_len;
627 struct kvm_queued_exception {
633 unsigned long payload;
638 struct kvm_queued_interrupt {
644 int halt_request; /* real mode on Intel only */
647 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
651 /* emulate context */
653 struct x86_emulate_ctxt emulate_ctxt;
654 bool emulate_regs_need_sync_to_vcpu;
655 bool emulate_regs_need_sync_from_vcpu;
656 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
659 struct pvclock_vcpu_time_info hv_clock;
660 unsigned int hw_tsc_khz;
661 struct gfn_to_hva_cache pv_time;
662 bool pv_time_enabled;
663 /* set guest stopped flag in pvclock flags field */
664 bool pvclock_set_guest_stopped_request;
669 struct gfn_to_hva_cache stime;
670 struct kvm_steal_time steal;
676 u64 tsc_offset_adjustment;
679 u64 this_tsc_generation;
681 bool tsc_always_catchup;
682 s8 virtual_tsc_shift;
683 u32 virtual_tsc_mult;
685 s64 ia32_tsc_adjust_msr;
686 u64 msr_ia32_power_ctl;
687 u64 tsc_scaling_ratio;
689 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
690 unsigned nmi_pending; /* NMI queued after currently running handler */
691 bool nmi_injected; /* Trying to inject an NMI this entry */
692 bool smi_pending; /* SMI queued after currently running handler */
694 struct kvm_mtrr mtrr_state;
697 unsigned switch_db_regs;
698 unsigned long db[KVM_NR_DB_REGS];
701 unsigned long eff_db[KVM_NR_DB_REGS];
702 unsigned long guest_debug_dr7;
703 u64 msr_platform_info;
704 u64 msr_misc_features_enables;
712 /* Cache MMIO info */
714 unsigned mmio_access;
720 /* used for guest single stepping over the given code position */
721 unsigned long singlestep_rip;
723 struct kvm_vcpu_hv hyperv;
725 cpumask_var_t wbinvd_dirty_mask;
727 unsigned long last_retry_eip;
728 unsigned long last_retry_addr;
732 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
733 struct gfn_to_hva_cache data;
738 unsigned long nested_apf_token;
739 bool delivery_as_pf_vmexit;
742 /* OSVW MSRs (AMD only) */
750 struct gfn_to_hva_cache data;
753 u64 msr_kvm_poll_control;
756 * Indicate whether the access faults on its page table in guest
757 * which is set when fix page fault and used to detect unhandeable
760 bool write_fault_to_shadow_pgtable;
762 /* set at EPT violation at this point */
763 unsigned long exit_qualification;
765 /* pv related host specific info */
770 int pending_ioapic_eoi;
771 int pending_external_vector;
777 /* be preempted when it's in kernel-mode(cpl=0) */
778 bool preempted_in_kernel;
780 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
783 /* AMD MSRC001_0015 Hardware Configuration */
787 struct kvm_lpage_info {
791 struct kvm_arch_memory_slot {
792 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
793 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
794 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
798 * We use as the mode the number of bits allocated in the LDR for the
799 * logical processor ID. It happens that these are all powers of two.
800 * This makes it is very easy to detect cases where the APICs are
801 * configured for multiple modes; in that case, we cannot use the map and
802 * hence cannot use kvm_irq_delivery_to_apic_fast either.
804 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
805 #define KVM_APIC_MODE_XAPIC_FLAT 8
806 #define KVM_APIC_MODE_X2APIC 16
808 struct kvm_apic_map {
813 struct kvm_lapic *xapic_flat_map[8];
814 struct kvm_lapic *xapic_cluster_map[16][4];
816 struct kvm_lapic *phys_map[];
819 /* Hyper-V emulation context */
821 struct mutex hv_lock;
826 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
827 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
830 HV_REFERENCE_TSC_PAGE tsc_ref;
832 struct idr conn_to_evt;
834 u64 hv_reenlightenment_control;
835 u64 hv_tsc_emulation_control;
836 u64 hv_tsc_emulation_status;
838 /* How many vCPUs have VP index != vCPU index */
839 atomic_t num_mismatched_vp_indexes;
841 struct hv_partition_assist_pg *hv_pa_pg;
844 enum kvm_irqchip_mode {
846 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
847 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
851 unsigned long n_used_mmu_pages;
852 unsigned long n_requested_mmu_pages;
853 unsigned long n_max_mmu_pages;
854 unsigned int indirect_shadow_pages;
856 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
858 * Hash table of struct kvm_mmu_page.
860 struct list_head active_mmu_pages;
861 struct list_head zapped_obsolete_pages;
862 struct kvm_page_track_notifier_node mmu_sp_tracker;
863 struct kvm_page_track_notifier_head track_notifier_head;
865 struct list_head assigned_dev_head;
866 struct iommu_domain *iommu_domain;
867 bool iommu_noncoherent;
868 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
869 atomic_t noncoherent_dma_count;
870 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
871 atomic_t assigned_device_count;
872 struct kvm_pic *vpic;
873 struct kvm_ioapic *vioapic;
874 struct kvm_pit *vpit;
875 atomic_t vapics_in_nmi_mode;
876 struct mutex apic_map_lock;
877 struct kvm_apic_map *apic_map;
879 bool apic_access_page_done;
886 bool cstate_in_guest;
888 unsigned long irq_sources_bitmap;
890 raw_spinlock_t tsc_write_lock;
897 u64 cur_tsc_generation;
898 int nr_vcpus_matched_tsc;
900 spinlock_t pvclock_gtod_sync_lock;
901 bool use_master_clock;
902 u64 master_kernel_ns;
903 u64 master_cycle_now;
904 struct delayed_work kvmclock_update_work;
905 struct delayed_work kvmclock_sync_work;
907 struct kvm_xen_hvm_config xen_hvm_config;
909 /* reads protected by irq_srcu, writes by irq_lock */
910 struct hlist_head mask_notifier_list;
912 struct kvm_hv hyperv;
914 #ifdef CONFIG_KVM_MMU_AUDIT
918 bool backwards_tsc_observed;
919 bool boot_vcpu_runs_old_kvmclock;
924 enum kvm_irqchip_mode irqchip_mode;
925 u8 nr_reserved_ioapic_pins;
927 bool disabled_lapic_found;
930 bool x2apic_broadcast_quirk_disabled;
932 bool guest_can_read_msr_platform_info;
933 bool exception_payload_enabled;
935 struct kvm_pmu_event_filter *pmu_event_filter;
939 ulong mmu_shadow_zapped;
941 ulong mmu_pte_updated;
942 ulong mmu_pde_zapped;
945 ulong mmu_cache_miss;
947 ulong remote_tlb_flush;
949 ulong max_mmu_page_hash_collisions;
952 struct kvm_vcpu_stat {
962 u64 irq_window_exits;
963 u64 nmi_window_exits;
966 u64 halt_successful_poll;
967 u64 halt_attempted_poll;
968 u64 halt_poll_invalid;
970 u64 request_irq_exits;
972 u64 host_state_reload;
975 u64 insn_emulation_fail;
982 struct x86_instruction_info;
990 struct kvm_lapic_irq {
1001 struct kvm_x86_ops {
1002 int (*cpu_has_kvm_support)(void); /* __init */
1003 int (*disabled_by_bios)(void); /* __init */
1004 int (*hardware_enable)(void);
1005 void (*hardware_disable)(void);
1006 int (*check_processor_compatibility)(void);/* __init */
1007 int (*hardware_setup)(void); /* __init */
1008 void (*hardware_unsetup)(void); /* __exit */
1009 bool (*cpu_has_accelerated_tpr)(void);
1010 bool (*has_emulated_msr)(int index);
1011 void (*cpuid_update)(struct kvm_vcpu *vcpu);
1013 struct kvm *(*vm_alloc)(void);
1014 void (*vm_free)(struct kvm *);
1015 int (*vm_init)(struct kvm *kvm);
1016 void (*vm_destroy)(struct kvm *kvm);
1018 /* Create, but do not attach this VCPU */
1019 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
1020 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1021 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1023 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
1024 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1025 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1027 void (*update_bp_intercept)(struct kvm_vcpu *vcpu);
1028 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1029 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1030 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1031 void (*get_segment)(struct kvm_vcpu *vcpu,
1032 struct kvm_segment *var, int seg);
1033 int (*get_cpl)(struct kvm_vcpu *vcpu);
1034 void (*set_segment)(struct kvm_vcpu *vcpu,
1035 struct kvm_segment *var, int seg);
1036 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1037 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
1038 void (*decache_cr3)(struct kvm_vcpu *vcpu);
1039 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
1040 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1041 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1042 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1043 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1044 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1045 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1046 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1047 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1048 u64 (*get_dr6)(struct kvm_vcpu *vcpu);
1049 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
1050 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1051 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1052 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1053 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1054 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1056 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa);
1057 int (*tlb_remote_flush)(struct kvm *kvm);
1058 int (*tlb_remote_flush_with_range)(struct kvm *kvm,
1059 struct kvm_tlb_range *range);
1062 * Flush any TLB entries associated with the given GVA.
1063 * Does not need to flush GPA->HPA mappings.
1064 * Can potentially get non-canonical addresses through INVLPGs, which
1065 * the implementation may choose to ignore if appropriate.
1067 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1069 void (*run)(struct kvm_vcpu *vcpu);
1070 int (*handle_exit)(struct kvm_vcpu *vcpu);
1071 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1072 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1073 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1074 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1075 unsigned char *hypercall_addr);
1076 void (*set_irq)(struct kvm_vcpu *vcpu);
1077 void (*set_nmi)(struct kvm_vcpu *vcpu);
1078 void (*queue_exception)(struct kvm_vcpu *vcpu);
1079 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1080 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
1081 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
1082 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1083 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1084 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1085 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1086 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1087 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu);
1088 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1089 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1090 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1091 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1092 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1093 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1094 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
1095 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
1096 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1097 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1098 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1099 int (*get_tdp_level)(struct kvm_vcpu *vcpu);
1100 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1101 int (*get_lpage_level)(void);
1102 bool (*rdtscp_supported)(void);
1103 bool (*invpcid_supported)(void);
1105 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1107 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
1109 bool (*has_wbinvd_exit)(void);
1111 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu);
1112 /* Returns actual tsc_offset set in active VMCS */
1113 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1115 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
1117 int (*check_intercept)(struct kvm_vcpu *vcpu,
1118 struct x86_instruction_info *info,
1119 enum x86_intercept_stage stage);
1120 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1121 bool (*mpx_supported)(void);
1122 bool (*xsaves_supported)(void);
1123 bool (*umip_emulated)(void);
1124 bool (*pt_supported)(void);
1126 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
1127 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1129 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1132 * Arch-specific dirty logging hooks. These hooks are only supposed to
1133 * be valid if the specific arch has hardware-accelerated dirty logging
1134 * mechanism. Currently only for PML on VMX.
1136 * - slot_enable_log_dirty:
1137 * called when enabling log dirty mode for the slot.
1138 * - slot_disable_log_dirty:
1139 * called when disabling log dirty mode for the slot.
1140 * also called when slot is created with log dirty disabled.
1141 * - flush_log_dirty:
1142 * called before reporting dirty_bitmap to userspace.
1143 * - enable_log_dirty_pt_masked:
1144 * called when reenabling log dirty for the GFNs in the mask after
1145 * corresponding bits are cleared in slot->dirty_bitmap.
1147 void (*slot_enable_log_dirty)(struct kvm *kvm,
1148 struct kvm_memory_slot *slot);
1149 void (*slot_disable_log_dirty)(struct kvm *kvm,
1150 struct kvm_memory_slot *slot);
1151 void (*flush_log_dirty)(struct kvm *kvm);
1152 void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
1153 struct kvm_memory_slot *slot,
1154 gfn_t offset, unsigned long mask);
1155 int (*write_log_dirty)(struct kvm_vcpu *vcpu);
1157 /* pmu operations of sub-arch */
1158 const struct kvm_pmu_ops *pmu_ops;
1161 * Architecture specific hooks for vCPU blocking due to
1163 * Returns for .pre_block():
1164 * - 0 means continue to block the vCPU.
1165 * - 1 means we cannot block the vCPU since some event
1166 * happens during this period, such as, 'ON' bit in
1167 * posted-interrupts descriptor is set.
1169 int (*pre_block)(struct kvm_vcpu *vcpu);
1170 void (*post_block)(struct kvm_vcpu *vcpu);
1172 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1173 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1175 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
1176 uint32_t guest_irq, bool set);
1177 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1178 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1180 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1182 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1184 void (*setup_mce)(struct kvm_vcpu *vcpu);
1186 int (*get_nested_state)(struct kvm_vcpu *vcpu,
1187 struct kvm_nested_state __user *user_kvm_nested_state,
1188 unsigned user_data_size);
1189 int (*set_nested_state)(struct kvm_vcpu *vcpu,
1190 struct kvm_nested_state __user *user_kvm_nested_state,
1191 struct kvm_nested_state *kvm_state);
1192 bool (*get_vmcs12_pages)(struct kvm_vcpu *vcpu);
1194 int (*smi_allowed)(struct kvm_vcpu *vcpu);
1195 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1196 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate);
1197 int (*enable_smi_window)(struct kvm_vcpu *vcpu);
1199 int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
1200 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1201 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1203 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1205 int (*nested_enable_evmcs)(struct kvm_vcpu *vcpu,
1206 uint16_t *vmcs_version);
1207 uint16_t (*nested_get_evmcs_version)(struct kvm_vcpu *vcpu);
1209 bool (*need_emulation_on_page_fault)(struct kvm_vcpu *vcpu);
1211 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1212 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
1215 struct kvm_arch_async_pf {
1222 extern struct kvm_x86_ops *kvm_x86_ops;
1223 extern struct kmem_cache *x86_fpu_cache;
1225 #define __KVM_HAVE_ARCH_VM_ALLOC
1226 static inline struct kvm *kvm_arch_alloc_vm(void)
1228 return kvm_x86_ops->vm_alloc();
1231 static inline void kvm_arch_free_vm(struct kvm *kvm)
1233 return kvm_x86_ops->vm_free(kvm);
1236 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
1237 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1239 if (kvm_x86_ops->tlb_remote_flush &&
1240 !kvm_x86_ops->tlb_remote_flush(kvm))
1246 int kvm_mmu_module_init(void);
1247 void kvm_mmu_module_exit(void);
1249 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1250 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1251 void kvm_mmu_init_vm(struct kvm *kvm);
1252 void kvm_mmu_uninit_vm(struct kvm *kvm);
1253 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
1254 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
1255 u64 acc_track_mask, u64 me_mask);
1257 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1258 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1259 struct kvm_memory_slot *memslot);
1260 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1261 const struct kvm_memory_slot *memslot);
1262 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1263 struct kvm_memory_slot *memslot);
1264 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
1265 struct kvm_memory_slot *memslot);
1266 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
1267 struct kvm_memory_slot *memslot);
1268 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1269 struct kvm_memory_slot *slot,
1270 gfn_t gfn_offset, unsigned long mask);
1271 void kvm_mmu_zap_all(struct kvm *kvm);
1272 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1273 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm);
1274 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1276 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1277 bool pdptrs_changed(struct kvm_vcpu *vcpu);
1279 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1280 const void *val, int bytes);
1282 struct kvm_irq_mask_notifier {
1283 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1285 struct hlist_node link;
1288 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1289 struct kvm_irq_mask_notifier *kimn);
1290 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1291 struct kvm_irq_mask_notifier *kimn);
1292 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1295 extern bool tdp_enabled;
1297 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1299 /* control of guest tsc rate supported? */
1300 extern bool kvm_has_tsc_control;
1301 /* maximum supported tsc_khz for guests */
1302 extern u32 kvm_max_guest_tsc_khz;
1303 /* number of bits of the fractional part of the TSC scaling ratio */
1304 extern u8 kvm_tsc_scaling_ratio_frac_bits;
1305 /* maximum allowed value of TSC scaling ratio */
1306 extern u64 kvm_max_tsc_scaling_ratio;
1307 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1308 extern u64 kvm_default_tsc_scaling_ratio;
1310 extern u64 kvm_mce_cap_supported;
1313 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1314 * userspace I/O) to indicate that the emulation context
1315 * should be resued as is, i.e. skip initialization of
1316 * emulation context, instruction fetch and decode.
1318 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1319 * Indicates that only select instructions (tagged with
1320 * EmulateOnUD) should be emulated (to minimize the emulator
1321 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1323 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1324 * decode the instruction length. For use *only* by
1325 * kvm_x86_ops->skip_emulated_instruction() implementations.
1327 * EMULTYPE_ALLOW_RETRY - Set when the emulator should resume the guest to
1328 * retry native execution under certain conditions.
1330 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1331 * triggered by KVM's magic "force emulation" prefix,
1332 * which is opt in via module param (off by default).
1333 * Bypasses EmulateOnUD restriction despite emulating
1334 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1335 * Used to test the full emulator from userspace.
1337 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1338 * backdoor emulation, which is opt in via module param.
1339 * VMware backoor emulation handles select instructions
1340 * and reinjects the #GP for all other cases.
1342 #define EMULTYPE_NO_DECODE (1 << 0)
1343 #define EMULTYPE_TRAP_UD (1 << 1)
1344 #define EMULTYPE_SKIP (1 << 2)
1345 #define EMULTYPE_ALLOW_RETRY (1 << 3)
1346 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1347 #define EMULTYPE_VMWARE_GP (1 << 5)
1348 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1349 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1350 void *insn, int insn_len);
1352 void kvm_enable_efer_bits(u64);
1353 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1354 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1355 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1356 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1357 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1359 struct x86_emulate_ctxt;
1361 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1362 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1363 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1364 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1365 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1367 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1368 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1369 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1371 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1372 int reason, bool has_error_code, u32 error_code);
1374 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1375 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1376 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1377 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1378 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1379 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1380 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1381 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1382 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1383 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1385 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1386 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1388 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1389 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1390 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1392 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1393 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1394 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1395 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1396 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1397 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1398 gfn_t gfn, void *data, int offset, int len,
1400 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1401 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1403 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1404 int irq_source_id, int level)
1406 /* Logical OR for level trig interrupt */
1408 __set_bit(irq_source_id, irq_state);
1410 __clear_bit(irq_source_id, irq_state);
1412 return !!(*irq_state);
1415 #define KVM_MMU_ROOT_CURRENT BIT(0)
1416 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1417 #define KVM_MMU_ROOTS_ALL (~0UL)
1419 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1420 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1422 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1424 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1425 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1426 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1427 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1428 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1429 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1430 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1431 ulong roots_to_free);
1432 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1433 struct x86_exception *exception);
1434 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1435 struct x86_exception *exception);
1436 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1437 struct x86_exception *exception);
1438 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1439 struct x86_exception *exception);
1440 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1441 struct x86_exception *exception);
1443 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu);
1445 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1447 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code,
1448 void *insn, int insn_len);
1449 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1450 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1451 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu, gpa_t new_cr3, bool skip_tlb_flush);
1453 void kvm_enable_tdp(void);
1454 void kvm_disable_tdp(void);
1456 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1457 struct x86_exception *exception)
1462 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1464 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1466 return (struct kvm_mmu_page *)page_private(page);
1469 static inline u16 kvm_read_ldt(void)
1472 asm("sldt %0" : "=g"(ldt));
1476 static inline void kvm_load_ldt(u16 sel)
1478 asm("lldt %0" : : "rm"(sel));
1481 #ifdef CONFIG_X86_64
1482 static inline unsigned long read_msr(unsigned long msr)
1491 static inline u32 get_rdx_init_val(void)
1493 return 0x600; /* P6 family */
1496 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1498 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1501 #define TSS_IOPB_BASE_OFFSET 0x66
1502 #define TSS_BASE_SIZE 0x68
1503 #define TSS_IOPB_SIZE (65536 / 8)
1504 #define TSS_REDIRECTION_SIZE (256 / 8)
1505 #define RMODE_TSS_SIZE \
1506 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1509 TASK_SWITCH_CALL = 0,
1510 TASK_SWITCH_IRET = 1,
1511 TASK_SWITCH_JMP = 2,
1512 TASK_SWITCH_GATE = 3,
1515 #define HF_GIF_MASK (1 << 0)
1516 #define HF_HIF_MASK (1 << 1)
1517 #define HF_VINTR_MASK (1 << 2)
1518 #define HF_NMI_MASK (1 << 3)
1519 #define HF_IRET_MASK (1 << 4)
1520 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1521 #define HF_SMM_MASK (1 << 6)
1522 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1524 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1525 #define KVM_ADDRESS_SPACE_NUM 2
1527 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1528 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1530 asmlinkage void kvm_spurious_fault(void);
1533 * Hardware virtualization extension instructions may fault if a
1534 * reboot turns off virtualization while processes are running.
1535 * Usually after catching the fault we just panic; during reboot
1536 * instead the instruction is ignored.
1538 #define __kvm_handle_fault_on_reboot(insn) \
1543 "call kvm_spurious_fault \n\t" \
1545 _ASM_EXTABLE(666b, 667b)
1547 #define KVM_ARCH_WANT_MMU_NOTIFIER
1548 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1549 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1550 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1551 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1552 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1553 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1554 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1555 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1556 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1557 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1559 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1560 unsigned long ipi_bitmap_high, u32 min,
1561 unsigned long icr, int op_64_bit);
1563 void kvm_define_shared_msr(unsigned index, u32 msr);
1564 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1566 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
1567 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1569 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1570 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1572 void kvm_make_mclock_inprogress_request(struct kvm *kvm);
1573 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1575 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1576 struct kvm_async_pf *work);
1577 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1578 struct kvm_async_pf *work);
1579 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1580 struct kvm_async_pf *work);
1581 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1582 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1584 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1585 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1586 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1588 int kvm_is_in_guest(void);
1590 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1591 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1592 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1593 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1595 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1596 struct kvm_vcpu **dest_vcpu);
1598 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1599 struct kvm_lapic_irq *irq);
1601 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
1603 /* We can only post Fixed and LowPrio IRQs */
1604 return (irq->delivery_mode == dest_Fixed ||
1605 irq->delivery_mode == dest_LowestPrio);
1608 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1610 if (kvm_x86_ops->vcpu_blocking)
1611 kvm_x86_ops->vcpu_blocking(vcpu);
1614 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1616 if (kvm_x86_ops->vcpu_unblocking)
1617 kvm_x86_ops->vcpu_unblocking(vcpu);
1620 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1622 static inline int kvm_cpu_get_apicid(int mps_cpu)
1624 #ifdef CONFIG_X86_LOCAL_APIC
1625 return default_cpu_present_to_apicid(mps_cpu);
1632 #define put_smstate(type, buf, offset, val) \
1633 *(type *)((buf) + (offset) - 0x7e00) = val
1635 #define GET_SMSTATE(type, buf, offset) \
1636 (*(type *)((buf) + (offset) - 0x7e00))
1638 #endif /* _ASM_X86_KVM_HOST_H */