1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This header defines architecture specific interfaces, x86 version
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
11 #include <linux/types.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
18 #include <linux/workqueue.h>
20 #include <linux/kvm.h>
21 #include <linux/kvm_para.h>
22 #include <linux/kvm_types.h>
23 #include <linux/perf_event.h>
24 #include <linux/pvclock_gtod.h>
25 #include <linux/clocksource.h>
26 #include <linux/irqbypass.h>
27 #include <linux/hyperv.h>
28 #include <linux/kfifo.h>
31 #include <asm/pvclock-abi.h>
34 #include <asm/msr-index.h>
36 #include <asm/kvm_page_track.h>
37 #include <asm/kvm_vcpu_regs.h>
38 #include <asm/hyperv-tlfs.h>
40 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
42 #define KVM_MAX_VCPUS 1024
45 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs
46 * might be larger than the actual number of VCPUs because the
47 * APIC ID encodes CPU topology information.
49 * In the worst case, we'll need less than one extra bit for the
50 * Core ID, and less than one extra bit for the Package (Die) ID,
51 * so ratio of 4 should be enough.
53 #define KVM_VCPU_ID_RATIO 4
54 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO)
56 /* memory slots that are not exposed to userspace */
57 #define KVM_INTERNAL_MEM_SLOTS 3
59 #define KVM_HALT_POLL_NS_DEFAULT 200000
61 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
63 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
64 KVM_DIRTY_LOG_INITIALLY_SET)
66 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \
67 KVM_BUS_LOCK_DETECTION_EXIT)
69 #define KVM_X86_NOTIFY_VMEXIT_VALID_BITS (KVM_X86_NOTIFY_VMEXIT_ENABLED | \
70 KVM_X86_NOTIFY_VMEXIT_USER)
72 /* x86-specific vcpu->requests bit members */
73 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
74 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
75 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
76 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
77 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
78 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
79 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
80 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
81 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
82 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
83 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
84 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
86 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
88 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
89 #define KVM_REQ_MCLOCK_INPROGRESS \
90 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
91 #define KVM_REQ_SCAN_IOAPIC \
92 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
93 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
94 #define KVM_REQ_APIC_PAGE_RELOAD \
95 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
96 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
97 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
98 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
99 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
100 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
101 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
102 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24)
103 #define KVM_REQ_APICV_UPDATE \
104 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
105 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
106 #define KVM_REQ_TLB_FLUSH_GUEST \
107 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
108 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28)
109 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29)
110 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \
111 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
112 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \
113 KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
114 #define KVM_REQ_HV_TLB_FLUSH \
115 KVM_ARCH_REQ_FLAGS(32, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
117 #define CR0_RESERVED_BITS \
118 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
119 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
120 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
122 #define CR4_RESERVED_BITS \
123 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
124 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
125 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
126 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
127 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
128 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
130 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
134 #define INVALID_PAGE (~(hpa_t)0)
135 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
137 /* KVM Hugepage definitions for x86 */
138 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G
139 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
140 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
141 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
142 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
143 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
144 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
146 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50
147 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
148 #define KVM_MMU_HASH_SHIFT 12
149 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
150 #define KVM_MIN_FREE_MMU_PAGES 5
151 #define KVM_REFILL_PAGES 25
152 #define KVM_MAX_CPUID_ENTRIES 256
153 #define KVM_NR_FIXED_MTRR_REGION 88
154 #define KVM_NR_VAR_MTRR 8
156 #define ASYNC_PF_PER_VCPU 64
159 VCPU_REGS_RAX = __VCPU_REGS_RAX,
160 VCPU_REGS_RCX = __VCPU_REGS_RCX,
161 VCPU_REGS_RDX = __VCPU_REGS_RDX,
162 VCPU_REGS_RBX = __VCPU_REGS_RBX,
163 VCPU_REGS_RSP = __VCPU_REGS_RSP,
164 VCPU_REGS_RBP = __VCPU_REGS_RBP,
165 VCPU_REGS_RSI = __VCPU_REGS_RSI,
166 VCPU_REGS_RDI = __VCPU_REGS_RDI,
168 VCPU_REGS_R8 = __VCPU_REGS_R8,
169 VCPU_REGS_R9 = __VCPU_REGS_R9,
170 VCPU_REGS_R10 = __VCPU_REGS_R10,
171 VCPU_REGS_R11 = __VCPU_REGS_R11,
172 VCPU_REGS_R12 = __VCPU_REGS_R12,
173 VCPU_REGS_R13 = __VCPU_REGS_R13,
174 VCPU_REGS_R14 = __VCPU_REGS_R14,
175 VCPU_REGS_R15 = __VCPU_REGS_R15,
180 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
186 VCPU_EXREG_EXIT_INFO_1,
187 VCPU_EXREG_EXIT_INFO_2,
201 enum exit_fastpath_completion {
203 EXIT_FASTPATH_REENTER_GUEST,
204 EXIT_FASTPATH_EXIT_HANDLED,
206 typedef enum exit_fastpath_completion fastpath_t;
208 struct x86_emulate_ctxt;
209 struct x86_exception;
212 enum x86_intercept_stage;
214 #define KVM_NR_DB_REGS 4
216 #define DR6_BUS_LOCK (1 << 11)
217 #define DR6_BD (1 << 13)
218 #define DR6_BS (1 << 14)
219 #define DR6_BT (1 << 15)
220 #define DR6_RTM (1 << 16)
222 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
223 * We can regard all the bits in DR6_FIXED_1 as active_low bits;
224 * they will never be 0 for now, but when they are defined
225 * in the future it will require no code change.
227 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
229 #define DR6_ACTIVE_LOW 0xffff0ff0
230 #define DR6_VOLATILE 0x0001e80f
231 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
233 #define DR7_BP_EN_MASK 0x000000ff
234 #define DR7_GE (1 << 9)
235 #define DR7_GD (1 << 13)
236 #define DR7_FIXED_1 0x00000400
237 #define DR7_VOLATILE 0xffff2bff
239 #define KVM_GUESTDBG_VALID_MASK \
240 (KVM_GUESTDBG_ENABLE | \
241 KVM_GUESTDBG_SINGLESTEP | \
242 KVM_GUESTDBG_USE_HW_BP | \
243 KVM_GUESTDBG_USE_SW_BP | \
244 KVM_GUESTDBG_INJECT_BP | \
245 KVM_GUESTDBG_INJECT_DB | \
246 KVM_GUESTDBG_BLOCKIRQ)
249 #define PFERR_PRESENT_BIT 0
250 #define PFERR_WRITE_BIT 1
251 #define PFERR_USER_BIT 2
252 #define PFERR_RSVD_BIT 3
253 #define PFERR_FETCH_BIT 4
254 #define PFERR_PK_BIT 5
255 #define PFERR_SGX_BIT 15
256 #define PFERR_GUEST_FINAL_BIT 32
257 #define PFERR_GUEST_PAGE_BIT 33
258 #define PFERR_IMPLICIT_ACCESS_BIT 48
260 #define PFERR_PRESENT_MASK BIT(PFERR_PRESENT_BIT)
261 #define PFERR_WRITE_MASK BIT(PFERR_WRITE_BIT)
262 #define PFERR_USER_MASK BIT(PFERR_USER_BIT)
263 #define PFERR_RSVD_MASK BIT(PFERR_RSVD_BIT)
264 #define PFERR_FETCH_MASK BIT(PFERR_FETCH_BIT)
265 #define PFERR_PK_MASK BIT(PFERR_PK_BIT)
266 #define PFERR_SGX_MASK BIT(PFERR_SGX_BIT)
267 #define PFERR_GUEST_FINAL_MASK BIT_ULL(PFERR_GUEST_FINAL_BIT)
268 #define PFERR_GUEST_PAGE_MASK BIT_ULL(PFERR_GUEST_PAGE_BIT)
269 #define PFERR_IMPLICIT_ACCESS BIT_ULL(PFERR_IMPLICIT_ACCESS_BIT)
271 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
275 /* apic attention bits */
276 #define KVM_APIC_CHECK_VAPIC 0
278 * The following bit is set with PV-EOI, unset on EOI.
279 * We detect PV-EOI changes by guest by comparing
280 * this bit with PV-EOI in guest memory.
281 * See the implementation in apic_update_pv_eoi.
283 #define KVM_APIC_PV_EOI_PENDING 1
285 struct kvm_kernel_irq_routing_entry;
288 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page
289 * also includes TDP pages) to determine whether or not a page can be used in
290 * the given MMU context. This is a subset of the overall kvm_cpu_role to
291 * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating
292 * 2 bytes per gfn instead of 4 bytes per gfn.
294 * Upper-level shadow pages having gptes are tracked for write-protection via
295 * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create
296 * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise
297 * gfn_track will overflow and explosions will ensure.
299 * A unique shadow page (SP) for a gfn is created if and only if an existing SP
300 * cannot be reused. The ability to reuse a SP is tracked by its role, which
301 * incorporates various mode bits and properties of the SP. Roughly speaking,
302 * the number of unique SPs that can theoretically be created is 2^n, where n
303 * is the number of bits that are used to compute the role.
305 * But, even though there are 19 bits in the mask below, not all combinations
306 * of modes and flags are possible:
308 * - invalid shadow pages are not accounted, so the bits are effectively 18
310 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging);
311 * execonly and ad_disabled are only used for nested EPT which has
312 * has_4_byte_gpte=0. Therefore, 2 bits are always unused.
314 * - the 4 bits of level are effectively limited to the values 2/3/4/5,
315 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE
316 * paging has exactly one upper level, making level completely redundant
317 * when has_4_byte_gpte=1.
319 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if
320 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities.
322 * Therefore, the maximum number of possible upper-level shadow pages for a
323 * single gfn is a bit less than 2^13.
325 union kvm_mmu_page_role {
329 unsigned has_4_byte_gpte:1;
336 unsigned smep_andnot_wp:1;
337 unsigned smap_andnot_wp:1;
338 unsigned ad_disabled:1;
339 unsigned guest_mode:1;
340 unsigned passthrough:1;
344 * This is left at the top of the word so that
345 * kvm_memslots_for_spte_role can extract it with a
346 * simple shift. While there is room, give it a whole
347 * byte so it is also faster to load it from memory.
354 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties
355 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER,
356 * including on nested transitions, if nothing in the full role changes then
357 * MMU re-configuration can be skipped. @valid bit is set on first usage so we
358 * don't treat all-zero structure as valid data.
360 * The properties that are tracked in the extended role but not the page role
361 * are for things that either (a) do not affect the validity of the shadow page
362 * or (b) are indirectly reflected in the shadow page's role. For example,
363 * CR4.PKE only affects permission checks for software walks of the guest page
364 * tables (because KVM doesn't support Protection Keys with shadow paging), and
365 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level.
367 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role.
368 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and
369 * SMAP, but the MMU's permission checks for software walks need to be SMEP and
370 * SMAP aware regardless of CR0.WP.
372 union kvm_mmu_extended_role {
375 unsigned int valid:1;
376 unsigned int execonly:1;
377 unsigned int cr4_pse:1;
378 unsigned int cr4_pke:1;
379 unsigned int cr4_smap:1;
380 unsigned int cr4_smep:1;
381 unsigned int cr4_la57:1;
382 unsigned int efer_lma:1;
389 union kvm_mmu_page_role base;
390 union kvm_mmu_extended_role ext;
394 struct kvm_rmap_head {
398 struct kvm_pio_request {
399 unsigned long linear_rip;
406 #define PT64_ROOT_MAX_LEVEL 5
408 struct rsvd_bits_validate {
409 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
413 struct kvm_mmu_root_info {
418 #define KVM_MMU_ROOT_INFO_INVALID \
419 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
421 #define KVM_MMU_NUM_PREV_ROOTS 3
423 #define KVM_MMU_ROOT_CURRENT BIT(0)
424 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
425 #define KVM_MMU_ROOTS_ALL (BIT(1 + KVM_MMU_NUM_PREV_ROOTS) - 1)
427 #define KVM_HAVE_MMU_RWLOCK
430 struct kvm_page_fault;
433 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
434 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
438 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
439 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
440 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault);
441 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
442 struct x86_exception *fault);
443 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
444 gpa_t gva_or_gpa, u64 access,
445 struct x86_exception *exception);
446 int (*sync_spte)(struct kvm_vcpu *vcpu,
447 struct kvm_mmu_page *sp, int i);
448 struct kvm_mmu_root_info root;
449 union kvm_cpu_role cpu_role;
450 union kvm_mmu_page_role root_role;
453 * The pkru_mask indicates if protection key checks are needed. It
454 * consists of 16 domains indexed by page fault error code bits [4:1],
455 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
456 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
460 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
463 * Bitmap; bit set = permission fault
464 * Byte index: page fault error code [4:1]
465 * Bit index: pte permissions in ACC_* format
474 * check zero bits on shadow page table entries, these
475 * bits include not only hardware reserved bits but also
476 * the bits spte never used.
478 struct rsvd_bits_validate shadow_zero_check;
480 struct rsvd_bits_validate guest_rsvd_check;
482 u64 pdptrs[4]; /* pae */
498 struct perf_event *perf_event;
499 struct kvm_vcpu *vcpu;
501 * only for creating or reusing perf_event,
502 * eventsel value for general purpose counters,
503 * ctrl value for fixed counters.
508 /* More counters may conflict with other existing Architectural MSRs */
509 #define KVM_INTEL_PMC_MAX_GENERIC 8
510 #define MSR_ARCH_PERFMON_PERFCTR_MAX (MSR_ARCH_PERFMON_PERFCTR0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
511 #define MSR_ARCH_PERFMON_EVENTSEL_MAX (MSR_ARCH_PERFMON_EVENTSEL0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
512 #define KVM_PMC_MAX_FIXED 3
513 #define MSR_ARCH_PERFMON_FIXED_CTR_MAX (MSR_ARCH_PERFMON_FIXED_CTR0 + KVM_PMC_MAX_FIXED - 1)
514 #define KVM_AMD_PMC_MAX_GENERIC 6
517 unsigned nr_arch_gp_counters;
518 unsigned nr_arch_fixed_counters;
519 unsigned available_event_types;
521 u64 fixed_ctr_ctrl_mask;
524 u64 counter_bitmask[2];
525 u64 global_ctrl_mask;
526 u64 global_ovf_ctrl_mask;
529 struct kvm_pmc gp_counters[KVM_INTEL_PMC_MAX_GENERIC];
530 struct kvm_pmc fixed_counters[KVM_PMC_MAX_FIXED];
531 struct irq_work irq_work;
534 * Overlay the bitmap with a 64-bit atomic so that all bits can be
535 * set in a single access, e.g. to reprogram all counters when the PMU
539 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
540 atomic64_t __reprogram_pmi;
542 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
543 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
547 u64 pebs_enable_mask;
549 u64 pebs_data_cfg_mask;
552 * If a guest counter is cross-mapped to host counter with different
553 * index, its PEBS capability will be temporarily disabled.
555 * The user should make sure that this mask is updated
556 * after disabling interrupts and before perf_guest_get_msrs();
558 u64 host_cross_mapped_mask;
561 * The gate to release perf_events not marked in
562 * pmc_in_use only once in a vcpu time slice.
567 * The total number of programmed perf_events and it helps to avoid
568 * redundant check before cleanup if guest don't use vPMU at all.
576 KVM_DEBUGREG_BP_ENABLED = 1,
577 KVM_DEBUGREG_WONT_EXIT = 2,
580 struct kvm_mtrr_range {
583 struct list_head node;
587 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
588 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
591 struct list_head head;
594 /* Hyper-V SynIC timer */
595 struct kvm_vcpu_hv_stimer {
596 struct hrtimer timer;
598 union hv_stimer_config config;
601 struct hv_message msg;
605 /* Hyper-V synthetic interrupt controller (SynIC)*/
606 struct kvm_vcpu_hv_synic {
611 atomic64_t sint[HV_SYNIC_SINT_COUNT];
612 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
613 DECLARE_BITMAP(auto_eoi_bitmap, 256);
614 DECLARE_BITMAP(vec_bitmap, 256);
616 bool dont_zero_synic_pages;
619 /* The maximum number of entries on the TLB flush fifo. */
620 #define KVM_HV_TLB_FLUSH_FIFO_SIZE (16)
622 * Note: the following 'magic' entry is made up by KVM to avoid putting
623 * anything besides GVA on the TLB flush fifo. It is theoretically possible
624 * to observe a request to flush 4095 PFNs starting from 0xfffffffffffff000
625 * which will look identical. KVM's action to 'flush everything' instead of
626 * flushing these particular addresses is, however, fully legitimate as
627 * flushing more than requested is always OK.
629 #define KVM_HV_TLB_FLUSHALL_ENTRY ((u64)-1)
631 enum hv_tlb_flush_fifos {
632 HV_L1_TLB_FLUSH_FIFO,
633 HV_L2_TLB_FLUSH_FIFO,
634 HV_NR_TLB_FLUSH_FIFOS,
637 struct kvm_vcpu_hv_tlb_flush_fifo {
638 spinlock_t write_lock;
639 DECLARE_KFIFO(entries, u64, KVM_HV_TLB_FLUSH_FIFO_SIZE);
642 /* Hyper-V per vcpu emulation context */
644 struct kvm_vcpu *vcpu;
648 struct kvm_vcpu_hv_synic synic;
649 struct kvm_hyperv_exit exit;
650 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
651 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
654 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */
655 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */
656 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */
657 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
658 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */
659 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
660 u32 nested_eax; /* HYPERV_CPUID_NESTED_FEATURES.EAX */
661 u32 nested_ebx; /* HYPERV_CPUID_NESTED_FEATURES.EBX */
664 struct kvm_vcpu_hv_tlb_flush_fifo tlb_flush_fifo[HV_NR_TLB_FLUSH_FIFOS];
666 /* Preallocated buffer for handling hypercalls passing sparse vCPU set */
667 u64 sparse_banks[HV_MAX_SPARSE_VCPU_BANKS];
669 struct hv_vp_assist_page vp_assist_page;
678 struct kvm_hypervisor_cpuid {
683 /* Xen HVM per vcpu emulation context */
684 struct kvm_vcpu_xen {
686 u32 current_runstate;
688 struct gfn_to_pfn_cache vcpu_info_cache;
689 struct gfn_to_pfn_cache vcpu_time_info_cache;
690 struct gfn_to_pfn_cache runstate_cache;
691 struct gfn_to_pfn_cache runstate2_cache;
693 u64 runstate_entry_time;
694 u64 runstate_times[4];
695 unsigned long evtchn_pending_sel;
696 u32 vcpu_id; /* The Xen / ACPI vCPU ID */
698 u64 timer_expires; /* In guest epoch */
699 atomic_t timer_pending;
700 struct hrtimer timer;
702 struct timer_list poll_timer;
703 struct kvm_hypervisor_cpuid cpuid;
706 struct kvm_queued_exception {
712 unsigned long payload;
716 struct kvm_vcpu_arch {
718 * rip and regs accesses must go through
719 * kvm_{register,rip}_{read,write} functions.
721 unsigned long regs[NR_VCPU_REGS];
726 unsigned long cr0_guest_owned_bits;
730 unsigned long cr4_guest_owned_bits;
731 unsigned long cr4_guest_rsvd_bits;
738 struct kvm_lapic *apic; /* kernel irqchip context */
739 bool load_eoi_exitmap_pending;
740 DECLARE_BITMAP(ioapic_handled_vectors, 256);
741 unsigned long apic_attention;
742 int32_t apic_arb_prio;
744 u64 ia32_misc_enable_msr;
747 bool at_instruction_boundary;
748 bool tpr_access_reporting;
750 bool xfd_no_write_intercept;
752 u64 microcode_version;
753 u64 arch_capabilities;
754 u64 perf_capabilities;
757 * Paging state of the vcpu
759 * If the vcpu runs in guest mode with two level paging this still saves
760 * the paging mode of the l1 guest. This context is always used to
765 /* Non-nested MMU for L1 */
766 struct kvm_mmu root_mmu;
768 /* L1 MMU when running nested */
769 struct kvm_mmu guest_mmu;
772 * Paging state of an L2 guest (used for nested npt)
774 * This context will save all necessary information to walk page tables
775 * of an L2 guest. This context is only initialized for page table
776 * walking and not for faulting since we never handle l2 page faults on
779 struct kvm_mmu nested_mmu;
782 * Pointer to the mmu context currently used for
783 * gva_to_gpa translations.
785 struct kvm_mmu *walk_mmu;
787 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
788 struct kvm_mmu_memory_cache mmu_shadow_page_cache;
789 struct kvm_mmu_memory_cache mmu_shadowed_info_cache;
790 struct kvm_mmu_memory_cache mmu_page_header_cache;
793 * QEMU userspace and the guest each have their own FPU state.
794 * In vcpu_run, we switch between the user and guest FPU contexts.
795 * While running a VCPU, the VCPU thread will have the guest FPU
798 * Note that while the PKRU state lives inside the fpu registers,
799 * it is switched out separately at VMENTER and VMEXIT time. The
800 * "guest_fpstate" state here contains the guest FPU context, with the
803 struct fpu_guest guest_fpu;
806 u64 guest_supported_xcr0;
808 struct kvm_pio_request pio;
811 unsigned sev_pio_count;
813 u8 event_exit_inst_len;
815 bool exception_from_userspace;
817 /* Exceptions to be injected to the guest. */
818 struct kvm_queued_exception exception;
819 /* Exception VM-Exits to be synthesized to L1. */
820 struct kvm_queued_exception exception_vmexit;
822 struct kvm_queued_interrupt {
828 int halt_request; /* real mode on Intel only */
831 struct kvm_cpuid_entry2 *cpuid_entries;
832 struct kvm_hypervisor_cpuid kvm_cpuid;
834 u64 reserved_gpa_bits;
837 /* emulate context */
839 struct x86_emulate_ctxt *emulate_ctxt;
840 bool emulate_regs_need_sync_to_vcpu;
841 bool emulate_regs_need_sync_from_vcpu;
842 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
845 struct pvclock_vcpu_time_info hv_clock;
846 unsigned int hw_tsc_khz;
847 struct gfn_to_pfn_cache pv_time;
848 /* set guest stopped flag in pvclock flags field */
849 bool pvclock_set_guest_stopped_request;
855 struct gfn_to_hva_cache cache;
859 u64 tsc_offset; /* current tsc offset */
862 u64 tsc_offset_adjustment;
865 u64 this_tsc_generation;
867 bool tsc_always_catchup;
868 s8 virtual_tsc_shift;
869 u32 virtual_tsc_mult;
871 s64 ia32_tsc_adjust_msr;
872 u64 msr_ia32_power_ctl;
873 u64 l1_tsc_scaling_ratio;
874 u64 tsc_scaling_ratio; /* current scaling ratio */
876 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
877 unsigned nmi_pending; /* NMI queued after currently running handler */
878 bool nmi_injected; /* Trying to inject an NMI this entry */
879 bool smi_pending; /* SMI queued after currently running handler */
880 u8 handling_intr_from_guest;
882 struct kvm_mtrr mtrr_state;
885 unsigned switch_db_regs;
886 unsigned long db[KVM_NR_DB_REGS];
889 unsigned long eff_db[KVM_NR_DB_REGS];
890 unsigned long guest_debug_dr7;
891 u64 msr_platform_info;
892 u64 msr_misc_features_enables;
901 /* Cache MMIO info */
903 unsigned mmio_access;
909 /* used for guest single stepping over the given code position */
910 unsigned long singlestep_rip;
913 struct kvm_vcpu_hv *hyperv;
914 struct kvm_vcpu_xen xen;
916 cpumask_var_t wbinvd_dirty_mask;
918 unsigned long last_retry_eip;
919 unsigned long last_retry_addr;
923 gfn_t gfns[ASYNC_PF_PER_VCPU];
924 struct gfn_to_hva_cache data;
925 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */
926 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */
931 bool delivery_as_pf_vmexit;
932 bool pageready_pending;
935 /* OSVW MSRs (AMD only) */
943 struct gfn_to_hva_cache data;
946 u64 msr_kvm_poll_control;
948 /* set at EPT violation at this point */
949 unsigned long exit_qualification;
951 /* pv related host specific info */
956 int pending_ioapic_eoi;
957 int pending_external_vector;
959 /* be preempted when it's in kernel-mode(cpl=0) */
960 bool preempted_in_kernel;
962 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
965 /* Host CPU on which VM-entry was most recently attempted */
966 int last_vmentry_cpu;
968 /* AMD MSRC001_0015 Hardware Configuration */
971 /* pv related cpuid info */
974 * value of the eax register in the KVM_CPUID_FEATURES CPUID
980 * indicates whether pv emulation should be disabled if features
981 * are not present in the guest's cpuid
986 /* Protected Guests */
987 bool guest_state_protected;
990 * Set when PDPTS were loaded directly by the userspace without
991 * reading the guest memory
993 bool pdptrs_from_userspace;
995 #if IS_ENABLED(CONFIG_HYPERV)
1000 struct kvm_lpage_info {
1004 struct kvm_arch_memory_slot {
1005 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
1006 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
1007 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
1011 * Track the mode of the optimized logical map, as the rules for decoding the
1012 * destination vary per mode. Enabling the optimized logical map requires all
1013 * software-enabled local APIs to be in the same mode, each addressable APIC to
1014 * be mapped to only one MDA, and each MDA to map to at most one APIC.
1016 enum kvm_apic_logical_mode {
1017 /* All local APICs are software disabled. */
1018 KVM_APIC_MODE_SW_DISABLED,
1019 /* All software enabled local APICs in xAPIC cluster addressing mode. */
1020 KVM_APIC_MODE_XAPIC_CLUSTER,
1021 /* All software enabled local APICs in xAPIC flat addressing mode. */
1022 KVM_APIC_MODE_XAPIC_FLAT,
1023 /* All software enabled local APICs in x2APIC mode. */
1024 KVM_APIC_MODE_X2APIC,
1026 * Optimized map disabled, e.g. not all local APICs in the same logical
1027 * mode, same logical ID assigned to multiple APICs, etc.
1029 KVM_APIC_MODE_MAP_DISABLED,
1032 struct kvm_apic_map {
1033 struct rcu_head rcu;
1034 enum kvm_apic_logical_mode logical_mode;
1037 struct kvm_lapic *xapic_flat_map[8];
1038 struct kvm_lapic *xapic_cluster_map[16][4];
1040 struct kvm_lapic *phys_map[];
1043 /* Hyper-V synthetic debugger (SynDbg)*/
1044 struct kvm_hv_syndbg {
1055 /* Current state of Hyper-V TSC page clocksource */
1056 enum hv_tsc_page_status {
1057 /* TSC page was not set up or disabled */
1058 HV_TSC_PAGE_UNSET = 0,
1059 /* TSC page MSR was written by the guest, update pending */
1060 HV_TSC_PAGE_GUEST_CHANGED,
1061 /* TSC page update was triggered from the host side */
1062 HV_TSC_PAGE_HOST_CHANGED,
1063 /* TSC page was properly set up and is currently active */
1065 /* TSC page was set up with an inaccessible GPA */
1069 /* Hyper-V emulation context */
1071 struct mutex hv_lock;
1075 enum hv_tsc_page_status hv_tsc_page_status;
1077 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
1078 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
1081 struct ms_hyperv_tsc_page tsc_ref;
1083 struct idr conn_to_evt;
1085 u64 hv_reenlightenment_control;
1086 u64 hv_tsc_emulation_control;
1087 u64 hv_tsc_emulation_status;
1088 u64 hv_invtsc_control;
1090 /* How many vCPUs have VP index != vCPU index */
1091 atomic_t num_mismatched_vp_indexes;
1094 * How many SynICs use 'AutoEOI' feature
1095 * (protected by arch.apicv_update_lock)
1097 unsigned int synic_auto_eoi_used;
1099 struct hv_partition_assist_pg *hv_pa_pg;
1100 struct kvm_hv_syndbg hv_syndbg;
1103 struct msr_bitmap_range {
1107 unsigned long *bitmap;
1110 /* Xen emulation context */
1112 struct mutex xen_lock;
1115 bool runstate_update_flag;
1117 struct gfn_to_pfn_cache shinfo_cache;
1118 struct idr evtchn_ports;
1119 unsigned long poll_mask[BITS_TO_LONGS(KVM_MAX_VCPUS)];
1122 enum kvm_irqchip_mode {
1124 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
1125 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
1128 struct kvm_x86_msr_filter {
1130 bool default_allow:1;
1131 struct msr_bitmap_range ranges[16];
1134 struct kvm_x86_pmu_event_filter {
1137 __u32 fixed_counter_bitmap;
1146 enum kvm_apicv_inhibit {
1148 /********************************************************************/
1149 /* INHIBITs that are relevant to both Intel's APICv and AMD's AVIC. */
1150 /********************************************************************/
1153 * APIC acceleration is disabled by a module parameter
1154 * and/or not supported in hardware.
1156 APICV_INHIBIT_REASON_DISABLE,
1159 * APIC acceleration is inhibited because AutoEOI feature is
1160 * being used by a HyperV guest.
1162 APICV_INHIBIT_REASON_HYPERV,
1165 * APIC acceleration is inhibited because the userspace didn't yet
1166 * enable the kernel/split irqchip.
1168 APICV_INHIBIT_REASON_ABSENT,
1170 /* APIC acceleration is inhibited because KVM_GUESTDBG_BLOCKIRQ
1171 * (out of band, debug measure of blocking all interrupts on this vCPU)
1172 * was enabled, to avoid AVIC/APICv bypassing it.
1174 APICV_INHIBIT_REASON_BLOCKIRQ,
1177 * APICv is disabled because not all vCPUs have a 1:1 mapping between
1178 * APIC ID and vCPU, _and_ KVM is not applying its x2APIC hotplug hack.
1180 APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED,
1183 * For simplicity, the APIC acceleration is inhibited
1184 * first time either APIC ID or APIC base are changed by the guest
1185 * from their reset values.
1187 APICV_INHIBIT_REASON_APIC_ID_MODIFIED,
1188 APICV_INHIBIT_REASON_APIC_BASE_MODIFIED,
1190 /******************************************************/
1191 /* INHIBITs that are relevant only to the AMD's AVIC. */
1192 /******************************************************/
1195 * AVIC is inhibited on a vCPU because it runs a nested guest.
1197 * This is needed because unlike APICv, the peers of this vCPU
1198 * cannot use the doorbell mechanism to signal interrupts via AVIC when
1199 * a vCPU runs nested.
1201 APICV_INHIBIT_REASON_NESTED,
1204 * On SVM, the wait for the IRQ window is implemented with pending vIRQ,
1205 * which cannot be injected when the AVIC is enabled, thus AVIC
1206 * is inhibited while KVM waits for IRQ window.
1208 APICV_INHIBIT_REASON_IRQWIN,
1211 * PIT (i8254) 're-inject' mode, relies on EOI intercept,
1212 * which AVIC doesn't support for edge triggered interrupts.
1214 APICV_INHIBIT_REASON_PIT_REINJ,
1217 * AVIC is disabled because SEV doesn't support it.
1219 APICV_INHIBIT_REASON_SEV,
1222 * AVIC is disabled because not all vCPUs with a valid LDR have a 1:1
1223 * mapping between logical ID and vCPU.
1225 APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED,
1229 unsigned long n_used_mmu_pages;
1230 unsigned long n_requested_mmu_pages;
1231 unsigned long n_max_mmu_pages;
1232 unsigned int indirect_shadow_pages;
1234 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
1235 struct list_head active_mmu_pages;
1236 struct list_head zapped_obsolete_pages;
1238 * A list of kvm_mmu_page structs that, if zapped, could possibly be
1239 * replaced by an NX huge page. A shadow page is on this list if its
1240 * existence disallows an NX huge page (nx_huge_page_disallowed is set)
1241 * and there are no other conditions that prevent a huge page, e.g.
1242 * the backing host page is huge, dirtly logging is not enabled for its
1243 * memslot, etc... Note, zapping shadow pages on this list doesn't
1244 * guarantee an NX huge page will be created in its stead, e.g. if the
1245 * guest attempts to execute from the region then KVM obviously can't
1246 * create an NX huge page (without hanging the guest).
1248 struct list_head possible_nx_huge_pages;
1249 struct kvm_page_track_notifier_node mmu_sp_tracker;
1250 struct kvm_page_track_notifier_head track_notifier_head;
1252 * Protects marking pages unsync during page faults, as TDP MMU page
1253 * faults only take mmu_lock for read. For simplicity, the unsync
1254 * pages lock is always taken when marking pages unsync regardless of
1255 * whether mmu_lock is held for read or write.
1257 spinlock_t mmu_unsync_pages_lock;
1259 struct list_head assigned_dev_head;
1260 struct iommu_domain *iommu_domain;
1261 bool iommu_noncoherent;
1262 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
1263 atomic_t noncoherent_dma_count;
1264 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
1265 atomic_t assigned_device_count;
1266 struct kvm_pic *vpic;
1267 struct kvm_ioapic *vioapic;
1268 struct kvm_pit *vpit;
1269 atomic_t vapics_in_nmi_mode;
1270 struct mutex apic_map_lock;
1271 struct kvm_apic_map __rcu *apic_map;
1272 atomic_t apic_map_dirty;
1274 bool apic_access_memslot_enabled;
1275 bool apic_access_memslot_inhibited;
1277 /* Protects apicv_inhibit_reasons */
1278 struct rw_semaphore apicv_update_lock;
1279 unsigned long apicv_inhibit_reasons;
1283 bool mwait_in_guest;
1285 bool pause_in_guest;
1286 bool cstate_in_guest;
1288 unsigned long irq_sources_bitmap;
1289 s64 kvmclock_offset;
1292 * This also protects nr_vcpus_matched_tsc which is read from a
1293 * preemption-disabled region, so it must be a raw spinlock.
1295 raw_spinlock_t tsc_write_lock;
1299 u64 last_tsc_offset;
1303 u64 cur_tsc_generation;
1304 int nr_vcpus_matched_tsc;
1306 u32 default_tsc_khz;
1308 seqcount_raw_spinlock_t pvclock_sc;
1309 bool use_master_clock;
1310 u64 master_kernel_ns;
1311 u64 master_cycle_now;
1312 struct delayed_work kvmclock_update_work;
1313 struct delayed_work kvmclock_sync_work;
1315 struct kvm_xen_hvm_config xen_hvm_config;
1317 /* reads protected by irq_srcu, writes by irq_lock */
1318 struct hlist_head mask_notifier_list;
1320 struct kvm_hv hyperv;
1323 bool backwards_tsc_observed;
1324 bool boot_vcpu_runs_old_kvmclock;
1327 u64 disabled_quirks;
1329 enum kvm_irqchip_mode irqchip_mode;
1330 u8 nr_reserved_ioapic_pins;
1332 bool disabled_lapic_found;
1335 bool x2apic_broadcast_quirk_disabled;
1337 bool guest_can_read_msr_platform_info;
1338 bool exception_payload_enabled;
1340 bool triple_fault_event;
1342 bool bus_lock_detection_enabled;
1346 u32 notify_vmexit_flags;
1348 * If exit_on_emulation_error is set, and the in-kernel instruction
1349 * emulator fails to emulate an instruction, allow userspace
1350 * the opportunity to look at it.
1352 bool exit_on_emulation_error;
1354 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */
1355 u32 user_space_msr_mask;
1356 struct kvm_x86_msr_filter __rcu *msr_filter;
1358 u32 hypercall_exit_enabled;
1360 /* Guest can access the SGX PROVISIONKEY. */
1361 bool sgx_provisioning_allowed;
1363 struct kvm_x86_pmu_event_filter __rcu *pmu_event_filter;
1364 struct task_struct *nx_huge_page_recovery_thread;
1366 #ifdef CONFIG_X86_64
1367 /* The number of TDP MMU pages across all roots. */
1368 atomic64_t tdp_mmu_pages;
1371 * List of struct kvm_mmu_pages being used as roots.
1372 * All struct kvm_mmu_pages in the list should have
1375 * For reads, this list is protected by:
1376 * the MMU lock in read mode + RCU or
1377 * the MMU lock in write mode
1379 * For writes, this list is protected by:
1380 * the MMU lock in read mode + the tdp_mmu_pages_lock or
1381 * the MMU lock in write mode
1383 * Roots will remain in the list until their tdp_mmu_root_count
1384 * drops to zero, at which point the thread that decremented the
1385 * count to zero should removed the root from the list and clean
1386 * it up, freeing the root after an RCU grace period.
1388 struct list_head tdp_mmu_roots;
1391 * Protects accesses to the following fields when the MMU lock
1392 * is held in read mode:
1393 * - tdp_mmu_roots (above)
1394 * - the link field of kvm_mmu_page structs used by the TDP MMU
1395 * - possible_nx_huge_pages;
1396 * - the possible_nx_huge_page_link field of kvm_mmu_page structs used
1398 * It is acceptable, but not necessary, to acquire this lock when
1399 * the thread holds the MMU lock in write mode.
1401 spinlock_t tdp_mmu_pages_lock;
1402 struct workqueue_struct *tdp_mmu_zap_wq;
1403 #endif /* CONFIG_X86_64 */
1406 * If set, at least one shadow root has been allocated. This flag
1407 * is used as one input when determining whether certain memslot
1408 * related allocations are necessary.
1410 bool shadow_root_allocated;
1412 #if IS_ENABLED(CONFIG_HYPERV)
1414 spinlock_t hv_root_tdp_lock;
1417 * VM-scope maximum vCPU ID. Used to determine the size of structures
1418 * that increase along with the maximum vCPU ID, in which case, using
1419 * the global KVM_MAX_VCPU_IDS may lead to significant memory waste.
1423 bool disable_nx_huge_pages;
1426 * Memory caches used to allocate shadow pages when performing eager
1427 * page splitting. No need for a shadowed_info_cache since eager page
1428 * splitting only allocates direct shadow pages.
1430 * Protected by kvm->slots_lock.
1432 struct kvm_mmu_memory_cache split_shadow_page_cache;
1433 struct kvm_mmu_memory_cache split_page_header_cache;
1436 * Memory cache used to allocate pte_list_desc structs while splitting
1437 * huge pages. In the worst case, to split one huge page, 512
1438 * pte_list_desc structs are needed to add each lower level leaf sptep
1439 * to the rmap plus 1 to extend the parent_ptes rmap of the lower level
1442 * Protected by kvm->slots_lock.
1444 #define SPLIT_DESC_CACHE_MIN_NR_OBJECTS (SPTE_ENT_PER_PAGE + 1)
1445 struct kvm_mmu_memory_cache split_desc_cache;
1448 struct kvm_vm_stat {
1449 struct kvm_vm_stat_generic generic;
1450 u64 mmu_shadow_zapped;
1459 atomic64_t pages_4k;
1460 atomic64_t pages_2m;
1461 atomic64_t pages_1g;
1463 atomic64_t pages[KVM_NR_PAGE_SIZES];
1465 u64 nx_lpage_splits;
1466 u64 max_mmu_page_hash_collisions;
1467 u64 max_mmu_rmap_size;
1470 struct kvm_vcpu_stat {
1471 struct kvm_vcpu_stat_generic generic;
1477 u64 pf_mmio_spte_created;
1486 u64 irq_window_exits;
1487 u64 nmi_window_exits;
1490 u64 request_irq_exits;
1492 u64 host_state_reload;
1495 u64 insn_emulation_fail;
1501 u64 directed_yield_attempted;
1502 u64 directed_yield_successful;
1503 u64 preemption_reported;
1504 u64 preemption_other;
1506 u64 notify_window_exits;
1509 struct x86_instruction_info;
1512 bool host_initiated;
1517 struct kvm_lapic_irq {
1525 bool msi_redir_hint;
1528 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1530 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1533 struct kvm_x86_ops {
1536 int (*check_processor_compatibility)(void);
1538 int (*hardware_enable)(void);
1539 void (*hardware_disable)(void);
1540 void (*hardware_unsetup)(void);
1541 bool (*has_emulated_msr)(struct kvm *kvm, u32 index);
1542 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu);
1544 unsigned int vm_size;
1545 int (*vm_init)(struct kvm *kvm);
1546 void (*vm_destroy)(struct kvm *kvm);
1548 /* Create, but do not attach this VCPU */
1549 int (*vcpu_precreate)(struct kvm *kvm);
1550 int (*vcpu_create)(struct kvm_vcpu *vcpu);
1551 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1552 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1554 void (*prepare_switch_to_guest)(struct kvm_vcpu *vcpu);
1555 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1556 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1558 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu);
1559 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1560 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1561 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1562 void (*get_segment)(struct kvm_vcpu *vcpu,
1563 struct kvm_segment *var, int seg);
1564 int (*get_cpl)(struct kvm_vcpu *vcpu);
1565 void (*set_segment)(struct kvm_vcpu *vcpu,
1566 struct kvm_segment *var, int seg);
1567 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1568 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1569 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1570 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0);
1571 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1572 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1573 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1574 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1575 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1576 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1577 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1578 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1579 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1580 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1581 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1582 bool (*get_if_flag)(struct kvm_vcpu *vcpu);
1584 void (*flush_tlb_all)(struct kvm_vcpu *vcpu);
1585 void (*flush_tlb_current)(struct kvm_vcpu *vcpu);
1586 int (*flush_remote_tlbs)(struct kvm *kvm);
1587 int (*flush_remote_tlbs_range)(struct kvm *kvm, gfn_t gfn,
1591 * Flush any TLB entries associated with the given GVA.
1592 * Does not need to flush GPA->HPA mappings.
1593 * Can potentially get non-canonical addresses through INVLPGs, which
1594 * the implementation may choose to ignore if appropriate.
1596 void (*flush_tlb_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1599 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1600 * does not need to flush GPA->HPA mappings.
1602 void (*flush_tlb_guest)(struct kvm_vcpu *vcpu);
1604 int (*vcpu_pre_run)(struct kvm_vcpu *vcpu);
1605 enum exit_fastpath_completion (*vcpu_run)(struct kvm_vcpu *vcpu);
1606 int (*handle_exit)(struct kvm_vcpu *vcpu,
1607 enum exit_fastpath_completion exit_fastpath);
1608 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1609 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1610 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1611 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1612 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1613 unsigned char *hypercall_addr);
1614 void (*inject_irq)(struct kvm_vcpu *vcpu, bool reinjected);
1615 void (*inject_nmi)(struct kvm_vcpu *vcpu);
1616 void (*inject_exception)(struct kvm_vcpu *vcpu);
1617 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1618 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1619 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1620 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1621 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1622 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1623 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1624 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1625 bool (*check_apicv_inhibit_reasons)(enum kvm_apicv_inhibit reason);
1626 const unsigned long required_apicv_inhibits;
1627 bool allow_apicv_in_x2apic_without_x2apic_virtualization;
1628 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1629 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1630 void (*hwapic_isr_update)(int isr);
1631 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1632 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1633 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1634 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1635 void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode,
1636 int trig_mode, int vector);
1637 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1638 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1639 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1640 u8 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1642 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa,
1645 bool (*has_wbinvd_exit)(void);
1647 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu);
1648 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu);
1649 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1650 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier);
1653 * Retrieve somewhat arbitrary exit information. Intended to
1654 * be used only from within tracepoints or error paths.
1656 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason,
1657 u64 *info1, u64 *info2,
1658 u32 *exit_int_info, u32 *exit_int_info_err_code);
1660 int (*check_intercept)(struct kvm_vcpu *vcpu,
1661 struct x86_instruction_info *info,
1662 enum x86_intercept_stage stage,
1663 struct x86_exception *exception);
1664 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1666 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1668 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1671 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero
1672 * value indicates CPU dirty logging is unsupported or disabled.
1674 int cpu_dirty_log_size;
1675 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu);
1677 const struct kvm_x86_nested_ops *nested_ops;
1679 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1680 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1682 int (*pi_update_irte)(struct kvm *kvm, unsigned int host_irq,
1683 uint32_t guest_irq, bool set);
1684 void (*pi_start_assignment)(struct kvm *kvm);
1685 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1686 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1688 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1690 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1692 void (*setup_mce)(struct kvm_vcpu *vcpu);
1694 #ifdef CONFIG_KVM_SMM
1695 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1696 int (*enter_smm)(struct kvm_vcpu *vcpu, union kvm_smram *smram);
1697 int (*leave_smm)(struct kvm_vcpu *vcpu, const union kvm_smram *smram);
1698 void (*enable_smi_window)(struct kvm_vcpu *vcpu);
1701 int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp);
1702 int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1703 int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1704 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1705 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1706 void (*guest_memory_reclaimed)(struct kvm *kvm);
1708 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1710 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type,
1711 void *insn, int insn_len);
1713 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1714 int (*enable_l2_tlb_flush)(struct kvm_vcpu *vcpu);
1716 void (*migrate_timers)(struct kvm_vcpu *vcpu);
1717 void (*msr_filter_changed)(struct kvm_vcpu *vcpu);
1718 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
1720 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
1723 * Returns vCPU specific APICv inhibit reasons
1725 unsigned long (*vcpu_get_apicv_inhibit_reasons)(struct kvm_vcpu *vcpu);
1728 struct kvm_x86_nested_ops {
1729 void (*leave_nested)(struct kvm_vcpu *vcpu);
1730 bool (*is_exception_vmexit)(struct kvm_vcpu *vcpu, u8 vector,
1732 int (*check_events)(struct kvm_vcpu *vcpu);
1733 bool (*has_events)(struct kvm_vcpu *vcpu);
1734 void (*triple_fault)(struct kvm_vcpu *vcpu);
1735 int (*get_state)(struct kvm_vcpu *vcpu,
1736 struct kvm_nested_state __user *user_kvm_nested_state,
1737 unsigned user_data_size);
1738 int (*set_state)(struct kvm_vcpu *vcpu,
1739 struct kvm_nested_state __user *user_kvm_nested_state,
1740 struct kvm_nested_state *kvm_state);
1741 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu);
1742 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1744 int (*enable_evmcs)(struct kvm_vcpu *vcpu,
1745 uint16_t *vmcs_version);
1746 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu);
1747 void (*hv_inject_synthetic_vmexit_post_tlb_flush)(struct kvm_vcpu *vcpu);
1750 struct kvm_x86_init_ops {
1751 int (*hardware_setup)(void);
1752 unsigned int (*handle_intel_pt_intr)(void);
1754 struct kvm_x86_ops *runtime_ops;
1755 struct kvm_pmu_ops *pmu_ops;
1758 struct kvm_arch_async_pf {
1765 extern u32 __read_mostly kvm_nr_uret_msrs;
1766 extern u64 __read_mostly host_efer;
1767 extern bool __read_mostly allow_smaller_maxphyaddr;
1768 extern bool __read_mostly enable_apicv;
1769 extern struct kvm_x86_ops kvm_x86_ops;
1771 #define KVM_X86_OP(func) \
1772 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func));
1773 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
1774 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
1775 #include <asm/kvm-x86-ops.h>
1777 int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops);
1778 void kvm_x86_vendor_exit(void);
1780 #define __KVM_HAVE_ARCH_VM_ALLOC
1781 static inline struct kvm *kvm_arch_alloc_vm(void)
1783 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO);
1786 #define __KVM_HAVE_ARCH_VM_FREE
1787 void kvm_arch_free_vm(struct kvm *kvm);
1789 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
1790 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1792 if (kvm_x86_ops.flush_remote_tlbs &&
1793 !static_call(kvm_x86_flush_remote_tlbs)(kvm))
1799 #define kvm_arch_pmi_in_guest(vcpu) \
1800 ((vcpu) && (vcpu)->arch.handling_intr_from_guest)
1802 void __init kvm_mmu_x86_module_init(void);
1803 int kvm_mmu_vendor_module_init(void);
1804 void kvm_mmu_vendor_module_exit(void);
1806 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1807 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1808 int kvm_mmu_init_vm(struct kvm *kvm);
1809 void kvm_mmu_uninit_vm(struct kvm *kvm);
1811 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu);
1812 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1813 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1814 const struct kvm_memory_slot *memslot,
1816 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
1817 const struct kvm_memory_slot *memslot,
1819 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
1820 const struct kvm_memory_slot *memslot,
1823 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1824 const struct kvm_memory_slot *memslot);
1825 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1826 const struct kvm_memory_slot *memslot);
1827 void kvm_mmu_zap_all(struct kvm *kvm);
1828 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1829 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1831 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
1833 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1834 const void *val, int bytes);
1836 struct kvm_irq_mask_notifier {
1837 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1839 struct hlist_node link;
1842 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1843 struct kvm_irq_mask_notifier *kimn);
1844 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1845 struct kvm_irq_mask_notifier *kimn);
1846 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1849 extern bool tdp_enabled;
1851 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1854 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1855 * userspace I/O) to indicate that the emulation context
1856 * should be reused as is, i.e. skip initialization of
1857 * emulation context, instruction fetch and decode.
1859 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1860 * Indicates that only select instructions (tagged with
1861 * EmulateOnUD) should be emulated (to minimize the emulator
1862 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1864 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1865 * decode the instruction length. For use *only* by
1866 * kvm_x86_ops.skip_emulated_instruction() implementations if
1867 * EMULTYPE_COMPLETE_USER_EXIT is not set.
1869 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1870 * retry native execution under certain conditions,
1871 * Can only be set in conjunction with EMULTYPE_PF.
1873 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1874 * triggered by KVM's magic "force emulation" prefix,
1875 * which is opt in via module param (off by default).
1876 * Bypasses EmulateOnUD restriction despite emulating
1877 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1878 * Used to test the full emulator from userspace.
1880 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1881 * backdoor emulation, which is opt in via module param.
1882 * VMware backdoor emulation handles select instructions
1883 * and reinjects the #GP for all other cases.
1885 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1886 * case the CR2/GPA value pass on the stack is valid.
1888 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility
1889 * state and inject single-step #DBs after skipping
1890 * an instruction (after completing userspace I/O).
1892 * EMULTYPE_WRITE_PF_TO_SP - Set when emulating an intercepted page fault that
1893 * is attempting to write a gfn that contains one or
1894 * more of the PTEs used to translate the write itself,
1895 * and the owning page table is being shadowed by KVM.
1896 * If emulation of the faulting instruction fails and
1897 * this flag is set, KVM will exit to userspace instead
1898 * of retrying emulation as KVM cannot make forward
1901 * If emulation fails for a write to guest page tables,
1902 * KVM unprotects (zaps) the shadow page for the target
1903 * gfn and resumes the guest to retry the non-emulatable
1904 * instruction (on hardware). Unprotecting the gfn
1905 * doesn't allow forward progress for a self-changing
1906 * access because doing so also zaps the translation for
1907 * the gfn, i.e. retrying the instruction will hit a
1908 * !PRESENT fault, which results in a new shadow page
1909 * and sends KVM back to square one.
1911 #define EMULTYPE_NO_DECODE (1 << 0)
1912 #define EMULTYPE_TRAP_UD (1 << 1)
1913 #define EMULTYPE_SKIP (1 << 2)
1914 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
1915 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1916 #define EMULTYPE_VMWARE_GP (1 << 5)
1917 #define EMULTYPE_PF (1 << 6)
1918 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7)
1919 #define EMULTYPE_WRITE_PF_TO_SP (1 << 8)
1921 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1922 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1923 void *insn, int insn_len);
1924 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu,
1925 u64 *data, u8 ndata);
1926 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu);
1928 void kvm_enable_efer_bits(u64);
1929 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1930 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
1931 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1932 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1933 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1934 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1935 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu);
1936 int kvm_emulate_invd(struct kvm_vcpu *vcpu);
1937 int kvm_emulate_mwait(struct kvm_vcpu *vcpu);
1938 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu);
1939 int kvm_emulate_monitor(struct kvm_vcpu *vcpu);
1941 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1942 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1943 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1944 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu);
1945 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu);
1946 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1948 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1949 void kvm_set_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1950 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1951 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1953 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1954 int reason, bool has_error_code, u32 error_code);
1956 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
1957 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4);
1958 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1959 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1960 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1961 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1962 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1963 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1964 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1965 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1966 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu);
1968 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1969 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1971 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1972 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1973 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu);
1975 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1976 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1977 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload);
1978 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1979 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1980 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1981 void kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
1982 struct x86_exception *fault);
1983 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1984 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1986 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1987 int irq_source_id, int level)
1989 /* Logical OR for level trig interrupt */
1991 __set_bit(irq_source_id, irq_state);
1993 __clear_bit(irq_source_id, irq_state);
1995 return !!(*irq_state);
1998 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1999 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
2001 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
2003 void kvm_update_dr7(struct kvm_vcpu *vcpu);
2005 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
2006 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
2007 ulong roots_to_free);
2008 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu);
2009 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
2010 struct x86_exception *exception);
2011 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
2012 struct x86_exception *exception);
2013 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
2014 struct x86_exception *exception);
2016 bool kvm_apicv_activated(struct kvm *kvm);
2017 bool kvm_vcpu_apicv_activated(struct kvm_vcpu *vcpu);
2018 void __kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
2019 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
2020 enum kvm_apicv_inhibit reason, bool set);
2021 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
2022 enum kvm_apicv_inhibit reason, bool set);
2024 static inline void kvm_set_apicv_inhibit(struct kvm *kvm,
2025 enum kvm_apicv_inhibit reason)
2027 kvm_set_or_clear_apicv_inhibit(kvm, reason, true);
2030 static inline void kvm_clear_apicv_inhibit(struct kvm *kvm,
2031 enum kvm_apicv_inhibit reason)
2033 kvm_set_or_clear_apicv_inhibit(kvm, reason, false);
2036 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
2038 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
2039 void *insn, int insn_len);
2040 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
2041 void kvm_mmu_invalidate_addr(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
2042 u64 addr, unsigned long roots);
2043 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
2044 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd);
2046 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
2047 int tdp_max_root_level, int tdp_huge_page_level);
2049 static inline u16 kvm_read_ldt(void)
2052 asm("sldt %0" : "=g"(ldt));
2056 static inline void kvm_load_ldt(u16 sel)
2058 asm("lldt %0" : : "rm"(sel));
2061 #ifdef CONFIG_X86_64
2062 static inline unsigned long read_msr(unsigned long msr)
2071 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
2073 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
2076 #define TSS_IOPB_BASE_OFFSET 0x66
2077 #define TSS_BASE_SIZE 0x68
2078 #define TSS_IOPB_SIZE (65536 / 8)
2079 #define TSS_REDIRECTION_SIZE (256 / 8)
2080 #define RMODE_TSS_SIZE \
2081 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
2084 TASK_SWITCH_CALL = 0,
2085 TASK_SWITCH_IRET = 1,
2086 TASK_SWITCH_JMP = 2,
2087 TASK_SWITCH_GATE = 3,
2090 #define HF_GUEST_MASK (1 << 0) /* VCPU is in guest-mode */
2092 #ifdef CONFIG_KVM_SMM
2093 #define HF_SMM_MASK (1 << 1)
2094 #define HF_SMM_INSIDE_NMI_MASK (1 << 2)
2096 # define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
2097 # define KVM_ADDRESS_SPACE_NUM 2
2098 # define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
2099 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
2101 # define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, 0)
2104 #define KVM_ARCH_WANT_MMU_NOTIFIER
2106 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
2107 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
2108 int kvm_cpu_has_extint(struct kvm_vcpu *v);
2109 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
2110 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
2111 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
2113 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
2114 unsigned long ipi_bitmap_high, u32 min,
2115 unsigned long icr, int op_64_bit);
2117 int kvm_add_user_return_msr(u32 msr);
2118 int kvm_find_user_return_msr(u32 msr);
2119 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask);
2121 static inline bool kvm_is_supported_user_return_msr(u32 msr)
2123 return kvm_find_user_return_msr(msr) >= 0;
2126 u64 kvm_scale_tsc(u64 tsc, u64 ratio);
2127 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
2128 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier);
2129 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier);
2131 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
2132 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
2134 void kvm_make_scan_ioapic_request(struct kvm *kvm);
2135 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
2136 unsigned long *vcpu_bitmap);
2138 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
2139 struct kvm_async_pf *work);
2140 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
2141 struct kvm_async_pf *work);
2142 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
2143 struct kvm_async_pf *work);
2144 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu);
2145 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu);
2146 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
2148 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
2149 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
2150 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
2152 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
2154 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
2155 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
2157 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
2158 struct kvm_vcpu **dest_vcpu);
2160 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
2161 struct kvm_lapic_irq *irq);
2163 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
2165 /* We can only post Fixed and LowPrio IRQs */
2166 return (irq->delivery_mode == APIC_DM_FIXED ||
2167 irq->delivery_mode == APIC_DM_LOWEST);
2170 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
2172 static_call_cond(kvm_x86_vcpu_blocking)(vcpu);
2175 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
2177 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu);
2180 static inline int kvm_cpu_get_apicid(int mps_cpu)
2182 #ifdef CONFIG_X86_LOCAL_APIC
2183 return default_cpu_present_to_apicid(mps_cpu);
2190 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages);
2192 #define KVM_CLOCK_VALID_FLAGS \
2193 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC)
2195 #define KVM_X86_VALID_QUIRKS \
2196 (KVM_X86_QUIRK_LINT0_REENABLED | \
2197 KVM_X86_QUIRK_CD_NW_CLEARED | \
2198 KVM_X86_QUIRK_LAPIC_MMIO_HOLE | \
2199 KVM_X86_QUIRK_OUT_7E_INC_RIP | \
2200 KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT | \
2201 KVM_X86_QUIRK_FIX_HYPERCALL_INSN | \
2202 KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS)
2205 * KVM previously used a u32 field in kvm_run to indicate the hypercall was
2206 * initiated from long mode. KVM now sets bit 0 to indicate long mode, but the
2207 * remaining 31 lower bits must be 0 to preserve ABI.
2209 #define KVM_EXIT_HYPERCALL_MBZ GENMASK_ULL(31, 1)
2211 #endif /* _ASM_X86_KVM_HOST_H */