1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This header defines architecture specific interfaces, x86 version
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
11 #include <linux/types.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
19 #include <linux/kvm.h>
20 #include <linux/kvm_para.h>
21 #include <linux/kvm_types.h>
22 #include <linux/perf_event.h>
23 #include <linux/pvclock_gtod.h>
24 #include <linux/clocksource.h>
25 #include <linux/irqbypass.h>
26 #include <linux/hyperv.h>
29 #include <asm/pvclock-abi.h>
32 #include <asm/msr-index.h>
34 #include <asm/kvm_page_track.h>
35 #include <asm/kvm_vcpu_regs.h>
36 #include <asm/hyperv-tlfs.h>
38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
40 #define KVM_MAX_VCPUS 288
41 #define KVM_SOFT_MAX_VCPUS 240
42 #define KVM_MAX_VCPU_ID 1023
43 #define KVM_USER_MEM_SLOTS 509
44 /* memory slots that are not exposed to userspace */
45 #define KVM_PRIVATE_MEM_SLOTS 3
46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
48 #define KVM_HALT_POLL_NS_DEFAULT 200000
50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
52 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
53 KVM_DIRTY_LOG_INITIALLY_SET)
55 /* x86-specific vcpu->requests bit members */
56 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
57 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
58 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
59 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
60 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
61 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
62 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
63 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
64 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
65 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
66 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
67 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
68 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
69 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
70 #define KVM_REQ_MCLOCK_INPROGRESS \
71 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
72 #define KVM_REQ_SCAN_IOAPIC \
73 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
74 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
75 #define KVM_REQ_APIC_PAGE_RELOAD \
76 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
77 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
78 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
79 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
80 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
81 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
82 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
83 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24)
84 #define KVM_REQ_APICV_UPDATE \
85 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
86 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
87 #define KVM_REQ_HV_TLB_FLUSH \
88 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_NO_WAKEUP)
90 #define CR0_RESERVED_BITS \
91 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
92 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
93 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
95 #define CR4_RESERVED_BITS \
96 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
97 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
98 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
99 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
100 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
101 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
103 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
107 #define INVALID_PAGE (~(hpa_t)0)
108 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
110 #define UNMAPPED_GVA (~(gpa_t)0)
112 /* KVM Hugepage definitions for x86 */
114 PT_PAGE_TABLE_LEVEL = 1,
115 PT_DIRECTORY_LEVEL = 2,
117 /* set max level to the biggest one */
118 PT_MAX_HUGEPAGE_LEVEL = PT_PDPE_LEVEL,
120 #define KVM_NR_PAGE_SIZES (PT_MAX_HUGEPAGE_LEVEL - \
121 PT_PAGE_TABLE_LEVEL + 1)
122 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
123 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
124 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
125 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
126 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
128 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
130 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
131 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
132 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
135 #define KVM_PERMILLE_MMU_PAGES 20
136 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
137 #define KVM_MMU_HASH_SHIFT 12
138 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
139 #define KVM_MIN_FREE_MMU_PAGES 5
140 #define KVM_REFILL_PAGES 25
141 #define KVM_MAX_CPUID_ENTRIES 80
142 #define KVM_NR_FIXED_MTRR_REGION 88
143 #define KVM_NR_VAR_MTRR 8
145 #define ASYNC_PF_PER_VCPU 64
148 VCPU_REGS_RAX = __VCPU_REGS_RAX,
149 VCPU_REGS_RCX = __VCPU_REGS_RCX,
150 VCPU_REGS_RDX = __VCPU_REGS_RDX,
151 VCPU_REGS_RBX = __VCPU_REGS_RBX,
152 VCPU_REGS_RSP = __VCPU_REGS_RSP,
153 VCPU_REGS_RBP = __VCPU_REGS_RBP,
154 VCPU_REGS_RSI = __VCPU_REGS_RSI,
155 VCPU_REGS_RDI = __VCPU_REGS_RDI,
157 VCPU_REGS_R8 = __VCPU_REGS_R8,
158 VCPU_REGS_R9 = __VCPU_REGS_R9,
159 VCPU_REGS_R10 = __VCPU_REGS_R10,
160 VCPU_REGS_R11 = __VCPU_REGS_R11,
161 VCPU_REGS_R12 = __VCPU_REGS_R12,
162 VCPU_REGS_R13 = __VCPU_REGS_R13,
163 VCPU_REGS_R14 = __VCPU_REGS_R14,
164 VCPU_REGS_R15 = __VCPU_REGS_R15,
169 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
173 VCPU_EXREG_EXIT_INFO_1,
174 VCPU_EXREG_EXIT_INFO_2,
188 enum exit_fastpath_completion {
190 EXIT_FASTPATH_SKIP_EMUL_INS,
193 struct x86_emulate_ctxt;
194 struct x86_exception;
196 enum x86_intercept_stage;
198 #define KVM_NR_MEM_OBJS 40
200 #define KVM_NR_DB_REGS 4
202 #define DR6_BD (1 << 13)
203 #define DR6_BS (1 << 14)
204 #define DR6_BT (1 << 15)
205 #define DR6_RTM (1 << 16)
206 #define DR6_FIXED_1 0xfffe0ff0
207 #define DR6_INIT 0xffff0ff0
208 #define DR6_VOLATILE 0x0001e00f
210 #define DR7_BP_EN_MASK 0x000000ff
211 #define DR7_GE (1 << 9)
212 #define DR7_GD (1 << 13)
213 #define DR7_FIXED_1 0x00000400
214 #define DR7_VOLATILE 0xffff2bff
216 #define PFERR_PRESENT_BIT 0
217 #define PFERR_WRITE_BIT 1
218 #define PFERR_USER_BIT 2
219 #define PFERR_RSVD_BIT 3
220 #define PFERR_FETCH_BIT 4
221 #define PFERR_PK_BIT 5
222 #define PFERR_GUEST_FINAL_BIT 32
223 #define PFERR_GUEST_PAGE_BIT 33
225 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
226 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
227 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
228 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
229 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
230 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
231 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
232 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
234 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
238 /* apic attention bits */
239 #define KVM_APIC_CHECK_VAPIC 0
241 * The following bit is set with PV-EOI, unset on EOI.
242 * We detect PV-EOI changes by guest by comparing
243 * this bit with PV-EOI in guest memory.
244 * See the implementation in apic_update_pv_eoi.
246 #define KVM_APIC_PV_EOI_PENDING 1
248 struct kvm_kernel_irq_routing_entry;
251 * We don't want allocation failures within the mmu code, so we preallocate
252 * enough memory for a single page fault in a cache.
254 struct kvm_mmu_memory_cache {
256 void *objects[KVM_NR_MEM_OBJS];
260 * the pages used as guest page table on soft mmu are tracked by
261 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used
262 * by indirect shadow page can not be more than 15 bits.
264 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access,
265 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp.
267 union kvm_mmu_page_role {
271 unsigned gpte_is_8_bytes:1;
278 unsigned smep_andnot_wp:1;
279 unsigned smap_andnot_wp:1;
280 unsigned ad_disabled:1;
281 unsigned guest_mode:1;
285 * This is left at the top of the word so that
286 * kvm_memslots_for_spte_role can extract it with a
287 * simple shift. While there is room, give it a whole
288 * byte so it is also faster to load it from memory.
294 union kvm_mmu_extended_role {
296 * This structure complements kvm_mmu_page_role caching everything needed for
297 * MMU configuration. If nothing in both these structures changed, MMU
298 * re-configuration can be skipped. @valid bit is set on first usage so we don't
299 * treat all-zero structure as valid data.
303 unsigned int valid:1;
304 unsigned int execonly:1;
305 unsigned int cr0_pg:1;
306 unsigned int cr4_pae:1;
307 unsigned int cr4_pse:1;
308 unsigned int cr4_pke:1;
309 unsigned int cr4_smap:1;
310 unsigned int cr4_smep:1;
311 unsigned int maxphyaddr:6;
318 union kvm_mmu_page_role base;
319 union kvm_mmu_extended_role ext;
323 struct kvm_rmap_head {
327 struct kvm_mmu_page {
328 struct list_head link;
329 struct hlist_node hash_link;
330 struct list_head lpage_disallowed_link;
335 bool lpage_disallowed; /* Can't be replaced by an equiv large page */
338 * The following two entries are used to key the shadow page in the
341 union kvm_mmu_page_role role;
345 /* hold the gfn of each spte inside spt */
347 int root_count; /* Currently serving as active root */
348 unsigned int unsync_children;
349 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
350 DECLARE_BITMAP(unsync_child_bitmap, 512);
354 * Used out of the mmu-lock to avoid reading spte values while an
355 * update is in progress; see the comments in __get_spte_lockless().
357 int clear_spte_count;
360 /* Number of writes since the last time traversal visited this page. */
361 atomic_t write_flooding_count;
364 struct kvm_pio_request {
365 unsigned long linear_rip;
372 #define PT64_ROOT_MAX_LEVEL 5
374 struct rsvd_bits_validate {
375 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
379 struct kvm_mmu_root_info {
384 #define KVM_MMU_ROOT_INFO_INVALID \
385 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
387 #define KVM_MMU_NUM_PREV_ROOTS 3
390 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
391 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
395 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
396 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
397 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err,
399 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
400 struct x86_exception *fault);
401 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa,
402 u32 access, struct x86_exception *exception);
403 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
404 struct x86_exception *exception);
405 int (*sync_page)(struct kvm_vcpu *vcpu,
406 struct kvm_mmu_page *sp);
407 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
408 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
409 u64 *spte, const void *pte);
412 union kvm_mmu_role mmu_role;
414 u8 shadow_root_level;
417 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
420 * Bitmap; bit set = permission fault
421 * Byte index: page fault error code [4:1]
422 * Bit index: pte permissions in ACC_* format
427 * The pkru_mask indicates if protection key checks are needed. It
428 * consists of 16 domains indexed by page fault error code bits [4:1],
429 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
430 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
438 * check zero bits on shadow page table entries, these
439 * bits include not only hardware reserved bits but also
440 * the bits spte never used.
442 struct rsvd_bits_validate shadow_zero_check;
444 struct rsvd_bits_validate guest_rsvd_check;
446 /* Can have large pages at levels 2..last_nonleaf_level-1. */
447 u8 last_nonleaf_level;
451 u64 pdptrs[4]; /* pae */
454 struct kvm_tlb_range {
469 struct perf_event *perf_event;
470 struct kvm_vcpu *vcpu;
472 * eventsel value for general purpose counters,
473 * ctrl value for fixed counters.
479 unsigned nr_arch_gp_counters;
480 unsigned nr_arch_fixed_counters;
481 unsigned available_event_types;
486 u64 counter_bitmask[2];
487 u64 global_ctrl_mask;
488 u64 global_ovf_ctrl_mask;
491 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
492 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
493 struct irq_work irq_work;
494 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
495 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
496 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
499 * The gate to release perf_events not marked in
500 * pmc_in_use only once in a vcpu time slice.
505 * The total number of programmed perf_events and it helps to avoid
506 * redundant check before cleanup if guest don't use vPMU at all.
514 KVM_DEBUGREG_BP_ENABLED = 1,
515 KVM_DEBUGREG_WONT_EXIT = 2,
516 KVM_DEBUGREG_RELOAD = 4,
519 struct kvm_mtrr_range {
522 struct list_head node;
526 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
527 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
530 struct list_head head;
533 /* Hyper-V SynIC timer */
534 struct kvm_vcpu_hv_stimer {
535 struct hrtimer timer;
537 union hv_stimer_config config;
540 struct hv_message msg;
544 /* Hyper-V synthetic interrupt controller (SynIC)*/
545 struct kvm_vcpu_hv_synic {
550 atomic64_t sint[HV_SYNIC_SINT_COUNT];
551 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
552 DECLARE_BITMAP(auto_eoi_bitmap, 256);
553 DECLARE_BITMAP(vec_bitmap, 256);
555 bool dont_zero_synic_pages;
558 /* Hyper-V per vcpu emulation context */
563 struct kvm_vcpu_hv_synic synic;
564 struct kvm_hyperv_exit exit;
565 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
566 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
570 struct kvm_vcpu_arch {
572 * rip and regs accesses must go through
573 * kvm_{register,rip}_{read,write} functions.
575 unsigned long regs[NR_VCPU_REGS];
580 unsigned long cr0_guest_owned_bits;
584 unsigned long cr4_guest_owned_bits;
591 struct kvm_lapic *apic; /* kernel irqchip context */
593 bool load_eoi_exitmap_pending;
594 DECLARE_BITMAP(ioapic_handled_vectors, 256);
595 unsigned long apic_attention;
596 int32_t apic_arb_prio;
598 u64 ia32_misc_enable_msr;
601 bool tpr_access_reporting;
604 u64 microcode_version;
605 u64 arch_capabilities;
608 * Paging state of the vcpu
610 * If the vcpu runs in guest mode with two level paging this still saves
611 * the paging mode of the l1 guest. This context is always used to
616 /* Non-nested MMU for L1 */
617 struct kvm_mmu root_mmu;
619 /* L1 MMU when running nested */
620 struct kvm_mmu guest_mmu;
623 * Paging state of an L2 guest (used for nested npt)
625 * This context will save all necessary information to walk page tables
626 * of an L2 guest. This context is only initialized for page table
627 * walking and not for faulting since we never handle l2 page faults on
630 struct kvm_mmu nested_mmu;
633 * Pointer to the mmu context currently used for
634 * gva_to_gpa translations.
636 struct kvm_mmu *walk_mmu;
638 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
639 struct kvm_mmu_memory_cache mmu_page_cache;
640 struct kvm_mmu_memory_cache mmu_page_header_cache;
643 * QEMU userspace and the guest each have their own FPU state.
644 * In vcpu_run, we switch between the user and guest FPU contexts.
645 * While running a VCPU, the VCPU thread will have the guest FPU
648 * Note that while the PKRU state lives inside the fpu registers,
649 * it is switched out separately at VMENTER and VMEXIT time. The
650 * "guest_fpu" state here contains the guest FPU context, with the
653 struct fpu *user_fpu;
654 struct fpu *guest_fpu;
657 u64 guest_supported_xcr0;
658 u32 guest_xstate_size;
660 struct kvm_pio_request pio;
663 u8 event_exit_inst_len;
665 struct kvm_queued_exception {
671 unsigned long payload;
676 struct kvm_queued_interrupt {
682 int halt_request; /* real mode on Intel only */
685 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
689 /* emulate context */
691 struct x86_emulate_ctxt *emulate_ctxt;
692 bool emulate_regs_need_sync_to_vcpu;
693 bool emulate_regs_need_sync_from_vcpu;
694 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
697 struct pvclock_vcpu_time_info hv_clock;
698 unsigned int hw_tsc_khz;
699 struct gfn_to_hva_cache pv_time;
700 bool pv_time_enabled;
701 /* set guest stopped flag in pvclock flags field */
702 bool pvclock_set_guest_stopped_request;
708 struct gfn_to_pfn_cache cache;
714 u64 tsc_offset_adjustment;
717 u64 this_tsc_generation;
719 bool tsc_always_catchup;
720 s8 virtual_tsc_shift;
721 u32 virtual_tsc_mult;
723 s64 ia32_tsc_adjust_msr;
724 u64 msr_ia32_power_ctl;
725 u64 tsc_scaling_ratio;
727 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
728 unsigned nmi_pending; /* NMI queued after currently running handler */
729 bool nmi_injected; /* Trying to inject an NMI this entry */
730 bool smi_pending; /* SMI queued after currently running handler */
732 struct kvm_mtrr mtrr_state;
735 unsigned switch_db_regs;
736 unsigned long db[KVM_NR_DB_REGS];
739 unsigned long eff_db[KVM_NR_DB_REGS];
740 unsigned long guest_debug_dr7;
741 u64 msr_platform_info;
742 u64 msr_misc_features_enables;
750 /* Cache MMIO info */
752 unsigned mmio_access;
758 /* used for guest single stepping over the given code position */
759 unsigned long singlestep_rip;
761 struct kvm_vcpu_hv hyperv;
763 cpumask_var_t wbinvd_dirty_mask;
765 unsigned long last_retry_eip;
766 unsigned long last_retry_addr;
770 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
771 struct gfn_to_hva_cache data;
776 unsigned long nested_apf_token;
777 bool delivery_as_pf_vmexit;
780 /* OSVW MSRs (AMD only) */
788 struct gfn_to_hva_cache data;
791 u64 msr_kvm_poll_control;
794 * Indicates the guest is trying to write a gfn that contains one or
795 * more of the PTEs used to translate the write itself, i.e. the access
796 * is changing its own translation in the guest page tables. KVM exits
797 * to userspace if emulation of the faulting instruction fails and this
798 * flag is set, as KVM cannot make forward progress.
800 * If emulation fails for a write to guest page tables, KVM unprotects
801 * (zaps) the shadow page for the target gfn and resumes the guest to
802 * retry the non-emulatable instruction (on hardware). Unprotecting the
803 * gfn doesn't allow forward progress for a self-changing access because
804 * doing so also zaps the translation for the gfn, i.e. retrying the
805 * instruction will hit a !PRESENT fault, which results in a new shadow
806 * page and sends KVM back to square one.
808 bool write_fault_to_shadow_pgtable;
810 /* set at EPT violation at this point */
811 unsigned long exit_qualification;
813 /* pv related host specific info */
818 int pending_ioapic_eoi;
819 int pending_external_vector;
821 /* be preempted when it's in kernel-mode(cpl=0) */
822 bool preempted_in_kernel;
824 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
827 /* AMD MSRC001_0015 Hardware Configuration */
831 struct kvm_lpage_info {
835 struct kvm_arch_memory_slot {
836 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
837 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
838 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
842 * We use as the mode the number of bits allocated in the LDR for the
843 * logical processor ID. It happens that these are all powers of two.
844 * This makes it is very easy to detect cases where the APICs are
845 * configured for multiple modes; in that case, we cannot use the map and
846 * hence cannot use kvm_irq_delivery_to_apic_fast either.
848 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
849 #define KVM_APIC_MODE_XAPIC_FLAT 8
850 #define KVM_APIC_MODE_X2APIC 16
852 struct kvm_apic_map {
857 struct kvm_lapic *xapic_flat_map[8];
858 struct kvm_lapic *xapic_cluster_map[16][4];
860 struct kvm_lapic *phys_map[];
863 /* Hyper-V emulation context */
865 struct mutex hv_lock;
870 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
871 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
874 HV_REFERENCE_TSC_PAGE tsc_ref;
876 struct idr conn_to_evt;
878 u64 hv_reenlightenment_control;
879 u64 hv_tsc_emulation_control;
880 u64 hv_tsc_emulation_status;
882 /* How many vCPUs have VP index != vCPU index */
883 atomic_t num_mismatched_vp_indexes;
885 struct hv_partition_assist_pg *hv_pa_pg;
888 enum kvm_irqchip_mode {
890 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
891 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
894 #define APICV_INHIBIT_REASON_DISABLE 0
895 #define APICV_INHIBIT_REASON_HYPERV 1
896 #define APICV_INHIBIT_REASON_NESTED 2
897 #define APICV_INHIBIT_REASON_IRQWIN 3
898 #define APICV_INHIBIT_REASON_PIT_REINJ 4
899 #define APICV_INHIBIT_REASON_X2APIC 5
902 unsigned long n_used_mmu_pages;
903 unsigned long n_requested_mmu_pages;
904 unsigned long n_max_mmu_pages;
905 unsigned int indirect_shadow_pages;
907 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
909 * Hash table of struct kvm_mmu_page.
911 struct list_head active_mmu_pages;
912 struct list_head zapped_obsolete_pages;
913 struct list_head lpage_disallowed_mmu_pages;
914 struct kvm_page_track_notifier_node mmu_sp_tracker;
915 struct kvm_page_track_notifier_head track_notifier_head;
917 struct list_head assigned_dev_head;
918 struct iommu_domain *iommu_domain;
919 bool iommu_noncoherent;
920 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
921 atomic_t noncoherent_dma_count;
922 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
923 atomic_t assigned_device_count;
924 struct kvm_pic *vpic;
925 struct kvm_ioapic *vioapic;
926 struct kvm_pit *vpit;
927 atomic_t vapics_in_nmi_mode;
928 struct mutex apic_map_lock;
929 struct kvm_apic_map *apic_map;
932 bool apic_access_page_done;
933 unsigned long apicv_inhibit_reasons;
940 bool cstate_in_guest;
942 unsigned long irq_sources_bitmap;
944 raw_spinlock_t tsc_write_lock;
951 u64 cur_tsc_generation;
952 int nr_vcpus_matched_tsc;
954 spinlock_t pvclock_gtod_sync_lock;
955 bool use_master_clock;
956 u64 master_kernel_ns;
957 u64 master_cycle_now;
958 struct delayed_work kvmclock_update_work;
959 struct delayed_work kvmclock_sync_work;
961 struct kvm_xen_hvm_config xen_hvm_config;
963 /* reads protected by irq_srcu, writes by irq_lock */
964 struct hlist_head mask_notifier_list;
966 struct kvm_hv hyperv;
968 #ifdef CONFIG_KVM_MMU_AUDIT
972 bool backwards_tsc_observed;
973 bool boot_vcpu_runs_old_kvmclock;
978 enum kvm_irqchip_mode irqchip_mode;
979 u8 nr_reserved_ioapic_pins;
981 bool disabled_lapic_found;
984 bool x2apic_broadcast_quirk_disabled;
986 bool guest_can_read_msr_platform_info;
987 bool exception_payload_enabled;
989 struct kvm_pmu_event_filter *pmu_event_filter;
990 struct task_struct *nx_lpage_recovery_thread;
994 ulong mmu_shadow_zapped;
996 ulong mmu_pte_updated;
997 ulong mmu_pde_zapped;
1000 ulong mmu_cache_miss;
1002 ulong remote_tlb_flush;
1004 ulong nx_lpage_splits;
1005 ulong max_mmu_page_hash_collisions;
1008 struct kvm_vcpu_stat {
1018 u64 irq_window_exits;
1019 u64 nmi_window_exits;
1022 u64 halt_successful_poll;
1023 u64 halt_attempted_poll;
1024 u64 halt_poll_invalid;
1026 u64 request_irq_exits;
1028 u64 host_state_reload;
1031 u64 insn_emulation_fail;
1038 struct x86_instruction_info;
1041 bool host_initiated;
1046 struct kvm_lapic_irq {
1054 bool msi_redir_hint;
1057 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1059 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1062 struct kvm_x86_ops {
1063 int (*hardware_enable)(void);
1064 void (*hardware_disable)(void);
1065 void (*hardware_unsetup)(void);
1066 bool (*cpu_has_accelerated_tpr)(void);
1067 bool (*has_emulated_msr)(int index);
1068 void (*cpuid_update)(struct kvm_vcpu *vcpu);
1070 unsigned int vm_size;
1071 int (*vm_init)(struct kvm *kvm);
1072 void (*vm_destroy)(struct kvm *kvm);
1074 /* Create, but do not attach this VCPU */
1075 int (*vcpu_create)(struct kvm_vcpu *vcpu);
1076 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1077 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1079 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
1080 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1081 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1083 void (*update_bp_intercept)(struct kvm_vcpu *vcpu);
1084 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1085 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1086 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1087 void (*get_segment)(struct kvm_vcpu *vcpu,
1088 struct kvm_segment *var, int seg);
1089 int (*get_cpl)(struct kvm_vcpu *vcpu);
1090 void (*set_segment)(struct kvm_vcpu *vcpu,
1091 struct kvm_segment *var, int seg);
1092 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1093 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
1094 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
1095 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1096 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1097 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1098 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1099 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1100 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1101 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1102 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1103 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1104 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1105 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1106 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1108 void (*tlb_flush_all)(struct kvm_vcpu *vcpu);
1109 void (*tlb_flush_current)(struct kvm_vcpu *vcpu);
1110 int (*tlb_remote_flush)(struct kvm *kvm);
1111 int (*tlb_remote_flush_with_range)(struct kvm *kvm,
1112 struct kvm_tlb_range *range);
1115 * Flush any TLB entries associated with the given GVA.
1116 * Does not need to flush GPA->HPA mappings.
1117 * Can potentially get non-canonical addresses through INVLPGs, which
1118 * the implementation may choose to ignore if appropriate.
1120 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1123 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1124 * does not need to flush GPA->HPA mappings.
1126 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu);
1128 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu);
1129 int (*handle_exit)(struct kvm_vcpu *vcpu,
1130 enum exit_fastpath_completion exit_fastpath);
1131 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1132 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1133 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1134 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1135 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1136 unsigned char *hypercall_addr);
1137 void (*set_irq)(struct kvm_vcpu *vcpu);
1138 void (*set_nmi)(struct kvm_vcpu *vcpu);
1139 void (*queue_exception)(struct kvm_vcpu *vcpu);
1140 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1141 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
1142 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
1143 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1144 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1145 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1146 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1147 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1148 bool (*check_apicv_inhibit_reasons)(ulong bit);
1149 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate);
1150 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1151 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1152 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1153 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1154 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1155 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1156 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1157 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
1158 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1159 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1160 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1161 int (*get_tdp_level)(struct kvm_vcpu *vcpu);
1162 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1164 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, unsigned long cr3);
1166 bool (*has_wbinvd_exit)(void);
1168 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu);
1169 /* Returns actual tsc_offset set in active VMCS */
1170 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1172 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
1174 int (*check_intercept)(struct kvm_vcpu *vcpu,
1175 struct x86_instruction_info *info,
1176 enum x86_intercept_stage stage,
1177 struct x86_exception *exception);
1178 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1180 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1182 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1185 * Arch-specific dirty logging hooks. These hooks are only supposed to
1186 * be valid if the specific arch has hardware-accelerated dirty logging
1187 * mechanism. Currently only for PML on VMX.
1189 * - slot_enable_log_dirty:
1190 * called when enabling log dirty mode for the slot.
1191 * - slot_disable_log_dirty:
1192 * called when disabling log dirty mode for the slot.
1193 * also called when slot is created with log dirty disabled.
1194 * - flush_log_dirty:
1195 * called before reporting dirty_bitmap to userspace.
1196 * - enable_log_dirty_pt_masked:
1197 * called when reenabling log dirty for the GFNs in the mask after
1198 * corresponding bits are cleared in slot->dirty_bitmap.
1200 void (*slot_enable_log_dirty)(struct kvm *kvm,
1201 struct kvm_memory_slot *slot);
1202 void (*slot_disable_log_dirty)(struct kvm *kvm,
1203 struct kvm_memory_slot *slot);
1204 void (*flush_log_dirty)(struct kvm *kvm);
1205 void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
1206 struct kvm_memory_slot *slot,
1207 gfn_t offset, unsigned long mask);
1208 int (*write_log_dirty)(struct kvm_vcpu *vcpu);
1210 /* pmu operations of sub-arch */
1211 const struct kvm_pmu_ops *pmu_ops;
1212 const struct kvm_x86_nested_ops *nested_ops;
1215 * Architecture specific hooks for vCPU blocking due to
1217 * Returns for .pre_block():
1218 * - 0 means continue to block the vCPU.
1219 * - 1 means we cannot block the vCPU since some event
1220 * happens during this period, such as, 'ON' bit in
1221 * posted-interrupts descriptor is set.
1223 int (*pre_block)(struct kvm_vcpu *vcpu);
1224 void (*post_block)(struct kvm_vcpu *vcpu);
1226 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1227 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1229 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
1230 uint32_t guest_irq, bool set);
1231 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1232 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1234 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1236 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1238 void (*setup_mce)(struct kvm_vcpu *vcpu);
1240 int (*smi_allowed)(struct kvm_vcpu *vcpu);
1241 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1242 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate);
1243 int (*enable_smi_window)(struct kvm_vcpu *vcpu);
1245 int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
1246 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1247 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1249 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1251 bool (*need_emulation_on_page_fault)(struct kvm_vcpu *vcpu);
1253 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1254 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
1257 struct kvm_x86_nested_ops {
1258 int (*check_events)(struct kvm_vcpu *vcpu);
1259 int (*get_state)(struct kvm_vcpu *vcpu,
1260 struct kvm_nested_state __user *user_kvm_nested_state,
1261 unsigned user_data_size);
1262 int (*set_state)(struct kvm_vcpu *vcpu,
1263 struct kvm_nested_state __user *user_kvm_nested_state,
1264 struct kvm_nested_state *kvm_state);
1265 bool (*get_vmcs12_pages)(struct kvm_vcpu *vcpu);
1267 int (*enable_evmcs)(struct kvm_vcpu *vcpu,
1268 uint16_t *vmcs_version);
1269 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu);
1272 struct kvm_x86_init_ops {
1273 int (*cpu_has_kvm_support)(void);
1274 int (*disabled_by_bios)(void);
1275 int (*check_processor_compatibility)(void);
1276 int (*hardware_setup)(void);
1278 struct kvm_x86_ops *runtime_ops;
1281 struct kvm_arch_async_pf {
1288 extern u64 __read_mostly host_efer;
1290 extern struct kvm_x86_ops kvm_x86_ops;
1291 extern struct kmem_cache *x86_fpu_cache;
1293 #define __KVM_HAVE_ARCH_VM_ALLOC
1294 static inline struct kvm *kvm_arch_alloc_vm(void)
1296 return __vmalloc(kvm_x86_ops.vm_size,
1297 GFP_KERNEL_ACCOUNT | __GFP_ZERO, PAGE_KERNEL);
1299 void kvm_arch_free_vm(struct kvm *kvm);
1301 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
1302 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1304 if (kvm_x86_ops.tlb_remote_flush &&
1305 !kvm_x86_ops.tlb_remote_flush(kvm))
1311 int kvm_mmu_module_init(void);
1312 void kvm_mmu_module_exit(void);
1314 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1315 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1316 void kvm_mmu_init_vm(struct kvm *kvm);
1317 void kvm_mmu_uninit_vm(struct kvm *kvm);
1318 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
1319 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask,
1320 u64 acc_track_mask, u64 me_mask);
1322 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1323 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1324 struct kvm_memory_slot *memslot,
1326 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1327 const struct kvm_memory_slot *memslot);
1328 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1329 struct kvm_memory_slot *memslot);
1330 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
1331 struct kvm_memory_slot *memslot);
1332 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
1333 struct kvm_memory_slot *memslot);
1334 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
1335 struct kvm_memory_slot *slot,
1336 gfn_t gfn_offset, unsigned long mask);
1337 void kvm_mmu_zap_all(struct kvm *kvm);
1338 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1339 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm);
1340 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1342 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
1343 bool pdptrs_changed(struct kvm_vcpu *vcpu);
1345 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1346 const void *val, int bytes);
1348 struct kvm_irq_mask_notifier {
1349 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1351 struct hlist_node link;
1354 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1355 struct kvm_irq_mask_notifier *kimn);
1356 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1357 struct kvm_irq_mask_notifier *kimn);
1358 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1361 extern bool tdp_enabled;
1363 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1365 /* control of guest tsc rate supported? */
1366 extern bool kvm_has_tsc_control;
1367 /* maximum supported tsc_khz for guests */
1368 extern u32 kvm_max_guest_tsc_khz;
1369 /* number of bits of the fractional part of the TSC scaling ratio */
1370 extern u8 kvm_tsc_scaling_ratio_frac_bits;
1371 /* maximum allowed value of TSC scaling ratio */
1372 extern u64 kvm_max_tsc_scaling_ratio;
1373 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1374 extern u64 kvm_default_tsc_scaling_ratio;
1376 extern u64 kvm_mce_cap_supported;
1379 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1380 * userspace I/O) to indicate that the emulation context
1381 * should be resued as is, i.e. skip initialization of
1382 * emulation context, instruction fetch and decode.
1384 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1385 * Indicates that only select instructions (tagged with
1386 * EmulateOnUD) should be emulated (to minimize the emulator
1387 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1389 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1390 * decode the instruction length. For use *only* by
1391 * kvm_x86_ops.skip_emulated_instruction() implementations.
1393 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1394 * retry native execution under certain conditions,
1395 * Can only be set in conjunction with EMULTYPE_PF.
1397 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1398 * triggered by KVM's magic "force emulation" prefix,
1399 * which is opt in via module param (off by default).
1400 * Bypasses EmulateOnUD restriction despite emulating
1401 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1402 * Used to test the full emulator from userspace.
1404 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1405 * backdoor emulation, which is opt in via module param.
1406 * VMware backoor emulation handles select instructions
1407 * and reinjects the #GP for all other cases.
1409 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1410 * case the CR2/GPA value pass on the stack is valid.
1412 #define EMULTYPE_NO_DECODE (1 << 0)
1413 #define EMULTYPE_TRAP_UD (1 << 1)
1414 #define EMULTYPE_SKIP (1 << 2)
1415 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
1416 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1417 #define EMULTYPE_VMWARE_GP (1 << 5)
1418 #define EMULTYPE_PF (1 << 6)
1420 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1421 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1422 void *insn, int insn_len);
1424 void kvm_enable_efer_bits(u64);
1425 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1426 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
1427 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1428 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1429 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1430 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1432 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1433 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1434 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1435 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1436 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1438 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1439 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1440 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1442 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1443 int reason, bool has_error_code, u32 error_code);
1445 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1446 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1447 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1448 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1449 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1450 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1451 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1452 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1453 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1454 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1456 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1457 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1459 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1460 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1461 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1463 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1464 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1465 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload);
1466 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1467 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1468 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1469 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
1470 struct x86_exception *fault);
1471 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1472 gfn_t gfn, void *data, int offset, int len,
1474 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1475 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1477 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1478 int irq_source_id, int level)
1480 /* Logical OR for level trig interrupt */
1482 __set_bit(irq_source_id, irq_state);
1484 __clear_bit(irq_source_id, irq_state);
1486 return !!(*irq_state);
1489 #define KVM_MMU_ROOT_CURRENT BIT(0)
1490 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1491 #define KVM_MMU_ROOTS_ALL (~0UL)
1493 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1494 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1496 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1498 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1499 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1500 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1501 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1502 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1503 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1504 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1505 ulong roots_to_free);
1506 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1507 struct x86_exception *exception);
1508 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1509 struct x86_exception *exception);
1510 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1511 struct x86_exception *exception);
1512 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1513 struct x86_exception *exception);
1514 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1515 struct x86_exception *exception);
1517 bool kvm_apicv_activated(struct kvm *kvm);
1518 void kvm_apicv_init(struct kvm *kvm, bool enable);
1519 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
1520 void kvm_request_apicv_update(struct kvm *kvm, bool activate,
1523 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1525 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
1526 void *insn, int insn_len);
1527 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1528 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1529 gva_t gva, hpa_t root_hpa);
1530 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1531 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush,
1532 bool skip_mmu_sync);
1534 void kvm_configure_mmu(bool enable_tdp, int tdp_page_level);
1536 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1537 struct x86_exception *exception)
1542 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1544 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1546 return (struct kvm_mmu_page *)page_private(page);
1549 static inline u16 kvm_read_ldt(void)
1552 asm("sldt %0" : "=g"(ldt));
1556 static inline void kvm_load_ldt(u16 sel)
1558 asm("lldt %0" : : "rm"(sel));
1561 #ifdef CONFIG_X86_64
1562 static inline unsigned long read_msr(unsigned long msr)
1571 static inline u32 get_rdx_init_val(void)
1573 return 0x600; /* P6 family */
1576 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1578 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1581 #define TSS_IOPB_BASE_OFFSET 0x66
1582 #define TSS_BASE_SIZE 0x68
1583 #define TSS_IOPB_SIZE (65536 / 8)
1584 #define TSS_REDIRECTION_SIZE (256 / 8)
1585 #define RMODE_TSS_SIZE \
1586 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1589 TASK_SWITCH_CALL = 0,
1590 TASK_SWITCH_IRET = 1,
1591 TASK_SWITCH_JMP = 2,
1592 TASK_SWITCH_GATE = 3,
1595 #define HF_GIF_MASK (1 << 0)
1596 #define HF_HIF_MASK (1 << 1)
1597 #define HF_VINTR_MASK (1 << 2)
1598 #define HF_NMI_MASK (1 << 3)
1599 #define HF_IRET_MASK (1 << 4)
1600 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1601 #define HF_SMM_MASK (1 << 6)
1602 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1604 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1605 #define KVM_ADDRESS_SPACE_NUM 2
1607 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1608 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1610 asmlinkage void kvm_spurious_fault(void);
1613 * Hardware virtualization extension instructions may fault if a
1614 * reboot turns off virtualization while processes are running.
1615 * Usually after catching the fault we just panic; during reboot
1616 * instead the instruction is ignored.
1618 #define __kvm_handle_fault_on_reboot(insn) \
1623 "call kvm_spurious_fault \n\t" \
1625 _ASM_EXTABLE(666b, 667b)
1627 #define KVM_ARCH_WANT_MMU_NOTIFIER
1628 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1629 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1630 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1631 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1632 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1633 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1634 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1635 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1636 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1637 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1639 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1640 unsigned long ipi_bitmap_high, u32 min,
1641 unsigned long icr, int op_64_bit);
1643 void kvm_define_shared_msr(unsigned index, u32 msr);
1644 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1646 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc);
1647 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1649 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1650 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1652 void kvm_make_mclock_inprogress_request(struct kvm *kvm);
1653 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1654 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
1655 unsigned long *vcpu_bitmap);
1657 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1658 struct kvm_async_pf *work);
1659 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1660 struct kvm_async_pf *work);
1661 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1662 struct kvm_async_pf *work);
1663 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1664 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1666 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1667 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1668 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1670 int kvm_is_in_guest(void);
1672 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size);
1673 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1674 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1676 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1677 struct kvm_vcpu **dest_vcpu);
1679 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1680 struct kvm_lapic_irq *irq);
1682 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
1684 /* We can only post Fixed and LowPrio IRQs */
1685 return (irq->delivery_mode == APIC_DM_FIXED ||
1686 irq->delivery_mode == APIC_DM_LOWEST);
1689 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1691 if (kvm_x86_ops.vcpu_blocking)
1692 kvm_x86_ops.vcpu_blocking(vcpu);
1695 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1697 if (kvm_x86_ops.vcpu_unblocking)
1698 kvm_x86_ops.vcpu_unblocking(vcpu);
1701 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1703 static inline int kvm_cpu_get_apicid(int mps_cpu)
1705 #ifdef CONFIG_X86_LOCAL_APIC
1706 return default_cpu_present_to_apicid(mps_cpu);
1713 #define put_smstate(type, buf, offset, val) \
1714 *(type *)((buf) + (offset) - 0x7e00) = val
1716 #define GET_SMSTATE(type, buf, offset) \
1717 (*(type *)((buf) + (offset) - 0x7e00))
1719 #endif /* _ASM_X86_KVM_HOST_H */