1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_INTEL_PT_H
3 #define _ASM_X86_INTEL_PT_H
5 #define PT_CPUID_LEAVES 2
6 #define PT_CPUID_REGS_NUM 4 /* number of regsters (eax, ebx, ecx, edx) */
9 PT_CAP_max_subleaf = 0,
15 PT_CAP_power_event_trace,
17 PT_CAP_topa_multiple_entries,
18 PT_CAP_single_range_output,
21 PT_CAP_num_address_ranges,
23 PT_CAP_cycle_thresholds,
27 #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
28 void cpu_emergency_stop_pt(void);
29 extern u32 intel_pt_validate_hw_cap(enum pt_capabilities cap);
30 extern u32 intel_pt_validate_cap(u32 *caps, enum pt_capabilities cap);
32 static inline void cpu_emergency_stop_pt(void) {}
33 static inline u32 intel_pt_validate_hw_cap(enum pt_capabilities cap) { return 0; }
34 static inline u32 intel_pt_validate_cap(u32 *caps, enum pt_capabilities capability) { return 0; }
37 #endif /* _ASM_X86_INTEL_PT_H */