arch/x86/include/asm/fpu-internal.h

   1 /*
   2  * Copyright (C) 1994 Linus Torvalds
   3  *
   4  * Pentium III FXSR, SSE support
   5  * General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  * x86-64 work by Andi Kleen 2002
   8  */
   9
  10 #ifndef _FPU_INTERNAL_H
  11 #define _FPU_INTERNAL_H
  12
  13 #include <linux/kernel_stat.h>
  14 #include <linux/regset.h>
  15 #include <linux/compat.h>
  16 #include <linux/slab.h>
  17 #include <asm/asm.h>
  18 #include <asm/cpufeature.h>
  19 #include <asm/processor.h>
  20 #include <asm/sigcontext.h>
  21 #include <asm/user.h>
  22 #include <asm/uaccess.h>
  23 #include <asm/xsave.h>
  24 #include <asm/smap.h>
  25
  26 #ifdef CONFIG_X86_64
  27 # include <asm/sigcontext32.h>
  28 # include <asm/user32.h>
  29 struct ksignal;
  30 int ia32_setup_rt_frame(int sig, struct ksignal *ksig,
  31                         compat_sigset_t *set, struct pt_regs *regs);
  32 int ia32_setup_frame(int sig, struct ksignal *ksig,
  33                      compat_sigset_t *set, struct pt_regs *regs);
  34 #else
  35 # define user_i387_ia32_struct  user_i387_struct
  36 # define user32_fxsr_struct     user_fxsr_struct
  37 # define ia32_setup_frame       __setup_frame
  38 # define ia32_setup_rt_frame    __setup_rt_frame
  39 #endif
  40
  41 extern unsigned int mxcsr_feature_mask;
  42 extern void fpu_init(void);
  43 extern void eager_fpu_init(void);
  44
  45 DECLARE_PER_CPU(struct task_struct *, fpu_owner_task);
  46
  47 extern void convert_from_fxsr(struct user_i387_ia32_struct *env,
  48                               struct task_struct *tsk);
  49 extern void convert_to_fxsr(struct task_struct *tsk,
  50                             const struct user_i387_ia32_struct *env);
  51
  52 extern user_regset_active_fn fpregs_active, xfpregs_active;
  53 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get,
  54                                 xstateregs_get;
  55 extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set,
  56                                  xstateregs_set;
  57
  58 /*
  59  * xstateregs_active == fpregs_active. Please refer to the comment
  60  * at the definition of fpregs_active.
  61  */
  62 #define xstateregs_active       fpregs_active
  63
  64 #ifdef CONFIG_MATH_EMULATION
  65 extern void finit_soft_fpu(struct i387_soft_struct *soft);
  66 #else
  67 static inline void finit_soft_fpu(struct i387_soft_struct *soft) {}
  68 #endif
  69
  70 /*
  71  * Must be run with preemption disabled: this clears the fpu_owner_task,
  72  * on this CPU.
  73  *
  74  * This will disable any lazy FPU state restore of the current FPU state,
  75  * but if the current thread owns the FPU, it will still be saved by.
  76  */
  77 static inline void __cpu_disable_lazy_restore(unsigned int cpu)
  78 {
  79         per_cpu(fpu_owner_task, cpu) = NULL;
  80 }
  81
  82 static inline int fpu_lazy_restore(struct task_struct *new, unsigned int cpu)
  83 {
  84         return new == this_cpu_read_stable(fpu_owner_task) &&
  85                 cpu == new->thread.fpu.last_cpu;
  86 }
  87
  88 static inline int is_ia32_compat_frame(void)
  89 {
  90         return config_enabled(CONFIG_IA32_EMULATION) &&
  91                test_thread_flag(TIF_IA32);
  92 }
  93
  94 static inline int is_ia32_frame(void)
  95 {
  96         return config_enabled(CONFIG_X86_32) || is_ia32_compat_frame();
  97 }
  98
  99 static inline int is_x32_frame(void)
 100 {
 101         return config_enabled(CONFIG_X86_X32_ABI) && test_thread_flag(TIF_X32);
 102 }
 103
 104 #define X87_FSW_ES (1 << 7)     /* Exception Summary */
 105
 106 static __always_inline __pure bool use_eager_fpu(void)
 107 {
 108         return static_cpu_has_safe(X86_FEATURE_EAGER_FPU);
 109 }
 110
 111 static __always_inline __pure bool use_xsaveopt(void)
 112 {
 113         return static_cpu_has_safe(X86_FEATURE_XSAVEOPT);
 114 }
 115
 116 static __always_inline __pure bool use_xsave(void)
 117 {
 118         return static_cpu_has_safe(X86_FEATURE_XSAVE);
 119 }
 120
 121 static __always_inline __pure bool use_fxsr(void)
 122 {
 123         return static_cpu_has_safe(X86_FEATURE_FXSR);
 124 }
 125
 126 static inline void fx_finit(struct i387_fxsave_struct *fx)
 127 {
 128         memset(fx, 0, xstate_size);
 129         fx->cwd = 0x37f;
 130         fx->mxcsr = MXCSR_DEFAULT;
 131 }
 132
 133 extern void __sanitize_i387_state(struct task_struct *);
 134
 135 static inline void sanitize_i387_state(struct task_struct *tsk)
 136 {
 137         if (!use_xsaveopt())
 138                 return;
 139         __sanitize_i387_state(tsk);
 140 }
 141
 142 #define user_insn(insn, output, input...)                               \
 143 ({                                                                      \
 144         int err;                                                        \
 145         asm volatile(ASM_STAC "\n"                                      \
 146                      "1:" #insn "\n\t"                                  \
 147                      "2: " ASM_CLAC "\n"                                \
 148                      ".section .fixup,\"ax\"\n"                         \
 149                      "3:  movl $-1,%[err]\n"                            \
 150                      "    jmp  2b\n"                                    \
 151                      ".previous\n"                                      \
 152                      _ASM_EXTABLE(1b, 3b)                               \
 153                      : [err] "=r" (err), output                         \
 154                      : "0"(0), input);                                  \
 155         err;                                                            \
 156 })
 157
 158 #define check_insn(insn, output, input...)                              \
 159 ({                                                                      \
 160         int err;                                                        \
 161         asm volatile("1:" #insn "\n\t"                                  \
 162                      "2:\n"                                             \
 163                      ".section .fixup,\"ax\"\n"                         \
 164                      "3:  movl $-1,%[err]\n"                            \
 165                      "    jmp  2b\n"                                    \
 166                      ".previous\n"                                      \
 167                      _ASM_EXTABLE(1b, 3b)                               \
 168                      : [err] "=r" (err), output                         \
 169                      : "0"(0), input);                                  \
 170         err;                                                            \
 171 })
 172
 173 static inline int fsave_user(struct i387_fsave_struct __user *fx)
 174 {
 175         return user_insn(fnsave %[fx]; fwait,  [fx] "=m" (*fx), "m" (*fx));
 176 }
 177
 178 static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
 179 {
 180         if (config_enabled(CONFIG_X86_32))
 181                 return user_insn(fxsave %[fx], [fx] "=m" (*fx), "m" (*fx));
 182         else if (config_enabled(CONFIG_AS_FXSAVEQ))
 183                 return user_insn(fxsaveq %[fx], [fx] "=m" (*fx), "m" (*fx));
 184
 185         /* See comment in fpu_fxsave() below. */
 186         return user_insn(rex64/fxsave (%[fx]), "=m" (*fx), [fx] "R" (fx));
 187 }
 188
 189 static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
 190 {
 191         if (config_enabled(CONFIG_X86_32))
 192                 return check_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 193         else if (config_enabled(CONFIG_AS_FXSAVEQ))
 194                 return check_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
 195
 196         /* See comment in fpu_fxsave() below. */
 197         return check_insn(rex64/fxrstor (%[fx]), "=m" (*fx), [fx] "R" (fx),
 198                           "m" (*fx));
 199 }
 200
 201 static inline int fxrstor_user(struct i387_fxsave_struct __user *fx)
 202 {
 203         if (config_enabled(CONFIG_X86_32))
 204                 return user_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 205         else if (config_enabled(CONFIG_AS_FXSAVEQ))
 206                 return user_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
 207
 208         /* See comment in fpu_fxsave() below. */
 209         return user_insn(rex64/fxrstor (%[fx]), "=m" (*fx), [fx] "R" (fx),
 210                           "m" (*fx));
 211 }
 212
 213 static inline int frstor_checking(struct i387_fsave_struct *fx)
 214 {
 215         return check_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 216 }
 217
 218 static inline int frstor_user(struct i387_fsave_struct __user *fx)
 219 {
 220         return user_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
 221 }
 222
 223 static inline void fpu_fxsave(struct fpu *fpu)
 224 {
 225         if (config_enabled(CONFIG_X86_32))
 226                 asm volatile( "fxsave %[fx]" : [fx] "=m" (fpu->state->fxsave));
 227         else if (config_enabled(CONFIG_AS_FXSAVEQ))
 228                 asm volatile("fxsaveq %0" : "=m" (fpu->state->fxsave));
 229         else {
 230                 /* Using "rex64; fxsave %0" is broken because, if the memory
 231                  * operand uses any extended registers for addressing, a second
 232                  * REX prefix will be generated (to the assembler, rex64
 233                  * followed by semicolon is a separate instruction), and hence
 234                  * the 64-bitness is lost.
 235                  *
 236                  * Using "fxsaveq %0" would be the ideal choice, but is only
 237                  * supported starting with gas 2.16.
 238                  *
 239                  * Using, as a workaround, the properly prefixed form below
 240                  * isn't accepted by any binutils version so far released,
 241                  * complaining that the same type of prefix is used twice if
 242                  * an extended register is needed for addressing (fix submitted
 243                  * to mainline 2005-11-21).
 244                  *
 245                  *  asm volatile("rex64/fxsave %0" : "=m" (fpu->state->fxsave));
 246                  *
 247                  * This, however, we can work around by forcing the compiler to
 248                  * select an addressing mode that doesn't require extended
 249                  * registers.
 250                  */
 251                 asm volatile( "rex64/fxsave (%[fx])"
 252                              : "=m" (fpu->state->fxsave)
 253                              : [fx] "R" (&fpu->state->fxsave));
 254         }
 255 }
 256
 257 /*
 258  * These must be called with preempt disabled. Returns
 259  * 'true' if the FPU state is still intact.
 260  */
 261 static inline int fpu_save_init(struct fpu *fpu)
 262 {
 263         if (use_xsave()) {
 264                 fpu_xsave(fpu);
 265
 266                 /*
 267                  * xsave header may indicate the init state of the FP.
 268                  */
 269                 if (!(fpu->state->xsave.xsave_hdr.xstate_bv & XSTATE_FP))
 270                         return 1;
 271         } else if (use_fxsr()) {
 272                 fpu_fxsave(fpu);
 273         } else {
 274                 asm volatile("fnsave %[fx]; fwait"
 275                              : [fx] "=m" (fpu->state->fsave));
 276                 return 0;
 277         }
 278
 279         /*
 280          * If exceptions are pending, we need to clear them so
 281          * that we don't randomly get exceptions later.
 282          *
 283          * FIXME! Is this perhaps only true for the old-style
 284          * irq13 case? Maybe we could leave the x87 state
 285          * intact otherwise?
 286          */
 287         if (unlikely(fpu->state->fxsave.swd & X87_FSW_ES)) {
 288                 asm volatile("fnclex");
 289                 return 0;
 290         }
 291         return 1;
 292 }
 293
 294 static inline int __save_init_fpu(struct task_struct *tsk)
 295 {
 296         return fpu_save_init(&tsk->thread.fpu);
 297 }
 298
 299 static inline int fpu_restore_checking(struct fpu *fpu)
 300 {
 301         if (use_xsave())
 302                 return fpu_xrstor_checking(&fpu->state->xsave);
 303         else if (use_fxsr())
 304                 return fxrstor_checking(&fpu->state->fxsave);
 305         else
 306                 return frstor_checking(&fpu->state->fsave);
 307 }
 308
 309 static inline int restore_fpu_checking(struct task_struct *tsk)
 310 {
 311         /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
 312            is pending.  Clear the x87 state here by setting it to fixed
 313            values. "m" is a random variable that should be in L1 */
 314         if (unlikely(static_cpu_has_bug_safe(X86_BUG_FXSAVE_LEAK))) {
 315                 asm volatile(
 316                         "fnclex\n\t"
 317                         "emms\n\t"
 318                         "fildl %P[addr]"        /* set F?P to defined value */
 319                         : : [addr] "m" (tsk->thread.fpu.has_fpu));
 320         }
 321
 322         return fpu_restore_checking(&tsk->thread.fpu);
 323 }
 324
 325 /*
 326  * Software FPU state helpers. Careful: these need to
 327  * be preemption protection *and* they need to be
 328  * properly paired with the CR0.TS changes!
 329  */
 330 static inline int __thread_has_fpu(struct task_struct *tsk)
 331 {
 332         return tsk->thread.fpu.has_fpu;
 333 }
 334
 335 /* Must be paired with an 'stts' after! */
 336 static inline void __thread_clear_has_fpu(struct task_struct *tsk)
 337 {
 338         tsk->thread.fpu.has_fpu = 0;
 339         this_cpu_write(fpu_owner_task, NULL);
 340 }
 341
 342 /* Must be paired with a 'clts' before! */
 343 static inline void __thread_set_has_fpu(struct task_struct *tsk)
 344 {
 345         tsk->thread.fpu.has_fpu = 1;
 346         this_cpu_write(fpu_owner_task, tsk);
 347 }
 348
 349 /*
 350  * Encapsulate the CR0.TS handling together with the
 351  * software flag.
 352  *
 353  * These generally need preemption protection to work,
 354  * do try to avoid using these on their own.
 355  */
 356 static inline void __thread_fpu_end(struct task_struct *tsk)
 357 {
 358         __thread_clear_has_fpu(tsk);
 359         if (!use_eager_fpu())
 360                 stts();
 361 }
 362
 363 static inline void __thread_fpu_begin(struct task_struct *tsk)
 364 {
 365         if (!use_eager_fpu())
 366                 clts();
 367         __thread_set_has_fpu(tsk);
 368 }
 369
 370 static inline void __drop_fpu(struct task_struct *tsk)
 371 {
 372         if (__thread_has_fpu(tsk)) {
 373                 /* Ignore delayed exceptions from user space */
 374                 asm volatile("1: fwait\n"
 375                              "2:\n"
 376                              _ASM_EXTABLE(1b, 2b));
 377                 __thread_fpu_end(tsk);
 378         }
 379 }
 380
 381 static inline void drop_fpu(struct task_struct *tsk)
 382 {
 383         /*
 384          * Forget coprocessor state..
 385          */
 386         preempt_disable();
 387         tsk->thread.fpu_counter = 0;
 388         __drop_fpu(tsk);
 389         clear_used_math();
 390         preempt_enable();
 391 }
 392
 393 static inline void drop_init_fpu(struct task_struct *tsk)
 394 {
 395         if (!use_eager_fpu())
 396                 drop_fpu(tsk);
 397         else {
 398                 if (use_xsave())
 399                         xrstor_state(init_xstate_buf, -1);
 400                 else
 401                         fxrstor_checking(&init_xstate_buf->i387);
 402         }
 403 }
 404
 405 /*
 406  * FPU state switching for scheduling.
 407  *
 408  * This is a two-stage process:
 409  *
 410  *  - switch_fpu_prepare() saves the old state and
 411  *    sets the new state of the CR0.TS bit. This is
 412  *    done within the context of the old process.
 413  *
 414  *  - switch_fpu_finish() restores the new state as
 415  *    necessary.
 416  */
 417 typedef struct { int preload; } fpu_switch_t;
 418
 419 static inline fpu_switch_t switch_fpu_prepare(struct task_struct *old, struct task_struct *new, int cpu)
 420 {
 421         fpu_switch_t fpu;
 422
 423         /*
 424          * If the task has used the math, pre-load the FPU on xsave processors
 425          * or if the past 5 consecutive context-switches used math.
 426          */
 427         fpu.preload = tsk_used_math(new) && (use_eager_fpu() ||
 428                                              new->thread.fpu_counter > 5);
 429         if (__thread_has_fpu(old)) {
 430                 if (!__save_init_fpu(old))
 431                         cpu = ~0;
 432                 old->thread.fpu.last_cpu = cpu;
 433                 old->thread.fpu.has_fpu = 0;    /* But leave fpu_owner_task! */
 434
 435                 /* Don't change CR0.TS if we just switch! */
 436                 if (fpu.preload) {
 437                         new->thread.fpu_counter++;
 438                         __thread_set_has_fpu(new);
 439                         prefetch(new->thread.fpu.state);
 440                 } else if (!use_eager_fpu())
 441                         stts();
 442         } else {
 443                 old->thread.fpu_counter = 0;
 444                 old->thread.fpu.last_cpu = ~0;
 445                 if (fpu.preload) {
 446                         new->thread.fpu_counter++;
 447                         if (!use_eager_fpu() && fpu_lazy_restore(new, cpu))
 448                                 fpu.preload = 0;
 449                         else
 450                                 prefetch(new->thread.fpu.state);
 451                         __thread_fpu_begin(new);
 452                 }
 453         }
 454         return fpu;
 455 }
 456
 457 /*
 458  * By the time this gets called, we've already cleared CR0.TS and
 459  * given the process the FPU if we are going to preload the FPU
 460  * state - all we need to do is to conditionally restore the register
 461  * state itself.
 462  */
 463 static inline void switch_fpu_finish(struct task_struct *new, fpu_switch_t fpu)
 464 {
 465         if (fpu.preload) {
 466                 if (unlikely(restore_fpu_checking(new)))
 467                         drop_init_fpu(new);
 468         }
 469 }
 470
 471 /*
 472  * Signal frame handlers...
 473  */
 474 extern int save_xstate_sig(void __user *buf, void __user *fx, int size);
 475 extern int __restore_xstate_sig(void __user *buf, void __user *fx, int size);
 476
 477 static inline int xstate_sigframe_size(void)
 478 {
 479         return use_xsave() ? xstate_size + FP_XSTATE_MAGIC2_SIZE : xstate_size;
 480 }
 481
 482 static inline int restore_xstate_sig(void __user *buf, int ia32_frame)
 483 {
 484         void __user *buf_fx = buf;
 485         int size = xstate_sigframe_size();
 486
 487         if (ia32_frame && use_fxsr()) {
 488                 buf_fx = buf + sizeof(struct i387_fsave_struct);
 489                 size += sizeof(struct i387_fsave_struct);
 490         }
 491
 492         return __restore_xstate_sig(buf, buf_fx, size);
 493 }
 494
 495 /*
 496  * Need to be preemption-safe.
 497  *
 498  * NOTE! user_fpu_begin() must be used only immediately before restoring
 499  * it. This function does not do any save/restore on their own.
 500  */
 501 static inline void user_fpu_begin(void)
 502 {
 503         preempt_disable();
 504         if (!user_has_fpu())
 505                 __thread_fpu_begin(current);
 506         preempt_enable();
 507 }
 508
 509 static inline void __save_fpu(struct task_struct *tsk)
 510 {
 511         if (use_xsave()) {
 512                 if (unlikely(system_state == SYSTEM_BOOTING))
 513                         xsave_state_booting(&tsk->thread.fpu.state->xsave, -1);
 514                 else
 515                         xsave_state(&tsk->thread.fpu.state->xsave, -1);
 516         } else
 517                 fpu_fxsave(&tsk->thread.fpu);
 518 }
 519
 520 /*
 521  * i387 state interaction
 522  */
 523 static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
 524 {
 525         if (cpu_has_fxsr) {
 526                 return tsk->thread.fpu.state->fxsave.cwd;
 527         } else {
 528                 return (unsigned short)tsk->thread.fpu.state->fsave.cwd;
 529         }
 530 }
 531
 532 static inline unsigned short get_fpu_swd(struct task_struct *tsk)
 533 {
 534         if (cpu_has_fxsr) {
 535                 return tsk->thread.fpu.state->fxsave.swd;
 536         } else {
 537                 return (unsigned short)tsk->thread.fpu.state->fsave.swd;
 538         }
 539 }
 540
 541 static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
 542 {
 543         if (cpu_has_xmm) {
 544                 return tsk->thread.fpu.state->fxsave.mxcsr;
 545         } else {
 546                 return MXCSR_DEFAULT;
 547         }
 548 }
 549
 550 static bool fpu_allocated(struct fpu *fpu)
 551 {
 552         return fpu->state != NULL;
 553 }
 554
 555 static inline int fpu_alloc(struct fpu *fpu)
 556 {
 557         if (fpu_allocated(fpu))
 558                 return 0;
 559         fpu->state = kmem_cache_alloc(task_xstate_cachep, GFP_KERNEL);
 560         if (!fpu->state)
 561                 return -ENOMEM;
 562         WARN_ON((unsigned long)fpu->state & 15);
 563         return 0;
 564 }
 565
 566 static inline void fpu_free(struct fpu *fpu)
 567 {
 568         if (fpu->state) {
 569                 kmem_cache_free(task_xstate_cachep, fpu->state);
 570                 fpu->state = NULL;
 571         }
 572 }
 573
 574 static inline void fpu_copy(struct task_struct *dst, struct task_struct *src)
 575 {
 576         if (use_eager_fpu()) {
 577                 memset(&dst->thread.fpu.state->xsave, 0, xstate_size);
 578                 __save_fpu(dst);
 579         } else {
 580                 struct fpu *dfpu = &dst->thread.fpu;
 581                 struct fpu *sfpu = &src->thread.fpu;
 582
 583                 unlazy_fpu(src);
 584                 memcpy(dfpu->state, sfpu->state, xstate_size);
 585         }
 586 }
 587
 588 static inline unsigned long
 589 alloc_mathframe(unsigned long sp, int ia32_frame, unsigned long *buf_fx,
 590                 unsigned long *size)
 591 {
 592         unsigned long frame_size = xstate_sigframe_size();
 593
 594         *buf_fx = sp = round_down(sp - frame_size, 64);
 595         if (ia32_frame && use_fxsr()) {
 596                 frame_size += sizeof(struct i387_fsave_struct);
 597                 sp -= sizeof(struct i387_fsave_struct);
 598         }
 599
 600         *size = frame_size;
 601         return sp;
 602 }
 603
 604 #endif