1 #include <linux/slab.h>
3 #include <asm/apicdef.h>
5 #include <linux/perf_event.h>
6 #include "../perf_event.h"
8 #define UNCORE_PMU_NAME_LEN 32
9 #define UNCORE_PMU_HRTIMER_INTERVAL (60LL * NSEC_PER_SEC)
10 #define UNCORE_SNB_IMC_HRTIMER_INTERVAL (5ULL * NSEC_PER_SEC)
12 #define UNCORE_FIXED_EVENT 0xff
13 #define UNCORE_PMC_IDX_MAX_GENERIC 8
14 #define UNCORE_PMC_IDX_FIXED UNCORE_PMC_IDX_MAX_GENERIC
15 #define UNCORE_PMC_IDX_MAX (UNCORE_PMC_IDX_FIXED + 1)
17 #define UNCORE_PCI_DEV_FULL_DATA(dev, func, type, idx) \
18 ((dev << 24) | (func << 16) | (type << 8) | idx)
19 #define UNCORE_PCI_DEV_DATA(type, idx) ((type << 8) | idx)
20 #define UNCORE_PCI_DEV_DEV(data) ((data >> 24) & 0xff)
21 #define UNCORE_PCI_DEV_FUNC(data) ((data >> 16) & 0xff)
22 #define UNCORE_PCI_DEV_TYPE(data) ((data >> 8) & 0xff)
23 #define UNCORE_PCI_DEV_IDX(data) (data & 0xff)
24 #define UNCORE_EXTRA_PCI_DEV 0xff
25 #define UNCORE_EXTRA_PCI_DEV_MAX 3
27 #define UNCORE_EVENT_CONSTRAINT(c, n) EVENT_CONSTRAINT(c, n, 0xff)
29 struct pci_extra_dev {
30 struct pci_dev *dev[UNCORE_EXTRA_PCI_DEV_MAX];
33 struct intel_uncore_ops;
34 struct intel_uncore_pmu;
35 struct intel_uncore_box;
36 struct uncore_event_desc;
38 struct intel_uncore_type {
51 unsigned num_shared_regs:8;
52 unsigned single_fixed:1;
53 unsigned pair_ctr_ctl:1;
54 unsigned *msr_offsets;
55 struct event_constraint unconstrainted;
56 struct event_constraint *constraints;
57 struct intel_uncore_pmu *pmus;
58 struct intel_uncore_ops *ops;
59 struct uncore_event_desc *event_descs;
60 const struct attribute_group *attr_groups[4];
61 struct pmu *pmu; /* for custom pmu ops */
64 #define pmu_group attr_groups[0]
65 #define format_group attr_groups[1]
66 #define events_group attr_groups[2]
68 struct intel_uncore_ops {
69 void (*init_box)(struct intel_uncore_box *);
70 void (*exit_box)(struct intel_uncore_box *);
71 void (*disable_box)(struct intel_uncore_box *);
72 void (*enable_box)(struct intel_uncore_box *);
73 void (*disable_event)(struct intel_uncore_box *, struct perf_event *);
74 void (*enable_event)(struct intel_uncore_box *, struct perf_event *);
75 u64 (*read_counter)(struct intel_uncore_box *, struct perf_event *);
76 int (*hw_config)(struct intel_uncore_box *, struct perf_event *);
77 struct event_constraint *(*get_constraint)(struct intel_uncore_box *,
79 void (*put_constraint)(struct intel_uncore_box *, struct perf_event *);
82 struct intel_uncore_pmu {
84 char name[UNCORE_PMU_NAME_LEN];
89 struct intel_uncore_type *type;
90 struct intel_uncore_box **boxes;
93 struct intel_uncore_extra_reg {
95 u64 config, config1, config2;
99 struct intel_uncore_box {
102 int n_active; /* number of active events */
104 int cpu; /* cpu to collect events */
107 struct perf_event *events[UNCORE_PMC_IDX_MAX];
108 struct perf_event *event_list[UNCORE_PMC_IDX_MAX];
109 struct event_constraint *event_constraint[UNCORE_PMC_IDX_MAX];
110 unsigned long active_mask[BITS_TO_LONGS(UNCORE_PMC_IDX_MAX)];
111 u64 tags[UNCORE_PMC_IDX_MAX];
112 struct pci_dev *pci_dev;
113 struct intel_uncore_pmu *pmu;
114 u64 hrtimer_duration; /* hrtimer timeout for this box */
115 struct hrtimer hrtimer;
116 struct list_head list;
117 struct list_head active_list;
119 struct intel_uncore_extra_reg shared_regs[0];
122 #define UNCORE_BOX_FLAG_INITIATED 0
124 struct uncore_event_desc {
125 struct kobj_attribute attr;
130 struct list_head list;
132 int pbus_to_physid[256];
135 struct pci2phy_map *__find_pci2phy_map(int segment);
137 ssize_t uncore_event_show(struct kobject *kobj,
138 struct kobj_attribute *attr, char *buf);
140 #define INTEL_UNCORE_EVENT_DESC(_name, _config) \
142 .attr = __ATTR(_name, 0444, uncore_event_show, NULL), \
146 #define DEFINE_UNCORE_FORMAT_ATTR(_var, _name, _format) \
147 static ssize_t __uncore_##_var##_show(struct kobject *kobj, \
148 struct kobj_attribute *attr, \
151 BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \
152 return sprintf(page, _format "\n"); \
154 static struct kobj_attribute format_attr_##_var = \
155 __ATTR(_name, 0444, __uncore_##_var##_show, NULL)
157 static inline unsigned uncore_pci_box_ctl(struct intel_uncore_box *box)
159 return box->pmu->type->box_ctl;
162 static inline unsigned uncore_pci_fixed_ctl(struct intel_uncore_box *box)
164 return box->pmu->type->fixed_ctl;
167 static inline unsigned uncore_pci_fixed_ctr(struct intel_uncore_box *box)
169 return box->pmu->type->fixed_ctr;
173 unsigned uncore_pci_event_ctl(struct intel_uncore_box *box, int idx)
175 return idx * 4 + box->pmu->type->event_ctl;
179 unsigned uncore_pci_perf_ctr(struct intel_uncore_box *box, int idx)
181 return idx * 8 + box->pmu->type->perf_ctr;
184 static inline unsigned uncore_msr_box_offset(struct intel_uncore_box *box)
186 struct intel_uncore_pmu *pmu = box->pmu;
187 return pmu->type->msr_offsets ?
188 pmu->type->msr_offsets[pmu->pmu_idx] :
189 pmu->type->msr_offset * pmu->pmu_idx;
192 static inline unsigned uncore_msr_box_ctl(struct intel_uncore_box *box)
194 if (!box->pmu->type->box_ctl)
196 return box->pmu->type->box_ctl + uncore_msr_box_offset(box);
199 static inline unsigned uncore_msr_fixed_ctl(struct intel_uncore_box *box)
201 if (!box->pmu->type->fixed_ctl)
203 return box->pmu->type->fixed_ctl + uncore_msr_box_offset(box);
206 static inline unsigned uncore_msr_fixed_ctr(struct intel_uncore_box *box)
208 return box->pmu->type->fixed_ctr + uncore_msr_box_offset(box);
212 unsigned uncore_msr_event_ctl(struct intel_uncore_box *box, int idx)
214 return box->pmu->type->event_ctl +
215 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
216 uncore_msr_box_offset(box);
220 unsigned uncore_msr_perf_ctr(struct intel_uncore_box *box, int idx)
222 return box->pmu->type->perf_ctr +
223 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
224 uncore_msr_box_offset(box);
228 unsigned uncore_fixed_ctl(struct intel_uncore_box *box)
231 return uncore_pci_fixed_ctl(box);
233 return uncore_msr_fixed_ctl(box);
237 unsigned uncore_fixed_ctr(struct intel_uncore_box *box)
240 return uncore_pci_fixed_ctr(box);
242 return uncore_msr_fixed_ctr(box);
246 unsigned uncore_event_ctl(struct intel_uncore_box *box, int idx)
249 return uncore_pci_event_ctl(box, idx);
251 return uncore_msr_event_ctl(box, idx);
255 unsigned uncore_perf_ctr(struct intel_uncore_box *box, int idx)
258 return uncore_pci_perf_ctr(box, idx);
260 return uncore_msr_perf_ctr(box, idx);
263 static inline int uncore_perf_ctr_bits(struct intel_uncore_box *box)
265 return box->pmu->type->perf_ctr_bits;
268 static inline int uncore_fixed_ctr_bits(struct intel_uncore_box *box)
270 return box->pmu->type->fixed_ctr_bits;
273 static inline int uncore_num_counters(struct intel_uncore_box *box)
275 return box->pmu->type->num_counters;
278 static inline void uncore_disable_box(struct intel_uncore_box *box)
280 if (box->pmu->type->ops->disable_box)
281 box->pmu->type->ops->disable_box(box);
284 static inline void uncore_enable_box(struct intel_uncore_box *box)
286 if (box->pmu->type->ops->enable_box)
287 box->pmu->type->ops->enable_box(box);
290 static inline void uncore_disable_event(struct intel_uncore_box *box,
291 struct perf_event *event)
293 box->pmu->type->ops->disable_event(box, event);
296 static inline void uncore_enable_event(struct intel_uncore_box *box,
297 struct perf_event *event)
299 box->pmu->type->ops->enable_event(box, event);
302 static inline u64 uncore_read_counter(struct intel_uncore_box *box,
303 struct perf_event *event)
305 return box->pmu->type->ops->read_counter(box, event);
308 static inline void uncore_box_init(struct intel_uncore_box *box)
310 if (!test_and_set_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) {
311 if (box->pmu->type->ops->init_box)
312 box->pmu->type->ops->init_box(box);
316 static inline void uncore_box_exit(struct intel_uncore_box *box)
318 if (test_and_clear_bit(UNCORE_BOX_FLAG_INITIATED, &box->flags)) {
319 if (box->pmu->type->ops->exit_box)
320 box->pmu->type->ops->exit_box(box);
324 static inline bool uncore_box_is_fake(struct intel_uncore_box *box)
326 return (box->pkgid < 0);
329 static inline struct intel_uncore_pmu *uncore_event_to_pmu(struct perf_event *event)
331 return container_of(event->pmu, struct intel_uncore_pmu, pmu);
334 static inline struct intel_uncore_box *uncore_event_to_box(struct perf_event *event)
336 return event->pmu_private;
339 struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu);
340 u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *event);
341 void uncore_pmu_start_hrtimer(struct intel_uncore_box *box);
342 void uncore_pmu_cancel_hrtimer(struct intel_uncore_box *box);
343 void uncore_pmu_event_read(struct perf_event *event);
344 void uncore_perf_event_update(struct intel_uncore_box *box, struct perf_event *event);
345 struct event_constraint *
346 uncore_get_constraint(struct intel_uncore_box *box, struct perf_event *event);
347 void uncore_put_constraint(struct intel_uncore_box *box, struct perf_event *event);
348 u64 uncore_shared_reg_config(struct intel_uncore_box *box, int idx);
350 extern struct intel_uncore_type **uncore_msr_uncores;
351 extern struct intel_uncore_type **uncore_pci_uncores;
352 extern struct pci_driver *uncore_pci_driver;
353 extern raw_spinlock_t pci2phy_map_lock;
354 extern struct list_head pci2phy_map_head;
355 extern struct pci_extra_dev *uncore_extra_pci_dev;
356 extern struct event_constraint uncore_constraint_empty;
358 /* perf_event_intel_uncore_snb.c */
359 int snb_uncore_pci_init(void);
360 int ivb_uncore_pci_init(void);
361 int hsw_uncore_pci_init(void);
362 int bdw_uncore_pci_init(void);
363 int skl_uncore_pci_init(void);
364 void snb_uncore_cpu_init(void);
365 void nhm_uncore_cpu_init(void);
366 void skl_uncore_cpu_init(void);
367 int snb_pci2phy_map_init(int devid);
369 /* perf_event_intel_uncore_snbep.c */
370 int snbep_uncore_pci_init(void);
371 void snbep_uncore_cpu_init(void);
372 int ivbep_uncore_pci_init(void);
373 void ivbep_uncore_cpu_init(void);
374 int hswep_uncore_pci_init(void);
375 void hswep_uncore_cpu_init(void);
376 int bdx_uncore_pci_init(void);
377 void bdx_uncore_cpu_init(void);
378 int knl_uncore_pci_init(void);
379 void knl_uncore_cpu_init(void);
381 /* perf_event_intel_uncore_nhmex.c */
382 void nhmex_uncore_cpu_init(void);