1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Compatibility mode system call entry point for x86-64.
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
8 #include <asm/asm-offsets.h>
9 #include <asm/current.h>
10 #include <asm/errno.h>
11 #include <asm/ia32_unistd.h>
12 #include <asm/thread_info.h>
13 #include <asm/segment.h>
14 #include <asm/irqflags.h>
17 #include <linux/linkage.h>
18 #include <linux/err.h>
20 .section .entry.text, "ax"
23 * 32-bit SYSENTER entry.
25 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
26 * on 64-bit kernels running on Intel CPUs.
28 * The SYSENTER instruction, in principle, should *only* occur in the
29 * vDSO. In practice, a small number of Android devices were shipped
30 * with a copy of Bionic that inlined a SYSENTER instruction. This
31 * never happened in any of Google's Bionic versions -- it only happened
32 * in a narrow range of Intel-provided versions.
34 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
35 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
36 * SYSENTER does not save anything on the stack,
37 * and does not save old RIP (!!!), RSP, or RFLAGS.
40 * eax system call number
49 SYM_CODE_START(entry_SYSENTER_compat)
52 /* Interrupts are off on entry. */
56 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
59 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
61 /* Construct struct pt_regs on stack */
62 pushq $__USER32_DS /* pt_regs->ss */
63 pushq $0 /* pt_regs->sp = 0 (placeholder) */
66 * Push flags. This is nasty. First, interrupts are currently
67 * off, but we need pt_regs->flags to have IF set. Second, if TS
68 * was set in usermode, it's still set, and we're singlestepping
69 * through this code. do_SYSENTER_32() will fix up IF.
71 pushfq /* pt_regs->flags (except IF = 0) */
72 pushq $__USER32_CS /* pt_regs->cs */
73 pushq $0 /* pt_regs->ip = 0 (placeholder) */
74 SYM_INNER_LABEL(entry_SYSENTER_compat_after_hwframe, SYM_L_GLOBAL)
77 * User tracing code (ptrace or signal handlers) might assume that
78 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
79 * syscall. Just in case the high bits are nonzero, zero-extend
80 * the syscall number. (This could almost certainly be deleted
81 * with no ill effects.)
85 pushq %rax /* pt_regs->orig_ax */
86 pushq %rdi /* pt_regs->di */
87 pushq %rsi /* pt_regs->si */
88 pushq %rdx /* pt_regs->dx */
89 pushq %rcx /* pt_regs->cx */
90 pushq $-ENOSYS /* pt_regs->ax */
91 pushq $0 /* pt_regs->r8 = 0 */
92 xorl %r8d, %r8d /* nospec r8 */
93 pushq $0 /* pt_regs->r9 = 0 */
94 xorl %r9d, %r9d /* nospec r9 */
95 pushq $0 /* pt_regs->r10 = 0 */
96 xorl %r10d, %r10d /* nospec r10 */
97 pushq $0 /* pt_regs->r11 = 0 */
98 xorl %r11d, %r11d /* nospec r11 */
99 pushq %rbx /* pt_regs->rbx */
100 xorl %ebx, %ebx /* nospec rbx */
101 pushq %rbp /* pt_regs->rbp (will be overwritten) */
102 xorl %ebp, %ebp /* nospec rbp */
103 pushq $0 /* pt_regs->r12 = 0 */
104 xorl %r12d, %r12d /* nospec r12 */
105 pushq $0 /* pt_regs->r13 = 0 */
106 xorl %r13d, %r13d /* nospec r13 */
107 pushq $0 /* pt_regs->r14 = 0 */
108 xorl %r14d, %r14d /* nospec r14 */
109 pushq $0 /* pt_regs->r15 = 0 */
110 xorl %r15d, %r15d /* nospec r15 */
117 * SYSENTER doesn't filter flags, so we need to clear NT and AC
118 * ourselves. To save a few cycles, we can check whether
119 * either was set instead of doing an unconditional popfq.
120 * This needs to happen before enabling interrupts so that
121 * we don't get preempted with NT set.
123 * If TF is set, we will single-step all the way to here -- do_debug
124 * will ignore all the traps. (Yes, this is slow, but so is
125 * single-stepping in general. This allows us to avoid having
126 * a more complicated code to handle the case where a user program
127 * forces us to single-step through the SYSENTER entry code.)
129 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
130 * out-of-line as an optimization: NT is unlikely to be set in the
131 * majority of the cases and instead of polluting the I$ unnecessarily,
132 * we're keeping that code behind a branch which will predict as
133 * not-taken and therefore its instructions won't be fetched.
135 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
136 jnz .Lsysenter_fix_flags
137 .Lsysenter_flags_fixed:
141 /* XEN PV guests always use IRET path */
142 ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
143 "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
144 jmp sysret32_from_system_call
146 .Lsysenter_fix_flags:
147 pushq $X86_EFLAGS_FIXED
149 jmp .Lsysenter_flags_fixed
150 SYM_INNER_LABEL(__end_entry_SYSENTER_compat, SYM_L_GLOBAL)
151 ANNOTATE_NOENDBR // is_sysenter_singlestep
152 SYM_CODE_END(entry_SYSENTER_compat)
155 * 32-bit SYSCALL entry.
157 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
158 * on 64-bit kernels running on AMD CPUs.
160 * The SYSCALL instruction, in principle, should *only* occur in the
161 * vDSO. In practice, it appears that this really is the case.
164 * - The calling convention for SYSCALL has changed several times without
167 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
168 * user task that did SYSCALL without immediately reloading SS
169 * would randomly crash.
171 * - Most programmers do not directly target AMD CPUs, and the 32-bit
172 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD
173 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
174 * because the SYSCALL instruction in legacy/native 32-bit mode (as
175 * opposed to compat mode) is sufficiently poorly designed as to be
176 * essentially unusable.
178 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
179 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
180 * programmed MSRs. RFLAGS gets masked by a value from another MSR
181 * (so CLD and CLAC are not needed). SYSCALL does not save anything on
182 * the stack and does not change RSP.
184 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
185 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
186 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
187 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
188 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
191 * eax system call number
194 * ebp arg2 (note: not saved in the stack frame, should not be touched)
201 SYM_CODE_START(entry_SYSCALL_compat)
204 /* Interrupts are off on entry. */
210 /* Use %rsp as scratch reg. User ESP is stashed in r8 */
211 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
213 /* Switch to the kernel stack */
214 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
216 SYM_INNER_LABEL(entry_SYSCALL_compat_safe_stack, SYM_L_GLOBAL)
219 /* Construct struct pt_regs on stack */
220 pushq $__USER32_DS /* pt_regs->ss */
221 pushq %r8 /* pt_regs->sp */
222 pushq %r11 /* pt_regs->flags */
223 pushq $__USER32_CS /* pt_regs->cs */
224 pushq %rcx /* pt_regs->ip */
225 SYM_INNER_LABEL(entry_SYSCALL_compat_after_hwframe, SYM_L_GLOBAL)
226 movl %eax, %eax /* discard orig_ax high bits */
227 pushq %rax /* pt_regs->orig_ax */
228 pushq %rdi /* pt_regs->di */
229 pushq %rsi /* pt_regs->si */
230 xorl %esi, %esi /* nospec si */
231 pushq %rdx /* pt_regs->dx */
232 xorl %edx, %edx /* nospec dx */
233 pushq %rbp /* pt_regs->cx (stashed in bp) */
234 xorl %ecx, %ecx /* nospec cx */
235 pushq $-ENOSYS /* pt_regs->ax */
236 pushq $0 /* pt_regs->r8 = 0 */
237 xorl %r8d, %r8d /* nospec r8 */
238 pushq $0 /* pt_regs->r9 = 0 */
239 xorl %r9d, %r9d /* nospec r9 */
240 pushq $0 /* pt_regs->r10 = 0 */
241 xorl %r10d, %r10d /* nospec r10 */
242 pushq $0 /* pt_regs->r11 = 0 */
243 xorl %r11d, %r11d /* nospec r11 */
244 pushq %rbx /* pt_regs->rbx */
245 xorl %ebx, %ebx /* nospec rbx */
246 pushq %rbp /* pt_regs->rbp (will be overwritten) */
247 xorl %ebp, %ebp /* nospec rbp */
248 pushq $0 /* pt_regs->r12 = 0 */
249 xorl %r12d, %r12d /* nospec r12 */
250 pushq $0 /* pt_regs->r13 = 0 */
251 xorl %r13d, %r13d /* nospec r13 */
252 pushq $0 /* pt_regs->r14 = 0 */
253 xorl %r14d, %r14d /* nospec r14 */
254 pushq $0 /* pt_regs->r15 = 0 */
255 xorl %r15d, %r15d /* nospec r15 */
260 call do_fast_syscall_32
261 /* XEN PV guests always use IRET path */
262 ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \
263 "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV
265 /* Opportunistic SYSRET */
266 sysret32_from_system_call:
268 * We are not going to return to userspace from the trampoline
269 * stack. So let's erase the thread stack right now.
273 movq RBX(%rsp), %rbx /* pt_regs->rbx */
274 movq RBP(%rsp), %rbp /* pt_regs->rbp */
275 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */
276 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */
277 addq $RAX, %rsp /* Skip r8-r15 */
278 popq %rax /* pt_regs->rax */
279 popq %rdx /* Skip pt_regs->cx */
280 popq %rdx /* pt_regs->dx */
281 popq %rsi /* pt_regs->si */
282 popq %rdi /* pt_regs->di */
285 * USERGS_SYSRET32 does:
286 * GSBASE = user's GS base
292 * ECX will not match pt_regs->cx, but we're returning to a vDSO
293 * trampoline that will fix up RCX, so this is okay.
295 * R12-R15 are callee-saved, so they contain whatever was in them
296 * when the system call started, which is already known to user
297 * code. We zero R8-R10 to avoid info leaks.
299 movq RSP-ORIG_RAX(%rsp), %rsp
302 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
303 * on the process stack which is not mapped to userspace and
304 * not readable after we SWITCH_TO_USER_CR3. Delay the CR3
305 * switch until after after the last reference to the process
308 * %r8/%r9 are zeroed before the sysret, thus safe to clobber.
310 SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9
317 SYM_CODE_END(entry_SYSCALL_compat)
320 * 32-bit legacy system call entry.
322 * 32-bit x86 Linux system calls traditionally used the INT $0x80
323 * instruction. INT $0x80 lands here.
325 * This entry point can be used by 32-bit and 64-bit programs to perform
326 * 32-bit system calls. Instances of INT $0x80 can be found inline in
327 * various programs and libraries. It is also used by the vDSO's
328 * __kernel_vsyscall fallback for hardware that doesn't support a faster
329 * entry method. Restarted 32-bit system calls also fall back to INT
330 * $0x80 regardless of what instruction was originally used to do the
333 * This is considered a slow path. It is not used by most libc
334 * implementations on modern hardware except during process startup.
337 * eax system call number
345 SYM_CODE_START(entry_INT80_compat)
349 * Interrupts are off on entry.
351 ASM_CLAC /* Do this early to minimize exposure */
355 * User tracing code (ptrace or signal handlers) might assume that
356 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
357 * syscall. Just in case the high bits are nonzero, zero-extend
358 * the syscall number. (This could almost certainly be deleted
359 * with no ill effects.)
363 /* switch to thread stack expects orig_ax and rdi to be pushed */
364 pushq %rax /* pt_regs->orig_ax */
365 pushq %rdi /* pt_regs->di */
367 /* Need to switch before accessing the thread stack. */
368 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
370 /* In the Xen PV case we already run on the thread stack. */
371 ALTERNATIVE "", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV
374 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
376 pushq 6*8(%rdi) /* regs->ss */
377 pushq 5*8(%rdi) /* regs->rsp */
378 pushq 4*8(%rdi) /* regs->eflags */
379 pushq 3*8(%rdi) /* regs->cs */
380 pushq 2*8(%rdi) /* regs->ip */
381 pushq 1*8(%rdi) /* regs->orig_ax */
382 pushq (%rdi) /* pt_regs->di */
385 pushq %rsi /* pt_regs->si */
386 xorl %esi, %esi /* nospec si */
387 pushq %rdx /* pt_regs->dx */
388 xorl %edx, %edx /* nospec dx */
389 pushq %rcx /* pt_regs->cx */
390 xorl %ecx, %ecx /* nospec cx */
391 pushq $-ENOSYS /* pt_regs->ax */
392 pushq %r8 /* pt_regs->r8 */
393 xorl %r8d, %r8d /* nospec r8 */
394 pushq %r9 /* pt_regs->r9 */
395 xorl %r9d, %r9d /* nospec r9 */
396 pushq %r10 /* pt_regs->r10*/
397 xorl %r10d, %r10d /* nospec r10 */
398 pushq %r11 /* pt_regs->r11 */
399 xorl %r11d, %r11d /* nospec r11 */
400 pushq %rbx /* pt_regs->rbx */
401 xorl %ebx, %ebx /* nospec rbx */
402 pushq %rbp /* pt_regs->rbp */
403 xorl %ebp, %ebp /* nospec rbp */
404 pushq %r12 /* pt_regs->r12 */
405 xorl %r12d, %r12d /* nospec r12 */
406 pushq %r13 /* pt_regs->r13 */
407 xorl %r13d, %r13d /* nospec r13 */
408 pushq %r14 /* pt_regs->r14 */
409 xorl %r14d, %r14d /* nospec r14 */
410 pushq %r15 /* pt_regs->r15 */
411 xorl %r15d, %r15d /* nospec r15 */
418 call do_int80_syscall_32
419 jmp swapgs_restore_regs_and_return_to_usermode
420 SYM_CODE_END(entry_INT80_compat)