1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/x86_64/entry.S
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
7 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
9 * entry.S contains the system-call and fault low-level handling routines.
11 * Some of this is documented in Documentation/x86/entry_64.txt
13 * A note on terminology:
14 * - iret frame: Architecture defined interrupt frame from SS to RIP
15 * at the top of the kernel process stack.
18 * - ENTRY/END: Define functions in the symbol table.
19 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
20 * - idtentry: Define exception entry points.
22 #include <linux/linkage.h>
23 #include <asm/segment.h>
24 #include <asm/cache.h>
25 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/export.h>
39 #include <asm/frame.h>
40 #include <linux/err.h>
45 .section .entry.text, "ax"
47 #ifdef CONFIG_PARAVIRT
48 ENTRY(native_usergs_sysret64)
52 END(native_usergs_sysret64)
53 #endif /* CONFIG_PARAVIRT */
55 .macro TRACE_IRQS_FLAGS flags:req
56 #ifdef CONFIG_TRACE_IRQFLAGS
57 bt $9, \flags /* interrupts off? */
64 .macro TRACE_IRQS_IRETQ
65 TRACE_IRQS_FLAGS EFLAGS(%rsp)
69 * When dynamic function tracer is enabled it will add a breakpoint
70 * to all locations that it is about to modify, sync CPUs, update
71 * all the code, sync CPUs, then remove the breakpoints. In this time
72 * if lockdep is enabled, it might jump back into the debug handler
73 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
75 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
76 * make sure the stack pointer does not get reset back to the top
77 * of the debug stack, and instead just reuses the current stack.
79 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
81 .macro TRACE_IRQS_OFF_DEBUG
82 call debug_stack_set_zero
84 call debug_stack_reset
87 .macro TRACE_IRQS_ON_DEBUG
88 call debug_stack_set_zero
90 call debug_stack_reset
93 .macro TRACE_IRQS_IRETQ_DEBUG
94 bt $9, EFLAGS(%rsp) /* interrupts off? */
101 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
102 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
103 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
107 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
109 * This is the only entry point used for 64-bit system calls. The
110 * hardware interface is reasonably well designed and the register to
111 * argument mapping Linux uses fits well with the registers that are
112 * available when SYSCALL is used.
114 * SYSCALL instructions can be found inlined in libc implementations as
115 * well as some other programs and libraries. There are also a handful
116 * of SYSCALL instructions in the vDSO used, for example, as a
117 * clock_gettimeofday fallback.
119 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
120 * then loads new ss, cs, and rip from previously programmed MSRs.
121 * rflags gets masked by a value from another MSR (so CLD and CLAC
122 * are not needed). SYSCALL does not save anything on the stack
123 * and does not change rsp.
125 * Registers on entry:
126 * rax system call number
128 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
132 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
135 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
137 * Only called from user space.
139 * When user can change pt_regs->foo always force IRET. That is because
140 * it deals with uncanonical addresses better. SYSRET has trouble
141 * with them due to bugs in both AMD and Intel CPUs.
144 .pushsection .entry_trampoline, "ax"
147 * The code in here gets remapped into cpu_entry_area's trampoline. This means
148 * that the assembler and linker have the wrong idea as to where this code
149 * lives (and, in fact, it's mapped more than once, so it's not even at a
150 * fixed address). So we can't reference any symbols outside the entry
151 * trampoline and expect it to work.
153 * Instead, we carefully abuse %rip-relative addressing.
154 * _entry_trampoline(%rip) refers to the start of the remapped) entry
155 * trampoline. We can thus find cpu_entry_area with this macro:
158 #define CPU_ENTRY_AREA \
159 _entry_trampoline - CPU_ENTRY_AREA_entry_trampoline(%rip)
161 /* The top word of the SYSENTER stack is hot and is usable as scratch space. */
162 #define RSP_SCRATCH CPU_ENTRY_AREA_entry_stack + \
163 SIZEOF_entry_stack - 8 + CPU_ENTRY_AREA
165 ENTRY(entry_SYSCALL_64_trampoline)
169 /* Stash the user RSP. */
170 movq %rsp, RSP_SCRATCH
172 /* Note: using %rsp as a scratch reg. */
173 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
175 /* Load the top of the task stack into RSP */
176 movq CPU_ENTRY_AREA_tss + TSS_sp1 + CPU_ENTRY_AREA, %rsp
178 /* Start building the simulated IRET frame. */
179 pushq $__USER_DS /* pt_regs->ss */
180 pushq RSP_SCRATCH /* pt_regs->sp */
181 pushq %r11 /* pt_regs->flags */
182 pushq $__USER_CS /* pt_regs->cs */
183 pushq %rcx /* pt_regs->ip */
186 * x86 lacks a near absolute jump, and we can't jump to the real
187 * entry text with a relative jump. We could push the target
188 * address and then use retq, but this destroys the pipeline on
189 * many CPUs (wasting over 20 cycles on Sandy Bridge). Instead,
190 * spill RDI and restore it in a second-stage trampoline.
193 movq $entry_SYSCALL_64_stage2, %rdi
195 END(entry_SYSCALL_64_trampoline)
199 ENTRY(entry_SYSCALL_64_stage2)
202 jmp entry_SYSCALL_64_after_hwframe
203 END(entry_SYSCALL_64_stage2)
205 ENTRY(entry_SYSCALL_64)
208 * Interrupts are off on entry.
209 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
210 * it is too small to ever cause noticeable irq latency.
215 * This path is not taken when PAGE_TABLE_ISOLATION is disabled so it
216 * is not required to switch CR3.
218 movq %rsp, PER_CPU_VAR(rsp_scratch)
219 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
221 /* Construct struct pt_regs on stack */
222 pushq $__USER_DS /* pt_regs->ss */
223 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
224 pushq %r11 /* pt_regs->flags */
225 pushq $__USER_CS /* pt_regs->cs */
226 pushq %rcx /* pt_regs->ip */
227 GLOBAL(entry_SYSCALL_64_after_hwframe)
228 pushq %rax /* pt_regs->orig_ax */
229 pushq %rdi /* pt_regs->di */
230 pushq %rsi /* pt_regs->si */
231 pushq %rdx /* pt_regs->dx */
232 pushq %rcx /* pt_regs->cx */
233 pushq $-ENOSYS /* pt_regs->ax */
234 pushq %r8 /* pt_regs->r8 */
235 pushq %r9 /* pt_regs->r9 */
236 pushq %r10 /* pt_regs->r10 */
237 pushq %r11 /* pt_regs->r11 */
238 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
239 UNWIND_HINT_REGS extra=0
244 * If we need to do entry work or if we guess we'll need to do
245 * exit work, go straight to the slow path.
247 movq PER_CPU_VAR(current_task), %r11
248 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
249 jnz entry_SYSCALL64_slow_path
251 entry_SYSCALL_64_fastpath:
253 * Easy case: enable interrupts and issue the syscall. If the syscall
254 * needs pt_regs, we'll call a stub that disables interrupts again
255 * and jumps to the slow path.
258 ENABLE_INTERRUPTS(CLBR_NONE)
259 #if __SYSCALL_MASK == ~0
260 cmpq $__NR_syscall_max, %rax
262 andl $__SYSCALL_MASK, %eax
263 cmpl $__NR_syscall_max, %eax
265 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
269 * This call instruction is handled specially in stub_ptregs_64.
270 * It might end up jumping to the slow path. If it jumps, RAX
271 * and all argument registers are clobbered.
273 call *sys_call_table(, %rax, 8)
274 .Lentry_SYSCALL_64_after_fastpath_call:
280 * If we get here, then we know that pt_regs is clean for SYSRET64.
281 * If we see that no exit work is required (which we are required
282 * to check with IRQs off), then we can go straight to SYSRET64.
284 DISABLE_INTERRUPTS(CLBR_ANY)
286 movq PER_CPU_VAR(current_task), %r11
287 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
291 TRACE_IRQS_ON /* user mode is traced as IRQs on */
293 movq EFLAGS(%rsp), %r11
294 addq $6*8, %rsp /* skip extra regs -- they were preserved */
296 jmp .Lpop_c_regs_except_rcx_r11_and_sysret
300 * The fast path looked good when we started, but something changed
301 * along the way and we need to switch to the slow path. Calling
302 * raise(3) will trigger this, for example. IRQs are off.
305 ENABLE_INTERRUPTS(CLBR_ANY)
308 call syscall_return_slowpath /* returns with IRQs disabled */
309 jmp return_from_SYSCALL_64
311 entry_SYSCALL64_slow_path:
315 call do_syscall_64 /* returns with IRQs disabled */
317 return_from_SYSCALL_64:
318 TRACE_IRQS_IRETQ /* we're about to change IF */
321 * Try to use SYSRET instead of IRET if we're returning to
322 * a completely clean 64-bit userspace context. If we're not,
323 * go to the slow exit path.
328 cmpq %rcx, %r11 /* SYSRET requires RCX == RIP */
329 jne swapgs_restore_regs_and_return_to_usermode
332 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
333 * in kernel space. This essentially lets the user take over
334 * the kernel, since userspace controls RSP.
336 * If width of "canonical tail" ever becomes variable, this will need
337 * to be updated to remain correct on both old and new CPUs.
339 * Change top bits to match most significant bit (47th or 56th bit
340 * depending on paging mode) in the address.
342 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
343 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
345 /* If this changed %rcx, it was not canonical */
347 jne swapgs_restore_regs_and_return_to_usermode
349 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
350 jne swapgs_restore_regs_and_return_to_usermode
353 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
354 jne swapgs_restore_regs_and_return_to_usermode
357 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
358 * restore RF properly. If the slowpath sets it for whatever reason, we
359 * need to restore it correctly.
361 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
362 * trap from userspace immediately after SYSRET. This would cause an
363 * infinite loop whenever #DB happens with register state that satisfies
364 * the opportunistic SYSRET conditions. For example, single-stepping
367 * movq $stuck_here, %rcx
372 * would never get past 'stuck_here'.
374 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
375 jnz swapgs_restore_regs_and_return_to_usermode
377 /* nothing to check for RSP */
379 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
380 jne swapgs_restore_regs_and_return_to_usermode
383 * We win! This label is here just for ease of understanding
384 * perf profiles. Nothing jumps here.
386 syscall_return_via_sysret:
387 /* rcx and r11 are already restored (see code above) */
390 .Lpop_c_regs_except_rcx_r11_and_sysret:
391 popq %rsi /* skip r11 */
396 popq %rsi /* skip rcx */
401 * Now all regs are restored except RSP and RDI.
402 * Save old stack pointer and switch to trampoline stack.
405 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp
407 pushq RSP-RDI(%rdi) /* RSP */
408 pushq (%rdi) /* RDI */
411 * We are on the trampoline stack. All regs except RDI are live.
412 * We can do future final exit work right here.
414 SWITCH_TO_USER_CR3_STACK scratch_reg=%rdi
419 END(entry_SYSCALL_64)
421 ENTRY(stub_ptregs_64)
423 * Syscalls marked as needing ptregs land here.
424 * If we are on the fast path, we need to save the extra regs,
425 * which we achieve by trying again on the slow path. If we are on
426 * the slow path, the extra regs are already saved.
428 * RAX stores a pointer to the C function implementing the syscall.
431 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
435 * Called from fast path -- disable IRQs again, pop return address
436 * and jump to slow path
438 DISABLE_INTERRUPTS(CLBR_ANY)
441 UNWIND_HINT_REGS extra=0
442 jmp entry_SYSCALL64_slow_path
445 jmp *%rax /* Called from C */
448 .macro ptregs_stub func
451 leaq \func(%rip), %rax
456 /* Instantiate ptregs_stub for each ptregs-using syscall */
457 #define __SYSCALL_64_QUAL_(sym)
458 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
459 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
460 #include <asm/syscalls_64.h>
466 ENTRY(__switch_to_asm)
469 * Save callee-saved registers
470 * This must match the order in inactive_task_frame
480 movq %rsp, TASK_threadsp(%rdi)
481 movq TASK_threadsp(%rsi), %rsp
483 #ifdef CONFIG_CC_STACKPROTECTOR
484 movq TASK_stack_canary(%rsi), %rbx
485 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
488 /* restore callee-saved registers */
500 * A newly forked process directly context switches into this address.
502 * rax: prev task we switched from
503 * rbx: kernel thread func (NULL for user thread)
504 * r12: kernel thread arg
509 call schedule_tail /* rdi: 'prev' task parameter */
511 testq %rbx, %rbx /* from kernel_thread? */
512 jnz 1f /* kernel threads are uncommon */
517 call syscall_return_slowpath /* returns with IRQs disabled */
518 TRACE_IRQS_ON /* user mode is traced as IRQS on */
519 jmp swapgs_restore_regs_and_return_to_usermode
526 * A kernel thread is allowed to return here after successfully
527 * calling do_execve(). Exit to userspace to complete the execve()
535 * Build the entry stubs with some assembler magic.
536 * We pack 1 stub into every 8-byte block.
539 ENTRY(irq_entries_start)
540 vector=FIRST_EXTERNAL_VECTOR
541 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
542 UNWIND_HINT_IRET_REGS
543 pushq $(~vector+0x80) /* Note: always in signed byte range */
548 END(irq_entries_start)
550 .macro DEBUG_ENTRY_ASSERT_IRQS_OFF
551 #ifdef CONFIG_DEBUG_ENTRY
554 testl $X86_EFLAGS_IF, %eax
563 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers
564 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone.
565 * Requires kernel GSBASE.
567 * The invariant is that, if irq_count != -1, then the IRQ stack is in use.
569 .macro ENTER_IRQ_STACK regs=1 old_rsp
570 DEBUG_ENTRY_ASSERT_IRQS_OFF
574 UNWIND_HINT_REGS base=\old_rsp
577 incl PER_CPU_VAR(irq_count)
578 jnz .Lirq_stack_push_old_rsp_\@
581 * Right now, if we just incremented irq_count to zero, we've
582 * claimed the IRQ stack but we haven't switched to it yet.
584 * If anything is added that can interrupt us here without using IST,
585 * it must be *extremely* careful to limit its stack usage. This
586 * could include kprobes and a hypothetical future IST-less #DB
589 * The OOPS unwinder relies on the word at the top of the IRQ
590 * stack linking back to the previous RSP for the entire time we're
591 * on the IRQ stack. For this to work reliably, we need to write
592 * it before we actually move ourselves to the IRQ stack.
595 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8)
596 movq PER_CPU_VAR(irq_stack_ptr), %rsp
598 #ifdef CONFIG_DEBUG_ENTRY
600 * If the first movq above becomes wrong due to IRQ stack layout
601 * changes, the only way we'll notice is if we try to unwind right
602 * here. Assert that we set up the stack right to catch this type
605 cmpq -8(%rsp), \old_rsp
606 je .Lirq_stack_okay\@
611 .Lirq_stack_push_old_rsp_\@:
615 UNWIND_HINT_REGS indirect=1
620 * Undoes ENTER_IRQ_STACK.
622 .macro LEAVE_IRQ_STACK regs=1
623 DEBUG_ENTRY_ASSERT_IRQS_OFF
624 /* We need to be off the IRQ stack before decrementing irq_count. */
632 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming
633 * the irq stack but we're not on it.
636 decl PER_CPU_VAR(irq_count)
640 * Interrupt entry/exit.
642 * Interrupt entry points save only callee clobbered registers in fast path.
644 * Entry runs with interrupts off.
647 /* 0(%rsp): ~(interrupt number) */
648 .macro interrupt func
651 testb $3, CS-ORIG_RAX(%rsp)
654 call switch_to_thread_stack
657 ALLOC_PT_GPREGS_ON_STACK
666 * IRQ from user mode.
668 * We need to tell lockdep that IRQs are off. We can't do this until
669 * we fix gsbase, and we should do it before enter_from_user_mode
670 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
671 * the simplest way to handle it is to just call it twice if
672 * we enter from user mode. There's no reason to optimize this since
673 * TRACE_IRQS_OFF is a no-op if lockdep is off.
677 CALL_enter_from_user_mode
680 ENTER_IRQ_STACK old_rsp=%rdi
681 /* We entered an interrupt context - irqs are off: */
684 call \func /* rdi points to pt_regs */
688 * The interrupt stubs push (~vector+0x80) onto the stack and
689 * then jump to common_interrupt.
691 .p2align CONFIG_X86_L1_CACHE_SHIFT
694 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
696 /* 0(%rsp): old RSP */
698 DISABLE_INTERRUPTS(CLBR_ANY)
706 /* Interrupt came from user space */
709 call prepare_exit_to_usermode
712 GLOBAL(swapgs_restore_regs_and_return_to_usermode)
713 #ifdef CONFIG_DEBUG_ENTRY
714 /* Assert that pt_regs indicates user mode. */
731 * The stack is now user RDI, orig_ax, RIP, CS, EFLAGS, RSP, SS.
732 * Save old stack pointer and switch to trampoline stack.
735 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp
737 /* Copy the IRET frame to the trampoline stack. */
738 pushq 6*8(%rdi) /* SS */
739 pushq 5*8(%rdi) /* RSP */
740 pushq 4*8(%rdi) /* EFLAGS */
741 pushq 3*8(%rdi) /* CS */
742 pushq 2*8(%rdi) /* RIP */
744 /* Push user RDI on the trampoline stack. */
748 * We are on the trampoline stack. All regs except RDI are live.
749 * We can do future final exit work right here.
752 SWITCH_TO_USER_CR3_STACK scratch_reg=%rdi
760 /* Returning to kernel space */
762 #ifdef CONFIG_PREEMPT
763 /* Interrupts are off */
764 /* Check if we need preemption */
765 bt $9, EFLAGS(%rsp) /* were interrupts off? */
767 0: cmpl $0, PER_CPU_VAR(__preempt_count)
769 call preempt_schedule_irq
774 * The iretq could re-enable interrupts:
778 GLOBAL(restore_regs_and_return_to_kernel)
779 #ifdef CONFIG_DEBUG_ENTRY
780 /* Assert that pt_regs indicates kernel mode. */
788 addq $8, %rsp /* skip regs->orig_ax */
792 UNWIND_HINT_IRET_REGS
794 * Are we returning to a stack segment from the LDT? Note: in
795 * 64-bit mode SS:RSP on the exception stack is always valid.
797 #ifdef CONFIG_X86_ESPFIX64
798 testb $4, (SS-RIP)(%rsp)
799 jnz native_irq_return_ldt
802 .global native_irq_return_iret
803 native_irq_return_iret:
805 * This may fault. Non-paranoid faults on return to userspace are
806 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
807 * Double-faults due to espfix64 are handled in do_double_fault.
808 * Other faults here are fatal.
812 #ifdef CONFIG_X86_ESPFIX64
813 native_irq_return_ldt:
815 * We are running with user GSBASE. All GPRs contain their user
816 * values. We have a percpu ESPFIX stack that is eight slots
817 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
818 * of the ESPFIX stack.
820 * We clobber RAX and RDI in this code. We stash RDI on the
821 * normal stack and RAX on the ESPFIX stack.
823 * The ESPFIX stack layout we set up looks like this:
825 * --- top of ESPFIX stack ---
830 * RIP <-- RSP points here when we're done
831 * RAX <-- espfix_waddr points here
832 * --- bottom of ESPFIX stack ---
835 pushq %rdi /* Stash user RDI */
836 SWAPGS /* to kernel GS */
837 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi /* to kernel CR3 */
839 movq PER_CPU_VAR(espfix_waddr), %rdi
840 movq %rax, (0*8)(%rdi) /* user RAX */
841 movq (1*8)(%rsp), %rax /* user RIP */
842 movq %rax, (1*8)(%rdi)
843 movq (2*8)(%rsp), %rax /* user CS */
844 movq %rax, (2*8)(%rdi)
845 movq (3*8)(%rsp), %rax /* user RFLAGS */
846 movq %rax, (3*8)(%rdi)
847 movq (5*8)(%rsp), %rax /* user SS */
848 movq %rax, (5*8)(%rdi)
849 movq (4*8)(%rsp), %rax /* user RSP */
850 movq %rax, (4*8)(%rdi)
851 /* Now RAX == RSP. */
853 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
856 * espfix_stack[31:16] == 0. The page tables are set up such that
857 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
858 * espfix_waddr for any X. That is, there are 65536 RO aliases of
859 * the same page. Set up RSP so that RSP[31:16] contains the
860 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
861 * still points to an RO alias of the ESPFIX stack.
863 orq PER_CPU_VAR(espfix_stack), %rax
865 SWITCH_TO_USER_CR3_STACK scratch_reg=%rdi
866 SWAPGS /* to user GS */
867 popq %rdi /* Restore user RDI */
870 UNWIND_HINT_IRET_REGS offset=8
873 * At this point, we cannot write to the stack any more, but we can
876 popq %rax /* Restore user RAX */
879 * RSP now points to an ordinary IRET frame, except that the page
880 * is read-only and RSP[31:16] are preloaded with the userspace
881 * values. We can now IRET back to userspace.
883 jmp native_irq_return_iret
885 END(common_interrupt)
890 .macro apicinterrupt3 num sym do_sym
892 UNWIND_HINT_IRET_REGS
901 /* Make sure APIC interrupt handlers end up in the irqentry section: */
902 #define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
903 #define POP_SECTION_IRQENTRY .popsection
905 .macro apicinterrupt num sym do_sym
906 PUSH_SECTION_IRQENTRY
907 apicinterrupt3 \num \sym \do_sym
912 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
913 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
917 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
920 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
921 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
923 #ifdef CONFIG_HAVE_KVM
924 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
925 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
926 apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi
929 #ifdef CONFIG_X86_MCE_THRESHOLD
930 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
933 #ifdef CONFIG_X86_MCE_AMD
934 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
937 #ifdef CONFIG_X86_THERMAL_VECTOR
938 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
942 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
943 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
944 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
947 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
948 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
950 #ifdef CONFIG_IRQ_WORK
951 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
955 * Exception entry points.
957 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + ((x) - 1) * 8)
960 * Switch to the thread stack. This is called with the IRET frame and
961 * orig_ax on the stack. (That is, RDI..R12 are not on the stack and
962 * space has not been allocated for them.)
964 ENTRY(switch_to_thread_stack)
968 /* Need to switch before accessing the thread stack. */
969 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
971 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
972 UNWIND_HINT sp_offset=16 sp_reg=ORC_REG_DI
974 pushq 7*8(%rdi) /* regs->ss */
975 pushq 6*8(%rdi) /* regs->rsp */
976 pushq 5*8(%rdi) /* regs->eflags */
977 pushq 4*8(%rdi) /* regs->cs */
978 pushq 3*8(%rdi) /* regs->ip */
979 pushq 2*8(%rdi) /* regs->orig_ax */
980 pushq 8(%rdi) /* return address */
985 END(switch_to_thread_stack)
987 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
989 UNWIND_HINT_IRET_REGS offset=\has_error_code*8
992 .if \shift_ist != -1 && \paranoid == 0
993 .error "using shift_ist requires paranoid=1"
998 .if \has_error_code == 0
999 pushq $-1 /* ORIG_RAX: no syscall to restart */
1002 ALLOC_PT_GPREGS_ON_STACK
1005 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
1006 jnz .Lfrom_usermode_switch_stack_\@
1015 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
1018 .if \shift_ist != -1
1019 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
1025 movq %rsp, %rdi /* pt_regs pointer */
1028 movq ORIG_RAX(%rsp), %rsi /* get error code */
1029 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
1031 xorl %esi, %esi /* no error code */
1034 .if \shift_ist != -1
1035 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1040 .if \shift_ist != -1
1041 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1044 /* these procedures expect "no swapgs" flag in ebx */
1053 * Entry from userspace. Switch stacks and treat it
1054 * as a normal entry. This means that paranoid handlers
1055 * run in real process context if user_mode(regs).
1057 .Lfrom_usermode_switch_stack_\@:
1060 movq %rsp, %rdi /* pt_regs pointer */
1063 movq ORIG_RAX(%rsp), %rsi /* get error code */
1064 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
1066 xorl %esi, %esi /* no error code */
1071 jmp error_exit /* %ebx: no swapgs flag */
1076 idtentry divide_error do_divide_error has_error_code=0
1077 idtentry overflow do_overflow has_error_code=0
1078 idtentry bounds do_bounds has_error_code=0
1079 idtentry invalid_op do_invalid_op has_error_code=0
1080 idtentry device_not_available do_device_not_available has_error_code=0
1081 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1082 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1083 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1084 idtentry segment_not_present do_segment_not_present has_error_code=1
1085 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1086 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1087 idtentry alignment_check do_alignment_check has_error_code=1
1088 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1092 * Reload gs selector with exception handling
1095 ENTRY(native_load_gs_index)
1098 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1103 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
1105 TRACE_IRQS_FLAGS (%rsp)
1109 ENDPROC(native_load_gs_index)
1110 EXPORT_SYMBOL(native_load_gs_index)
1112 _ASM_EXTABLE(.Lgs_change, bad_gs)
1113 .section .fixup, "ax"
1114 /* running with kernelgs */
1116 SWAPGS /* switch back to user gs */
1118 /* This can't be a string because the preprocessor needs to see it. */
1119 movl $__USER_DS, %eax
1122 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
1128 /* Call softirq on interrupt stack. Interrupts are off. */
1129 ENTRY(do_softirq_own_stack)
1132 ENTER_IRQ_STACK regs=0 old_rsp=%r11
1134 LEAVE_IRQ_STACK regs=0
1137 ENDPROC(do_softirq_own_stack)
1140 idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1143 * A note on the "critical region" in our callback handler.
1144 * We want to avoid stacking callback handlers due to events occurring
1145 * during handling of the last event. To do this, we keep events disabled
1146 * until we've done all processing. HOWEVER, we must enable events before
1147 * popping the stack frame (can't be done atomically) and so it would still
1148 * be possible to get enough handler activations to overflow the stack.
1149 * Although unlikely, bugs of that kind are hard to track down, so we'd
1150 * like to avoid the possibility.
1151 * So, on entry to the handler we detect whether we interrupted an
1152 * existing activation in its critical region -- if so, we pop the current
1153 * activation and restart the handler using the previous one.
1155 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
1158 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1159 * see the correct pointer to the pt_regs
1162 movq %rdi, %rsp /* we don't return, adjust the stack frame */
1165 ENTER_IRQ_STACK old_rsp=%r10
1166 call xen_evtchn_do_upcall
1169 #ifndef CONFIG_PREEMPT
1170 call xen_maybe_preempt_hcall
1173 END(xen_do_hypervisor_callback)
1176 * Hypervisor uses this for application faults while it executes.
1177 * We get here for two reasons:
1178 * 1. Fault while reloading DS, ES, FS or GS
1179 * 2. Fault while executing IRET
1180 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1181 * registers that could be reloaded and zeroed the others.
1182 * Category 2 we fix up by killing the current process. We cannot use the
1183 * normal Linux return path in this case because if we use the IRET hypercall
1184 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1185 * We distinguish between categories by comparing each saved segment register
1186 * with its current contents: any discrepancy means we in category 1.
1188 ENTRY(xen_failsafe_callback)
1191 cmpw %cx, 0x10(%rsp)
1194 cmpw %cx, 0x18(%rsp)
1197 cmpw %cx, 0x20(%rsp)
1200 cmpw %cx, 0x28(%rsp)
1202 /* All segments match their saved values => Category 2 (Bad IRET). */
1207 UNWIND_HINT_IRET_REGS offset=8
1208 jmp general_protection
1209 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1213 UNWIND_HINT_IRET_REGS
1214 pushq $-1 /* orig_ax = -1 => not a system call */
1215 ALLOC_PT_GPREGS_ON_STACK
1218 ENCODE_FRAME_POINTER
1220 END(xen_failsafe_callback)
1222 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1223 xen_hvm_callback_vector xen_evtchn_do_upcall
1225 #endif /* CONFIG_XEN */
1227 #if IS_ENABLED(CONFIG_HYPERV)
1228 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1229 hyperv_callback_vector hyperv_vector_handler
1230 #endif /* CONFIG_HYPERV */
1232 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1233 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1234 idtentry stack_segment do_stack_segment has_error_code=1
1237 idtentry xennmi do_nmi has_error_code=0
1238 idtentry xendebug do_debug has_error_code=0
1239 idtentry xenint3 do_int3 has_error_code=0
1242 idtentry general_protection do_general_protection has_error_code=1
1243 idtentry page_fault do_page_fault has_error_code=1
1245 #ifdef CONFIG_KVM_GUEST
1246 idtentry async_page_fault do_async_page_fault has_error_code=1
1249 #ifdef CONFIG_X86_MCE
1250 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1254 * Save all registers in pt_regs, and switch gs if needed.
1255 * Use slow, but surefire "are we in kernel?" check.
1256 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1258 ENTRY(paranoid_entry)
1263 ENCODE_FRAME_POINTER 8
1265 movl $MSR_GS_BASE, %ecx
1268 js 1f /* negative -> in kernel */
1273 SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg=%rax save_reg=%r14
1279 * "Paranoid" exit path from exception stack. This is invoked
1280 * only on return from non-NMI IST interrupts that came
1281 * from kernel space.
1283 * We may be returning to very strange contexts (e.g. very early
1284 * in syscall entry), so checking for preemption here would
1285 * be complicated. Fortunately, we there's no good reason
1286 * to try to handle preemption here.
1288 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1290 ENTRY(paranoid_exit)
1292 DISABLE_INTERRUPTS(CLBR_ANY)
1293 TRACE_IRQS_OFF_DEBUG
1294 testl %ebx, %ebx /* swapgs needed? */
1295 jnz .Lparanoid_exit_no_swapgs
1297 RESTORE_CR3 scratch_reg=%rbx save_reg=%r14
1299 jmp .Lparanoid_exit_restore
1300 .Lparanoid_exit_no_swapgs:
1301 TRACE_IRQS_IRETQ_DEBUG
1302 .Lparanoid_exit_restore:
1303 jmp restore_regs_and_return_to_kernel
1307 * Save all registers in pt_regs, and switch gs if needed.
1308 * Return: EBX=0: came from user mode; EBX=1: otherwise
1315 ENCODE_FRAME_POINTER 8
1317 testb $3, CS+8(%rsp)
1318 jz .Lerror_kernelspace
1321 * We entered from user mode or we're pretending to have entered
1322 * from user mode due to an IRET fault.
1325 /* We have user CR3. Change to kernel CR3. */
1326 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
1328 .Lerror_entry_from_usermode_after_swapgs:
1329 /* Put us onto the real thread stack. */
1330 popq %r12 /* save return addr in %12 */
1331 movq %rsp, %rdi /* arg0 = pt_regs pointer */
1333 movq %rax, %rsp /* switch stack */
1334 ENCODE_FRAME_POINTER
1338 * We need to tell lockdep that IRQs are off. We can't do this until
1339 * we fix gsbase, and we should do it before enter_from_user_mode
1340 * (which can take locks).
1343 CALL_enter_from_user_mode
1351 * There are two places in the kernel that can potentially fault with
1352 * usergs. Handle them here. B stepping K8s sometimes report a
1353 * truncated RIP for IRET exceptions returning to compat mode. Check
1354 * for these here too.
1356 .Lerror_kernelspace:
1358 leaq native_irq_return_iret(%rip), %rcx
1359 cmpq %rcx, RIP+8(%rsp)
1361 movl %ecx, %eax /* zero extend */
1362 cmpq %rax, RIP+8(%rsp)
1364 cmpq $.Lgs_change, RIP+8(%rsp)
1365 jne .Lerror_entry_done
1368 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1369 * gsbase and proceed. We'll fix up the exception and land in
1370 * .Lgs_change's error handler with kernel gsbase.
1373 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
1374 jmp .Lerror_entry_done
1377 /* Fix truncated RIP */
1378 movq %rcx, RIP+8(%rsp)
1383 * We came from an IRET to user mode, so we have user
1384 * gsbase and CR3. Switch to kernel gsbase and CR3:
1387 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
1390 * Pretend that the exception came from user mode: set up pt_regs
1391 * as if we faulted immediately after IRET and clear EBX so that
1392 * error_exit knows that we will be returning to user mode.
1398 jmp .Lerror_entry_from_usermode_after_swapgs
1403 * On entry, EBX is a "return to kernel mode" flag:
1404 * 1: already in kernel mode, don't need SWAPGS
1405 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1409 DISABLE_INTERRUPTS(CLBR_ANY)
1417 * Runs on exception stack. Xen PV does not go through this path at all,
1418 * so we can use real assembly here.
1421 * %r14: Used to save/restore the CR3 of the interrupted context
1422 * when PAGE_TABLE_ISOLATION is in use. Do not clobber.
1425 UNWIND_HINT_IRET_REGS
1428 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1429 * the iretq it performs will take us out of NMI context.
1430 * This means that we can have nested NMIs where the next
1431 * NMI is using the top of the stack of the previous NMI. We
1432 * can't let it execute because the nested NMI will corrupt the
1433 * stack of the previous NMI. NMI handlers are not re-entrant
1436 * To handle this case we do the following:
1437 * Check the a special location on the stack that contains
1438 * a variable that is set when NMIs are executing.
1439 * The interrupted task's stack is also checked to see if it
1441 * If the variable is not set and the stack is not the NMI
1443 * o Set the special variable on the stack
1444 * o Copy the interrupt frame into an "outermost" location on the
1446 * o Copy the interrupt frame into an "iret" location on the stack
1447 * o Continue processing the NMI
1448 * If the variable is set or the previous stack is the NMI stack:
1449 * o Modify the "iret" location to jump to the repeat_nmi
1450 * o return back to the first NMI
1452 * Now on exit of the first NMI, we first clear the stack variable
1453 * The NMI stack will tell any nested NMIs at that point that it is
1454 * nested. Then we pop the stack normally with iret, and if there was
1455 * a nested NMI that updated the copy interrupt stack frame, a
1456 * jump will be made to the repeat_nmi code that will handle the second
1459 * However, espfix prevents us from directly returning to userspace
1460 * with a single IRET instruction. Similarly, IRET to user mode
1461 * can fault. We therefore handle NMIs from user space like
1462 * other IST entries.
1467 /* Use %rdx as our temp variable throughout */
1470 testb $3, CS-RIP+8(%rsp)
1471 jz .Lnmi_from_kernel
1474 * NMI from user mode. We need to run on the thread stack, but we
1475 * can't go through the normal entry paths: NMIs are masked, and
1476 * we don't want to enable interrupts, because then we'll end
1477 * up in an awkward situation in which IRQs are on but NMIs
1480 * We also must not push anything to the stack before switching
1481 * stacks lest we corrupt the "NMI executing" variable.
1486 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdx
1488 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1489 UNWIND_HINT_IRET_REGS base=%rdx offset=8
1490 pushq 5*8(%rdx) /* pt_regs->ss */
1491 pushq 4*8(%rdx) /* pt_regs->rsp */
1492 pushq 3*8(%rdx) /* pt_regs->flags */
1493 pushq 2*8(%rdx) /* pt_regs->cs */
1494 pushq 1*8(%rdx) /* pt_regs->rip */
1495 UNWIND_HINT_IRET_REGS
1496 pushq $-1 /* pt_regs->orig_ax */
1497 pushq %rdi /* pt_regs->di */
1498 pushq %rsi /* pt_regs->si */
1499 pushq (%rdx) /* pt_regs->dx */
1500 pushq %rcx /* pt_regs->cx */
1501 pushq %rax /* pt_regs->ax */
1502 pushq %r8 /* pt_regs->r8 */
1503 pushq %r9 /* pt_regs->r9 */
1504 pushq %r10 /* pt_regs->r10 */
1505 pushq %r11 /* pt_regs->r11 */
1506 pushq %rbx /* pt_regs->rbx */
1507 pushq %rbp /* pt_regs->rbp */
1508 pushq %r12 /* pt_regs->r12 */
1509 pushq %r13 /* pt_regs->r13 */
1510 pushq %r14 /* pt_regs->r14 */
1511 pushq %r15 /* pt_regs->r15 */
1513 ENCODE_FRAME_POINTER
1516 * At this point we no longer need to worry about stack damage
1517 * due to nesting -- we're on the normal thread stack and we're
1518 * done with the NMI stack.
1526 * Return back to user mode. We must *not* do the normal exit
1527 * work, because we don't want to enable interrupts.
1529 jmp swapgs_restore_regs_and_return_to_usermode
1533 * Here's what our stack frame will look like:
1534 * +---------------------------------------------------------+
1536 * | original Return RSP |
1537 * | original RFLAGS |
1540 * +---------------------------------------------------------+
1541 * | temp storage for rdx |
1542 * +---------------------------------------------------------+
1543 * | "NMI executing" variable |
1544 * +---------------------------------------------------------+
1545 * | iret SS } Copied from "outermost" frame |
1546 * | iret Return RSP } on each loop iteration; overwritten |
1547 * | iret RFLAGS } by a nested NMI to force another |
1548 * | iret CS } iteration if needed. |
1550 * +---------------------------------------------------------+
1551 * | outermost SS } initialized in first_nmi; |
1552 * | outermost Return RSP } will not be changed before |
1553 * | outermost RFLAGS } NMI processing is done. |
1554 * | outermost CS } Copied to "iret" frame on each |
1555 * | outermost RIP } iteration. |
1556 * +---------------------------------------------------------+
1558 * +---------------------------------------------------------+
1560 * The "original" frame is used by hardware. Before re-enabling
1561 * NMIs, we need to be done with it, and we need to leave enough
1562 * space for the asm code here.
1564 * We return by executing IRET while RSP points to the "iret" frame.
1565 * That will either return for real or it will loop back into NMI
1568 * The "outermost" frame is copied to the "iret" frame on each
1569 * iteration of the loop, so each iteration starts with the "iret"
1570 * frame pointing to the final return target.
1574 * Determine whether we're a nested NMI.
1576 * If we interrupted kernel code between repeat_nmi and
1577 * end_repeat_nmi, then we are a nested NMI. We must not
1578 * modify the "iret" frame because it's being written by
1579 * the outer NMI. That's okay; the outer NMI handler is
1580 * about to about to call do_nmi anyway, so we can just
1581 * resume the outer NMI.
1584 movq $repeat_nmi, %rdx
1587 movq $end_repeat_nmi, %rdx
1593 * Now check "NMI executing". If it's set, then we're nested.
1594 * This will not detect if we interrupted an outer NMI just
1601 * Now test if the previous stack was an NMI stack. This covers
1602 * the case where we interrupt an outer NMI after it clears
1603 * "NMI executing" but before IRET. We need to be careful, though:
1604 * there is one case in which RSP could point to the NMI stack
1605 * despite there being no NMI active: naughty userspace controls
1606 * RSP at the very beginning of the SYSCALL targets. We can
1607 * pull a fast one on naughty userspace, though: we program
1608 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1609 * if it controls the kernel's RSP. We set DF before we clear
1613 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1614 cmpq %rdx, 4*8(%rsp)
1615 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1618 subq $EXCEPTION_STKSZ, %rdx
1619 cmpq %rdx, 4*8(%rsp)
1620 /* If it is below the NMI stack, it is a normal NMI */
1623 /* Ah, it is within the NMI stack. */
1625 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1626 jz first_nmi /* RSP was user controlled. */
1628 /* This is a nested NMI. */
1632 * Modify the "iret" frame to point to repeat_nmi, forcing another
1633 * iteration of NMI handling.
1636 leaq -10*8(%rsp), %rdx
1643 /* Put stack back */
1649 /* We are returning to kernel mode, so this cannot result in a fault. */
1656 /* Make room for "NMI executing". */
1659 /* Leave room for the "iret" frame */
1662 /* Copy the "original" frame to the "outermost" frame */
1666 UNWIND_HINT_IRET_REGS
1668 /* Everything up to here is safe from nested NMIs */
1670 #ifdef CONFIG_DEBUG_ENTRY
1672 * For ease of testing, unmask NMIs right away. Disabled by
1673 * default because IRET is very expensive.
1676 pushq %rsp /* RSP (minus 8 because of the previous push) */
1677 addq $8, (%rsp) /* Fix up RSP */
1679 pushq $__KERNEL_CS /* CS */
1681 iretq /* continues at repeat_nmi below */
1682 UNWIND_HINT_IRET_REGS
1688 * If there was a nested NMI, the first NMI's iret will return
1689 * here. But NMIs are still enabled and we can take another
1690 * nested NMI. The nested NMI checks the interrupted RIP to see
1691 * if it is between repeat_nmi and end_repeat_nmi, and if so
1692 * it will just return, as we are about to repeat an NMI anyway.
1693 * This makes it safe to copy to the stack frame that a nested
1696 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1697 * we're repeating an NMI, gsbase has the same value that it had on
1698 * the first iteration. paranoid_entry will load the kernel
1699 * gsbase if needed before we call do_nmi. "NMI executing"
1702 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1705 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1706 * here must not modify the "iret" frame while we're writing to
1707 * it or it will end up containing garbage.
1717 * Everything below this point can be preempted by a nested NMI.
1718 * If this happens, then the inner NMI will change the "iret"
1719 * frame to point back to repeat_nmi.
1721 pushq $-1 /* ORIG_RAX: no syscall to restart */
1722 ALLOC_PT_GPREGS_ON_STACK
1725 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1726 * as we should not be calling schedule in NMI context.
1727 * Even with normal interrupts enabled. An NMI should not be
1728 * setting NEED_RESCHED or anything that normal interrupts and
1729 * exceptions might do.
1734 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1739 RESTORE_CR3 scratch_reg=%r15 save_reg=%r14
1741 testl %ebx, %ebx /* swapgs needed? */
1750 * Skip orig_ax and the "outermost" frame to point RSP at the "iret"
1751 * at the "iret" frame.
1756 * Clear "NMI executing". Set DF first so that we can easily
1757 * distinguish the remaining code between here and IRET from
1758 * the SYSCALL entry and exit paths.
1760 * We arguably should just inspect RIP instead, but I (Andy) wrote
1761 * this code when I had the misapprehension that Xen PV supported
1762 * NMIs, and Xen PV would break that approach.
1765 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1768 * iretq reads the "iret" frame and exits the NMI stack in a
1769 * single instruction. We are returning to kernel mode, so this
1770 * cannot result in a fault. Similarly, we don't need to worry
1771 * about espfix64 on the way back to kernel mode.
1776 ENTRY(ignore_sysret)
1782 ENTRY(rewind_stack_do_exit)
1784 /* Prevent any naive code from trying to unwind to our caller. */
1787 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1788 leaq -PTREGS_SIZE(%rax), %rsp
1789 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
1792 END(rewind_stack_do_exit)