1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/x86_64/entry.S
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
7 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
9 * entry.S contains the system-call and fault low-level handling routines.
11 * Some of this is documented in Documentation/x86/entry_64.txt
13 * A note on terminology:
14 * - iret frame: Architecture defined interrupt frame from SS to RIP
15 * at the top of the kernel process stack.
18 * - ENTRY/END: Define functions in the symbol table.
19 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
20 * - idtentry: Define exception entry points.
22 #include <linux/linkage.h>
23 #include <asm/segment.h>
24 #include <asm/cache.h>
25 #include <asm/errno.h>
27 #include <asm/asm-offsets.h>
29 #include <asm/unistd.h>
30 #include <asm/thread_info.h>
31 #include <asm/hw_irq.h>
32 #include <asm/page_types.h>
33 #include <asm/irqflags.h>
34 #include <asm/paravirt.h>
35 #include <asm/percpu.h>
38 #include <asm/pgtable_types.h>
39 #include <asm/export.h>
40 #include <asm/frame.h>
41 #include <linux/err.h>
44 .section .entry.text, "ax"
46 #ifdef CONFIG_PARAVIRT
47 ENTRY(native_usergs_sysret64)
51 END(native_usergs_sysret64)
52 #endif /* CONFIG_PARAVIRT */
54 .macro TRACE_IRQS_FLAGS flags:req
55 #ifdef CONFIG_TRACE_IRQFLAGS
56 bt $9, \flags /* interrupts off? */
63 .macro TRACE_IRQS_IRETQ
64 TRACE_IRQS_FLAGS EFLAGS(%rsp)
68 * When dynamic function tracer is enabled it will add a breakpoint
69 * to all locations that it is about to modify, sync CPUs, update
70 * all the code, sync CPUs, then remove the breakpoints. In this time
71 * if lockdep is enabled, it might jump back into the debug handler
72 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
74 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
75 * make sure the stack pointer does not get reset back to the top
76 * of the debug stack, and instead just reuses the current stack.
78 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
80 .macro TRACE_IRQS_OFF_DEBUG
81 call debug_stack_set_zero
83 call debug_stack_reset
86 .macro TRACE_IRQS_ON_DEBUG
87 call debug_stack_set_zero
89 call debug_stack_reset
92 .macro TRACE_IRQS_IRETQ_DEBUG
93 bt $9, EFLAGS(%rsp) /* interrupts off? */
100 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
101 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
102 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
106 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
108 * This is the only entry point used for 64-bit system calls. The
109 * hardware interface is reasonably well designed and the register to
110 * argument mapping Linux uses fits well with the registers that are
111 * available when SYSCALL is used.
113 * SYSCALL instructions can be found inlined in libc implementations as
114 * well as some other programs and libraries. There are also a handful
115 * of SYSCALL instructions in the vDSO used, for example, as a
116 * clock_gettimeofday fallback.
118 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
119 * then loads new ss, cs, and rip from previously programmed MSRs.
120 * rflags gets masked by a value from another MSR (so CLD and CLAC
121 * are not needed). SYSCALL does not save anything on the stack
122 * and does not change rsp.
124 * Registers on entry:
125 * rax system call number
127 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
131 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
134 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
136 * Only called from user space.
138 * When user can change pt_regs->foo always force IRET. That is because
139 * it deals with uncanonical addresses better. SYSRET has trouble
140 * with them due to bugs in both AMD and Intel CPUs.
143 .pushsection .entry_trampoline, "ax"
146 * The code in here gets remapped into cpu_entry_area's trampoline. This means
147 * that the assembler and linker have the wrong idea as to where this code
148 * lives (and, in fact, it's mapped more than once, so it's not even at a
149 * fixed address). So we can't reference any symbols outside the entry
150 * trampoline and expect it to work.
152 * Instead, we carefully abuse %rip-relative addressing.
153 * _entry_trampoline(%rip) refers to the start of the remapped) entry
154 * trampoline. We can thus find cpu_entry_area with this macro:
157 #define CPU_ENTRY_AREA \
158 _entry_trampoline - CPU_ENTRY_AREA_entry_trampoline(%rip)
160 /* The top word of the SYSENTER stack is hot and is usable as scratch space. */
161 #define RSP_SCRATCH CPU_ENTRY_AREA_SYSENTER_stack + \
162 SIZEOF_SYSENTER_stack - 8 + CPU_ENTRY_AREA
164 ENTRY(entry_SYSCALL_64_trampoline)
168 /* Stash the user RSP. */
169 movq %rsp, RSP_SCRATCH
171 /* Load the top of the task stack into RSP */
172 movq CPU_ENTRY_AREA_tss + TSS_sp1 + CPU_ENTRY_AREA, %rsp
174 /* Start building the simulated IRET frame. */
175 pushq $__USER_DS /* pt_regs->ss */
176 pushq RSP_SCRATCH /* pt_regs->sp */
177 pushq %r11 /* pt_regs->flags */
178 pushq $__USER_CS /* pt_regs->cs */
179 pushq %rcx /* pt_regs->ip */
182 * x86 lacks a near absolute jump, and we can't jump to the real
183 * entry text with a relative jump. We could push the target
184 * address and then use retq, but this destroys the pipeline on
185 * many CPUs (wasting over 20 cycles on Sandy Bridge). Instead,
186 * spill RDI and restore it in a second-stage trampoline.
189 movq $entry_SYSCALL_64_stage2, %rdi
191 END(entry_SYSCALL_64_trampoline)
195 ENTRY(entry_SYSCALL_64_stage2)
198 jmp entry_SYSCALL_64_after_hwframe
199 END(entry_SYSCALL_64_stage2)
201 ENTRY(entry_SYSCALL_64)
204 * Interrupts are off on entry.
205 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
206 * it is too small to ever cause noticeable irq latency.
210 movq %rsp, PER_CPU_VAR(rsp_scratch)
211 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
213 /* Construct struct pt_regs on stack */
214 pushq $__USER_DS /* pt_regs->ss */
215 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
216 pushq %r11 /* pt_regs->flags */
217 pushq $__USER_CS /* pt_regs->cs */
218 pushq %rcx /* pt_regs->ip */
219 GLOBAL(entry_SYSCALL_64_after_hwframe)
220 pushq %rax /* pt_regs->orig_ax */
221 pushq %rdi /* pt_regs->di */
222 pushq %rsi /* pt_regs->si */
223 pushq %rdx /* pt_regs->dx */
224 pushq %rcx /* pt_regs->cx */
225 pushq $-ENOSYS /* pt_regs->ax */
226 pushq %r8 /* pt_regs->r8 */
227 pushq %r9 /* pt_regs->r9 */
228 pushq %r10 /* pt_regs->r10 */
229 pushq %r11 /* pt_regs->r11 */
230 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
231 UNWIND_HINT_REGS extra=0
236 * If we need to do entry work or if we guess we'll need to do
237 * exit work, go straight to the slow path.
239 movq PER_CPU_VAR(current_task), %r11
240 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
241 jnz entry_SYSCALL64_slow_path
243 entry_SYSCALL_64_fastpath:
245 * Easy case: enable interrupts and issue the syscall. If the syscall
246 * needs pt_regs, we'll call a stub that disables interrupts again
247 * and jumps to the slow path.
250 ENABLE_INTERRUPTS(CLBR_NONE)
251 #if __SYSCALL_MASK == ~0
252 cmpq $__NR_syscall_max, %rax
254 andl $__SYSCALL_MASK, %eax
255 cmpl $__NR_syscall_max, %eax
257 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
261 * This call instruction is handled specially in stub_ptregs_64.
262 * It might end up jumping to the slow path. If it jumps, RAX
263 * and all argument registers are clobbered.
265 call *sys_call_table(, %rax, 8)
266 .Lentry_SYSCALL_64_after_fastpath_call:
272 * If we get here, then we know that pt_regs is clean for SYSRET64.
273 * If we see that no exit work is required (which we are required
274 * to check with IRQs off), then we can go straight to SYSRET64.
276 DISABLE_INTERRUPTS(CLBR_ANY)
278 movq PER_CPU_VAR(current_task), %r11
279 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
283 TRACE_IRQS_ON /* user mode is traced as IRQs on */
285 movq EFLAGS(%rsp), %r11
286 addq $6*8, %rsp /* skip extra regs -- they were preserved */
288 jmp .Lpop_c_regs_except_rcx_r11_and_sysret
292 * The fast path looked good when we started, but something changed
293 * along the way and we need to switch to the slow path. Calling
294 * raise(3) will trigger this, for example. IRQs are off.
297 ENABLE_INTERRUPTS(CLBR_ANY)
300 call syscall_return_slowpath /* returns with IRQs disabled */
301 jmp return_from_SYSCALL_64
303 entry_SYSCALL64_slow_path:
307 call do_syscall_64 /* returns with IRQs disabled */
309 return_from_SYSCALL_64:
310 TRACE_IRQS_IRETQ /* we're about to change IF */
313 * Try to use SYSRET instead of IRET if we're returning to
314 * a completely clean 64-bit userspace context. If we're not,
315 * go to the slow exit path.
320 cmpq %rcx, %r11 /* SYSRET requires RCX == RIP */
321 jne swapgs_restore_regs_and_return_to_usermode
324 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
325 * in kernel space. This essentially lets the user take over
326 * the kernel, since userspace controls RSP.
328 * If width of "canonical tail" ever becomes variable, this will need
329 * to be updated to remain correct on both old and new CPUs.
331 * Change top bits to match most significant bit (47th or 56th bit
332 * depending on paging mode) in the address.
334 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
335 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
337 /* If this changed %rcx, it was not canonical */
339 jne swapgs_restore_regs_and_return_to_usermode
341 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
342 jne swapgs_restore_regs_and_return_to_usermode
345 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
346 jne swapgs_restore_regs_and_return_to_usermode
349 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
350 * restore RF properly. If the slowpath sets it for whatever reason, we
351 * need to restore it correctly.
353 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
354 * trap from userspace immediately after SYSRET. This would cause an
355 * infinite loop whenever #DB happens with register state that satisfies
356 * the opportunistic SYSRET conditions. For example, single-stepping
359 * movq $stuck_here, %rcx
364 * would never get past 'stuck_here'.
366 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
367 jnz swapgs_restore_regs_and_return_to_usermode
369 /* nothing to check for RSP */
371 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
372 jne swapgs_restore_regs_and_return_to_usermode
375 * We win! This label is here just for ease of understanding
376 * perf profiles. Nothing jumps here.
378 syscall_return_via_sysret:
379 /* rcx and r11 are already restored (see code above) */
382 .Lpop_c_regs_except_rcx_r11_and_sysret:
383 popq %rsi /* skip r11 */
388 popq %rsi /* skip rcx */
393 * Now all regs are restored except RSP and RDI.
394 * Save old stack pointer and switch to trampoline stack.
397 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp
399 pushq RSP-RDI(%rdi) /* RSP */
400 pushq (%rdi) /* RDI */
403 * We are on the trampoline stack. All regs except RDI are live.
404 * We can do future final exit work right here.
410 END(entry_SYSCALL_64)
412 ENTRY(stub_ptregs_64)
414 * Syscalls marked as needing ptregs land here.
415 * If we are on the fast path, we need to save the extra regs,
416 * which we achieve by trying again on the slow path. If we are on
417 * the slow path, the extra regs are already saved.
419 * RAX stores a pointer to the C function implementing the syscall.
422 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
426 * Called from fast path -- disable IRQs again, pop return address
427 * and jump to slow path
429 DISABLE_INTERRUPTS(CLBR_ANY)
432 UNWIND_HINT_REGS extra=0
433 jmp entry_SYSCALL64_slow_path
436 jmp *%rax /* Called from C */
439 .macro ptregs_stub func
442 leaq \func(%rip), %rax
447 /* Instantiate ptregs_stub for each ptregs-using syscall */
448 #define __SYSCALL_64_QUAL_(sym)
449 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
450 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
451 #include <asm/syscalls_64.h>
457 ENTRY(__switch_to_asm)
460 * Save callee-saved registers
461 * This must match the order in inactive_task_frame
471 movq %rsp, TASK_threadsp(%rdi)
472 movq TASK_threadsp(%rsi), %rsp
474 #ifdef CONFIG_CC_STACKPROTECTOR
475 movq TASK_stack_canary(%rsi), %rbx
476 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
479 /* restore callee-saved registers */
491 * A newly forked process directly context switches into this address.
493 * rax: prev task we switched from
494 * rbx: kernel thread func (NULL for user thread)
495 * r12: kernel thread arg
500 call schedule_tail /* rdi: 'prev' task parameter */
502 testq %rbx, %rbx /* from kernel_thread? */
503 jnz 1f /* kernel threads are uncommon */
508 call syscall_return_slowpath /* returns with IRQs disabled */
509 TRACE_IRQS_ON /* user mode is traced as IRQS on */
510 jmp swapgs_restore_regs_and_return_to_usermode
517 * A kernel thread is allowed to return here after successfully
518 * calling do_execve(). Exit to userspace to complete the execve()
526 * Build the entry stubs with some assembler magic.
527 * We pack 1 stub into every 8-byte block.
530 ENTRY(irq_entries_start)
531 vector=FIRST_EXTERNAL_VECTOR
532 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
533 UNWIND_HINT_IRET_REGS
534 pushq $(~vector+0x80) /* Note: always in signed byte range */
539 END(irq_entries_start)
541 .macro DEBUG_ENTRY_ASSERT_IRQS_OFF
542 #ifdef CONFIG_DEBUG_ENTRY
545 testl $X86_EFLAGS_IF, %eax
554 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers
555 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone.
556 * Requires kernel GSBASE.
558 * The invariant is that, if irq_count != -1, then the IRQ stack is in use.
560 .macro ENTER_IRQ_STACK regs=1 old_rsp
561 DEBUG_ENTRY_ASSERT_IRQS_OFF
565 UNWIND_HINT_REGS base=\old_rsp
568 incl PER_CPU_VAR(irq_count)
569 jnz .Lirq_stack_push_old_rsp_\@
572 * Right now, if we just incremented irq_count to zero, we've
573 * claimed the IRQ stack but we haven't switched to it yet.
575 * If anything is added that can interrupt us here without using IST,
576 * it must be *extremely* careful to limit its stack usage. This
577 * could include kprobes and a hypothetical future IST-less #DB
580 * The OOPS unwinder relies on the word at the top of the IRQ
581 * stack linking back to the previous RSP for the entire time we're
582 * on the IRQ stack. For this to work reliably, we need to write
583 * it before we actually move ourselves to the IRQ stack.
586 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8)
587 movq PER_CPU_VAR(irq_stack_ptr), %rsp
589 #ifdef CONFIG_DEBUG_ENTRY
591 * If the first movq above becomes wrong due to IRQ stack layout
592 * changes, the only way we'll notice is if we try to unwind right
593 * here. Assert that we set up the stack right to catch this type
596 cmpq -8(%rsp), \old_rsp
597 je .Lirq_stack_okay\@
602 .Lirq_stack_push_old_rsp_\@:
606 UNWIND_HINT_REGS indirect=1
611 * Undoes ENTER_IRQ_STACK.
613 .macro LEAVE_IRQ_STACK regs=1
614 DEBUG_ENTRY_ASSERT_IRQS_OFF
615 /* We need to be off the IRQ stack before decrementing irq_count. */
623 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming
624 * the irq stack but we're not on it.
627 decl PER_CPU_VAR(irq_count)
631 * Interrupt entry/exit.
633 * Interrupt entry points save only callee clobbered registers in fast path.
635 * Entry runs with interrupts off.
638 /* 0(%rsp): ~(interrupt number) */
639 .macro interrupt func
642 testb $3, CS-ORIG_RAX(%rsp)
645 call switch_to_thread_stack
648 ALLOC_PT_GPREGS_ON_STACK
657 * IRQ from user mode.
659 * We need to tell lockdep that IRQs are off. We can't do this until
660 * we fix gsbase, and we should do it before enter_from_user_mode
661 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
662 * the simplest way to handle it is to just call it twice if
663 * we enter from user mode. There's no reason to optimize this since
664 * TRACE_IRQS_OFF is a no-op if lockdep is off.
668 CALL_enter_from_user_mode
671 ENTER_IRQ_STACK old_rsp=%rdi
672 /* We entered an interrupt context - irqs are off: */
675 call \func /* rdi points to pt_regs */
679 * The interrupt stubs push (~vector+0x80) onto the stack and
680 * then jump to common_interrupt.
682 .p2align CONFIG_X86_L1_CACHE_SHIFT
685 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
687 /* 0(%rsp): old RSP */
689 DISABLE_INTERRUPTS(CLBR_ANY)
697 /* Interrupt came from user space */
700 call prepare_exit_to_usermode
703 GLOBAL(swapgs_restore_regs_and_return_to_usermode)
704 #ifdef CONFIG_DEBUG_ENTRY
705 /* Assert that pt_regs indicates user mode. */
722 * The stack is now user RDI, orig_ax, RIP, CS, EFLAGS, RSP, SS.
723 * Save old stack pointer and switch to trampoline stack.
726 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp
728 /* Copy the IRET frame to the trampoline stack. */
729 pushq 6*8(%rdi) /* SS */
730 pushq 5*8(%rdi) /* RSP */
731 pushq 4*8(%rdi) /* EFLAGS */
732 pushq 3*8(%rdi) /* CS */
733 pushq 2*8(%rdi) /* RIP */
735 /* Push user RDI on the trampoline stack. */
739 * We are on the trampoline stack. All regs except RDI are live.
740 * We can do future final exit work right here.
749 /* Returning to kernel space */
751 #ifdef CONFIG_PREEMPT
752 /* Interrupts are off */
753 /* Check if we need preemption */
754 bt $9, EFLAGS(%rsp) /* were interrupts off? */
756 0: cmpl $0, PER_CPU_VAR(__preempt_count)
758 call preempt_schedule_irq
763 * The iretq could re-enable interrupts:
767 GLOBAL(restore_regs_and_return_to_kernel)
768 #ifdef CONFIG_DEBUG_ENTRY
769 /* Assert that pt_regs indicates kernel mode. */
777 addq $8, %rsp /* skip regs->orig_ax */
781 UNWIND_HINT_IRET_REGS
783 * Are we returning to a stack segment from the LDT? Note: in
784 * 64-bit mode SS:RSP on the exception stack is always valid.
786 #ifdef CONFIG_X86_ESPFIX64
787 testb $4, (SS-RIP)(%rsp)
788 jnz native_irq_return_ldt
791 .global native_irq_return_iret
792 native_irq_return_iret:
794 * This may fault. Non-paranoid faults on return to userspace are
795 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
796 * Double-faults due to espfix64 are handled in do_double_fault.
797 * Other faults here are fatal.
801 #ifdef CONFIG_X86_ESPFIX64
802 native_irq_return_ldt:
804 * We are running with user GSBASE. All GPRs contain their user
805 * values. We have a percpu ESPFIX stack that is eight slots
806 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
807 * of the ESPFIX stack.
809 * We clobber RAX and RDI in this code. We stash RDI on the
810 * normal stack and RAX on the ESPFIX stack.
812 * The ESPFIX stack layout we set up looks like this:
814 * --- top of ESPFIX stack ---
819 * RIP <-- RSP points here when we're done
820 * RAX <-- espfix_waddr points here
821 * --- bottom of ESPFIX stack ---
824 pushq %rdi /* Stash user RDI */
826 movq PER_CPU_VAR(espfix_waddr), %rdi
827 movq %rax, (0*8)(%rdi) /* user RAX */
828 movq (1*8)(%rsp), %rax /* user RIP */
829 movq %rax, (1*8)(%rdi)
830 movq (2*8)(%rsp), %rax /* user CS */
831 movq %rax, (2*8)(%rdi)
832 movq (3*8)(%rsp), %rax /* user RFLAGS */
833 movq %rax, (3*8)(%rdi)
834 movq (5*8)(%rsp), %rax /* user SS */
835 movq %rax, (5*8)(%rdi)
836 movq (4*8)(%rsp), %rax /* user RSP */
837 movq %rax, (4*8)(%rdi)
838 /* Now RAX == RSP. */
840 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
841 popq %rdi /* Restore user RDI */
844 * espfix_stack[31:16] == 0. The page tables are set up such that
845 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
846 * espfix_waddr for any X. That is, there are 65536 RO aliases of
847 * the same page. Set up RSP so that RSP[31:16] contains the
848 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
849 * still points to an RO alias of the ESPFIX stack.
851 orq PER_CPU_VAR(espfix_stack), %rax
854 UNWIND_HINT_IRET_REGS offset=8
857 * At this point, we cannot write to the stack any more, but we can
860 popq %rax /* Restore user RAX */
863 * RSP now points to an ordinary IRET frame, except that the page
864 * is read-only and RSP[31:16] are preloaded with the userspace
865 * values. We can now IRET back to userspace.
867 jmp native_irq_return_iret
869 END(common_interrupt)
874 .macro apicinterrupt3 num sym do_sym
876 UNWIND_HINT_IRET_REGS
885 /* Make sure APIC interrupt handlers end up in the irqentry section: */
886 #define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
887 #define POP_SECTION_IRQENTRY .popsection
889 .macro apicinterrupt num sym do_sym
890 PUSH_SECTION_IRQENTRY
891 apicinterrupt3 \num \sym \do_sym
896 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
897 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
901 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
904 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
905 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
907 #ifdef CONFIG_HAVE_KVM
908 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
909 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
910 apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi
913 #ifdef CONFIG_X86_MCE_THRESHOLD
914 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
917 #ifdef CONFIG_X86_MCE_AMD
918 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
921 #ifdef CONFIG_X86_THERMAL_VECTOR
922 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
926 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
927 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
928 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
931 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
932 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
934 #ifdef CONFIG_IRQ_WORK
935 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
939 * Exception entry points.
941 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + ((x) - 1) * 8)
944 * Switch to the thread stack. This is called with the IRET frame and
945 * orig_ax on the stack. (That is, RDI..R12 are not on the stack and
946 * space has not been allocated for them.)
948 ENTRY(switch_to_thread_stack)
953 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
954 UNWIND_HINT sp_offset=16 sp_reg=ORC_REG_DI
956 pushq 7*8(%rdi) /* regs->ss */
957 pushq 6*8(%rdi) /* regs->rsp */
958 pushq 5*8(%rdi) /* regs->eflags */
959 pushq 4*8(%rdi) /* regs->cs */
960 pushq 3*8(%rdi) /* regs->ip */
961 pushq 2*8(%rdi) /* regs->orig_ax */
962 pushq 8(%rdi) /* return address */
967 END(switch_to_thread_stack)
969 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
971 UNWIND_HINT_IRET_REGS offset=\has_error_code*8
974 .if \shift_ist != -1 && \paranoid == 0
975 .error "using shift_ist requires paranoid=1"
980 .if \has_error_code == 0
981 pushq $-1 /* ORIG_RAX: no syscall to restart */
984 ALLOC_PT_GPREGS_ON_STACK
987 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
988 jnz .Lfrom_usermode_switch_stack_\@
997 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
1000 .if \shift_ist != -1
1001 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
1007 movq %rsp, %rdi /* pt_regs pointer */
1010 movq ORIG_RAX(%rsp), %rsi /* get error code */
1011 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
1013 xorl %esi, %esi /* no error code */
1016 .if \shift_ist != -1
1017 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1022 .if \shift_ist != -1
1023 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1026 /* these procedures expect "no swapgs" flag in ebx */
1035 * Entry from userspace. Switch stacks and treat it
1036 * as a normal entry. This means that paranoid handlers
1037 * run in real process context if user_mode(regs).
1039 .Lfrom_usermode_switch_stack_\@:
1042 movq %rsp, %rdi /* pt_regs pointer */
1045 movq ORIG_RAX(%rsp), %rsi /* get error code */
1046 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
1048 xorl %esi, %esi /* no error code */
1053 jmp error_exit /* %ebx: no swapgs flag */
1058 idtentry divide_error do_divide_error has_error_code=0
1059 idtentry overflow do_overflow has_error_code=0
1060 idtentry bounds do_bounds has_error_code=0
1061 idtentry invalid_op do_invalid_op has_error_code=0
1062 idtentry device_not_available do_device_not_available has_error_code=0
1063 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1064 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1065 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1066 idtentry segment_not_present do_segment_not_present has_error_code=1
1067 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1068 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1069 idtentry alignment_check do_alignment_check has_error_code=1
1070 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1074 * Reload gs selector with exception handling
1077 ENTRY(native_load_gs_index)
1080 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1085 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
1087 TRACE_IRQS_FLAGS (%rsp)
1091 ENDPROC(native_load_gs_index)
1092 EXPORT_SYMBOL(native_load_gs_index)
1094 _ASM_EXTABLE(.Lgs_change, bad_gs)
1095 .section .fixup, "ax"
1096 /* running with kernelgs */
1098 SWAPGS /* switch back to user gs */
1100 /* This can't be a string because the preprocessor needs to see it. */
1101 movl $__USER_DS, %eax
1104 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
1110 /* Call softirq on interrupt stack. Interrupts are off. */
1111 ENTRY(do_softirq_own_stack)
1114 ENTER_IRQ_STACK regs=0 old_rsp=%r11
1116 LEAVE_IRQ_STACK regs=0
1119 ENDPROC(do_softirq_own_stack)
1122 idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1125 * A note on the "critical region" in our callback handler.
1126 * We want to avoid stacking callback handlers due to events occurring
1127 * during handling of the last event. To do this, we keep events disabled
1128 * until we've done all processing. HOWEVER, we must enable events before
1129 * popping the stack frame (can't be done atomically) and so it would still
1130 * be possible to get enough handler activations to overflow the stack.
1131 * Although unlikely, bugs of that kind are hard to track down, so we'd
1132 * like to avoid the possibility.
1133 * So, on entry to the handler we detect whether we interrupted an
1134 * existing activation in its critical region -- if so, we pop the current
1135 * activation and restart the handler using the previous one.
1137 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
1140 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1141 * see the correct pointer to the pt_regs
1144 movq %rdi, %rsp /* we don't return, adjust the stack frame */
1147 ENTER_IRQ_STACK old_rsp=%r10
1148 call xen_evtchn_do_upcall
1151 #ifndef CONFIG_PREEMPT
1152 call xen_maybe_preempt_hcall
1155 END(xen_do_hypervisor_callback)
1158 * Hypervisor uses this for application faults while it executes.
1159 * We get here for two reasons:
1160 * 1. Fault while reloading DS, ES, FS or GS
1161 * 2. Fault while executing IRET
1162 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1163 * registers that could be reloaded and zeroed the others.
1164 * Category 2 we fix up by killing the current process. We cannot use the
1165 * normal Linux return path in this case because if we use the IRET hypercall
1166 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1167 * We distinguish between categories by comparing each saved segment register
1168 * with its current contents: any discrepancy means we in category 1.
1170 ENTRY(xen_failsafe_callback)
1173 cmpw %cx, 0x10(%rsp)
1176 cmpw %cx, 0x18(%rsp)
1179 cmpw %cx, 0x20(%rsp)
1182 cmpw %cx, 0x28(%rsp)
1184 /* All segments match their saved values => Category 2 (Bad IRET). */
1189 UNWIND_HINT_IRET_REGS offset=8
1190 jmp general_protection
1191 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1195 UNWIND_HINT_IRET_REGS
1196 pushq $-1 /* orig_ax = -1 => not a system call */
1197 ALLOC_PT_GPREGS_ON_STACK
1200 ENCODE_FRAME_POINTER
1202 END(xen_failsafe_callback)
1204 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1205 xen_hvm_callback_vector xen_evtchn_do_upcall
1207 #endif /* CONFIG_XEN */
1209 #if IS_ENABLED(CONFIG_HYPERV)
1210 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1211 hyperv_callback_vector hyperv_vector_handler
1212 #endif /* CONFIG_HYPERV */
1214 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1215 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1216 idtentry stack_segment do_stack_segment has_error_code=1
1219 idtentry xennmi do_nmi has_error_code=0
1220 idtentry xendebug do_debug has_error_code=0
1221 idtentry xenint3 do_int3 has_error_code=0
1224 idtentry general_protection do_general_protection has_error_code=1
1225 idtentry page_fault do_page_fault has_error_code=1
1227 #ifdef CONFIG_KVM_GUEST
1228 idtentry async_page_fault do_async_page_fault has_error_code=1
1231 #ifdef CONFIG_X86_MCE
1232 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1236 * Save all registers in pt_regs, and switch gs if needed.
1237 * Use slow, but surefire "are we in kernel?" check.
1238 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1240 ENTRY(paranoid_entry)
1245 ENCODE_FRAME_POINTER 8
1247 movl $MSR_GS_BASE, %ecx
1250 js 1f /* negative -> in kernel */
1257 * "Paranoid" exit path from exception stack. This is invoked
1258 * only on return from non-NMI IST interrupts that came
1259 * from kernel space.
1261 * We may be returning to very strange contexts (e.g. very early
1262 * in syscall entry), so checking for preemption here would
1263 * be complicated. Fortunately, we there's no good reason
1264 * to try to handle preemption here.
1266 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1268 ENTRY(paranoid_exit)
1270 DISABLE_INTERRUPTS(CLBR_ANY)
1271 TRACE_IRQS_OFF_DEBUG
1272 testl %ebx, %ebx /* swapgs needed? */
1273 jnz .Lparanoid_exit_no_swapgs
1276 jmp .Lparanoid_exit_restore
1277 .Lparanoid_exit_no_swapgs:
1278 TRACE_IRQS_IRETQ_DEBUG
1279 .Lparanoid_exit_restore:
1280 jmp restore_regs_and_return_to_kernel
1284 * Save all registers in pt_regs, and switch gs if needed.
1285 * Return: EBX=0: came from user mode; EBX=1: otherwise
1292 ENCODE_FRAME_POINTER 8
1294 testb $3, CS+8(%rsp)
1295 jz .Lerror_kernelspace
1298 * We entered from user mode or we're pretending to have entered
1299 * from user mode due to an IRET fault.
1303 .Lerror_entry_from_usermode_after_swapgs:
1304 /* Put us onto the real thread stack. */
1305 popq %r12 /* save return addr in %12 */
1306 movq %rsp, %rdi /* arg0 = pt_regs pointer */
1308 movq %rax, %rsp /* switch stack */
1309 ENCODE_FRAME_POINTER
1313 * We need to tell lockdep that IRQs are off. We can't do this until
1314 * we fix gsbase, and we should do it before enter_from_user_mode
1315 * (which can take locks).
1318 CALL_enter_from_user_mode
1326 * There are two places in the kernel that can potentially fault with
1327 * usergs. Handle them here. B stepping K8s sometimes report a
1328 * truncated RIP for IRET exceptions returning to compat mode. Check
1329 * for these here too.
1331 .Lerror_kernelspace:
1333 leaq native_irq_return_iret(%rip), %rcx
1334 cmpq %rcx, RIP+8(%rsp)
1336 movl %ecx, %eax /* zero extend */
1337 cmpq %rax, RIP+8(%rsp)
1339 cmpq $.Lgs_change, RIP+8(%rsp)
1340 jne .Lerror_entry_done
1343 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1344 * gsbase and proceed. We'll fix up the exception and land in
1345 * .Lgs_change's error handler with kernel gsbase.
1348 jmp .Lerror_entry_done
1351 /* Fix truncated RIP */
1352 movq %rcx, RIP+8(%rsp)
1357 * We came from an IRET to user mode, so we have user gsbase.
1358 * Switch to kernel gsbase:
1363 * Pretend that the exception came from user mode: set up pt_regs
1364 * as if we faulted immediately after IRET and clear EBX so that
1365 * error_exit knows that we will be returning to user mode.
1371 jmp .Lerror_entry_from_usermode_after_swapgs
1376 * On entry, EBX is a "return to kernel mode" flag:
1377 * 1: already in kernel mode, don't need SWAPGS
1378 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1382 DISABLE_INTERRUPTS(CLBR_ANY)
1390 * Runs on exception stack. Xen PV does not go through this path at all,
1391 * so we can use real assembly here.
1394 UNWIND_HINT_IRET_REGS
1397 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1398 * the iretq it performs will take us out of NMI context.
1399 * This means that we can have nested NMIs where the next
1400 * NMI is using the top of the stack of the previous NMI. We
1401 * can't let it execute because the nested NMI will corrupt the
1402 * stack of the previous NMI. NMI handlers are not re-entrant
1405 * To handle this case we do the following:
1406 * Check the a special location on the stack that contains
1407 * a variable that is set when NMIs are executing.
1408 * The interrupted task's stack is also checked to see if it
1410 * If the variable is not set and the stack is not the NMI
1412 * o Set the special variable on the stack
1413 * o Copy the interrupt frame into an "outermost" location on the
1415 * o Copy the interrupt frame into an "iret" location on the stack
1416 * o Continue processing the NMI
1417 * If the variable is set or the previous stack is the NMI stack:
1418 * o Modify the "iret" location to jump to the repeat_nmi
1419 * o return back to the first NMI
1421 * Now on exit of the first NMI, we first clear the stack variable
1422 * The NMI stack will tell any nested NMIs at that point that it is
1423 * nested. Then we pop the stack normally with iret, and if there was
1424 * a nested NMI that updated the copy interrupt stack frame, a
1425 * jump will be made to the repeat_nmi code that will handle the second
1428 * However, espfix prevents us from directly returning to userspace
1429 * with a single IRET instruction. Similarly, IRET to user mode
1430 * can fault. We therefore handle NMIs from user space like
1431 * other IST entries.
1436 /* Use %rdx as our temp variable throughout */
1439 testb $3, CS-RIP+8(%rsp)
1440 jz .Lnmi_from_kernel
1443 * NMI from user mode. We need to run on the thread stack, but we
1444 * can't go through the normal entry paths: NMIs are masked, and
1445 * we don't want to enable interrupts, because then we'll end
1446 * up in an awkward situation in which IRQs are on but NMIs
1449 * We also must not push anything to the stack before switching
1450 * stacks lest we corrupt the "NMI executing" variable.
1456 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1457 UNWIND_HINT_IRET_REGS base=%rdx offset=8
1458 pushq 5*8(%rdx) /* pt_regs->ss */
1459 pushq 4*8(%rdx) /* pt_regs->rsp */
1460 pushq 3*8(%rdx) /* pt_regs->flags */
1461 pushq 2*8(%rdx) /* pt_regs->cs */
1462 pushq 1*8(%rdx) /* pt_regs->rip */
1463 UNWIND_HINT_IRET_REGS
1464 pushq $-1 /* pt_regs->orig_ax */
1465 pushq %rdi /* pt_regs->di */
1466 pushq %rsi /* pt_regs->si */
1467 pushq (%rdx) /* pt_regs->dx */
1468 pushq %rcx /* pt_regs->cx */
1469 pushq %rax /* pt_regs->ax */
1470 pushq %r8 /* pt_regs->r8 */
1471 pushq %r9 /* pt_regs->r9 */
1472 pushq %r10 /* pt_regs->r10 */
1473 pushq %r11 /* pt_regs->r11 */
1474 pushq %rbx /* pt_regs->rbx */
1475 pushq %rbp /* pt_regs->rbp */
1476 pushq %r12 /* pt_regs->r12 */
1477 pushq %r13 /* pt_regs->r13 */
1478 pushq %r14 /* pt_regs->r14 */
1479 pushq %r15 /* pt_regs->r15 */
1481 ENCODE_FRAME_POINTER
1484 * At this point we no longer need to worry about stack damage
1485 * due to nesting -- we're on the normal thread stack and we're
1486 * done with the NMI stack.
1494 * Return back to user mode. We must *not* do the normal exit
1495 * work, because we don't want to enable interrupts.
1497 jmp swapgs_restore_regs_and_return_to_usermode
1501 * Here's what our stack frame will look like:
1502 * +---------------------------------------------------------+
1504 * | original Return RSP |
1505 * | original RFLAGS |
1508 * +---------------------------------------------------------+
1509 * | temp storage for rdx |
1510 * +---------------------------------------------------------+
1511 * | "NMI executing" variable |
1512 * +---------------------------------------------------------+
1513 * | iret SS } Copied from "outermost" frame |
1514 * | iret Return RSP } on each loop iteration; overwritten |
1515 * | iret RFLAGS } by a nested NMI to force another |
1516 * | iret CS } iteration if needed. |
1518 * +---------------------------------------------------------+
1519 * | outermost SS } initialized in first_nmi; |
1520 * | outermost Return RSP } will not be changed before |
1521 * | outermost RFLAGS } NMI processing is done. |
1522 * | outermost CS } Copied to "iret" frame on each |
1523 * | outermost RIP } iteration. |
1524 * +---------------------------------------------------------+
1526 * +---------------------------------------------------------+
1528 * The "original" frame is used by hardware. Before re-enabling
1529 * NMIs, we need to be done with it, and we need to leave enough
1530 * space for the asm code here.
1532 * We return by executing IRET while RSP points to the "iret" frame.
1533 * That will either return for real or it will loop back into NMI
1536 * The "outermost" frame is copied to the "iret" frame on each
1537 * iteration of the loop, so each iteration starts with the "iret"
1538 * frame pointing to the final return target.
1542 * Determine whether we're a nested NMI.
1544 * If we interrupted kernel code between repeat_nmi and
1545 * end_repeat_nmi, then we are a nested NMI. We must not
1546 * modify the "iret" frame because it's being written by
1547 * the outer NMI. That's okay; the outer NMI handler is
1548 * about to about to call do_nmi anyway, so we can just
1549 * resume the outer NMI.
1552 movq $repeat_nmi, %rdx
1555 movq $end_repeat_nmi, %rdx
1561 * Now check "NMI executing". If it's set, then we're nested.
1562 * This will not detect if we interrupted an outer NMI just
1569 * Now test if the previous stack was an NMI stack. This covers
1570 * the case where we interrupt an outer NMI after it clears
1571 * "NMI executing" but before IRET. We need to be careful, though:
1572 * there is one case in which RSP could point to the NMI stack
1573 * despite there being no NMI active: naughty userspace controls
1574 * RSP at the very beginning of the SYSCALL targets. We can
1575 * pull a fast one on naughty userspace, though: we program
1576 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1577 * if it controls the kernel's RSP. We set DF before we clear
1581 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1582 cmpq %rdx, 4*8(%rsp)
1583 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1586 subq $EXCEPTION_STKSZ, %rdx
1587 cmpq %rdx, 4*8(%rsp)
1588 /* If it is below the NMI stack, it is a normal NMI */
1591 /* Ah, it is within the NMI stack. */
1593 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1594 jz first_nmi /* RSP was user controlled. */
1596 /* This is a nested NMI. */
1600 * Modify the "iret" frame to point to repeat_nmi, forcing another
1601 * iteration of NMI handling.
1604 leaq -10*8(%rsp), %rdx
1611 /* Put stack back */
1617 /* We are returning to kernel mode, so this cannot result in a fault. */
1624 /* Make room for "NMI executing". */
1627 /* Leave room for the "iret" frame */
1630 /* Copy the "original" frame to the "outermost" frame */
1634 UNWIND_HINT_IRET_REGS
1636 /* Everything up to here is safe from nested NMIs */
1638 #ifdef CONFIG_DEBUG_ENTRY
1640 * For ease of testing, unmask NMIs right away. Disabled by
1641 * default because IRET is very expensive.
1644 pushq %rsp /* RSP (minus 8 because of the previous push) */
1645 addq $8, (%rsp) /* Fix up RSP */
1647 pushq $__KERNEL_CS /* CS */
1649 iretq /* continues at repeat_nmi below */
1650 UNWIND_HINT_IRET_REGS
1656 * If there was a nested NMI, the first NMI's iret will return
1657 * here. But NMIs are still enabled and we can take another
1658 * nested NMI. The nested NMI checks the interrupted RIP to see
1659 * if it is between repeat_nmi and end_repeat_nmi, and if so
1660 * it will just return, as we are about to repeat an NMI anyway.
1661 * This makes it safe to copy to the stack frame that a nested
1664 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1665 * we're repeating an NMI, gsbase has the same value that it had on
1666 * the first iteration. paranoid_entry will load the kernel
1667 * gsbase if needed before we call do_nmi. "NMI executing"
1670 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1673 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1674 * here must not modify the "iret" frame while we're writing to
1675 * it or it will end up containing garbage.
1685 * Everything below this point can be preempted by a nested NMI.
1686 * If this happens, then the inner NMI will change the "iret"
1687 * frame to point back to repeat_nmi.
1689 pushq $-1 /* ORIG_RAX: no syscall to restart */
1690 ALLOC_PT_GPREGS_ON_STACK
1693 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1694 * as we should not be calling schedule in NMI context.
1695 * Even with normal interrupts enabled. An NMI should not be
1696 * setting NEED_RESCHED or anything that normal interrupts and
1697 * exceptions might do.
1702 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1707 testl %ebx, %ebx /* swapgs needed? */
1716 * Skip orig_ax and the "outermost" frame to point RSP at the "iret"
1717 * at the "iret" frame.
1722 * Clear "NMI executing". Set DF first so that we can easily
1723 * distinguish the remaining code between here and IRET from
1724 * the SYSCALL entry and exit paths.
1726 * We arguably should just inspect RIP instead, but I (Andy) wrote
1727 * this code when I had the misapprehension that Xen PV supported
1728 * NMIs, and Xen PV would break that approach.
1731 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1734 * iretq reads the "iret" frame and exits the NMI stack in a
1735 * single instruction. We are returning to kernel mode, so this
1736 * cannot result in a fault. Similarly, we don't need to worry
1737 * about espfix64 on the way back to kernel mode.
1742 ENTRY(ignore_sysret)
1748 ENTRY(rewind_stack_do_exit)
1750 /* Prevent any naive code from trying to unwind to our caller. */
1753 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1754 leaq -PTREGS_SIZE(%rax), %rsp
1755 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
1758 END(rewind_stack_do_exit)