2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
16 #include <linux/dma-mapping.h>
17 #include <linux/vmalloc.h>
18 #include <asm/tlbflush.h>
19 #include <asm/homecache.h>
21 /* Generic DMA mapping functions: */
24 * Allocate what Linux calls "coherent" memory, which for us just
27 void *dma_alloc_coherent(struct device *dev,
29 dma_addr_t *dma_handle,
32 u64 dma_mask = dev->coherent_dma_mask ?: DMA_BIT_MASK(32);
33 int node = dev_to_node(dev);
34 int order = get_order(size);
38 /* Set GFP_KERNEL to ensure we have memory with a kernel VA. */
39 gfp |= GFP_KERNEL | __GFP_ZERO;
42 * By forcing NUMA node 0 for 32-bit masks we ensure that the
43 * high 32 bits of the resulting PA will be zero. If the mask
44 * size is, e.g., 24, we may still not be able to guarantee a
45 * suitable memory address, in which case we will return NULL.
46 * But such devices are uncommon.
48 if (dma_mask <= DMA_BIT_MASK(32))
51 pg = homecache_alloc_pages_node(node, gfp, order, PAGE_HOME_UNCACHED);
55 addr = page_to_phys(pg);
56 if (addr + size > dma_mask) {
57 homecache_free_pages(addr, order);
62 return page_address(pg);
64 EXPORT_SYMBOL(dma_alloc_coherent);
67 * Free memory that was allocated with dma_alloc_coherent.
69 void dma_free_coherent(struct device *dev, size_t size,
70 void *vaddr, dma_addr_t dma_handle)
72 homecache_free_pages((unsigned long)vaddr, get_order(size));
74 EXPORT_SYMBOL(dma_free_coherent);
77 * The map routines "map" the specified address range for DMA
78 * accesses. The memory belongs to the device after this call is
79 * issued, until it is unmapped with dma_unmap_single.
81 * We don't need to do any mapping, we just flush the address range
82 * out of the cache and return a DMA address.
84 * The unmap routines do whatever is necessary before the processor
85 * accesses the memory again, and must be called before the driver
86 * touches the memory. We can get away with a cache invalidate if we
87 * can count on nothing having been touched.
92 * dma_map_single can be passed any memory address, and there appear
93 * to be no alignment constraints.
95 * There is a chance that the start of the buffer will share a cache
96 * line with some other data that has been touched in the meantime.
98 dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
99 enum dma_data_direction direction)
105 BUG_ON(!valid_dma_direction(direction));
108 dma_addr = __pa(ptr);
110 /* We might have been handed a buffer that wraps a page boundary */
111 while ((int)size > 0) {
112 /* The amount to flush that's on this page */
113 thispage = PAGE_SIZE - ((unsigned long)ptr & (PAGE_SIZE - 1));
114 thispage = min((int)thispage, (int)size);
115 /* Is this valid for any page we could be handed? */
116 page = pfn_to_page(kaddr_to_pfn(ptr));
117 homecache_flush_cache(page, 0);
124 EXPORT_SYMBOL(dma_map_single);
126 void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
127 enum dma_data_direction direction)
129 BUG_ON(!valid_dma_direction(direction));
131 EXPORT_SYMBOL(dma_unmap_single);
133 int dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
134 enum dma_data_direction direction)
136 struct scatterlist *sg;
139 BUG_ON(!valid_dma_direction(direction));
141 WARN_ON(nents == 0 || sglist->length == 0);
143 for_each_sg(sglist, sg, nents, i) {
145 sg->dma_address = sg_phys(sg);
146 page = pfn_to_page(sg->dma_address >> PAGE_SHIFT);
147 homecache_flush_cache(page, 0);
152 EXPORT_SYMBOL(dma_map_sg);
154 void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
155 enum dma_data_direction direction)
157 BUG_ON(!valid_dma_direction(direction));
159 EXPORT_SYMBOL(dma_unmap_sg);
161 dma_addr_t dma_map_page(struct device *dev, struct page *page,
162 unsigned long offset, size_t size,
163 enum dma_data_direction direction)
165 BUG_ON(!valid_dma_direction(direction));
167 homecache_flush_cache(page, 0);
169 return page_to_pa(page) + offset;
171 EXPORT_SYMBOL(dma_map_page);
173 void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
174 enum dma_data_direction direction)
176 BUG_ON(!valid_dma_direction(direction));
178 EXPORT_SYMBOL(dma_unmap_page);
180 void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
181 size_t size, enum dma_data_direction direction)
183 BUG_ON(!valid_dma_direction(direction));
185 EXPORT_SYMBOL(dma_sync_single_for_cpu);
187 void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
188 size_t size, enum dma_data_direction direction)
190 unsigned long start = PFN_DOWN(dma_handle);
191 unsigned long end = PFN_DOWN(dma_handle + size - 1);
194 BUG_ON(!valid_dma_direction(direction));
195 for (i = start; i <= end; ++i)
196 homecache_flush_cache(pfn_to_page(i), 0);
198 EXPORT_SYMBOL(dma_sync_single_for_device);
200 void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
201 enum dma_data_direction direction)
203 BUG_ON(!valid_dma_direction(direction));
204 WARN_ON(nelems == 0 || sg[0].length == 0);
206 EXPORT_SYMBOL(dma_sync_sg_for_cpu);
209 * Flush and invalidate cache for scatterlist.
211 void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,
212 int nelems, enum dma_data_direction direction)
214 struct scatterlist *sg;
217 BUG_ON(!valid_dma_direction(direction));
218 WARN_ON(nelems == 0 || sglist->length == 0);
220 for_each_sg(sglist, sg, nelems, i) {
221 dma_sync_single_for_device(dev, sg->dma_address,
222 sg_dma_len(sg), direction);
225 EXPORT_SYMBOL(dma_sync_sg_for_device);
227 void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
228 unsigned long offset, size_t size,
229 enum dma_data_direction direction)
231 dma_sync_single_for_cpu(dev, dma_handle + offset, size, direction);
233 EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
235 void dma_sync_single_range_for_device(struct device *dev,
236 dma_addr_t dma_handle,
237 unsigned long offset, size_t size,
238 enum dma_data_direction direction)
240 dma_sync_single_for_device(dev, dma_handle + offset, size, direction);
242 EXPORT_SYMBOL(dma_sync_single_range_for_device);
245 * dma_alloc_noncoherent() returns non-cacheable memory, so there's no
246 * need to do any flushing here.
248 void dma_cache_sync(void *vaddr, size_t size,
249 enum dma_data_direction direction)
252 EXPORT_SYMBOL(dma_cache_sync);