2 * Routines providing a simple monitor for use on the PowerMac.
4 * Copyright (C) 1996-2005 Paul Mackerras.
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
14 #include <linux/kernel.h>
15 #include <linux/errno.h>
16 #include <linux/sched/signal.h>
17 #include <linux/smp.h>
19 #include <linux/reboot.h>
20 #include <linux/delay.h>
21 #include <linux/kallsyms.h>
22 #include <linux/kmsg_dump.h>
23 #include <linux/cpumask.h>
24 #include <linux/export.h>
25 #include <linux/sysrq.h>
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/bug.h>
29 #include <linux/nmi.h>
30 #include <linux/ctype.h>
31 #include <linux/highmem.h>
33 #include <asm/debugfs.h>
34 #include <asm/ptrace.h>
36 #include <asm/string.h>
38 #include <asm/machdep.h>
40 #include <asm/processor.h>
41 #include <asm/pgtable.h>
43 #include <asm/mmu_context.h>
44 #include <asm/plpar_wrappers.h>
45 #include <asm/cputable.h>
47 #include <asm/sstep.h>
48 #include <asm/irq_regs.h>
50 #include <asm/spu_priv1.h>
51 #include <asm/setjmp.h>
53 #include <asm/debug.h>
54 #include <asm/hw_breakpoint.h>
57 #include <asm/firmware.h>
58 #include <asm/code-patching.h>
61 #include <asm/hvcall.h>
69 static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
70 static unsigned long xmon_taken = 1;
71 static int xmon_owner;
75 #endif /* CONFIG_SMP */
77 static unsigned long in_xmon __read_mostly = 0;
78 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
80 static unsigned long adrs;
82 #define MAX_DUMP (128 * 1024)
83 static unsigned long ndump = 64;
84 static unsigned long nidump = 16;
85 static unsigned long ncsum = 4096;
87 static char tmpstr[128];
88 static int tracing_enabled;
90 static long bus_error_jmp[JMP_BUF_LEN];
91 static int catch_memory_errors;
92 static int catch_spr_faults;
93 static long *xmon_fault_jmp[NR_CPUS];
95 /* Breakpoint stuff */
97 unsigned long address;
98 unsigned int instr[2];
104 /* Bits in bpt.enabled */
110 static struct bpt bpts[NBPTS];
111 static struct bpt dabr;
112 static struct bpt *iabr;
113 static unsigned bpinstr = 0x7fe00008; /* trap */
115 #define BP_NUM(bp) ((bp) - bpts + 1)
118 static int cmds(struct pt_regs *);
119 static int mread(unsigned long, void *, int);
120 static int mwrite(unsigned long, void *, int);
121 static int handle_fault(struct pt_regs *);
122 static void byterev(unsigned char *, int);
123 static void memex(void);
124 static int bsesc(void);
125 static void dump(void);
126 static void show_pte(unsigned long);
127 static void prdump(unsigned long, long);
128 static int ppc_inst_dump(unsigned long, long, int);
129 static void dump_log_buf(void);
131 #ifdef CONFIG_PPC_POWERNV
132 static void dump_opal_msglog(void);
134 static inline void dump_opal_msglog(void)
136 printf("Machine is not running OPAL firmware.\n");
140 static void backtrace(struct pt_regs *);
141 static void excprint(struct pt_regs *);
142 static void prregs(struct pt_regs *);
143 static void memops(int);
144 static void memlocate(void);
145 static void memzcan(void);
146 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
148 int scanhex(unsigned long *valp);
149 static void scannl(void);
150 static int hexdigit(int);
151 void getstring(char *, int);
152 static void flush_input(void);
153 static int inchar(void);
154 static void take_input(char *);
155 static int read_spr(int, unsigned long *);
156 static void write_spr(int, unsigned long);
157 static void super_regs(void);
158 static void remove_bpts(void);
159 static void insert_bpts(void);
160 static void remove_cpu_bpts(void);
161 static void insert_cpu_bpts(void);
162 static struct bpt *at_breakpoint(unsigned long pc);
163 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
164 static int do_step(struct pt_regs *);
165 static void bpt_cmds(void);
166 static void cacheflush(void);
167 static int cpu_cmd(void);
168 static void csum(void);
169 static void bootcmds(void);
170 static void proccall(void);
171 static void show_tasks(void);
172 void dump_segments(void);
173 static void symbol_lookup(void);
174 static void xmon_show_stack(unsigned long sp, unsigned long lr,
176 static void xmon_print_symbol(unsigned long address, const char *mid,
178 static const char *getvecname(unsigned long vec);
180 static int do_spu_cmd(void);
183 static void dump_tlb_44x(void);
185 #ifdef CONFIG_PPC_BOOK3E
186 static void dump_tlb_book3e(void);
195 #ifdef __LITTLE_ENDIAN__
196 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
198 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
201 static char *help_string = "\
203 b show breakpoints\n\
204 bd set data breakpoint\n\
205 bi set instruction breakpoint\n\
206 bc clear breakpoint\n"
209 c print cpus stopped in xmon\n\
210 c# try to switch to cpu number h (in hex)\n"
215 d1 dump 1 byte values\n\
216 d2 dump 2 byte values\n\
217 d4 dump 4 byte values\n\
218 d8 dump 8 byte values\n\
219 di dump instructions\n\
220 df dump float values\n\
221 dd dump double values\n\
222 dl dump the kernel log buffer\n"
223 #ifdef CONFIG_PPC_POWERNV
225 do dump the OPAL message log\n"
229 dp[#] dump paca for current cpu, or cpu #\n\
230 dpa dump paca for all possible cpus\n"
233 dr dump stream of raw bytes\n\
234 dv dump virtual address translation \n\
235 dt dump the tracing buffers (uses printk)\n\
236 dtc dump the tracing buffers for current CPU (uses printk)\n\
238 #ifdef CONFIG_PPC_POWERNV
239 " dx# dump xive on CPU #\n\
240 dxi# dump xive irq state #\n\
241 dxa dump xive on all CPUs\n"
243 " e print exception information\n\
245 la lookup symbol+offset of specified address\n\
246 ls lookup address of specified symbol\n\
247 m examine/change memory\n\
248 mm move a block of memory\n\
249 ms set a block of memory\n\
250 md compare two blocks of memory\n\
251 ml locate a block of memory\n\
252 mz zero a block of memory\n\
253 mi show information about memory allocation\n\
254 p call a procedure\n\
255 P list processes/tasks\n\
258 #ifdef CONFIG_SPU_BASE
259 " ss stop execution on all spus\n\
260 sr restore execution on stopped spus\n\
261 sf # dump spu fields for spu # (in hex)\n\
262 sd # dump spu local store for spu # (in hex)\n\
263 sdi # disassemble spu local store for spu # (in hex)\n"
265 " S print special registers\n\
268 Sw #v write v to SPR #\n\
270 x exit monitor and recover\n\
271 X exit monitor and don't recover\n"
272 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
273 " u dump segment table or SLB\n"
274 #elif defined(CONFIG_PPC_STD_MMU_32)
275 " u dump segment registers\n"
276 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
279 " U show uptime information\n"
281 " # n limit output to n lines per page (for dp, dpa, dl)\n"
286 static struct pt_regs *xmon_regs;
288 static inline void sync(void)
290 asm volatile("sync; isync");
293 static inline void store_inst(void *p)
295 asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
298 static inline void cflush(void *p)
300 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
303 static inline void cinval(void *p)
305 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
309 * write_ciabr() - write the CIABR SPR
310 * @ciabr: The value to write.
312 * This function writes a value to the CIARB register either directly
313 * through mtspr instruction if the kernel is in HV privilege mode or
314 * call a hypervisor function to achieve the same in case the kernel
315 * is in supervisor privilege mode.
317 static void write_ciabr(unsigned long ciabr)
319 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
322 if (cpu_has_feature(CPU_FTR_HVMODE)) {
323 mtspr(SPRN_CIABR, ciabr);
326 plpar_set_ciabr(ciabr);
330 * set_ciabr() - set the CIABR
331 * @addr: The value to set.
333 * This function sets the correct privilege value into the the HW
334 * breakpoint address before writing it up in the CIABR register.
336 static void set_ciabr(unsigned long addr)
340 if (cpu_has_feature(CPU_FTR_HVMODE))
341 addr |= CIABR_PRIV_HYPER;
343 addr |= CIABR_PRIV_SUPER;
348 * Disable surveillance (the service processor watchdog function)
349 * while we are in xmon.
350 * XXX we should re-enable it when we leave. :)
352 #define SURVEILLANCE_TOKEN 9000
354 static inline void disable_surveillance(void)
356 #ifdef CONFIG_PPC_PSERIES
357 /* Since this can't be a module, args should end up below 4GB. */
358 static struct rtas_args args;
362 * At this point we have got all the cpus we can into
363 * xmon, so there is hopefully no other cpu calling RTAS
364 * at the moment, even though we don't take rtas.lock.
365 * If we did try to take rtas.lock there would be a
366 * real possibility of deadlock.
368 token = rtas_token("set-indicator");
369 if (token == RTAS_UNKNOWN_SERVICE)
372 rtas_call_unlocked(&args, token, 3, 1, NULL, SURVEILLANCE_TOKEN, 0, 0);
374 #endif /* CONFIG_PPC_PSERIES */
378 static int xmon_speaker;
380 static void get_output_lock(void)
382 int me = smp_processor_id() + 0x100;
383 int last_speaker = 0, prev;
386 if (xmon_speaker == me)
390 last_speaker = cmpxchg(&xmon_speaker, 0, me);
391 if (last_speaker == 0)
395 * Wait a full second for the lock, we might be on a slow
396 * console, but check every 100us.
399 while (xmon_speaker == last_speaker) {
405 /* hostile takeover */
406 prev = cmpxchg(&xmon_speaker, last_speaker, me);
407 if (prev == last_speaker)
414 static void release_output_lock(void)
419 int cpus_are_in_xmon(void)
421 return !cpumask_empty(&cpus_in_xmon);
424 static bool wait_for_other_cpus(int ncpus)
426 unsigned long timeout;
428 /* We wait for 2s, which is a metric "little while" */
429 for (timeout = 20000; timeout != 0; --timeout) {
430 if (cpumask_weight(&cpus_in_xmon) >= ncpus)
438 #endif /* CONFIG_SMP */
440 static inline int unrecoverable_excp(struct pt_regs *regs)
442 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
443 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
446 return ((regs->msr & MSR_RI) == 0);
450 static int xmon_core(struct pt_regs *regs, int fromipi)
454 long recurse_jmp[JMP_BUF_LEN];
455 unsigned long offset;
462 local_irq_save(flags);
465 tracing_enabled = tracing_is_on();
468 bp = in_breakpoint_table(regs->nip, &offset);
470 regs->nip = bp->address + offset;
471 atomic_dec(&bp->ref_count);
477 cpu = smp_processor_id();
478 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
480 * We catch SPR read/write faults here because the 0x700, 0xf60
481 * etc. handlers don't call debugger_fault_handler().
483 if (catch_spr_faults)
484 longjmp(bus_error_jmp, 1);
487 printf("cpu 0x%x: Exception %lx %s in xmon, "
488 "returning to main loop\n",
489 cpu, regs->trap, getvecname(TRAP(regs)));
490 release_output_lock();
491 longjmp(xmon_fault_jmp[cpu], 1);
494 if (setjmp(recurse_jmp) != 0) {
495 if (!in_xmon || !xmon_gate) {
497 printf("xmon: WARNING: bad recursive fault "
498 "on cpu 0x%x\n", cpu);
499 release_output_lock();
502 secondary = !(xmon_taken && cpu == xmon_owner);
506 xmon_fault_jmp[cpu] = recurse_jmp;
509 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
510 bp = at_breakpoint(regs->nip);
511 if (bp || unrecoverable_excp(regs))
518 printf("cpu 0x%x stopped at breakpoint 0x%lx (",
520 xmon_print_symbol(regs->nip, " ", ")\n");
522 if (unrecoverable_excp(regs))
523 printf("WARNING: exception is not recoverable, "
525 release_output_lock();
528 cpumask_set_cpu(cpu, &cpus_in_xmon);
533 while (secondary && !xmon_gate) {
539 secondary = test_and_set_bit(0, &in_xmon);
542 touch_nmi_watchdog();
546 if (!secondary && !xmon_gate) {
547 /* we are the first cpu to come in */
548 /* interrupt other cpu(s) */
549 int ncpus = num_online_cpus();
555 * A system reset (trap == 0x100) can be triggered on
556 * all CPUs, so when we come in via 0x100 try waiting
557 * for the other CPUs to come in before we send the
558 * debugger break (IPI). This is similar to
559 * crash_kexec_secondary().
561 if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus))
562 smp_send_debugger_break();
564 wait_for_other_cpus(ncpus);
567 disable_surveillance();
568 /* for breakpoint or single step, print the current instr. */
569 if (bp || TRAP(regs) == 0xd00)
570 ppc_inst_dump(regs->nip, 1, 0);
571 printf("enter ? for help\n");
575 touch_nmi_watchdog();
582 if (cpu == xmon_owner) {
583 if (!test_and_set_bit(0, &xmon_taken)) {
589 while (cpu == xmon_owner)
593 touch_nmi_watchdog();
604 /* have switched to some other cpu */
609 cpumask_clear_cpu(cpu, &cpus_in_xmon);
610 xmon_fault_jmp[cpu] = NULL;
612 /* UP is simple... */
614 printf("Exception %lx %s in xmon, returning to main loop\n",
615 regs->trap, getvecname(TRAP(regs)));
616 longjmp(xmon_fault_jmp[0], 1);
618 if (setjmp(recurse_jmp) == 0) {
619 xmon_fault_jmp[0] = recurse_jmp;
623 bp = at_breakpoint(regs->nip);
625 printf("Stopped at breakpoint %lx (", BP_NUM(bp));
626 xmon_print_symbol(regs->nip, " ", ")\n");
628 if (unrecoverable_excp(regs))
629 printf("WARNING: exception is not recoverable, "
632 disable_surveillance();
633 /* for breakpoint or single step, print the current instr. */
634 if (bp || TRAP(regs) == 0xd00)
635 ppc_inst_dump(regs->nip, 1, 0);
636 printf("enter ? for help\n");
646 if (regs->msr & MSR_DE) {
647 bp = at_breakpoint(regs->nip);
649 regs->nip = (unsigned long) &bp->instr[0];
650 atomic_inc(&bp->ref_count);
654 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
655 bp = at_breakpoint(regs->nip);
657 int stepped = emulate_step(regs, bp->instr[0]);
659 regs->nip = (unsigned long) &bp->instr[0];
660 atomic_inc(&bp->ref_count);
661 } else if (stepped < 0) {
662 printf("Couldn't single-step %s instruction\n",
663 (IS_RFID(bp->instr[0])? "rfid": "mtmsrd"));
670 touch_nmi_watchdog();
671 local_irq_restore(flags);
673 return cmd != 'X' && cmd != EOF;
676 int xmon(struct pt_regs *excp)
681 ppc_save_regs(®s);
685 return xmon_core(excp, 0);
689 irqreturn_t xmon_irq(int irq, void *d)
692 local_irq_save(flags);
693 printf("Keyboard interrupt\n");
694 xmon(get_irq_regs());
695 local_irq_restore(flags);
699 static int xmon_bpt(struct pt_regs *regs)
702 unsigned long offset;
704 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
707 /* Are we at the trap at bp->instr[1] for some bp? */
708 bp = in_breakpoint_table(regs->nip, &offset);
709 if (bp != NULL && offset == 4) {
710 regs->nip = bp->address + 4;
711 atomic_dec(&bp->ref_count);
715 /* Are we at a breakpoint? */
716 bp = at_breakpoint(regs->nip);
725 static int xmon_sstep(struct pt_regs *regs)
733 static int xmon_break_match(struct pt_regs *regs)
735 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
737 if (dabr.enabled == 0)
743 static int xmon_iabr_match(struct pt_regs *regs)
745 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
753 static int xmon_ipi(struct pt_regs *regs)
756 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
762 static int xmon_fault_handler(struct pt_regs *regs)
765 unsigned long offset;
767 if (in_xmon && catch_memory_errors)
768 handle_fault(regs); /* doesn't return */
770 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
771 bp = in_breakpoint_table(regs->nip, &offset);
773 regs->nip = bp->address + offset;
774 atomic_dec(&bp->ref_count);
781 static struct bpt *at_breakpoint(unsigned long pc)
787 for (i = 0; i < NBPTS; ++i, ++bp)
788 if (bp->enabled && pc == bp->address)
793 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
797 off = nip - (unsigned long) bpts;
798 if (off >= sizeof(bpts))
800 off %= sizeof(struct bpt);
801 if (off != offsetof(struct bpt, instr[0])
802 && off != offsetof(struct bpt, instr[1]))
804 *offp = off - offsetof(struct bpt, instr[0]);
805 return (struct bpt *) (nip - off);
808 static struct bpt *new_breakpoint(unsigned long a)
813 bp = at_breakpoint(a);
817 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
818 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
820 bp->instr[1] = bpinstr;
821 store_inst(&bp->instr[1]);
826 printf("Sorry, no free breakpoints. Please clear one first.\n");
830 static void insert_bpts(void)
836 for (i = 0; i < NBPTS; ++i, ++bp) {
837 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
839 if (mread(bp->address, &bp->instr[0], 4) != 4) {
840 printf("Couldn't read instruction at %lx, "
841 "disabling breakpoint there\n", bp->address);
845 if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) {
846 printf("Breakpoint at %lx is on an mtmsrd or rfid "
847 "instruction, disabling it\n", bp->address);
851 store_inst(&bp->instr[0]);
852 if (bp->enabled & BP_CIABR)
854 if (patch_instruction((unsigned int *)bp->address,
856 printf("Couldn't write instruction at %lx, "
857 "disabling breakpoint there\n", bp->address);
858 bp->enabled &= ~BP_TRAP;
861 store_inst((void *)bp->address);
865 static void insert_cpu_bpts(void)
867 struct arch_hw_breakpoint brk;
870 brk.address = dabr.address;
871 brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
873 __set_breakpoint(&brk);
877 set_ciabr(iabr->address);
880 static void remove_bpts(void)
887 for (i = 0; i < NBPTS; ++i, ++bp) {
888 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
890 if (mread(bp->address, &instr, 4) == 4
892 && patch_instruction(
893 (unsigned int *)bp->address, bp->instr[0]) != 0)
894 printf("Couldn't remove breakpoint at %lx\n",
897 store_inst((void *)bp->address);
901 static void remove_cpu_bpts(void)
903 hw_breakpoint_disable();
907 /* Based on uptime_proc_show(). */
911 struct timespec uptime;
913 if (setjmp(bus_error_jmp) == 0) {
914 catch_memory_errors = 1;
917 get_monotonic_boottime(&uptime);
918 printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec,
919 ((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100)));
924 catch_memory_errors = 0;
927 static void set_lpp_cmd(void)
931 if (!scanhex(&lpp)) {
932 printf("Invalid number.\n");
935 xmon_set_pagination_lpp(lpp);
937 /* Command interpreting routine */
938 static char *last_cmd;
941 cmds(struct pt_regs *excp)
948 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
952 printf("%x:", smp_processor_id());
953 #endif /* CONFIG_SMP */
959 if (last_cmd == NULL)
961 take_input(last_cmd);
995 prregs(excp); /* print regs */
1010 if (do_spu_cmd() == 0)
1017 if (tracing_enabled)
1021 printf(" <no input ...>\n");
1025 xmon_puts(help_string);
1049 #ifdef CONFIG_PPC_STD_MMU
1053 #elif defined(CONFIG_44x)
1057 #elif defined(CONFIG_PPC_BOOK3E)
1066 printf("Unrecognized command: ");
1068 if (' ' < cmd && cmd <= '~')
1071 printf("\\x%x", cmd);
1073 } while (cmd != '\n');
1074 printf(" (type ? for help)\n");
1081 static int do_step(struct pt_regs *regs)
1083 regs->msr |= MSR_DE;
1084 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
1089 * Step a single instruction.
1090 * Some instructions we emulate, others we execute with MSR_SE set.
1092 static int do_step(struct pt_regs *regs)
1097 /* check we are in 64-bit kernel mode, translation enabled */
1098 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
1099 if (mread(regs->nip, &instr, 4) == 4) {
1100 stepped = emulate_step(regs, instr);
1102 printf("Couldn't single-step %s instruction\n",
1103 (IS_RFID(instr)? "rfid": "mtmsrd"));
1107 regs->trap = 0xd00 | (regs->trap & 1);
1108 printf("stepped to ");
1109 xmon_print_symbol(regs->nip, " ", "\n");
1110 ppc_inst_dump(regs->nip, 1, 0);
1115 regs->msr |= MSR_SE;
1120 static void bootcmds(void)
1126 ppc_md.restart(NULL);
1127 else if (cmd == 'h')
1129 else if (cmd == 'p')
1134 static int cpu_cmd(void)
1137 unsigned long cpu, first_cpu, last_cpu;
1140 if (!scanhex(&cpu)) {
1141 /* print cpus waiting or in xmon */
1142 printf("cpus stopped:");
1143 last_cpu = first_cpu = NR_CPUS;
1144 for_each_possible_cpu(cpu) {
1145 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1146 if (cpu == last_cpu + 1) {
1149 if (last_cpu != first_cpu)
1150 printf("-0x%lx", last_cpu);
1151 last_cpu = first_cpu = cpu;
1152 printf(" 0x%lx", cpu);
1156 if (last_cpu != first_cpu)
1157 printf("-0x%lx", last_cpu);
1161 /* try to switch to cpu specified */
1162 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1163 printf("cpu 0x%x isn't in xmon\n", cpu);
1170 while (!xmon_taken) {
1171 if (--timeout == 0) {
1172 if (test_and_set_bit(0, &xmon_taken))
1174 /* take control back */
1176 xmon_owner = smp_processor_id();
1177 printf("cpu 0x%x didn't take control\n", cpu);
1185 #endif /* CONFIG_SMP */
1188 static unsigned short fcstab[256] = {
1189 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
1190 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
1191 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
1192 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
1193 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
1194 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
1195 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
1196 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
1197 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
1198 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
1199 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
1200 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
1201 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
1202 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
1203 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
1204 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
1205 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
1206 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
1207 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
1208 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
1209 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
1210 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
1211 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
1212 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
1213 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
1214 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
1215 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
1216 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
1217 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
1218 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
1219 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
1220 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
1223 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
1232 if (!scanhex(&adrs))
1234 if (!scanhex(&ncsum))
1237 for (i = 0; i < ncsum; ++i) {
1238 if (mread(adrs+i, &v, 1) == 0) {
1239 printf("csum stopped at "REG"\n", adrs+i);
1244 printf("%x\n", fcs);
1248 * Check if this is a suitable place to put a breakpoint.
1250 static long check_bp_loc(unsigned long addr)
1255 if (!is_kernel_addr(addr)) {
1256 printf("Breakpoints may only be placed at kernel addresses\n");
1259 if (!mread(addr, &instr, sizeof(instr))) {
1260 printf("Can't read instruction at address %lx\n", addr);
1263 if (IS_MTMSRD(instr) || IS_RFID(instr)) {
1264 printf("Breakpoints may not be placed on mtmsrd or rfid "
1271 /* Force enable xmon if not already enabled */
1272 static inline void force_enable_xmon(void)
1274 /* Enable xmon hooks if needed */
1276 printf("xmon: Enabling debugger hooks\n");
1281 static char *breakpoint_help_string =
1282 "Breakpoint command usage:\n"
1283 "b show breakpoints\n"
1284 "b <addr> [cnt] set breakpoint at given instr addr\n"
1285 "bc clear all breakpoints\n"
1286 "bc <n/addr> clear breakpoint number n or at addr\n"
1287 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
1288 "bd <addr> [cnt] set hardware data breakpoint\n"
1301 #ifndef CONFIG_PPC_8xx
1302 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n";
1304 case 'd': /* bd - hardware data breakpoint */
1305 if (!ppc_breakpoint_available()) {
1306 printf("Hardware data breakpoint not supported on this cpu\n");
1313 else if (cmd == 'w')
1319 if (scanhex(&dabr.address)) {
1320 if (!is_kernel_addr(dabr.address)) {
1324 dabr.address &= ~HW_BRK_TYPE_DABR;
1325 dabr.enabled = mode | BP_DABR;
1328 force_enable_xmon();
1331 case 'i': /* bi - hardware instr breakpoint */
1332 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
1333 printf("Hardware instruction breakpoint "
1334 "not supported on this cpu\n");
1338 iabr->enabled &= ~BP_CIABR;
1343 if (!check_bp_loc(a))
1345 bp = new_breakpoint(a);
1347 bp->enabled |= BP_CIABR;
1349 force_enable_xmon();
1356 /* clear all breakpoints */
1357 for (i = 0; i < NBPTS; ++i)
1358 bpts[i].enabled = 0;
1361 printf("All breakpoints cleared\n");
1365 if (a <= NBPTS && a >= 1) {
1366 /* assume a breakpoint number */
1367 bp = &bpts[a-1]; /* bp nums are 1 based */
1369 /* assume a breakpoint address */
1370 bp = at_breakpoint(a);
1372 printf("No breakpoint at %lx\n", a);
1377 printf("Cleared breakpoint %lx (", BP_NUM(bp));
1378 xmon_print_symbol(bp->address, " ", ")\n");
1386 printf(breakpoint_help_string);
1391 /* print all breakpoints */
1392 printf(" type address\n");
1394 printf(" data "REG" [", dabr.address);
1395 if (dabr.enabled & 1)
1397 if (dabr.enabled & 2)
1401 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
1404 printf("%2x %s ", BP_NUM(bp),
1405 (bp->enabled & BP_CIABR) ? "inst": "trap");
1406 xmon_print_symbol(bp->address, " ", "\n");
1411 if (!check_bp_loc(a))
1413 bp = new_breakpoint(a);
1415 bp->enabled |= BP_TRAP;
1416 force_enable_xmon();
1422 /* Very cheap human name for vector lookup. */
1424 const char *getvecname(unsigned long vec)
1429 case 0x100: ret = "(System Reset)"; break;
1430 case 0x200: ret = "(Machine Check)"; break;
1431 case 0x300: ret = "(Data Access)"; break;
1433 if (radix_enabled())
1434 ret = "(Data Access Out of Range)";
1436 ret = "(Data SLB Access)";
1438 case 0x400: ret = "(Instruction Access)"; break;
1440 if (radix_enabled())
1441 ret = "(Instruction Access Out of Range)";
1443 ret = "(Instruction SLB Access)";
1445 case 0x500: ret = "(Hardware Interrupt)"; break;
1446 case 0x600: ret = "(Alignment)"; break;
1447 case 0x700: ret = "(Program Check)"; break;
1448 case 0x800: ret = "(FPU Unavailable)"; break;
1449 case 0x900: ret = "(Decrementer)"; break;
1450 case 0x980: ret = "(Hypervisor Decrementer)"; break;
1451 case 0xa00: ret = "(Doorbell)"; break;
1452 case 0xc00: ret = "(System Call)"; break;
1453 case 0xd00: ret = "(Single Step)"; break;
1454 case 0xe40: ret = "(Emulation Assist)"; break;
1455 case 0xe60: ret = "(HMI)"; break;
1456 case 0xe80: ret = "(Hypervisor Doorbell)"; break;
1457 case 0xf00: ret = "(Performance Monitor)"; break;
1458 case 0xf20: ret = "(Altivec Unavailable)"; break;
1459 case 0x1300: ret = "(Instruction Breakpoint)"; break;
1460 case 0x1500: ret = "(Denormalisation)"; break;
1461 case 0x1700: ret = "(Altivec Assist)"; break;
1467 static void get_function_bounds(unsigned long pc, unsigned long *startp,
1468 unsigned long *endp)
1470 unsigned long size, offset;
1473 *startp = *endp = 0;
1476 if (setjmp(bus_error_jmp) == 0) {
1477 catch_memory_errors = 1;
1479 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
1481 *startp = pc - offset;
1482 *endp = pc - offset + size;
1486 catch_memory_errors = 0;
1489 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
1490 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long))
1492 static void xmon_show_stack(unsigned long sp, unsigned long lr,
1495 int max_to_print = 64;
1497 unsigned long newsp;
1498 unsigned long marker;
1499 struct pt_regs regs;
1501 while (max_to_print--) {
1502 if (!is_kernel_addr(sp)) {
1504 printf("SP (%lx) is in userspace\n", sp);
1508 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
1509 || !mread(sp, &newsp, sizeof(unsigned long))) {
1510 printf("Couldn't read stack frame at %lx\n", sp);
1515 * For the first stack frame, try to work out if
1516 * LR and/or the saved LR value in the bottommost
1517 * stack frame are valid.
1519 if ((pc | lr) != 0) {
1520 unsigned long fnstart, fnend;
1521 unsigned long nextip;
1524 get_function_bounds(pc, &fnstart, &fnend);
1527 mread(newsp + LRSAVE_OFFSET, &nextip,
1528 sizeof(unsigned long));
1530 if (!is_kernel_addr(lr)
1531 || (fnstart <= lr && lr < fnend))
1533 } else if (lr == nextip) {
1535 } else if (is_kernel_addr(lr)
1536 && !(fnstart <= lr && lr < fnend)) {
1537 printf("[link register ] ");
1538 xmon_print_symbol(lr, " ", "\n");
1541 printf("["REG"] ", sp);
1542 xmon_print_symbol(ip, " ", " (unreliable)\n");
1547 printf("["REG"] ", sp);
1548 xmon_print_symbol(ip, " ", "\n");
1551 /* Look for "regshere" marker to see if this is
1552 an exception frame. */
1553 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
1554 && marker == STACK_FRAME_REGS_MARKER) {
1555 if (mread(sp + STACK_FRAME_OVERHEAD, ®s, sizeof(regs))
1557 printf("Couldn't read registers at %lx\n",
1558 sp + STACK_FRAME_OVERHEAD);
1561 printf("--- Exception: %lx %s at ", regs.trap,
1562 getvecname(TRAP(®s)));
1565 xmon_print_symbol(pc, " ", "\n");
1575 static void backtrace(struct pt_regs *excp)
1580 xmon_show_stack(sp, 0, 0);
1582 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1586 static void print_bug_trap(struct pt_regs *regs)
1589 const struct bug_entry *bug;
1592 if (regs->msr & MSR_PR)
1593 return; /* not in kernel */
1594 addr = regs->nip; /* address of trap instruction */
1595 if (!is_kernel_addr(addr))
1597 bug = find_bug(regs->nip);
1600 if (is_warning_bug(bug))
1603 #ifdef CONFIG_DEBUG_BUGVERBOSE
1604 printf("kernel BUG at %s:%u!\n",
1605 bug->file, bug->line);
1607 printf("kernel BUG at %px!\n", (void *)bug->bug_addr);
1609 #endif /* CONFIG_BUG */
1612 static void excprint(struct pt_regs *fp)
1617 printf("cpu 0x%x: ", smp_processor_id());
1618 #endif /* CONFIG_SMP */
1621 printf("Vector: %lx %s at [%lx]\n", fp->trap, getvecname(trap), fp);
1623 xmon_print_symbol(fp->nip, ": ", "\n");
1625 printf(" lr: ", fp->link);
1626 xmon_print_symbol(fp->link, ": ", "\n");
1628 printf(" sp: %lx\n", fp->gpr[1]);
1629 printf(" msr: %lx\n", fp->msr);
1631 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
1632 printf(" dar: %lx\n", fp->dar);
1634 printf(" dsisr: %lx\n", fp->dsisr);
1637 printf(" current = 0x%lx\n", current);
1639 printf(" paca = 0x%lx\t softe: %d\t irq_happened: 0x%02x\n",
1640 local_paca, local_paca->irq_soft_mask, local_paca->irq_happened);
1643 printf(" pid = %ld, comm = %s\n",
1644 current->pid, current->comm);
1650 printf(linux_banner);
1653 static void prregs(struct pt_regs *fp)
1657 struct pt_regs regs;
1659 if (scanhex(&base)) {
1660 if (setjmp(bus_error_jmp) == 0) {
1661 catch_memory_errors = 1;
1663 regs = *(struct pt_regs *)base;
1667 catch_memory_errors = 0;
1668 printf("*** Error reading registers from "REG"\n",
1672 catch_memory_errors = 0;
1677 if (FULL_REGS(fp)) {
1678 for (n = 0; n < 16; ++n)
1679 printf("R%.2ld = "REG" R%.2ld = "REG"\n",
1680 n, fp->gpr[n], n+16, fp->gpr[n+16]);
1682 for (n = 0; n < 7; ++n)
1683 printf("R%.2ld = "REG" R%.2ld = "REG"\n",
1684 n, fp->gpr[n], n+7, fp->gpr[n+7]);
1687 for (n = 0; n < 32; ++n) {
1688 printf("R%.2d = %.8x%s", n, fp->gpr[n],
1689 (n & 3) == 3? "\n": " ");
1690 if (n == 12 && !FULL_REGS(fp)) {
1697 xmon_print_symbol(fp->nip, " ", "\n");
1698 if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
1700 xmon_print_symbol(fp->orig_gpr3, " ", "\n");
1703 xmon_print_symbol(fp->link, " ", "\n");
1704 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);
1705 printf("ctr = "REG" xer = "REG" trap = %4lx\n",
1706 fp->ctr, fp->xer, fp->trap);
1708 if (trap == 0x300 || trap == 0x380 || trap == 0x600)
1709 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
1712 static void cacheflush(void)
1715 unsigned long nflush;
1720 scanhex((void *)&adrs);
1725 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
1726 if (setjmp(bus_error_jmp) == 0) {
1727 catch_memory_errors = 1;
1731 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1732 cflush((void *) adrs);
1734 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1735 cinval((void *) adrs);
1738 /* wait a little while to see if we get a machine check */
1741 catch_memory_errors = 0;
1744 extern unsigned long xmon_mfspr(int spr, unsigned long default_value);
1745 extern void xmon_mtspr(int spr, unsigned long value);
1748 read_spr(int n, unsigned long *vp)
1750 unsigned long ret = -1UL;
1753 if (setjmp(bus_error_jmp) == 0) {
1754 catch_spr_faults = 1;
1757 ret = xmon_mfspr(n, *vp);
1763 catch_spr_faults = 0;
1769 write_spr(int n, unsigned long val)
1771 if (setjmp(bus_error_jmp) == 0) {
1772 catch_spr_faults = 1;
1779 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n);
1781 catch_spr_faults = 0;
1784 static void dump_206_sprs(void)
1787 if (!cpu_has_feature(CPU_FTR_ARCH_206))
1790 /* Actually some of these pre-date 2.06, but whatevs */
1792 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8x\n",
1793 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
1794 printf("dscr = %.16lx ppr = %.16lx pir = %.8x\n",
1795 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
1796 printf("amr = %.16lx uamor = %.16lx\n",
1797 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR));
1799 if (!(mfmsr() & MSR_HV))
1802 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8x\n",
1803 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
1804 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n",
1805 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
1806 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8x\n",
1807 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
1808 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n",
1809 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR));
1810 printf("dabr = %.16lx dabrx = %.16lx\n",
1811 mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
1815 static void dump_207_sprs(void)
1820 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1823 printf("dpdes = %.16lx tir = %.16lx cir = %.8x\n",
1824 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR));
1826 printf("fscr = %.16lx tar = %.16lx pspb = %.8x\n",
1827 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB));
1831 /* Only if TM has been enabled in the kernel */
1832 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n",
1833 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR),
1834 mfspr(SPRN_TEXASR));
1837 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n",
1838 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2));
1839 printf("pmc1 = %.8x pmc2 = %.8x pmc3 = %.8x pmc4 = %.8x\n",
1840 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2),
1841 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4));
1842 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8x\n",
1843 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5));
1844 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8x\n",
1845 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
1846 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n",
1847 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
1848 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR));
1850 if (!(msr & MSR_HV))
1853 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n",
1854 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
1855 printf("dawr = %.16lx dawrx = %.16lx ciabr = %.16lx\n",
1856 mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR));
1860 static void dump_300_sprs(void)
1863 bool hv = mfmsr() & MSR_HV;
1865 if (!cpu_has_feature(CPU_FTR_ARCH_300))
1868 printf("pidr = %.16lx tidr = %.16lx\n",
1869 mfspr(SPRN_PID), mfspr(SPRN_TIDR));
1870 printf("asdr = %.16lx psscr = %.16lx\n",
1871 mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR)
1872 : mfspr(SPRN_PSSCR_PR));
1877 printf("ptcr = %.16lx\n",
1882 static void dump_one_spr(int spr, bool show_unimplemented)
1887 if (!read_spr(spr, &val)) {
1888 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1892 if (val == 0xdeadbeef) {
1893 /* Looks like read was a nop, confirm */
1895 if (!read_spr(spr, &val)) {
1896 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1900 if (val == 0x0badcafe) {
1901 if (show_unimplemented)
1902 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr);
1907 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val);
1910 static void super_regs(void)
1912 static unsigned long regno;
1920 unsigned long sp, toc;
1921 asm("mr %0,1" : "=r" (sp) :);
1922 asm("mr %0,2" : "=r" (toc) :);
1924 printf("msr = "REG" sprg0 = "REG"\n",
1925 mfmsr(), mfspr(SPRN_SPRG0));
1926 printf("pvr = "REG" sprg1 = "REG"\n",
1927 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
1928 printf("dec = "REG" sprg2 = "REG"\n",
1929 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
1930 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3));
1931 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
1943 read_spr(regno, &val);
1945 write_spr(regno, val);
1946 dump_one_spr(regno, true);
1951 dump_one_spr(regno, true);
1955 for (spr = 1; spr < 1024; ++spr)
1956 dump_one_spr(spr, false);
1964 * Stuff for reading and writing memory safely
1967 mread(unsigned long adrs, void *buf, int size)
1973 if (setjmp(bus_error_jmp) == 0) {
1974 catch_memory_errors = 1;
1980 *(u16 *)q = *(u16 *)p;
1983 *(u32 *)q = *(u32 *)p;
1986 *(u64 *)q = *(u64 *)p;
1989 for( ; n < size; ++n) {
1995 /* wait a little while to see if we get a machine check */
1999 catch_memory_errors = 0;
2004 mwrite(unsigned long adrs, void *buf, int size)
2010 if (setjmp(bus_error_jmp) == 0) {
2011 catch_memory_errors = 1;
2017 *(u16 *)p = *(u16 *)q;
2020 *(u32 *)p = *(u32 *)q;
2023 *(u64 *)p = *(u64 *)q;
2026 for ( ; n < size; ++n) {
2032 /* wait a little while to see if we get a machine check */
2036 printf("*** Error writing address "REG"\n", adrs + n);
2038 catch_memory_errors = 0;
2042 static int fault_type;
2043 static int fault_except;
2044 static char *fault_chars[] = { "--", "**", "##" };
2046 static int handle_fault(struct pt_regs *regs)
2048 fault_except = TRAP(regs);
2049 switch (TRAP(regs)) {
2061 longjmp(bus_error_jmp, 1);
2066 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
2069 byterev(unsigned char *val, int size)
2075 SWAP(val[0], val[1], t);
2078 SWAP(val[0], val[3], t);
2079 SWAP(val[1], val[2], t);
2081 case 8: /* is there really any use for this? */
2082 SWAP(val[0], val[7], t);
2083 SWAP(val[1], val[6], t);
2084 SWAP(val[2], val[5], t);
2085 SWAP(val[3], val[4], t);
2093 static char *memex_help_string =
2094 "Memory examine command usage:\n"
2095 "m [addr] [flags] examine/change memory\n"
2096 " addr is optional. will start where left off.\n"
2097 " flags may include chars from this set:\n"
2098 " b modify by bytes (default)\n"
2099 " w modify by words (2 byte)\n"
2100 " l modify by longs (4 byte)\n"
2101 " d modify by doubleword (8 byte)\n"
2102 " r toggle reverse byte order mode\n"
2103 " n do not read memory (for i/o spaces)\n"
2104 " . ok to read (default)\n"
2105 "NOTE: flags are saved as defaults\n"
2108 static char *memex_subcmd_help_string =
2109 "Memory examine subcommands:\n"
2110 " hexval write this val to current location\n"
2111 " 'string' write chars from string to this location\n"
2112 " ' increment address\n"
2113 " ^ decrement address\n"
2114 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n"
2115 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n"
2116 " ` clear no-read flag\n"
2117 " ; stay at this addr\n"
2118 " v change to byte mode\n"
2119 " w change to word (2 byte) mode\n"
2120 " l change to long (4 byte) mode\n"
2121 " u change to doubleword (8 byte) mode\n"
2122 " m addr change current addr\n"
2123 " n toggle no-read flag\n"
2124 " r toggle byte reverse flag\n"
2125 " < count back up count bytes\n"
2126 " > count skip forward count bytes\n"
2127 " x exit this mode\n"
2133 int cmd, inc, i, nslash;
2135 unsigned char val[16];
2137 scanhex((void *)&adrs);
2140 printf(memex_help_string);
2146 while ((cmd = skipbl()) != '\n') {
2148 case 'b': size = 1; break;
2149 case 'w': size = 2; break;
2150 case 'l': size = 4; break;
2151 case 'd': size = 8; break;
2152 case 'r': brev = !brev; break;
2153 case 'n': mnoread = 1; break;
2154 case '.': mnoread = 0; break;
2163 n = mread(adrs, val, size);
2164 printf(REG"%c", adrs, brev? 'r': ' ');
2169 for (i = 0; i < n; ++i)
2170 printf("%.2x", val[i]);
2171 for (; i < size; ++i)
2172 printf("%s", fault_chars[fault_type]);
2179 for (i = 0; i < size; ++i)
2180 val[i] = n >> (i * 8);
2183 mwrite(adrs, val, size);
2196 else if( n == '\'' )
2198 for (i = 0; i < size; ++i)
2199 val[i] = n >> (i * 8);
2202 mwrite(adrs, val, size);
2238 adrs -= 1 << nslash;
2242 adrs += 1 << nslash;
2246 adrs += 1 << -nslash;
2250 adrs -= 1 << -nslash;
2253 scanhex((void *)&adrs);
2272 printf(memex_subcmd_help_string);
2287 case 'n': c = '\n'; break;
2288 case 'r': c = '\r'; break;
2289 case 'b': c = '\b'; break;
2290 case 't': c = '\t'; break;
2295 static void xmon_rawdump (unsigned long adrs, long ndump)
2298 unsigned char temp[16];
2300 for (n = ndump; n > 0;) {
2302 nr = mread(adrs, temp, r);
2304 for (m = 0; m < r; ++m) {
2306 printf("%.2x", temp[m]);
2308 printf("%s", fault_chars[fault_type]);
2317 static void dump_tracing(void)
2323 ftrace_dump(DUMP_ORIG);
2325 ftrace_dump(DUMP_ALL);
2329 static void dump_one_paca(int cpu)
2331 struct paca_struct *p;
2332 #ifdef CONFIG_PPC_BOOK3S_64
2336 if (setjmp(bus_error_jmp) != 0) {
2337 printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
2341 catch_memory_errors = 1;
2346 printf("paca for cpu 0x%x @ %px:\n", cpu, p);
2348 printf(" %-*s = %s\n", 20, "possible", cpu_possible(cpu) ? "yes" : "no");
2349 printf(" %-*s = %s\n", 20, "present", cpu_present(cpu) ? "yes" : "no");
2350 printf(" %-*s = %s\n", 20, "online", cpu_online(cpu) ? "yes" : "no");
2352 #define DUMP(paca, name, format) \
2353 printf(" %-*s = %#-*"format"\t(0x%lx)\n", 20, #name, 18, paca->name, \
2354 offsetof(struct paca_struct, name));
2356 DUMP(p, lock_token, "x");
2357 DUMP(p, paca_index, "x");
2358 DUMP(p, kernel_toc, "lx");
2359 DUMP(p, kernelbase, "lx");
2360 DUMP(p, kernel_msr, "lx");
2361 DUMP(p, emergency_sp, "px");
2362 #ifdef CONFIG_PPC_BOOK3S_64
2363 DUMP(p, nmi_emergency_sp, "px");
2364 DUMP(p, mc_emergency_sp, "px");
2365 DUMP(p, in_nmi, "x");
2366 DUMP(p, in_mce, "x");
2367 DUMP(p, hmi_event_available, "x");
2369 DUMP(p, data_offset, "lx");
2370 DUMP(p, hw_cpu_id, "x");
2371 DUMP(p, cpu_start, "x");
2372 DUMP(p, kexec_state, "x");
2373 #ifdef CONFIG_PPC_BOOK3S_64
2374 for (i = 0; i < SLB_NUM_BOLTED; i++) {
2377 if (!p->slb_shadow_ptr)
2380 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid);
2381 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid);
2384 printf(" slb_shadow[%d]: = 0x%016lx 0x%016lx\n",
2388 DUMP(p, vmalloc_sllp, "x");
2389 DUMP(p, slb_cache_ptr, "x");
2390 for (i = 0; i < SLB_CACHE_ENTRIES; i++)
2391 printf(" slb_cache[%d]: = 0x%016lx\n", i, p->slb_cache[i]);
2393 DUMP(p, rfi_flush_fallback_area, "px");
2395 DUMP(p, dscr_default, "llx");
2396 #ifdef CONFIG_PPC_BOOK3E
2398 DUMP(p, kernel_pgd, "px");
2399 DUMP(p, tcd_ptr, "px");
2400 DUMP(p, mc_kstack, "px");
2401 DUMP(p, crit_kstack, "px");
2402 DUMP(p, dbg_kstack, "px");
2404 DUMP(p, __current, "px");
2405 DUMP(p, kstack, "lx");
2406 printf(" kstack_base = 0x%016lx\n", p->kstack & ~(THREAD_SIZE - 1));
2407 DUMP(p, stab_rr, "lx");
2408 DUMP(p, saved_r1, "lx");
2409 DUMP(p, trap_save, "x");
2410 DUMP(p, irq_soft_mask, "x");
2411 DUMP(p, irq_happened, "x");
2412 DUMP(p, io_sync, "x");
2413 DUMP(p, irq_work_pending, "x");
2414 DUMP(p, nap_state_lost, "x");
2415 DUMP(p, sprg_vdso, "llx");
2417 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2418 DUMP(p, tm_scratch, "llx");
2421 #ifdef CONFIG_PPC_POWERNV
2422 DUMP(p, core_idle_state_ptr, "px");
2423 DUMP(p, thread_idle_state, "x");
2424 DUMP(p, thread_mask, "x");
2425 DUMP(p, subcore_sibling_mask, "x");
2428 DUMP(p, accounting.utime, "llx");
2429 DUMP(p, accounting.stime, "llx");
2430 DUMP(p, accounting.utime_scaled, "llx");
2431 DUMP(p, accounting.starttime, "llx");
2432 DUMP(p, accounting.starttime_user, "llx");
2433 DUMP(p, accounting.startspurr, "llx");
2434 DUMP(p, accounting.utime_sspurr, "llx");
2435 DUMP(p, accounting.steal_time, "llx");
2438 catch_memory_errors = 0;
2442 static void dump_all_pacas(void)
2446 if (num_possible_cpus() == 0) {
2447 printf("No possible cpus, use 'dp #' to dump individual cpus\n");
2451 for_each_possible_cpu(cpu)
2455 static void dump_pacas(void)
2466 termch = c; /* Put c back, it wasn't 'a' */
2471 dump_one_paca(xmon_owner);
2475 #ifdef CONFIG_PPC_POWERNV
2476 static void dump_one_xive(int cpu)
2478 unsigned int hwid = get_hard_smp_processor_id(cpu);
2480 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid);
2481 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid);
2482 opal_xive_dump(XIVE_DUMP_TM_OS, hwid);
2483 opal_xive_dump(XIVE_DUMP_TM_USER, hwid);
2484 opal_xive_dump(XIVE_DUMP_VP, hwid);
2485 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid);
2487 if (setjmp(bus_error_jmp) != 0) {
2488 catch_memory_errors = 0;
2489 printf("*** Error dumping xive on cpu %d\n", cpu);
2493 catch_memory_errors = 1;
2495 xmon_xive_do_dump(cpu);
2498 catch_memory_errors = 0;
2501 static void dump_all_xives(void)
2505 if (num_possible_cpus() == 0) {
2506 printf("No possible cpus, use 'dx #' to dump individual cpus\n");
2510 for_each_possible_cpu(cpu)
2514 static void dump_one_xive_irq(u32 num)
2521 rc = opal_xive_get_irq_config(num, &vp, &prio, &lirq);
2522 xmon_printf("IRQ 0x%x config: vp=0x%llx prio=%d lirq=0x%x (rc=%lld)\n",
2523 num, be64_to_cpu(vp), prio, be32_to_cpu(lirq), rc);
2526 static void dump_xives(void)
2531 if (!xive_enabled()) {
2532 printf("Xive disabled on this system\n");
2540 } else if (c == 'i') {
2542 dump_one_xive_irq(num);
2546 termch = c; /* Put c back, it wasn't 'a' */
2551 dump_one_xive(xmon_owner);
2553 #endif /* CONFIG_PPC_POWERNV */
2555 static void dump_by_size(unsigned long addr, long count, int size)
2557 unsigned char temp[16];
2561 count = ALIGN(count, 16);
2563 for (i = 0; i < count; i += 16, addr += 16) {
2566 if (mread(addr, temp, 16) != 16) {
2567 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr);
2571 for (j = 0; j < 16; j += size) {
2574 case 1: val = temp[j]; break;
2575 case 2: val = *(u16 *)&temp[j]; break;
2576 case 4: val = *(u32 *)&temp[j]; break;
2577 case 8: val = *(u64 *)&temp[j]; break;
2581 printf("%0*lx", size * 2, val);
2590 static char last[] = { "d?\n" };
2597 xmon_start_pagination();
2599 xmon_end_pagination();
2603 #ifdef CONFIG_PPC_POWERNV
2605 xmon_start_pagination();
2607 xmon_end_pagination();
2620 scanhex((void *)&adrs);
2627 else if (nidump > MAX_DUMP)
2629 adrs += ppc_inst_dump(adrs, nidump, 1);
2631 } else if (c == 'l') {
2633 } else if (c == 'o') {
2635 } else if (c == 'v') {
2636 /* dump virtual to physical translation */
2638 } else if (c == 'r') {
2642 xmon_rawdump(adrs, ndump);
2649 else if (ndump > MAX_DUMP)
2657 ndump = ALIGN(ndump, 16);
2658 dump_by_size(adrs, ndump, c - '0');
2663 prdump(adrs, ndump);
2672 prdump(unsigned long adrs, long ndump)
2674 long n, m, c, r, nr;
2675 unsigned char temp[16];
2677 for (n = ndump; n > 0;) {
2681 nr = mread(adrs, temp, r);
2683 for (m = 0; m < r; ++m) {
2684 if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2687 printf("%.2x", temp[m]);
2689 printf("%s", fault_chars[fault_type]);
2691 for (; m < 16; ++m) {
2692 if ((m & (sizeof(long) - 1)) == 0)
2697 for (m = 0; m < r; ++m) {
2700 putchar(' ' <= c && c <= '~'? c: '.');
2713 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
2716 generic_inst_dump(unsigned long adr, long count, int praddr,
2717 instruction_dump_func dump_func)
2720 unsigned long first_adr;
2721 unsigned long inst, last_inst = 0;
2722 unsigned char val[4];
2725 for (first_adr = adr; count > 0; --count, adr += 4) {
2726 nr = mread(adr, val, 4);
2729 const char *x = fault_chars[fault_type];
2730 printf(REG" %s%s%s%s\n", adr, x, x, x, x);
2734 inst = GETWORD(val);
2735 if (adr > first_adr && inst == last_inst) {
2745 printf(REG" %.8x", adr, inst);
2747 dump_func(inst, adr);
2750 return adr - first_adr;
2754 ppc_inst_dump(unsigned long adr, long count, int praddr)
2756 return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
2760 print_address(unsigned long addr)
2762 xmon_print_symbol(addr, "\t# ", "");
2768 struct kmsg_dumper dumper = { .active = 1 };
2769 unsigned char buf[128];
2772 if (setjmp(bus_error_jmp) != 0) {
2773 printf("Error dumping printk buffer!\n");
2777 catch_memory_errors = 1;
2780 kmsg_dump_rewind_nolock(&dumper);
2781 xmon_start_pagination();
2782 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
2786 xmon_end_pagination();
2789 /* wait a little while to see if we get a machine check */
2791 catch_memory_errors = 0;
2794 #ifdef CONFIG_PPC_POWERNV
2795 static void dump_opal_msglog(void)
2797 unsigned char buf[128];
2801 if (!firmware_has_feature(FW_FEATURE_OPAL)) {
2802 printf("Machine is not running OPAL firmware.\n");
2806 if (setjmp(bus_error_jmp) != 0) {
2807 printf("Error dumping OPAL msglog!\n");
2811 catch_memory_errors = 1;
2814 xmon_start_pagination();
2815 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) {
2817 printf("Error dumping OPAL msglog! Error: %zd\n", res);
2824 xmon_end_pagination();
2827 /* wait a little while to see if we get a machine check */
2829 catch_memory_errors = 0;
2834 * Memory operations - move, set, print differences
2836 static unsigned long mdest; /* destination address */
2837 static unsigned long msrc; /* source address */
2838 static unsigned long mval; /* byte value to set memory to */
2839 static unsigned long mcount; /* # bytes to affect */
2840 static unsigned long mdiffs; /* max # differences to print */
2845 scanhex((void *)&mdest);
2846 if( termch != '\n' )
2848 scanhex((void *)(cmd == 's'? &mval: &msrc));
2849 if( termch != '\n' )
2851 scanhex((void *)&mcount);
2854 memmove((void *)mdest, (void *)msrc, mcount);
2857 memset((void *)mdest, mval, mcount);
2860 if( termch != '\n' )
2862 scanhex((void *)&mdiffs);
2863 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
2869 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
2874 for( n = nb; n > 0; --n )
2875 if( *p1++ != *p2++ )
2876 if( ++prt <= maxpr )
2877 printf("%.16x %.2x # %.16x %.2x\n", p1 - 1,
2878 p1[-1], p2 - 1, p2[-1]);
2880 printf("Total of %d differences\n", prt);
2883 static unsigned mend;
2884 static unsigned mask;
2890 unsigned char val[4];
2893 scanhex((void *)&mdest);
2894 if (termch != '\n') {
2896 scanhex((void *)&mend);
2897 if (termch != '\n') {
2899 scanhex((void *)&mval);
2901 if (termch != '\n') termch = 0;
2902 scanhex((void *)&mask);
2906 for (a = mdest; a < mend; a += 4) {
2907 if (mread(a, val, 4) == 4
2908 && ((GETWORD(val) ^ mval) & mask) == 0) {
2909 printf("%.16x: %.16x\n", a, GETWORD(val));
2916 static unsigned long mskip = 0x1000;
2917 static unsigned long mlim = 0xffffffff;
2927 if (termch != '\n') termch = 0;
2929 if (termch != '\n') termch = 0;
2932 for (a = mdest; a < mlim; a += mskip) {
2933 ok = mread(a, &v, 1);
2935 printf("%.8x .. ", a);
2936 } else if (!ok && ook)
2937 printf("%.8x\n", a - mskip);
2943 printf("%.8x\n", a - mskip);
2946 static void show_task(struct task_struct *tsk)
2951 * Cloned from kdb_task_state_char(), which is not entirely
2952 * appropriate for calling from xmon. This could be moved
2953 * to a common, generic, routine used by both.
2955 state = (tsk->state == 0) ? 'R' :
2956 (tsk->state < 0) ? 'U' :
2957 (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' :
2958 (tsk->state & TASK_STOPPED) ? 'T' :
2959 (tsk->state & TASK_TRACED) ? 'C' :
2960 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' :
2961 (tsk->exit_state & EXIT_DEAD) ? 'E' :
2962 (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?';
2964 printf("%px %016lx %6d %6d %c %2d %s\n", tsk,
2966 tsk->pid, tsk->parent->pid,
2967 state, task_thread_info(tsk)->cpu,
2971 #ifdef CONFIG_PPC_BOOK3S_64
2972 void format_pte(void *ptep, unsigned long pte)
2974 printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte);
2975 printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK);
2977 printf("Flags = %s%s%s%s%s\n",
2978 (pte & _PAGE_ACCESSED) ? "Accessed " : "",
2979 (pte & _PAGE_DIRTY) ? "Dirty " : "",
2980 (pte & _PAGE_READ) ? "Read " : "",
2981 (pte & _PAGE_WRITE) ? "Write " : "",
2982 (pte & _PAGE_EXEC) ? "Exec " : "");
2985 static void show_pte(unsigned long addr)
2987 unsigned long tskv = 0;
2988 struct task_struct *tsk = NULL;
2989 struct mm_struct *mm;
2990 pgd_t *pgdp, *pgdir;
2995 if (!scanhex(&tskv))
2998 tsk = (struct task_struct *)tskv;
3003 mm = tsk->active_mm;
3005 if (setjmp(bus_error_jmp) != 0) {
3006 catch_memory_errors = 0;
3007 printf("*** Error dumping pte for task %px\n", tsk);
3011 catch_memory_errors = 1;
3014 if (mm == &init_mm) {
3015 pgdp = pgd_offset_k(addr);
3016 pgdir = pgd_offset_k(0);
3018 pgdp = pgd_offset(mm, addr);
3019 pgdir = pgd_offset(mm, 0);
3022 if (pgd_none(*pgdp)) {
3023 printf("no linux page table for address\n");
3027 printf("pgd @ 0x%016lx\n", pgdir);
3029 if (pgd_huge(*pgdp)) {
3030 format_pte(pgdp, pgd_val(*pgdp));
3033 printf("pgdp @ 0x%016lx = 0x%016lx\n", pgdp, pgd_val(*pgdp));
3035 pudp = pud_offset(pgdp, addr);
3037 if (pud_none(*pudp)) {
3038 printf("No valid PUD\n");
3042 if (pud_huge(*pudp)) {
3043 format_pte(pudp, pud_val(*pudp));
3047 printf("pudp @ 0x%016lx = 0x%016lx\n", pudp, pud_val(*pudp));
3049 pmdp = pmd_offset(pudp, addr);
3051 if (pmd_none(*pmdp)) {
3052 printf("No valid PMD\n");
3056 if (pmd_huge(*pmdp)) {
3057 format_pte(pmdp, pmd_val(*pmdp));
3060 printf("pmdp @ 0x%016lx = 0x%016lx\n", pmdp, pmd_val(*pmdp));
3062 ptep = pte_offset_map(pmdp, addr);
3063 if (pte_none(*ptep)) {
3064 printf("no valid PTE\n");
3068 format_pte(ptep, pte_val(*ptep));
3072 catch_memory_errors = 0;
3075 static void show_pte(unsigned long addr)
3077 printf("show_pte not yet implemented\n");
3079 #endif /* CONFIG_PPC_BOOK3S_64 */
3081 static void show_tasks(void)
3084 struct task_struct *tsk = NULL;
3086 printf(" task_struct ->thread.ksp PID PPID S P CMD\n");
3089 tsk = (struct task_struct *)tskv;
3091 if (setjmp(bus_error_jmp) != 0) {
3092 catch_memory_errors = 0;
3093 printf("*** Error dumping task %px\n", tsk);
3097 catch_memory_errors = 1;
3103 for_each_process(tsk)
3108 catch_memory_errors = 0;
3111 static void proccall(void)
3113 unsigned long args[8];
3116 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
3117 unsigned long, unsigned long, unsigned long,
3118 unsigned long, unsigned long, unsigned long);
3121 if (!scanhex(&adrs))
3125 for (i = 0; i < 8; ++i)
3127 for (i = 0; i < 8; ++i) {
3128 if (!scanhex(&args[i]) || termch == '\n')
3132 func = (callfunc_t) adrs;
3134 if (setjmp(bus_error_jmp) == 0) {
3135 catch_memory_errors = 1;
3137 ret = func(args[0], args[1], args[2], args[3],
3138 args[4], args[5], args[6], args[7]);
3140 printf("return value is 0x%lx\n", ret);
3142 printf("*** %x exception occurred\n", fault_except);
3144 catch_memory_errors = 0;
3147 /* Input scanning routines */
3158 while( c == ' ' || c == '\t' )
3164 static char *regnames[N_PTREGS] = {
3165 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3166 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3167 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3168 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3169 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
3175 "trap", "dar", "dsisr", "res"
3179 scanhex(unsigned long *vp)
3186 /* parse register name */
3190 for (i = 0; i < sizeof(regname) - 1; ++i) {
3199 for (i = 0; i < N_PTREGS; ++i) {
3200 if (strcmp(regnames[i], regname) == 0) {
3201 if (xmon_regs == NULL) {
3202 printf("regs not available\n");
3205 *vp = ((unsigned long *)xmon_regs)[i];
3209 printf("invalid register name '%%%s'\n", regname);
3213 /* skip leading "0x" if any */
3227 } else if (c == '$') {
3229 for (i=0; i<63; i++) {
3231 if (isspace(c) || c == '\0') {
3239 if (setjmp(bus_error_jmp) == 0) {
3240 catch_memory_errors = 1;
3242 *vp = kallsyms_lookup_name(tmpstr);
3245 catch_memory_errors = 0;
3247 printf("unknown symbol '%s'\n", tmpstr);
3280 static int hexdigit(int c)
3282 if( '0' <= c && c <= '9' )
3284 if( 'A' <= c && c <= 'F' )
3285 return c - ('A' - 10);
3286 if( 'a' <= c && c <= 'f' )
3287 return c - ('a' - 10);
3292 getstring(char *s, int size)
3303 } while( c != ' ' && c != '\t' && c != '\n' );
3308 static char line[256];
3309 static char *lineptr;
3320 if (lineptr == NULL || *lineptr == 0) {
3321 if (xmon_gets(line, sizeof(line)) == NULL) {
3331 take_input(char *str)
3340 int type = inchar();
3342 static char tmp[64];
3347 xmon_print_symbol(addr, ": ", "\n");
3352 if (setjmp(bus_error_jmp) == 0) {
3353 catch_memory_errors = 1;
3355 addr = kallsyms_lookup_name(tmp);
3357 printf("%s: %lx\n", tmp, addr);
3359 printf("Symbol '%s' not found.\n", tmp);
3362 catch_memory_errors = 0;
3369 /* Print an address in numeric and symbolic form (if possible) */
3370 static void xmon_print_symbol(unsigned long address, const char *mid,
3374 const char *name = NULL;
3375 unsigned long offset, size;
3377 printf(REG, address);
3378 if (setjmp(bus_error_jmp) == 0) {
3379 catch_memory_errors = 1;
3381 name = kallsyms_lookup(address, &size, &offset, &modname,
3384 /* wait a little while to see if we get a machine check */
3388 catch_memory_errors = 0;
3391 printf("%s%s+%#lx/%#lx", mid, name, offset, size);
3393 printf(" [%s]", modname);
3395 printf("%s", after);
3398 #ifdef CONFIG_PPC_BOOK3S_64
3399 void dump_segments(void)
3402 unsigned long esid,vsid;
3405 printf("SLB contents of cpu 0x%x\n", smp_processor_id());
3407 for (i = 0; i < mmu_slb_size; i++) {
3408 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
3409 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
3414 printf("%02d %016lx %016lx", i, esid, vsid);
3416 if (!(esid & SLB_ESID_V)) {
3421 llp = vsid & SLB_VSID_LLP;
3422 if (vsid & SLB_VSID_B_1T) {
3423 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
3425 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
3428 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
3430 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
3437 #ifdef CONFIG_PPC_STD_MMU_32
3438 void dump_segments(void)
3443 for (i = 0; i < 16; ++i)
3444 printf(" %x", mfsrin(i));
3450 static void dump_tlb_44x(void)
3454 for (i = 0; i < PPC44x_TLB_SIZE; i++) {
3455 unsigned long w0,w1,w2;
3456 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
3457 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
3458 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
3459 printf("[%02x] %08x %08x %08x ", i, w0, w1, w2);
3460 if (w0 & PPC44x_TLB_VALID) {
3461 printf("V %08x -> %01x%08x %c%c%c%c%c",
3462 w0 & PPC44x_TLB_EPN_MASK,
3463 w1 & PPC44x_TLB_ERPN_MASK,
3464 w1 & PPC44x_TLB_RPN_MASK,
3465 (w2 & PPC44x_TLB_W) ? 'W' : 'w',
3466 (w2 & PPC44x_TLB_I) ? 'I' : 'i',
3467 (w2 & PPC44x_TLB_M) ? 'M' : 'm',
3468 (w2 & PPC44x_TLB_G) ? 'G' : 'g',
3469 (w2 & PPC44x_TLB_E) ? 'E' : 'e');
3474 #endif /* CONFIG_44x */
3476 #ifdef CONFIG_PPC_BOOK3E
3477 static void dump_tlb_book3e(void)
3479 u32 mmucfg, pidmask, lpidmask;
3481 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
3483 static const char *pgsz_names[] = {
3518 /* Gather some infos about the MMU */
3519 mmucfg = mfspr(SPRN_MMUCFG);
3520 mmu_version = (mmucfg & 3) + 1;
3521 ntlbs = ((mmucfg >> 2) & 3) + 1;
3522 pidsz = ((mmucfg >> 6) & 0x1f) + 1;
3523 lpidsz = (mmucfg >> 24) & 0xf;
3524 rasz = (mmucfg >> 16) & 0x7f;
3525 if ((mmu_version > 1) && (mmucfg & 0x10000))
3527 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
3528 mmu_version, ntlbs, pidsz, lpidsz, rasz);
3529 pidmask = (1ul << pidsz) - 1;
3530 lpidmask = (1ul << lpidsz) - 1;
3531 ramask = (1ull << rasz) - 1;
3533 for (tlb = 0; tlb < ntlbs; tlb++) {
3535 int nent, assoc, new_cc = 1;
3536 printf("TLB %d:\n------\n", tlb);
3539 tlbcfg = mfspr(SPRN_TLB0CFG);
3542 tlbcfg = mfspr(SPRN_TLB1CFG);
3545 tlbcfg = mfspr(SPRN_TLB2CFG);
3548 tlbcfg = mfspr(SPRN_TLB3CFG);
3551 printf("Unsupported TLB number !\n");
3554 nent = tlbcfg & 0xfff;
3555 assoc = (tlbcfg >> 24) & 0xff;
3556 for (i = 0; i < nent; i++) {
3557 u32 mas0 = MAS0_TLBSEL(tlb);
3558 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
3561 int esel = i, cc = i;
3569 mas0 |= MAS0_ESEL(esel);
3570 mtspr(SPRN_MAS0, mas0);
3571 mtspr(SPRN_MAS1, mas1);
3572 mtspr(SPRN_MAS2, mas2);
3573 asm volatile("tlbre 0,0,0" : : : "memory");
3574 mas1 = mfspr(SPRN_MAS1);
3575 mas2 = mfspr(SPRN_MAS2);
3576 mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
3577 if (assoc && (i % assoc) == 0)
3579 if (!(mas1 & MAS1_VALID))
3582 printf("%04x- ", i);
3584 printf("%04x-%c", cc, 'A' + esel);
3586 printf(" |%c", 'A' + esel);
3588 printf(" %016llx %04x %s %c%c AS%c",
3590 (mas1 >> 16) & 0x3fff,
3591 pgsz_names[(mas1 >> 7) & 0x1f],
3592 mas1 & MAS1_IND ? 'I' : ' ',
3593 mas1 & MAS1_IPROT ? 'P' : ' ',
3594 mas1 & MAS1_TS ? '1' : '0');
3595 printf(" %c%c%c%c%c%c%c",
3596 mas2 & MAS2_X0 ? 'a' : ' ',
3597 mas2 & MAS2_X1 ? 'v' : ' ',
3598 mas2 & MAS2_W ? 'w' : ' ',
3599 mas2 & MAS2_I ? 'i' : ' ',
3600 mas2 & MAS2_M ? 'm' : ' ',
3601 mas2 & MAS2_G ? 'g' : ' ',
3602 mas2 & MAS2_E ? 'e' : ' ');
3603 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
3604 if (mas1 & MAS1_IND)
3606 pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
3608 printf(" U%c%c%c S%c%c%c\n",
3609 mas7_mas3 & MAS3_UX ? 'x' : ' ',
3610 mas7_mas3 & MAS3_UW ? 'w' : ' ',
3611 mas7_mas3 & MAS3_UR ? 'r' : ' ',
3612 mas7_mas3 & MAS3_SX ? 'x' : ' ',
3613 mas7_mas3 & MAS3_SW ? 'w' : ' ',
3614 mas7_mas3 & MAS3_SR ? 'r' : ' ');
3618 #endif /* CONFIG_PPC_BOOK3E */
3620 static void xmon_init(int enable)
3624 __debugger_ipi = xmon_ipi;
3625 __debugger_bpt = xmon_bpt;
3626 __debugger_sstep = xmon_sstep;
3627 __debugger_iabr_match = xmon_iabr_match;
3628 __debugger_break_match = xmon_break_match;
3629 __debugger_fault_handler = xmon_fault_handler;
3632 __debugger_ipi = NULL;
3633 __debugger_bpt = NULL;
3634 __debugger_sstep = NULL;
3635 __debugger_iabr_match = NULL;
3636 __debugger_break_match = NULL;
3637 __debugger_fault_handler = NULL;
3641 #ifdef CONFIG_MAGIC_SYSRQ
3642 static void sysrq_handle_xmon(int key)
3644 /* ensure xmon is enabled */
3646 debugger(get_irq_regs());
3651 static struct sysrq_key_op sysrq_xmon_op = {
3652 .handler = sysrq_handle_xmon,
3653 .help_msg = "xmon(x)",
3654 .action_msg = "Entering xmon",
3657 static int __init setup_xmon_sysrq(void)
3659 register_sysrq_key('x', &sysrq_xmon_op);
3662 device_initcall(setup_xmon_sysrq);
3663 #endif /* CONFIG_MAGIC_SYSRQ */
3665 #ifdef CONFIG_DEBUG_FS
3666 static void clear_all_bpt(void)
3670 /* clear/unpatch all breakpoints */
3674 /* Disable all breakpoints */
3675 for (i = 0; i < NBPTS; ++i)
3676 bpts[i].enabled = 0;
3678 /* Clear any data or iabr breakpoints */
3679 if (iabr || dabr.enabled) {
3684 printf("xmon: All breakpoints cleared\n");
3687 static int xmon_dbgfs_set(void *data, u64 val)
3692 /* make sure all breakpoints removed when disabling */
3698 static int xmon_dbgfs_get(void *data, u64 *val)
3704 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get,
3705 xmon_dbgfs_set, "%llu\n");
3707 static int __init setup_xmon_dbgfs(void)
3709 debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL,
3713 device_initcall(setup_xmon_dbgfs);
3714 #endif /* CONFIG_DEBUG_FS */
3716 static int xmon_early __initdata;
3718 static int __init early_parse_xmon(char *p)
3720 if (!p || strncmp(p, "early", 5) == 0) {
3721 /* just "xmon" is equivalent to "xmon=early" */
3725 } else if (strncmp(p, "on", 2) == 0) {
3728 } else if (strncmp(p, "off", 3) == 0)
3735 early_param("xmon", early_parse_xmon);
3737 void __init xmon_setup(void)
3745 #ifdef CONFIG_SPU_BASE
3749 u64 saved_mfc_sr1_RW;
3750 u32 saved_spu_runcntl_RW;
3751 unsigned long dump_addr;
3755 #define XMON_NUM_SPUS 16 /* Enough for current hardware */
3757 static struct spu_info spu_info[XMON_NUM_SPUS];
3759 void xmon_register_spus(struct list_head *list)
3763 list_for_each_entry(spu, list, full_list) {
3764 if (spu->number >= XMON_NUM_SPUS) {
3769 spu_info[spu->number].spu = spu;
3770 spu_info[spu->number].stopped_ok = 0;
3771 spu_info[spu->number].dump_addr = (unsigned long)
3772 spu_info[spu->number].spu->local_store;
3776 static void stop_spus(void)
3782 for (i = 0; i < XMON_NUM_SPUS; i++) {
3783 if (!spu_info[i].spu)
3786 if (setjmp(bus_error_jmp) == 0) {
3787 catch_memory_errors = 1;
3790 spu = spu_info[i].spu;
3792 spu_info[i].saved_spu_runcntl_RW =
3793 in_be32(&spu->problem->spu_runcntl_RW);
3795 tmp = spu_mfc_sr1_get(spu);
3796 spu_info[i].saved_mfc_sr1_RW = tmp;
3798 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
3799 spu_mfc_sr1_set(spu, tmp);
3804 spu_info[i].stopped_ok = 1;
3806 printf("Stopped spu %.2d (was %s)\n", i,
3807 spu_info[i].saved_spu_runcntl_RW ?
3808 "running" : "stopped");
3810 catch_memory_errors = 0;
3811 printf("*** Error stopping spu %.2d\n", i);
3813 catch_memory_errors = 0;
3817 static void restart_spus(void)
3822 for (i = 0; i < XMON_NUM_SPUS; i++) {
3823 if (!spu_info[i].spu)
3826 if (!spu_info[i].stopped_ok) {
3827 printf("*** Error, spu %d was not successfully stopped"
3828 ", not restarting\n", i);
3832 if (setjmp(bus_error_jmp) == 0) {
3833 catch_memory_errors = 1;
3836 spu = spu_info[i].spu;
3837 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
3838 out_be32(&spu->problem->spu_runcntl_RW,
3839 spu_info[i].saved_spu_runcntl_RW);
3844 printf("Restarted spu %.2d\n", i);
3846 catch_memory_errors = 0;
3847 printf("*** Error restarting spu %.2d\n", i);
3849 catch_memory_errors = 0;
3853 #define DUMP_WIDTH 23
3854 #define DUMP_VALUE(format, field, value) \
3856 if (setjmp(bus_error_jmp) == 0) { \
3857 catch_memory_errors = 1; \
3859 printf(" %-*s = "format"\n", DUMP_WIDTH, \
3864 catch_memory_errors = 0; \
3865 printf(" %-*s = *** Error reading field.\n", \
3866 DUMP_WIDTH, #field); \
3868 catch_memory_errors = 0; \
3871 #define DUMP_FIELD(obj, format, field) \
3872 DUMP_VALUE(format, field, obj->field)
3874 static void dump_spu_fields(struct spu *spu)
3876 printf("Dumping spu fields at address %p:\n", spu);
3878 DUMP_FIELD(spu, "0x%x", number);
3879 DUMP_FIELD(spu, "%s", name);
3880 DUMP_FIELD(spu, "0x%lx", local_store_phys);
3881 DUMP_FIELD(spu, "0x%p", local_store);
3882 DUMP_FIELD(spu, "0x%lx", ls_size);
3883 DUMP_FIELD(spu, "0x%x", node);
3884 DUMP_FIELD(spu, "0x%lx", flags);
3885 DUMP_FIELD(spu, "%d", class_0_pending);
3886 DUMP_FIELD(spu, "0x%lx", class_0_dar);
3887 DUMP_FIELD(spu, "0x%lx", class_1_dar);
3888 DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
3889 DUMP_FIELD(spu, "0x%lx", irqs[0]);
3890 DUMP_FIELD(spu, "0x%lx", irqs[1]);
3891 DUMP_FIELD(spu, "0x%lx", irqs[2]);
3892 DUMP_FIELD(spu, "0x%x", slb_replace);
3893 DUMP_FIELD(spu, "%d", pid);
3894 DUMP_FIELD(spu, "0x%p", mm);
3895 DUMP_FIELD(spu, "0x%p", ctx);
3896 DUMP_FIELD(spu, "0x%p", rq);
3897 DUMP_FIELD(spu, "0x%p", timestamp);
3898 DUMP_FIELD(spu, "0x%lx", problem_phys);
3899 DUMP_FIELD(spu, "0x%p", problem);
3900 DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
3901 in_be32(&spu->problem->spu_runcntl_RW));
3902 DUMP_VALUE("0x%x", problem->spu_status_R,
3903 in_be32(&spu->problem->spu_status_R));
3904 DUMP_VALUE("0x%x", problem->spu_npc_RW,
3905 in_be32(&spu->problem->spu_npc_RW));
3906 DUMP_FIELD(spu, "0x%p", priv2);
3907 DUMP_FIELD(spu, "0x%p", pdata);
3911 spu_inst_dump(unsigned long adr, long count, int praddr)
3913 return generic_inst_dump(adr, count, praddr, print_insn_spu);
3916 static void dump_spu_ls(unsigned long num, int subcmd)
3918 unsigned long offset, addr, ls_addr;
3920 if (setjmp(bus_error_jmp) == 0) {
3921 catch_memory_errors = 1;
3923 ls_addr = (unsigned long)spu_info[num].spu->local_store;
3927 catch_memory_errors = 0;
3928 printf("*** Error: accessing spu info for spu %d\n", num);
3931 catch_memory_errors = 0;
3933 if (scanhex(&offset))
3934 addr = ls_addr + offset;
3936 addr = spu_info[num].dump_addr;
3938 if (addr >= ls_addr + LS_SIZE) {
3939 printf("*** Error: address outside of local store\n");
3945 addr += spu_inst_dump(addr, 16, 1);
3955 spu_info[num].dump_addr = addr;
3958 static int do_spu_cmd(void)
3960 static unsigned long num = 0;
3961 int cmd, subcmd = 0;
3973 if (isxdigit(subcmd) || subcmd == '\n')
3977 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
3978 printf("*** Error: invalid spu number\n");
3984 dump_spu_fields(spu_info[num].spu);
3987 dump_spu_ls(num, subcmd);
3998 #else /* ! CONFIG_SPU_BASE */
3999 static int do_spu_cmd(void)