2 * Copyright 2011 IBM Corporation.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
10 #include <linux/types.h>
11 #include <linux/threads.h>
12 #include <linux/kernel.h>
13 #include <linux/irq.h>
14 #include <linux/debugfs.h>
15 #include <linux/smp.h>
16 #include <linux/interrupt.h>
17 #include <linux/seq_file.h>
18 #include <linux/init.h>
19 #include <linux/cpu.h>
21 #include <linux/slab.h>
22 #include <linux/spinlock.h>
27 #include <asm/machdep.h>
29 #include <asm/errno.h>
32 #include <asm/firmware.h>
34 /* Globals common to all ICP/ICS implementations */
35 const struct icp_ops *icp_ops;
37 unsigned int xics_default_server = 0xff;
38 unsigned int xics_default_distrib_server = 0;
39 unsigned int xics_interrupt_server_size = 8;
41 DEFINE_PER_CPU(struct xics_cppr, xics_cppr);
43 struct irq_host *xics_host;
45 static LIST_HEAD(ics_list);
47 void xics_update_irq_servers(void)
50 struct device_node *np;
55 /* Find the server numbers for the boot cpu. */
56 np = of_get_cpu_node(boot_cpuid, NULL);
59 hcpuid = get_hard_smp_processor_id(boot_cpuid);
60 xics_default_server = xics_default_distrib_server = hcpuid;
62 pr_devel("xics: xics_default_server = 0x%x\n", xics_default_server);
64 ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
70 i = ilen / sizeof(int);
72 /* Global interrupt distribution server is specified in the last
73 * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
74 * entry fom this property for current boot cpu id and use it as
75 * default distribution server
77 for (j = 0; j < i; j += 2) {
78 if (ireg[j] == hcpuid) {
79 xics_default_distrib_server = ireg[j+1];
83 pr_devel("xics: xics_default_distrib_server = 0x%x\n",
84 xics_default_distrib_server);
88 /* GIQ stuff, currently only supported on RTAS setups, will have
89 * to be sorted properly for bare metal
91 void xics_set_cpu_giq(unsigned int gserver, unsigned int join)
93 #ifdef CONFIG_PPC_RTAS
97 if (!rtas_indicator_present(GLOBAL_INTERRUPT_QUEUE, NULL))
100 index = (1UL << xics_interrupt_server_size) - 1 - gserver;
102 status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, index, join);
104 WARN(status < 0, "set-indicator(%d, %d, %u) returned %d\n",
105 GLOBAL_INTERRUPT_QUEUE, index, join, status);
109 void xics_setup_cpu(void)
111 icp_ops->set_priority(LOWEST_PRIORITY);
113 xics_set_cpu_giq(xics_default_distrib_server, 1);
116 void xics_mask_unknown_vec(unsigned int vec)
120 pr_err("Interrupt 0x%x (real) is invalid, disabling it.\n", vec);
122 list_for_each_entry(ics, &ics_list, link)
123 ics->mask_unknown(ics, vec);
129 DEFINE_PER_CPU_SHARED_ALIGNED(unsigned long, xics_ipi_message);
131 irqreturn_t xics_ipi_dispatch(int cpu)
133 unsigned long *tgt = &per_cpu(xics_ipi_message, cpu);
135 mb(); /* order mmio clearing qirr */
137 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION, tgt)) {
138 smp_message_recv(PPC_MSG_CALL_FUNCTION);
140 if (test_and_clear_bit(PPC_MSG_RESCHEDULE, tgt)) {
141 smp_message_recv(PPC_MSG_RESCHEDULE);
143 if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE, tgt)) {
144 smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
146 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
147 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK, tgt)) {
148 smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
155 static void xics_request_ipi(void)
159 ipi = irq_create_mapping(xics_host, XICS_IPI);
160 BUG_ON(ipi == NO_IRQ);
163 * IPIs are marked IRQF_DISABLED as they must run with irqs
166 irq_set_handler(ipi, handle_percpu_irq);
167 BUG_ON(request_irq(ipi, icp_ops->ipi_action,
168 IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL));
171 int __init xics_smp_probe(void)
173 /* Setup message_pass callback based on which ICP is used */
174 smp_ops->message_pass = icp_ops->message_pass;
176 /* Register all the IPIs */
179 return cpumask_weight(cpu_possible_mask);
182 #endif /* CONFIG_SMP */
184 void xics_teardown_cpu(void)
186 struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
189 * we have to reset the cppr index to 0 because we're
190 * not going to return from the IPI
193 icp_ops->set_priority(0);
194 icp_ops->teardown_cpu();
197 void xics_kexec_teardown_cpu(int secondary)
201 icp_ops->flush_ipi();
204 * Some machines need to have at least one cpu in the GIQ,
205 * so leave the master cpu in the group.
208 xics_set_cpu_giq(xics_default_distrib_server, 0);
212 #ifdef CONFIG_HOTPLUG_CPU
214 /* Interrupts are disabled. */
215 void xics_migrate_irqs_away(void)
217 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
218 unsigned int irq, virq;
220 /* If we used to be the default server, move to the new "boot_cpuid" */
221 if (hw_cpu == xics_default_server)
222 xics_update_irq_servers();
224 /* Reject any interrupt that was queued to us... */
225 icp_ops->set_priority(0);
227 /* Remove ourselves from the global interrupt queue */
228 xics_set_cpu_giq(xics_default_distrib_server, 0);
230 /* Allow IPIs again... */
231 icp_ops->set_priority(DEFAULT_PRIORITY);
234 struct irq_desc *desc;
235 struct irq_chip *chip;
240 /* We can't set affinity on ISA interrupts */
241 if (virq < NUM_ISA_INTERRUPTS)
243 if (irq_map[virq].host != xics_host)
245 irq = (unsigned int)irq_map[virq].hwirq;
246 /* We need to get IPIs still. */
247 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
249 desc = irq_to_desc(virq);
250 /* We only need to migrate enabled IRQS */
251 if (!desc || !desc->action)
253 chip = irq_desc_get_chip(desc);
254 if (!chip || !chip->irq_set_affinity)
257 raw_spin_lock_irqsave(&desc->lock, flags);
259 /* Locate interrupt server */
261 ics = irq_get_chip_data(virq);
263 server = ics->get_server(ics, irq);
265 printk(KERN_ERR "%s: Can't find server for irq %d\n",
270 /* We only support delivery to all cpus or to one cpu.
271 * The irq has to be migrated only in the single cpu
274 if (server != hw_cpu)
277 /* This is expected during cpu offline. */
279 pr_warning("IRQ %u affinity broken off cpu %u\n",
282 /* Reset affinity to all cpus */
283 raw_spin_unlock_irqrestore(&desc->lock, flags);
284 irq_set_affinity(virq, cpu_all_mask);
287 raw_spin_unlock_irqrestore(&desc->lock, flags);
290 #endif /* CONFIG_HOTPLUG_CPU */
294 * For the moment we only implement delivery to all cpus or one cpu.
296 * If the requested affinity is cpu_all_mask, we set global affinity.
297 * If not we set it to the first cpu in the mask, even if multiple cpus
298 * are set. This is so things like irqbalance (which set core and package
299 * wide affinities) do the right thing.
301 * We need to fix this to implement support for the links
303 int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
304 unsigned int strict_check)
307 if (!distribute_irqs)
308 return xics_default_server;
310 if (!cpumask_subset(cpu_possible_mask, cpumask)) {
311 int server = cpumask_first_and(cpu_online_mask, cpumask);
313 if (server < nr_cpu_ids)
314 return get_hard_smp_processor_id(server);
321 * Workaround issue with some versions of JS20 firmware that
322 * deliver interrupts to cpus which haven't been started. This
323 * happens when using the maxcpus= boot option.
325 if (cpumask_equal(cpu_online_mask, cpu_present_mask))
326 return xics_default_distrib_server;
328 return xics_default_server;
330 #endif /* CONFIG_SMP */
332 static int xics_host_match(struct irq_host *h, struct device_node *node)
334 /* IBM machines have interrupt parents of various funky types for things
335 * like vdevices, events, etc... The trick we use here is to match
336 * everything here except the legacy 8259 which is compatible "chrp,iic"
338 return !of_device_is_compatible(node, "chrp,iic");
342 static void xics_ipi_unmask(struct irq_data *d) { }
343 static void xics_ipi_mask(struct irq_data *d) { }
345 static struct irq_chip xics_ipi_chip = {
347 .irq_eoi = NULL, /* Patched at init time */
348 .irq_mask = xics_ipi_mask,
349 .irq_unmask = xics_ipi_unmask,
352 static int xics_host_map(struct irq_host *h, unsigned int virq,
357 pr_devel("xics: map virq %d, hwirq 0x%lx\n", virq, hw);
359 /* Insert the interrupt mapping into the radix tree for fast lookup */
360 irq_radix_revmap_insert(xics_host, virq, hw);
362 /* They aren't all level sensitive but we just don't really know */
363 irq_set_status_flags(virq, IRQ_LEVEL);
365 /* Don't call into ICS for IPIs */
366 if (hw == XICS_IPI) {
367 irq_set_chip_and_handler(virq, &xics_ipi_chip,
372 /* Let the ICS setup the chip data */
373 list_for_each_entry(ics, &ics_list, link)
374 if (ics->map(ics, virq) == 0)
379 static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
380 const u32 *intspec, unsigned int intsize,
381 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
384 /* Current xics implementation translates everything
385 * to level. It is not technically right for MSIs but this
386 * is irrelevant at this point. We might get smarter in the future
388 *out_hwirq = intspec[0];
389 *out_flags = IRQ_TYPE_LEVEL_LOW;
394 static struct irq_host_ops xics_host_ops = {
395 .match = xics_host_match,
396 .map = xics_host_map,
397 .xlate = xics_host_xlate,
400 static void __init xics_init_host(void)
402 xics_host = irq_alloc_host(NULL, IRQ_HOST_MAP_TREE, 0, &xics_host_ops,
404 BUG_ON(xics_host == NULL);
405 irq_set_default_host(xics_host);
408 void __init xics_register_ics(struct ics *ics)
410 list_add(&ics->link, &ics_list);
413 static void __init xics_get_server_size(void)
415 struct device_node *np;
418 /* We fetch the interrupt server size from the first ICS node
421 np = of_find_compatible_node(NULL, NULL, "ibm,ppc-xics");
424 isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
427 xics_interrupt_server_size = *isize;
431 void __init xics_init(void)
435 /* Fist locate ICP */
436 #ifdef CONFIG_PPC_ICP_HV
437 if (firmware_has_feature(FW_FEATURE_LPAR))
440 #ifdef CONFIG_PPC_ICP_NATIVE
442 rc = icp_native_init();
445 pr_warning("XICS: Cannot find a Presentation Controller !\n");
449 /* Copy get_irq callback over to ppc_md */
450 ppc_md.get_irq = icp_ops->get_irq;
452 /* Patch up IPI chip EOI */
453 xics_ipi_chip.irq_eoi = icp_ops->eoi;
456 #ifdef CONFIG_PPC_ICS_RTAS
457 rc = ics_rtas_init();
460 pr_warning("XICS: Cannot find a Source Controller !\n");
462 /* Initialize common bits */
463 xics_get_server_size();
464 xics_update_irq_servers();