2 * Copyright (C) 2007-2011 Freescale Semiconductor, Inc.
4 * Author: Tony Li <tony.li@freescale.com>
5 * Jason Jin <Jason.jin@freescale.com>
7 * The hwirq alloc and free code reuse from sysdev/mpic_msi.c
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2 of the
15 #include <linux/irq.h>
16 #include <linux/bootmem.h>
17 #include <linux/msi.h>
18 #include <linux/pci.h>
19 #include <linux/slab.h>
20 #include <linux/of_platform.h>
21 #include <sysdev/fsl_soc.h>
23 #include <asm/hw_irq.h>
24 #include <asm/ppc-pci.h>
31 struct fsl_msi_feature {
33 u32 msiir_offset; /* Offset of MSIIR, relative to start of MSIR bank */
36 struct fsl_msi_cascade_data {
37 struct fsl_msi *msi_data;
41 static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
43 return in_be32(base + (reg >> 2));
47 * We do not need this actually. The MSIR register has been read once
48 * in the cascade interrupt. So, this MSI interrupt has been acked
50 static void fsl_msi_end_irq(struct irq_data *d)
54 static struct irq_chip fsl_msi_chip = {
55 .irq_mask = mask_msi_irq,
56 .irq_unmask = unmask_msi_irq,
57 .irq_ack = fsl_msi_end_irq,
61 static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
64 struct fsl_msi *msi_data = h->host_data;
65 struct irq_chip *chip = &fsl_msi_chip;
67 irq_set_status_flags(virq, IRQ_TYPE_EDGE_FALLING);
69 irq_set_chip_data(virq, msi_data);
70 irq_set_chip_and_handler(virq, chip, handle_edge_irq);
75 static struct irq_host_ops fsl_msi_host_ops = {
76 .map = fsl_msi_host_map,
79 static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
83 rc = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
84 msi_data->irqhost->of_node);
88 rc = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
90 msi_bitmap_free(&msi_data->bitmap);
97 static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type)
99 if (type == PCI_CAP_ID_MSIX)
100 pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
105 static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
107 struct msi_desc *entry;
108 struct fsl_msi *msi_data;
110 list_for_each_entry(entry, &pdev->msi_list, list) {
111 if (entry->irq == NO_IRQ)
113 msi_data = irq_get_chip_data(entry->irq);
114 irq_set_msi_desc(entry->irq, NULL);
115 msi_bitmap_free_hwirqs(&msi_data->bitmap,
116 virq_to_hw(entry->irq), 1);
117 irq_dispose_mapping(entry->irq);
123 static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
125 struct fsl_msi *fsl_msi_data)
127 struct fsl_msi *msi_data = fsl_msi_data;
128 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
129 u64 address; /* Physical address of the MSIIR */
133 /* If the msi-address-64 property exists, then use it */
134 reg = of_get_property(hose->dn, "msi-address-64", &len);
135 if (reg && (len == sizeof(u64)))
136 address = be64_to_cpup(reg);
138 address = fsl_pci_immrbar_base(hose) + msi_data->msiir_offset;
140 msg->address_lo = lower_32_bits(address);
141 msg->address_hi = upper_32_bits(address);
145 pr_debug("%s: allocated srs: %d, ibs: %d\n",
146 __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG);
149 static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
151 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
152 struct device_node *np;
154 int rc, hwirq = -ENOMEM;
156 struct msi_desc *entry;
158 struct fsl_msi *msi_data;
161 * If the PCI node has an fsl,msi property, then we need to use it
162 * to find the specific MSI.
164 np = of_parse_phandle(hose->dn, "fsl,msi", 0);
166 if (of_device_is_compatible(np, "fsl,mpic-msi"))
167 phandle = np->phandle;
169 dev_err(&pdev->dev, "node %s has an invalid fsl,msi"
170 " phandle\n", hose->dn->full_name);
175 list_for_each_entry(entry, &pdev->msi_list, list) {
177 * Loop over all the MSI devices until we find one that has an
178 * available interrupt.
180 list_for_each_entry(msi_data, &msi_head, list) {
182 * If the PCI node has an fsl,msi property, then we
183 * restrict our search to the corresponding MSI node.
184 * The simplest way is to skip over MSI nodes with the
185 * wrong phandle. Under the Freescale hypervisor, this
186 * has the additional benefit of skipping over MSI
187 * nodes that are not mapped in the PAMU.
189 if (phandle && (phandle != msi_data->phandle))
192 hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
199 pr_debug("%s: fail allocating msi interrupt\n",
204 virq = irq_create_mapping(msi_data->irqhost, hwirq);
206 if (virq == NO_IRQ) {
207 pr_debug("%s: fail mapping hwirq 0x%x\n",
209 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
213 /* chip_data is msi_data via host->hostdata in host->map() */
214 irq_set_msi_desc(virq, entry);
216 fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data);
217 write_msi_msg(virq, &msg);
222 /* free by the caller of this function */
226 static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
228 struct irq_chip *chip = irq_desc_get_chip(desc);
229 struct irq_data *idata = irq_desc_get_irq_data(desc);
230 unsigned int cascade_irq;
231 struct fsl_msi *msi_data;
236 struct fsl_msi_cascade_data *cascade_data;
238 cascade_data = irq_get_handler_data(irq);
239 msi_data = cascade_data->msi_data;
241 raw_spin_lock(&desc->lock);
242 if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
243 if (chip->irq_mask_ack)
244 chip->irq_mask_ack(idata);
246 chip->irq_mask(idata);
247 chip->irq_ack(idata);
251 if (unlikely(irqd_irq_inprogress(idata)))
254 msir_index = cascade_data->index;
256 if (msir_index >= NR_MSI_REG)
257 cascade_irq = NO_IRQ;
259 irqd_set_chained_irq_inprogress(idata);
260 switch (msi_data->feature & FSL_PIC_IP_MASK) {
261 case FSL_PIC_IP_MPIC:
262 msir_value = fsl_msi_read(msi_data->msi_regs,
265 case FSL_PIC_IP_IPIC:
266 msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4);
271 intr_index = ffs(msir_value) - 1;
273 cascade_irq = irq_linear_revmap(msi_data->irqhost,
274 msir_index * IRQS_PER_MSI_REG +
275 intr_index + have_shift);
276 if (cascade_irq != NO_IRQ)
277 generic_handle_irq(cascade_irq);
278 have_shift += intr_index + 1;
279 msir_value = msir_value >> (intr_index + 1);
281 irqd_clr_chained_irq_inprogress(idata);
283 switch (msi_data->feature & FSL_PIC_IP_MASK) {
284 case FSL_PIC_IP_MPIC:
285 chip->irq_eoi(idata);
287 case FSL_PIC_IP_IPIC:
288 if (!irqd_irq_disabled(idata) && chip->irq_unmask)
289 chip->irq_unmask(idata);
293 raw_spin_unlock(&desc->lock);
296 static int fsl_of_msi_remove(struct platform_device *ofdev)
298 struct fsl_msi *msi = platform_get_drvdata(ofdev);
300 struct fsl_msi_cascade_data *cascade_data;
302 if (msi->list.prev != NULL)
303 list_del(&msi->list);
304 for (i = 0; i < NR_MSI_REG; i++) {
305 virq = msi->msi_virqs[i];
306 if (virq != NO_IRQ) {
307 cascade_data = irq_get_handler_data(virq);
309 irq_dispose_mapping(virq);
312 if (msi->bitmap.bitmap)
313 msi_bitmap_free(&msi->bitmap);
314 iounmap(msi->msi_regs);
320 static int __devinit fsl_msi_setup_hwirq(struct fsl_msi *msi,
321 struct platform_device *dev,
322 int offset, int irq_index)
324 struct fsl_msi_cascade_data *cascade_data = NULL;
327 virt_msir = irq_of_parse_and_map(dev->dev.of_node, irq_index);
328 if (virt_msir == NO_IRQ) {
329 dev_err(&dev->dev, "%s: Cannot translate IRQ index %d\n",
330 __func__, irq_index);
334 cascade_data = kzalloc(sizeof(struct fsl_msi_cascade_data), GFP_KERNEL);
336 dev_err(&dev->dev, "No memory for MSI cascade data\n");
340 msi->msi_virqs[irq_index] = virt_msir;
341 cascade_data->index = offset;
342 cascade_data->msi_data = msi;
343 irq_set_handler_data(virt_msir, cascade_data);
344 irq_set_chained_handler(virt_msir, fsl_msi_cascade);
349 static const struct of_device_id fsl_of_msi_ids[];
350 static int __devinit fsl_of_msi_probe(struct platform_device *dev)
352 const struct of_device_id *match;
355 int err, i, j, irq_index, count;
358 struct fsl_msi_feature *features;
361 static const u32 all_avail[] = { 0, NR_MSI_IRQS };
363 match = of_match_device(fsl_of_msi_ids, &dev->dev);
366 features = match->data;
368 printk(KERN_DEBUG "Setting up Freescale MSI support\n");
370 msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL);
372 dev_err(&dev->dev, "No memory for MSI structure\n");
375 platform_set_drvdata(dev, msi);
377 msi->irqhost = irq_alloc_host(dev->dev.of_node, IRQ_HOST_MAP_LINEAR,
378 NR_MSI_IRQS, &fsl_msi_host_ops, 0);
380 if (msi->irqhost == NULL) {
381 dev_err(&dev->dev, "No memory for MSI irqhost\n");
386 /* Get the MSI reg base */
387 err = of_address_to_resource(dev->dev.of_node, 0, &res);
389 dev_err(&dev->dev, "%s resource error!\n",
390 dev->dev.of_node->full_name);
394 msi->msi_regs = ioremap(res.start, resource_size(&res));
395 if (!msi->msi_regs) {
396 dev_err(&dev->dev, "ioremap problem failed\n");
400 msi->feature = features->fsl_pic_ip;
402 msi->irqhost->host_data = msi;
404 msi->msiir_offset = features->msiir_offset + (res.start & 0xfffff);
407 * Remember the phandle, so that we can match with any PCI nodes
408 * that have an "fsl,msi" property.
410 msi->phandle = dev->dev.of_node->phandle;
412 rc = fsl_msi_init_allocator(msi);
414 dev_err(&dev->dev, "Error allocating MSI bitmap\n");
418 p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len);
419 if (p && len % (2 * sizeof(u32)) != 0) {
420 dev_err(&dev->dev, "%s: Malformed msi-available-ranges property\n",
428 len = sizeof(all_avail);
431 for (irq_index = 0, i = 0; i < len / (2 * sizeof(u32)); i++) {
432 if (p[i * 2] % IRQS_PER_MSI_REG ||
433 p[i * 2 + 1] % IRQS_PER_MSI_REG) {
434 printk(KERN_WARNING "%s: %s: msi available range of %u at %u is not IRQ-aligned\n",
435 __func__, dev->dev.of_node->full_name,
436 p[i * 2 + 1], p[i * 2]);
441 offset = p[i * 2] / IRQS_PER_MSI_REG;
442 count = p[i * 2 + 1] / IRQS_PER_MSI_REG;
444 for (j = 0; j < count; j++, irq_index++) {
445 err = fsl_msi_setup_hwirq(msi, dev, offset + j, irq_index);
451 list_add_tail(&msi->list, &msi_head);
453 /* The multiple setting ppc_md.setup_msi_irqs will not harm things */
454 if (!ppc_md.setup_msi_irqs) {
455 ppc_md.setup_msi_irqs = fsl_setup_msi_irqs;
456 ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs;
457 ppc_md.msi_check_device = fsl_msi_check_device;
458 } else if (ppc_md.setup_msi_irqs != fsl_setup_msi_irqs) {
459 dev_err(&dev->dev, "Different MSI driver already installed!\n");
465 fsl_of_msi_remove(dev);
469 static const struct fsl_msi_feature mpic_msi_feature = {
470 .fsl_pic_ip = FSL_PIC_IP_MPIC,
471 .msiir_offset = 0x140,
474 static const struct fsl_msi_feature ipic_msi_feature = {
475 .fsl_pic_ip = FSL_PIC_IP_IPIC,
476 .msiir_offset = 0x38,
479 static const struct of_device_id fsl_of_msi_ids[] = {
481 .compatible = "fsl,mpic-msi",
482 .data = (void *)&mpic_msi_feature,
485 .compatible = "fsl,ipic-msi",
486 .data = (void *)&ipic_msi_feature,
491 static struct platform_driver fsl_of_msi_driver = {
494 .owner = THIS_MODULE,
495 .of_match_table = fsl_of_msi_ids,
497 .probe = fsl_of_msi_probe,
498 .remove = fsl_of_msi_remove,
501 static __init int fsl_of_msi_init(void)
503 return platform_driver_register(&fsl_of_msi_driver);
506 subsys_initcall(fsl_of_msi_init);